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V4L/DVB (3547): Tvaudio.h are just i2c addresses. Merged into i2c-addr.h
[linux-2.6-block.git] / drivers / media / video / tvaudio.c
CommitLineData
1da177e4
LT		 1/*
2 * experimental driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * This code is placed under the terms of the GNU General Public License
11 *
12 * OPTIONS:
13 * debug - set to 1 if you'd like to see debug messages
14 *
15 */
16
17#include <linux/config.h>
18#include <linux/module.h>
19#include <linux/moduleparam.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/string.h>
23#include <linux/timer.h>
24#include <linux/delay.h>
25#include <linux/errno.h>
26#include <linux/slab.h>
27#include <linux/videodev.h>
28#include <linux/i2c.h>
29#include <linux/i2c-algo-bit.h>
30#include <linux/init.h>
31#include <linux/smp_lock.h>
32
33#include <media/audiochip.h>
5e453dc7 34#include <media/v4l2-common.h>
1da177e4 35
7c9b5048 36#include <media/i2c-addr.h>
1da177e4
LT		 37
38/* ---------------------------------------------------------------------- */
39/* insmod args */
40
41static int debug = 0; /* insmod parameter */
42module_param(debug, int, 0644);
43
44MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
45MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
46MODULE_LICENSE("GPL");
47
48#define UNSET (-1U)
18fc59e2 49
1da177e4
LT		 50/* ---------------------------------------------------------------------- */
51/* our structs */
52
53#define MAXREGS 64
54
55struct CHIPSTATE;
56typedef int (*getvalue)(int);
57typedef int (*checkit)(struct CHIPSTATE*);
58typedef int (*initialize)(struct CHIPSTATE*);
59typedef int (*getmode)(struct CHIPSTATE*);
60typedef void (*setmode)(struct CHIPSTATE*, int mode);
61typedef void (*checkmode)(struct CHIPSTATE*);
62
63/* i2c command */
64typedef struct AUDIOCMD {
65 int count; /* # of bytes to send */
66 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
67} audiocmd;
68
69/* chip description */
70struct CHIPDESC {
71 char *name; /* chip name */
72 int id; /* ID */
73 int addr_lo, addr_hi; /* i2c address range */
74 int registers; /* # of registers */
75
76 int *insmodopt;
77 checkit checkit;
78 initialize initialize;
79 int flags;
80#define CHIP_HAS_VOLUME 1
81#define CHIP_HAS_BASSTREBLE 2
82#define CHIP_HAS_INPUTSEL 4
83
84 /* various i2c command sequences */
85 audiocmd init;
86
87 /* which register has which value */
88 int leftreg,rightreg,treblereg,bassreg;
89
90 /* initialize with (defaults to 65535/65535/32768/32768 */
91 int leftinit,rightinit,trebleinit,bassinit;
92
93 /* functions to convert the values (v4l -> chip) */
94 getvalue volfunc,treblefunc,bassfunc;
95
96 /* get/set mode */
97 getmode getmode;
98 setmode setmode;
99
100 /* check / autoswitch audio after channel switches */
101 checkmode checkmode;
102
103 /* input switch register + values for v4l inputs */
104 int inputreg;
105 int inputmap[8];
106 int inputmute;
107 int inputmask;
108};
109static struct CHIPDESC chiplist[];
110
111/* current state of the chip */
112struct CHIPSTATE {
113 struct i2c_client c;
114
115 /* index into CHIPDESC array */
116 int type;
117
118 /* shadow register set */
119 audiocmd shadow;
120
121 /* current settings */
122 __u16 left,right,treble,bass,mode;
123 int prevmode;
8a854284 124 int radio;
1da177e4
LT		 125
126 /* thread */
127 pid_t tpid;
128 struct completion texit;
129 wait_queue_head_t wq;
130 struct timer_list wt;
131 int done;
132 int watch_stereo;
8a4b275f 133 int audmode;
1da177e4
LT		 134};
135
1da177e4
LT		 136/* ---------------------------------------------------------------------- */
137/* i2c addresses */
138
139static unsigned short normal_i2c[] = {
140 I2C_TDA8425 >> 1,
141 I2C_TEA6300 >> 1,
142 I2C_TEA6420 >> 1,
143 I2C_TDA9840 >> 1,
144 I2C_TDA985x_L >> 1,
145 I2C_TDA985x_H >> 1,
146 I2C_TDA9874 >> 1,
147 I2C_PIC16C54 >> 1,
148 I2C_CLIENT_END };
1da177e4
LT		 149I2C_CLIENT_INSMOD;
150
151static struct i2c_driver driver;
152static struct i2c_client client_template;
153
154
155/* ---------------------------------------------------------------------- */
156/* i2c I/O functions */
157
158static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
159{
160 unsigned char buffer[2];
161
162 if (-1 == subaddr) {
f167cb4e 163 v4l_dbg(1, debug, &chip->c, "%s: chip_write: 0x%x\n",
18fc59e2 164 chip->c.name, val);
1da177e4
LT		 165 chip->shadow.bytes[1] = val;
166 buffer[0] = val;
167 if (1 != i2c_master_send(&chip->c,buffer,1)) {
fac9e899 168 v4l_warn(&chip->c, "%s: I/O error (write 0x%x)\n",
18fc59e2 169 chip->c.name, val);
1da177e4
LT		 170 return -1;
171 }
172 } else {
f167cb4e 173 v4l_dbg(1, debug, &chip->c, "%s: chip_write: reg%d=0x%x\n",
fae91e72 174 chip->c.name, subaddr, val);
1da177e4
LT		 175 chip->shadow.bytes[subaddr+1] = val;
176 buffer[0] = subaddr;
177 buffer[1] = val;
178 if (2 != i2c_master_send(&chip->c,buffer,2)) {
fac9e899 179 v4l_warn(&chip->c, "%s: I/O error (write reg%d=0x%x)\n",
674434c6 180 chip->c.name, subaddr, val);
1da177e4
LT		 181 return -1;
182 }
183 }
184 return 0;
185}
186
187static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
188{
189 if (mask != 0) {
190 if (-1 == subaddr) {
191 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
192 } else {
193 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
194 }
195 }
196 return chip_write(chip, subaddr, val);
197}
198
199static int chip_read(struct CHIPSTATE *chip)
200{
201 unsigned char buffer;
202
203 if (1 != i2c_master_recv(&chip->c,&buffer,1)) {
fac9e899 204 v4l_warn(&chip->c, "%s: I/O error (read)\n",
18fc59e2 205 chip->c.name);
1da177e4
LT		 206 return -1;
207 }
f167cb4e 208 v4l_dbg(1, debug, &chip->c, "%s: chip_read: 0x%x\n",chip->c.name, buffer);
1da177e4
LT		 209 return buffer;
210}
211
212static int chip_read2(struct CHIPSTATE *chip, int subaddr)
213{
18fc59e2
MCC		 214 unsigned char write[1];
215 unsigned char read[1];
216 struct i2c_msg msgs[2] = {
217 { chip->c.addr, 0, 1, write },
218 { chip->c.addr, I2C_M_RD, 1, read }
219 };
220 write[0] = subaddr;
1da177e4
LT		 221
222 if (2 != i2c_transfer(chip->c.adapter,msgs,2)) {
fac9e899 223 v4l_warn(&chip->c, "%s: I/O error (read2)\n", chip->c.name);
1da177e4
LT		 224 return -1;
225 }
f167cb4e 226 v4l_dbg(1, debug, &chip->c, "%s: chip_read2: reg%d=0x%x\n",
674434c6 227 chip->c.name, subaddr,read[0]);
1da177e4
LT		 228 return read[0];
229}
230
231static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
232{
233 int i;
234
235 if (0 == cmd->count)
236 return 0;
237
238 /* update our shadow register set; print bytes if (debug > 0) */
f167cb4e 239 v4l_dbg(1, debug, &chip->c, "%s: chip_cmd(%s): reg=%d, data:",
674434c6 240 chip->c.name, name,cmd->bytes[0]);
1da177e4 241 for (i = 1; i < cmd->count; i++) {
18fc59e2
MCC		 242 if (debug)
243 printk(" 0x%x",cmd->bytes[i]);
1da177e4
LT		 244 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
245 }
18fc59e2
MCC		 246 if (debug)
247 printk("\n");
1da177e4
LT		 248
249 /* send data to the chip */
250 if (cmd->count != i2c_master_send(&chip->c,cmd->bytes,cmd->count)) {
fac9e899 251 v4l_warn(&chip->c, "%s: I/O error (%s)\n", chip->c.name, name);
1da177e4
LT		 252 return -1;
253 }
254 return 0;
255}
256
257/* ---------------------------------------------------------------------- */
258/* kernel thread for doing i2c stuff asyncronly
259 * right now it is used only to check the audio mode (mono/stereo/whatever)
260 * some time after switching to another TV channel, then turn on stereo
261 * if available, ...
262 */
263
264static void chip_thread_wake(unsigned long data)
265{
18fc59e2 266 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
1da177e4
LT		 267 wake_up_interruptible(&chip->wq);
268}
269
270static int chip_thread(void *data)
271{
272 DECLARE_WAITQUEUE(wait, current);
18fc59e2 273 struct CHIPSTATE *chip = data;
1da177e4
LT		 274 struct CHIPDESC *desc = chiplist + chip->type;
275
fae91e72 276 daemonize("%s", chip->c.name);
1da177e4 277 allow_signal(SIGTERM);
f167cb4e 278 v4l_dbg(1, debug, &chip->c, "%s: thread started\n", chip->c.name);
1da177e4
LT		 279
280 for (;;) {
281 add_wait_queue(&chip->wq, &wait);
282 if (!chip->done) {
283 set_current_state(TASK_INTERRUPTIBLE);
284 schedule();
285 }
286 remove_wait_queue(&chip->wq, &wait);
5e50e7a9 287 try_to_freeze();
1da177e4
LT		 288 if (chip->done || signal_pending(current))
289 break;
f167cb4e 290 v4l_dbg(1, debug, &chip->c, "%s: thread wakeup\n", chip->c.name);
1da177e4
LT		 291
292 /* don't do anything for radio or if mode != auto */
8a854284 293 if (chip->radio || chip->mode != 0)
1da177e4
LT		 294 continue;
295
296 /* have a look what's going on */
297 desc->checkmode(chip);
298
299 /* schedule next check */
300 mod_timer(&chip->wt, jiffies+2*HZ);
301 }
302
f167cb4e 303 v4l_dbg(1, debug, &chip->c, "%s: thread exiting\n", chip->c.name);
18fc59e2 304 complete_and_exit(&chip->texit, 0);
1da177e4
LT		 305 return 0;
306}
307
308static void generic_checkmode(struct CHIPSTATE *chip)
309{
310 struct CHIPDESC *desc = chiplist + chip->type;
311 int mode = desc->getmode(chip);
312
313 if (mode == chip->prevmode)
674434c6 314 return;
1da177e4 315
f167cb4e 316 v4l_dbg(1, debug, &chip->c, "%s: thread checkmode\n", chip->c.name);
1da177e4
LT		 317 chip->prevmode = mode;
318
319 if (mode & VIDEO_SOUND_STEREO)
320 desc->setmode(chip,VIDEO_SOUND_STEREO);
321 else if (mode & VIDEO_SOUND_LANG1)
322 desc->setmode(chip,VIDEO_SOUND_LANG1);
323 else if (mode & VIDEO_SOUND_LANG2)
324 desc->setmode(chip,VIDEO_SOUND_LANG2);
325 else
326 desc->setmode(chip,VIDEO_SOUND_MONO);
327}
328
329/* ---------------------------------------------------------------------- */
330/* audio chip descriptions - defines+functions for tda9840 */
331
332#define TDA9840_SW 0x00
333#define TDA9840_LVADJ 0x02
334#define TDA9840_STADJ 0x03
335#define TDA9840_TEST 0x04
336
337#define TDA9840_MONO 0x10
338#define TDA9840_STEREO 0x2a
339#define TDA9840_DUALA 0x12
340#define TDA9840_DUALB 0x1e
341#define TDA9840_DUALAB 0x1a
342#define TDA9840_DUALBA 0x16
343#define TDA9840_EXTERNAL 0x7a
344
345#define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
346#define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
347#define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
348
349#define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
350#define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
351
352static int tda9840_getmode(struct CHIPSTATE *chip)
353{
354 int val, mode;
355
356 val = chip_read(chip);
357 mode = VIDEO_SOUND_MONO;
358 if (val & TDA9840_DS_DUAL)
359 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
360 if (val & TDA9840_ST_STEREO)
361 mode |= VIDEO_SOUND_STEREO;
362
f167cb4e 363 v4l_dbg(1, debug, &chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 364 val, mode);
1da177e4
LT		 365 return mode;
366}
367
368static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
369{
370 int update = 1;
371 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
372
373 switch (mode) {
374 case VIDEO_SOUND_MONO:
375 t |= TDA9840_MONO;
376 break;
377 case VIDEO_SOUND_STEREO:
378 t |= TDA9840_STEREO;
379 break;
380 case VIDEO_SOUND_LANG1:
381 t |= TDA9840_DUALA;
382 break;
383 case VIDEO_SOUND_LANG2:
384 t |= TDA9840_DUALB;
385 break;
386 default:
387 update = 0;
388 }
389
390 if (update)
391 chip_write(chip, TDA9840_SW, t);
392}
393
94f9e56e
HV		 394static int tda9840_checkit(struct CHIPSTATE *chip)
395{
396 int rc;
397 rc = chip_read(chip);
398 /* lower 5 bits should be 0 */
399 return ((rc & 0x1f) == 0) ? 1 : 0;
400}
401
1da177e4
LT		 402/* ---------------------------------------------------------------------- */
403/* audio chip descriptions - defines+functions for tda985x */
404
405/* subaddresses for TDA9855 */
406#define TDA9855_VR 0x00 /* Volume, right */
407#define TDA9855_VL 0x01 /* Volume, left */
408#define TDA9855_BA 0x02 /* Bass */
409#define TDA9855_TR 0x03 /* Treble */
410#define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
411
412/* subaddresses for TDA9850 */
413#define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
414
415/* subaddesses for both chips */
416#define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
417#define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
418#define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
419#define TDA985x_A1 0x08 /* Alignment 1 for both chips */
420#define TDA985x_A2 0x09 /* Alignment 2 for both chips */
421#define TDA985x_A3 0x0a /* Alignment 3 for both chips */
422
423/* Masks for bits in TDA9855 subaddresses */
424/* 0x00 - VR in TDA9855 */
425/* 0x01 - VL in TDA9855 */
426/* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
427 * in 1dB steps - mute is 0x27 */
428
429
430/* 0x02 - BA in TDA9855 */
431/* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
432 * in .5dB steps - 0 is 0x0E */
433
434
435/* 0x03 - TR in TDA9855 */
436/* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
437 * in 3dB steps - 0 is 0x7 */
438
439/* Masks for bits in both chips' subaddresses */
440/* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
441/* Unique to TDA9855: */
442/* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
443 * in 3dB steps - mute is 0x0 */
444
445/* Unique to TDA9850: */
446/* lower 4 bits control stereo noise threshold, over which stereo turns off
447 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
448
449
450/* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
451/* Unique to TDA9855: */
452#define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
453#define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
454#define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
455#define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
456 /* Bits 0 to 3 select various combinations
4ac97914
MCC		 457 * of line in and line out, only the
458 * interesting ones are defined */
1da177e4
LT		 459#define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
460#define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
461
462/* Unique to TDA9850: */
463/* lower 4 bits contol SAP noise threshold, over which SAP turns off
464 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
465
466
467/* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
468/* Common to TDA9855 and TDA9850: */
469#define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
470#define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
471#define TDA985x_MONO 0 /* Forces Mono output */
472#define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
473
474/* Unique to TDA9855: */
475#define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
476#define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
477#define TDA9855_LINEAR 0 /* Linear Stereo */
478#define TDA9855_PSEUDO 1 /* Pseudo Stereo */
479#define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
480#define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
481#define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
482
483/* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
484/* Common to both TDA9855 and TDA9850: */
485/* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
486 * in .5dB steps - 0dB is 0x7 */
487
488/* 0x08, 0x09 - A1 and A2 (read/write) */
489/* Common to both TDA9855 and TDA9850: */
490/* lower 5 bites are wideband and spectral expander alignment
491 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
492#define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
493#define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
494#define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
495
496/* 0x0a - A3 */
497/* Common to both TDA9855 and TDA9850: */
498/* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
499 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
500#define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
501
502static int tda9855_volume(int val) { return val/0x2e8+0x27; }
503static int tda9855_bass(int val) { return val/0xccc+0x06; }
504static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
505
506static int tda985x_getmode(struct CHIPSTATE *chip)
507{
508 int mode;
509
510 mode = ((TDA985x_STP | TDA985x_SAPP) &
511 chip_read(chip)) >> 4;
512 /* Add mono mode regardless of SAP and stereo */
513 /* Allows forced mono */
514 return mode | VIDEO_SOUND_MONO;
515}
516
517static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
518{
519 int update = 1;
520 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
521
522 switch (mode) {
523 case VIDEO_SOUND_MONO:
524 c6 |= TDA985x_MONO;
525 break;
526 case VIDEO_SOUND_STEREO:
527 c6 |= TDA985x_STEREO;
528 break;
529 case VIDEO_SOUND_LANG1:
530 c6 |= TDA985x_SAP;
531 break;
532 default:
533 update = 0;
534 }
535 if (update)
536 chip_write(chip,TDA985x_C6,c6);
537}
538
539
540/* ---------------------------------------------------------------------- */
541/* audio chip descriptions - defines+functions for tda9873h */
542
543/* Subaddresses for TDA9873H */
544
545#define TDA9873_SW 0x00 /* Switching */
546#define TDA9873_AD 0x01 /* Adjust */
547#define TDA9873_PT 0x02 /* Port */
548
549/* Subaddress 0x00: Switching Data
550 * B7..B0:
551 *
552 * B1, B0: Input source selection
553 * 0, 0 internal
554 * 1, 0 external stereo
555 * 0, 1 external mono
556 */
557#define TDA9873_INP_MASK 3
558#define TDA9873_INTERNAL 0
559#define TDA9873_EXT_STEREO 2
560#define TDA9873_EXT_MONO 1
561
562/* B3, B2: output signal select
563 * B4 : transmission mode
564 * 0, 0, 1 Mono
565 * 1, 0, 0 Stereo
566 * 1, 1, 1 Stereo (reversed channel)
567 * 0, 0, 0 Dual AB
568 * 0, 0, 1 Dual AA
569 * 0, 1, 0 Dual BB
570 * 0, 1, 1 Dual BA
571 */
572
573#define TDA9873_TR_MASK (7 << 2)
574#define TDA9873_TR_MONO 4
575#define TDA9873_TR_STEREO 1 << 4
576#define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
577#define TDA9873_TR_DUALA 1 << 2
578#define TDA9873_TR_DUALB 1 << 3
579
580/* output level controls
581 * B5: output level switch (0 = reduced gain, 1 = normal gain)
582 * B6: mute (1 = muted)
583 * B7: auto-mute (1 = auto-mute enabled)
584 */
585
586#define TDA9873_GAIN_NORMAL 1 << 5
587#define TDA9873_MUTE 1 << 6
588#define TDA9873_AUTOMUTE 1 << 7
589
590/* Subaddress 0x01: Adjust/standard */
591
592/* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
593 * Recommended value is +0 dB
594 */
595
596#define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
597
598/* Bits C6..C4 control FM stantard
599 * C6, C5, C4
600 * 0, 0, 0 B/G (PAL FM)
601 * 0, 0, 1 M
602 * 0, 1, 0 D/K(1)
603 * 0, 1, 1 D/K(2)
604 * 1, 0, 0 D/K(3)
605 * 1, 0, 1 I
606 */
607#define TDA9873_BG 0
608#define TDA9873_M 1
609#define TDA9873_DK1 2
610#define TDA9873_DK2 3
611#define TDA9873_DK3 4
612#define TDA9873_I 5
613
614/* C7 controls identification response time (1=fast/0=normal)
615 */
616#define TDA9873_IDR_NORM 0
617#define TDA9873_IDR_FAST 1 << 7
618
619
620/* Subaddress 0x02: Port data */
621
622/* E1, E0 free programmable ports P1/P2
623 0, 0 both ports low
624 0, 1 P1 high
625 1, 0 P2 high
626 1, 1 both ports high
627*/
628
629#define TDA9873_PORTS 3
630
631/* E2: test port */
632#define TDA9873_TST_PORT 1 << 2
633
634/* E5..E3 control mono output channel (together with transmission mode bit B4)
635 *
636 * E5 E4 E3 B4 OUTM
637 * 0 0 0 0 mono
638 * 0 0 1 0 DUAL B
639 * 0 1 0 1 mono (from stereo decoder)
640 */
641#define TDA9873_MOUT_MONO 0
642#define TDA9873_MOUT_FMONO 0
643#define TDA9873_MOUT_DUALA 0
644#define TDA9873_MOUT_DUALB 1 << 3
645#define TDA9873_MOUT_ST 1 << 4
646#define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
647#define TDA9873_MOUT_EXTL 1 << 5
648#define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
649#define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
650#define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
651
652/* Status bits: (chip read) */
653#define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
654#define TDA9873_STEREO 2 /* Stereo sound is identified */
655#define TDA9873_DUAL 4 /* Dual sound is identified */
656
657static int tda9873_getmode(struct CHIPSTATE *chip)
658{
659 int val,mode;
660
661 val = chip_read(chip);
662 mode = VIDEO_SOUND_MONO;
663 if (val & TDA9873_STEREO)
664 mode |= VIDEO_SOUND_STEREO;
665 if (val & TDA9873_DUAL)
666 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
f167cb4e 667 v4l_dbg(1, debug, &chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 668 val, mode);
1da177e4
LT		 669 return mode;
670}
671
672static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
673{
674 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
675 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
676
677 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
f167cb4e 678 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): external input\n");
1da177e4
LT		 679 return;
680 }
681
f167cb4e
MCC		 682 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
683 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
1da177e4
LT		 684
685 switch (mode) {
686 case VIDEO_SOUND_MONO:
687 sw_data |= TDA9873_TR_MONO;
688 break;
689 case VIDEO_SOUND_STEREO:
690 sw_data |= TDA9873_TR_STEREO;
691 break;
692 case VIDEO_SOUND_LANG1:
693 sw_data |= TDA9873_TR_DUALA;
694 break;
695 case VIDEO_SOUND_LANG2:
696 sw_data |= TDA9873_TR_DUALB;
697 break;
698 default:
699 chip->mode = 0;
700 return;
701 }
702
703 chip_write(chip, TDA9873_SW, sw_data);
f167cb4e 704 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
1da177e4
LT		 705 mode, sw_data);
706}
707
708static int tda9873_checkit(struct CHIPSTATE *chip)
709{
710 int rc;
711
712 if (-1 == (rc = chip_read2(chip,254)))
713 return 0;
714 return (rc & ~0x1f) == 0x80;
715}
716
717
718/* ---------------------------------------------------------------------- */
719/* audio chip description - defines+functions for tda9874h and tda9874a */
720/* Dariusz Kowalewski <darekk@automex.pl> */
721
722/* Subaddresses for TDA9874H and TDA9874A (slave rx) */
723#define TDA9874A_AGCGR 0x00 /* AGC gain */
724#define TDA9874A_GCONR 0x01 /* general config */
725#define TDA9874A_MSR 0x02 /* monitor select */
726#define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
727#define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
728#define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
729#define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
730#define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
731#define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
732#define TDA9874A_DCR 0x09 /* demodulator config */
733#define TDA9874A_FMER 0x0a /* FM de-emphasis */
734#define TDA9874A_FMMR 0x0b /* FM dematrix */
735#define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
736#define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
737#define TDA9874A_NCONR 0x0e /* NICAM config */
738#define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
739#define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
740#define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
741#define TDA9874A_AMCONR 0x12 /* audio mute control */
742#define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
743#define TDA9874A_AOSR 0x14 /* analog output select */
744#define TDA9874A_DAICONR 0x15 /* digital audio interface config */
745#define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
746#define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
747#define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
748#define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
749
750/* Subaddresses for TDA9874H and TDA9874A (slave tx) */
751#define TDA9874A_DSR 0x00 /* device status */
752#define TDA9874A_NSR 0x01 /* NICAM status */
753#define TDA9874A_NECR 0x02 /* NICAM error count */
754#define TDA9874A_DR1 0x03 /* add. data LSB */
755#define TDA9874A_DR2 0x04 /* add. data MSB */
756#define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
757#define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
758#define TDA9874A_SIFLR 0x07 /* SIF level */
759#define TDA9874A_TR2 252 /* test reg. 2 */
760#define TDA9874A_TR1 253 /* test reg. 1 */
761#define TDA9874A_DIC 254 /* device id. code */
762#define TDA9874A_SIC 255 /* software id. code */
763
764
765static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
766static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
767static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
768static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
769static int tda9874a_dic = -1; /* device id. code */
770
771/* insmod options for tda9874a */
772static unsigned int tda9874a_SIF = UNSET;
773static unsigned int tda9874a_AMSEL = UNSET;
774static unsigned int tda9874a_STD = UNSET;
775module_param(tda9874a_SIF, int, 0444);
776module_param(tda9874a_AMSEL, int, 0444);
777module_param(tda9874a_STD, int, 0444);
778
779/*
780 * initialization table for tda9874 decoder:
781 * - carrier 1 freq. registers (3 bytes)
782 * - carrier 2 freq. registers (3 bytes)
783 * - demudulator config register
784 * - FM de-emphasis register (slow identification mode)
785 * Note: frequency registers must be written in single i2c transfer.
786 */
787static struct tda9874a_MODES {
788 char *name;
789 audiocmd cmd;
790} tda9874a_modelist[9] = {
791 { "A2, B/G",
792 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
793 { "A2, M (Korea)",
794 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
795 { "A2, D/K (1)",
796 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
797 { "A2, D/K (2)",
798 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
799 { "A2, D/K (3)",
800 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
801 { "NICAM, I",
802 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
803 { "NICAM, B/G",
804 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
805 { "NICAM, D/K", /* default */
806 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
807 { "NICAM, L",
808 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
809};
810
811static int tda9874a_setup(struct CHIPSTATE *chip)
812{
813 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
814 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
815 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
816 if(tda9874a_dic == 0x11) {
817 chip_write(chip, TDA9874A_FMMR, 0x80);
818 } else { /* dic == 0x07 */
819 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
820 chip_write(chip, TDA9874A_FMMR, 0x00);
821 }
822 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
823 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
824 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
825 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
826 /* Note: If signal quality is poor you may want to change NICAM */
827 /* error limit registers (NLELR and NUELR) to some greater values. */
828 /* Then the sound would remain stereo, but won't be so clear. */
829 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
830 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
831
832 if(tda9874a_dic == 0x11) {
833 chip_write(chip, TDA9874A_AMCONR, 0xf9);
834 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
835 chip_write(chip, TDA9874A_AOSR, 0x80);
836 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
837 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
838 } else { /* dic == 0x07 */
839 chip_write(chip, TDA9874A_AMCONR, 0xfb);
840 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
18fc59e2 841 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
1da177e4 842 }
f167cb4e 843 v4l_dbg(1, debug, &chip->c, "tda9874a_setup(): %s [0x%02X].\n",
1da177e4
LT		 844 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
845 return 1;
846}
847
848static int tda9874a_getmode(struct CHIPSTATE *chip)
849{
850 int dsr,nsr,mode;
851 int necr; /* just for debugging */
852
853 mode = VIDEO_SOUND_MONO;
854
855 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
856 return mode;
857 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
858 return mode;
859 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
860 return mode;
861
862 /* need to store dsr/nsr somewhere */
863 chip->shadow.bytes[MAXREGS-2] = dsr;
864 chip->shadow.bytes[MAXREGS-1] = nsr;
865
866 if(tda9874a_mode) {
867 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
868 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
869 * that sound has (temporarily) switched from NICAM to
870 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
871 * error count. So in fact there is no stereo in this case :-(
872 * But changing the mode to VIDEO_SOUND_MONO would switch
873 * external 4052 multiplexer in audio_hook().
874 */
1da177e4
LT		 875 if(nsr & 0x02) /* NSR.S/MB=1 */
876 mode |= VIDEO_SOUND_STEREO;
1da177e4
LT		 877 if(nsr & 0x01) /* NSR.D/SB=1 */
878 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
879 } else {
880 if(dsr & 0x02) /* DSR.IDSTE=1 */
881 mode |= VIDEO_SOUND_STEREO;
882 if(dsr & 0x04) /* DSR.IDDUA=1 */
883 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
884 }
885
f167cb4e 886 v4l_dbg(1, debug, &chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
1da177e4
LT		 887 dsr, nsr, necr, mode);
888 return mode;
889}
890
891static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
892{
893 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
894 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
895 if(tda9874a_mode) {
896 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
897 tda9874a_NCONR &= 0xfe; /* enable */
898 else
899 tda9874a_NCONR |= 0x01; /* disable */
900 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
901 }
902
903 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
904 * and has auto-select function for audio output (AOSR register).
905 * Old TDA9874H doesn't support these features.
906 * TDA9874A also has additional mono output pin (OUTM), which
907 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
908 */
909 if(tda9874a_dic == 0x11) {
910 int aosr = 0x80;
911 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
912
913 switch(mode) {
914 case VIDEO_SOUND_MONO:
915 case VIDEO_SOUND_STEREO:
916 break;
917 case VIDEO_SOUND_LANG1:
918 aosr = 0x80; /* auto-select, dual A/A */
919 mdacosr = (tda9874a_mode) ? 0x82:0x80;
920 break;
921 case VIDEO_SOUND_LANG2:
922 aosr = 0xa0; /* auto-select, dual B/B */
923 mdacosr = (tda9874a_mode) ? 0x83:0x81;
924 break;
925 default:
926 chip->mode = 0;
927 return;
928 }
929 chip_write(chip, TDA9874A_AOSR, aosr);
930 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
931
f167cb4e 932 v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1da177e4
LT		 933 mode, aosr, mdacosr);
934
935 } else { /* dic == 0x07 */
936 int fmmr,aosr;
937
938 switch(mode) {
939 case VIDEO_SOUND_MONO:
940 fmmr = 0x00; /* mono */
941 aosr = 0x10; /* A/A */
942 break;
943 case VIDEO_SOUND_STEREO:
944 if(tda9874a_mode) {
945 fmmr = 0x00;
946 aosr = 0x00; /* handled by NICAM auto-mute */
947 } else {
948 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
949 aosr = 0x00;
950 }
951 break;
952 case VIDEO_SOUND_LANG1:
953 fmmr = 0x02; /* dual */
954 aosr = 0x10; /* dual A/A */
955 break;
956 case VIDEO_SOUND_LANG2:
957 fmmr = 0x02; /* dual */
958 aosr = 0x20; /* dual B/B */
959 break;
960 default:
961 chip->mode = 0;
962 return;
963 }
964 chip_write(chip, TDA9874A_FMMR, fmmr);
965 chip_write(chip, TDA9874A_AOSR, aosr);
966
f167cb4e 967 v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1da177e4
LT		 968 mode, fmmr, aosr);
969 }
970}
971
972static int tda9874a_checkit(struct CHIPSTATE *chip)
973{
974 int dic,sic; /* device id. and software id. codes */
975
976 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
977 return 0;
978 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
979 return 0;
980
f167cb4e 981 v4l_dbg(1, debug, &chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1da177e4
LT		 982
983 if((dic == 0x11)||(dic == 0x07)) {
fac9e899 984 v4l_info(&chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
1da177e4
LT		 985 tda9874a_dic = dic; /* remember device id. */
986 return 1;
987 }
988 return 0; /* not found */
989}
990
991static int tda9874a_initialize(struct CHIPSTATE *chip)
992{
993 if (tda9874a_SIF > 2)
994 tda9874a_SIF = 1;
faf8b249 995 if (tda9874a_STD > 8)
1da177e4
LT		 996 tda9874a_STD = 0;
997 if(tda9874a_AMSEL > 1)
998 tda9874a_AMSEL = 0;
999
1000 if(tda9874a_SIF == 1)
1001 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1002 else
1003 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1004
1005 tda9874a_ESP = tda9874a_STD;
1006 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1007
1008 if(tda9874a_AMSEL == 0)
1009 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1010 else
1011 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1012
1013 tda9874a_setup(chip);
1014 return 0;
1015}
1016
1017
1018/* ---------------------------------------------------------------------- */
1019/* audio chip descriptions - defines+functions for tea6420 */
1020
1021#define TEA6300_VL 0x00 /* volume left */
1022#define TEA6300_VR 0x01 /* volume right */
1023#define TEA6300_BA 0x02 /* bass */
1024#define TEA6300_TR 0x03 /* treble */
1025#define TEA6300_FA 0x04 /* fader control */
1026#define TEA6300_S 0x05 /* switch register */
f2421ca3 1027 /* values for those registers: */
1da177e4
LT		 1028#define TEA6300_S_SA 0x01 /* stereo A input */
1029#define TEA6300_S_SB 0x02 /* stereo B */
1030#define TEA6300_S_SC 0x04 /* stereo C */
1031#define TEA6300_S_GMU 0x80 /* general mute */
1032
1033#define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1034#define TEA6320_FFR 0x01 /* fader front right (0-5) */
1035#define TEA6320_FFL 0x02 /* fader front left (0-5) */
1036#define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1037#define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1038#define TEA6320_BA 0x05 /* bass (0-4) */
1039#define TEA6320_TR 0x06 /* treble (0-4) */
1040#define TEA6320_S 0x07 /* switch register */
f2421ca3 1041 /* values for those registers: */
1da177e4
LT		 1042#define TEA6320_S_SA 0x07 /* stereo A input */
1043#define TEA6320_S_SB 0x06 /* stereo B */
1044#define TEA6320_S_SC 0x05 /* stereo C */
1045#define TEA6320_S_SD 0x04 /* stereo D */
1046#define TEA6320_S_GMU 0x80 /* general mute */
1047
1048#define TEA6420_S_SA 0x00 /* stereo A input */
1049#define TEA6420_S_SB 0x01 /* stereo B */
1050#define TEA6420_S_SC 0x02 /* stereo C */
1051#define TEA6420_S_SD 0x03 /* stereo D */
1052#define TEA6420_S_SE 0x04 /* stereo E */
1053#define TEA6420_S_GMU 0x05 /* general mute */
1054
1055static int tea6300_shift10(int val) { return val >> 10; }
1056static int tea6300_shift12(int val) { return val >> 12; }
1057
1058/* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1059/* 0x0c mirror those immediately higher) */
1060static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1061static int tea6320_shift11(int val) { return val >> 11; }
1062static int tea6320_initialize(struct CHIPSTATE * chip)
1063{
1064 chip_write(chip, TEA6320_FFR, 0x3f);
1065 chip_write(chip, TEA6320_FFL, 0x3f);
1066 chip_write(chip, TEA6320_FRR, 0x3f);
1067 chip_write(chip, TEA6320_FRL, 0x3f);
1068
1069 return 0;
1070}
1071
1072
1073/* ---------------------------------------------------------------------- */
1074/* audio chip descriptions - defines+functions for tda8425 */
1075
1076#define TDA8425_VL 0x00 /* volume left */
1077#define TDA8425_VR 0x01 /* volume right */
1078#define TDA8425_BA 0x02 /* bass */
1079#define TDA8425_TR 0x03 /* treble */
1080#define TDA8425_S1 0x08 /* switch functions */
f2421ca3 1081 /* values for those registers: */
1da177e4
LT		 1082#define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1083#define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1084#define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1085#define TDA8425_S1_MU 0x20 /* mute bit */
1086#define TDA8425_S1_STEREO 0x18 /* stereo bits */
1087#define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1088#define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1089#define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1090#define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1091#define TDA8425_S1_ML 0x06 /* language selector */
1092#define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1093#define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1094#define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1095#define TDA8425_S1_IS 0x01 /* channel selector */
1096
1097
1098static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1099static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1100
1101static int tda8425_initialize(struct CHIPSTATE *chip)
1102{
1103 struct CHIPDESC *desc = chiplist + chip->type;
1104 int inputmap[8] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1105 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF,
1106 /* off */ TDA8425_S1_OFF, /* on */ TDA8425_S1_CH2};
1107
c7a46533 1108 if (chip->c.adapter->id == I2C_HW_B_RIVA) {
1da177e4
LT		 1109 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1110 }
1111 return 0;
1112}
1113
1114static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1115{
1116 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1117
1118 if (mode & VIDEO_SOUND_LANG1) {
1119 s1 |= TDA8425_S1_ML_SOUND_A;
1120 s1 |= TDA8425_S1_STEREO_PSEUDO;
1121
1122 } else if (mode & VIDEO_SOUND_LANG2) {
1123 s1 |= TDA8425_S1_ML_SOUND_B;
1124 s1 |= TDA8425_S1_STEREO_PSEUDO;
1125
1126 } else {
1127 s1 |= TDA8425_S1_ML_STEREO;
1128
1129 if (mode & VIDEO_SOUND_MONO)
1130 s1 |= TDA8425_S1_STEREO_MONO;
1131 if (mode & VIDEO_SOUND_STEREO)
1132 s1 |= TDA8425_S1_STEREO_SPATIAL;
1133 }
1134 chip_write(chip,TDA8425_S1,s1);
1135}
1136
1137
1138/* ---------------------------------------------------------------------- */
1139/* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1140
1141/* the registers of 16C54, I2C sub address. */
1142#define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1143#define PIC16C54_REG_MISC 0x02
1144
1145/* bit definition of the RESET register, I2C data. */
1146#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
f2421ca3 1147 /* code of remote controller */
1da177e4
LT		 1148#define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1149#define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1150#define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1151#define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1152#define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1153#define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1154#define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1155
1156/* ---------------------------------------------------------------------- */
1157/* audio chip descriptions - defines+functions for TA8874Z */
1158
18fc59e2 1159/* write 1st byte */
1da177e4
LT		 1160#define TA8874Z_LED_STE 0x80
1161#define TA8874Z_LED_BIL 0x40
1162#define TA8874Z_LED_EXT 0x20
1163#define TA8874Z_MONO_SET 0x10
1164#define TA8874Z_MUTE 0x08
1165#define TA8874Z_F_MONO 0x04
1166#define TA8874Z_MODE_SUB 0x02
1167#define TA8874Z_MODE_MAIN 0x01
1168
18fc59e2
MCC		 1169/* write 2nd byte */
1170/*#define TA8874Z_TI 0x80 */ /* test mode */
1da177e4
LT		 1171#define TA8874Z_SEPARATION 0x3f
1172#define TA8874Z_SEPARATION_DEFAULT 0x10
1173
18fc59e2 1174/* read */
1da177e4
LT		 1175#define TA8874Z_B1 0x80
1176#define TA8874Z_B0 0x40
1177#define TA8874Z_CHAG_FLAG 0x20
1178
18fc59e2
MCC		 1179/*
1180 * B1 B0
1181 * mono L H
1182 * stereo L L
1183 * BIL H L
1184 */
1da177e4
LT		 1185static int ta8874z_getmode(struct CHIPSTATE *chip)
1186{
1187 int val, mode;
1188
1189 val = chip_read(chip);
1190 mode = VIDEO_SOUND_MONO;
1191 if (val & TA8874Z_B1){
1192 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
1193 }else if (!(val & TA8874Z_B0)){
1194 mode |= VIDEO_SOUND_STEREO;
1195 }
f167cb4e 1196 /* v4l_dbg(1, debug, &chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1da177e4
LT		 1197 return mode;
1198}
1199
1200static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1201static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1202static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1203static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1204
1205static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1206{
1207 int update = 1;
1208 audiocmd *t = NULL;
f167cb4e 1209 v4l_dbg(1, debug, &chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1da177e4
LT		 1210
1211 switch(mode){
1212 case VIDEO_SOUND_MONO:
1213 t = &ta8874z_mono;
1214 break;
1215 case VIDEO_SOUND_STEREO:
1216 t = &ta8874z_stereo;
1217 break;
1218 case VIDEO_SOUND_LANG1:
1219 t = &ta8874z_main;
1220 break;
1221 case VIDEO_SOUND_LANG2:
1222 t = &ta8874z_sub;
1223 break;
1224 default:
1225 update = 0;
1226 }
1227
1228 if(update)
1229 chip_cmd(chip, "TA8874Z", t);
1230}
1231
1232static int ta8874z_checkit(struct CHIPSTATE *chip)
1233{
1234 int rc;
1235 rc = chip_read(chip);
1236 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1237}
1238
1239/* ---------------------------------------------------------------------- */
1240/* audio chip descriptions - struct CHIPDESC */
1241
1242/* insmod options to enable/disable individual audio chips */
52c1da39
AB		 1243static int tda8425 = 1;
1244static int tda9840 = 1;
1245static int tda9850 = 1;
1246static int tda9855 = 1;
1247static int tda9873 = 1;
1248static int tda9874a = 1;
18fc59e2
MCC		 1249static int tea6300 = 0; /* address clash with msp34xx */
1250static int tea6320 = 0; /* address clash with msp34xx */
52c1da39
AB		 1251static int tea6420 = 1;
1252static int pic16c54 = 1;
18fc59e2 1253static int ta8874z = 0; /* address clash with tda9840 */
1da177e4
LT		 1254
1255module_param(tda8425, int, 0444);
1256module_param(tda9840, int, 0444);
1257module_param(tda9850, int, 0444);
1258module_param(tda9855, int, 0444);
1259module_param(tda9873, int, 0444);
1260module_param(tda9874a, int, 0444);
1261module_param(tea6300, int, 0444);
1262module_param(tea6320, int, 0444);
1263module_param(tea6420, int, 0444);
1264module_param(pic16c54, int, 0444);
1265module_param(ta8874z, int, 0444);
1266
1267static struct CHIPDESC chiplist[] = {
1268 {
1269 .name = "tda9840",
1270 .id = I2C_DRIVERID_TDA9840,
1271 .insmodopt = &tda9840,
1272 .addr_lo = I2C_TDA9840 >> 1,
1273 .addr_hi = I2C_TDA9840 >> 1,
1274 .registers = 5,
1275
94f9e56e 1276 .checkit = tda9840_checkit,
1da177e4
LT		 1277 .getmode = tda9840_getmode,
1278 .setmode = tda9840_setmode,
1279 .checkmode = generic_checkmode,
1280
4ac97914 1281 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1da177e4
LT		 1282 /* ,TDA9840_SW, TDA9840_MONO */} }
1283 },
1284 {
1285 .name = "tda9873h",
1286 .id = I2C_DRIVERID_TDA9873,
1287 .checkit = tda9873_checkit,
1288 .insmodopt = &tda9873,
1289 .addr_lo = I2C_TDA985x_L >> 1,
1290 .addr_hi = I2C_TDA985x_H >> 1,
1291 .registers = 3,
1292 .flags = CHIP_HAS_INPUTSEL,
1293
1294 .getmode = tda9873_getmode,
1295 .setmode = tda9873_setmode,
1296 .checkmode = generic_checkmode,
1297
1298 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1299 .inputreg = TDA9873_SW,
1300 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1301 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0, 0xc0},
1302 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1303
1304 },
1305 {
1306 .name = "tda9874h/a",
1307 .id = I2C_DRIVERID_TDA9874,
1308 .checkit = tda9874a_checkit,
1309 .initialize = tda9874a_initialize,
1310 .insmodopt = &tda9874a,
1311 .addr_lo = I2C_TDA9874 >> 1,
1312 .addr_hi = I2C_TDA9874 >> 1,
1313
1314 .getmode = tda9874a_getmode,
1315 .setmode = tda9874a_setmode,
1316 .checkmode = generic_checkmode,
1317 },
1318 {
1319 .name = "tda9850",
1320 .id = I2C_DRIVERID_TDA9850,
1321 .insmodopt = &tda9850,
1322 .addr_lo = I2C_TDA985x_L >> 1,
1323 .addr_hi = I2C_TDA985x_H >> 1,
1324 .registers = 11,
1325
1326 .getmode = tda985x_getmode,
1327 .setmode = tda985x_setmode,
1328
1329 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1330 },
1331 {
1332 .name = "tda9855",
1333 .id = I2C_DRIVERID_TDA9855,
1334 .insmodopt = &tda9855,
1335 .addr_lo = I2C_TDA985x_L >> 1,
1336 .addr_hi = I2C_TDA985x_H >> 1,
1337 .registers = 11,
1338 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1339
1340 .leftreg = TDA9855_VL,
1341 .rightreg = TDA9855_VR,
1342 .bassreg = TDA9855_BA,
1343 .treblereg = TDA9855_TR,
1344 .volfunc = tda9855_volume,
1345 .bassfunc = tda9855_bass,
1346 .treblefunc = tda9855_treble,
1347
1348 .getmode = tda985x_getmode,
1349 .setmode = tda985x_setmode,
1350
1351 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1352 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1353 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1354 0x07, 0x10, 0x10, 0x03 }}
1355 },
1356 {
1357 .name = "tea6300",
1358 .id = I2C_DRIVERID_TEA6300,
1359 .insmodopt = &tea6300,
1360 .addr_lo = I2C_TEA6300 >> 1,
1361 .addr_hi = I2C_TEA6300 >> 1,
1362 .registers = 6,
1363 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1364
1365 .leftreg = TEA6300_VR,
1366 .rightreg = TEA6300_VL,
1367 .bassreg = TEA6300_BA,
1368 .treblereg = TEA6300_TR,
1369 .volfunc = tea6300_shift10,
1370 .bassfunc = tea6300_shift12,
1371 .treblefunc = tea6300_shift12,
1372
1373 .inputreg = TEA6300_S,
1374 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1375 .inputmute = TEA6300_S_GMU,
1376 },
1377 {
1378 .name = "tea6320",
1379 .id = I2C_DRIVERID_TEA6300,
1380 .initialize = tea6320_initialize,
1381 .insmodopt = &tea6320,
1382 .addr_lo = I2C_TEA6300 >> 1,
1383 .addr_hi = I2C_TEA6300 >> 1,
1384 .registers = 8,
1385 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1386
1387 .leftreg = TEA6320_V,
1388 .rightreg = TEA6320_V,
1389 .bassreg = TEA6320_BA,
1390 .treblereg = TEA6320_TR,
1391 .volfunc = tea6320_volume,
1392 .bassfunc = tea6320_shift11,
1393 .treblefunc = tea6320_shift11,
1394
1395 .inputreg = TEA6320_S,
1396 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1397 .inputmute = TEA6300_S_GMU,
1398 },
1399 {
1400 .name = "tea6420",
1401 .id = I2C_DRIVERID_TEA6420,
1402 .insmodopt = &tea6420,
1403 .addr_lo = I2C_TEA6420 >> 1,
1404 .addr_hi = I2C_TEA6420 >> 1,
1405 .registers = 1,
1406 .flags = CHIP_HAS_INPUTSEL,
1407
1408 .inputreg = -1,
1409 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1410 .inputmute = TEA6300_S_GMU,
1411 },
1412 {
1413 .name = "tda8425",
1414 .id = I2C_DRIVERID_TDA8425,
1415 .insmodopt = &tda8425,
1416 .addr_lo = I2C_TDA8425 >> 1,
1417 .addr_hi = I2C_TDA8425 >> 1,
1418 .registers = 9,
1419 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1420
1421 .leftreg = TDA8425_VL,
1422 .rightreg = TDA8425_VR,
1423 .bassreg = TDA8425_BA,
1424 .treblereg = TDA8425_TR,
1425 .volfunc = tda8425_shift10,
1426 .bassfunc = tda8425_shift12,
1427 .treblefunc = tda8425_shift12,
1428
1429 .inputreg = TDA8425_S1,
1430 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1431 .inputmute = TDA8425_S1_OFF,
1432
1433 .setmode = tda8425_setmode,
1434 .initialize = tda8425_initialize,
1435 },
1436 {
1437 .name = "pic16c54 (PV951)",
e0ec29b7 1438 .id = I2C_DRIVERID_PIC16C54_PV9,
1da177e4
LT		 1439 .insmodopt = &pic16c54,
1440 .addr_lo = I2C_PIC16C54 >> 1,
1441 .addr_hi = I2C_PIC16C54>> 1,
1442 .registers = 2,
1443 .flags = CHIP_HAS_INPUTSEL,
1444
1445 .inputreg = PIC16C54_REG_MISC,
1446 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1447 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1448 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1449 PIC16C54_MISC_SND_MUTE,PIC16C54_MISC_SND_MUTE,
1450 PIC16C54_MISC_SND_NOTMUTE},
1451 .inputmute = PIC16C54_MISC_SND_MUTE,
1452 },
1453 {
1454 .name = "ta8874z",
1455 .id = -1,
18fc59e2 1456 /*.id = I2C_DRIVERID_TA8874Z, */
1da177e4
LT		 1457 .checkit = ta8874z_checkit,
1458 .insmodopt = &ta8874z,
1459 .addr_lo = I2C_TDA9840 >> 1,
1460 .addr_hi = I2C_TDA9840 >> 1,
1461 .registers = 2,
1462
1463 .getmode = ta8874z_getmode,
1464 .setmode = ta8874z_setmode,
1465 .checkmode = generic_checkmode,
1466
4ac97914 1467 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1da177e4
LT		 1468 },
1469 { .name = NULL } /* EOF */
1470};
1471
1472
1473/* ---------------------------------------------------------------------- */
1474/* i2c registration */
1475
1476static int chip_attach(struct i2c_adapter *adap, int addr, int kind)
1477{
1478 struct CHIPSTATE *chip;
1479 struct CHIPDESC *desc;
1480
7408187d 1481 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1da177e4
LT		 1482 if (!chip)
1483 return -ENOMEM;
1da177e4 1484 memcpy(&chip->c,&client_template,sizeof(struct i2c_client));
4ac97914
MCC		 1485 chip->c.adapter = adap;
1486 chip->c.addr = addr;
1da177e4
LT		 1487 i2c_set_clientdata(&chip->c, chip);
1488
1489 /* find description for the chip */
f167cb4e 1490 v4l_dbg(1, debug, &chip->c, "chip found @ 0x%x\n", addr<<1);
1da177e4
LT		 1491 for (desc = chiplist; desc->name != NULL; desc++) {
1492 if (0 == *(desc->insmodopt))
1493 continue;
1494 if (addr < desc->addr_lo ||
1495 addr > desc->addr_hi)
1496 continue;
1497 if (desc->checkit && !desc->checkit(chip))
1498 continue;
1499 break;
1500 }
1501 if (desc->name == NULL) {
f167cb4e 1502 v4l_dbg(1, debug, &chip->c, "no matching chip description found\n");
1da177e4
LT		 1503 return -EIO;
1504 }
fac9e899 1505 v4l_info(&chip->c, "%s found @ 0x%x (%s)\n", desc->name, addr<<1, adap->name);
afd1a0c9 1506 if (desc->flags) {
f167cb4e 1507 v4l_dbg(1, debug, &chip->c, "matches:%s%s%s.\n",
674434c6
MCC		 1508 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1509 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1510 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
afd1a0c9 1511 }
1da177e4
LT		 1512
1513 /* fill required data structures */
674434c6 1514 strcpy(chip->c.name, desc->name);
1da177e4
LT		 1515 chip->type = desc-chiplist;
1516 chip->shadow.count = desc->registers+1;
afd1a0c9 1517 chip->prevmode = -1;
8a4b275f 1518 chip->audmode = V4L2_TUNER_MODE_LANG1;
1da177e4
LT		 1519 /* register */
1520 i2c_attach_client(&chip->c);
1521
1522 /* initialization */
1523 if (desc->initialize != NULL)
1524 desc->initialize(chip);
1525 else
1526 chip_cmd(chip,"init",&desc->init);
1527
1528 if (desc->flags & CHIP_HAS_VOLUME) {
1529 chip->left = desc->leftinit ? desc->leftinit : 65535;
1530 chip->right = desc->rightinit ? desc->rightinit : 65535;
1531 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1532 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1533 }
1534 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1535 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1536 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1537 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1538 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1539 }
1540
1541 chip->tpid = -1;
1542 if (desc->checkmode) {
1543 /* start async thread */
1544 init_timer(&chip->wt);
1545 chip->wt.function = chip_thread_wake;
1546 chip->wt.data = (unsigned long)chip;
1547 init_waitqueue_head(&chip->wq);
1548 init_completion(&chip->texit);
1549 chip->tpid = kernel_thread(chip_thread,(void *)chip,0);
1550 if (chip->tpid < 0)
fac9e899 1551 v4l_warn(&chip->c, "%s: kernel_thread() failed\n",
fae91e72 1552 chip->c.name);
1da177e4
LT		 1553 wake_up_interruptible(&chip->wq);
1554 }
1555 return 0;
1556}
1557
1558static int chip_probe(struct i2c_adapter *adap)
1559{
1560 /* don't attach on saa7146 based cards,
1561 because dedicated drivers are used */
18fc59e2 1562 if ((adap->id == I2C_HW_SAA7146))
1da177e4 1563 return 0;
1da177e4
LT		 1564 if (adap->class & I2C_CLASS_TV_ANALOG)
1565 return i2c_probe(adap, &addr_data, chip_attach);
1da177e4
LT		 1566 return 0;
1567}
1568
1569static int chip_detach(struct i2c_client *client)
1570{
1571 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1572
1573 del_timer_sync(&chip->wt);
1574 if (chip->tpid >= 0) {
1575 /* shutdown async thread */
1576 chip->done = 1;
1577 wake_up_interruptible(&chip->wq);
1578 wait_for_completion(&chip->texit);
1579 }
1580
1581 i2c_detach_client(&chip->c);
1582 kfree(chip);
1583 return 0;
1584}
1585
1586/* ---------------------------------------------------------------------- */
1587/* video4linux interface */
1588
1589static int chip_command(struct i2c_client *client,
1590 unsigned int cmd, void *arg)
1591{
18fc59e2 1592 __u16 *sarg = arg;
1da177e4
LT		 1593 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1594 struct CHIPDESC *desc = chiplist + chip->type;
1595
f167cb4e 1596 v4l_dbg(1, debug, &chip->c, "%s: chip_command 0x%x\n", chip->c.name, cmd);
1da177e4
LT		 1597
1598 switch (cmd) {
1599 case AUDC_SET_INPUT:
1600 if (desc->flags & CHIP_HAS_INPUTSEL) {
1601 if (*sarg & 0x80)
1602 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1603 else
1604 chip_write_masked(chip,desc->inputreg,desc->inputmap[*sarg],desc->inputmask);
1605 }
1606 break;
1607
1608 case AUDC_SET_RADIO:
8a854284 1609 chip->radio = 1;
1da177e4
LT		 1610 chip->watch_stereo = 0;
1611 /* del_timer(&chip->wt); */
1612 break;
1613
1614 /* --- v4l ioctls --- */
1615 /* take care: bttv does userspace copying, we'll get a
674434c6 1616 kernel pointer here... */
1da177e4
LT		 1617 case VIDIOCGAUDIO:
1618 {
1619 struct video_audio *va = arg;
1620
1621 if (desc->flags & CHIP_HAS_VOLUME) {
1622 va->flags |= VIDEO_AUDIO_VOLUME;
1623 va->volume = max(chip->left,chip->right);
1624 if (va->volume)
1625 va->balance = (32768*min(chip->left,chip->right))/
1626 va->volume;
1627 else
1628 va->balance = 32768;
1629 }
1630 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1631 va->flags |= VIDEO_AUDIO_BASS | VIDEO_AUDIO_TREBLE;
1632 va->bass = chip->bass;
1633 va->treble = chip->treble;
1634 }
8a854284 1635 if (!chip->radio) {
1da177e4
LT		 1636 if (desc->getmode)
1637 va->mode = desc->getmode(chip);
1638 else
1639 va->mode = VIDEO_SOUND_MONO;
1640 }
1641 break;
1642 }
1643
1644 case VIDIOCSAUDIO:
1645 {
1646 struct video_audio *va = arg;
1647
1648 if (desc->flags & CHIP_HAS_VOLUME) {
1649 chip->left = (min(65536 - va->balance,32768) *
18fc59e2 1650 va->volume) / 32768;
1da177e4 1651 chip->right = (min(va->balance,(__u16)32768) *
18fc59e2 1652 va->volume) / 32768;
1da177e4
LT		 1653 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1654 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1655 }
1656 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1657 chip->bass = va->bass;
1658 chip->treble = va->treble;
1659 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1660 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1661 }
1662 if (desc->setmode && va->mode) {
1663 chip->watch_stereo = 0;
1664 /* del_timer(&chip->wt); */
1665 chip->mode = va->mode;
1666 desc->setmode(chip,va->mode);
1667 }
1668 break;
1669 }
8a854284
HV		 1670
1671 case VIDIOC_S_TUNER:
1da177e4 1672 {
8a854284
HV		 1673 struct v4l2_tuner *vt = arg;
1674 int mode = 0;
1da177e4 1675
8a4b275f
HV		 1676 if (chip->radio)
1677 break;
8a854284
HV		 1678 switch (vt->audmode) {
1679 case V4L2_TUNER_MODE_MONO:
1680 mode = VIDEO_SOUND_MONO;
1681 break;
1682 case V4L2_TUNER_MODE_STEREO:
1683 mode = VIDEO_SOUND_STEREO;
1684 break;
1685 case V4L2_TUNER_MODE_LANG1:
1686 mode = VIDEO_SOUND_LANG1;
1687 break;
1688 case V4L2_TUNER_MODE_LANG2:
1689 mode = VIDEO_SOUND_LANG2;
1690 break;
1691 default:
8a4b275f 1692 return -EINVAL;
8a854284 1693 }
8a4b275f 1694 chip->audmode = vt->audmode;
8a854284
HV		 1695
1696 if (desc->setmode && mode) {
1697 chip->watch_stereo = 0;
1698 /* del_timer(&chip->wt); */
1699 chip->mode = mode;
1700 desc->setmode(chip, mode);
1701 }
1da177e4
LT		 1702 break;
1703 }
8a854284
HV		 1704
1705 case VIDIOC_G_TUNER:
1da177e4 1706 {
8a854284
HV		 1707 struct v4l2_tuner *vt = arg;
1708 int mode = VIDEO_SOUND_MONO;
1709
d3900bc4
HV		 1710 if (chip->radio)
1711 break;
8a4b275f 1712 vt->audmode = chip->audmode;
8a854284
HV		 1713 vt->rxsubchans = 0;
1714 vt->capability = V4L2_TUNER_CAP_STEREO |
1715 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
8a854284
HV		 1716
1717 if (desc->getmode)
1718 mode = desc->getmode(chip);
1719
1720 if (mode & VIDEO_SOUND_MONO)
1721 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1722 if (mode & VIDEO_SOUND_STEREO)
1723 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
8a4b275f
HV		 1724 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1725 When this module is converted fully to v4l2, then this
1726 should change for those chips that can detect SAP. */
8a854284 1727 if (mode & VIDEO_SOUND_LANG1)
8a4b275f
HV		 1728 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1729 V4L2_TUNER_SUB_LANG2;
8a854284
HV		 1730 break;
1731 }
1732
1733 case VIDIOCSCHAN:
1734 case VIDIOC_S_STD:
1735 chip->radio = 0;
1736 break;
1737
1738 case VIDIOCSFREQ:
1739 case VIDIOC_S_FREQUENCY:
18fc59e2 1740 chip->mode = 0; /* automatic */
1da177e4
LT		 1741 if (desc->checkmode) {
1742 desc->setmode(chip,VIDEO_SOUND_MONO);
18fc59e2
MCC		 1743 if (chip->prevmode != VIDEO_SOUND_MONO)
1744 chip->prevmode = -1; /* reset previous mode */
1da177e4
LT		 1745 mod_timer(&chip->wt, jiffies+2*HZ);
1746 /* the thread will call checkmode() later */
1747 }
8a854284 1748 break;
1da177e4
LT		 1749 }
1750 return 0;
1751}
1752
1da177e4 1753static struct i2c_driver driver = {
604f28e2 1754 .driver = {
cab462f7 1755 .name = "tvaudio",
604f28e2 1756 },
18fc59e2 1757 .id = I2C_DRIVERID_TVAUDIO,
18fc59e2
MCC		 1758 .attach_adapter = chip_probe,
1759 .detach_client = chip_detach,
1760 .command = chip_command,
1da177e4
LT		 1761};
1762
1763static struct i2c_client client_template =
1764{
fae91e72 1765 .name = "(unset)",
18fc59e2 1766 .driver = &driver,
1da177e4
LT		 1767};
1768
1769static int __init audiochip_init_module(void)
1770{
1771 struct CHIPDESC *desc;
18fc59e2
MCC		 1772
1773 if (debug) {
1774 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1775 printk(KERN_INFO "tvaudio: known chips: ");
1776 for (desc = chiplist; desc->name != NULL; desc++)
1777 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1778 printk("\n");
1779 }
1da177e4
LT		 1780
1781 return i2c_add_driver(&driver);
1782}
1783
1784static void __exit audiochip_cleanup_module(void)
1785{
1786 i2c_del_driver(&driver);
1787}
1788
1789module_init(audiochip_init_module);
1790module_exit(audiochip_cleanup_module);
1791
1792/*
1793 * Local variables:
1794 * c-basic-offset: 8
1795 * End:
1796 */
Linux 6.x block layer and io_uring tree(s)