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V4L/DVB: tea6415c: remove obsolete v4l2-i2c-drv.h header
[linux-block.git] / drivers / media / video / tvaudio.c
CommitLineData
1da177e4 1/*
b4ab114c 2 * Driver for simple i2c audio chips.
1da177e4
LT		 3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
b4ab114c
MCC		 10 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
11 * - Some cleanups, code fixes, etc
12 * - Convert it to V4L2 API
13 *
1da177e4
LT		 14 * This code is placed under the terms of the GNU General Public License
15 *
16 * OPTIONS:
17 * debug - set to 1 if you'd like to see debug messages
18 *
19 */
20
1da177e4 21#include <linux/module.h>
1da177e4
LT		 22#include <linux/kernel.h>
23#include <linux/sched.h>
24#include <linux/string.h>
25#include <linux/timer.h>
26#include <linux/delay.h>
27#include <linux/errno.h>
28#include <linux/slab.h>
7f6adeaf 29#include <linux/videodev2.h>
1da177e4 30#include <linux/i2c.h>
1da177e4 31#include <linux/init.h>
bc282879 32#include <linux/kthread.h>
7dfb7103 33#include <linux/freezer.h>
1da177e4 34
8bf2f8e7 35#include <media/tvaudio.h>
64f70e7e 36#include <media/v4l2-device.h>
74cab31c 37#include <media/v4l2-chip-ident.h>
647da444 38#include <media/v4l2-i2c-drv.h>
1da177e4 39
7c9b5048 40#include <media/i2c-addr.h>
1da177e4
LT		 41
42/* ---------------------------------------------------------------------- */
43/* insmod args */
44
ff699e6b 45static int debug; /* insmod parameter */
1da177e4
LT		 46module_param(debug, int, 0644);
47
48MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
49MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
50MODULE_LICENSE("GPL");
51
52#define UNSET (-1U)
18fc59e2 53
1da177e4
LT		 54/* ---------------------------------------------------------------------- */
55/* our structs */
56
4c6c390e 57#define MAXREGS 256
1da177e4
LT		 58
59struct CHIPSTATE;
60typedef int (*getvalue)(int);
61typedef int (*checkit)(struct CHIPSTATE*);
62typedef int (*initialize)(struct CHIPSTATE*);
63typedef int (*getmode)(struct CHIPSTATE*);
64typedef void (*setmode)(struct CHIPSTATE*, int mode);
1da177e4
LT		 65
66/* i2c command */
67typedef struct AUDIOCMD {
68 int count; /* # of bytes to send */
69 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
70} audiocmd;
71
72/* chip description */
73struct CHIPDESC {
74 char *name; /* chip name */
1da177e4
LT		 75 int addr_lo, addr_hi; /* i2c address range */
76 int registers; /* # of registers */
77
78 int *insmodopt;
79 checkit checkit;
80 initialize initialize;
81 int flags;
82#define CHIP_HAS_VOLUME 1
83#define CHIP_HAS_BASSTREBLE 2
84#define CHIP_HAS_INPUTSEL 4
dd03e970 85#define CHIP_NEED_CHECKMODE 8
1da177e4
LT		 86
87 /* various i2c command sequences */
88 audiocmd init;
89
90 /* which register has which value */
91 int leftreg,rightreg,treblereg,bassreg;
92
93 /* initialize with (defaults to 65535/65535/32768/32768 */
94 int leftinit,rightinit,trebleinit,bassinit;
95
96 /* functions to convert the values (v4l -> chip) */
97 getvalue volfunc,treblefunc,bassfunc;
98
99 /* get/set mode */
100 getmode getmode;
101 setmode setmode;
102
1da177e4
LT		 103 /* input switch register + values for v4l inputs */
104 int inputreg;
8bf2f8e7 105 int inputmap[4];
1da177e4
LT		 106 int inputmute;
107 int inputmask;
108};
1da177e4
LT		 109
110/* current state of the chip */
111struct CHIPSTATE {
64f70e7e 112 struct v4l2_subdev sd;
1da177e4 113
81cb5c4f
MCC		 114 /* chip-specific description - should point to
115 an entry at CHIPDESC table */
116 struct CHIPDESC *desc;
1da177e4
LT		 117
118 /* shadow register set */
119 audiocmd shadow;
120
121 /* current settings */
8bf2f8e7 122 __u16 left,right,treble,bass,muted,mode;
1da177e4 123 int prevmode;
8a854284 124 int radio;
8bf2f8e7 125 int input;
1da177e4
LT		 126
127 /* thread */
bc282879 128 struct task_struct *thread;
1da177e4 129 struct timer_list wt;
1da177e4 130 int watch_stereo;
8a4b275f 131 int audmode;
1da177e4
LT		 132};
133
64f70e7e
HV		 134static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
135{
136 return container_of(sd, struct CHIPSTATE, sd);
137}
138
1da177e4 139
1da177e4
LT		 140/* ---------------------------------------------------------------------- */
141/* i2c I/O functions */
142
143static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
144{
64f70e7e
HV		 145 struct v4l2_subdev *sd = &chip->sd;
146 struct i2c_client *c = v4l2_get_subdevdata(sd);
1da177e4
LT		 147 unsigned char buffer[2];
148
49426437 149 if (subaddr < 0) {
64f70e7e 150 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
1da177e4
LT		 151 chip->shadow.bytes[1] = val;
152 buffer[0] = val;
64f70e7e
HV		 153 if (1 != i2c_master_send(c, buffer, 1)) {
154 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
1da177e4
LT		 155 return -1;
156 }
157 } else {
49426437 158 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
64f70e7e 159 v4l2_info(sd,
49426437
MCC		 160 "Tried to access a non-existent register: %d\n",
161 subaddr);
162 return -EINVAL;
163 }
164
64f70e7e
HV		 165 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
166 subaddr, val);
1da177e4
LT		 167 chip->shadow.bytes[subaddr+1] = val;
168 buffer[0] = subaddr;
169 buffer[1] = val;
64f70e7e
HV		 170 if (2 != i2c_master_send(c, buffer, 2)) {
171 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
172 subaddr, val);
1da177e4
LT		 173 return -1;
174 }
175 }
176 return 0;
177}
178
49426437
MCC		 179static int chip_write_masked(struct CHIPSTATE *chip,
180 int subaddr, int val, int mask)
1da177e4 181{
64f70e7e
HV		 182 struct v4l2_subdev *sd = &chip->sd;
183
1da177e4 184 if (mask != 0) {
49426437 185 if (subaddr < 0) {
1da177e4
LT		 186 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
187 } else {
49426437 188 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
64f70e7e 189 v4l2_info(sd,
49426437
MCC		 190 "Tried to access a non-existent register: %d\n",
191 subaddr);
192 return -EINVAL;
193 }
194
1da177e4
LT		 195 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
196 }
197 }
198 return chip_write(chip, subaddr, val);
199}
200
201static int chip_read(struct CHIPSTATE *chip)
202{
64f70e7e
HV		 203 struct v4l2_subdev *sd = &chip->sd;
204 struct i2c_client *c = v4l2_get_subdevdata(sd);
1da177e4
LT		 205 unsigned char buffer;
206
64f70e7e
HV		 207 if (1 != i2c_master_recv(c, &buffer, 1)) {
208 v4l2_warn(sd, "I/O error (read)\n");
1da177e4
LT		 209 return -1;
210 }
64f70e7e 211 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
1da177e4
LT		 212 return buffer;
213}
214
215static int chip_read2(struct CHIPSTATE *chip, int subaddr)
216{
64f70e7e
HV		 217 struct v4l2_subdev *sd = &chip->sd;
218 struct i2c_client *c = v4l2_get_subdevdata(sd);
18fc59e2
MCC		 219 unsigned char write[1];
220 unsigned char read[1];
221 struct i2c_msg msgs[2] = {
64f70e7e
HV		 222 { c->addr, 0, 1, write },
223 { c->addr, I2C_M_RD, 1, read }
18fc59e2 224 };
64f70e7e 225
18fc59e2 226 write[0] = subaddr;
1da177e4 227
64f70e7e
HV		 228 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
229 v4l2_warn(sd, "I/O error (read2)\n");
1da177e4
LT		 230 return -1;
231 }
64f70e7e
HV		 232 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
233 subaddr, read[0]);
1da177e4
LT		 234 return read[0];
235}
236
237static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
238{
64f70e7e
HV		 239 struct v4l2_subdev *sd = &chip->sd;
240 struct i2c_client *c = v4l2_get_subdevdata(sd);
1da177e4
LT		 241 int i;
242
243 if (0 == cmd->count)
244 return 0;
245
49426437 246 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
64f70e7e 247 v4l2_info(sd,
49426437
MCC		 248 "Tried to access a non-existent register range: %d to %d\n",
249 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
250 return -EINVAL;
251 }
252
253 /* FIXME: it seems that the shadow bytes are wrong bellow !*/
254
1da177e4 255 /* update our shadow register set; print bytes if (debug > 0) */
64f70e7e
HV		 256 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
257 name, cmd->bytes[0]);
1da177e4 258 for (i = 1; i < cmd->count; i++) {
18fc59e2 259 if (debug)
64f70e7e 260 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
1da177e4
LT		 261 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
262 }
18fc59e2 263 if (debug)
64f70e7e 264 printk(KERN_CONT "\n");
1da177e4
LT		 265
266 /* send data to the chip */
64f70e7e
HV		 267 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
268 v4l2_warn(sd, "I/O error (%s)\n", name);
1da177e4
LT		 269 return -1;
270 }
271 return 0;
272}
273
274/* ---------------------------------------------------------------------- */
275/* kernel thread for doing i2c stuff asyncronly
276 * right now it is used only to check the audio mode (mono/stereo/whatever)
277 * some time after switching to another TV channel, then turn on stereo
278 * if available, ...
279 */
280
281static void chip_thread_wake(unsigned long data)
282{
18fc59e2 283 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
bc282879 284 wake_up_process(chip->thread);
1da177e4
LT		 285}
286
287static int chip_thread(void *data)
288{
18fc59e2 289 struct CHIPSTATE *chip = data;
81cb5c4f 290 struct CHIPDESC *desc = chip->desc;
64f70e7e 291 struct v4l2_subdev *sd = &chip->sd;
dd03e970 292 int mode;
1da177e4 293
64f70e7e 294 v4l2_dbg(1, debug, sd, "thread started\n");
83144186 295 set_freezable();
1da177e4 296 for (;;) {
bc282879
CLG		 297 set_current_state(TASK_INTERRUPTIBLE);
298 if (!kthread_should_stop())
1da177e4 299 schedule();
bc282879 300 set_current_state(TASK_RUNNING);
5e50e7a9 301 try_to_freeze();
bc282879 302 if (kthread_should_stop())
1da177e4 303 break;
64f70e7e 304 v4l2_dbg(1, debug, sd, "thread wakeup\n");
1da177e4
LT		 305
306 /* don't do anything for radio or if mode != auto */
8a854284 307 if (chip->radio || chip->mode != 0)
1da177e4
LT		 308 continue;
309
310 /* have a look what's going on */
dd03e970
MCC		 311 mode = desc->getmode(chip);
312 if (mode == chip->prevmode)
313 continue;
314
315 /* chip detected a new audio mode - set it */
64f70e7e 316 v4l2_dbg(1, debug, sd, "thread checkmode\n");
dd03e970
MCC		 317
318 chip->prevmode = mode;
319
320 if (mode & V4L2_TUNER_MODE_STEREO)
321 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
322 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
323 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
324 else if (mode & V4L2_TUNER_MODE_LANG1)
325 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
326 else if (mode & V4L2_TUNER_MODE_LANG2)
327 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
328 else
329 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1da177e4
LT		 330
331 /* schedule next check */
09df5cbe 332 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1da177e4
LT		 333 }
334
64f70e7e 335 v4l2_dbg(1, debug, sd, "thread exiting\n");
1da177e4
LT		 336 return 0;
337}
338
1da177e4
LT		 339/* ---------------------------------------------------------------------- */
340/* audio chip descriptions - defines+functions for tda9840 */
341
342#define TDA9840_SW 0x00
343#define TDA9840_LVADJ 0x02
344#define TDA9840_STADJ 0x03
345#define TDA9840_TEST 0x04
346
347#define TDA9840_MONO 0x10
348#define TDA9840_STEREO 0x2a
349#define TDA9840_DUALA 0x12
350#define TDA9840_DUALB 0x1e
351#define TDA9840_DUALAB 0x1a
352#define TDA9840_DUALBA 0x16
353#define TDA9840_EXTERNAL 0x7a
354
355#define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
356#define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
357#define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
358
359#define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
360#define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
361
362static int tda9840_getmode(struct CHIPSTATE *chip)
363{
64f70e7e 364 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 365 int val, mode;
366
367 val = chip_read(chip);
dc3d75da 368 mode = V4L2_TUNER_MODE_MONO;
1da177e4 369 if (val & TDA9840_DS_DUAL)
dc3d75da 370 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4 371 if (val & TDA9840_ST_STEREO)
dc3d75da 372 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 373
64f70e7e 374 v4l2_dbg(1, debug, sd, "tda9840_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 375 val, mode);
1da177e4
LT		 376 return mode;
377}
378
379static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
380{
381 int update = 1;
382 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
383
384 switch (mode) {
dc3d75da 385 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 386 t |= TDA9840_MONO;
387 break;
dc3d75da 388 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 389 t |= TDA9840_STEREO;
390 break;
dc3d75da 391 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 392 t |= TDA9840_DUALA;
393 break;
dc3d75da 394 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 395 t |= TDA9840_DUALB;
396 break;
397 default:
398 update = 0;
399 }
400
401 if (update)
402 chip_write(chip, TDA9840_SW, t);
403}
404
94f9e56e
HV		 405static int tda9840_checkit(struct CHIPSTATE *chip)
406{
407 int rc;
408 rc = chip_read(chip);
409 /* lower 5 bits should be 0 */
410 return ((rc & 0x1f) == 0) ? 1 : 0;
411}
412
1da177e4
LT		 413/* ---------------------------------------------------------------------- */
414/* audio chip descriptions - defines+functions for tda985x */
415
416/* subaddresses for TDA9855 */
417#define TDA9855_VR 0x00 /* Volume, right */
418#define TDA9855_VL 0x01 /* Volume, left */
419#define TDA9855_BA 0x02 /* Bass */
420#define TDA9855_TR 0x03 /* Treble */
421#define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
422
423/* subaddresses for TDA9850 */
424#define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
425
426/* subaddesses for both chips */
427#define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
428#define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
429#define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
430#define TDA985x_A1 0x08 /* Alignment 1 for both chips */
431#define TDA985x_A2 0x09 /* Alignment 2 for both chips */
432#define TDA985x_A3 0x0a /* Alignment 3 for both chips */
433
434/* Masks for bits in TDA9855 subaddresses */
435/* 0x00 - VR in TDA9855 */
436/* 0x01 - VL in TDA9855 */
437/* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
438 * in 1dB steps - mute is 0x27 */
439
440
441/* 0x02 - BA in TDA9855 */
442/* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
443 * in .5dB steps - 0 is 0x0E */
444
445
446/* 0x03 - TR in TDA9855 */
447/* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
448 * in 3dB steps - 0 is 0x7 */
449
450/* Masks for bits in both chips' subaddresses */
451/* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
452/* Unique to TDA9855: */
453/* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
454 * in 3dB steps - mute is 0x0 */
455
456/* Unique to TDA9850: */
457/* lower 4 bits control stereo noise threshold, over which stereo turns off
458 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
459
460
461/* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
462/* Unique to TDA9855: */
463#define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
464#define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
465#define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
466#define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
467 /* Bits 0 to 3 select various combinations
4ac97914
MCC		 468 * of line in and line out, only the
469 * interesting ones are defined */
1da177e4
LT		 470#define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
471#define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
472
473/* Unique to TDA9850: */
474/* lower 4 bits contol SAP noise threshold, over which SAP turns off
475 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
476
477
478/* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
479/* Common to TDA9855 and TDA9850: */
480#define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
481#define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
482#define TDA985x_MONO 0 /* Forces Mono output */
483#define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
484
485/* Unique to TDA9855: */
486#define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
487#define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
488#define TDA9855_LINEAR 0 /* Linear Stereo */
489#define TDA9855_PSEUDO 1 /* Pseudo Stereo */
490#define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
491#define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
492#define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
493
494/* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
495/* Common to both TDA9855 and TDA9850: */
496/* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
497 * in .5dB steps - 0dB is 0x7 */
498
499/* 0x08, 0x09 - A1 and A2 (read/write) */
500/* Common to both TDA9855 and TDA9850: */
501/* lower 5 bites are wideband and spectral expander alignment
502 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
503#define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
504#define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
505#define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
506
507/* 0x0a - A3 */
508/* Common to both TDA9855 and TDA9850: */
509/* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
510 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
511#define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
512
513static int tda9855_volume(int val) { return val/0x2e8+0x27; }
514static int tda9855_bass(int val) { return val/0xccc+0x06; }
515static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
516
517static int tda985x_getmode(struct CHIPSTATE *chip)
518{
519 int mode;
520
521 mode = ((TDA985x_STP | TDA985x_SAPP) &
522 chip_read(chip)) >> 4;
523 /* Add mono mode regardless of SAP and stereo */
524 /* Allows forced mono */
dc3d75da 525 return mode | V4L2_TUNER_MODE_MONO;
1da177e4
LT		 526}
527
528static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
529{
530 int update = 1;
531 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
532
533 switch (mode) {
dc3d75da 534 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 535 c6 |= TDA985x_MONO;
536 break;
dc3d75da 537 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 538 c6 |= TDA985x_STEREO;
539 break;
dc3d75da 540 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 541 c6 |= TDA985x_SAP;
542 break;
543 default:
544 update = 0;
545 }
546 if (update)
547 chip_write(chip,TDA985x_C6,c6);
548}
549
550
551/* ---------------------------------------------------------------------- */
552/* audio chip descriptions - defines+functions for tda9873h */
553
554/* Subaddresses for TDA9873H */
555
556#define TDA9873_SW 0x00 /* Switching */
557#define TDA9873_AD 0x01 /* Adjust */
558#define TDA9873_PT 0x02 /* Port */
559
560/* Subaddress 0x00: Switching Data
561 * B7..B0:
562 *
563 * B1, B0: Input source selection
564 * 0, 0 internal
565 * 1, 0 external stereo
566 * 0, 1 external mono
567 */
568#define TDA9873_INP_MASK 3
569#define TDA9873_INTERNAL 0
570#define TDA9873_EXT_STEREO 2
571#define TDA9873_EXT_MONO 1
572
573/* B3, B2: output signal select
574 * B4 : transmission mode
575 * 0, 0, 1 Mono
576 * 1, 0, 0 Stereo
577 * 1, 1, 1 Stereo (reversed channel)
578 * 0, 0, 0 Dual AB
579 * 0, 0, 1 Dual AA
580 * 0, 1, 0 Dual BB
581 * 0, 1, 1 Dual BA
582 */
583
584#define TDA9873_TR_MASK (7 << 2)
585#define TDA9873_TR_MONO 4
586#define TDA9873_TR_STEREO 1 << 4
587#define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
588#define TDA9873_TR_DUALA 1 << 2
589#define TDA9873_TR_DUALB 1 << 3
590
591/* output level controls
592 * B5: output level switch (0 = reduced gain, 1 = normal gain)
593 * B6: mute (1 = muted)
594 * B7: auto-mute (1 = auto-mute enabled)
595 */
596
597#define TDA9873_GAIN_NORMAL 1 << 5
598#define TDA9873_MUTE 1 << 6
599#define TDA9873_AUTOMUTE 1 << 7
600
601/* Subaddress 0x01: Adjust/standard */
602
603/* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
604 * Recommended value is +0 dB
605 */
606
607#define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
608
609/* Bits C6..C4 control FM stantard
610 * C6, C5, C4
611 * 0, 0, 0 B/G (PAL FM)
612 * 0, 0, 1 M
613 * 0, 1, 0 D/K(1)
614 * 0, 1, 1 D/K(2)
615 * 1, 0, 0 D/K(3)
616 * 1, 0, 1 I
617 */
618#define TDA9873_BG 0
619#define TDA9873_M 1
620#define TDA9873_DK1 2
621#define TDA9873_DK2 3
622#define TDA9873_DK3 4
623#define TDA9873_I 5
624
625/* C7 controls identification response time (1=fast/0=normal)
626 */
627#define TDA9873_IDR_NORM 0
628#define TDA9873_IDR_FAST 1 << 7
629
630
631/* Subaddress 0x02: Port data */
632
633/* E1, E0 free programmable ports P1/P2
634 0, 0 both ports low
635 0, 1 P1 high
636 1, 0 P2 high
637 1, 1 both ports high
638*/
639
640#define TDA9873_PORTS 3
641
642/* E2: test port */
643#define TDA9873_TST_PORT 1 << 2
644
645/* E5..E3 control mono output channel (together with transmission mode bit B4)
646 *
647 * E5 E4 E3 B4 OUTM
648 * 0 0 0 0 mono
649 * 0 0 1 0 DUAL B
650 * 0 1 0 1 mono (from stereo decoder)
651 */
652#define TDA9873_MOUT_MONO 0
653#define TDA9873_MOUT_FMONO 0
654#define TDA9873_MOUT_DUALA 0
655#define TDA9873_MOUT_DUALB 1 << 3
656#define TDA9873_MOUT_ST 1 << 4
657#define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
658#define TDA9873_MOUT_EXTL 1 << 5
659#define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
660#define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
661#define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
662
663/* Status bits: (chip read) */
664#define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
665#define TDA9873_STEREO 2 /* Stereo sound is identified */
666#define TDA9873_DUAL 4 /* Dual sound is identified */
667
668static int tda9873_getmode(struct CHIPSTATE *chip)
669{
64f70e7e 670 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 671 int val,mode;
672
673 val = chip_read(chip);
dc3d75da 674 mode = V4L2_TUNER_MODE_MONO;
1da177e4 675 if (val & TDA9873_STEREO)
dc3d75da 676 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 677 if (val & TDA9873_DUAL)
dc3d75da 678 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
64f70e7e 679 v4l2_dbg(1, debug, sd, "tda9873_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 680 val, mode);
1da177e4
LT		 681 return mode;
682}
683
684static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
685{
64f70e7e 686 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 687 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
688 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
689
690 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
64f70e7e 691 v4l2_dbg(1, debug, sd, "tda9873_setmode(): external input\n");
1da177e4
LT		 692 return;
693 }
694
64f70e7e
HV		 695 v4l2_dbg(1, debug, sd, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
696 v4l2_dbg(1, debug, sd, "tda9873_setmode(): sw_data = %d\n", sw_data);
1da177e4
LT		 697
698 switch (mode) {
dc3d75da 699 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 700 sw_data |= TDA9873_TR_MONO;
701 break;
dc3d75da 702 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 703 sw_data |= TDA9873_TR_STEREO;
704 break;
dc3d75da 705 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 706 sw_data |= TDA9873_TR_DUALA;
707 break;
dc3d75da 708 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 709 sw_data |= TDA9873_TR_DUALB;
710 break;
711 default:
712 chip->mode = 0;
713 return;
714 }
715
716 chip_write(chip, TDA9873_SW, sw_data);
64f70e7e 717 v4l2_dbg(1, debug, sd, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
1da177e4
LT		 718 mode, sw_data);
719}
720
721static int tda9873_checkit(struct CHIPSTATE *chip)
722{
723 int rc;
724
725 if (-1 == (rc = chip_read2(chip,254)))
726 return 0;
727 return (rc & ~0x1f) == 0x80;
728}
729
730
731/* ---------------------------------------------------------------------- */
732/* audio chip description - defines+functions for tda9874h and tda9874a */
733/* Dariusz Kowalewski <darekk@automex.pl> */
734
735/* Subaddresses for TDA9874H and TDA9874A (slave rx) */
736#define TDA9874A_AGCGR 0x00 /* AGC gain */
737#define TDA9874A_GCONR 0x01 /* general config */
738#define TDA9874A_MSR 0x02 /* monitor select */
739#define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
740#define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
741#define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
742#define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
743#define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
744#define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
745#define TDA9874A_DCR 0x09 /* demodulator config */
746#define TDA9874A_FMER 0x0a /* FM de-emphasis */
747#define TDA9874A_FMMR 0x0b /* FM dematrix */
748#define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
749#define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
750#define TDA9874A_NCONR 0x0e /* NICAM config */
751#define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
752#define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
753#define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
754#define TDA9874A_AMCONR 0x12 /* audio mute control */
755#define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
756#define TDA9874A_AOSR 0x14 /* analog output select */
757#define TDA9874A_DAICONR 0x15 /* digital audio interface config */
758#define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
759#define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
760#define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
761#define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
762
763/* Subaddresses for TDA9874H and TDA9874A (slave tx) */
764#define TDA9874A_DSR 0x00 /* device status */
765#define TDA9874A_NSR 0x01 /* NICAM status */
766#define TDA9874A_NECR 0x02 /* NICAM error count */
767#define TDA9874A_DR1 0x03 /* add. data LSB */
768#define TDA9874A_DR2 0x04 /* add. data MSB */
769#define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
770#define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
771#define TDA9874A_SIFLR 0x07 /* SIF level */
772#define TDA9874A_TR2 252 /* test reg. 2 */
773#define TDA9874A_TR1 253 /* test reg. 1 */
774#define TDA9874A_DIC 254 /* device id. code */
775#define TDA9874A_SIC 255 /* software id. code */
776
777
778static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
779static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
780static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
781static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
782static int tda9874a_dic = -1; /* device id. code */
783
784/* insmod options for tda9874a */
785static unsigned int tda9874a_SIF = UNSET;
786static unsigned int tda9874a_AMSEL = UNSET;
787static unsigned int tda9874a_STD = UNSET;
788module_param(tda9874a_SIF, int, 0444);
789module_param(tda9874a_AMSEL, int, 0444);
790module_param(tda9874a_STD, int, 0444);
791
792/*
793 * initialization table for tda9874 decoder:
794 * - carrier 1 freq. registers (3 bytes)
795 * - carrier 2 freq. registers (3 bytes)
796 * - demudulator config register
797 * - FM de-emphasis register (slow identification mode)
798 * Note: frequency registers must be written in single i2c transfer.
799 */
800static struct tda9874a_MODES {
801 char *name;
802 audiocmd cmd;
803} tda9874a_modelist[9] = {
04e6f990 804 { "A2, B/G", /* default */
1da177e4
LT		 805 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
806 { "A2, M (Korea)",
807 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
808 { "A2, D/K (1)",
809 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
810 { "A2, D/K (2)",
811 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
812 { "A2, D/K (3)",
813 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
814 { "NICAM, I",
815 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
816 { "NICAM, B/G",
817 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
04e6f990 818 { "NICAM, D/K",
1da177e4
LT		 819 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
820 { "NICAM, L",
821 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
822};
823
824static int tda9874a_setup(struct CHIPSTATE *chip)
825{
64f70e7e
HV		 826 struct v4l2_subdev *sd = &chip->sd;
827
1da177e4
LT		 828 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
829 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
830 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
831 if(tda9874a_dic == 0x11) {
832 chip_write(chip, TDA9874A_FMMR, 0x80);
833 } else { /* dic == 0x07 */
834 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
835 chip_write(chip, TDA9874A_FMMR, 0x00);
836 }
837 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
838 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
839 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
840 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
841 /* Note: If signal quality is poor you may want to change NICAM */
842 /* error limit registers (NLELR and NUELR) to some greater values. */
843 /* Then the sound would remain stereo, but won't be so clear. */
844 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
845 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
846
847 if(tda9874a_dic == 0x11) {
848 chip_write(chip, TDA9874A_AMCONR, 0xf9);
849 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
850 chip_write(chip, TDA9874A_AOSR, 0x80);
851 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
852 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
853 } else { /* dic == 0x07 */
854 chip_write(chip, TDA9874A_AMCONR, 0xfb);
855 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
18fc59e2 856 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
1da177e4 857 }
64f70e7e 858 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
1da177e4
LT		 859 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
860 return 1;
861}
862
863static int tda9874a_getmode(struct CHIPSTATE *chip)
864{
64f70e7e 865 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 866 int dsr,nsr,mode;
867 int necr; /* just for debugging */
868
dc3d75da 869 mode = V4L2_TUNER_MODE_MONO;
1da177e4
LT		 870
871 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
872 return mode;
873 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
874 return mode;
875 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
876 return mode;
877
878 /* need to store dsr/nsr somewhere */
879 chip->shadow.bytes[MAXREGS-2] = dsr;
880 chip->shadow.bytes[MAXREGS-1] = nsr;
881
882 if(tda9874a_mode) {
883 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
884 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
885 * that sound has (temporarily) switched from NICAM to
886 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
887 * error count. So in fact there is no stereo in this case :-(
dc3d75da 888 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
1da177e4
LT		 889 * external 4052 multiplexer in audio_hook().
890 */
1da177e4 891 if(nsr & 0x02) /* NSR.S/MB=1 */
dc3d75da 892 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 893 if(nsr & 0x01) /* NSR.D/SB=1 */
dc3d75da 894 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4
LT		 895 } else {
896 if(dsr & 0x02) /* DSR.IDSTE=1 */
dc3d75da 897 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 898 if(dsr & 0x04) /* DSR.IDDUA=1 */
dc3d75da 899 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4
LT		 900 }
901
64f70e7e 902 v4l2_dbg(1, debug, sd, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
1da177e4
LT		 903 dsr, nsr, necr, mode);
904 return mode;
905}
906
907static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
908{
64f70e7e
HV		 909 struct v4l2_subdev *sd = &chip->sd;
910
1da177e4
LT		 911 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
912 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
64f70e7e 913 if (tda9874a_mode) {
1da177e4
LT		 914 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
915 tda9874a_NCONR &= 0xfe; /* enable */
916 else
917 tda9874a_NCONR |= 0x01; /* disable */
918 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
919 }
920
921 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
922 * and has auto-select function for audio output (AOSR register).
923 * Old TDA9874H doesn't support these features.
924 * TDA9874A also has additional mono output pin (OUTM), which
925 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
926 */
927 if(tda9874a_dic == 0x11) {
928 int aosr = 0x80;
929 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
930
931 switch(mode) {
dc3d75da
MCC		 932 case V4L2_TUNER_MODE_MONO:
933 case V4L2_TUNER_MODE_STEREO:
1da177e4 934 break;
dc3d75da 935 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 936 aosr = 0x80; /* auto-select, dual A/A */
937 mdacosr = (tda9874a_mode) ? 0x82:0x80;
938 break;
dc3d75da 939 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 940 aosr = 0xa0; /* auto-select, dual B/B */
941 mdacosr = (tda9874a_mode) ? 0x83:0x81;
942 break;
943 default:
944 chip->mode = 0;
945 return;
946 }
947 chip_write(chip, TDA9874A_AOSR, aosr);
948 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
949
64f70e7e 950 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1da177e4
LT		 951 mode, aosr, mdacosr);
952
953 } else { /* dic == 0x07 */
954 int fmmr,aosr;
955
956 switch(mode) {
dc3d75da 957 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 958 fmmr = 0x00; /* mono */
959 aosr = 0x10; /* A/A */
960 break;
dc3d75da 961 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 962 if(tda9874a_mode) {
963 fmmr = 0x00;
964 aosr = 0x00; /* handled by NICAM auto-mute */
965 } else {
966 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
967 aosr = 0x00;
968 }
969 break;
dc3d75da 970 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 971 fmmr = 0x02; /* dual */
972 aosr = 0x10; /* dual A/A */
973 break;
dc3d75da 974 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 975 fmmr = 0x02; /* dual */
976 aosr = 0x20; /* dual B/B */
977 break;
978 default:
979 chip->mode = 0;
980 return;
981 }
982 chip_write(chip, TDA9874A_FMMR, fmmr);
983 chip_write(chip, TDA9874A_AOSR, aosr);
984
64f70e7e 985 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1da177e4
LT		 986 mode, fmmr, aosr);
987 }
988}
989
990static int tda9874a_checkit(struct CHIPSTATE *chip)
991{
64f70e7e 992 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 993 int dic,sic; /* device id. and software id. codes */
994
995 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
996 return 0;
997 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
998 return 0;
999
64f70e7e 1000 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1da177e4
LT		 1001
1002 if((dic == 0x11)||(dic == 0x07)) {
64f70e7e 1003 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1da177e4
LT		 1004 tda9874a_dic = dic; /* remember device id. */
1005 return 1;
1006 }
1007 return 0; /* not found */
1008}
1009
1010static int tda9874a_initialize(struct CHIPSTATE *chip)
1011{
1012 if (tda9874a_SIF > 2)
1013 tda9874a_SIF = 1;
04e6f990 1014 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1da177e4
LT		 1015 tda9874a_STD = 0;
1016 if(tda9874a_AMSEL > 1)
1017 tda9874a_AMSEL = 0;
1018
1019 if(tda9874a_SIF == 1)
1020 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1021 else
1022 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1023
1024 tda9874a_ESP = tda9874a_STD;
1025 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1026
1027 if(tda9874a_AMSEL == 0)
1028 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1029 else
1030 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1031
1032 tda9874a_setup(chip);
1033 return 0;
1034}
1035
411674fd
HV		 1036/* ---------------------------------------------------------------------- */
1037/* audio chip description - defines+functions for tda9875 */
1038/* The TDA9875 is made by Philips Semiconductor
1039 * http://www.semiconductors.philips.com
1040 * TDA9875: I2C-bus controlled DSP audio processor, FM demodulator
1041 *
1042 */
1043
1044/* subaddresses for TDA9875 */
1045#define TDA9875_MUT 0x12 /*General mute (value --> 0b11001100*/
1046#define TDA9875_CFG 0x01 /* Config register (value --> 0b00000000 */
1047#define TDA9875_DACOS 0x13 /*DAC i/o select (ADC) 0b0000100*/
1048#define TDA9875_LOSR 0x16 /*Line output select regirter 0b0100 0001*/
1049
1050#define TDA9875_CH1V 0x0c /*Channel 1 volume (mute)*/
1051#define TDA9875_CH2V 0x0d /*Channel 2 volume (mute)*/
1052#define TDA9875_SC1 0x14 /*SCART 1 in (mono)*/
1053#define TDA9875_SC2 0x15 /*SCART 2 in (mono)*/
1054
1055#define TDA9875_ADCIS 0x17 /*ADC input select (mono) 0b0110 000*/
1056#define TDA9875_AER 0x19 /*Audio effect (AVL+Pseudo) 0b0000 0110*/
1057#define TDA9875_MCS 0x18 /*Main channel select (DAC) 0b0000100*/
1058#define TDA9875_MVL 0x1a /* Main volume gauche */
1059#define TDA9875_MVR 0x1b /* Main volume droite */
1060#define TDA9875_MBA 0x1d /* Main Basse */
1061#define TDA9875_MTR 0x1e /* Main treble */
1062#define TDA9875_ACS 0x1f /* Auxilary channel select (FM) 0b0000000*/
1063#define TDA9875_AVL 0x20 /* Auxilary volume gauche */
1064#define TDA9875_AVR 0x21 /* Auxilary volume droite */
1065#define TDA9875_ABA 0x22 /* Auxilary Basse */
1066#define TDA9875_ATR 0x23 /* Auxilary treble */
1067
1068#define TDA9875_MSR 0x02 /* Monitor select register */
1069#define TDA9875_C1MSB 0x03 /* Carrier 1 (FM) frequency register MSB */
1070#define TDA9875_C1MIB 0x04 /* Carrier 1 (FM) frequency register (16-8]b */
1071#define TDA9875_C1LSB 0x05 /* Carrier 1 (FM) frequency register LSB */
1072#define TDA9875_C2MSB 0x06 /* Carrier 2 (nicam) frequency register MSB */
1073#define TDA9875_C2MIB 0x07 /* Carrier 2 (nicam) frequency register (16-8]b */
1074#define TDA9875_C2LSB 0x08 /* Carrier 2 (nicam) frequency register LSB */
1075#define TDA9875_DCR 0x09 /* Demodulateur configuration regirter*/
1076#define TDA9875_DEEM 0x0a /* FM de-emphasis regirter*/
1077#define TDA9875_FMAT 0x0b /* FM Matrix regirter*/
1078
1079/* values */
1080#define TDA9875_MUTE_ON 0xff /* general mute */
1081#define TDA9875_MUTE_OFF 0xcc /* general no mute */
1082
1083static int tda9875_initialize(struct CHIPSTATE *chip)
1084{
1085 chip_write(chip, TDA9875_CFG, 0xd0); /*reg de config 0 (reset)*/
1086 chip_write(chip, TDA9875_MSR, 0x03); /* Monitor 0b00000XXX*/
1087 chip_write(chip, TDA9875_C1MSB, 0x00); /*Car1(FM) MSB XMHz*/
1088 chip_write(chip, TDA9875_C1MIB, 0x00); /*Car1(FM) MIB XMHz*/
1089 chip_write(chip, TDA9875_C1LSB, 0x00); /*Car1(FM) LSB XMHz*/
1090 chip_write(chip, TDA9875_C2MSB, 0x00); /*Car2(NICAM) MSB XMHz*/
1091 chip_write(chip, TDA9875_C2MIB, 0x00); /*Car2(NICAM) MIB XMHz*/
1092 chip_write(chip, TDA9875_C2LSB, 0x00); /*Car2(NICAM) LSB XMHz*/
1093 chip_write(chip, TDA9875_DCR, 0x00); /*Demod config 0x00*/
1094 chip_write(chip, TDA9875_DEEM, 0x44); /*DE-Emph 0b0100 0100*/
1095 chip_write(chip, TDA9875_FMAT, 0x00); /*FM Matrix reg 0x00*/
1096 chip_write(chip, TDA9875_SC1, 0x00); /* SCART 1 (SC1)*/
1097 chip_write(chip, TDA9875_SC2, 0x01); /* SCART 2 (sc2)*/
1098
1099 chip_write(chip, TDA9875_CH1V, 0x10); /* Channel volume 1 mute*/
1100 chip_write(chip, TDA9875_CH2V, 0x10); /* Channel volume 2 mute */
1101 chip_write(chip, TDA9875_DACOS, 0x02); /* sig DAC i/o(in:nicam)*/
1102 chip_write(chip, TDA9875_ADCIS, 0x6f); /* sig ADC input(in:mono)*/
1103 chip_write(chip, TDA9875_LOSR, 0x00); /* line out (in:mono)*/
1104 chip_write(chip, TDA9875_AER, 0x00); /*06 Effect (AVL+PSEUDO) */
1105 chip_write(chip, TDA9875_MCS, 0x44); /* Main ch select (DAC) */
1106 chip_write(chip, TDA9875_MVL, 0x03); /* Vol Main left 10dB */
1107 chip_write(chip, TDA9875_MVR, 0x03); /* Vol Main right 10dB*/
1108 chip_write(chip, TDA9875_MBA, 0x00); /* Main Bass Main 0dB*/
1109 chip_write(chip, TDA9875_MTR, 0x00); /* Main Treble Main 0dB*/
1110 chip_write(chip, TDA9875_ACS, 0x44); /* Aux chan select (dac)*/
1111 chip_write(chip, TDA9875_AVL, 0x00); /* Vol Aux left 0dB*/
1112 chip_write(chip, TDA9875_AVR, 0x00); /* Vol Aux right 0dB*/
1113 chip_write(chip, TDA9875_ABA, 0x00); /* Aux Bass Main 0dB*/
1114 chip_write(chip, TDA9875_ATR, 0x00); /* Aux Aigus Main 0dB*/
1115
1116 chip_write(chip, TDA9875_MUT, 0xcc); /* General mute */
1117 return 0;
1118}
1119
1120static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); }
1121static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); }
1122static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); }
1123
1124/* ----------------------------------------------------------------------- */
1125
1126
1127/* *********************** *
1128 * i2c interface functions *
1129 * *********************** */
1130
1131static int tda9875_checkit(struct CHIPSTATE *chip)
1132{
1133 struct v4l2_subdev *sd = &chip->sd;
1134 int dic, rev;
1135
1136 dic = chip_read2(chip, 254);
1137 rev = chip_read2(chip, 255);
1138
1139 if (dic == 0 || dic == 2) { /* tda9875 and tda9875A */
1140 v4l2_info(sd, "found tda9875%s rev. %d.\n",
1141 dic == 0 ? "" : "A", rev);
1142 return 1;
1143 }
1144 return 0;
1145}
1da177e4
LT		 1146
1147/* ---------------------------------------------------------------------- */
1148/* audio chip descriptions - defines+functions for tea6420 */
1149
1150#define TEA6300_VL 0x00 /* volume left */
1151#define TEA6300_VR 0x01 /* volume right */
1152#define TEA6300_BA 0x02 /* bass */
1153#define TEA6300_TR 0x03 /* treble */
1154#define TEA6300_FA 0x04 /* fader control */
1155#define TEA6300_S 0x05 /* switch register */
f2421ca3 1156 /* values for those registers: */
1da177e4
LT		 1157#define TEA6300_S_SA 0x01 /* stereo A input */
1158#define TEA6300_S_SB 0x02 /* stereo B */
1159#define TEA6300_S_SC 0x04 /* stereo C */
1160#define TEA6300_S_GMU 0x80 /* general mute */
1161
1162#define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1163#define TEA6320_FFR 0x01 /* fader front right (0-5) */
1164#define TEA6320_FFL 0x02 /* fader front left (0-5) */
1165#define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1166#define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1167#define TEA6320_BA 0x05 /* bass (0-4) */
1168#define TEA6320_TR 0x06 /* treble (0-4) */
1169#define TEA6320_S 0x07 /* switch register */
f2421ca3 1170 /* values for those registers: */
1da177e4
LT		 1171#define TEA6320_S_SA 0x07 /* stereo A input */
1172#define TEA6320_S_SB 0x06 /* stereo B */
1173#define TEA6320_S_SC 0x05 /* stereo C */
1174#define TEA6320_S_SD 0x04 /* stereo D */
1175#define TEA6320_S_GMU 0x80 /* general mute */
1176
1177#define TEA6420_S_SA 0x00 /* stereo A input */
1178#define TEA6420_S_SB 0x01 /* stereo B */
1179#define TEA6420_S_SC 0x02 /* stereo C */
1180#define TEA6420_S_SD 0x03 /* stereo D */
1181#define TEA6420_S_SE 0x04 /* stereo E */
1182#define TEA6420_S_GMU 0x05 /* general mute */
1183
1184static int tea6300_shift10(int val) { return val >> 10; }
1185static int tea6300_shift12(int val) { return val >> 12; }
1186
1187/* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1188/* 0x0c mirror those immediately higher) */
1189static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1190static int tea6320_shift11(int val) { return val >> 11; }
1191static int tea6320_initialize(struct CHIPSTATE * chip)
1192{
1193 chip_write(chip, TEA6320_FFR, 0x3f);
1194 chip_write(chip, TEA6320_FFL, 0x3f);
1195 chip_write(chip, TEA6320_FRR, 0x3f);
1196 chip_write(chip, TEA6320_FRL, 0x3f);
1197
1198 return 0;
1199}
1200
1201
1202/* ---------------------------------------------------------------------- */
1203/* audio chip descriptions - defines+functions for tda8425 */
1204
1205#define TDA8425_VL 0x00 /* volume left */
1206#define TDA8425_VR 0x01 /* volume right */
1207#define TDA8425_BA 0x02 /* bass */
1208#define TDA8425_TR 0x03 /* treble */
1209#define TDA8425_S1 0x08 /* switch functions */
f2421ca3 1210 /* values for those registers: */
1da177e4
LT		 1211#define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1212#define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1213#define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1214#define TDA8425_S1_MU 0x20 /* mute bit */
1215#define TDA8425_S1_STEREO 0x18 /* stereo bits */
1216#define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1217#define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1218#define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1219#define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1220#define TDA8425_S1_ML 0x06 /* language selector */
1221#define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1222#define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1223#define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1224#define TDA8425_S1_IS 0x01 /* channel selector */
1225
1226
1227static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1228static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1229
1230static int tda8425_initialize(struct CHIPSTATE *chip)
1231{
81cb5c4f 1232 struct CHIPDESC *desc = chip->desc;
64f70e7e 1233 struct i2c_client *c = v4l2_get_subdevdata(&chip->sd);
8bf2f8e7
HV		 1234 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1235 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1da177e4 1236
64f70e7e
HV		 1237 if (c->adapter->id == I2C_HW_B_RIVA)
1238 memcpy(desc->inputmap, inputmap, sizeof(inputmap));
1da177e4
LT		 1239 return 0;
1240}
1241
1242static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1243{
1244 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1245
dc3d75da 1246 if (mode & V4L2_TUNER_MODE_LANG1) {
1da177e4
LT		 1247 s1 |= TDA8425_S1_ML_SOUND_A;
1248 s1 |= TDA8425_S1_STEREO_PSEUDO;
1249
dc3d75da 1250 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1da177e4
LT		 1251 s1 |= TDA8425_S1_ML_SOUND_B;
1252 s1 |= TDA8425_S1_STEREO_PSEUDO;
1253
1254 } else {
1255 s1 |= TDA8425_S1_ML_STEREO;
1256
dc3d75da 1257 if (mode & V4L2_TUNER_MODE_MONO)
1da177e4 1258 s1 |= TDA8425_S1_STEREO_MONO;
dc3d75da 1259 if (mode & V4L2_TUNER_MODE_STEREO)
1da177e4
LT		 1260 s1 |= TDA8425_S1_STEREO_SPATIAL;
1261 }
1262 chip_write(chip,TDA8425_S1,s1);
1263}
1264
1265
1266/* ---------------------------------------------------------------------- */
1267/* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1268
1269/* the registers of 16C54, I2C sub address. */
1270#define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1271#define PIC16C54_REG_MISC 0x02
1272
1273/* bit definition of the RESET register, I2C data. */
1274#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
f2421ca3 1275 /* code of remote controller */
1da177e4
LT		 1276#define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1277#define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1278#define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1279#define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1280#define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1281#define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1282#define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1283
1284/* ---------------------------------------------------------------------- */
1285/* audio chip descriptions - defines+functions for TA8874Z */
1286
18fc59e2 1287/* write 1st byte */
1da177e4
LT		 1288#define TA8874Z_LED_STE 0x80
1289#define TA8874Z_LED_BIL 0x40
1290#define TA8874Z_LED_EXT 0x20
1291#define TA8874Z_MONO_SET 0x10
1292#define TA8874Z_MUTE 0x08
1293#define TA8874Z_F_MONO 0x04
1294#define TA8874Z_MODE_SUB 0x02
1295#define TA8874Z_MODE_MAIN 0x01
1296
18fc59e2
MCC		 1297/* write 2nd byte */
1298/*#define TA8874Z_TI 0x80 */ /* test mode */
1da177e4
LT		 1299#define TA8874Z_SEPARATION 0x3f
1300#define TA8874Z_SEPARATION_DEFAULT 0x10
1301
18fc59e2 1302/* read */
1da177e4
LT		 1303#define TA8874Z_B1 0x80
1304#define TA8874Z_B0 0x40
1305#define TA8874Z_CHAG_FLAG 0x20
1306
18fc59e2
MCC		 1307/*
1308 * B1 B0
1309 * mono L H
1310 * stereo L L
1311 * BIL H L
1312 */
1da177e4
LT		 1313static int ta8874z_getmode(struct CHIPSTATE *chip)
1314{
1315 int val, mode;
1316
1317 val = chip_read(chip);
dc3d75da 1318 mode = V4L2_TUNER_MODE_MONO;
1da177e4 1319 if (val & TA8874Z_B1){
dc3d75da 1320 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4 1321 }else if (!(val & TA8874Z_B0)){
dc3d75da 1322 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 1323 }
08e14054 1324 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1da177e4
LT		 1325 return mode;
1326}
1327
1328static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1329static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1330static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1331static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1332
1333static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1334{
64f70e7e 1335 struct v4l2_subdev *sd = &chip->sd;
1da177e4
LT		 1336 int update = 1;
1337 audiocmd *t = NULL;
64f70e7e
HV		 1338
1339 v4l2_dbg(1, debug, sd, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1da177e4
LT		 1340
1341 switch(mode){
dc3d75da 1342 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 1343 t = &ta8874z_mono;
1344 break;
dc3d75da 1345 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 1346 t = &ta8874z_stereo;
1347 break;
dc3d75da 1348 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 1349 t = &ta8874z_main;
1350 break;
dc3d75da 1351 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 1352 t = &ta8874z_sub;
1353 break;
1354 default:
1355 update = 0;
1356 }
1357
1358 if(update)
1359 chip_cmd(chip, "TA8874Z", t);
1360}
1361
1362static int ta8874z_checkit(struct CHIPSTATE *chip)
1363{
1364 int rc;
1365 rc = chip_read(chip);
1366 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1367}
1368
1369/* ---------------------------------------------------------------------- */
1370/* audio chip descriptions - struct CHIPDESC */
1371
1372/* insmod options to enable/disable individual audio chips */
52c1da39
AB		 1373static int tda8425 = 1;
1374static int tda9840 = 1;
1375static int tda9850 = 1;
1376static int tda9855 = 1;
1377static int tda9873 = 1;
1378static int tda9874a = 1;
411674fd 1379static int tda9875 = 1;
ff699e6b
DSL		 1380static int tea6300; /* default 0 - address clash with msp34xx */
1381static int tea6320; /* default 0 - address clash with msp34xx */
52c1da39
AB		 1382static int tea6420 = 1;
1383static int pic16c54 = 1;
ff699e6b 1384static int ta8874z; /* default 0 - address clash with tda9840 */
1da177e4
LT		 1385
1386module_param(tda8425, int, 0444);
1387module_param(tda9840, int, 0444);
1388module_param(tda9850, int, 0444);
1389module_param(tda9855, int, 0444);
1390module_param(tda9873, int, 0444);
1391module_param(tda9874a, int, 0444);
411674fd 1392module_param(tda9875, int, 0444);
1da177e4
LT		 1393module_param(tea6300, int, 0444);
1394module_param(tea6320, int, 0444);
1395module_param(tea6420, int, 0444);
1396module_param(pic16c54, int, 0444);
1397module_param(ta8874z, int, 0444);
1398
1399static struct CHIPDESC chiplist[] = {
1400 {
1401 .name = "tda9840",
1da177e4 1402 .insmodopt = &tda9840,
09df1c16
MCC		 1403 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1404 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1da177e4 1405 .registers = 5,
dd03e970 1406 .flags = CHIP_NEED_CHECKMODE,
1da177e4 1407
af1a9951 1408 /* callbacks */
94f9e56e 1409 .checkit = tda9840_checkit,
1da177e4
LT		 1410 .getmode = tda9840_getmode,
1411 .setmode = tda9840_setmode,
1da177e4 1412
4ac97914 1413 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1da177e4
LT		 1414 /* ,TDA9840_SW, TDA9840_MONO */} }
1415 },
1416 {
1417 .name = "tda9873h",
1da177e4 1418 .insmodopt = &tda9873,
09df1c16
MCC		 1419 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1420 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4 1421 .registers = 3,
dd03e970 1422 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1da177e4 1423
af1a9951
MCC		 1424 /* callbacks */
1425 .checkit = tda9873_checkit,
1da177e4
LT		 1426 .getmode = tda9873_getmode,
1427 .setmode = tda9873_setmode,
1da177e4
LT		 1428
1429 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1430 .inputreg = TDA9873_SW,
1431 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
8bf2f8e7 1432 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1da177e4
LT		 1433 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1434
1435 },
1436 {
1437 .name = "tda9874h/a",
1da177e4 1438 .insmodopt = &tda9874a,
09df1c16
MCC		 1439 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1440 .addr_hi = I2C_ADDR_TDA9874 >> 1,
dd03e970 1441 .flags = CHIP_NEED_CHECKMODE,
1da177e4 1442
af1a9951
MCC		 1443 /* callbacks */
1444 .initialize = tda9874a_initialize,
1445 .checkit = tda9874a_checkit,
1da177e4
LT		 1446 .getmode = tda9874a_getmode,
1447 .setmode = tda9874a_setmode,
1da177e4 1448 },
411674fd
HV		 1449 {
1450 .name = "tda9875",
1451 .insmodopt = &tda9875,
1452 .addr_lo = I2C_ADDR_TDA9875 >> 1,
1453 .addr_hi = I2C_ADDR_TDA9875 >> 1,
1454 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1455
1456 /* callbacks */
1457 .initialize = tda9875_initialize,
1458 .checkit = tda9875_checkit,
1459 .volfunc = tda9875_volume,
1460 .bassfunc = tda9875_bass,
1461 .treblefunc = tda9875_treble,
1462 .leftreg = TDA9875_MVL,
1463 .rightreg = TDA9875_MVR,
1464 .bassreg = TDA9875_MBA,
1465 .treblereg = TDA9875_MTR,
1466 .leftinit = 58880,
1467 .rightinit = 58880,
1468 },
1da177e4
LT		 1469 {
1470 .name = "tda9850",
1da177e4 1471 .insmodopt = &tda9850,
09df1c16
MCC		 1472 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1473 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4
LT		 1474 .registers = 11,
1475
1476 .getmode = tda985x_getmode,
1477 .setmode = tda985x_setmode,
1478
1479 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1480 },
1481 {
1482 .name = "tda9855",
1da177e4 1483 .insmodopt = &tda9855,
09df1c16
MCC		 1484 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1485 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4
LT		 1486 .registers = 11,
1487 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1488
1489 .leftreg = TDA9855_VL,
1490 .rightreg = TDA9855_VR,
1491 .bassreg = TDA9855_BA,
1492 .treblereg = TDA9855_TR,
af1a9951
MCC		 1493
1494 /* callbacks */
1da177e4
LT		 1495 .volfunc = tda9855_volume,
1496 .bassfunc = tda9855_bass,
1497 .treblefunc = tda9855_treble,
1da177e4
LT		 1498 .getmode = tda985x_getmode,
1499 .setmode = tda985x_setmode,
1500
1501 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1502 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1503 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1504 0x07, 0x10, 0x10, 0x03 }}
1505 },
1506 {
1507 .name = "tea6300",
1da177e4 1508 .insmodopt = &tea6300,
09df1c16
MCC		 1509 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1510 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1da177e4
LT		 1511 .registers = 6,
1512 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1513
1514 .leftreg = TEA6300_VR,
1515 .rightreg = TEA6300_VL,
1516 .bassreg = TEA6300_BA,
1517 .treblereg = TEA6300_TR,
af1a9951
MCC		 1518
1519 /* callbacks */
1da177e4
LT		 1520 .volfunc = tea6300_shift10,
1521 .bassfunc = tea6300_shift12,
1522 .treblefunc = tea6300_shift12,
1523
1524 .inputreg = TEA6300_S,
1525 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1526 .inputmute = TEA6300_S_GMU,
1527 },
1528 {
1529 .name = "tea6320",
1da177e4 1530 .insmodopt = &tea6320,
09df1c16
MCC		 1531 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1532 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1da177e4
LT		 1533 .registers = 8,
1534 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1535
1536 .leftreg = TEA6320_V,
1537 .rightreg = TEA6320_V,
1538 .bassreg = TEA6320_BA,
1539 .treblereg = TEA6320_TR,
af1a9951
MCC		 1540
1541 /* callbacks */
1542 .initialize = tea6320_initialize,
1da177e4
LT		 1543 .volfunc = tea6320_volume,
1544 .bassfunc = tea6320_shift11,
1545 .treblefunc = tea6320_shift11,
1546
1547 .inputreg = TEA6320_S,
1548 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1549 .inputmute = TEA6300_S_GMU,
1550 },
1551 {
1552 .name = "tea6420",
1da177e4 1553 .insmodopt = &tea6420,
09df1c16
MCC		 1554 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1555 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1da177e4
LT		 1556 .registers = 1,
1557 .flags = CHIP_HAS_INPUTSEL,
1558
1559 .inputreg = -1,
1560 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1561 .inputmute = TEA6300_S_GMU,
1562 },
1563 {
1564 .name = "tda8425",
1da177e4 1565 .insmodopt = &tda8425,
09df1c16
MCC		 1566 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1567 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1da177e4
LT		 1568 .registers = 9,
1569 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1570
1571 .leftreg = TDA8425_VL,
1572 .rightreg = TDA8425_VR,
1573 .bassreg = TDA8425_BA,
1574 .treblereg = TDA8425_TR,
af1a9951
MCC		 1575
1576 /* callbacks */
1577 .initialize = tda8425_initialize,
1da177e4
LT		 1578 .volfunc = tda8425_shift10,
1579 .bassfunc = tda8425_shift12,
1580 .treblefunc = tda8425_shift12,
af1a9951 1581 .setmode = tda8425_setmode,
1da177e4
LT		 1582
1583 .inputreg = TDA8425_S1,
1584 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1585 .inputmute = TDA8425_S1_OFF,
1586
1da177e4
LT		 1587 },
1588 {
1589 .name = "pic16c54 (PV951)",
1da177e4 1590 .insmodopt = &pic16c54,
09df1c16
MCC		 1591 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1592 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1da177e4
LT		 1593 .registers = 2,
1594 .flags = CHIP_HAS_INPUTSEL,
1595
1596 .inputreg = PIC16C54_REG_MISC,
1597 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1598 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1599 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
8bf2f8e7 1600 PIC16C54_MISC_SND_MUTE},
1da177e4
LT		 1601 .inputmute = PIC16C54_MISC_SND_MUTE,
1602 },
1603 {
1604 .name = "ta8874z",
1da177e4
LT		 1605 .checkit = ta8874z_checkit,
1606 .insmodopt = &ta8874z,
09df1c16
MCC		 1607 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1608 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1da177e4 1609 .registers = 2,
dd03e970 1610 .flags = CHIP_NEED_CHECKMODE,
1da177e4 1611
af1a9951 1612 /* callbacks */
1da177e4
LT		 1613 .getmode = ta8874z_getmode,
1614 .setmode = ta8874z_setmode,
1da177e4 1615
4ac97914 1616 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1da177e4
LT		 1617 },
1618 { .name = NULL } /* EOF */
1619};
1620
1621
1622/* ---------------------------------------------------------------------- */
1da177e4 1623
64f70e7e 1624static int tvaudio_g_ctrl(struct v4l2_subdev *sd,
dc3d75da
MCC		 1625 struct v4l2_control *ctrl)
1626{
64f70e7e 1627 struct CHIPSTATE *chip = to_state(sd);
81cb5c4f 1628 struct CHIPDESC *desc = chip->desc;
dc3d75da
MCC		 1629
1630 switch (ctrl->id) {
1631 case V4L2_CID_AUDIO_MUTE:
5fa7b9f3
HV		 1632 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1633 break;
dc3d75da
MCC		 1634 ctrl->value=chip->muted;
1635 return 0;
1636 case V4L2_CID_AUDIO_VOLUME:
18c0ecf1 1637 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1638 break;
1639 ctrl->value = max(chip->left,chip->right);
1640 return 0;
1641 case V4L2_CID_AUDIO_BALANCE:
1642 {
1643 int volume;
18c0ecf1 1644 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1645 break;
1646 volume = max(chip->left,chip->right);
1647 if (volume)
1648 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1649 else
1650 ctrl->value=32768;
1651 return 0;
1652 }
1653 case V4L2_CID_AUDIO_BASS:
01a1a3cc 1654 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
dc3d75da
MCC		 1655 break;
1656 ctrl->value = chip->bass;
1657 return 0;
1658 case V4L2_CID_AUDIO_TREBLE:
01a1a3cc
MCC		 1659 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1660 break;
dc3d75da
MCC		 1661 ctrl->value = chip->treble;
1662 return 0;
1663 }
1664 return -EINVAL;
1665}
1666
64f70e7e 1667static int tvaudio_s_ctrl(struct v4l2_subdev *sd,
dc3d75da 1668 struct v4l2_control *ctrl)
8bf2f8e7 1669{
64f70e7e 1670 struct CHIPSTATE *chip = to_state(sd);
81cb5c4f 1671 struct CHIPDESC *desc = chip->desc;
8bf2f8e7
HV		 1672
1673 switch (ctrl->id) {
1674 case V4L2_CID_AUDIO_MUTE:
5fa7b9f3
HV		 1675 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1676 break;
1677
8bf2f8e7
HV		 1678 if (ctrl->value < 0 || ctrl->value >= 2)
1679 return -ERANGE;
1680 chip->muted = ctrl->value;
1681 if (chip->muted)
1682 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1683 else
1684 chip_write_masked(chip,desc->inputreg,
1685 desc->inputmap[chip->input],desc->inputmask);
dc3d75da
MCC		 1686 return 0;
1687 case V4L2_CID_AUDIO_VOLUME:
1688 {
1689 int volume,balance;
1690
18c0ecf1 1691 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1692 break;
1693
1694 volume = max(chip->left,chip->right);
1695 if (volume)
1696 balance=(32768*min(chip->left,chip->right))/volume;
1697 else
1698 balance=32768;
1699
1700 volume=ctrl->value;
1701 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1702 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1703
1704 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1705 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1706
1707 return 0;
8bf2f8e7 1708 }
dc3d75da
MCC		 1709 case V4L2_CID_AUDIO_BALANCE:
1710 {
1711 int volume, balance;
18c0ecf1 1712 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1713 break;
1714
1715 volume = max(chip->left,chip->right);
1716 balance = ctrl->value;
1717
1718 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1719 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1720
1721 return 0;
1722 }
1723 case V4L2_CID_AUDIO_BASS:
01a1a3cc 1724 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
dc3d75da
MCC		 1725 break;
1726 chip->bass = ctrl->value;
1727 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1728
1729 return 0;
1730 case V4L2_CID_AUDIO_TREBLE:
01a1a3cc
MCC		 1731 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1732 break;
dc3d75da
MCC		 1733 chip->treble = ctrl->value;
1734 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1735
1736 return 0;
1737 }
1738 return -EINVAL;
8bf2f8e7
HV		 1739}
1740
1741
1da177e4
LT		 1742/* ---------------------------------------------------------------------- */
1743/* video4linux interface */
1744
64f70e7e 1745static int tvaudio_s_radio(struct v4l2_subdev *sd)
1da177e4 1746{
64f70e7e 1747 struct CHIPSTATE *chip = to_state(sd);
1da177e4 1748
64f70e7e
HV		 1749 chip->radio = 1;
1750 chip->watch_stereo = 0;
1751 /* del_timer(&chip->wt); */
1752 return 0;
1753}
1754
1755static int tvaudio_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1756{
1757 struct CHIPSTATE *chip = to_state(sd);
1758 struct CHIPDESC *desc = chip->desc;
1759
1760 switch (qc->id) {
1761 case V4L2_CID_AUDIO_MUTE:
5fa7b9f3
HV		 1762 if (desc->flags & CHIP_HAS_INPUTSEL)
1763 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1764 break;
64f70e7e 1765 case V4L2_CID_AUDIO_VOLUME:
10afbef1
HV		 1766 if (desc->flags & CHIP_HAS_VOLUME)
1767 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 58880);
1768 break;
64f70e7e 1769 case V4L2_CID_AUDIO_BALANCE:
10afbef1
HV		 1770 if (desc->flags & CHIP_HAS_VOLUME)
1771 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
64f70e7e
HV		 1772 break;
1773 case V4L2_CID_AUDIO_BASS:
1774 case V4L2_CID_AUDIO_TREBLE:
10afbef1
HV		 1775 if (desc->flags & CHIP_HAS_BASSTREBLE)
1776 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
64f70e7e
HV		 1777 break;
1778 default:
10afbef1 1779 break;
c6241b6c 1780 }
10afbef1 1781 return -EINVAL;
64f70e7e
HV		 1782}
1783
5325b427
HV		 1784static int tvaudio_s_routing(struct v4l2_subdev *sd,
1785 u32 input, u32 output, u32 config)
64f70e7e
HV		 1786{
1787 struct CHIPSTATE *chip = to_state(sd);
1788 struct CHIPDESC *desc = chip->desc;
1da177e4 1789
5fa7b9f3
HV		 1790 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1791 return 0;
5325b427 1792 if (input >= 4)
64f70e7e
HV		 1793 return -EINVAL;
1794 /* There are four inputs: tuner, radio, extern and intern. */
5325b427 1795 chip->input = input;
64f70e7e
HV		 1796 if (chip->muted)
1797 return 0;
1798 chip_write_masked(chip, desc->inputreg,
1799 desc->inputmap[chip->input], desc->inputmask);
1800 return 0;
1801}
1802
1803static int tvaudio_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1804{
1805 struct CHIPSTATE *chip = to_state(sd);
1806 struct CHIPDESC *desc = chip->desc;
1807 int mode = 0;
1808
5fa7b9f3
HV		 1809 if (!desc->setmode)
1810 return 0;
64f70e7e
HV		 1811 if (chip->radio)
1812 return 0;
5fa7b9f3 1813
64f70e7e
HV		 1814 switch (vt->audmode) {
1815 case V4L2_TUNER_MODE_MONO:
1816 case V4L2_TUNER_MODE_STEREO:
1817 case V4L2_TUNER_MODE_LANG1:
1818 case V4L2_TUNER_MODE_LANG2:
1819 mode = vt->audmode;
1820 break;
1821 case V4L2_TUNER_MODE_LANG1_LANG2:
1822 mode = V4L2_TUNER_MODE_STEREO;
1823 break;
1824 default:
1825 return -EINVAL;
1826 }
1827 chip->audmode = vt->audmode;
1828
5fa7b9f3 1829 if (mode) {
1da177e4
LT		 1830 chip->watch_stereo = 0;
1831 /* del_timer(&chip->wt); */
64f70e7e
HV		 1832 chip->mode = mode;
1833 desc->setmode(chip, mode);
1da177e4 1834 }
64f70e7e
HV		 1835 return 0;
1836}
8bf2f8e7 1837
64f70e7e
HV		 1838static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1839{
1840 struct CHIPSTATE *chip = to_state(sd);
1841 struct CHIPDESC *desc = chip->desc;
1842 int mode = V4L2_TUNER_MODE_MONO;
2474ed44 1843
5fa7b9f3
HV		 1844 if (!desc->getmode)
1845 return 0;
64f70e7e
HV		 1846 if (chip->radio)
1847 return 0;
5fa7b9f3 1848
64f70e7e
HV		 1849 vt->audmode = chip->audmode;
1850 vt->rxsubchans = 0;
1851 vt->capability = V4L2_TUNER_CAP_STEREO |
1852 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1853
5fa7b9f3 1854 mode = desc->getmode(chip);
64f70e7e
HV		 1855
1856 if (mode & V4L2_TUNER_MODE_MONO)
1857 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1858 if (mode & V4L2_TUNER_MODE_STEREO)
1859 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1860 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1861 When this module is converted fully to v4l2, then this
1862 should change for those chips that can detect SAP. */
1863 if (mode & V4L2_TUNER_MODE_LANG1)
1864 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1865 V4L2_TUNER_SUB_LANG2;
1866 return 0;
1867}
1868
1869static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1870{
1871 struct CHIPSTATE *chip = to_state(sd);
1872
1873 chip->radio = 0;
1874 return 0;
1875}
1876
1877static int tvaudio_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1878{
1879 struct CHIPSTATE *chip = to_state(sd);
1880 struct CHIPDESC *desc = chip->desc;
1881
1882 chip->mode = 0; /* automatic */
1883
1884 /* For chips that provide getmode and setmode, and doesn't
1885 automatically follows the stereo carrier, a kthread is
1886 created to set the audio standard. In this case, when then
1887 the video channel is changed, tvaudio starts on MONO mode.
1888 After waiting for 2 seconds, the kernel thread is called,
1889 to follow whatever audio standard is pointed by the
1890 audio carrier.
1891 */
1892 if (chip->thread) {
1893 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1894 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1895 chip->prevmode = -1; /* reset previous mode */
1896 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
2474ed44 1897 }
64f70e7e
HV		 1898 return 0;
1899}
2474ed44 1900
aecde8b5 1901static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
64f70e7e
HV		 1902{
1903 struct i2c_client *client = v4l2_get_subdevdata(sd);
1904
1905 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1906}
1907
64f70e7e
HV		 1908/* ----------------------------------------------------------------------- */
1909
1910static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1911 .g_chip_ident = tvaudio_g_chip_ident,
1912 .queryctrl = tvaudio_queryctrl,
1913 .g_ctrl = tvaudio_g_ctrl,
1914 .s_ctrl = tvaudio_s_ctrl,
f41737ec 1915 .s_std = tvaudio_s_std,
64f70e7e
HV		 1916};
1917
1918static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1919 .s_radio = tvaudio_s_radio,
1920 .s_frequency = tvaudio_s_frequency,
64f70e7e 1921 .s_tuner = tvaudio_s_tuner,
e6a1a08f 1922 .g_tuner = tvaudio_g_tuner,
64f70e7e
HV		 1923};
1924
1925static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1926 .s_routing = tvaudio_s_routing,
1927};
1928
1929static const struct v4l2_subdev_ops tvaudio_ops = {
1930 .core = &tvaudio_core_ops,
1931 .tuner = &tvaudio_tuner_ops,
1932 .audio = &tvaudio_audio_ops,
1933};
1934
1935/* ----------------------------------------------------------------------- */
1936
1937
1938/* i2c registration */
1939
1940static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1941{
1942 struct CHIPSTATE *chip;
1943 struct CHIPDESC *desc;
1944 struct v4l2_subdev *sd;
1945
1946 if (debug) {
1947 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1948 printk(KERN_INFO "tvaudio: known chips: ");
1949 for (desc = chiplist; desc->name != NULL; desc++)
1950 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1951 printk("\n");
2474ed44 1952 }
1da177e4 1953
64f70e7e
HV		 1954 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1955 if (!chip)
1956 return -ENOMEM;
1957 sd = &chip->sd;
1958 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
8a854284 1959
64f70e7e
HV		 1960 /* find description for the chip */
1961 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1962 for (desc = chiplist; desc->name != NULL; desc++) {
1963 if (0 == *(desc->insmodopt))
1964 continue;
1965 if (client->addr < desc->addr_lo ||
1966 client->addr > desc->addr_hi)
1967 continue;
1968 if (desc->checkit && !desc->checkit(chip))
1969 continue;
1da177e4
LT		 1970 break;
1971 }
64f70e7e
HV		 1972 if (desc->name == NULL) {
1973 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
1974 kfree(chip);
1975 return -EIO;
1976 }
1977 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1978 if (desc->flags) {
1979 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
1980 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1981 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1982 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1983 }
8a854284 1984
64f70e7e
HV		 1985 /* fill required data structures */
1986 if (!id)
1987 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1988 chip->desc = desc;
1989 chip->shadow.count = desc->registers+1;
1990 chip->prevmode = -1;
1991 chip->audmode = V4L2_TUNER_MODE_LANG1;
8a854284 1992
64f70e7e
HV		 1993 /* initialization */
1994 if (desc->initialize != NULL)
1995 desc->initialize(chip);
1996 else
1997 chip_cmd(chip, "init", &desc->init);
8a854284 1998
64f70e7e
HV		 1999 if (desc->flags & CHIP_HAS_VOLUME) {
2000 if (!desc->volfunc) {
2001 /* This shouldn't be happen. Warn user, but keep working
2002 without volume controls
2003 */
2004 v4l2_info(sd, "volume callback undefined!\n");
2005 desc->flags &= ~CHIP_HAS_VOLUME;
2006 } else {
2007 chip->left = desc->leftinit ? desc->leftinit : 65535;
2008 chip->right = desc->rightinit ? desc->rightinit : 65535;
2009 chip_write(chip, desc->leftreg,
2010 desc->volfunc(chip->left));
2011 chip_write(chip, desc->rightreg,
2012 desc->volfunc(chip->right));
2013 }
8a854284 2014 }
64f70e7e
HV		 2015 if (desc->flags & CHIP_HAS_BASSTREBLE) {
2016 if (!desc->bassfunc || !desc->treblefunc) {
2017 /* This shouldn't be happen. Warn user, but keep working
2018 without bass/treble controls
2019 */
2020 v4l2_info(sd, "bass/treble callbacks undefined!\n");
2021 desc->flags &= ~CHIP_HAS_BASSTREBLE;
2022 } else {
2023 chip->treble = desc->trebleinit ?
2024 desc->trebleinit : 32768;
2025 chip->bass = desc->bassinit ?
2026 desc->bassinit : 32768;
2027 chip_write(chip, desc->bassreg,
2028 desc->bassfunc(chip->bass));
2029 chip_write(chip, desc->treblereg,
2030 desc->treblefunc(chip->treble));
1da177e4 2031 }
64f70e7e 2032 }
74cab31c 2033
64f70e7e 2034 chip->thread = NULL;
e4129a9c 2035 init_timer(&chip->wt);
64f70e7e
HV		 2036 if (desc->flags & CHIP_NEED_CHECKMODE) {
2037 if (!desc->getmode || !desc->setmode) {
2038 /* This shouldn't be happen. Warn user, but keep working
2039 without kthread
2040 */
2041 v4l2_info(sd, "set/get mode callbacks undefined!\n");
2042 return 0;
2043 }
2044 /* start async thread */
64f70e7e
HV		 2045 chip->wt.function = chip_thread_wake;
2046 chip->wt.data = (unsigned long)chip;
2047 chip->thread = kthread_run(chip_thread, chip, client->name);
2048 if (IS_ERR(chip->thread)) {
2049 v4l2_warn(sd, "failed to create kthread\n");
2050 chip->thread = NULL;
2051 }
1da177e4
LT		 2052 }
2053 return 0;
2054}
2055
64f70e7e
HV		 2056static int tvaudio_remove(struct i2c_client *client)
2057{
2058 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2059 struct CHIPSTATE *chip = to_state(sd);
2060
2061 del_timer_sync(&chip->wt);
2062 if (chip->thread) {
2063 /* shutdown async thread */
2064 kthread_stop(chip->thread);
2065 chip->thread = NULL;
2066 }
2067
2068 v4l2_device_unregister_subdev(sd);
2069 kfree(chip);
2070 return 0;
2071}
2072
ae429083
JD		 2073/* This driver supports many devices and the idea is to let the driver
2074 detect which device is present. So rather than listing all supported
2075 devices here, we pretend to support a single, fake device type. */
64f70e7e 2076static const struct i2c_device_id tvaudio_id[] = {
ae429083
JD		 2077 { "tvaudio", 0 },
2078 { }
2079};
64f70e7e 2080MODULE_DEVICE_TABLE(i2c, tvaudio_id);
ae429083 2081
08e14054
HV		 2082static struct v4l2_i2c_driver_data v4l2_i2c_data = {
2083 .name = "tvaudio",
64f70e7e
HV		 2084 .probe = tvaudio_probe,
2085 .remove = tvaudio_remove,
64f70e7e 2086 .id_table = tvaudio_id,
08e14054 2087};
Linux 6.x block layer and io_uring tree(s)