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V4L/DVB (9834): wm8775: convert to v4l2_subdev.
[linux-2.6-block.git] / drivers / media / video / tvaudio.c
CommitLineData
1da177e4 1/*
b4ab114c 2 * Driver for simple i2c audio chips.
1da177e4
LT		 3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
b4ab114c
MCC		 10 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
11 * - Some cleanups, code fixes, etc
12 * - Convert it to V4L2 API
13 *
1da177e4
LT		 14 * This code is placed under the terms of the GNU General Public License
15 *
16 * OPTIONS:
17 * debug - set to 1 if you'd like to see debug messages
18 *
19 */
20
1da177e4 21#include <linux/module.h>
1da177e4
LT		 22#include <linux/kernel.h>
23#include <linux/sched.h>
24#include <linux/string.h>
25#include <linux/timer.h>
26#include <linux/delay.h>
27#include <linux/errno.h>
28#include <linux/slab.h>
29#include <linux/videodev.h>
30#include <linux/i2c.h>
1da177e4 31#include <linux/init.h>
bc282879 32#include <linux/kthread.h>
7dfb7103 33#include <linux/freezer.h>
1da177e4 34
8bf2f8e7 35#include <media/tvaudio.h>
5e453dc7 36#include <media/v4l2-common.h>
c6241b6c 37#include <media/v4l2-ioctl.h>
74cab31c 38#include <media/v4l2-chip-ident.h>
08e14054 39#include <media/v4l2-i2c-drv-legacy.h>
1da177e4 40
7c9b5048 41#include <media/i2c-addr.h>
1da177e4
LT		 42
43/* ---------------------------------------------------------------------- */
44/* insmod args */
45
ff699e6b 46static int debug; /* insmod parameter */
1da177e4
LT		 47module_param(debug, int, 0644);
48
49MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
50MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
51MODULE_LICENSE("GPL");
52
53#define UNSET (-1U)
18fc59e2 54
1da177e4
LT		 55/* ---------------------------------------------------------------------- */
56/* our structs */
57
58#define MAXREGS 64
59
60struct CHIPSTATE;
61typedef int (*getvalue)(int);
62typedef int (*checkit)(struct CHIPSTATE*);
63typedef int (*initialize)(struct CHIPSTATE*);
64typedef int (*getmode)(struct CHIPSTATE*);
65typedef void (*setmode)(struct CHIPSTATE*, int mode);
1da177e4
LT		 66
67/* i2c command */
68typedef struct AUDIOCMD {
69 int count; /* # of bytes to send */
70 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
71} audiocmd;
72
73/* chip description */
74struct CHIPDESC {
75 char *name; /* chip name */
1da177e4
LT		 76 int addr_lo, addr_hi; /* i2c address range */
77 int registers; /* # of registers */
78
79 int *insmodopt;
80 checkit checkit;
81 initialize initialize;
82 int flags;
83#define CHIP_HAS_VOLUME 1
84#define CHIP_HAS_BASSTREBLE 2
85#define CHIP_HAS_INPUTSEL 4
dd03e970 86#define CHIP_NEED_CHECKMODE 8
1da177e4
LT		 87
88 /* various i2c command sequences */
89 audiocmd init;
90
91 /* which register has which value */
92 int leftreg,rightreg,treblereg,bassreg;
93
94 /* initialize with (defaults to 65535/65535/32768/32768 */
95 int leftinit,rightinit,trebleinit,bassinit;
96
97 /* functions to convert the values (v4l -> chip) */
98 getvalue volfunc,treblefunc,bassfunc;
99
100 /* get/set mode */
101 getmode getmode;
102 setmode setmode;
103
1da177e4
LT		 104 /* input switch register + values for v4l inputs */
105 int inputreg;
8bf2f8e7 106 int inputmap[4];
1da177e4
LT		 107 int inputmute;
108 int inputmask;
109};
1da177e4
LT		 110
111/* current state of the chip */
112struct CHIPSTATE {
08e14054 113 struct i2c_client *c;
1da177e4 114
81cb5c4f
MCC		 115 /* chip-specific description - should point to
116 an entry at CHIPDESC table */
117 struct CHIPDESC *desc;
1da177e4
LT		 118
119 /* shadow register set */
120 audiocmd shadow;
121
122 /* current settings */
8bf2f8e7 123 __u16 left,right,treble,bass,muted,mode;
1da177e4 124 int prevmode;
8a854284 125 int radio;
8bf2f8e7 126 int input;
1da177e4
LT		 127
128 /* thread */
bc282879 129 struct task_struct *thread;
1da177e4 130 struct timer_list wt;
1da177e4 131 int watch_stereo;
8a4b275f 132 int audmode;
1da177e4
LT		 133};
134
1da177e4
LT		 135/* ---------------------------------------------------------------------- */
136/* i2c addresses */
137
138static unsigned short normal_i2c[] = {
09df1c16
MCC		 139 I2C_ADDR_TDA8425 >> 1,
140 I2C_ADDR_TEA6300 >> 1,
141 I2C_ADDR_TEA6420 >> 1,
142 I2C_ADDR_TDA9840 >> 1,
143 I2C_ADDR_TDA985x_L >> 1,
144 I2C_ADDR_TDA985x_H >> 1,
145 I2C_ADDR_TDA9874 >> 1,
146 I2C_ADDR_PIC16C54 >> 1,
1da177e4 147 I2C_CLIENT_END };
1da177e4
LT		 148I2C_CLIENT_INSMOD;
149
1da177e4
LT		 150/* ---------------------------------------------------------------------- */
151/* i2c I/O functions */
152
153static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
154{
155 unsigned char buffer[2];
156
49426437 157 if (subaddr < 0) {
08e14054
HV		 158 v4l_dbg(1, debug, chip->c, "%s: chip_write: 0x%x\n",
159 chip->c->name, val);
1da177e4
LT		 160 chip->shadow.bytes[1] = val;
161 buffer[0] = val;
08e14054
HV		 162 if (1 != i2c_master_send(chip->c,buffer,1)) {
163 v4l_warn(chip->c, "%s: I/O error (write 0x%x)\n",
164 chip->c->name, val);
1da177e4
LT		 165 return -1;
166 }
167 } else {
49426437
MCC		 168 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
169 v4l_info(chip->c,
170 "Tried to access a non-existent register: %d\n",
171 subaddr);
172 return -EINVAL;
173 }
174
08e14054
HV		 175 v4l_dbg(1, debug, chip->c, "%s: chip_write: reg%d=0x%x\n",
176 chip->c->name, subaddr, val);
1da177e4
LT		 177 chip->shadow.bytes[subaddr+1] = val;
178 buffer[0] = subaddr;
179 buffer[1] = val;
08e14054
HV		 180 if (2 != i2c_master_send(chip->c,buffer,2)) {
181 v4l_warn(chip->c, "%s: I/O error (write reg%d=0x%x)\n",
182 chip->c->name, subaddr, val);
1da177e4
LT		 183 return -1;
184 }
185 }
186 return 0;
187}
188
49426437
MCC		 189static int chip_write_masked(struct CHIPSTATE *chip,
190 int subaddr, int val, int mask)
1da177e4
LT		 191{
192 if (mask != 0) {
49426437 193 if (subaddr < 0) {
1da177e4
LT		 194 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
195 } else {
49426437
MCC		 196 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
197 v4l_info(chip->c,
198 "Tried to access a non-existent register: %d\n",
199 subaddr);
200 return -EINVAL;
201 }
202
1da177e4
LT		 203 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
204 }
205 }
206 return chip_write(chip, subaddr, val);
207}
208
209static int chip_read(struct CHIPSTATE *chip)
210{
211 unsigned char buffer;
212
08e14054
HV		 213 if (1 != i2c_master_recv(chip->c,&buffer,1)) {
214 v4l_warn(chip->c, "%s: I/O error (read)\n",
215 chip->c->name);
1da177e4
LT		 216 return -1;
217 }
08e14054 218 v4l_dbg(1, debug, chip->c, "%s: chip_read: 0x%x\n",chip->c->name, buffer);
1da177e4
LT		 219 return buffer;
220}
221
222static int chip_read2(struct CHIPSTATE *chip, int subaddr)
223{
18fc59e2
MCC		 224 unsigned char write[1];
225 unsigned char read[1];
226 struct i2c_msg msgs[2] = {
08e14054
HV		 227 { chip->c->addr, 0, 1, write },
228 { chip->c->addr, I2C_M_RD, 1, read }
18fc59e2
MCC		 229 };
230 write[0] = subaddr;
1da177e4 231
08e14054
HV		 232 if (2 != i2c_transfer(chip->c->adapter,msgs,2)) {
233 v4l_warn(chip->c, "%s: I/O error (read2)\n", chip->c->name);
1da177e4
LT		 234 return -1;
235 }
08e14054
HV		 236 v4l_dbg(1, debug, chip->c, "%s: chip_read2: reg%d=0x%x\n",
237 chip->c->name, subaddr,read[0]);
1da177e4
LT		 238 return read[0];
239}
240
241static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
242{
243 int i;
244
245 if (0 == cmd->count)
246 return 0;
247
49426437
MCC		 248 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
249 v4l_info(chip->c,
250 "Tried to access a non-existent register range: %d to %d\n",
251 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
252 return -EINVAL;
253 }
254
255 /* FIXME: it seems that the shadow bytes are wrong bellow !*/
256
1da177e4 257 /* update our shadow register set; print bytes if (debug > 0) */
08e14054
HV		 258 v4l_dbg(1, debug, chip->c, "%s: chip_cmd(%s): reg=%d, data:",
259 chip->c->name, name,cmd->bytes[0]);
1da177e4 260 for (i = 1; i < cmd->count; i++) {
18fc59e2
MCC		 261 if (debug)
262 printk(" 0x%x",cmd->bytes[i]);
1da177e4
LT		 263 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
264 }
18fc59e2
MCC		 265 if (debug)
266 printk("\n");
1da177e4
LT		 267
268 /* send data to the chip */
08e14054
HV		 269 if (cmd->count != i2c_master_send(chip->c,cmd->bytes,cmd->count)) {
270 v4l_warn(chip->c, "%s: I/O error (%s)\n", chip->c->name, name);
1da177e4
LT		 271 return -1;
272 }
273 return 0;
274}
275
276/* ---------------------------------------------------------------------- */
277/* kernel thread for doing i2c stuff asyncronly
278 * right now it is used only to check the audio mode (mono/stereo/whatever)
279 * some time after switching to another TV channel, then turn on stereo
280 * if available, ...
281 */
282
283static void chip_thread_wake(unsigned long data)
284{
18fc59e2 285 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
bc282879 286 wake_up_process(chip->thread);
1da177e4
LT		 287}
288
289static int chip_thread(void *data)
290{
18fc59e2 291 struct CHIPSTATE *chip = data;
81cb5c4f 292 struct CHIPDESC *desc = chip->desc;
dd03e970 293 int mode;
1da177e4 294
08e14054 295 v4l_dbg(1, debug, chip->c, "%s: thread started\n", chip->c->name);
83144186 296 set_freezable();
1da177e4 297 for (;;) {
bc282879
CLG		 298 set_current_state(TASK_INTERRUPTIBLE);
299 if (!kthread_should_stop())
1da177e4 300 schedule();
bc282879 301 set_current_state(TASK_RUNNING);
5e50e7a9 302 try_to_freeze();
bc282879 303 if (kthread_should_stop())
1da177e4 304 break;
08e14054 305 v4l_dbg(1, debug, chip->c, "%s: thread wakeup\n", chip->c->name);
1da177e4
LT		 306
307 /* don't do anything for radio or if mode != auto */
8a854284 308 if (chip->radio || chip->mode != 0)
1da177e4
LT		 309 continue;
310
311 /* have a look what's going on */
dd03e970
MCC		 312 mode = desc->getmode(chip);
313 if (mode == chip->prevmode)
314 continue;
315
316 /* chip detected a new audio mode - set it */
317 v4l_dbg(1, debug, chip->c, "%s: thread checkmode\n",
318 chip->c->name);
319
320 chip->prevmode = mode;
321
322 if (mode & V4L2_TUNER_MODE_STEREO)
323 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
324 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
325 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
326 else if (mode & V4L2_TUNER_MODE_LANG1)
327 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
328 else if (mode & V4L2_TUNER_MODE_LANG2)
329 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
330 else
331 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1da177e4
LT		 332
333 /* schedule next check */
09df5cbe 334 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1da177e4
LT		 335 }
336
08e14054 337 v4l_dbg(1, debug, chip->c, "%s: thread exiting\n", chip->c->name);
1da177e4
LT		 338 return 0;
339}
340
1da177e4
LT		 341/* ---------------------------------------------------------------------- */
342/* audio chip descriptions - defines+functions for tda9840 */
343
344#define TDA9840_SW 0x00
345#define TDA9840_LVADJ 0x02
346#define TDA9840_STADJ 0x03
347#define TDA9840_TEST 0x04
348
349#define TDA9840_MONO 0x10
350#define TDA9840_STEREO 0x2a
351#define TDA9840_DUALA 0x12
352#define TDA9840_DUALB 0x1e
353#define TDA9840_DUALAB 0x1a
354#define TDA9840_DUALBA 0x16
355#define TDA9840_EXTERNAL 0x7a
356
357#define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
358#define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
359#define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
360
361#define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
362#define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
363
364static int tda9840_getmode(struct CHIPSTATE *chip)
365{
366 int val, mode;
367
368 val = chip_read(chip);
dc3d75da 369 mode = V4L2_TUNER_MODE_MONO;
1da177e4 370 if (val & TDA9840_DS_DUAL)
dc3d75da 371 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4 372 if (val & TDA9840_ST_STEREO)
dc3d75da 373 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 374
08e14054 375 v4l_dbg(1, debug, chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 376 val, mode);
1da177e4
LT		 377 return mode;
378}
379
380static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
381{
382 int update = 1;
383 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
384
385 switch (mode) {
dc3d75da 386 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 387 t |= TDA9840_MONO;
388 break;
dc3d75da 389 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 390 t |= TDA9840_STEREO;
391 break;
dc3d75da 392 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 393 t |= TDA9840_DUALA;
394 break;
dc3d75da 395 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 396 t |= TDA9840_DUALB;
397 break;
398 default:
399 update = 0;
400 }
401
402 if (update)
403 chip_write(chip, TDA9840_SW, t);
404}
405
94f9e56e
HV		 406static int tda9840_checkit(struct CHIPSTATE *chip)
407{
408 int rc;
409 rc = chip_read(chip);
410 /* lower 5 bits should be 0 */
411 return ((rc & 0x1f) == 0) ? 1 : 0;
412}
413
1da177e4
LT		 414/* ---------------------------------------------------------------------- */
415/* audio chip descriptions - defines+functions for tda985x */
416
417/* subaddresses for TDA9855 */
418#define TDA9855_VR 0x00 /* Volume, right */
419#define TDA9855_VL 0x01 /* Volume, left */
420#define TDA9855_BA 0x02 /* Bass */
421#define TDA9855_TR 0x03 /* Treble */
422#define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
423
424/* subaddresses for TDA9850 */
425#define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
426
427/* subaddesses for both chips */
428#define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
429#define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
430#define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
431#define TDA985x_A1 0x08 /* Alignment 1 for both chips */
432#define TDA985x_A2 0x09 /* Alignment 2 for both chips */
433#define TDA985x_A3 0x0a /* Alignment 3 for both chips */
434
435/* Masks for bits in TDA9855 subaddresses */
436/* 0x00 - VR in TDA9855 */
437/* 0x01 - VL in TDA9855 */
438/* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
439 * in 1dB steps - mute is 0x27 */
440
441
442/* 0x02 - BA in TDA9855 */
443/* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
444 * in .5dB steps - 0 is 0x0E */
445
446
447/* 0x03 - TR in TDA9855 */
448/* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
449 * in 3dB steps - 0 is 0x7 */
450
451/* Masks for bits in both chips' subaddresses */
452/* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
453/* Unique to TDA9855: */
454/* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
455 * in 3dB steps - mute is 0x0 */
456
457/* Unique to TDA9850: */
458/* lower 4 bits control stereo noise threshold, over which stereo turns off
459 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
460
461
462/* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
463/* Unique to TDA9855: */
464#define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
465#define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
466#define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
467#define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
468 /* Bits 0 to 3 select various combinations
4ac97914
MCC		 469 * of line in and line out, only the
470 * interesting ones are defined */
1da177e4
LT		 471#define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
472#define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
473
474/* Unique to TDA9850: */
475/* lower 4 bits contol SAP noise threshold, over which SAP turns off
476 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
477
478
479/* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
480/* Common to TDA9855 and TDA9850: */
481#define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
482#define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
483#define TDA985x_MONO 0 /* Forces Mono output */
484#define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
485
486/* Unique to TDA9855: */
487#define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
488#define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
489#define TDA9855_LINEAR 0 /* Linear Stereo */
490#define TDA9855_PSEUDO 1 /* Pseudo Stereo */
491#define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
492#define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
493#define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
494
495/* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
496/* Common to both TDA9855 and TDA9850: */
497/* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
498 * in .5dB steps - 0dB is 0x7 */
499
500/* 0x08, 0x09 - A1 and A2 (read/write) */
501/* Common to both TDA9855 and TDA9850: */
502/* lower 5 bites are wideband and spectral expander alignment
503 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
504#define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
505#define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
506#define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
507
508/* 0x0a - A3 */
509/* Common to both TDA9855 and TDA9850: */
510/* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
511 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
512#define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
513
514static int tda9855_volume(int val) { return val/0x2e8+0x27; }
515static int tda9855_bass(int val) { return val/0xccc+0x06; }
516static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
517
518static int tda985x_getmode(struct CHIPSTATE *chip)
519{
520 int mode;
521
522 mode = ((TDA985x_STP | TDA985x_SAPP) &
523 chip_read(chip)) >> 4;
524 /* Add mono mode regardless of SAP and stereo */
525 /* Allows forced mono */
dc3d75da 526 return mode | V4L2_TUNER_MODE_MONO;
1da177e4
LT		 527}
528
529static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
530{
531 int update = 1;
532 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
533
534 switch (mode) {
dc3d75da 535 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 536 c6 |= TDA985x_MONO;
537 break;
dc3d75da 538 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 539 c6 |= TDA985x_STEREO;
540 break;
dc3d75da 541 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 542 c6 |= TDA985x_SAP;
543 break;
544 default:
545 update = 0;
546 }
547 if (update)
548 chip_write(chip,TDA985x_C6,c6);
549}
550
551
552/* ---------------------------------------------------------------------- */
553/* audio chip descriptions - defines+functions for tda9873h */
554
555/* Subaddresses for TDA9873H */
556
557#define TDA9873_SW 0x00 /* Switching */
558#define TDA9873_AD 0x01 /* Adjust */
559#define TDA9873_PT 0x02 /* Port */
560
561/* Subaddress 0x00: Switching Data
562 * B7..B0:
563 *
564 * B1, B0: Input source selection
565 * 0, 0 internal
566 * 1, 0 external stereo
567 * 0, 1 external mono
568 */
569#define TDA9873_INP_MASK 3
570#define TDA9873_INTERNAL 0
571#define TDA9873_EXT_STEREO 2
572#define TDA9873_EXT_MONO 1
573
574/* B3, B2: output signal select
575 * B4 : transmission mode
576 * 0, 0, 1 Mono
577 * 1, 0, 0 Stereo
578 * 1, 1, 1 Stereo (reversed channel)
579 * 0, 0, 0 Dual AB
580 * 0, 0, 1 Dual AA
581 * 0, 1, 0 Dual BB
582 * 0, 1, 1 Dual BA
583 */
584
585#define TDA9873_TR_MASK (7 << 2)
586#define TDA9873_TR_MONO 4
587#define TDA9873_TR_STEREO 1 << 4
588#define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
589#define TDA9873_TR_DUALA 1 << 2
590#define TDA9873_TR_DUALB 1 << 3
591
592/* output level controls
593 * B5: output level switch (0 = reduced gain, 1 = normal gain)
594 * B6: mute (1 = muted)
595 * B7: auto-mute (1 = auto-mute enabled)
596 */
597
598#define TDA9873_GAIN_NORMAL 1 << 5
599#define TDA9873_MUTE 1 << 6
600#define TDA9873_AUTOMUTE 1 << 7
601
602/* Subaddress 0x01: Adjust/standard */
603
604/* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
605 * Recommended value is +0 dB
606 */
607
608#define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
609
610/* Bits C6..C4 control FM stantard
611 * C6, C5, C4
612 * 0, 0, 0 B/G (PAL FM)
613 * 0, 0, 1 M
614 * 0, 1, 0 D/K(1)
615 * 0, 1, 1 D/K(2)
616 * 1, 0, 0 D/K(3)
617 * 1, 0, 1 I
618 */
619#define TDA9873_BG 0
620#define TDA9873_M 1
621#define TDA9873_DK1 2
622#define TDA9873_DK2 3
623#define TDA9873_DK3 4
624#define TDA9873_I 5
625
626/* C7 controls identification response time (1=fast/0=normal)
627 */
628#define TDA9873_IDR_NORM 0
629#define TDA9873_IDR_FAST 1 << 7
630
631
632/* Subaddress 0x02: Port data */
633
634/* E1, E0 free programmable ports P1/P2
635 0, 0 both ports low
636 0, 1 P1 high
637 1, 0 P2 high
638 1, 1 both ports high
639*/
640
641#define TDA9873_PORTS 3
642
643/* E2: test port */
644#define TDA9873_TST_PORT 1 << 2
645
646/* E5..E3 control mono output channel (together with transmission mode bit B4)
647 *
648 * E5 E4 E3 B4 OUTM
649 * 0 0 0 0 mono
650 * 0 0 1 0 DUAL B
651 * 0 1 0 1 mono (from stereo decoder)
652 */
653#define TDA9873_MOUT_MONO 0
654#define TDA9873_MOUT_FMONO 0
655#define TDA9873_MOUT_DUALA 0
656#define TDA9873_MOUT_DUALB 1 << 3
657#define TDA9873_MOUT_ST 1 << 4
658#define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
659#define TDA9873_MOUT_EXTL 1 << 5
660#define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
661#define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
662#define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
663
664/* Status bits: (chip read) */
665#define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
666#define TDA9873_STEREO 2 /* Stereo sound is identified */
667#define TDA9873_DUAL 4 /* Dual sound is identified */
668
669static int tda9873_getmode(struct CHIPSTATE *chip)
670{
671 int val,mode;
672
673 val = chip_read(chip);
dc3d75da 674 mode = V4L2_TUNER_MODE_MONO;
1da177e4 675 if (val & TDA9873_STEREO)
dc3d75da 676 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 677 if (val & TDA9873_DUAL)
dc3d75da 678 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
08e14054 679 v4l_dbg(1, debug, chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 680 val, mode);
1da177e4
LT		 681 return mode;
682}
683
684static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
685{
686 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
687 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
688
689 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
08e14054 690 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): external input\n");
1da177e4
LT		 691 return;
692 }
693
08e14054
HV		 694 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
695 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
1da177e4
LT		 696
697 switch (mode) {
dc3d75da 698 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 699 sw_data |= TDA9873_TR_MONO;
700 break;
dc3d75da 701 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 702 sw_data |= TDA9873_TR_STEREO;
703 break;
dc3d75da 704 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 705 sw_data |= TDA9873_TR_DUALA;
706 break;
dc3d75da 707 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 708 sw_data |= TDA9873_TR_DUALB;
709 break;
710 default:
711 chip->mode = 0;
712 return;
713 }
714
715 chip_write(chip, TDA9873_SW, sw_data);
08e14054 716 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
1da177e4
LT		 717 mode, sw_data);
718}
719
720static int tda9873_checkit(struct CHIPSTATE *chip)
721{
722 int rc;
723
724 if (-1 == (rc = chip_read2(chip,254)))
725 return 0;
726 return (rc & ~0x1f) == 0x80;
727}
728
729
730/* ---------------------------------------------------------------------- */
731/* audio chip description - defines+functions for tda9874h and tda9874a */
732/* Dariusz Kowalewski <darekk@automex.pl> */
733
734/* Subaddresses for TDA9874H and TDA9874A (slave rx) */
735#define TDA9874A_AGCGR 0x00 /* AGC gain */
736#define TDA9874A_GCONR 0x01 /* general config */
737#define TDA9874A_MSR 0x02 /* monitor select */
738#define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
739#define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
740#define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
741#define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
742#define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
743#define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
744#define TDA9874A_DCR 0x09 /* demodulator config */
745#define TDA9874A_FMER 0x0a /* FM de-emphasis */
746#define TDA9874A_FMMR 0x0b /* FM dematrix */
747#define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
748#define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
749#define TDA9874A_NCONR 0x0e /* NICAM config */
750#define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
751#define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
752#define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
753#define TDA9874A_AMCONR 0x12 /* audio mute control */
754#define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
755#define TDA9874A_AOSR 0x14 /* analog output select */
756#define TDA9874A_DAICONR 0x15 /* digital audio interface config */
757#define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
758#define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
759#define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
760#define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
761
762/* Subaddresses for TDA9874H and TDA9874A (slave tx) */
763#define TDA9874A_DSR 0x00 /* device status */
764#define TDA9874A_NSR 0x01 /* NICAM status */
765#define TDA9874A_NECR 0x02 /* NICAM error count */
766#define TDA9874A_DR1 0x03 /* add. data LSB */
767#define TDA9874A_DR2 0x04 /* add. data MSB */
768#define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
769#define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
770#define TDA9874A_SIFLR 0x07 /* SIF level */
771#define TDA9874A_TR2 252 /* test reg. 2 */
772#define TDA9874A_TR1 253 /* test reg. 1 */
773#define TDA9874A_DIC 254 /* device id. code */
774#define TDA9874A_SIC 255 /* software id. code */
775
776
777static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
778static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
779static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
780static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
781static int tda9874a_dic = -1; /* device id. code */
782
783/* insmod options for tda9874a */
784static unsigned int tda9874a_SIF = UNSET;
785static unsigned int tda9874a_AMSEL = UNSET;
786static unsigned int tda9874a_STD = UNSET;
787module_param(tda9874a_SIF, int, 0444);
788module_param(tda9874a_AMSEL, int, 0444);
789module_param(tda9874a_STD, int, 0444);
790
791/*
792 * initialization table for tda9874 decoder:
793 * - carrier 1 freq. registers (3 bytes)
794 * - carrier 2 freq. registers (3 bytes)
795 * - demudulator config register
796 * - FM de-emphasis register (slow identification mode)
797 * Note: frequency registers must be written in single i2c transfer.
798 */
799static struct tda9874a_MODES {
800 char *name;
801 audiocmd cmd;
802} tda9874a_modelist[9] = {
04e6f990 803 { "A2, B/G", /* default */
1da177e4
LT		 804 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
805 { "A2, M (Korea)",
806 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
807 { "A2, D/K (1)",
808 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
809 { "A2, D/K (2)",
810 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
811 { "A2, D/K (3)",
812 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
813 { "NICAM, I",
814 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
815 { "NICAM, B/G",
816 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
04e6f990 817 { "NICAM, D/K",
1da177e4
LT		 818 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
819 { "NICAM, L",
820 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
821};
822
823static int tda9874a_setup(struct CHIPSTATE *chip)
824{
825 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
826 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
827 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
828 if(tda9874a_dic == 0x11) {
829 chip_write(chip, TDA9874A_FMMR, 0x80);
830 } else { /* dic == 0x07 */
831 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
832 chip_write(chip, TDA9874A_FMMR, 0x00);
833 }
834 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
835 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
836 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
837 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
838 /* Note: If signal quality is poor you may want to change NICAM */
839 /* error limit registers (NLELR and NUELR) to some greater values. */
840 /* Then the sound would remain stereo, but won't be so clear. */
841 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
842 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
843
844 if(tda9874a_dic == 0x11) {
845 chip_write(chip, TDA9874A_AMCONR, 0xf9);
846 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
847 chip_write(chip, TDA9874A_AOSR, 0x80);
848 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
849 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
850 } else { /* dic == 0x07 */
851 chip_write(chip, TDA9874A_AMCONR, 0xfb);
852 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
18fc59e2 853 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
1da177e4 854 }
08e14054 855 v4l_dbg(1, debug, chip->c, "tda9874a_setup(): %s [0x%02X].\n",
1da177e4
LT		 856 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
857 return 1;
858}
859
860static int tda9874a_getmode(struct CHIPSTATE *chip)
861{
862 int dsr,nsr,mode;
863 int necr; /* just for debugging */
864
dc3d75da 865 mode = V4L2_TUNER_MODE_MONO;
1da177e4
LT		 866
867 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
868 return mode;
869 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
870 return mode;
871 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
872 return mode;
873
874 /* need to store dsr/nsr somewhere */
875 chip->shadow.bytes[MAXREGS-2] = dsr;
876 chip->shadow.bytes[MAXREGS-1] = nsr;
877
878 if(tda9874a_mode) {
879 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
880 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
881 * that sound has (temporarily) switched from NICAM to
882 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
883 * error count. So in fact there is no stereo in this case :-(
dc3d75da 884 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
1da177e4
LT		 885 * external 4052 multiplexer in audio_hook().
886 */
1da177e4 887 if(nsr & 0x02) /* NSR.S/MB=1 */
dc3d75da 888 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 889 if(nsr & 0x01) /* NSR.D/SB=1 */
dc3d75da 890 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4
LT		 891 } else {
892 if(dsr & 0x02) /* DSR.IDSTE=1 */
dc3d75da 893 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 894 if(dsr & 0x04) /* DSR.IDDUA=1 */
dc3d75da 895 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4
LT		 896 }
897
08e14054 898 v4l_dbg(1, debug, chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
1da177e4
LT		 899 dsr, nsr, necr, mode);
900 return mode;
901}
902
903static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
904{
905 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
906 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
907 if(tda9874a_mode) {
908 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
909 tda9874a_NCONR &= 0xfe; /* enable */
910 else
911 tda9874a_NCONR |= 0x01; /* disable */
912 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
913 }
914
915 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
916 * and has auto-select function for audio output (AOSR register).
917 * Old TDA9874H doesn't support these features.
918 * TDA9874A also has additional mono output pin (OUTM), which
919 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
920 */
921 if(tda9874a_dic == 0x11) {
922 int aosr = 0x80;
923 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
924
925 switch(mode) {
dc3d75da
MCC		 926 case V4L2_TUNER_MODE_MONO:
927 case V4L2_TUNER_MODE_STEREO:
1da177e4 928 break;
dc3d75da 929 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 930 aosr = 0x80; /* auto-select, dual A/A */
931 mdacosr = (tda9874a_mode) ? 0x82:0x80;
932 break;
dc3d75da 933 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 934 aosr = 0xa0; /* auto-select, dual B/B */
935 mdacosr = (tda9874a_mode) ? 0x83:0x81;
936 break;
937 default:
938 chip->mode = 0;
939 return;
940 }
941 chip_write(chip, TDA9874A_AOSR, aosr);
942 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
943
08e14054 944 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1da177e4
LT		 945 mode, aosr, mdacosr);
946
947 } else { /* dic == 0x07 */
948 int fmmr,aosr;
949
950 switch(mode) {
dc3d75da 951 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 952 fmmr = 0x00; /* mono */
953 aosr = 0x10; /* A/A */
954 break;
dc3d75da 955 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 956 if(tda9874a_mode) {
957 fmmr = 0x00;
958 aosr = 0x00; /* handled by NICAM auto-mute */
959 } else {
960 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
961 aosr = 0x00;
962 }
963 break;
dc3d75da 964 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 965 fmmr = 0x02; /* dual */
966 aosr = 0x10; /* dual A/A */
967 break;
dc3d75da 968 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 969 fmmr = 0x02; /* dual */
970 aosr = 0x20; /* dual B/B */
971 break;
972 default:
973 chip->mode = 0;
974 return;
975 }
976 chip_write(chip, TDA9874A_FMMR, fmmr);
977 chip_write(chip, TDA9874A_AOSR, aosr);
978
08e14054 979 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1da177e4
LT		 980 mode, fmmr, aosr);
981 }
982}
983
984static int tda9874a_checkit(struct CHIPSTATE *chip)
985{
986 int dic,sic; /* device id. and software id. codes */
987
988 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
989 return 0;
990 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
991 return 0;
992
08e14054 993 v4l_dbg(1, debug, chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1da177e4
LT		 994
995 if((dic == 0x11)||(dic == 0x07)) {
08e14054 996 v4l_info(chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
1da177e4
LT		 997 tda9874a_dic = dic; /* remember device id. */
998 return 1;
999 }
1000 return 0; /* not found */
1001}
1002
1003static int tda9874a_initialize(struct CHIPSTATE *chip)
1004{
1005 if (tda9874a_SIF > 2)
1006 tda9874a_SIF = 1;
04e6f990 1007 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1da177e4
LT		 1008 tda9874a_STD = 0;
1009 if(tda9874a_AMSEL > 1)
1010 tda9874a_AMSEL = 0;
1011
1012 if(tda9874a_SIF == 1)
1013 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1014 else
1015 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1016
1017 tda9874a_ESP = tda9874a_STD;
1018 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1019
1020 if(tda9874a_AMSEL == 0)
1021 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1022 else
1023 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1024
1025 tda9874a_setup(chip);
1026 return 0;
1027}
1028
1029
1030/* ---------------------------------------------------------------------- */
1031/* audio chip descriptions - defines+functions for tea6420 */
1032
1033#define TEA6300_VL 0x00 /* volume left */
1034#define TEA6300_VR 0x01 /* volume right */
1035#define TEA6300_BA 0x02 /* bass */
1036#define TEA6300_TR 0x03 /* treble */
1037#define TEA6300_FA 0x04 /* fader control */
1038#define TEA6300_S 0x05 /* switch register */
f2421ca3 1039 /* values for those registers: */
1da177e4
LT		 1040#define TEA6300_S_SA 0x01 /* stereo A input */
1041#define TEA6300_S_SB 0x02 /* stereo B */
1042#define TEA6300_S_SC 0x04 /* stereo C */
1043#define TEA6300_S_GMU 0x80 /* general mute */
1044
1045#define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1046#define TEA6320_FFR 0x01 /* fader front right (0-5) */
1047#define TEA6320_FFL 0x02 /* fader front left (0-5) */
1048#define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1049#define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1050#define TEA6320_BA 0x05 /* bass (0-4) */
1051#define TEA6320_TR 0x06 /* treble (0-4) */
1052#define TEA6320_S 0x07 /* switch register */
f2421ca3 1053 /* values for those registers: */
1da177e4
LT		 1054#define TEA6320_S_SA 0x07 /* stereo A input */
1055#define TEA6320_S_SB 0x06 /* stereo B */
1056#define TEA6320_S_SC 0x05 /* stereo C */
1057#define TEA6320_S_SD 0x04 /* stereo D */
1058#define TEA6320_S_GMU 0x80 /* general mute */
1059
1060#define TEA6420_S_SA 0x00 /* stereo A input */
1061#define TEA6420_S_SB 0x01 /* stereo B */
1062#define TEA6420_S_SC 0x02 /* stereo C */
1063#define TEA6420_S_SD 0x03 /* stereo D */
1064#define TEA6420_S_SE 0x04 /* stereo E */
1065#define TEA6420_S_GMU 0x05 /* general mute */
1066
1067static int tea6300_shift10(int val) { return val >> 10; }
1068static int tea6300_shift12(int val) { return val >> 12; }
1069
1070/* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1071/* 0x0c mirror those immediately higher) */
1072static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1073static int tea6320_shift11(int val) { return val >> 11; }
1074static int tea6320_initialize(struct CHIPSTATE * chip)
1075{
1076 chip_write(chip, TEA6320_FFR, 0x3f);
1077 chip_write(chip, TEA6320_FFL, 0x3f);
1078 chip_write(chip, TEA6320_FRR, 0x3f);
1079 chip_write(chip, TEA6320_FRL, 0x3f);
1080
1081 return 0;
1082}
1083
1084
1085/* ---------------------------------------------------------------------- */
1086/* audio chip descriptions - defines+functions for tda8425 */
1087
1088#define TDA8425_VL 0x00 /* volume left */
1089#define TDA8425_VR 0x01 /* volume right */
1090#define TDA8425_BA 0x02 /* bass */
1091#define TDA8425_TR 0x03 /* treble */
1092#define TDA8425_S1 0x08 /* switch functions */
f2421ca3 1093 /* values for those registers: */
1da177e4
LT		 1094#define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1095#define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1096#define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1097#define TDA8425_S1_MU 0x20 /* mute bit */
1098#define TDA8425_S1_STEREO 0x18 /* stereo bits */
1099#define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1100#define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1101#define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1102#define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1103#define TDA8425_S1_ML 0x06 /* language selector */
1104#define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1105#define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1106#define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1107#define TDA8425_S1_IS 0x01 /* channel selector */
1108
1109
1110static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1111static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1112
1113static int tda8425_initialize(struct CHIPSTATE *chip)
1114{
81cb5c4f 1115 struct CHIPDESC *desc = chip->desc;
8bf2f8e7
HV		 1116 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1117 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1da177e4 1118
08e14054 1119 if (chip->c->adapter->id == I2C_HW_B_RIVA) {
1da177e4
LT		 1120 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1121 }
1122 return 0;
1123}
1124
1125static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1126{
1127 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1128
dc3d75da 1129 if (mode & V4L2_TUNER_MODE_LANG1) {
1da177e4
LT		 1130 s1 |= TDA8425_S1_ML_SOUND_A;
1131 s1 |= TDA8425_S1_STEREO_PSEUDO;
1132
dc3d75da 1133 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1da177e4
LT		 1134 s1 |= TDA8425_S1_ML_SOUND_B;
1135 s1 |= TDA8425_S1_STEREO_PSEUDO;
1136
1137 } else {
1138 s1 |= TDA8425_S1_ML_STEREO;
1139
dc3d75da 1140 if (mode & V4L2_TUNER_MODE_MONO)
1da177e4 1141 s1 |= TDA8425_S1_STEREO_MONO;
dc3d75da 1142 if (mode & V4L2_TUNER_MODE_STEREO)
1da177e4
LT		 1143 s1 |= TDA8425_S1_STEREO_SPATIAL;
1144 }
1145 chip_write(chip,TDA8425_S1,s1);
1146}
1147
1148
1149/* ---------------------------------------------------------------------- */
1150/* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1151
1152/* the registers of 16C54, I2C sub address. */
1153#define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1154#define PIC16C54_REG_MISC 0x02
1155
1156/* bit definition of the RESET register, I2C data. */
1157#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
f2421ca3 1158 /* code of remote controller */
1da177e4
LT		 1159#define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1160#define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1161#define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1162#define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1163#define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1164#define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1165#define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1166
1167/* ---------------------------------------------------------------------- */
1168/* audio chip descriptions - defines+functions for TA8874Z */
1169
18fc59e2 1170/* write 1st byte */
1da177e4
LT		 1171#define TA8874Z_LED_STE 0x80
1172#define TA8874Z_LED_BIL 0x40
1173#define TA8874Z_LED_EXT 0x20
1174#define TA8874Z_MONO_SET 0x10
1175#define TA8874Z_MUTE 0x08
1176#define TA8874Z_F_MONO 0x04
1177#define TA8874Z_MODE_SUB 0x02
1178#define TA8874Z_MODE_MAIN 0x01
1179
18fc59e2
MCC		 1180/* write 2nd byte */
1181/*#define TA8874Z_TI 0x80 */ /* test mode */
1da177e4
LT		 1182#define TA8874Z_SEPARATION 0x3f
1183#define TA8874Z_SEPARATION_DEFAULT 0x10
1184
18fc59e2 1185/* read */
1da177e4
LT		 1186#define TA8874Z_B1 0x80
1187#define TA8874Z_B0 0x40
1188#define TA8874Z_CHAG_FLAG 0x20
1189
18fc59e2
MCC		 1190/*
1191 * B1 B0
1192 * mono L H
1193 * stereo L L
1194 * BIL H L
1195 */
1da177e4
LT		 1196static int ta8874z_getmode(struct CHIPSTATE *chip)
1197{
1198 int val, mode;
1199
1200 val = chip_read(chip);
dc3d75da 1201 mode = V4L2_TUNER_MODE_MONO;
1da177e4 1202 if (val & TA8874Z_B1){
dc3d75da 1203 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1da177e4 1204 }else if (!(val & TA8874Z_B0)){
dc3d75da 1205 mode |= V4L2_TUNER_MODE_STEREO;
1da177e4 1206 }
08e14054 1207 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1da177e4
LT		 1208 return mode;
1209}
1210
1211static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1212static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1213static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1214static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1215
1216static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1217{
1218 int update = 1;
1219 audiocmd *t = NULL;
08e14054 1220 v4l_dbg(1, debug, chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1da177e4
LT		 1221
1222 switch(mode){
dc3d75da 1223 case V4L2_TUNER_MODE_MONO:
1da177e4
LT		 1224 t = &ta8874z_mono;
1225 break;
dc3d75da 1226 case V4L2_TUNER_MODE_STEREO:
1da177e4
LT		 1227 t = &ta8874z_stereo;
1228 break;
dc3d75da 1229 case V4L2_TUNER_MODE_LANG1:
1da177e4
LT		 1230 t = &ta8874z_main;
1231 break;
dc3d75da 1232 case V4L2_TUNER_MODE_LANG2:
1da177e4
LT		 1233 t = &ta8874z_sub;
1234 break;
1235 default:
1236 update = 0;
1237 }
1238
1239 if(update)
1240 chip_cmd(chip, "TA8874Z", t);
1241}
1242
1243static int ta8874z_checkit(struct CHIPSTATE *chip)
1244{
1245 int rc;
1246 rc = chip_read(chip);
1247 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1248}
1249
1250/* ---------------------------------------------------------------------- */
1251/* audio chip descriptions - struct CHIPDESC */
1252
1253/* insmod options to enable/disable individual audio chips */
52c1da39
AB		 1254static int tda8425 = 1;
1255static int tda9840 = 1;
1256static int tda9850 = 1;
1257static int tda9855 = 1;
1258static int tda9873 = 1;
1259static int tda9874a = 1;
ff699e6b
DSL		 1260static int tea6300; /* default 0 - address clash with msp34xx */
1261static int tea6320; /* default 0 - address clash with msp34xx */
52c1da39
AB		 1262static int tea6420 = 1;
1263static int pic16c54 = 1;
ff699e6b 1264static int ta8874z; /* default 0 - address clash with tda9840 */
1da177e4
LT		 1265
1266module_param(tda8425, int, 0444);
1267module_param(tda9840, int, 0444);
1268module_param(tda9850, int, 0444);
1269module_param(tda9855, int, 0444);
1270module_param(tda9873, int, 0444);
1271module_param(tda9874a, int, 0444);
1272module_param(tea6300, int, 0444);
1273module_param(tea6320, int, 0444);
1274module_param(tea6420, int, 0444);
1275module_param(pic16c54, int, 0444);
1276module_param(ta8874z, int, 0444);
1277
1278static struct CHIPDESC chiplist[] = {
1279 {
1280 .name = "tda9840",
1da177e4 1281 .insmodopt = &tda9840,
09df1c16
MCC		 1282 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1283 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1da177e4 1284 .registers = 5,
dd03e970 1285 .flags = CHIP_NEED_CHECKMODE,
1da177e4 1286
af1a9951 1287 /* callbacks */
94f9e56e 1288 .checkit = tda9840_checkit,
1da177e4
LT		 1289 .getmode = tda9840_getmode,
1290 .setmode = tda9840_setmode,
1da177e4 1291
4ac97914 1292 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1da177e4
LT		 1293 /* ,TDA9840_SW, TDA9840_MONO */} }
1294 },
1295 {
1296 .name = "tda9873h",
1da177e4 1297 .insmodopt = &tda9873,
09df1c16
MCC		 1298 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1299 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4 1300 .registers = 3,
dd03e970 1301 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1da177e4 1302
af1a9951
MCC		 1303 /* callbacks */
1304 .checkit = tda9873_checkit,
1da177e4
LT		 1305 .getmode = tda9873_getmode,
1306 .setmode = tda9873_setmode,
1da177e4
LT		 1307
1308 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1309 .inputreg = TDA9873_SW,
1310 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
8bf2f8e7 1311 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1da177e4
LT		 1312 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1313
1314 },
1315 {
1316 .name = "tda9874h/a",
1da177e4 1317 .insmodopt = &tda9874a,
09df1c16
MCC		 1318 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1319 .addr_hi = I2C_ADDR_TDA9874 >> 1,
dd03e970 1320 .flags = CHIP_NEED_CHECKMODE,
1da177e4 1321
af1a9951
MCC		 1322 /* callbacks */
1323 .initialize = tda9874a_initialize,
1324 .checkit = tda9874a_checkit,
1da177e4
LT		 1325 .getmode = tda9874a_getmode,
1326 .setmode = tda9874a_setmode,
1da177e4
LT		 1327 },
1328 {
1329 .name = "tda9850",
1da177e4 1330 .insmodopt = &tda9850,
09df1c16
MCC		 1331 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1332 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4
LT		 1333 .registers = 11,
1334
1335 .getmode = tda985x_getmode,
1336 .setmode = tda985x_setmode,
1337
1338 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1339 },
1340 {
1341 .name = "tda9855",
1da177e4 1342 .insmodopt = &tda9855,
09df1c16
MCC		 1343 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1344 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4
LT		 1345 .registers = 11,
1346 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1347
1348 .leftreg = TDA9855_VL,
1349 .rightreg = TDA9855_VR,
1350 .bassreg = TDA9855_BA,
1351 .treblereg = TDA9855_TR,
af1a9951
MCC		 1352
1353 /* callbacks */
1da177e4
LT		 1354 .volfunc = tda9855_volume,
1355 .bassfunc = tda9855_bass,
1356 .treblefunc = tda9855_treble,
1da177e4
LT		 1357 .getmode = tda985x_getmode,
1358 .setmode = tda985x_setmode,
1359
1360 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1361 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1362 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1363 0x07, 0x10, 0x10, 0x03 }}
1364 },
1365 {
1366 .name = "tea6300",
1da177e4 1367 .insmodopt = &tea6300,
09df1c16
MCC		 1368 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1369 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1da177e4
LT		 1370 .registers = 6,
1371 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1372
1373 .leftreg = TEA6300_VR,
1374 .rightreg = TEA6300_VL,
1375 .bassreg = TEA6300_BA,
1376 .treblereg = TEA6300_TR,
af1a9951
MCC		 1377
1378 /* callbacks */
1da177e4
LT		 1379 .volfunc = tea6300_shift10,
1380 .bassfunc = tea6300_shift12,
1381 .treblefunc = tea6300_shift12,
1382
1383 .inputreg = TEA6300_S,
1384 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1385 .inputmute = TEA6300_S_GMU,
1386 },
1387 {
1388 .name = "tea6320",
1da177e4 1389 .insmodopt = &tea6320,
09df1c16
MCC		 1390 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1391 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1da177e4
LT		 1392 .registers = 8,
1393 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1394
1395 .leftreg = TEA6320_V,
1396 .rightreg = TEA6320_V,
1397 .bassreg = TEA6320_BA,
1398 .treblereg = TEA6320_TR,
af1a9951
MCC		 1399
1400 /* callbacks */
1401 .initialize = tea6320_initialize,
1da177e4
LT		 1402 .volfunc = tea6320_volume,
1403 .bassfunc = tea6320_shift11,
1404 .treblefunc = tea6320_shift11,
1405
1406 .inputreg = TEA6320_S,
1407 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1408 .inputmute = TEA6300_S_GMU,
1409 },
1410 {
1411 .name = "tea6420",
1da177e4 1412 .insmodopt = &tea6420,
09df1c16
MCC		 1413 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1414 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1da177e4
LT		 1415 .registers = 1,
1416 .flags = CHIP_HAS_INPUTSEL,
1417
1418 .inputreg = -1,
1419 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1420 .inputmute = TEA6300_S_GMU,
1421 },
1422 {
1423 .name = "tda8425",
1da177e4 1424 .insmodopt = &tda8425,
09df1c16
MCC		 1425 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1426 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1da177e4
LT		 1427 .registers = 9,
1428 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1429
1430 .leftreg = TDA8425_VL,
1431 .rightreg = TDA8425_VR,
1432 .bassreg = TDA8425_BA,
1433 .treblereg = TDA8425_TR,
af1a9951
MCC		 1434
1435 /* callbacks */
1436 .initialize = tda8425_initialize,
1da177e4
LT		 1437 .volfunc = tda8425_shift10,
1438 .bassfunc = tda8425_shift12,
1439 .treblefunc = tda8425_shift12,
af1a9951 1440 .setmode = tda8425_setmode,
1da177e4
LT		 1441
1442 .inputreg = TDA8425_S1,
1443 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1444 .inputmute = TDA8425_S1_OFF,
1445
1da177e4
LT		 1446 },
1447 {
1448 .name = "pic16c54 (PV951)",
1da177e4 1449 .insmodopt = &pic16c54,
09df1c16
MCC		 1450 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1451 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1da177e4
LT		 1452 .registers = 2,
1453 .flags = CHIP_HAS_INPUTSEL,
1454
1455 .inputreg = PIC16C54_REG_MISC,
1456 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1457 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1458 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
8bf2f8e7 1459 PIC16C54_MISC_SND_MUTE},
1da177e4
LT		 1460 .inputmute = PIC16C54_MISC_SND_MUTE,
1461 },
1462 {
1463 .name = "ta8874z",
1da177e4
LT		 1464 .checkit = ta8874z_checkit,
1465 .insmodopt = &ta8874z,
09df1c16
MCC		 1466 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1467 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1da177e4 1468 .registers = 2,
dd03e970 1469 .flags = CHIP_NEED_CHECKMODE,
1da177e4 1470
af1a9951 1471 /* callbacks */
1da177e4
LT		 1472 .getmode = ta8874z_getmode,
1473 .setmode = ta8874z_setmode,
1da177e4 1474
4ac97914 1475 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1da177e4
LT		 1476 },
1477 { .name = NULL } /* EOF */
1478};
1479
1480
1481/* ---------------------------------------------------------------------- */
1482/* i2c registration */
1483
d2653e92 1484static int chip_probe(struct i2c_client *client, const struct i2c_device_id *id)
1da177e4
LT		 1485{
1486 struct CHIPSTATE *chip;
1487 struct CHIPDESC *desc;
1488
08e14054
HV		 1489 if (debug) {
1490 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1491 printk(KERN_INFO "tvaudio: known chips: ");
1492 for (desc = chiplist; desc->name != NULL; desc++)
1493 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1494 printk("\n");
1495 }
1496
7408187d 1497 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1da177e4
LT		 1498 if (!chip)
1499 return -ENOMEM;
08e14054
HV		 1500 chip->c = client;
1501 i2c_set_clientdata(client, chip);
1da177e4
LT		 1502
1503 /* find description for the chip */
08e14054 1504 v4l_dbg(1, debug, client, "chip found @ 0x%x\n", client->addr<<1);
1da177e4
LT		 1505 for (desc = chiplist; desc->name != NULL; desc++) {
1506 if (0 == *(desc->insmodopt))
1507 continue;
08e14054
HV		 1508 if (client->addr < desc->addr_lo ||
1509 client->addr > desc->addr_hi)
1da177e4
LT		 1510 continue;
1511 if (desc->checkit && !desc->checkit(chip))
1512 continue;
1513 break;
1514 }
1515 if (desc->name == NULL) {
08e14054 1516 v4l_dbg(1, debug, client, "no matching chip description found\n");
5c653351 1517 kfree(chip);
1da177e4
LT		 1518 return -EIO;
1519 }
08e14054 1520 v4l_info(client, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
afd1a0c9 1521 if (desc->flags) {
08e14054 1522 v4l_dbg(1, debug, client, "matches:%s%s%s.\n",
674434c6
MCC		 1523 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1524 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1525 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
afd1a0c9 1526 }
1da177e4
LT		 1527
1528 /* fill required data structures */
ae429083
JD		 1529 if (!id)
1530 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
81cb5c4f 1531 chip->desc = desc;
1da177e4 1532 chip->shadow.count = desc->registers+1;
afd1a0c9 1533 chip->prevmode = -1;
8a4b275f 1534 chip->audmode = V4L2_TUNER_MODE_LANG1;
1da177e4
LT		 1535
1536 /* initialization */
1537 if (desc->initialize != NULL)
1538 desc->initialize(chip);
1539 else
1540 chip_cmd(chip,"init",&desc->init);
1541
1542 if (desc->flags & CHIP_HAS_VOLUME) {
099b7fcc
MCC		 1543 if (!desc->volfunc) {
1544 /* This shouldn't be happen. Warn user, but keep working
1545 without volume controls
1546 */
1547 v4l_info(chip->c, "volume callback undefined!\n");
1548 desc->flags &= ~CHIP_HAS_VOLUME;
1549 } else {
1550 chip->left = desc->leftinit ? desc->leftinit : 65535;
1551 chip->right = desc->rightinit ? desc->rightinit : 65535;
1552 chip_write(chip, desc->leftreg,
1553 desc->volfunc(chip->left));
1554 chip_write(chip, desc->rightreg,
1555 desc->volfunc(chip->right));
1556 }
1da177e4
LT		 1557 }
1558 if (desc->flags & CHIP_HAS_BASSTREBLE) {
099b7fcc
MCC		 1559 if (!desc->bassfunc || !desc->treblefunc) {
1560 /* This shouldn't be happen. Warn user, but keep working
1561 without bass/treble controls
1562 */
1563 v4l_info(chip->c, "bass/treble callbacks undefined!\n");
1564 desc->flags &= ~CHIP_HAS_BASSTREBLE;
1565 } else {
1566 chip->treble = desc->trebleinit ?
1567 desc->trebleinit : 32768;
1568 chip->bass = desc->bassinit ?
1569 desc->bassinit : 32768;
1570 chip_write(chip, desc->bassreg,
1571 desc->bassfunc(chip->bass));
1572 chip_write(chip, desc->treblereg,
1573 desc->treblefunc(chip->treble));
1574 }
1da177e4
LT		 1575 }
1576
bc282879 1577 chip->thread = NULL;
dd03e970 1578 if (desc->flags & CHIP_NEED_CHECKMODE) {
099b7fcc
MCC		 1579 if (!desc->getmode || !desc->setmode) {
1580 /* This shouldn't be happen. Warn user, but keep working
1581 without kthread
1582 */
1583 v4l_info(chip->c, "set/get mode callbacks undefined!\n");
1584 return 0;
1585 }
1da177e4
LT		 1586 /* start async thread */
1587 init_timer(&chip->wt);
1588 chip->wt.function = chip_thread_wake;
1589 chip->wt.data = (unsigned long)chip;
08e14054 1590 chip->thread = kthread_run(chip_thread, chip, chip->c->name);
bc282879 1591 if (IS_ERR(chip->thread)) {
08e14054
HV		 1592 v4l_warn(chip->c, "%s: failed to create kthread\n",
1593 chip->c->name);
bc282879
CLG		 1594 chip->thread = NULL;
1595 }
1da177e4
LT		 1596 }
1597 return 0;
1598}
1599
08e14054 1600static int chip_remove(struct i2c_client *client)
1da177e4
LT		 1601{
1602 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1603
1604 del_timer_sync(&chip->wt);
bc282879 1605 if (chip->thread) {
1da177e4 1606 /* shutdown async thread */
bc282879
CLG		 1607 kthread_stop(chip->thread);
1608 chip->thread = NULL;
1da177e4
LT		 1609 }
1610
1da177e4
LT		 1611 kfree(chip);
1612 return 0;
1613}
1614
dc3d75da
MCC		 1615static int tvaudio_get_ctrl(struct CHIPSTATE *chip,
1616 struct v4l2_control *ctrl)
1617{
81cb5c4f 1618 struct CHIPDESC *desc = chip->desc;
dc3d75da
MCC		 1619
1620 switch (ctrl->id) {
1621 case V4L2_CID_AUDIO_MUTE:
1622 ctrl->value=chip->muted;
1623 return 0;
1624 case V4L2_CID_AUDIO_VOLUME:
18c0ecf1 1625 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1626 break;
1627 ctrl->value = max(chip->left,chip->right);
1628 return 0;
1629 case V4L2_CID_AUDIO_BALANCE:
1630 {
1631 int volume;
18c0ecf1 1632 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1633 break;
1634 volume = max(chip->left,chip->right);
1635 if (volume)
1636 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1637 else
1638 ctrl->value=32768;
1639 return 0;
1640 }
1641 case V4L2_CID_AUDIO_BASS:
01a1a3cc 1642 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
dc3d75da
MCC		 1643 break;
1644 ctrl->value = chip->bass;
1645 return 0;
1646 case V4L2_CID_AUDIO_TREBLE:
01a1a3cc
MCC		 1647 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1648 break;
dc3d75da
MCC		 1649 ctrl->value = chip->treble;
1650 return 0;
1651 }
1652 return -EINVAL;
1653}
1654
1655static int tvaudio_set_ctrl(struct CHIPSTATE *chip,
1656 struct v4l2_control *ctrl)
8bf2f8e7 1657{
81cb5c4f 1658 struct CHIPDESC *desc = chip->desc;
8bf2f8e7
HV		 1659
1660 switch (ctrl->id) {
1661 case V4L2_CID_AUDIO_MUTE:
1662 if (ctrl->value < 0 || ctrl->value >= 2)
1663 return -ERANGE;
1664 chip->muted = ctrl->value;
1665 if (chip->muted)
1666 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1667 else
1668 chip_write_masked(chip,desc->inputreg,
1669 desc->inputmap[chip->input],desc->inputmask);
dc3d75da
MCC		 1670 return 0;
1671 case V4L2_CID_AUDIO_VOLUME:
1672 {
1673 int volume,balance;
1674
18c0ecf1 1675 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1676 break;
1677
1678 volume = max(chip->left,chip->right);
1679 if (volume)
1680 balance=(32768*min(chip->left,chip->right))/volume;
1681 else
1682 balance=32768;
1683
1684 volume=ctrl->value;
1685 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1686 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1687
1688 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1689 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1690
1691 return 0;
8bf2f8e7 1692 }
dc3d75da
MCC		 1693 case V4L2_CID_AUDIO_BALANCE:
1694 {
1695 int volume, balance;
18c0ecf1 1696 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1697 break;
1698
1699 volume = max(chip->left,chip->right);
1700 balance = ctrl->value;
1701
1702 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1703 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1704
1705 return 0;
1706 }
1707 case V4L2_CID_AUDIO_BASS:
01a1a3cc 1708 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
dc3d75da
MCC		 1709 break;
1710 chip->bass = ctrl->value;
1711 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1712
1713 return 0;
1714 case V4L2_CID_AUDIO_TREBLE:
01a1a3cc
MCC		 1715 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1716 break;
dc3d75da
MCC		 1717 chip->treble = ctrl->value;
1718 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1719
1720 return 0;
1721 }
1722 return -EINVAL;
8bf2f8e7
HV		 1723}
1724
1725
1da177e4
LT		 1726/* ---------------------------------------------------------------------- */
1727/* video4linux interface */
1728
1729static int chip_command(struct i2c_client *client,
1730 unsigned int cmd, void *arg)
1731{
1da177e4 1732 struct CHIPSTATE *chip = i2c_get_clientdata(client);
81cb5c4f 1733 struct CHIPDESC *desc = chip->desc;
1da177e4 1734
c6241b6c
MCC		 1735 if (debug > 0) {
1736 v4l_i2c_print_ioctl(chip->c, cmd);
1737 printk("\n");
1738 }
1da177e4
LT		 1739
1740 switch (cmd) {
1da177e4 1741 case AUDC_SET_RADIO:
8a854284 1742 chip->radio = 1;
1da177e4
LT		 1743 chip->watch_stereo = 0;
1744 /* del_timer(&chip->wt); */
1745 break;
1da177e4
LT		 1746 /* --- v4l ioctls --- */
1747 /* take care: bttv does userspace copying, we'll get a
674434c6 1748 kernel pointer here... */
dc3d75da 1749 case VIDIOC_QUERYCTRL:
1da177e4 1750 {
dc3d75da
MCC		 1751 struct v4l2_queryctrl *qc = arg;
1752
1753 switch (qc->id) {
1754 case V4L2_CID_AUDIO_MUTE:
1755 break;
1756 case V4L2_CID_AUDIO_VOLUME:
1757 case V4L2_CID_AUDIO_BALANCE:
18c0ecf1 1758 if (!(desc->flags & CHIP_HAS_VOLUME))
dc3d75da
MCC		 1759 return -EINVAL;
1760 break;
1761 case V4L2_CID_AUDIO_BASS:
1762 case V4L2_CID_AUDIO_TREBLE:
01a1a3cc 1763 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
dc3d75da
MCC		 1764 return -EINVAL;
1765 break;
1766 default:
1767 return -EINVAL;
1da177e4 1768 }
dc3d75da 1769 return v4l2_ctrl_query_fill_std(qc);
1da177e4 1770 }
8bf2f8e7
HV		 1771 case VIDIOC_S_CTRL:
1772 return tvaudio_set_ctrl(chip, arg);
1773
dc3d75da
MCC		 1774 case VIDIOC_G_CTRL:
1775 return tvaudio_get_ctrl(chip, arg);
2474ed44
HV		 1776 case VIDIOC_INT_G_AUDIO_ROUTING:
1777 {
1778 struct v4l2_routing *rt = arg;
1779
1780 rt->input = chip->input;
1781 rt->output = 0;
1782 break;
1783 }
2474ed44
HV		 1784 case VIDIOC_INT_S_AUDIO_ROUTING:
1785 {
1786 struct v4l2_routing *rt = arg;
1787
1788 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1789 return -EINVAL;
1790 /* There are four inputs: tuner, radio, extern and intern. */
1791 chip->input = rt->input;
1792 if (chip->muted)
1793 break;
1794 chip_write_masked(chip, desc->inputreg,
1795 desc->inputmap[chip->input], desc->inputmask);
1796 break;
1797 }
8a854284 1798 case VIDIOC_S_TUNER:
1da177e4 1799 {
8a854284
HV		 1800 struct v4l2_tuner *vt = arg;
1801 int mode = 0;
1da177e4 1802
8a4b275f
HV		 1803 if (chip->radio)
1804 break;
8a854284
HV		 1805 switch (vt->audmode) {
1806 case V4L2_TUNER_MODE_MONO:
8a854284 1807 case V4L2_TUNER_MODE_STEREO:
8a854284 1808 case V4L2_TUNER_MODE_LANG1:
8a854284 1809 case V4L2_TUNER_MODE_LANG2:
dc3d75da
MCC		 1810 mode = vt->audmode;
1811 break;
1812 case V4L2_TUNER_MODE_LANG1_LANG2:
1813 mode = V4L2_TUNER_MODE_STEREO;
8a854284
HV		 1814 break;
1815 default:
8a4b275f 1816 return -EINVAL;
8a854284 1817 }
8a4b275f 1818 chip->audmode = vt->audmode;
8a854284
HV		 1819
1820 if (desc->setmode && mode) {
1821 chip->watch_stereo = 0;
1822 /* del_timer(&chip->wt); */
1823 chip->mode = mode;
1824 desc->setmode(chip, mode);
1825 }
1da177e4
LT		 1826 break;
1827 }
8a854284 1828 case VIDIOC_G_TUNER:
1da177e4 1829 {
8a854284 1830 struct v4l2_tuner *vt = arg;
dc3d75da 1831 int mode = V4L2_TUNER_MODE_MONO;
8a854284 1832
d3900bc4
HV		 1833 if (chip->radio)
1834 break;
8a4b275f 1835 vt->audmode = chip->audmode;
8a854284
HV		 1836 vt->rxsubchans = 0;
1837 vt->capability = V4L2_TUNER_CAP_STEREO |
1838 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
8a854284
HV		 1839
1840 if (desc->getmode)
1841 mode = desc->getmode(chip);
1842
dc3d75da 1843 if (mode & V4L2_TUNER_MODE_MONO)
8a854284 1844 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
dc3d75da 1845 if (mode & V4L2_TUNER_MODE_STEREO)
8a854284 1846 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
8a4b275f
HV		 1847 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1848 When this module is converted fully to v4l2, then this
1849 should change for those chips that can detect SAP. */
dc3d75da 1850 if (mode & V4L2_TUNER_MODE_LANG1)
8a4b275f
HV		 1851 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1852 V4L2_TUNER_SUB_LANG2;
8a854284
HV		 1853 break;
1854 }
8a854284
HV		 1855 case VIDIOC_S_STD:
1856 chip->radio = 0;
1857 break;
8a854284 1858 case VIDIOC_S_FREQUENCY:
18fc59e2 1859 chip->mode = 0; /* automatic */
dd03e970 1860
41f5230f
MCC		 1861 /* For chips that provide getmode and setmode, and doesn't
1862 automatically follows the stereo carrier, a kthread is
1863 created to set the audio standard. In this case, when then
1864 the video channel is changed, tvaudio starts on MONO mode.
1865 After waiting for 2 seconds, the kernel thread is called,
1866 to follow whatever audio standard is pointed by the
1867 audio carrier.
dd03e970
MCC		 1868 */
1869 if (chip->thread) {
dc3d75da
MCC		 1870 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
1871 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
18fc59e2 1872 chip->prevmode = -1; /* reset previous mode */
09df5cbe 1873 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1da177e4 1874 }
8a854284 1875 break;
74cab31c
HV		 1876
1877 case VIDIOC_G_CHIP_IDENT:
1878 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
1da177e4
LT		 1879 }
1880 return 0;
1881}
1882
08e14054 1883static int chip_legacy_probe(struct i2c_adapter *adap)
1da177e4 1884{
08e14054
HV		 1885 /* don't attach on saa7146 based cards,
1886 because dedicated drivers are used */
1887 if ((adap->id == I2C_HW_SAA7146))
1888 return 0;
1889 if (adap->class & I2C_CLASS_TV_ANALOG)
1890 return 1;
1891 return 0;
1da177e4
LT		 1892}
1893
ae429083
JD		 1894/* This driver supports many devices and the idea is to let the driver
1895 detect which device is present. So rather than listing all supported
1896 devices here, we pretend to support a single, fake device type. */
1897static const struct i2c_device_id chip_id[] = {
1898 { "tvaudio", 0 },
1899 { }
1900};
1901MODULE_DEVICE_TABLE(i2c, chip_id);
1902
08e14054
HV		 1903static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1904 .name = "tvaudio",
1905 .driverid = I2C_DRIVERID_TVAUDIO,
1906 .command = chip_command,
1907 .probe = chip_probe,
1908 .remove = chip_remove,
1909 .legacy_probe = chip_legacy_probe,
ae429083 1910 .id_table = chip_id,
08e14054 1911};
Linux 6.x block layer and io_uring tree(s)