V4L/DVB (9026): Add support for ST STV0288 demodulator and cards with it.
[linux-2.6-block.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
5823b3a6 36#include <dvb_frontend.h>
1da177e4 37
1f10c7af
AQ
38#include "mt352.h"
39#include "mt352_priv.h" /* FIXME */
40#include "tda1004x.h"
41#include "nxt200x.h"
bc36a686 42#include "tuner-xc2028.h"
1da177e4 43
e2ac28fa
IL
44#include "tda10086.h"
45#include "tda826x.h"
8ce47dad 46#include "tda827x.h"
e2ac28fa 47#include "isl6421.h"
4b1431ca 48#include "isl6405.h"
6ab465a8 49#include "lnbp21.h"
cb89cd33 50#include "tuner-simple.h"
8ce47dad 51
1da177e4
LT
52MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
53MODULE_LICENSE("GPL");
54
ff699e6b 55static unsigned int antenna_pwr;
86ddd96f 56
1da177e4
LT
57module_param(antenna_pwr, int, 0444);
58MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
59
ff699e6b 60static int use_frontend;
b331daa0
SB
61module_param(use_frontend, int, 0644);
62MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 63
ff699e6b 64static int debug;
58ef4f92
HH
65module_param(debug, int, 0644);
66MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
67
78e92006
JG
68DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
69
cf3c34c8
TP
70#define dprintk(fmt, arg...) do { if (debug) \
71 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
72
73/* Print a warning */
74#define wprintk(fmt, arg...) \
75 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH
76
77/* ------------------------------------------------------------------
78 * mt352 based DVB-T cards
79 */
80
1da177e4
LT
81static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
82{
83 u32 ok;
84
85 if (!on) {
86 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
87 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
88 return 0;
89 }
90
91 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
92 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
93 udelay(10);
94
95 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
96 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
97 udelay(10);
98 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
99 udelay(10);
100 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
5823b3a6 101 dprintk("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT
102
103 if (!ok)
104 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
105 return ok;
106}
107
108static int mt352_pinnacle_init(struct dvb_frontend* fe)
109{
110 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
111 static u8 reset [] = { RESET, 0x80 };
112 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
113 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
114 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
115 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
116 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
117 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
118 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
119 struct saa7134_dev *dev= fe->dvb->priv;
120
5823b3a6 121 dprintk("%s called\n", __func__);
1da177e4
LT
122
123 mt352_write(fe, clock_config, sizeof(clock_config));
124 udelay(200);
125 mt352_write(fe, reset, sizeof(reset));
126 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
127 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
128 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
129 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
130
131 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
132 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
133 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 134
1da177e4
LT
135 return 0;
136}
137
a78d0bfa
JAR
138static int mt352_aver777_init(struct dvb_frontend* fe)
139{
140 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
141 static u8 reset [] = { RESET, 0x80 };
142 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
143 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
144 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
145
146 mt352_write(fe, clock_config, sizeof(clock_config));
147 udelay(200);
148 mt352_write(fe, reset, sizeof(reset));
149 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
150 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
151 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
152
153 return 0;
154}
155
6e501a3f 156static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 157{
6e501a3f
TF
158 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
159 static u8 reset [] = { RESET, 0x80 };
160 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
161 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC
162 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
163
164 mt352_write(fe, clock_config, sizeof(clock_config));
165 udelay(200);
166 mt352_write(fe, reset, sizeof(reset));
167 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
168 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
169 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC
170 return 0;
171}
172
0463f12c
AQ
173static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
174 struct dvb_frontend_parameters* params)
1da177e4 175{
df8cf706
HH
176 u8 off[] = { 0x00, 0xf1};
177 u8 on[] = { 0x00, 0x71};
178 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
179
1da177e4
LT
180 struct saa7134_dev *dev = fe->dvb->priv;
181 struct v4l2_frequency f;
182
183 /* set frequency (mt2050) */
184 f.tuner = 0;
185 f.type = V4L2_TUNER_DIGITAL_TV;
186 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB
187 if (fe->ops.i2c_gate_ctrl)
188 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 189 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 190 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 191 msg.buf = on;
dea74869
PB
192 if (fe->ops.i2c_gate_ctrl)
193 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 194 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
195
196 pinnacle_antenna_pwr(dev, antenna_pwr);
197
198 /* mt352 setup */
0463f12c 199 return mt352_pinnacle_init(fe);
1da177e4
LT
200}
201
202static struct mt352_config pinnacle_300i = {
203 .demod_address = 0x3c >> 1,
204 .adc_clock = 20333,
205 .if2 = 36150,
206 .no_tuner = 1,
207 .demod_init = mt352_pinnacle_init,
1da177e4 208};
a78d0bfa
JAR
209
210static struct mt352_config avermedia_777 = {
211 .demod_address = 0xf,
212 .demod_init = mt352_aver777_init,
a78d0bfa 213};
1da177e4 214
6e501a3f 215static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC
216 .demod_address = (0x1e >> 1),
217 .no_tuner = 1,
6e501a3f 218 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC
219};
220
58ef4f92
HH
221/* ==================================================================
222 * tda1004x based DVB-T cards, helper functions
223 */
224
225static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
226 const struct firmware **fw, char *name)
1da177e4
LT
227{
228 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
229 return request_firmware(fw, name, &dev->pci->dev);
230}
231
58ef4f92
HH
232/* ------------------------------------------------------------------
233 * these tuners are tu1216, td1316(a)
234 */
235
236static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
237{
238 struct saa7134_dev *dev = fe->dvb->priv;
239 struct tda1004x_state *state = fe->demodulator_priv;
240 u8 addr = state->config->tuner_address;
86ddd96f 241 u8 tuner_buf[4];
2cf36ac4 242 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
243 sizeof(tuner_buf) };
244 int tuner_frequency = 0;
245 u8 band, cp, filter;
246
247 /* determine charge pump */
248 tuner_frequency = params->frequency + 36166000;
249 if (tuner_frequency < 87000000)
250 return -EINVAL;
251 else if (tuner_frequency < 130000000)
252 cp = 3;
253 else if (tuner_frequency < 160000000)
254 cp = 5;
255 else if (tuner_frequency < 200000000)
256 cp = 6;
257 else if (tuner_frequency < 290000000)
258 cp = 3;
259 else if (tuner_frequency < 420000000)
260 cp = 5;
261 else if (tuner_frequency < 480000000)
262 cp = 6;
263 else if (tuner_frequency < 620000000)
264 cp = 3;
265 else if (tuner_frequency < 830000000)
266 cp = 5;
267 else if (tuner_frequency < 895000000)
268 cp = 7;
269 else
270 return -EINVAL;
271
272 /* determine band */
273 if (params->frequency < 49000000)
274 return -EINVAL;
275 else if (params->frequency < 161000000)
276 band = 1;
277 else if (params->frequency < 444000000)
278 band = 2;
279 else if (params->frequency < 861000000)
280 band = 4;
281 else
282 return -EINVAL;
283
284 /* setup PLL filter */
285 switch (params->u.ofdm.bandwidth) {
286 case BANDWIDTH_6_MHZ:
287 filter = 0;
288 break;
289
290 case BANDWIDTH_7_MHZ:
291 filter = 0;
292 break;
293
294 case BANDWIDTH_8_MHZ:
295 filter = 1;
296 break;
1da177e4 297
86ddd96f
MCC
298 default:
299 return -EINVAL;
300 }
301
302 /* calculate divisor
303 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 304 */
86ddd96f
MCC
305 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
306
307 /* setup tuner buffer */
308 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
309 tuner_buf[1] = tuner_frequency & 0xff;
310 tuner_buf[2] = 0xca;
311 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
312
dea74869
PB
313 if (fe->ops.i2c_gate_ctrl)
314 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 315 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP
316 wprintk("could not write to tuner at addr: 0x%02x\n",
317 addr << 1);
86ddd96f 318 return -EIO;
58ef4f92 319 }
2cf36ac4
HH
320 msleep(1);
321 return 0;
322}
323
58ef4f92 324static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH
325{
326 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
327 struct tda1004x_state *state = fe->demodulator_priv;
328 u8 addr = state->config->tuner_address;
2cf36ac4
HH
329 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
330 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 331
2cf36ac4 332 /* setup PLL configuration */
dea74869
PB
333 if (fe->ops.i2c_gate_ctrl)
334 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
335 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
336 return -EIO;
86ddd96f 337 msleep(1);
2cf36ac4 338
1da177e4
LT
339 return 0;
340}
341
2cf36ac4
HH
342/* ------------------------------------------------------------------ */
343
2cf36ac4 344static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
345 .demod_address = 0x8,
346 .invert = 1,
2cf36ac4 347 .invert_oclk = 0,
86ddd96f
MCC
348 .xtal_freq = TDA10046_XTAL_4M,
349 .agc_config = TDA10046_AGC_DEFAULT,
350 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
351 .tuner_address = 0x60,
352 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
353};
354
2cf36ac4
HH
355static struct tda1004x_config philips_tu1216_61_config = {
356
357 .demod_address = 0x8,
358 .invert = 1,
359 .invert_oclk = 0,
360 .xtal_freq = TDA10046_XTAL_4M,
361 .agc_config = TDA10046_AGC_DEFAULT,
362 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
363 .tuner_address = 0x61,
364 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
365};
366
367/* ------------------------------------------------------------------ */
368
cbb94521 369static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
370{
371 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
372 struct tda1004x_state *state = fe->demodulator_priv;
373 u8 addr = state->config->tuner_address;
2cf36ac4 374 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 375 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH
376
377 /* setup PLL configuration */
dea74869
PB
378 if (fe->ops.i2c_gate_ctrl)
379 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
380 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
381 return -EIO;
2cf36ac4
HH
382 return 0;
383}
384
a79ddae9 385static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 386{
58ef4f92
HH
387 return philips_tda6651_pll_set(fe, params);
388}
389
390static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
391{
392 struct saa7134_dev *dev = fe->dvb->priv;
393 struct tda1004x_state *state = fe->demodulator_priv;
394 u8 addr = state->config->tuner_address;
395 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
396 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
397
398 /* switch the tuner to analog mode */
399 if (fe->ops.i2c_gate_ctrl)
400 fe->ops.i2c_gate_ctrl(fe, 1);
401 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
402 return -EIO;
403 return 0;
2cf36ac4
HH
404}
405
58ef4f92
HH
406/* ------------------------------------------------------------------ */
407
cbb94521
HH
408static int philips_europa_tuner_init(struct dvb_frontend *fe)
409{
410 struct saa7134_dev *dev = fe->dvb->priv;
411 static u8 msg[] = { 0x00, 0x40};
412 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
413
414
415 if (philips_td1316_tuner_init(fe))
416 return -EIO;
417 msleep(1);
418 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
419 return -EIO;
420
421 return 0;
422}
423
a79ddae9 424static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
425{
426 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 427
58ef4f92
HH
428 static u8 msg[] = { 0x00, 0x14 };
429 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
430
431 if (philips_td1316_tuner_sleep(fe))
432 return -EIO;
2cf36ac4
HH
433
434 /* switch the board to analog mode */
dea74869
PB
435 if (fe->ops.i2c_gate_ctrl)
436 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 437 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
438 return 0;
439}
440
441static int philips_europa_demod_sleep(struct dvb_frontend *fe)
442{
443 struct saa7134_dev *dev = fe->dvb->priv;
444
445 if (dev->original_demod_sleep)
446 dev->original_demod_sleep(fe);
dea74869 447 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 448 return 0;
2cf36ac4
HH
449}
450
451static struct tda1004x_config philips_europa_config = {
452
453 .demod_address = 0x8,
454 .invert = 0,
455 .invert_oclk = 0,
456 .xtal_freq = TDA10046_XTAL_4M,
457 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
458 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH
459 .tuner_address = 0x61,
460 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
461};
462
408b664a 463static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
464 .demod_address = 0x08,
465 .invert = 1,
466 .invert_oclk = 0,
467 .xtal_freq = TDA10046_XTAL_16M,
468 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
469 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH
470 .tuner_address = 0x61,
471 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
472};
473
58ef4f92
HH
474/* ------------------------------------------------------------------
475 * tda 1004x based cards with philips silicon tuner
476 */
477
58ef4f92
HH
478static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
479{
58ef4f92
HH
480 struct tda1004x_state *state = fe->demodulator_priv;
481
482 u8 addr = state->config->i2c_gate;
483 static u8 tda8290_close[] = { 0x21, 0xc0};
484 static u8 tda8290_open[] = { 0x21, 0x80};
485 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
486 if (enable) {
487 tda8290_msg.buf = tda8290_close;
488 } else {
489 tda8290_msg.buf = tda8290_open;
490 }
06be3035 491 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP
492 struct saa7134_dev *dev = fe->dvb->priv;
493 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH
494 return -EIO;
495 }
496 msleep(20);
497 return 0;
498}
499
58ef4f92 500static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 501{
90e9df7f 502 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 503 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 504
58ef4f92
HH
505 switch (state->config->antenna_switch) {
506 case 0: break;
507 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
508 saa7134_set_gpio(dev, 21, 0);
509 break;
510 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
511 saa7134_set_gpio(dev, 21, 1);
512 break;
587d2fd7 513 }
587d2fd7
HH
514 return 0;
515}
516
58ef4f92 517static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 518{
58ef4f92
HH
519 struct saa7134_dev *dev = fe->dvb->priv;
520 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 521
58ef4f92
HH
522 switch (state->config->antenna_switch) {
523 case 0: break;
524 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
525 saa7134_set_gpio(dev, 21, 1);
526 break;
527 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
528 saa7134_set_gpio(dev, 21, 0);
529 break;
530 }
587d2fd7 531 return 0;
2d6b5f62 532}
90e9df7f 533
d557dab5
MCC
534static int configure_tda827x_fe(struct saa7134_dev *dev,
535 struct tda1004x_config *cdec_conf,
536 struct tda827x_config *tuner_conf)
90e9df7f 537{
7bff4b4d 538 dev->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
58ef4f92 539 if (dev->dvb.frontend) {
7bff4b4d 540 if (cdec_conf->i2c_gate)
58ef4f92 541 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
d557dab5
MCC
542 if (dvb_attach(tda827x_attach, dev->dvb.frontend,
543 cdec_conf->tuner_address,
544 &dev->i2c_adap, tuner_conf))
545 return 0;
546
547 wprintk("no tda827x tuner found at addr: %02x\n",
7bff4b4d 548 cdec_conf->tuner_address);
58ef4f92 549 }
d557dab5 550 return -EINVAL;
90e9df7f
HH
551}
552
58ef4f92 553/* ------------------------------------------------------------------ */
261f5081 554
7bff4b4d
HH
555static struct tda827x_config tda827x_cfg_0 = {
556 .tuner_callback = saa7134_tuner_callback,
557 .init = philips_tda827x_tuner_init,
558 .sleep = philips_tda827x_tuner_sleep,
559 .config = 0,
560 .switch_addr = 0
561};
562
563static struct tda827x_config tda827x_cfg_1 = {
564 .tuner_callback = saa7134_tuner_callback,
565 .init = philips_tda827x_tuner_init,
566 .sleep = philips_tda827x_tuner_sleep,
567 .config = 1,
568 .switch_addr = 0x4b
569};
570
571static struct tda827x_config tda827x_cfg_2 = {
572 .tuner_callback = saa7134_tuner_callback,
573 .init = philips_tda827x_tuner_init,
574 .sleep = philips_tda827x_tuner_sleep,
575 .config = 2,
576 .switch_addr = 0x4b
577};
578
579static struct tda827x_config tda827x_cfg_2_sw42 = {
580 .tuner_callback = saa7134_tuner_callback,
581 .init = philips_tda827x_tuner_init,
582 .sleep = philips_tda827x_tuner_sleep,
583 .config = 2,
584 .switch_addr = 0x42
585};
586
587/* ------------------------------------------------------------------ */
588
58ef4f92 589static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH
590 .demod_address = 0x08,
591 .invert = 1,
592 .invert_oclk = 0,
593 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
594 .agc_config = TDA10046_AGC_TDA827X,
595 .gpio_config = TDA10046_GP11_I,
550a9a5e 596 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
597 .tuner_address = 0x60,
598 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 599};
550a9a5e 600
58ef4f92
HH
601static struct tda1004x_config philips_tiger_config = {
602 .demod_address = 0x08,
603 .invert = 1,
604 .invert_oclk = 0,
605 .xtal_freq = TDA10046_XTAL_16M,
606 .agc_config = TDA10046_AGC_TDA827X,
607 .gpio_config = TDA10046_GP11_I,
608 .if_freq = TDA10046_FREQ_045,
609 .i2c_gate = 0x4b,
610 .tuner_address = 0x61,
58ef4f92
HH
611 .antenna_switch= 1,
612 .request_firmware = philips_tda1004x_request_firmware
613};
550a9a5e
HH
614
615static struct tda1004x_config cinergy_ht_config = {
616 .demod_address = 0x08,
617 .invert = 1,
618 .invert_oclk = 0,
619 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
620 .agc_config = TDA10046_AGC_TDA827X,
621 .gpio_config = TDA10046_GP01_I,
90e9df7f 622 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
623 .i2c_gate = 0x4b,
624 .tuner_address = 0x61,
58ef4f92 625 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH
626};
627
58ef4f92
HH
628static struct tda1004x_config cinergy_ht_pci_config = {
629 .demod_address = 0x08,
630 .invert = 1,
631 .invert_oclk = 0,
632 .xtal_freq = TDA10046_XTAL_16M,
633 .agc_config = TDA10046_AGC_TDA827X,
634 .gpio_config = TDA10046_GP01_I,
635 .if_freq = TDA10046_FREQ_045,
636 .i2c_gate = 0x4b,
637 .tuner_address = 0x60,
58ef4f92
HH
638 .request_firmware = philips_tda1004x_request_firmware
639};
640
641static struct tda1004x_config philips_tiger_s_config = {
642 .demod_address = 0x08,
643 .invert = 1,
644 .invert_oclk = 0,
645 .xtal_freq = TDA10046_XTAL_16M,
646 .agc_config = TDA10046_AGC_TDA827X,
647 .gpio_config = TDA10046_GP01_I,
648 .if_freq = TDA10046_FREQ_045,
649 .i2c_gate = 0x4b,
650 .tuner_address = 0x61,
58ef4f92
HH
651 .antenna_switch= 1,
652 .request_firmware = philips_tda1004x_request_firmware
653};
df42eaf2 654
587d2fd7
HH
655static struct tda1004x_config pinnacle_pctv_310i_config = {
656 .demod_address = 0x08,
657 .invert = 1,
658 .invert_oclk = 0,
659 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
660 .agc_config = TDA10046_AGC_TDA827X,
661 .gpio_config = TDA10046_GP11_I,
587d2fd7 662 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
663 .i2c_gate = 0x4b,
664 .tuner_address = 0x61,
58ef4f92 665 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH
666};
667
c6e53daf
TG
668static struct tda1004x_config hauppauge_hvr_1110_config = {
669 .demod_address = 0x08,
670 .invert = 1,
671 .invert_oclk = 0,
672 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
673 .agc_config = TDA10046_AGC_TDA827X,
674 .gpio_config = TDA10046_GP11_I,
c6e53daf 675 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
676 .i2c_gate = 0x4b,
677 .tuner_address = 0x61,
678 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG
679};
680
83646817
HH
681static struct tda1004x_config asus_p7131_dual_config = {
682 .demod_address = 0x08,
683 .invert = 1,
684 .invert_oclk = 0,
685 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
686 .agc_config = TDA10046_AGC_TDA827X,
687 .gpio_config = TDA10046_GP11_I,
83646817 688 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
689 .i2c_gate = 0x4b,
690 .tuner_address = 0x61,
58ef4f92
HH
691 .antenna_switch= 2,
692 .request_firmware = philips_tda1004x_request_firmware
83646817
HH
693};
694
420f32fe
NS
695static struct tda1004x_config lifeview_trio_config = {
696 .demod_address = 0x09,
697 .invert = 1,
698 .invert_oclk = 0,
699 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
700 .agc_config = TDA10046_AGC_TDA827X,
701 .gpio_config = TDA10046_GP00_I,
420f32fe 702 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
703 .tuner_address = 0x60,
704 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS
705};
706
58ef4f92 707static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH
708 .demod_address = 0x08,
709 .invert = 1,
710 .invert_oclk = 0,
711 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 712 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 713 .gpio_config = TDA10046_GP11_I,
df42eaf2 714 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
715 .tuner_address = 0x60,
716 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH
717};
718
58ef4f92 719static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH
720 .demod_address = 0x08,
721 .invert = 1,
722 .invert_oclk = 0,
723 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 724 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 725 .gpio_config = TDA10046_GP01_I,
3dfb729f 726 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
727 .i2c_gate = 0x4b,
728 .tuner_address = 0x60,
58ef4f92 729 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH
730};
731
e06cea4c
HH
732static struct tda1004x_config asus_p7131_4871_config = {
733 .demod_address = 0x08,
734 .invert = 1,
735 .invert_oclk = 0,
736 .xtal_freq = TDA10046_XTAL_16M,
737 .agc_config = TDA10046_AGC_TDA827X,
738 .gpio_config = TDA10046_GP01_I,
739 .if_freq = TDA10046_FREQ_045,
740 .i2c_gate = 0x4b,
741 .tuner_address = 0x61,
e06cea4c
HH
742 .antenna_switch= 2,
743 .request_firmware = philips_tda1004x_request_firmware
744};
745
f3eec0c0 746static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH
747 .demod_address = 0x08,
748 .invert = 1,
749 .invert_oclk = 0,
750 .xtal_freq = TDA10046_XTAL_16M,
751 .agc_config = TDA10046_AGC_TDA827X,
752 .gpio_config = TDA10046_GP11_I,
753 .if_freq = TDA10046_FREQ_045,
754 .i2c_gate = 0x4b,
755 .tuner_address = 0x61,
e06cea4c
HH
756 .antenna_switch= 2,
757 .request_firmware = philips_tda1004x_request_firmware
758};
261f5081 759
b39423a9
SF
760static struct tda1004x_config kworld_dvb_t_210_config = {
761 .demod_address = 0x08,
762 .invert = 1,
763 .invert_oclk = 0,
764 .xtal_freq = TDA10046_XTAL_16M,
765 .agc_config = TDA10046_AGC_TDA827X,
766 .gpio_config = TDA10046_GP11_I,
767 .if_freq = TDA10046_FREQ_045,
768 .i2c_gate = 0x4b,
769 .tuner_address = 0x61,
b39423a9
SF
770 .antenna_switch= 1,
771 .request_firmware = philips_tda1004x_request_firmware
772};
261f5081 773
d90d9f5a
ES
774static struct tda1004x_config avermedia_super_007_config = {
775 .demod_address = 0x08,
776 .invert = 1,
777 .invert_oclk = 0,
778 .xtal_freq = TDA10046_XTAL_16M,
779 .agc_config = TDA10046_AGC_TDA827X,
780 .gpio_config = TDA10046_GP01_I,
781 .if_freq = TDA10046_FREQ_045,
782 .i2c_gate = 0x4b,
783 .tuner_address = 0x60,
d90d9f5a
ES
784 .antenna_switch= 1,
785 .request_firmware = philips_tda1004x_request_firmware
786};
787
4ba24373
HP
788static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
789 .demod_address = 0x08,
790 .invert = 1,
791 .invert_oclk = 0,
792 .xtal_freq = TDA10046_XTAL_16M,
793 .agc_config = TDA10046_AGC_TDA827X,
794 .gpio_config = TDA10046_GP01_I,
795 .if_freq = TDA10046_FREQ_045,
796 .i2c_gate = 0x42,
797 .tuner_address = 0x61,
4ba24373
HP
798 .antenna_switch = 1,
799 .request_firmware = philips_tda1004x_request_firmware
800};
801
58ef4f92
HH
802/* ------------------------------------------------------------------
803 * special case: this card uses saa713x GPIO22 for the mode switch
804 */
5eda227f 805
58ef4f92 806static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH
807{
808 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
809 philips_tda827x_tuner_init(fe);
810 /* route TDA8275a AGC input to the channel decoder */
06be3035 811 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH
812 return 0;
813}
814
58ef4f92 815static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 816{
5eda227f 817 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 818 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 819 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH
820 philips_tda827x_tuner_sleep(fe);
821 return 0;
5eda227f
HH
822}
823
8ce47dad 824static struct tda827x_config ads_duo_cfg = {
7bff4b4d 825 .tuner_callback = saa7134_tuner_callback,
8ce47dad 826 .init = ads_duo_tuner_init,
7bff4b4d
HH
827 .sleep = ads_duo_tuner_sleep,
828 .config = 0
8ce47dad
MK
829};
830
58ef4f92 831static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH
832 .demod_address = 0x08,
833 .invert = 1,
834 .invert_oclk = 0,
835 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 836 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 837 .gpio_config = TDA10046_GP00_I,
5eda227f 838 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
839 .tuner_address = 0x61,
840 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH
841};
842
58ef4f92
HH
843/* ==================================================================
844 * tda10086 based DVB-S cards, helper functions
845 */
846
e2ac28fa
IL
847static struct tda10086_config flydvbs = {
848 .demod_address = 0x0e,
849 .invert = 0,
ea75baf4 850 .diseqc_tone = 0,
9a1b04e4
HH
851 .xtal_freq = TDA10086_XTAL_16M,
852};
853
854static struct tda10086_config sd1878_4m = {
855 .demod_address = 0x0e,
856 .invert = 0,
857 .diseqc_tone = 0,
858 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL
859};
860
1b1cee35
HH
861/* ------------------------------------------------------------------
862 * special case: lnb supply is connected to the gated i2c
863 */
864
865static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
866{
867 int res = -EIO;
868 struct saa7134_dev *dev = fe->dvb->priv;
869 if (fe->ops.i2c_gate_ctrl) {
870 fe->ops.i2c_gate_ctrl(fe, 1);
871 if (dev->original_set_voltage)
872 res = dev->original_set_voltage(fe, voltage);
873 fe->ops.i2c_gate_ctrl(fe, 0);
874 }
875 return res;
876};
877
878static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
879{
880 int res = -EIO;
881 struct saa7134_dev *dev = fe->dvb->priv;
882 if (fe->ops.i2c_gate_ctrl) {
883 fe->ops.i2c_gate_ctrl(fe, 1);
884 if (dev->original_set_high_voltage)
885 res = dev->original_set_high_voltage(fe, arg);
886 fe->ops.i2c_gate_ctrl(fe, 0);
887 }
888 return res;
889};
890
5823b3a6
HH
891static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
892{
893 struct saa7134_dev *dev = fe->dvb->priv;
894 u8 wbuf[2] = { 0x1f, 00 };
895 u8 rbuf;
896 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
897 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
898
899 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
900 return -EIO;
901 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
902 if (voltage == SEC_VOLTAGE_18)
903 wbuf[1] = rbuf | 0x10;
904 else
905 wbuf[1] = rbuf & 0xef;
906 msg[0].len = 2;
907 i2c_transfer(&dev->i2c_adap, msg, 1);
908 return 0;
909}
910
911static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
912{
913 struct saa7134_dev *dev = fe->dvb->priv;
914 wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__);
915 return -EIO;
916}
917
58ef4f92
HH
918/* ==================================================================
919 * nxt200x based ATSC cards, helper functions
920 */
90e9df7f 921
3b64e8e2
MK
922static struct nxt200x_config avertvhda180 = {
923 .demod_address = 0x0a,
3b64e8e2 924};
3e1410ad
AB
925
926static struct nxt200x_config kworldatsc110 = {
927 .demod_address = 0x0a,
3e1410ad 928};
3b64e8e2 929
58ef4f92
HH
930/* ==================================================================
931 * Core code
932 */
1da177e4
LT
933
934static int dvb_init(struct saa7134_dev *dev)
935{
1c4f76ab 936 int ret;
bc36a686
MCC
937 int attach_xc3028 = 0;
938
1da177e4
LT
939 /* init struct videobuf_dvb */
940 dev->ts.nr_bufs = 32;
941 dev->ts.nr_packets = 32*4;
942 dev->dvb.name = dev->name;
0705135e
GL
943 videobuf_queue_sg_init(&dev->dvb.dvbq, &saa7134_ts_qops,
944 &dev->pci->dev, &dev->slock,
1da177e4
LT
945 V4L2_BUF_TYPE_VIDEO_CAPTURE,
946 V4L2_FIELD_ALTERNATE,
947 sizeof(struct saa7134_buf),
948 dev);
949
950 switch (dev->board) {
951 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 952 dprintk("pinnacle 300i dvb setup\n");
2bfe031d 953 dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 954 &dev->i2c_adap);
6b3ccab7 955 if (dev->dvb.frontend) {
dea74869 956 dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 957 }
1da177e4 958 break;
a78d0bfa 959 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 960 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 961 dprintk("avertv 777 dvb setup\n");
2bfe031d 962 dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 963 &dev->i2c_adap);
6b3ccab7 964 if (dev->dvb.frontend) {
fb147e97
MK
965 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
966 &dev->i2c_adap, 0x61,
967 TUNER_PHILIPS_TD1316);
6b3ccab7 968 }
a78d0bfa 969 break;
95a2fdb6 970 case SAA7134_BOARD_AVERMEDIA_A16D:
6e501a3f
TF
971 dprintk("AverMedia A16D dvb setup\n");
972 dev->dvb.frontend = dvb_attach(mt352_attach,
973 &avermedia_xc3028_mt352_dev,
974 &dev->i2c_adap);
95a2fdb6
MCC
975 attach_xc3028 = 1;
976 break;
1da177e4 977 case SAA7134_BOARD_MD7134:
f7b54b10
MK
978 dev->dvb.frontend = dvb_attach(tda10046_attach,
979 &medion_cardbus,
980 &dev->i2c_adap);
6b3ccab7 981 if (dev->dvb.frontend) {
cb89cd33
MK
982 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
983 &dev->i2c_adap, medion_cardbus.tuner_address,
984 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 985 }
1da177e4 986 break;
86ddd96f 987 case SAA7134_BOARD_PHILIPS_TOUGH:
f7b54b10
MK
988 dev->dvb.frontend = dvb_attach(tda10046_attach,
989 &philips_tu1216_60_config,
990 &dev->i2c_adap);
6b3ccab7 991 if (dev->dvb.frontend) {
58ef4f92
HH
992 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
993 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 994 }
86ddd96f
MCC
995 break;
996 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 997 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC
998 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
999 &tda827x_cfg_0) < 0)
1000 goto dettach_frontend;
86ddd96f 1001 break;
2cf36ac4 1002 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1003 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
f7b54b10
MK
1004 dev->dvb.frontend = dvb_attach(tda10046_attach,
1005 &philips_europa_config,
1006 &dev->i2c_adap);
6b3ccab7 1007 if (dev->dvb.frontend) {
588f9831
HH
1008 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1009 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
dea74869
PB
1010 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1011 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1012 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1013 }
2cf36ac4
HH
1014 break;
1015 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
f7b54b10
MK
1016 dev->dvb.frontend = dvb_attach(tda10046_attach,
1017 &philips_tu1216_61_config,
1018 &dev->i2c_adap);
6b3ccab7 1019 if (dev->dvb.frontend) {
58ef4f92
HH
1020 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1021 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1022 }
2cf36ac4 1023 break;
b39423a9 1024 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC
1025 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1026 &tda827x_cfg_2) < 0)
1027 goto dettach_frontend;
b39423a9 1028 break;
90e9df7f 1029 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC
1030 if (configure_tda827x_fe(dev, &philips_tiger_config,
1031 &tda827x_cfg_0) < 0)
1032 goto dettach_frontend;
587d2fd7
HH
1033 break;
1034 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC
1035 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1036 &tda827x_cfg_1) < 0)
1037 goto dettach_frontend;
90e9df7f 1038 break;
c6e53daf 1039 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC
1040 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1041 &tda827x_cfg_1) < 0)
1042 goto dettach_frontend;
c6e53daf 1043 break;
d4b0aba4 1044 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC
1045 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1046 &tda827x_cfg_0) < 0)
1047 goto dettach_frontend;
d4b0aba4 1048 break;
3d8466ec 1049 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC
1050 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1051 &tda827x_cfg_0) < 0)
1052 goto dettach_frontend;
3d8466ec 1053 break;
420f32fe 1054 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC
1055 if (!use_frontend) { /* terrestrial */
1056 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1057 &tda827x_cfg_0) < 0)
1058 goto dettach_frontend;
7bff4b4d 1059 } else { /* satellite */
1f683cd8
NS
1060 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1061 if (dev->dvb.frontend) {
1062 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63,
1063 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1064 wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__);
d557dab5 1065 goto dettach_frontend;
1f683cd8
NS
1066 }
1067 if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap,
1068 0x08, 0, 0) == NULL) {
5823b3a6 1069 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__);
d557dab5 1070 goto dettach_frontend;
1f683cd8
NS
1071 }
1072 }
6b3ccab7 1073 }
420f32fe 1074 break;
df42eaf2 1075 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1076 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
f7b54b10
MK
1077 dev->dvb.frontend = dvb_attach(tda10046_attach,
1078 &ads_tech_duo_config,
1079 &dev->i2c_adap);
6b3ccab7 1080 if (dev->dvb.frontend) {
ede2200d 1081 if (dvb_attach(tda827x_attach,dev->dvb.frontend,
7bff4b4d
HH
1082 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1083 &ads_duo_cfg) == NULL) {
cf3c34c8 1084 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d 1085 ads_tech_duo_config.tuner_address);
d557dab5 1086 goto dettach_frontend;
ede2200d 1087 }
bc36ec74
MCC
1088 } else
1089 wprintk("failed to attach tda10046\n");
df42eaf2 1090 break;
3dfb729f 1091 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC
1092 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1093 &tda827x_cfg_0) < 0)
1094 goto dettach_frontend;
d95b8942 1095 break;
5eda227f 1096 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1097 if (!use_frontend) { /* terrestrial */
d557dab5
MCC
1098 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1099 &tda827x_cfg_0) < 0)
1100 goto dettach_frontend;
4b1431ca
HH
1101 } else { /* satellite */
1102 dev->dvb.frontend = dvb_attach(tda10086_attach,
1103 &flydvbs, &dev->i2c_adap);
1104 if (dev->dvb.frontend) {
5823b3a6
HH
1105 struct dvb_frontend *fe = dev->dvb.frontend;
1106 u8 dev_id = dev->eedata[2];
1107 u8 data = 0xc4;
1108 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1109
4b1431ca 1110 if (dvb_attach(tda826x_attach, dev->dvb.frontend,
d557dab5 1111 0x60, &dev->i2c_adap, 0) == NULL) {
4b1431ca 1112 wprintk("%s: Medion Quadro, no tda826x "
5823b3a6 1113 "found !\n", __func__);
d557dab5
MCC
1114 goto dettach_frontend;
1115 }
5823b3a6
HH
1116 if (dev_id != 0x08) {
1117 /* we need to open the i2c gate (we know it exists) */
1118 fe->ops.i2c_gate_ctrl(fe, 1);
1119 if (dvb_attach(isl6405_attach, fe,
d557dab5 1120 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6
HH
1121 wprintk("%s: Medion Quadro, no ISL6405 "
1122 "found !\n", __func__);
d557dab5
MCC
1123 goto dettach_frontend;
1124 }
e9c1ac9d
HH
1125 if (dev_id == 0x07) {
1126 /* fire up the 2nd section of the LNB supply since
1127 we can't do this from the other section */
1128 msg.buf = &data;
1129 i2c_transfer(&dev->i2c_adap, &msg, 1);
1130 }
5823b3a6
HH
1131 fe->ops.i2c_gate_ctrl(fe, 0);
1132 dev->original_set_voltage = fe->ops.set_voltage;
1133 fe->ops.set_voltage = md8800_set_voltage;
1134 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1135 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1136 } else {
1137 fe->ops.set_voltage = md8800_set_voltage2;
1138 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1139 }
4b1431ca
HH
1140 }
1141 }
5eda227f 1142 break;
3b64e8e2 1143 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
f7b54b10
MK
1144 dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
1145 &dev->i2c_adap);
d557dab5 1146 if (dev->dvb.frontend)
4ad8eee5 1147 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 1148 NULL, DVB_PLL_TDHU2);
3b64e8e2 1149 break;
3e1410ad 1150 case SAA7134_BOARD_KWORLD_ATSC110:
f7b54b10
MK
1151 dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
1152 &dev->i2c_adap);
d557dab5 1153 if (dev->dvb.frontend)
62ff817a
MK
1154 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
1155 &dev->i2c_adap, 0x61,
1156 TUNER_PHILIPS_TUV1236D);
3e1410ad 1157 break;
e2ac28fa 1158 case SAA7134_BOARD_FLYDVBS_LR300:
f7b54b10
MK
1159 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1160 &dev->i2c_adap);
e2ac28fa 1161 if (dev->dvb.frontend) {
f7b54b10
MK
1162 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
1163 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1164 wprintk("%s: No tda826x found!\n", __func__);
d557dab5 1165 goto dettach_frontend;
e2ac28fa 1166 }
f7b54b10
MK
1167 if (dvb_attach(isl6421_attach, dev->dvb.frontend,
1168 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6 1169 wprintk("%s: No ISL6421 found!\n", __func__);
d557dab5 1170 goto dettach_frontend;
e2ac28fa
IL
1171 }
1172 }
1173 break;
cf146ca4 1174 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
0e8f4cc5
MS
1175 dev->dvb.frontend = dvb_attach(tda10046_attach,
1176 &medion_cardbus,
1177 &dev->i2c_adap);
cf146ca4
HH
1178 if (dev->dvb.frontend) {
1179 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1180 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1181
cb89cd33
MK
1182 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
1183 &dev->i2c_adap, medion_cardbus.tuner_address,
1184 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH
1185 }
1186 break;
cbb94521
HH
1187 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
1188 dev->dvb.frontend = dvb_attach(tda10046_attach,
1189 &philips_europa_config,
1190 &dev->i2c_adap);
1191 if (dev->dvb.frontend) {
1192 dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1193 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1194 }
1195 break;
550a9a5e 1196 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC
1197 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1198 &tda827x_cfg_0) < 0)
1199 goto dettach_frontend;
9de271e6
MK
1200 break;
1201 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC
1202 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1203 &tda827x_cfg_0) < 0)
1204 goto dettach_frontend;
58ef4f92
HH
1205 break;
1206 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC
1207 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1208 &tda827x_cfg_2) < 0)
1209 goto dettach_frontend;
550a9a5e 1210 break;
e06cea4c 1211 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC
1212 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1213 &tda827x_cfg_2) < 0)
1214 goto dettach_frontend;
e06cea4c 1215 break;
f3eec0c0 1216 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC
1217 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1218 &tda827x_cfg_2) < 0)
1219 goto dettach_frontend;
e06cea4c 1220 break;
d90d9f5a 1221 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC
1222 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1223 &tda827x_cfg_0) < 0)
1224 goto dettach_frontend;
d90d9f5a 1225 break;
4ba24373 1226 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC
1227 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1228 &tda827x_cfg_2_sw42) < 0)
1229 goto dettach_frontend;
4ba24373 1230 break;
6ab465a8
HH
1231 case SAA7134_BOARD_PHILIPS_SNAKE:
1232 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1233 &dev->i2c_adap);
1234 if (dev->dvb.frontend) {
1235 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
d557dab5 1236 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1237 wprintk("%s: No tda826x found!\n", __func__);
d557dab5
MCC
1238 goto dettach_frontend;
1239 }
6ab465a8 1240 if (dvb_attach(lnbp21_attach, dev->dvb.frontend,
d557dab5 1241 &dev->i2c_adap, 0, 0) == NULL) {
5823b3a6 1242 wprintk("%s: No lnbp21 found!\n", __func__);
d557dab5
MCC
1243 goto dettach_frontend;
1244 }
6ab465a8
HH
1245 }
1246 break;
7b5b3f17 1247 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC
1248 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1249 &tda827x_cfg_0) < 0)
1250 goto dettach_frontend;
7b5b3f17 1251 break;
6a6179b6 1252 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC
1253 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1254 &tda827x_cfg_2) < 0)
1255 goto dettach_frontend;
6a6179b6 1256 break;
bc36a686 1257 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
6e501a3f
TF
1258 dprintk("AverMedia E506R dvb setup\n");
1259 saa7134_set_gpio(dev, 25, 0);
1260 msleep(10);
1261 saa7134_set_gpio(dev, 25, 1);
bc36a686 1262 dev->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1263 &avermedia_xc3028_mt352_dev,
1264 &dev->i2c_adap);
bc36a686 1265 attach_xc3028 = 1;
e2fc00c2 1266 break;
637afdb5
HH
1267 case SAA7134_BOARD_MD7134_BRIDGE_2:
1268 dev->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1269 &sd1878_4m, &dev->i2c_adap);
637afdb5
HH
1270 if (dev->dvb.frontend) {
1271 struct dvb_frontend *fe;
1272 if (dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
d557dab5 1273 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
637afdb5 1274 wprintk("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1275 "found !\n", __func__);
d557dab5
MCC
1276 goto dettach_frontend;
1277 }
637afdb5
HH
1278 /* we need to open the i2c gate (we know it exists) */
1279 fe = dev->dvb.frontend;
1280 fe->ops.i2c_gate_ctrl(fe, 1);
1281 if (dvb_attach(isl6405_attach, fe,
d557dab5 1282 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
637afdb5 1283 wprintk("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1284 "found !\n", __func__);
d557dab5
MCC
1285 goto dettach_frontend;
1286 }
637afdb5
HH
1287 fe->ops.i2c_gate_ctrl(fe, 0);
1288 dev->original_set_voltage = fe->ops.set_voltage;
1289 fe->ops.set_voltage = md8800_set_voltage;
1290 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1291 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1292 }
1293 break;
e2fc00c2
MP
1294 case SAA7134_BOARD_AVERMEDIA_M103:
1295 saa7134_set_gpio(dev, 25, 0);
1296 msleep(10);
1297 saa7134_set_gpio(dev, 25, 1);
1298 dev->dvb.frontend = dvb_attach(mt352_attach,
1299 &avermedia_xc3028_mt352_dev,
1300 &dev->i2c_adap);
1301 attach_xc3028 = 1;
1302 break;
1da177e4 1303 default:
cf3c34c8 1304 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT
1305 break;
1306 }
1307
bc36a686
MCC
1308 if (attach_xc3028) {
1309 struct dvb_frontend *fe;
1310 struct xc2028_config cfg = {
1311 .i2c_adap = &dev->i2c_adap,
1312 .i2c_addr = 0x61,
bc36a686 1313 };
95a2fdb6
MCC
1314
1315 if (!dev->dvb.frontend)
1316 return -1;
1317
bc36a686
MCC
1318 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
1319 if (!fe) {
1320 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
1321 dev->name);
d557dab5 1322 goto dettach_frontend;
bc36a686
MCC
1323 }
1324 }
1325
1da177e4 1326 if (NULL == dev->dvb.frontend) {
cf3c34c8 1327 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
1da177e4
LT
1328 return -1;
1329 }
1330
1331 /* register everything else */
78e92006
JG
1332 ret = videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev,
1333 adapter_nr);
1c4f76ab
HH
1334
1335 /* this sequence is necessary to make the tda1004x load its firmware
1336 * and to enter analog mode of hybrid boards
1337 */
1338 if (!ret) {
1339 if (dev->dvb.frontend->ops.init)
1340 dev->dvb.frontend->ops.init(dev->dvb.frontend);
1341 if (dev->dvb.frontend->ops.sleep)
1342 dev->dvb.frontend->ops.sleep(dev->dvb.frontend);
9971f4f1
HH
1343 if (dev->dvb.frontend->ops.tuner_ops.sleep)
1344 dev->dvb.frontend->ops.tuner_ops.sleep(dev->dvb.frontend);
1c4f76ab
HH
1345 }
1346 return ret;
d557dab5
MCC
1347
1348dettach_frontend:
bf67cac1
MCC
1349 if (dev->dvb.frontend)
1350 dvb_frontend_detach(dev->dvb.frontend);
d557dab5
MCC
1351 dev->dvb.frontend = NULL;
1352
1353 return -1;
1da177e4
LT
1354}
1355
1356static int dvb_fini(struct saa7134_dev *dev)
1357{
7f171123
MCC
1358 /* FIXME: I suspect that this code is bogus, since the entry for
1359 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1360 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1361 */
1362 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1363 struct v4l2_priv_tun_config tda9887_cfg;
1364 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1365
1366 tda9887_cfg.tuner = TUNER_TDA9887;
1367 tda9887_cfg.priv = &on;
1da177e4 1368
1da177e4 1369 /* otherwise we don't detect the tuner on next insmod */
7f171123 1370 saa7134_i2c_call_clients(dev, TUNER_SET_CONFIG, &tda9887_cfg);
5823b3a6 1371 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1372 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH
1373 /* turn off the 2nd lnb supply */
1374 u8 data = 0x80;
1375 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1376 struct dvb_frontend *fe;
1377 fe = dev->dvb.frontend;
1378 if (fe->ops.i2c_gate_ctrl) {
1379 fe->ops.i2c_gate_ctrl(fe, 1);
1380 i2c_transfer(&dev->i2c_adap, &msg, 1);
1381 fe->ops.i2c_gate_ctrl(fe, 0);
1382 }
1383 }
7f171123 1384 }
9950c1b5
MCC
1385 if (dev->dvb.frontend)
1386 videobuf_dvb_unregister(&dev->dvb);
1da177e4
LT
1387 return 0;
1388}
1389
1390static struct saa7134_mpeg_ops dvb_ops = {
1391 .type = SAA7134_MPEG_DVB,
1392 .init = dvb_init,
1393 .fini = dvb_fini,
1394};
1395
1396static int __init dvb_register(void)
1397{
1398 return saa7134_ts_register(&dvb_ops);
1399}
1400
1401static void __exit dvb_unregister(void)
1402{
1403 saa7134_ts_unregister(&dvb_ops);
1404}
1405
1406module_init(dvb_register);
1407module_exit(dvb_unregister);
1408
1409/* ------------------------------------------------------------------ */
1410/*
1411 * Local variables:
1412 * c-basic-offset: 8
1413 * End:
1414 */