[media] mb86a20s: Be sure that device is initialized before starting DVB
[linux-2.6-block.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
1da177e4
LT
27#include <linux/delay.h>
28#include <linux/kthread.h>
29#include <linux/suspend.h>
30
31#include "saa7134-reg.h"
32#include "saa7134.h"
5e453dc7 33#include <media/v4l2-common.h>
a78d0bfa 34#include "dvb-pll.h"
5823b3a6 35#include <dvb_frontend.h>
1da177e4 36
1f10c7af
AQ
37#include "mt352.h"
38#include "mt352_priv.h" /* FIXME */
39#include "tda1004x.h"
40#include "nxt200x.h"
bc36a686 41#include "tuner-xc2028.h"
2930992c 42#include "xc5000.h"
1da177e4 43
e2ac28fa
IL
44#include "tda10086.h"
45#include "tda826x.h"
8ce47dad 46#include "tda827x.h"
e2ac28fa 47#include "isl6421.h"
4b1431ca 48#include "isl6405.h"
6ab465a8 49#include "lnbp21.h"
cb89cd33 50#include "tuner-simple.h"
1bc7f51c 51#include "tda10048.h"
3abdedd8
MK
52#include "tda18271.h"
53#include "lgdt3305.h"
54#include "tda8290.h"
f0551efc 55#include "mb86a20s.h"
8ce47dad 56
47aeba5a
DB
57#include "zl10353.h"
58
04574185 59#include "zl10036.h"
ecfcfec8 60#include "zl10039.h"
04574185
MS
61#include "mt312.h"
62
1da177e4
LT
63MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
64MODULE_LICENSE("GPL");
65
ff699e6b 66static unsigned int antenna_pwr;
86ddd96f 67
1da177e4
LT
68module_param(antenna_pwr, int, 0444);
69MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
70
ff699e6b 71static int use_frontend;
b331daa0
SB
72module_param(use_frontend, int, 0644);
73MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 74
ff699e6b 75static int debug;
58ef4f92
HH
76module_param(debug, int, 0644);
77MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
78
78e92006
JG
79DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
80
cf3c34c8
TP
81#define dprintk(fmt, arg...) do { if (debug) \
82 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
83
84/* Print a warning */
85#define wprintk(fmt, arg...) \
86 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH
87
88/* ------------------------------------------------------------------
89 * mt352 based DVB-T cards
90 */
91
1da177e4
LT
92static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
93{
94 u32 ok;
95
96 if (!on) {
97 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
98 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
99 return 0;
100 }
101
102 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
103 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
104 udelay(10);
105
106 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
107 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
108 udelay(10);
109 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
110 udelay(10);
111 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
5823b3a6 112 dprintk("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT
113
114 if (!ok)
115 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
116 return ok;
117}
118
119static int mt352_pinnacle_init(struct dvb_frontend* fe)
120{
121 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
122 static u8 reset [] = { RESET, 0x80 };
123 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
124 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
125 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
126 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
127 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
128 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
129 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
130 struct saa7134_dev *dev= fe->dvb->priv;
131
5823b3a6 132 dprintk("%s called\n", __func__);
1da177e4
LT
133
134 mt352_write(fe, clock_config, sizeof(clock_config));
135 udelay(200);
136 mt352_write(fe, reset, sizeof(reset));
137 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
138 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
139 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
140 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
141
142 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
143 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
144 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 145
1da177e4
LT
146 return 0;
147}
148
a78d0bfa
JAR
149static int mt352_aver777_init(struct dvb_frontend* fe)
150{
151 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
152 static u8 reset [] = { RESET, 0x80 };
153 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
154 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
155 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
156
157 mt352_write(fe, clock_config, sizeof(clock_config));
158 udelay(200);
159 mt352_write(fe, reset, sizeof(reset));
160 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
161 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
162 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
163
164 return 0;
165}
166
6e501a3f 167static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 168{
6e501a3f
TF
169 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
170 static u8 reset [] = { RESET, 0x80 };
171 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
172 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC
173 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
174
175 mt352_write(fe, clock_config, sizeof(clock_config));
176 udelay(200);
177 mt352_write(fe, reset, sizeof(reset));
178 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
179 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
180 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC
181 return 0;
182}
183
0463f12c
AQ
184static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
185 struct dvb_frontend_parameters* params)
1da177e4 186{
df8cf706
HH
187 u8 off[] = { 0x00, 0xf1};
188 u8 on[] = { 0x00, 0x71};
189 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
190
1da177e4
LT
191 struct saa7134_dev *dev = fe->dvb->priv;
192 struct v4l2_frequency f;
193
194 /* set frequency (mt2050) */
195 f.tuner = 0;
196 f.type = V4L2_TUNER_DIGITAL_TV;
197 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB
198 if (fe->ops.i2c_gate_ctrl)
199 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 200 i2c_transfer(&dev->i2c_adap, &msg, 1);
fac6986c 201 saa_call_all(dev, tuner, s_frequency, &f);
df8cf706 202 msg.buf = on;
dea74869
PB
203 if (fe->ops.i2c_gate_ctrl)
204 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 205 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
206
207 pinnacle_antenna_pwr(dev, antenna_pwr);
208
209 /* mt352 setup */
0463f12c 210 return mt352_pinnacle_init(fe);
1da177e4
LT
211}
212
213static struct mt352_config pinnacle_300i = {
214 .demod_address = 0x3c >> 1,
215 .adc_clock = 20333,
216 .if2 = 36150,
217 .no_tuner = 1,
218 .demod_init = mt352_pinnacle_init,
1da177e4 219};
a78d0bfa
JAR
220
221static struct mt352_config avermedia_777 = {
222 .demod_address = 0xf,
223 .demod_init = mt352_aver777_init,
a78d0bfa 224};
1da177e4 225
6e501a3f 226static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC
227 .demod_address = (0x1e >> 1),
228 .no_tuner = 1,
6e501a3f 229 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC
230};
231
f0551efc
MCC
232static struct tda18271_std_map mb86a20s_tda18271_std_map = {
233 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
234 .if_lvl = 7, .rfagc_top = 0x37, },
235};
236
237static struct tda18271_config kworld_tda18271_config = {
238 .std_map = &mb86a20s_tda18271_std_map,
239 .gate = TDA18271_GATE_DIGITAL,
240};
241
242static const struct mb86a20s_config kworld_mb86a20s_config = {
243 .demod_address = 0x10,
244};
245
58ef4f92
HH
246/* ==================================================================
247 * tda1004x based DVB-T cards, helper functions
248 */
249
250static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
251 const struct firmware **fw, char *name)
1da177e4
LT
252{
253 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
254 return request_firmware(fw, name, &dev->pci->dev);
255}
256
58ef4f92
HH
257/* ------------------------------------------------------------------
258 * these tuners are tu1216, td1316(a)
259 */
260
261static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
262{
263 struct saa7134_dev *dev = fe->dvb->priv;
264 struct tda1004x_state *state = fe->demodulator_priv;
265 u8 addr = state->config->tuner_address;
86ddd96f 266 u8 tuner_buf[4];
2cf36ac4 267 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
268 sizeof(tuner_buf) };
269 int tuner_frequency = 0;
270 u8 band, cp, filter;
271
272 /* determine charge pump */
273 tuner_frequency = params->frequency + 36166000;
274 if (tuner_frequency < 87000000)
275 return -EINVAL;
276 else if (tuner_frequency < 130000000)
277 cp = 3;
278 else if (tuner_frequency < 160000000)
279 cp = 5;
280 else if (tuner_frequency < 200000000)
281 cp = 6;
282 else if (tuner_frequency < 290000000)
283 cp = 3;
284 else if (tuner_frequency < 420000000)
285 cp = 5;
286 else if (tuner_frequency < 480000000)
287 cp = 6;
288 else if (tuner_frequency < 620000000)
289 cp = 3;
290 else if (tuner_frequency < 830000000)
291 cp = 5;
292 else if (tuner_frequency < 895000000)
293 cp = 7;
294 else
295 return -EINVAL;
296
297 /* determine band */
298 if (params->frequency < 49000000)
299 return -EINVAL;
300 else if (params->frequency < 161000000)
301 band = 1;
302 else if (params->frequency < 444000000)
303 band = 2;
304 else if (params->frequency < 861000000)
305 band = 4;
306 else
307 return -EINVAL;
308
309 /* setup PLL filter */
310 switch (params->u.ofdm.bandwidth) {
311 case BANDWIDTH_6_MHZ:
312 filter = 0;
313 break;
314
315 case BANDWIDTH_7_MHZ:
316 filter = 0;
317 break;
318
319 case BANDWIDTH_8_MHZ:
320 filter = 1;
321 break;
1da177e4 322
86ddd96f
MCC
323 default:
324 return -EINVAL;
325 }
326
327 /* calculate divisor
328 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 329 */
86ddd96f
MCC
330 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
331
332 /* setup tuner buffer */
333 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
334 tuner_buf[1] = tuner_frequency & 0xff;
335 tuner_buf[2] = 0xca;
336 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
337
dea74869
PB
338 if (fe->ops.i2c_gate_ctrl)
339 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 340 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP
341 wprintk("could not write to tuner at addr: 0x%02x\n",
342 addr << 1);
86ddd96f 343 return -EIO;
58ef4f92 344 }
2cf36ac4
HH
345 msleep(1);
346 return 0;
347}
348
58ef4f92 349static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH
350{
351 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
352 struct tda1004x_state *state = fe->demodulator_priv;
353 u8 addr = state->config->tuner_address;
2cf36ac4
HH
354 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
355 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 356
2cf36ac4 357 /* setup PLL configuration */
dea74869
PB
358 if (fe->ops.i2c_gate_ctrl)
359 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
360 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
361 return -EIO;
86ddd96f 362 msleep(1);
2cf36ac4 363
1da177e4
LT
364 return 0;
365}
366
2cf36ac4
HH
367/* ------------------------------------------------------------------ */
368
2cf36ac4 369static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
370 .demod_address = 0x8,
371 .invert = 1,
2cf36ac4 372 .invert_oclk = 0,
86ddd96f
MCC
373 .xtal_freq = TDA10046_XTAL_4M,
374 .agc_config = TDA10046_AGC_DEFAULT,
375 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
376 .tuner_address = 0x60,
377 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
378};
379
2cf36ac4
HH
380static struct tda1004x_config philips_tu1216_61_config = {
381
382 .demod_address = 0x8,
383 .invert = 1,
384 .invert_oclk = 0,
385 .xtal_freq = TDA10046_XTAL_4M,
386 .agc_config = TDA10046_AGC_DEFAULT,
387 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
388 .tuner_address = 0x61,
389 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
390};
391
392/* ------------------------------------------------------------------ */
393
cbb94521 394static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
395{
396 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
397 struct tda1004x_state *state = fe->demodulator_priv;
398 u8 addr = state->config->tuner_address;
2cf36ac4 399 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 400 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH
401
402 /* setup PLL configuration */
dea74869
PB
403 if (fe->ops.i2c_gate_ctrl)
404 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
405 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
406 return -EIO;
2cf36ac4
HH
407 return 0;
408}
409
a79ddae9 410static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 411{
58ef4f92
HH
412 return philips_tda6651_pll_set(fe, params);
413}
414
415static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
416{
417 struct saa7134_dev *dev = fe->dvb->priv;
418 struct tda1004x_state *state = fe->demodulator_priv;
419 u8 addr = state->config->tuner_address;
420 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
421 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
422
423 /* switch the tuner to analog mode */
424 if (fe->ops.i2c_gate_ctrl)
425 fe->ops.i2c_gate_ctrl(fe, 1);
426 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
427 return -EIO;
428 return 0;
2cf36ac4
HH
429}
430
58ef4f92
HH
431/* ------------------------------------------------------------------ */
432
cbb94521
HH
433static int philips_europa_tuner_init(struct dvb_frontend *fe)
434{
435 struct saa7134_dev *dev = fe->dvb->priv;
436 static u8 msg[] = { 0x00, 0x40};
437 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
438
439
440 if (philips_td1316_tuner_init(fe))
441 return -EIO;
442 msleep(1);
443 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
444 return -EIO;
445
446 return 0;
447}
448
a79ddae9 449static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
450{
451 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 452
58ef4f92
HH
453 static u8 msg[] = { 0x00, 0x14 };
454 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
455
456 if (philips_td1316_tuner_sleep(fe))
457 return -EIO;
2cf36ac4
HH
458
459 /* switch the board to analog mode */
dea74869
PB
460 if (fe->ops.i2c_gate_ctrl)
461 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 462 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
463 return 0;
464}
465
466static int philips_europa_demod_sleep(struct dvb_frontend *fe)
467{
468 struct saa7134_dev *dev = fe->dvb->priv;
469
470 if (dev->original_demod_sleep)
471 dev->original_demod_sleep(fe);
dea74869 472 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 473 return 0;
2cf36ac4
HH
474}
475
476static struct tda1004x_config philips_europa_config = {
477
478 .demod_address = 0x8,
479 .invert = 0,
480 .invert_oclk = 0,
481 .xtal_freq = TDA10046_XTAL_4M,
482 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
483 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH
484 .tuner_address = 0x61,
485 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
486};
487
408b664a 488static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
489 .demod_address = 0x08,
490 .invert = 1,
491 .invert_oclk = 0,
492 .xtal_freq = TDA10046_XTAL_16M,
493 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
494 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH
495 .tuner_address = 0x61,
496 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
497};
498
128fe95d
VC
499static struct tda1004x_config technotrend_budget_t3000_config = {
500 .demod_address = 0x8,
501 .invert = 1,
502 .invert_oclk = 0,
503 .xtal_freq = TDA10046_XTAL_4M,
504 .agc_config = TDA10046_AGC_DEFAULT,
505 .if_freq = TDA10046_FREQ_3617,
506 .tuner_address = 0x63,
507 .request_firmware = philips_tda1004x_request_firmware
508};
509
58ef4f92
HH
510/* ------------------------------------------------------------------
511 * tda 1004x based cards with philips silicon tuner
512 */
513
58ef4f92
HH
514static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
515{
58ef4f92
HH
516 struct tda1004x_state *state = fe->demodulator_priv;
517
518 u8 addr = state->config->i2c_gate;
519 static u8 tda8290_close[] = { 0x21, 0xc0};
520 static u8 tda8290_open[] = { 0x21, 0x80};
521 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
522 if (enable) {
523 tda8290_msg.buf = tda8290_close;
524 } else {
525 tda8290_msg.buf = tda8290_open;
526 }
06be3035 527 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP
528 struct saa7134_dev *dev = fe->dvb->priv;
529 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH
530 return -EIO;
531 }
532 msleep(20);
533 return 0;
534}
535
58ef4f92 536static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 537{
90e9df7f 538 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 539 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 540
58ef4f92
HH
541 switch (state->config->antenna_switch) {
542 case 0: break;
543 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
544 saa7134_set_gpio(dev, 21, 0);
545 break;
546 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
547 saa7134_set_gpio(dev, 21, 1);
548 break;
587d2fd7 549 }
587d2fd7
HH
550 return 0;
551}
552
58ef4f92 553static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 554{
58ef4f92
HH
555 struct saa7134_dev *dev = fe->dvb->priv;
556 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 557
58ef4f92
HH
558 switch (state->config->antenna_switch) {
559 case 0: break;
560 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
561 saa7134_set_gpio(dev, 21, 1);
562 break;
563 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
564 saa7134_set_gpio(dev, 21, 0);
565 break;
566 }
587d2fd7 567 return 0;
2d6b5f62 568}
90e9df7f 569
d557dab5
MCC
570static int configure_tda827x_fe(struct saa7134_dev *dev,
571 struct tda1004x_config *cdec_conf,
572 struct tda827x_config *tuner_conf)
90e9df7f 573{
363c35fc
ST
574 struct videobuf_dvb_frontend *fe0;
575
92abe9ee
DB
576 /* Get the first frontend */
577 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
363c35fc
ST
578
579 fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
580 if (fe0->dvb.frontend) {
7bff4b4d 581 if (cdec_conf->i2c_gate)
363c35fc
ST
582 fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
583 if (dvb_attach(tda827x_attach, fe0->dvb.frontend,
d557dab5
MCC
584 cdec_conf->tuner_address,
585 &dev->i2c_adap, tuner_conf))
586 return 0;
587
588 wprintk("no tda827x tuner found at addr: %02x\n",
7bff4b4d 589 cdec_conf->tuner_address);
58ef4f92 590 }
d557dab5 591 return -EINVAL;
90e9df7f
HH
592}
593
58ef4f92 594/* ------------------------------------------------------------------ */
261f5081 595
7bff4b4d 596static struct tda827x_config tda827x_cfg_0 = {
7bff4b4d
HH
597 .init = philips_tda827x_tuner_init,
598 .sleep = philips_tda827x_tuner_sleep,
599 .config = 0,
600 .switch_addr = 0
601};
602
603static struct tda827x_config tda827x_cfg_1 = {
7bff4b4d
HH
604 .init = philips_tda827x_tuner_init,
605 .sleep = philips_tda827x_tuner_sleep,
606 .config = 1,
607 .switch_addr = 0x4b
608};
609
610static struct tda827x_config tda827x_cfg_2 = {
7bff4b4d
HH
611 .init = philips_tda827x_tuner_init,
612 .sleep = philips_tda827x_tuner_sleep,
613 .config = 2,
614 .switch_addr = 0x4b
615};
616
617static struct tda827x_config tda827x_cfg_2_sw42 = {
7bff4b4d
HH
618 .init = philips_tda827x_tuner_init,
619 .sleep = philips_tda827x_tuner_sleep,
620 .config = 2,
621 .switch_addr = 0x42
622};
623
624/* ------------------------------------------------------------------ */
625
f0551efc
MCC
626static int __kworld_sbtvd_i2c_gate_ctrl(struct saa7134_dev *dev, int enable)
627{
628 unsigned char initmsg[] = {0x45, 0x97};
629 unsigned char msg_enable[] = {0x45, 0xc1};
630 unsigned char msg_disable[] = {0x45, 0x81};
631 struct i2c_msg msg = {.addr = 0x4b, .flags = 0, .buf = initmsg, .len = 2};
632
633 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
634 wprintk("could not access the I2C gate\n");
635 return -EIO;
636 }
637 if (enable)
638 msg.buf = msg_enable;
639 else
640 msg.buf = msg_disable;
641 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
642 wprintk("could not access the I2C gate\n");
643 return -EIO;
644 }
645 msleep(20);
646 return 0;
647}
648static int kworld_sbtvd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
649{
650 struct saa7134_dev *dev = fe->dvb->priv;
651
652 return __kworld_sbtvd_i2c_gate_ctrl(dev, enable);
653}
654
655/* ------------------------------------------------------------------ */
656
58ef4f92 657static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH
658 .demod_address = 0x08,
659 .invert = 1,
660 .invert_oclk = 0,
661 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
662 .agc_config = TDA10046_AGC_TDA827X,
663 .gpio_config = TDA10046_GP11_I,
550a9a5e 664 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
665 .tuner_address = 0x60,
666 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 667};
550a9a5e 668
58ef4f92
HH
669static struct tda1004x_config philips_tiger_config = {
670 .demod_address = 0x08,
671 .invert = 1,
672 .invert_oclk = 0,
673 .xtal_freq = TDA10046_XTAL_16M,
674 .agc_config = TDA10046_AGC_TDA827X,
675 .gpio_config = TDA10046_GP11_I,
676 .if_freq = TDA10046_FREQ_045,
677 .i2c_gate = 0x4b,
678 .tuner_address = 0x61,
58ef4f92
HH
679 .antenna_switch= 1,
680 .request_firmware = philips_tda1004x_request_firmware
681};
550a9a5e
HH
682
683static struct tda1004x_config cinergy_ht_config = {
684 .demod_address = 0x08,
685 .invert = 1,
686 .invert_oclk = 0,
687 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
688 .agc_config = TDA10046_AGC_TDA827X,
689 .gpio_config = TDA10046_GP01_I,
90e9df7f 690 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
691 .i2c_gate = 0x4b,
692 .tuner_address = 0x61,
58ef4f92 693 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH
694};
695
58ef4f92
HH
696static struct tda1004x_config cinergy_ht_pci_config = {
697 .demod_address = 0x08,
698 .invert = 1,
699 .invert_oclk = 0,
700 .xtal_freq = TDA10046_XTAL_16M,
701 .agc_config = TDA10046_AGC_TDA827X,
702 .gpio_config = TDA10046_GP01_I,
703 .if_freq = TDA10046_FREQ_045,
704 .i2c_gate = 0x4b,
705 .tuner_address = 0x60,
58ef4f92
HH
706 .request_firmware = philips_tda1004x_request_firmware
707};
708
709static struct tda1004x_config philips_tiger_s_config = {
710 .demod_address = 0x08,
711 .invert = 1,
712 .invert_oclk = 0,
713 .xtal_freq = TDA10046_XTAL_16M,
714 .agc_config = TDA10046_AGC_TDA827X,
715 .gpio_config = TDA10046_GP01_I,
716 .if_freq = TDA10046_FREQ_045,
717 .i2c_gate = 0x4b,
718 .tuner_address = 0x61,
58ef4f92
HH
719 .antenna_switch= 1,
720 .request_firmware = philips_tda1004x_request_firmware
721};
df42eaf2 722
587d2fd7
HH
723static struct tda1004x_config pinnacle_pctv_310i_config = {
724 .demod_address = 0x08,
725 .invert = 1,
726 .invert_oclk = 0,
727 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
728 .agc_config = TDA10046_AGC_TDA827X,
729 .gpio_config = TDA10046_GP11_I,
587d2fd7 730 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
731 .i2c_gate = 0x4b,
732 .tuner_address = 0x61,
58ef4f92 733 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH
734};
735
c6e53daf
TG
736static struct tda1004x_config hauppauge_hvr_1110_config = {
737 .demod_address = 0x08,
738 .invert = 1,
739 .invert_oclk = 0,
740 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
741 .agc_config = TDA10046_AGC_TDA827X,
742 .gpio_config = TDA10046_GP11_I,
c6e53daf 743 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
744 .i2c_gate = 0x4b,
745 .tuner_address = 0x61,
746 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG
747};
748
83646817
HH
749static struct tda1004x_config asus_p7131_dual_config = {
750 .demod_address = 0x08,
751 .invert = 1,
752 .invert_oclk = 0,
753 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
754 .agc_config = TDA10046_AGC_TDA827X,
755 .gpio_config = TDA10046_GP11_I,
83646817 756 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
757 .i2c_gate = 0x4b,
758 .tuner_address = 0x61,
58ef4f92
HH
759 .antenna_switch= 2,
760 .request_firmware = philips_tda1004x_request_firmware
83646817
HH
761};
762
420f32fe
NS
763static struct tda1004x_config lifeview_trio_config = {
764 .demod_address = 0x09,
765 .invert = 1,
766 .invert_oclk = 0,
767 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
768 .agc_config = TDA10046_AGC_TDA827X,
769 .gpio_config = TDA10046_GP00_I,
420f32fe 770 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
771 .tuner_address = 0x60,
772 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS
773};
774
58ef4f92 775static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH
776 .demod_address = 0x08,
777 .invert = 1,
778 .invert_oclk = 0,
779 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 780 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 781 .gpio_config = TDA10046_GP11_I,
df42eaf2 782 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
783 .tuner_address = 0x60,
784 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH
785};
786
58ef4f92 787static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH
788 .demod_address = 0x08,
789 .invert = 1,
790 .invert_oclk = 0,
791 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 792 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 793 .gpio_config = TDA10046_GP01_I,
3dfb729f 794 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
795 .i2c_gate = 0x4b,
796 .tuner_address = 0x60,
58ef4f92 797 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH
798};
799
e06cea4c
HH
800static struct tda1004x_config asus_p7131_4871_config = {
801 .demod_address = 0x08,
802 .invert = 1,
803 .invert_oclk = 0,
804 .xtal_freq = TDA10046_XTAL_16M,
805 .agc_config = TDA10046_AGC_TDA827X,
806 .gpio_config = TDA10046_GP01_I,
807 .if_freq = TDA10046_FREQ_045,
808 .i2c_gate = 0x4b,
809 .tuner_address = 0x61,
e06cea4c
HH
810 .antenna_switch= 2,
811 .request_firmware = philips_tda1004x_request_firmware
812};
813
f3eec0c0 814static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH
815 .demod_address = 0x08,
816 .invert = 1,
817 .invert_oclk = 0,
818 .xtal_freq = TDA10046_XTAL_16M,
819 .agc_config = TDA10046_AGC_TDA827X,
820 .gpio_config = TDA10046_GP11_I,
821 .if_freq = TDA10046_FREQ_045,
822 .i2c_gate = 0x4b,
823 .tuner_address = 0x61,
e06cea4c
HH
824 .antenna_switch= 2,
825 .request_firmware = philips_tda1004x_request_firmware
826};
261f5081 827
b39423a9
SF
828static struct tda1004x_config kworld_dvb_t_210_config = {
829 .demod_address = 0x08,
830 .invert = 1,
831 .invert_oclk = 0,
832 .xtal_freq = TDA10046_XTAL_16M,
833 .agc_config = TDA10046_AGC_TDA827X,
834 .gpio_config = TDA10046_GP11_I,
835 .if_freq = TDA10046_FREQ_045,
836 .i2c_gate = 0x4b,
837 .tuner_address = 0x61,
b39423a9
SF
838 .antenna_switch= 1,
839 .request_firmware = philips_tda1004x_request_firmware
840};
261f5081 841
d90d9f5a
ES
842static struct tda1004x_config avermedia_super_007_config = {
843 .demod_address = 0x08,
844 .invert = 1,
845 .invert_oclk = 0,
846 .xtal_freq = TDA10046_XTAL_16M,
847 .agc_config = TDA10046_AGC_TDA827X,
848 .gpio_config = TDA10046_GP01_I,
849 .if_freq = TDA10046_FREQ_045,
850 .i2c_gate = 0x4b,
851 .tuner_address = 0x60,
d90d9f5a
ES
852 .antenna_switch= 1,
853 .request_firmware = philips_tda1004x_request_firmware
854};
855
4ba24373
HP
856static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
857 .demod_address = 0x08,
858 .invert = 1,
859 .invert_oclk = 0,
860 .xtal_freq = TDA10046_XTAL_16M,
861 .agc_config = TDA10046_AGC_TDA827X,
862 .gpio_config = TDA10046_GP01_I,
863 .if_freq = TDA10046_FREQ_045,
864 .i2c_gate = 0x42,
865 .tuner_address = 0x61,
4ba24373
HP
866 .antenna_switch = 1,
867 .request_firmware = philips_tda1004x_request_firmware
868};
869
301e9d64 870static struct tda1004x_config asus_tiger_3in1_config = {
871 .demod_address = 0x0b,
872 .invert = 1,
873 .invert_oclk = 0,
874 .xtal_freq = TDA10046_XTAL_16M,
875 .agc_config = TDA10046_AGC_TDA827X,
876 .gpio_config = TDA10046_GP11_I,
877 .if_freq = TDA10046_FREQ_045,
878 .i2c_gate = 0x4b,
879 .tuner_address = 0x61,
880 .antenna_switch = 1,
881 .request_firmware = philips_tda1004x_request_firmware
882};
883
58ef4f92
HH
884/* ------------------------------------------------------------------
885 * special case: this card uses saa713x GPIO22 for the mode switch
886 */
5eda227f 887
58ef4f92 888static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH
889{
890 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
891 philips_tda827x_tuner_init(fe);
892 /* route TDA8275a AGC input to the channel decoder */
06be3035 893 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH
894 return 0;
895}
896
58ef4f92 897static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 898{
5eda227f 899 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 900 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 901 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH
902 philips_tda827x_tuner_sleep(fe);
903 return 0;
5eda227f
HH
904}
905
8ce47dad 906static struct tda827x_config ads_duo_cfg = {
8ce47dad 907 .init = ads_duo_tuner_init,
7bff4b4d
HH
908 .sleep = ads_duo_tuner_sleep,
909 .config = 0
8ce47dad
MK
910};
911
58ef4f92 912static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH
913 .demod_address = 0x08,
914 .invert = 1,
915 .invert_oclk = 0,
916 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 917 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 918 .gpio_config = TDA10046_GP00_I,
5eda227f 919 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
920 .tuner_address = 0x61,
921 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH
922};
923
47aeba5a
DB
924static struct zl10353_config behold_h6_config = {
925 .demod_address = 0x1e>>1,
926 .no_tuner = 1,
927 .parallel_ts = 1,
5f77af93 928 .disable_i2c_gate_ctrl = 1,
47aeba5a
DB
929};
930
2930992c
BILDB
931static struct xc5000_config behold_x7_tunerconfig = {
932 .i2c_address = 0xc2>>1,
933 .if_khz = 4560,
2a0d0560 934 .radio_input = XC5000_RADIO_FM1,
2930992c
BILDB
935};
936
937static struct zl10353_config behold_x7_config = {
938 .demod_address = 0x1e>>1,
939 .if2 = 45600,
940 .no_tuner = 1,
941 .parallel_ts = 1,
942 .disable_i2c_gate_ctrl = 1,
943};
944
58ef4f92
HH
945/* ==================================================================
946 * tda10086 based DVB-S cards, helper functions
947 */
948
e2ac28fa
IL
949static struct tda10086_config flydvbs = {
950 .demod_address = 0x0e,
951 .invert = 0,
ea75baf4 952 .diseqc_tone = 0,
9a1b04e4
HH
953 .xtal_freq = TDA10086_XTAL_16M,
954};
955
956static struct tda10086_config sd1878_4m = {
957 .demod_address = 0x0e,
958 .invert = 0,
959 .diseqc_tone = 0,
960 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL
961};
962
1b1cee35
HH
963/* ------------------------------------------------------------------
964 * special case: lnb supply is connected to the gated i2c
965 */
966
967static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
968{
969 int res = -EIO;
970 struct saa7134_dev *dev = fe->dvb->priv;
971 if (fe->ops.i2c_gate_ctrl) {
972 fe->ops.i2c_gate_ctrl(fe, 1);
973 if (dev->original_set_voltage)
974 res = dev->original_set_voltage(fe, voltage);
975 fe->ops.i2c_gate_ctrl(fe, 0);
976 }
977 return res;
978};
979
980static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
981{
982 int res = -EIO;
983 struct saa7134_dev *dev = fe->dvb->priv;
984 if (fe->ops.i2c_gate_ctrl) {
985 fe->ops.i2c_gate_ctrl(fe, 1);
986 if (dev->original_set_high_voltage)
987 res = dev->original_set_high_voltage(fe, arg);
988 fe->ops.i2c_gate_ctrl(fe, 0);
989 }
990 return res;
991};
992
5823b3a6
HH
993static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
994{
995 struct saa7134_dev *dev = fe->dvb->priv;
996 u8 wbuf[2] = { 0x1f, 00 };
997 u8 rbuf;
998 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
999 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
1000
1001 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
1002 return -EIO;
1003 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
1004 if (voltage == SEC_VOLTAGE_18)
1005 wbuf[1] = rbuf | 0x10;
1006 else
1007 wbuf[1] = rbuf & 0xef;
1008 msg[0].len = 2;
1009 i2c_transfer(&dev->i2c_adap, msg, 1);
1010 return 0;
1011}
1012
1013static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
1014{
1015 struct saa7134_dev *dev = fe->dvb->priv;
1016 wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__);
1017 return -EIO;
1018}
1019
58ef4f92
HH
1020/* ==================================================================
1021 * nxt200x based ATSC cards, helper functions
1022 */
90e9df7f 1023
3b64e8e2
MK
1024static struct nxt200x_config avertvhda180 = {
1025 .demod_address = 0x0a,
3b64e8e2 1026};
3e1410ad
AB
1027
1028static struct nxt200x_config kworldatsc110 = {
1029 .demod_address = 0x0a,
3e1410ad 1030};
3b64e8e2 1031
04574185
MS
1032/* ------------------------------------------------------------------ */
1033
1034static struct mt312_config avertv_a700_mt312 = {
1035 .demod_address = 0x0e,
1036 .voltage_inverted = 1,
1037};
1038
1039static struct zl10036_config avertv_a700_tuner = {
1040 .tuner_address = 0x60,
1041};
1042
ecfcfec8
IL
1043static struct mt312_config zl10313_compro_s350_config = {
1044 .demod_address = 0x0e,
1045};
1046
3abdedd8
MK
1047static struct lgdt3305_config hcw_lgdt3305_config = {
1048 .i2c_addr = 0x0e,
1049 .mpeg_mode = LGDT3305_MPEG_SERIAL,
1050 .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE,
1051 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
1052 .deny_i2c_rptr = 1,
1053 .spectral_inversion = 1,
1054 .qam_if_khz = 4000,
1055 .vsb_if_khz = 3250,
1056};
1057
1bc7f51c
MK
1058static struct tda10048_config hcw_tda10048_config = {
1059 .demod_address = 0x10 >> 1,
1060 .output_mode = TDA10048_SERIAL_OUTPUT,
1061 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1062 .inversion = TDA10048_INVERSION_ON,
1063 .dtv6_if_freq_khz = TDA10048_IF_3300,
1064 .dtv7_if_freq_khz = TDA10048_IF_3500,
1065 .dtv8_if_freq_khz = TDA10048_IF_4000,
1066 .clk_freq_khz = TDA10048_CLK_16000,
1067 .disable_gate_access = 1,
1068};
1069
3abdedd8
MK
1070static struct tda18271_std_map hauppauge_tda18271_std_map = {
1071 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
1072 .if_lvl = 1, .rfagc_top = 0x58, },
1073 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
1074 .if_lvl = 1, .rfagc_top = 0x58, },
1075};
1076
1077static struct tda18271_config hcw_tda18271_config = {
1078 .std_map = &hauppauge_tda18271_std_map,
1079 .gate = TDA18271_GATE_ANALOG,
1080 .config = 3,
542cb057 1081 .output_opt = TDA18271_OUTPUT_LT_OFF,
3abdedd8
MK
1082};
1083
1084static struct tda829x_config tda829x_no_probe = {
1085 .probe_tuner = TDA829X_DONT_PROBE,
1086};
1087
6c119ff4
HV
1088static struct tda10048_config zolid_tda10048_config = {
1089 .demod_address = 0x10 >> 1,
1090 .output_mode = TDA10048_PARALLEL_OUTPUT,
1091 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1092 .inversion = TDA10048_INVERSION_ON,
1093 .dtv6_if_freq_khz = TDA10048_IF_3300,
1094 .dtv7_if_freq_khz = TDA10048_IF_3500,
1095 .dtv8_if_freq_khz = TDA10048_IF_4000,
1096 .clk_freq_khz = TDA10048_CLK_16000,
1097 .disable_gate_access = 1,
1098};
1099
1100static struct tda18271_config zolid_tda18271_config = {
1101 .gate = TDA18271_GATE_ANALOG,
1102};
1103
184e769f
MK
1104static struct tda10048_config dtv1000s_tda10048_config = {
1105 .demod_address = 0x10 >> 1,
1106 .output_mode = TDA10048_PARALLEL_OUTPUT,
1107 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1108 .inversion = TDA10048_INVERSION_ON,
1109 .dtv6_if_freq_khz = TDA10048_IF_3300,
1110 .dtv7_if_freq_khz = TDA10048_IF_3800,
1111 .dtv8_if_freq_khz = TDA10048_IF_4300,
1112 .clk_freq_khz = TDA10048_CLK_16000,
1113 .disable_gate_access = 1,
1114};
1115
1116static struct tda18271_std_map dtv1000s_tda18271_std_map = {
1117 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
1118 .if_lvl = 1, .rfagc_top = 0x37, },
1119 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
1120 .if_lvl = 1, .rfagc_top = 0x37, },
1121 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
1122 .if_lvl = 1, .rfagc_top = 0x37, },
1123};
1124
1125static struct tda18271_config dtv1000s_tda18271_config = {
1126 .std_map = &dtv1000s_tda18271_std_map,
1127 .gate = TDA18271_GATE_ANALOG,
1128};
1129
58ef4f92
HH
1130/* ==================================================================
1131 * Core code
1132 */
1da177e4
LT
1133
1134static int dvb_init(struct saa7134_dev *dev)
1135{
1c4f76ab 1136 int ret;
bc36a686 1137 int attach_xc3028 = 0;
363c35fc
ST
1138 struct videobuf_dvb_frontend *fe0;
1139
f972e0bd
DB
1140 /* FIXME: add support for multi-frontend */
1141 mutex_init(&dev->frontends.lock);
7bdf84fc 1142 INIT_LIST_HEAD(&dev->frontends.felist);
f972e0bd
DB
1143
1144 printk(KERN_INFO "%s() allocating 1 frontend\n", __func__);
f3f741e7
DB
1145 fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1);
1146 if (!fe0) {
f972e0bd
DB
1147 printk(KERN_ERR "%s() failed to alloc\n", __func__);
1148 return -ENOMEM;
1149 }
1150
1da177e4
LT
1151 /* init struct videobuf_dvb */
1152 dev->ts.nr_bufs = 32;
1153 dev->ts.nr_packets = 32*4;
363c35fc
ST
1154 fe0->dvb.name = dev->name;
1155 videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops,
0705135e 1156 &dev->pci->dev, &dev->slock,
1da177e4
LT
1157 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1158 V4L2_FIELD_ALTERNATE,
1159 sizeof(struct saa7134_buf),
08bff03e 1160 dev, NULL);
1da177e4
LT
1161
1162 switch (dev->board) {
1163 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 1164 dprintk("pinnacle 300i dvb setup\n");
363c35fc 1165 fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1166 &dev->i2c_adap);
363c35fc
ST
1167 if (fe0->dvb.frontend) {
1168 fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1169 }
1da177e4 1170 break;
a78d0bfa 1171 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1172 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 1173 dprintk("avertv 777 dvb setup\n");
363c35fc 1174 fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1175 &dev->i2c_adap);
363c35fc
ST
1176 if (fe0->dvb.frontend) {
1177 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
fb147e97
MK
1178 &dev->i2c_adap, 0x61,
1179 TUNER_PHILIPS_TD1316);
6b3ccab7 1180 }
a78d0bfa 1181 break;
95a2fdb6 1182 case SAA7134_BOARD_AVERMEDIA_A16D:
6e501a3f 1183 dprintk("AverMedia A16D dvb setup\n");
363c35fc 1184 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1185 &avermedia_xc3028_mt352_dev,
1186 &dev->i2c_adap);
95a2fdb6
MCC
1187 attach_xc3028 = 1;
1188 break;
1da177e4 1189 case SAA7134_BOARD_MD7134:
363c35fc 1190 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1191 &medion_cardbus,
1192 &dev->i2c_adap);
363c35fc
ST
1193 if (fe0->dvb.frontend) {
1194 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1195 &dev->i2c_adap, medion_cardbus.tuner_address,
1196 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 1197 }
1da177e4 1198 break;
86ddd96f 1199 case SAA7134_BOARD_PHILIPS_TOUGH:
363c35fc 1200 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1201 &philips_tu1216_60_config,
1202 &dev->i2c_adap);
363c35fc
ST
1203 if (fe0->dvb.frontend) {
1204 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1205 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1206 }
86ddd96f
MCC
1207 break;
1208 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1209 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC
1210 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1211 &tda827x_cfg_0) < 0)
1212 goto dettach_frontend;
86ddd96f 1213 break;
2cf36ac4 1214 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1215 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
e3c6e1aa 1216 case SAA7134_BOARD_ASUS_EUROPA_HYBRID:
363c35fc 1217 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1218 &philips_europa_config,
1219 &dev->i2c_adap);
363c35fc
ST
1220 if (fe0->dvb.frontend) {
1221 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1222 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1223 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1224 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1225 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1226 }
2cf36ac4 1227 break;
128fe95d
VC
1228 case SAA7134_BOARD_TECHNOTREND_BUDGET_T3000:
1229 fe0->dvb.frontend = dvb_attach(tda10046_attach,
1230 &technotrend_budget_t3000_config,
1231 &dev->i2c_adap);
1232 if (fe0->dvb.frontend) {
1233 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1234 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1235 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1236 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1237 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1238 }
1239 break;
2cf36ac4 1240 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
363c35fc 1241 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1242 &philips_tu1216_61_config,
1243 &dev->i2c_adap);
363c35fc
ST
1244 if (fe0->dvb.frontend) {
1245 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1246 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1247 }
2cf36ac4 1248 break;
b39423a9 1249 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC
1250 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1251 &tda827x_cfg_2) < 0)
1252 goto dettach_frontend;
b39423a9 1253 break;
0e316ecf 1254 case SAA7134_BOARD_HAUPPAUGE_HVR1120:
1bc7f51c
MK
1255 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1256 &hcw_tda10048_config,
1257 &dev->i2c_adap);
1258 if (fe0->dvb.frontend != NULL) {
1259 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1260 &dev->i2c_adap, 0x4b,
1261 &tda829x_no_probe);
1262 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1263 0x60, &dev->i2c_adap,
1264 &hcw_tda18271_config);
1265 }
1266 break;
90e9df7f 1267 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC
1268 if (configure_tda827x_fe(dev, &philips_tiger_config,
1269 &tda827x_cfg_0) < 0)
1270 goto dettach_frontend;
587d2fd7
HH
1271 break;
1272 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC
1273 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1274 &tda827x_cfg_1) < 0)
1275 goto dettach_frontend;
90e9df7f 1276 break;
c6e53daf 1277 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC
1278 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1279 &tda827x_cfg_1) < 0)
1280 goto dettach_frontend;
c6e53daf 1281 break;
b5f05064 1282 case SAA7134_BOARD_HAUPPAUGE_HVR1150:
3abdedd8
MK
1283 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
1284 &hcw_lgdt3305_config,
1285 &dev->i2c_adap);
1286 if (fe0->dvb.frontend) {
1287 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1288 &dev->i2c_adap, 0x4b,
1289 &tda829x_no_probe);
1290 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1291 0x60, &dev->i2c_adap,
1292 &hcw_tda18271_config);
1293 }
1294 break;
d4b0aba4 1295 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC
1296 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1297 &tda827x_cfg_0) < 0)
1298 goto dettach_frontend;
d4b0aba4 1299 break;
3d8466ec 1300 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC
1301 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1302 &tda827x_cfg_0) < 0)
1303 goto dettach_frontend;
3d8466ec 1304 break;
92abe9ee 1305 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC
1306 if (!use_frontend) { /* terrestrial */
1307 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1308 &tda827x_cfg_0) < 0)
1309 goto dettach_frontend;
7bff4b4d 1310 } else { /* satellite */
363c35fc
ST
1311 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1312 if (fe0->dvb.frontend) {
1313 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63,
1f683cd8 1314 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1315 wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__);
d557dab5 1316 goto dettach_frontend;
1f683cd8 1317 }
363c35fc 1318 if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap,
1f683cd8 1319 0x08, 0, 0) == NULL) {
5823b3a6 1320 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__);
d557dab5 1321 goto dettach_frontend;
1f683cd8
NS
1322 }
1323 }
6b3ccab7 1324 }
420f32fe 1325 break;
df42eaf2 1326 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1327 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
363c35fc 1328 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1329 &ads_tech_duo_config,
1330 &dev->i2c_adap);
363c35fc
ST
1331 if (fe0->dvb.frontend) {
1332 if (dvb_attach(tda827x_attach,fe0->dvb.frontend,
7bff4b4d
HH
1333 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1334 &ads_duo_cfg) == NULL) {
cf3c34c8 1335 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d 1336 ads_tech_duo_config.tuner_address);
d557dab5 1337 goto dettach_frontend;
ede2200d 1338 }
bc36ec74
MCC
1339 } else
1340 wprintk("failed to attach tda10046\n");
df42eaf2 1341 break;
3dfb729f 1342 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC
1343 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1344 &tda827x_cfg_0) < 0)
1345 goto dettach_frontend;
d95b8942 1346 break;
5eda227f 1347 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1348 if (!use_frontend) { /* terrestrial */
d557dab5
MCC
1349 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1350 &tda827x_cfg_0) < 0)
1351 goto dettach_frontend;
4b1431ca 1352 } else { /* satellite */
363c35fc 1353 fe0->dvb.frontend = dvb_attach(tda10086_attach,
4b1431ca 1354 &flydvbs, &dev->i2c_adap);
363c35fc
ST
1355 if (fe0->dvb.frontend) {
1356 struct dvb_frontend *fe = fe0->dvb.frontend;
5823b3a6
HH
1357 u8 dev_id = dev->eedata[2];
1358 u8 data = 0xc4;
1359 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1360
363c35fc 1361 if (dvb_attach(tda826x_attach, fe0->dvb.frontend,
d557dab5 1362 0x60, &dev->i2c_adap, 0) == NULL) {
4b1431ca 1363 wprintk("%s: Medion Quadro, no tda826x "
5823b3a6 1364 "found !\n", __func__);
d557dab5
MCC
1365 goto dettach_frontend;
1366 }
5823b3a6
HH
1367 if (dev_id != 0x08) {
1368 /* we need to open the i2c gate (we know it exists) */
1369 fe->ops.i2c_gate_ctrl(fe, 1);
1370 if (dvb_attach(isl6405_attach, fe,
d557dab5 1371 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6
HH
1372 wprintk("%s: Medion Quadro, no ISL6405 "
1373 "found !\n", __func__);
d557dab5
MCC
1374 goto dettach_frontend;
1375 }
e9c1ac9d
HH
1376 if (dev_id == 0x07) {
1377 /* fire up the 2nd section of the LNB supply since
1378 we can't do this from the other section */
1379 msg.buf = &data;
1380 i2c_transfer(&dev->i2c_adap, &msg, 1);
1381 }
5823b3a6
HH
1382 fe->ops.i2c_gate_ctrl(fe, 0);
1383 dev->original_set_voltage = fe->ops.set_voltage;
1384 fe->ops.set_voltage = md8800_set_voltage;
1385 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1386 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1387 } else {
1388 fe->ops.set_voltage = md8800_set_voltage2;
1389 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1390 }
4b1431ca
HH
1391 }
1392 }
5eda227f 1393 break;
3b64e8e2 1394 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
363c35fc 1395 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
f7b54b10 1396 &dev->i2c_adap);
363c35fc
ST
1397 if (fe0->dvb.frontend)
1398 dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61,
47a9991e 1399 NULL, DVB_PLL_TDHU2);
3b64e8e2 1400 break;
f689d908 1401 case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI:
3e1410ad 1402 case SAA7134_BOARD_KWORLD_ATSC110:
363c35fc 1403 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
f7b54b10 1404 &dev->i2c_adap);
363c35fc
ST
1405 if (fe0->dvb.frontend)
1406 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
62ff817a
MK
1407 &dev->i2c_adap, 0x61,
1408 TUNER_PHILIPS_TUV1236D);
3e1410ad 1409 break;
e2ac28fa 1410 case SAA7134_BOARD_FLYDVBS_LR300:
363c35fc 1411 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
f7b54b10 1412 &dev->i2c_adap);
363c35fc
ST
1413 if (fe0->dvb.frontend) {
1414 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
f7b54b10 1415 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1416 wprintk("%s: No tda826x found!\n", __func__);
d557dab5 1417 goto dettach_frontend;
e2ac28fa 1418 }
363c35fc 1419 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
f7b54b10 1420 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6 1421 wprintk("%s: No ISL6421 found!\n", __func__);
d557dab5 1422 goto dettach_frontend;
e2ac28fa
IL
1423 }
1424 }
1425 break;
cf146ca4 1426 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
363c35fc 1427 fe0->dvb.frontend = dvb_attach(tda10046_attach,
0e8f4cc5
MS
1428 &medion_cardbus,
1429 &dev->i2c_adap);
363c35fc
ST
1430 if (fe0->dvb.frontend) {
1431 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1432 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1433
363c35fc 1434 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1435 &dev->i2c_adap, medion_cardbus.tuner_address,
1436 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH
1437 }
1438 break;
cbb94521 1439 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
363c35fc 1440 fe0->dvb.frontend = dvb_attach(tda10046_attach,
cbb94521
HH
1441 &philips_europa_config,
1442 &dev->i2c_adap);
363c35fc
ST
1443 if (fe0->dvb.frontend) {
1444 fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1445 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
cbb94521
HH
1446 }
1447 break;
550a9a5e 1448 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC
1449 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1450 &tda827x_cfg_0) < 0)
1451 goto dettach_frontend;
9de271e6
MK
1452 break;
1453 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC
1454 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1455 &tda827x_cfg_0) < 0)
1456 goto dettach_frontend;
58ef4f92
HH
1457 break;
1458 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC
1459 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1460 &tda827x_cfg_2) < 0)
1461 goto dettach_frontend;
550a9a5e 1462 break;
e06cea4c 1463 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC
1464 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1465 &tda827x_cfg_2) < 0)
1466 goto dettach_frontend;
e06cea4c 1467 break;
f3eec0c0 1468 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC
1469 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1470 &tda827x_cfg_2) < 0)
1471 goto dettach_frontend;
e06cea4c 1472 break;
d90d9f5a 1473 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC
1474 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1475 &tda827x_cfg_0) < 0)
1476 goto dettach_frontend;
d90d9f5a 1477 break;
4ba24373 1478 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC
1479 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1480 &tda827x_cfg_2_sw42) < 0)
1481 goto dettach_frontend;
4ba24373 1482 break;
6ab465a8 1483 case SAA7134_BOARD_PHILIPS_SNAKE:
363c35fc 1484 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
6ab465a8 1485 &dev->i2c_adap);
363c35fc
ST
1486 if (fe0->dvb.frontend) {
1487 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
d557dab5 1488 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1489 wprintk("%s: No tda826x found!\n", __func__);
d557dab5
MCC
1490 goto dettach_frontend;
1491 }
363c35fc 1492 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
d557dab5 1493 &dev->i2c_adap, 0, 0) == NULL) {
5823b3a6 1494 wprintk("%s: No lnbp21 found!\n", __func__);
d557dab5
MCC
1495 goto dettach_frontend;
1496 }
6ab465a8
HH
1497 }
1498 break;
7b5b3f17 1499 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC
1500 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1501 &tda827x_cfg_0) < 0)
1502 goto dettach_frontend;
7b5b3f17 1503 break;
6a6179b6 1504 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC
1505 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1506 &tda827x_cfg_2) < 0)
1507 goto dettach_frontend;
6a6179b6 1508 break;
bc36a686 1509 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
6e501a3f
TF
1510 dprintk("AverMedia E506R dvb setup\n");
1511 saa7134_set_gpio(dev, 25, 0);
1512 msleep(10);
1513 saa7134_set_gpio(dev, 25, 1);
363c35fc 1514 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1515 &avermedia_xc3028_mt352_dev,
1516 &dev->i2c_adap);
bc36a686 1517 attach_xc3028 = 1;
e2fc00c2 1518 break;
637afdb5 1519 case SAA7134_BOARD_MD7134_BRIDGE_2:
363c35fc 1520 fe0->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1521 &sd1878_4m, &dev->i2c_adap);
363c35fc 1522 if (fe0->dvb.frontend) {
637afdb5 1523 struct dvb_frontend *fe;
363c35fc 1524 if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
d557dab5 1525 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
637afdb5 1526 wprintk("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1527 "found !\n", __func__);
d557dab5
MCC
1528 goto dettach_frontend;
1529 }
637afdb5 1530 /* we need to open the i2c gate (we know it exists) */
363c35fc 1531 fe = fe0->dvb.frontend;
637afdb5
HH
1532 fe->ops.i2c_gate_ctrl(fe, 1);
1533 if (dvb_attach(isl6405_attach, fe,
d557dab5 1534 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
637afdb5 1535 wprintk("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1536 "found !\n", __func__);
d557dab5
MCC
1537 goto dettach_frontend;
1538 }
637afdb5
HH
1539 fe->ops.i2c_gate_ctrl(fe, 0);
1540 dev->original_set_voltage = fe->ops.set_voltage;
1541 fe->ops.set_voltage = md8800_set_voltage;
1542 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1543 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1544 }
1545 break;
e2fc00c2
MP
1546 case SAA7134_BOARD_AVERMEDIA_M103:
1547 saa7134_set_gpio(dev, 25, 0);
1548 msleep(10);
1549 saa7134_set_gpio(dev, 25, 1);
363c35fc 1550 fe0->dvb.frontend = dvb_attach(mt352_attach,
e2fc00c2
MP
1551 &avermedia_xc3028_mt352_dev,
1552 &dev->i2c_adap);
1553 attach_xc3028 = 1;
1554 break;
301e9d64 1555 case SAA7134_BOARD_ASUSTeK_TIGER_3IN1:
1556 if (!use_frontend) { /* terrestrial */
1557 if (configure_tda827x_fe(dev, &asus_tiger_3in1_config,
1558 &tda827x_cfg_2) < 0)
1559 goto dettach_frontend;
1560 } else { /* satellite */
363c35fc 1561 fe0->dvb.frontend = dvb_attach(tda10086_attach,
301e9d64 1562 &flydvbs, &dev->i2c_adap);
363c35fc 1563 if (fe0->dvb.frontend) {
301e9d64 1564 if (dvb_attach(tda826x_attach,
363c35fc 1565 fe0->dvb.frontend, 0x60,
301e9d64 1566 &dev->i2c_adap, 0) == NULL) {
1567 wprintk("%s: Asus Tiger 3in1, no "
1568 "tda826x found!\n", __func__);
1569 goto dettach_frontend;
1570 }
363c35fc 1571 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
301e9d64 1572 &dev->i2c_adap, 0, 0) == NULL) {
1573 wprintk("%s: Asus Tiger 3in1, no lnbp21"
1574 " found!\n", __func__);
1575 goto dettach_frontend;
1576 }
1577 }
1578 }
1579 break;
028165a3
HP
1580 case SAA7134_BOARD_ASUSTeK_TIGER:
1581 if (configure_tda827x_fe(dev, &philips_tiger_config,
1582 &tda827x_cfg_0) < 0)
1583 goto dettach_frontend;
1584 break;
47aeba5a 1585 case SAA7134_BOARD_BEHOLD_H6:
b0c4be8c 1586 fe0->dvb.frontend = dvb_attach(zl10353_attach,
47aeba5a
DB
1587 &behold_h6_config,
1588 &dev->i2c_adap);
b0c4be8c
MCC
1589 if (fe0->dvb.frontend) {
1590 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
47aeba5a 1591 &dev->i2c_adap, 0x61,
4786dd65 1592 TUNER_PHILIPS_FMD1216MEX_MK3);
47aeba5a 1593 }
04574185 1594 break;
2930992c
BILDB
1595 case SAA7134_BOARD_BEHOLD_X7:
1596 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1597 &behold_x7_config,
1598 &dev->i2c_adap);
1599 if (fe0->dvb.frontend) {
1600 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1601 &dev->i2c_adap, &behold_x7_tunerconfig);
1602 }
1603 break;
0faa2ed5
DB
1604 case SAA7134_BOARD_BEHOLD_H7:
1605 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1606 &behold_x7_config,
1607 &dev->i2c_adap);
1608 if (fe0->dvb.frontend) {
1609 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1610 &dev->i2c_adap, &behold_x7_tunerconfig);
1611 }
1612 break;
04574185
MS
1613 case SAA7134_BOARD_AVERMEDIA_A700_PRO:
1614 case SAA7134_BOARD_AVERMEDIA_A700_HYBRID:
1615 /* Zarlink ZL10313 */
1616 fe0->dvb.frontend = dvb_attach(mt312_attach,
1617 &avertv_a700_mt312, &dev->i2c_adap);
1618 if (fe0->dvb.frontend) {
1619 if (dvb_attach(zl10036_attach, fe0->dvb.frontend,
1620 &avertv_a700_tuner, &dev->i2c_adap) == NULL) {
1621 wprintk("%s: No zl10036 found!\n",
1622 __func__);
1623 }
1624 }
ecfcfec8
IL
1625 break;
1626 case SAA7134_BOARD_VIDEOMATE_S350:
1627 fe0->dvb.frontend = dvb_attach(mt312_attach,
1628 &zl10313_compro_s350_config, &dev->i2c_adap);
1629 if (fe0->dvb.frontend)
1630 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1631 0x60, &dev->i2c_adap) == NULL)
1632 wprintk("%s: No zl10039 found!\n",
1633 __func__);
1634
6c119ff4
HV
1635 break;
1636 case SAA7134_BOARD_ZOLID_HYBRID_PCI:
1637 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1638 &zolid_tda10048_config,
1639 &dev->i2c_adap);
1640 if (fe0->dvb.frontend != NULL) {
1641 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1642 &dev->i2c_adap, 0x4b,
1643 &tda829x_no_probe);
1644 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1645 0x60, &dev->i2c_adap,
1646 &zolid_tda18271_config);
1647 }
47aeba5a 1648 break;
184e769f
MK
1649 case SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S:
1650 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1651 &dtv1000s_tda10048_config,
1652 &dev->i2c_adap);
1653 if (fe0->dvb.frontend != NULL) {
1654 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1655 &dev->i2c_adap, 0x4b,
1656 &tda829x_no_probe);
1657 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1658 0x60, &dev->i2c_adap,
1659 &dtv1000s_tda18271_config);
1660 }
1661 break;
f0551efc
MCC
1662 case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG:
1663 __kworld_sbtvd_i2c_gate_ctrl(dev, 0);
1664 saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x14000);
1665 saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x14000);
1666 msleep(20);
1667 saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x54000);
1668 saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x54000);
1669 msleep(20);
1670 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1671 &kworld_mb86a20s_config,
1672 &dev->i2c_adap);
1673 __kworld_sbtvd_i2c_gate_ctrl(dev, 1);
1674 if (fe0->dvb.frontend != NULL) {
1675 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1676 0x60, &dev->i2c_adap,
1677 &kworld_tda18271_config);
1678 /*
1679 * Only after success, it can initialize the gate, otherwise
1680 * an OOPS will hit, due to kfree(fe0->dvb.frontend)
1681 */
1682 fe0->dvb.frontend->ops.i2c_gate_ctrl = kworld_sbtvd_i2c_gate_ctrl;
1683 }
1684 break;
1da177e4 1685 default:
cf3c34c8 1686 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT
1687 break;
1688 }
1689
bc36a686
MCC
1690 if (attach_xc3028) {
1691 struct dvb_frontend *fe;
1692 struct xc2028_config cfg = {
1693 .i2c_adap = &dev->i2c_adap,
1694 .i2c_addr = 0x61,
bc36a686 1695 };
95a2fdb6 1696
363c35fc 1697 if (!fe0->dvb.frontend)
f3f741e7 1698 goto dettach_frontend;
95a2fdb6 1699
363c35fc 1700 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
bc36a686
MCC
1701 if (!fe) {
1702 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
1703 dev->name);
d557dab5 1704 goto dettach_frontend;
bc36a686
MCC
1705 }
1706 }
1707
363c35fc 1708 if (NULL == fe0->dvb.frontend) {
cf3c34c8 1709 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
f3f741e7 1710 goto dettach_frontend;
1da177e4 1711 }
d7cba043 1712 /* define general-purpose callback pointer */
363c35fc 1713 fe0->dvb.frontend->callback = saa7134_tuner_callback;
1da177e4
LT
1714
1715 /* register everything else */
363c35fc 1716 ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
9133aee0 1717 &dev->pci->dev, adapter_nr, 0, NULL);
1c4f76ab
HH
1718
1719 /* this sequence is necessary to make the tda1004x load its firmware
1720 * and to enter analog mode of hybrid boards
1721 */
1722 if (!ret) {
363c35fc
ST
1723 if (fe0->dvb.frontend->ops.init)
1724 fe0->dvb.frontend->ops.init(fe0->dvb.frontend);
1725 if (fe0->dvb.frontend->ops.sleep)
1726 fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend);
1727 if (fe0->dvb.frontend->ops.tuner_ops.sleep)
1728 fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend);
1c4f76ab
HH
1729 }
1730 return ret;
d557dab5
MCC
1731
1732dettach_frontend:
f3f741e7
DB
1733 videobuf_dvb_dealloc_frontends(&dev->frontends);
1734 return -EINVAL;
1da177e4
LT
1735}
1736
1737static int dvb_fini(struct saa7134_dev *dev)
1738{
363c35fc
ST
1739 struct videobuf_dvb_frontend *fe0;
1740
1741 /* Get the first frontend */
1742 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
1743 if (!fe0)
1744 return -EINVAL;
1745
7f171123
MCC
1746 /* FIXME: I suspect that this code is bogus, since the entry for
1747 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1748 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1749 */
1750 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1751 struct v4l2_priv_tun_config tda9887_cfg;
1752 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1753
1754 tda9887_cfg.tuner = TUNER_TDA9887;
1755 tda9887_cfg.priv = &on;
1da177e4 1756
1da177e4 1757 /* otherwise we don't detect the tuner on next insmod */
fac6986c 1758 saa_call_all(dev, tuner, s_config, &tda9887_cfg);
5823b3a6 1759 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1760 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH
1761 /* turn off the 2nd lnb supply */
1762 u8 data = 0x80;
1763 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1764 struct dvb_frontend *fe;
363c35fc 1765 fe = fe0->dvb.frontend;
5823b3a6
HH
1766 if (fe->ops.i2c_gate_ctrl) {
1767 fe->ops.i2c_gate_ctrl(fe, 1);
1768 i2c_transfer(&dev->i2c_adap, &msg, 1);
1769 fe->ops.i2c_gate_ctrl(fe, 0);
1770 }
1771 }
7f171123 1772 }
f3f741e7 1773 videobuf_dvb_unregister_bus(&dev->frontends);
1da177e4
LT
1774 return 0;
1775}
1776
1777static struct saa7134_mpeg_ops dvb_ops = {
1778 .type = SAA7134_MPEG_DVB,
1779 .init = dvb_init,
1780 .fini = dvb_fini,
1781};
1782
1783static int __init dvb_register(void)
1784{
1785 return saa7134_ts_register(&dvb_ops);
1786}
1787
1788static void __exit dvb_unregister(void)
1789{
1790 saa7134_ts_unregister(&dvb_ops);
1791}
1792
1793module_init(dvb_register);
1794module_exit(dvb_unregister);
1795
1796/* ------------------------------------------------------------------ */
1797/*
1798 * Local variables:
1799 * c-basic-offset: 8
1800 * End:
1801 */