Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
1da177e4 LT |
27 | #include <linux/delay.h> |
28 | #include <linux/kthread.h> | |
29 | #include <linux/suspend.h> | |
30 | ||
31 | #include "saa7134-reg.h" | |
32 | #include "saa7134.h" | |
5e453dc7 | 33 | #include <media/v4l2-common.h> |
a78d0bfa | 34 | #include "dvb-pll.h" |
5823b3a6 | 35 | #include <dvb_frontend.h> |
1da177e4 | 36 | |
1f10c7af AQ |
37 | #include "mt352.h" |
38 | #include "mt352_priv.h" /* FIXME */ | |
39 | #include "tda1004x.h" | |
40 | #include "nxt200x.h" | |
bc36a686 | 41 | #include "tuner-xc2028.h" |
2930992c | 42 | #include "xc5000.h" |
1da177e4 | 43 | |
e2ac28fa IL |
44 | #include "tda10086.h" |
45 | #include "tda826x.h" | |
8ce47dad | 46 | #include "tda827x.h" |
e2ac28fa | 47 | #include "isl6421.h" |
4b1431ca | 48 | #include "isl6405.h" |
6ab465a8 | 49 | #include "lnbp21.h" |
cb89cd33 | 50 | #include "tuner-simple.h" |
1bc7f51c | 51 | #include "tda10048.h" |
3abdedd8 MK |
52 | #include "tda18271.h" |
53 | #include "lgdt3305.h" | |
54 | #include "tda8290.h" | |
f0551efc | 55 | #include "mb86a20s.h" |
8ce47dad | 56 | |
47aeba5a DB |
57 | #include "zl10353.h" |
58 | ||
04574185 | 59 | #include "zl10036.h" |
ecfcfec8 | 60 | #include "zl10039.h" |
04574185 MS |
61 | #include "mt312.h" |
62 | ||
1da177e4 LT |
63 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
64 | MODULE_LICENSE("GPL"); | |
65 | ||
ff699e6b | 66 | static unsigned int antenna_pwr; |
86ddd96f | 67 | |
1da177e4 LT |
68 | module_param(antenna_pwr, int, 0444); |
69 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
70 | ||
ff699e6b | 71 | static int use_frontend; |
b331daa0 SB |
72 | module_param(use_frontend, int, 0644); |
73 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 74 | |
ff699e6b | 75 | static int debug; |
58ef4f92 HH |
76 | module_param(debug, int, 0644); |
77 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
78 | ||
78e92006 JG |
79 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
80 | ||
cf3c34c8 TP |
81 | #define dprintk(fmt, arg...) do { if (debug) \ |
82 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0) | |
83 | ||
84 | /* Print a warning */ | |
85 | #define wprintk(fmt, arg...) \ | |
86 | printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg) | |
58ef4f92 HH |
87 | |
88 | /* ------------------------------------------------------------------ | |
89 | * mt352 based DVB-T cards | |
90 | */ | |
91 | ||
1da177e4 LT |
92 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
93 | { | |
94 | u32 ok; | |
95 | ||
96 | if (!on) { | |
97 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
98 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
99 | return 0; | |
100 | } | |
101 | ||
102 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
103 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
104 | udelay(10); | |
105 | ||
106 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
107 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
108 | udelay(10); | |
109 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
110 | udelay(10); | |
111 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
5823b3a6 | 112 | dprintk("%s %s\n", __func__, ok ? "on" : "off"); |
1da177e4 LT |
113 | |
114 | if (!ok) | |
115 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
116 | return ok; | |
117 | } | |
118 | ||
119 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
120 | { | |
121 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
122 | static u8 reset [] = { RESET, 0x80 }; | |
123 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
124 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
125 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
126 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
127 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
128 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
129 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
130 | struct saa7134_dev *dev= fe->dvb->priv; | |
131 | ||
5823b3a6 | 132 | dprintk("%s called\n", __func__); |
1da177e4 LT |
133 | |
134 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
135 | udelay(200); | |
136 | mt352_write(fe, reset, sizeof(reset)); | |
137 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
138 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
139 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
140 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
141 | ||
142 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
143 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
144 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 145 | |
1da177e4 LT |
146 | return 0; |
147 | } | |
148 | ||
a78d0bfa JAR |
149 | static int mt352_aver777_init(struct dvb_frontend* fe) |
150 | { | |
151 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
152 | static u8 reset [] = { RESET, 0x80 }; | |
153 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
154 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
155 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
156 | ||
157 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
158 | udelay(200); | |
159 | mt352_write(fe, reset, sizeof(reset)); | |
160 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
161 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
162 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
163 | ||
164 | return 0; | |
165 | } | |
166 | ||
6e501a3f | 167 | static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe) |
95a2fdb6 | 168 | { |
6e501a3f TF |
169 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; |
170 | static u8 reset [] = { RESET, 0x80 }; | |
171 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
172 | static u8 agc_cfg [] = { AGC_TARGET, 0xe }; | |
95a2fdb6 MCC |
173 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; |
174 | ||
175 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
176 | udelay(200); | |
177 | mt352_write(fe, reset, sizeof(reset)); | |
178 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
179 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
180 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
95a2fdb6 MCC |
181 | return 0; |
182 | } | |
183 | ||
0463f12c AQ |
184 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, |
185 | struct dvb_frontend_parameters* params) | |
1da177e4 | 186 | { |
df8cf706 HH |
187 | u8 off[] = { 0x00, 0xf1}; |
188 | u8 on[] = { 0x00, 0x71}; | |
189 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
190 | ||
1da177e4 LT |
191 | struct saa7134_dev *dev = fe->dvb->priv; |
192 | struct v4l2_frequency f; | |
193 | ||
194 | /* set frequency (mt2050) */ | |
195 | f.tuner = 0; | |
196 | f.type = V4L2_TUNER_DIGITAL_TV; | |
197 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
dea74869 PB |
198 | if (fe->ops.i2c_gate_ctrl) |
199 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 200 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
fac6986c | 201 | saa_call_all(dev, tuner, s_frequency, &f); |
df8cf706 | 202 | msg.buf = on; |
dea74869 PB |
203 | if (fe->ops.i2c_gate_ctrl) |
204 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 205 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
206 | |
207 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
208 | ||
209 | /* mt352 setup */ | |
0463f12c | 210 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
211 | } |
212 | ||
213 | static struct mt352_config pinnacle_300i = { | |
214 | .demod_address = 0x3c >> 1, | |
215 | .adc_clock = 20333, | |
216 | .if2 = 36150, | |
217 | .no_tuner = 1, | |
218 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 219 | }; |
a78d0bfa JAR |
220 | |
221 | static struct mt352_config avermedia_777 = { | |
222 | .demod_address = 0xf, | |
223 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 224 | }; |
1da177e4 | 225 | |
6e501a3f | 226 | static struct mt352_config avermedia_xc3028_mt352_dev = { |
bc36a686 MCC |
227 | .demod_address = (0x1e >> 1), |
228 | .no_tuner = 1, | |
6e501a3f | 229 | .demod_init = mt352_avermedia_xc3028_init, |
bc36a686 MCC |
230 | }; |
231 | ||
f0551efc MCC |
232 | static struct tda18271_std_map mb86a20s_tda18271_std_map = { |
233 | .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, | |
234 | .if_lvl = 7, .rfagc_top = 0x37, }, | |
235 | }; | |
236 | ||
237 | static struct tda18271_config kworld_tda18271_config = { | |
238 | .std_map = &mb86a20s_tda18271_std_map, | |
61830406 | 239 | .gate = TDA18271_GATE_ANALOG, |
f0551efc MCC |
240 | }; |
241 | ||
242 | static const struct mb86a20s_config kworld_mb86a20s_config = { | |
243 | .demod_address = 0x10, | |
244 | }; | |
245 | ||
58ef4f92 HH |
246 | /* ================================================================== |
247 | * tda1004x based DVB-T cards, helper functions | |
248 | */ | |
249 | ||
250 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
251 | const struct firmware **fw, char *name) | |
1da177e4 LT |
252 | { |
253 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
254 | return request_firmware(fw, name, &dev->pci->dev); |
255 | } | |
256 | ||
58ef4f92 HH |
257 | /* ------------------------------------------------------------------ |
258 | * these tuners are tu1216, td1316(a) | |
259 | */ | |
260 | ||
261 | static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
262 | { | |
263 | struct saa7134_dev *dev = fe->dvb->priv; | |
264 | struct tda1004x_state *state = fe->demodulator_priv; | |
265 | u8 addr = state->config->tuner_address; | |
86ddd96f | 266 | u8 tuner_buf[4]; |
2cf36ac4 | 267 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
268 | sizeof(tuner_buf) }; |
269 | int tuner_frequency = 0; | |
270 | u8 band, cp, filter; | |
271 | ||
272 | /* determine charge pump */ | |
273 | tuner_frequency = params->frequency + 36166000; | |
274 | if (tuner_frequency < 87000000) | |
275 | return -EINVAL; | |
276 | else if (tuner_frequency < 130000000) | |
277 | cp = 3; | |
278 | else if (tuner_frequency < 160000000) | |
279 | cp = 5; | |
280 | else if (tuner_frequency < 200000000) | |
281 | cp = 6; | |
282 | else if (tuner_frequency < 290000000) | |
283 | cp = 3; | |
284 | else if (tuner_frequency < 420000000) | |
285 | cp = 5; | |
286 | else if (tuner_frequency < 480000000) | |
287 | cp = 6; | |
288 | else if (tuner_frequency < 620000000) | |
289 | cp = 3; | |
290 | else if (tuner_frequency < 830000000) | |
291 | cp = 5; | |
292 | else if (tuner_frequency < 895000000) | |
293 | cp = 7; | |
294 | else | |
295 | return -EINVAL; | |
296 | ||
297 | /* determine band */ | |
298 | if (params->frequency < 49000000) | |
299 | return -EINVAL; | |
300 | else if (params->frequency < 161000000) | |
301 | band = 1; | |
302 | else if (params->frequency < 444000000) | |
303 | band = 2; | |
304 | else if (params->frequency < 861000000) | |
305 | band = 4; | |
306 | else | |
307 | return -EINVAL; | |
308 | ||
309 | /* setup PLL filter */ | |
310 | switch (params->u.ofdm.bandwidth) { | |
311 | case BANDWIDTH_6_MHZ: | |
312 | filter = 0; | |
313 | break; | |
314 | ||
315 | case BANDWIDTH_7_MHZ: | |
316 | filter = 0; | |
317 | break; | |
318 | ||
319 | case BANDWIDTH_8_MHZ: | |
320 | filter = 1; | |
321 | break; | |
1da177e4 | 322 | |
86ddd96f MCC |
323 | default: |
324 | return -EINVAL; | |
325 | } | |
326 | ||
327 | /* calculate divisor | |
328 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 329 | */ |
86ddd96f MCC |
330 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
331 | ||
332 | /* setup tuner buffer */ | |
333 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
334 | tuner_buf[1] = tuner_frequency & 0xff; | |
335 | tuner_buf[2] = 0xca; | |
336 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
337 | ||
dea74869 PB |
338 | if (fe->ops.i2c_gate_ctrl) |
339 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 340 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
341 | wprintk("could not write to tuner at addr: 0x%02x\n", |
342 | addr << 1); | |
86ddd96f | 343 | return -EIO; |
58ef4f92 | 344 | } |
2cf36ac4 HH |
345 | msleep(1); |
346 | return 0; | |
347 | } | |
348 | ||
58ef4f92 | 349 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
350 | { |
351 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
352 | struct tda1004x_state *state = fe->demodulator_priv; |
353 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
354 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
355 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 356 | |
2cf36ac4 | 357 | /* setup PLL configuration */ |
dea74869 PB |
358 | if (fe->ops.i2c_gate_ctrl) |
359 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
360 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
361 | return -EIO; | |
86ddd96f | 362 | msleep(1); |
2cf36ac4 | 363 | |
1da177e4 LT |
364 | return 0; |
365 | } | |
366 | ||
2cf36ac4 HH |
367 | /* ------------------------------------------------------------------ */ |
368 | ||
2cf36ac4 | 369 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
370 | .demod_address = 0x8, |
371 | .invert = 1, | |
2cf36ac4 | 372 | .invert_oclk = 0, |
86ddd96f MCC |
373 | .xtal_freq = TDA10046_XTAL_4M, |
374 | .agc_config = TDA10046_AGC_DEFAULT, | |
375 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
376 | .tuner_address = 0x60, |
377 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
378 | }; |
379 | ||
2cf36ac4 HH |
380 | static struct tda1004x_config philips_tu1216_61_config = { |
381 | ||
382 | .demod_address = 0x8, | |
383 | .invert = 1, | |
384 | .invert_oclk = 0, | |
385 | .xtal_freq = TDA10046_XTAL_4M, | |
386 | .agc_config = TDA10046_AGC_DEFAULT, | |
387 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
388 | .tuner_address = 0x61, |
389 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
390 | }; |
391 | ||
392 | /* ------------------------------------------------------------------ */ | |
393 | ||
cbb94521 | 394 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
395 | { |
396 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
397 | struct tda1004x_state *state = fe->demodulator_priv; |
398 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 399 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 400 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
401 | |
402 | /* setup PLL configuration */ | |
dea74869 PB |
403 | if (fe->ops.i2c_gate_ctrl) |
404 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
405 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
406 | return -EIO; | |
2cf36ac4 HH |
407 | return 0; |
408 | } | |
409 | ||
a79ddae9 | 410 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
2cf36ac4 | 411 | { |
58ef4f92 HH |
412 | return philips_tda6651_pll_set(fe, params); |
413 | } | |
414 | ||
415 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
416 | { | |
417 | struct saa7134_dev *dev = fe->dvb->priv; | |
418 | struct tda1004x_state *state = fe->demodulator_priv; | |
419 | u8 addr = state->config->tuner_address; | |
420 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
421 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
422 | ||
423 | /* switch the tuner to analog mode */ | |
424 | if (fe->ops.i2c_gate_ctrl) | |
425 | fe->ops.i2c_gate_ctrl(fe, 1); | |
426 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
427 | return -EIO; | |
428 | return 0; | |
2cf36ac4 HH |
429 | } |
430 | ||
58ef4f92 HH |
431 | /* ------------------------------------------------------------------ */ |
432 | ||
cbb94521 HH |
433 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
434 | { | |
435 | struct saa7134_dev *dev = fe->dvb->priv; | |
436 | static u8 msg[] = { 0x00, 0x40}; | |
437 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
438 | ||
439 | ||
440 | if (philips_td1316_tuner_init(fe)) | |
441 | return -EIO; | |
442 | msleep(1); | |
443 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
444 | return -EIO; | |
445 | ||
446 | return 0; | |
447 | } | |
448 | ||
a79ddae9 | 449 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
450 | { |
451 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 452 | |
58ef4f92 HH |
453 | static u8 msg[] = { 0x00, 0x14 }; |
454 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
455 | ||
456 | if (philips_td1316_tuner_sleep(fe)) | |
457 | return -EIO; | |
2cf36ac4 HH |
458 | |
459 | /* switch the board to analog mode */ | |
dea74869 PB |
460 | if (fe->ops.i2c_gate_ctrl) |
461 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 462 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
463 | return 0; |
464 | } | |
465 | ||
466 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
467 | { | |
468 | struct saa7134_dev *dev = fe->dvb->priv; | |
469 | ||
470 | if (dev->original_demod_sleep) | |
471 | dev->original_demod_sleep(fe); | |
dea74869 | 472 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 473 | return 0; |
2cf36ac4 HH |
474 | } |
475 | ||
476 | static struct tda1004x_config philips_europa_config = { | |
477 | ||
478 | .demod_address = 0x8, | |
479 | .invert = 0, | |
480 | .invert_oclk = 0, | |
481 | .xtal_freq = TDA10046_XTAL_4M, | |
482 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
483 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
484 | .tuner_address = 0x61, |
485 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
486 | }; |
487 | ||
408b664a | 488 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
489 | .demod_address = 0x08, |
490 | .invert = 1, | |
491 | .invert_oclk = 0, | |
492 | .xtal_freq = TDA10046_XTAL_16M, | |
493 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
494 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
495 | .tuner_address = 0x61, |
496 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
497 | }; |
498 | ||
128fe95d VC |
499 | static struct tda1004x_config technotrend_budget_t3000_config = { |
500 | .demod_address = 0x8, | |
501 | .invert = 1, | |
502 | .invert_oclk = 0, | |
503 | .xtal_freq = TDA10046_XTAL_4M, | |
504 | .agc_config = TDA10046_AGC_DEFAULT, | |
505 | .if_freq = TDA10046_FREQ_3617, | |
506 | .tuner_address = 0x63, | |
507 | .request_firmware = philips_tda1004x_request_firmware | |
508 | }; | |
509 | ||
58ef4f92 HH |
510 | /* ------------------------------------------------------------------ |
511 | * tda 1004x based cards with philips silicon tuner | |
512 | */ | |
513 | ||
58ef4f92 HH |
514 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) |
515 | { | |
58ef4f92 HH |
516 | struct tda1004x_state *state = fe->demodulator_priv; |
517 | ||
518 | u8 addr = state->config->i2c_gate; | |
519 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
520 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
521 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
522 | if (enable) { | |
523 | tda8290_msg.buf = tda8290_close; | |
524 | } else { | |
525 | tda8290_msg.buf = tda8290_open; | |
526 | } | |
06be3035 | 527 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
cf3c34c8 TP |
528 | struct saa7134_dev *dev = fe->dvb->priv; |
529 | wprintk("could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
530 | return -EIO; |
531 | } | |
532 | msleep(20); | |
533 | return 0; | |
534 | } | |
535 | ||
58ef4f92 | 536 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 537 | { |
90e9df7f | 538 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 539 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 540 | |
58ef4f92 HH |
541 | switch (state->config->antenna_switch) { |
542 | case 0: break; | |
543 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
544 | saa7134_set_gpio(dev, 21, 0); | |
545 | break; | |
546 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
547 | saa7134_set_gpio(dev, 21, 1); | |
548 | break; | |
587d2fd7 | 549 | } |
587d2fd7 HH |
550 | return 0; |
551 | } | |
552 | ||
58ef4f92 | 553 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 554 | { |
58ef4f92 HH |
555 | struct saa7134_dev *dev = fe->dvb->priv; |
556 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 557 | |
58ef4f92 HH |
558 | switch (state->config->antenna_switch) { |
559 | case 0: break; | |
560 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
561 | saa7134_set_gpio(dev, 21, 1); | |
562 | break; | |
563 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
564 | saa7134_set_gpio(dev, 21, 0); | |
565 | break; | |
566 | } | |
587d2fd7 | 567 | return 0; |
2d6b5f62 | 568 | } |
90e9df7f | 569 | |
d557dab5 MCC |
570 | static int configure_tda827x_fe(struct saa7134_dev *dev, |
571 | struct tda1004x_config *cdec_conf, | |
572 | struct tda827x_config *tuner_conf) | |
90e9df7f | 573 | { |
363c35fc ST |
574 | struct videobuf_dvb_frontend *fe0; |
575 | ||
92abe9ee DB |
576 | /* Get the first frontend */ |
577 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
363c35fc ST |
578 | |
579 | fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap); | |
580 | if (fe0->dvb.frontend) { | |
7bff4b4d | 581 | if (cdec_conf->i2c_gate) |
363c35fc ST |
582 | fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; |
583 | if (dvb_attach(tda827x_attach, fe0->dvb.frontend, | |
d557dab5 MCC |
584 | cdec_conf->tuner_address, |
585 | &dev->i2c_adap, tuner_conf)) | |
586 | return 0; | |
587 | ||
588 | wprintk("no tda827x tuner found at addr: %02x\n", | |
7bff4b4d | 589 | cdec_conf->tuner_address); |
58ef4f92 | 590 | } |
d557dab5 | 591 | return -EINVAL; |
90e9df7f HH |
592 | } |
593 | ||
58ef4f92 | 594 | /* ------------------------------------------------------------------ */ |
261f5081 | 595 | |
7bff4b4d | 596 | static struct tda827x_config tda827x_cfg_0 = { |
7bff4b4d HH |
597 | .init = philips_tda827x_tuner_init, |
598 | .sleep = philips_tda827x_tuner_sleep, | |
599 | .config = 0, | |
600 | .switch_addr = 0 | |
601 | }; | |
602 | ||
603 | static struct tda827x_config tda827x_cfg_1 = { | |
7bff4b4d HH |
604 | .init = philips_tda827x_tuner_init, |
605 | .sleep = philips_tda827x_tuner_sleep, | |
606 | .config = 1, | |
607 | .switch_addr = 0x4b | |
608 | }; | |
609 | ||
610 | static struct tda827x_config tda827x_cfg_2 = { | |
7bff4b4d HH |
611 | .init = philips_tda827x_tuner_init, |
612 | .sleep = philips_tda827x_tuner_sleep, | |
613 | .config = 2, | |
614 | .switch_addr = 0x4b | |
615 | }; | |
616 | ||
617 | static struct tda827x_config tda827x_cfg_2_sw42 = { | |
7bff4b4d HH |
618 | .init = philips_tda827x_tuner_init, |
619 | .sleep = philips_tda827x_tuner_sleep, | |
620 | .config = 2, | |
621 | .switch_addr = 0x42 | |
622 | }; | |
623 | ||
624 | /* ------------------------------------------------------------------ */ | |
625 | ||
58ef4f92 | 626 | static struct tda1004x_config tda827x_lifeview_config = { |
90e9df7f HH |
627 | .demod_address = 0x08, |
628 | .invert = 1, | |
629 | .invert_oclk = 0, | |
630 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
631 | .agc_config = TDA10046_AGC_TDA827X, |
632 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 633 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
634 | .tuner_address = 0x60, |
635 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 636 | }; |
550a9a5e | 637 | |
58ef4f92 HH |
638 | static struct tda1004x_config philips_tiger_config = { |
639 | .demod_address = 0x08, | |
640 | .invert = 1, | |
641 | .invert_oclk = 0, | |
642 | .xtal_freq = TDA10046_XTAL_16M, | |
643 | .agc_config = TDA10046_AGC_TDA827X, | |
644 | .gpio_config = TDA10046_GP11_I, | |
645 | .if_freq = TDA10046_FREQ_045, | |
646 | .i2c_gate = 0x4b, | |
647 | .tuner_address = 0x61, | |
58ef4f92 HH |
648 | .antenna_switch= 1, |
649 | .request_firmware = philips_tda1004x_request_firmware | |
650 | }; | |
550a9a5e HH |
651 | |
652 | static struct tda1004x_config cinergy_ht_config = { | |
653 | .demod_address = 0x08, | |
654 | .invert = 1, | |
655 | .invert_oclk = 0, | |
656 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
657 | .agc_config = TDA10046_AGC_TDA827X, |
658 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 659 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
660 | .i2c_gate = 0x4b, |
661 | .tuner_address = 0x61, | |
58ef4f92 | 662 | .request_firmware = philips_tda1004x_request_firmware |
90e9df7f HH |
663 | }; |
664 | ||
58ef4f92 HH |
665 | static struct tda1004x_config cinergy_ht_pci_config = { |
666 | .demod_address = 0x08, | |
667 | .invert = 1, | |
668 | .invert_oclk = 0, | |
669 | .xtal_freq = TDA10046_XTAL_16M, | |
670 | .agc_config = TDA10046_AGC_TDA827X, | |
671 | .gpio_config = TDA10046_GP01_I, | |
672 | .if_freq = TDA10046_FREQ_045, | |
673 | .i2c_gate = 0x4b, | |
674 | .tuner_address = 0x60, | |
58ef4f92 HH |
675 | .request_firmware = philips_tda1004x_request_firmware |
676 | }; | |
677 | ||
678 | static struct tda1004x_config philips_tiger_s_config = { | |
679 | .demod_address = 0x08, | |
680 | .invert = 1, | |
681 | .invert_oclk = 0, | |
682 | .xtal_freq = TDA10046_XTAL_16M, | |
683 | .agc_config = TDA10046_AGC_TDA827X, | |
684 | .gpio_config = TDA10046_GP01_I, | |
685 | .if_freq = TDA10046_FREQ_045, | |
686 | .i2c_gate = 0x4b, | |
687 | .tuner_address = 0x61, | |
58ef4f92 HH |
688 | .antenna_switch= 1, |
689 | .request_firmware = philips_tda1004x_request_firmware | |
690 | }; | |
df42eaf2 | 691 | |
587d2fd7 HH |
692 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
693 | .demod_address = 0x08, | |
694 | .invert = 1, | |
695 | .invert_oclk = 0, | |
696 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
697 | .agc_config = TDA10046_AGC_TDA827X, |
698 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 699 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
700 | .i2c_gate = 0x4b, |
701 | .tuner_address = 0x61, | |
58ef4f92 | 702 | .request_firmware = philips_tda1004x_request_firmware |
587d2fd7 HH |
703 | }; |
704 | ||
c6e53daf TG |
705 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
706 | .demod_address = 0x08, | |
707 | .invert = 1, | |
708 | .invert_oclk = 0, | |
709 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
710 | .agc_config = TDA10046_AGC_TDA827X, |
711 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 712 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
713 | .i2c_gate = 0x4b, |
714 | .tuner_address = 0x61, | |
715 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
716 | }; |
717 | ||
83646817 HH |
718 | static struct tda1004x_config asus_p7131_dual_config = { |
719 | .demod_address = 0x08, | |
720 | .invert = 1, | |
721 | .invert_oclk = 0, | |
722 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
723 | .agc_config = TDA10046_AGC_TDA827X, |
724 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 725 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
726 | .i2c_gate = 0x4b, |
727 | .tuner_address = 0x61, | |
58ef4f92 HH |
728 | .antenna_switch= 2, |
729 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
730 | }; |
731 | ||
420f32fe NS |
732 | static struct tda1004x_config lifeview_trio_config = { |
733 | .demod_address = 0x09, | |
734 | .invert = 1, | |
735 | .invert_oclk = 0, | |
736 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
737 | .agc_config = TDA10046_AGC_TDA827X, |
738 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 739 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
740 | .tuner_address = 0x60, |
741 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
742 | }; |
743 | ||
58ef4f92 | 744 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
745 | .demod_address = 0x08, |
746 | .invert = 1, | |
747 | .invert_oclk = 0, | |
748 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 749 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 750 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 751 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
752 | .tuner_address = 0x60, |
753 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
754 | }; |
755 | ||
58ef4f92 | 756 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
757 | .demod_address = 0x08, |
758 | .invert = 1, | |
759 | .invert_oclk = 0, | |
760 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 761 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 762 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 763 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
764 | .i2c_gate = 0x4b, |
765 | .tuner_address = 0x60, | |
58ef4f92 | 766 | .request_firmware = philips_tda1004x_request_firmware |
3dfb729f PH |
767 | }; |
768 | ||
e06cea4c HH |
769 | static struct tda1004x_config asus_p7131_4871_config = { |
770 | .demod_address = 0x08, | |
771 | .invert = 1, | |
772 | .invert_oclk = 0, | |
773 | .xtal_freq = TDA10046_XTAL_16M, | |
774 | .agc_config = TDA10046_AGC_TDA827X, | |
775 | .gpio_config = TDA10046_GP01_I, | |
776 | .if_freq = TDA10046_FREQ_045, | |
777 | .i2c_gate = 0x4b, | |
778 | .tuner_address = 0x61, | |
e06cea4c HH |
779 | .antenna_switch= 2, |
780 | .request_firmware = philips_tda1004x_request_firmware | |
781 | }; | |
782 | ||
f3eec0c0 | 783 | static struct tda1004x_config asus_p7131_hybrid_lna_config = { |
e06cea4c HH |
784 | .demod_address = 0x08, |
785 | .invert = 1, | |
786 | .invert_oclk = 0, | |
787 | .xtal_freq = TDA10046_XTAL_16M, | |
788 | .agc_config = TDA10046_AGC_TDA827X, | |
789 | .gpio_config = TDA10046_GP11_I, | |
790 | .if_freq = TDA10046_FREQ_045, | |
791 | .i2c_gate = 0x4b, | |
792 | .tuner_address = 0x61, | |
e06cea4c HH |
793 | .antenna_switch= 2, |
794 | .request_firmware = philips_tda1004x_request_firmware | |
795 | }; | |
261f5081 | 796 | |
b39423a9 SF |
797 | static struct tda1004x_config kworld_dvb_t_210_config = { |
798 | .demod_address = 0x08, | |
799 | .invert = 1, | |
800 | .invert_oclk = 0, | |
801 | .xtal_freq = TDA10046_XTAL_16M, | |
802 | .agc_config = TDA10046_AGC_TDA827X, | |
803 | .gpio_config = TDA10046_GP11_I, | |
804 | .if_freq = TDA10046_FREQ_045, | |
805 | .i2c_gate = 0x4b, | |
806 | .tuner_address = 0x61, | |
b39423a9 SF |
807 | .antenna_switch= 1, |
808 | .request_firmware = philips_tda1004x_request_firmware | |
809 | }; | |
261f5081 | 810 | |
d90d9f5a ES |
811 | static struct tda1004x_config avermedia_super_007_config = { |
812 | .demod_address = 0x08, | |
813 | .invert = 1, | |
814 | .invert_oclk = 0, | |
815 | .xtal_freq = TDA10046_XTAL_16M, | |
816 | .agc_config = TDA10046_AGC_TDA827X, | |
817 | .gpio_config = TDA10046_GP01_I, | |
818 | .if_freq = TDA10046_FREQ_045, | |
819 | .i2c_gate = 0x4b, | |
820 | .tuner_address = 0x60, | |
d90d9f5a ES |
821 | .antenna_switch= 1, |
822 | .request_firmware = philips_tda1004x_request_firmware | |
823 | }; | |
824 | ||
4ba24373 HP |
825 | static struct tda1004x_config twinhan_dtv_dvb_3056_config = { |
826 | .demod_address = 0x08, | |
827 | .invert = 1, | |
828 | .invert_oclk = 0, | |
829 | .xtal_freq = TDA10046_XTAL_16M, | |
830 | .agc_config = TDA10046_AGC_TDA827X, | |
831 | .gpio_config = TDA10046_GP01_I, | |
832 | .if_freq = TDA10046_FREQ_045, | |
833 | .i2c_gate = 0x42, | |
834 | .tuner_address = 0x61, | |
4ba24373 HP |
835 | .antenna_switch = 1, |
836 | .request_firmware = philips_tda1004x_request_firmware | |
837 | }; | |
838 | ||
301e9d64 | 839 | static struct tda1004x_config asus_tiger_3in1_config = { |
840 | .demod_address = 0x0b, | |
841 | .invert = 1, | |
842 | .invert_oclk = 0, | |
843 | .xtal_freq = TDA10046_XTAL_16M, | |
844 | .agc_config = TDA10046_AGC_TDA827X, | |
845 | .gpio_config = TDA10046_GP11_I, | |
846 | .if_freq = TDA10046_FREQ_045, | |
847 | .i2c_gate = 0x4b, | |
848 | .tuner_address = 0x61, | |
849 | .antenna_switch = 1, | |
850 | .request_firmware = philips_tda1004x_request_firmware | |
851 | }; | |
852 | ||
58ef4f92 HH |
853 | /* ------------------------------------------------------------------ |
854 | * special case: this card uses saa713x GPIO22 for the mode switch | |
855 | */ | |
5eda227f | 856 | |
58ef4f92 | 857 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
858 | { |
859 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
860 | philips_tda827x_tuner_init(fe); |
861 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 862 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
863 | return 0; |
864 | } | |
865 | ||
58ef4f92 | 866 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 867 | { |
5eda227f | 868 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 869 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 870 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
871 | philips_tda827x_tuner_sleep(fe); |
872 | return 0; | |
5eda227f HH |
873 | } |
874 | ||
8ce47dad | 875 | static struct tda827x_config ads_duo_cfg = { |
8ce47dad | 876 | .init = ads_duo_tuner_init, |
7bff4b4d HH |
877 | .sleep = ads_duo_tuner_sleep, |
878 | .config = 0 | |
8ce47dad MK |
879 | }; |
880 | ||
58ef4f92 | 881 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
882 | .demod_address = 0x08, |
883 | .invert = 1, | |
884 | .invert_oclk = 0, | |
885 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 886 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 887 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 888 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
889 | .tuner_address = 0x61, |
890 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
891 | }; |
892 | ||
47aeba5a DB |
893 | static struct zl10353_config behold_h6_config = { |
894 | .demod_address = 0x1e>>1, | |
895 | .no_tuner = 1, | |
896 | .parallel_ts = 1, | |
5f77af93 | 897 | .disable_i2c_gate_ctrl = 1, |
47aeba5a DB |
898 | }; |
899 | ||
2930992c BILDB |
900 | static struct xc5000_config behold_x7_tunerconfig = { |
901 | .i2c_address = 0xc2>>1, | |
902 | .if_khz = 4560, | |
2a0d0560 | 903 | .radio_input = XC5000_RADIO_FM1, |
2930992c BILDB |
904 | }; |
905 | ||
906 | static struct zl10353_config behold_x7_config = { | |
907 | .demod_address = 0x1e>>1, | |
908 | .if2 = 45600, | |
909 | .no_tuner = 1, | |
910 | .parallel_ts = 1, | |
911 | .disable_i2c_gate_ctrl = 1, | |
912 | }; | |
913 | ||
58ef4f92 HH |
914 | /* ================================================================== |
915 | * tda10086 based DVB-S cards, helper functions | |
916 | */ | |
917 | ||
e2ac28fa IL |
918 | static struct tda10086_config flydvbs = { |
919 | .demod_address = 0x0e, | |
920 | .invert = 0, | |
ea75baf4 | 921 | .diseqc_tone = 0, |
9a1b04e4 HH |
922 | .xtal_freq = TDA10086_XTAL_16M, |
923 | }; | |
924 | ||
925 | static struct tda10086_config sd1878_4m = { | |
926 | .demod_address = 0x0e, | |
927 | .invert = 0, | |
928 | .diseqc_tone = 0, | |
929 | .xtal_freq = TDA10086_XTAL_4M, | |
e2ac28fa IL |
930 | }; |
931 | ||
1b1cee35 HH |
932 | /* ------------------------------------------------------------------ |
933 | * special case: lnb supply is connected to the gated i2c | |
934 | */ | |
935 | ||
936 | static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
937 | { | |
938 | int res = -EIO; | |
939 | struct saa7134_dev *dev = fe->dvb->priv; | |
940 | if (fe->ops.i2c_gate_ctrl) { | |
941 | fe->ops.i2c_gate_ctrl(fe, 1); | |
942 | if (dev->original_set_voltage) | |
943 | res = dev->original_set_voltage(fe, voltage); | |
944 | fe->ops.i2c_gate_ctrl(fe, 0); | |
945 | } | |
946 | return res; | |
947 | }; | |
948 | ||
949 | static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg) | |
950 | { | |
951 | int res = -EIO; | |
952 | struct saa7134_dev *dev = fe->dvb->priv; | |
953 | if (fe->ops.i2c_gate_ctrl) { | |
954 | fe->ops.i2c_gate_ctrl(fe, 1); | |
955 | if (dev->original_set_high_voltage) | |
956 | res = dev->original_set_high_voltage(fe, arg); | |
957 | fe->ops.i2c_gate_ctrl(fe, 0); | |
958 | } | |
959 | return res; | |
960 | }; | |
961 | ||
5823b3a6 HH |
962 | static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
963 | { | |
964 | struct saa7134_dev *dev = fe->dvb->priv; | |
965 | u8 wbuf[2] = { 0x1f, 00 }; | |
966 | u8 rbuf; | |
967 | struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 }, | |
968 | { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } }; | |
969 | ||
970 | if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2) | |
971 | return -EIO; | |
972 | /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */ | |
973 | if (voltage == SEC_VOLTAGE_18) | |
974 | wbuf[1] = rbuf | 0x10; | |
975 | else | |
976 | wbuf[1] = rbuf & 0xef; | |
977 | msg[0].len = 2; | |
978 | i2c_transfer(&dev->i2c_adap, msg, 1); | |
979 | return 0; | |
980 | } | |
981 | ||
982 | static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg) | |
983 | { | |
984 | struct saa7134_dev *dev = fe->dvb->priv; | |
985 | wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__); | |
986 | return -EIO; | |
987 | } | |
988 | ||
58ef4f92 HH |
989 | /* ================================================================== |
990 | * nxt200x based ATSC cards, helper functions | |
991 | */ | |
90e9df7f | 992 | |
3b64e8e2 MK |
993 | static struct nxt200x_config avertvhda180 = { |
994 | .demod_address = 0x0a, | |
3b64e8e2 | 995 | }; |
3e1410ad AB |
996 | |
997 | static struct nxt200x_config kworldatsc110 = { | |
998 | .demod_address = 0x0a, | |
3e1410ad | 999 | }; |
3b64e8e2 | 1000 | |
04574185 MS |
1001 | /* ------------------------------------------------------------------ */ |
1002 | ||
1003 | static struct mt312_config avertv_a700_mt312 = { | |
1004 | .demod_address = 0x0e, | |
1005 | .voltage_inverted = 1, | |
1006 | }; | |
1007 | ||
1008 | static struct zl10036_config avertv_a700_tuner = { | |
1009 | .tuner_address = 0x60, | |
1010 | }; | |
1011 | ||
ecfcfec8 IL |
1012 | static struct mt312_config zl10313_compro_s350_config = { |
1013 | .demod_address = 0x0e, | |
1014 | }; | |
1015 | ||
3abdedd8 MK |
1016 | static struct lgdt3305_config hcw_lgdt3305_config = { |
1017 | .i2c_addr = 0x0e, | |
1018 | .mpeg_mode = LGDT3305_MPEG_SERIAL, | |
1019 | .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE, | |
1020 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
1021 | .deny_i2c_rptr = 1, | |
1022 | .spectral_inversion = 1, | |
1023 | .qam_if_khz = 4000, | |
1024 | .vsb_if_khz = 3250, | |
1025 | }; | |
1026 | ||
1bc7f51c MK |
1027 | static struct tda10048_config hcw_tda10048_config = { |
1028 | .demod_address = 0x10 >> 1, | |
1029 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
1030 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
1031 | .inversion = TDA10048_INVERSION_ON, | |
1032 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
1033 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
1034 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
1035 | .clk_freq_khz = TDA10048_CLK_16000, | |
1036 | .disable_gate_access = 1, | |
1037 | }; | |
1038 | ||
3abdedd8 MK |
1039 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
1040 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, | |
1041 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
1042 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, | |
1043 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
1044 | }; | |
1045 | ||
1046 | static struct tda18271_config hcw_tda18271_config = { | |
1047 | .std_map = &hauppauge_tda18271_std_map, | |
1048 | .gate = TDA18271_GATE_ANALOG, | |
1049 | .config = 3, | |
542cb057 | 1050 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
3abdedd8 MK |
1051 | }; |
1052 | ||
1053 | static struct tda829x_config tda829x_no_probe = { | |
1054 | .probe_tuner = TDA829X_DONT_PROBE, | |
1055 | }; | |
1056 | ||
6c119ff4 HV |
1057 | static struct tda10048_config zolid_tda10048_config = { |
1058 | .demod_address = 0x10 >> 1, | |
1059 | .output_mode = TDA10048_PARALLEL_OUTPUT, | |
1060 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
1061 | .inversion = TDA10048_INVERSION_ON, | |
1062 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
1063 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
1064 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
1065 | .clk_freq_khz = TDA10048_CLK_16000, | |
1066 | .disable_gate_access = 1, | |
1067 | }; | |
1068 | ||
1069 | static struct tda18271_config zolid_tda18271_config = { | |
1070 | .gate = TDA18271_GATE_ANALOG, | |
1071 | }; | |
1072 | ||
184e769f MK |
1073 | static struct tda10048_config dtv1000s_tda10048_config = { |
1074 | .demod_address = 0x10 >> 1, | |
1075 | .output_mode = TDA10048_PARALLEL_OUTPUT, | |
1076 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
1077 | .inversion = TDA10048_INVERSION_ON, | |
1078 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
1079 | .dtv7_if_freq_khz = TDA10048_IF_3800, | |
1080 | .dtv8_if_freq_khz = TDA10048_IF_4300, | |
1081 | .clk_freq_khz = TDA10048_CLK_16000, | |
1082 | .disable_gate_access = 1, | |
1083 | }; | |
1084 | ||
1085 | static struct tda18271_std_map dtv1000s_tda18271_std_map = { | |
1086 | .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, | |
1087 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
1088 | .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5, | |
1089 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
1090 | .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6, | |
1091 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
1092 | }; | |
1093 | ||
1094 | static struct tda18271_config dtv1000s_tda18271_config = { | |
1095 | .std_map = &dtv1000s_tda18271_std_map, | |
1096 | .gate = TDA18271_GATE_ANALOG, | |
1097 | }; | |
1098 | ||
58ef4f92 HH |
1099 | /* ================================================================== |
1100 | * Core code | |
1101 | */ | |
1da177e4 LT |
1102 | |
1103 | static int dvb_init(struct saa7134_dev *dev) | |
1104 | { | |
1c4f76ab | 1105 | int ret; |
bc36a686 | 1106 | int attach_xc3028 = 0; |
363c35fc ST |
1107 | struct videobuf_dvb_frontend *fe0; |
1108 | ||
f972e0bd DB |
1109 | /* FIXME: add support for multi-frontend */ |
1110 | mutex_init(&dev->frontends.lock); | |
7bdf84fc | 1111 | INIT_LIST_HEAD(&dev->frontends.felist); |
f972e0bd DB |
1112 | |
1113 | printk(KERN_INFO "%s() allocating 1 frontend\n", __func__); | |
f3f741e7 DB |
1114 | fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1); |
1115 | if (!fe0) { | |
f972e0bd DB |
1116 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
1117 | return -ENOMEM; | |
1118 | } | |
1119 | ||
1da177e4 LT |
1120 | /* init struct videobuf_dvb */ |
1121 | dev->ts.nr_bufs = 32; | |
1122 | dev->ts.nr_packets = 32*4; | |
363c35fc ST |
1123 | fe0->dvb.name = dev->name; |
1124 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops, | |
0705135e | 1125 | &dev->pci->dev, &dev->slock, |
1da177e4 LT |
1126 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
1127 | V4L2_FIELD_ALTERNATE, | |
1128 | sizeof(struct saa7134_buf), | |
08bff03e | 1129 | dev, NULL); |
1da177e4 LT |
1130 | |
1131 | switch (dev->board) { | |
1132 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
cf3c34c8 | 1133 | dprintk("pinnacle 300i dvb setup\n"); |
363c35fc | 1134 | fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 1135 | &dev->i2c_adap); |
363c35fc ST |
1136 | if (fe0->dvb.frontend) { |
1137 | fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; | |
6b3ccab7 | 1138 | } |
1da177e4 | 1139 | break; |
a78d0bfa | 1140 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 1141 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
cf3c34c8 | 1142 | dprintk("avertv 777 dvb setup\n"); |
363c35fc | 1143 | fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 1144 | &dev->i2c_adap); |
363c35fc ST |
1145 | if (fe0->dvb.frontend) { |
1146 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
fb147e97 MK |
1147 | &dev->i2c_adap, 0x61, |
1148 | TUNER_PHILIPS_TD1316); | |
6b3ccab7 | 1149 | } |
a78d0bfa | 1150 | break; |
95a2fdb6 | 1151 | case SAA7134_BOARD_AVERMEDIA_A16D: |
6e501a3f | 1152 | dprintk("AverMedia A16D dvb setup\n"); |
363c35fc | 1153 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1154 | &avermedia_xc3028_mt352_dev, |
1155 | &dev->i2c_adap); | |
95a2fdb6 MCC |
1156 | attach_xc3028 = 1; |
1157 | break; | |
1da177e4 | 1158 | case SAA7134_BOARD_MD7134: |
363c35fc | 1159 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1160 | &medion_cardbus, |
1161 | &dev->i2c_adap); | |
363c35fc ST |
1162 | if (fe0->dvb.frontend) { |
1163 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
cb89cd33 MK |
1164 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1165 | TUNER_PHILIPS_FMD1216ME_MK3); | |
6b3ccab7 | 1166 | } |
1da177e4 | 1167 | break; |
86ddd96f | 1168 | case SAA7134_BOARD_PHILIPS_TOUGH: |
363c35fc | 1169 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1170 | &philips_tu1216_60_config, |
1171 | &dev->i2c_adap); | |
363c35fc ST |
1172 | if (fe0->dvb.frontend) { |
1173 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1174 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1175 | } |
86ddd96f MCC |
1176 | break; |
1177 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 1178 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
d557dab5 MCC |
1179 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1180 | &tda827x_cfg_0) < 0) | |
1181 | goto dettach_frontend; | |
86ddd96f | 1182 | break; |
2cf36ac4 | 1183 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 1184 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
e3c6e1aa | 1185 | case SAA7134_BOARD_ASUS_EUROPA_HYBRID: |
363c35fc | 1186 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1187 | &philips_europa_config, |
1188 | &dev->i2c_adap); | |
363c35fc ST |
1189 | if (fe0->dvb.frontend) { |
1190 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1191 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1192 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1193 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1194 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 1195 | } |
2cf36ac4 | 1196 | break; |
128fe95d VC |
1197 | case SAA7134_BOARD_TECHNOTREND_BUDGET_T3000: |
1198 | fe0->dvb.frontend = dvb_attach(tda10046_attach, | |
1199 | &technotrend_budget_t3000_config, | |
1200 | &dev->i2c_adap); | |
1201 | if (fe0->dvb.frontend) { | |
1202 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1203 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1204 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1205 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1206 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
1207 | } | |
1208 | break; | |
2cf36ac4 | 1209 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: |
363c35fc | 1210 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1211 | &philips_tu1216_61_config, |
1212 | &dev->i2c_adap); | |
363c35fc ST |
1213 | if (fe0->dvb.frontend) { |
1214 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1215 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1216 | } |
2cf36ac4 | 1217 | break; |
b39423a9 | 1218 | case SAA7134_BOARD_KWORLD_DVBT_210: |
d557dab5 MCC |
1219 | if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config, |
1220 | &tda827x_cfg_2) < 0) | |
1221 | goto dettach_frontend; | |
b39423a9 | 1222 | break; |
0e316ecf | 1223 | case SAA7134_BOARD_HAUPPAUGE_HVR1120: |
1bc7f51c MK |
1224 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
1225 | &hcw_tda10048_config, | |
1226 | &dev->i2c_adap); | |
1227 | if (fe0->dvb.frontend != NULL) { | |
1228 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1229 | &dev->i2c_adap, 0x4b, | |
1230 | &tda829x_no_probe); | |
1231 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1232 | 0x60, &dev->i2c_adap, | |
1233 | &hcw_tda18271_config); | |
1234 | } | |
1235 | break; | |
90e9df7f | 1236 | case SAA7134_BOARD_PHILIPS_TIGER: |
d557dab5 MCC |
1237 | if (configure_tda827x_fe(dev, &philips_tiger_config, |
1238 | &tda827x_cfg_0) < 0) | |
1239 | goto dettach_frontend; | |
587d2fd7 HH |
1240 | break; |
1241 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
d557dab5 MCC |
1242 | if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config, |
1243 | &tda827x_cfg_1) < 0) | |
1244 | goto dettach_frontend; | |
90e9df7f | 1245 | break; |
c6e53daf | 1246 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
d557dab5 MCC |
1247 | if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config, |
1248 | &tda827x_cfg_1) < 0) | |
1249 | goto dettach_frontend; | |
c6e53daf | 1250 | break; |
b5f05064 | 1251 | case SAA7134_BOARD_HAUPPAUGE_HVR1150: |
3abdedd8 MK |
1252 | fe0->dvb.frontend = dvb_attach(lgdt3305_attach, |
1253 | &hcw_lgdt3305_config, | |
1254 | &dev->i2c_adap); | |
1255 | if (fe0->dvb.frontend) { | |
1256 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1257 | &dev->i2c_adap, 0x4b, | |
1258 | &tda829x_no_probe); | |
1259 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1260 | 0x60, &dev->i2c_adap, | |
1261 | &hcw_tda18271_config); | |
1262 | } | |
1263 | break; | |
d4b0aba4 | 1264 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
d557dab5 MCC |
1265 | if (configure_tda827x_fe(dev, &asus_p7131_dual_config, |
1266 | &tda827x_cfg_0) < 0) | |
1267 | goto dettach_frontend; | |
d4b0aba4 | 1268 | break; |
3d8466ec | 1269 | case SAA7134_BOARD_FLYDVBT_LR301: |
d557dab5 MCC |
1270 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1271 | &tda827x_cfg_0) < 0) | |
1272 | goto dettach_frontend; | |
3d8466ec | 1273 | break; |
92abe9ee | 1274 | case SAA7134_BOARD_FLYDVB_TRIO: |
d557dab5 MCC |
1275 | if (!use_frontend) { /* terrestrial */ |
1276 | if (configure_tda827x_fe(dev, &lifeview_trio_config, | |
1277 | &tda827x_cfg_0) < 0) | |
1278 | goto dettach_frontend; | |
7bff4b4d | 1279 | } else { /* satellite */ |
363c35fc ST |
1280 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); |
1281 | if (fe0->dvb.frontend) { | |
1282 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63, | |
1f683cd8 | 1283 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1284 | wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__); |
d557dab5 | 1285 | goto dettach_frontend; |
1f683cd8 | 1286 | } |
363c35fc | 1287 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap, |
1f683cd8 | 1288 | 0x08, 0, 0) == NULL) { |
5823b3a6 | 1289 | wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__); |
d557dab5 | 1290 | goto dettach_frontend; |
1f683cd8 NS |
1291 | } |
1292 | } | |
6b3ccab7 | 1293 | } |
420f32fe | 1294 | break; |
df42eaf2 | 1295 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1296 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
363c35fc | 1297 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1298 | &ads_tech_duo_config, |
1299 | &dev->i2c_adap); | |
363c35fc ST |
1300 | if (fe0->dvb.frontend) { |
1301 | if (dvb_attach(tda827x_attach,fe0->dvb.frontend, | |
7bff4b4d HH |
1302 | ads_tech_duo_config.tuner_address, &dev->i2c_adap, |
1303 | &ads_duo_cfg) == NULL) { | |
cf3c34c8 | 1304 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d | 1305 | ads_tech_duo_config.tuner_address); |
d557dab5 | 1306 | goto dettach_frontend; |
ede2200d | 1307 | } |
bc36ec74 MCC |
1308 | } else |
1309 | wprintk("failed to attach tda10046\n"); | |
df42eaf2 | 1310 | break; |
3dfb729f | 1311 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
d557dab5 MCC |
1312 | if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config, |
1313 | &tda827x_cfg_0) < 0) | |
1314 | goto dettach_frontend; | |
d95b8942 | 1315 | break; |
5eda227f | 1316 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
4b1431ca | 1317 | if (!use_frontend) { /* terrestrial */ |
d557dab5 MCC |
1318 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1319 | &tda827x_cfg_0) < 0) | |
1320 | goto dettach_frontend; | |
4b1431ca | 1321 | } else { /* satellite */ |
363c35fc | 1322 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
4b1431ca | 1323 | &flydvbs, &dev->i2c_adap); |
363c35fc ST |
1324 | if (fe0->dvb.frontend) { |
1325 | struct dvb_frontend *fe = fe0->dvb.frontend; | |
5823b3a6 HH |
1326 | u8 dev_id = dev->eedata[2]; |
1327 | u8 data = 0xc4; | |
1328 | struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1}; | |
1329 | ||
363c35fc | 1330 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, |
d557dab5 | 1331 | 0x60, &dev->i2c_adap, 0) == NULL) { |
4b1431ca | 1332 | wprintk("%s: Medion Quadro, no tda826x " |
5823b3a6 | 1333 | "found !\n", __func__); |
d557dab5 MCC |
1334 | goto dettach_frontend; |
1335 | } | |
5823b3a6 HH |
1336 | if (dev_id != 0x08) { |
1337 | /* we need to open the i2c gate (we know it exists) */ | |
1338 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1339 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1340 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 HH |
1341 | wprintk("%s: Medion Quadro, no ISL6405 " |
1342 | "found !\n", __func__); | |
d557dab5 MCC |
1343 | goto dettach_frontend; |
1344 | } | |
e9c1ac9d HH |
1345 | if (dev_id == 0x07) { |
1346 | /* fire up the 2nd section of the LNB supply since | |
1347 | we can't do this from the other section */ | |
1348 | msg.buf = &data; | |
1349 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1350 | } | |
5823b3a6 HH |
1351 | fe->ops.i2c_gate_ctrl(fe, 0); |
1352 | dev->original_set_voltage = fe->ops.set_voltage; | |
1353 | fe->ops.set_voltage = md8800_set_voltage; | |
1354 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1355 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1356 | } else { | |
1357 | fe->ops.set_voltage = md8800_set_voltage2; | |
1358 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2; | |
1359 | } | |
4b1431ca HH |
1360 | } |
1361 | } | |
5eda227f | 1362 | break; |
3b64e8e2 | 1363 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
363c35fc | 1364 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
f7b54b10 | 1365 | &dev->i2c_adap); |
363c35fc ST |
1366 | if (fe0->dvb.frontend) |
1367 | dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61, | |
47a9991e | 1368 | NULL, DVB_PLL_TDHU2); |
3b64e8e2 | 1369 | break; |
f689d908 | 1370 | case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI: |
3e1410ad | 1371 | case SAA7134_BOARD_KWORLD_ATSC110: |
363c35fc | 1372 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
f7b54b10 | 1373 | &dev->i2c_adap); |
363c35fc ST |
1374 | if (fe0->dvb.frontend) |
1375 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
62ff817a MK |
1376 | &dev->i2c_adap, 0x61, |
1377 | TUNER_PHILIPS_TUV1236D); | |
3e1410ad | 1378 | break; |
e2ac28fa | 1379 | case SAA7134_BOARD_FLYDVBS_LR300: |
363c35fc | 1380 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
f7b54b10 | 1381 | &dev->i2c_adap); |
363c35fc ST |
1382 | if (fe0->dvb.frontend) { |
1383 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
f7b54b10 | 1384 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1385 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 | 1386 | goto dettach_frontend; |
e2ac28fa | 1387 | } |
363c35fc | 1388 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, |
f7b54b10 | 1389 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 | 1390 | wprintk("%s: No ISL6421 found!\n", __func__); |
d557dab5 | 1391 | goto dettach_frontend; |
e2ac28fa IL |
1392 | } |
1393 | } | |
1394 | break; | |
cf146ca4 | 1395 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
363c35fc | 1396 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
0e8f4cc5 MS |
1397 | &medion_cardbus, |
1398 | &dev->i2c_adap); | |
363c35fc ST |
1399 | if (fe0->dvb.frontend) { |
1400 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1401 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
b7754d74 | 1402 | |
363c35fc | 1403 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, |
cb89cd33 MK |
1404 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1405 | TUNER_PHILIPS_FMD1216ME_MK3); | |
cf146ca4 HH |
1406 | } |
1407 | break; | |
cbb94521 | 1408 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
363c35fc | 1409 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
cbb94521 HH |
1410 | &philips_europa_config, |
1411 | &dev->i2c_adap); | |
363c35fc ST |
1412 | if (fe0->dvb.frontend) { |
1413 | fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1414 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
cbb94521 HH |
1415 | } |
1416 | break; | |
550a9a5e | 1417 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
d557dab5 MCC |
1418 | if (configure_tda827x_fe(dev, &cinergy_ht_config, |
1419 | &tda827x_cfg_0) < 0) | |
1420 | goto dettach_frontend; | |
9de271e6 MK |
1421 | break; |
1422 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
d557dab5 MCC |
1423 | if (configure_tda827x_fe(dev, &cinergy_ht_pci_config, |
1424 | &tda827x_cfg_0) < 0) | |
1425 | goto dettach_frontend; | |
58ef4f92 HH |
1426 | break; |
1427 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
d557dab5 MCC |
1428 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1429 | &tda827x_cfg_2) < 0) | |
1430 | goto dettach_frontend; | |
550a9a5e | 1431 | break; |
e06cea4c | 1432 | case SAA7134_BOARD_ASUS_P7131_4871: |
d557dab5 MCC |
1433 | if (configure_tda827x_fe(dev, &asus_p7131_4871_config, |
1434 | &tda827x_cfg_2) < 0) | |
1435 | goto dettach_frontend; | |
e06cea4c | 1436 | break; |
f3eec0c0 | 1437 | case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: |
d557dab5 MCC |
1438 | if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config, |
1439 | &tda827x_cfg_2) < 0) | |
1440 | goto dettach_frontend; | |
e06cea4c | 1441 | break; |
d90d9f5a | 1442 | case SAA7134_BOARD_AVERMEDIA_SUPER_007: |
d557dab5 MCC |
1443 | if (configure_tda827x_fe(dev, &avermedia_super_007_config, |
1444 | &tda827x_cfg_0) < 0) | |
1445 | goto dettach_frontend; | |
d90d9f5a | 1446 | break; |
4ba24373 | 1447 | case SAA7134_BOARD_TWINHAN_DTV_DVB_3056: |
d557dab5 MCC |
1448 | if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config, |
1449 | &tda827x_cfg_2_sw42) < 0) | |
1450 | goto dettach_frontend; | |
4ba24373 | 1451 | break; |
6ab465a8 | 1452 | case SAA7134_BOARD_PHILIPS_SNAKE: |
363c35fc | 1453 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
6ab465a8 | 1454 | &dev->i2c_adap); |
363c35fc ST |
1455 | if (fe0->dvb.frontend) { |
1456 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
d557dab5 | 1457 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1458 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 MCC |
1459 | goto dettach_frontend; |
1460 | } | |
363c35fc | 1461 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
d557dab5 | 1462 | &dev->i2c_adap, 0, 0) == NULL) { |
5823b3a6 | 1463 | wprintk("%s: No lnbp21 found!\n", __func__); |
d557dab5 MCC |
1464 | goto dettach_frontend; |
1465 | } | |
6ab465a8 HH |
1466 | } |
1467 | break; | |
7b5b3f17 | 1468 | case SAA7134_BOARD_CREATIX_CTX953: |
d557dab5 MCC |
1469 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1470 | &tda827x_cfg_0) < 0) | |
1471 | goto dettach_frontend; | |
7b5b3f17 | 1472 | break; |
6a6179b6 | 1473 | case SAA7134_BOARD_MSI_TVANYWHERE_AD11: |
d557dab5 MCC |
1474 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1475 | &tda827x_cfg_2) < 0) | |
1476 | goto dettach_frontend; | |
6a6179b6 | 1477 | break; |
bc36a686 | 1478 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
6e501a3f TF |
1479 | dprintk("AverMedia E506R dvb setup\n"); |
1480 | saa7134_set_gpio(dev, 25, 0); | |
1481 | msleep(10); | |
1482 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1483 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1484 | &avermedia_xc3028_mt352_dev, |
1485 | &dev->i2c_adap); | |
bc36a686 | 1486 | attach_xc3028 = 1; |
e2fc00c2 | 1487 | break; |
637afdb5 | 1488 | case SAA7134_BOARD_MD7134_BRIDGE_2: |
363c35fc | 1489 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
9a1b04e4 | 1490 | &sd1878_4m, &dev->i2c_adap); |
363c35fc | 1491 | if (fe0->dvb.frontend) { |
637afdb5 | 1492 | struct dvb_frontend *fe; |
363c35fc | 1493 | if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, |
d557dab5 | 1494 | &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) { |
637afdb5 | 1495 | wprintk("%s: MD7134 DVB-S, no SD1878 " |
5823b3a6 | 1496 | "found !\n", __func__); |
d557dab5 MCC |
1497 | goto dettach_frontend; |
1498 | } | |
637afdb5 | 1499 | /* we need to open the i2c gate (we know it exists) */ |
363c35fc | 1500 | fe = fe0->dvb.frontend; |
637afdb5 HH |
1501 | fe->ops.i2c_gate_ctrl(fe, 1); |
1502 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1503 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
637afdb5 | 1504 | wprintk("%s: MD7134 DVB-S, no ISL6405 " |
5823b3a6 | 1505 | "found !\n", __func__); |
d557dab5 MCC |
1506 | goto dettach_frontend; |
1507 | } | |
637afdb5 HH |
1508 | fe->ops.i2c_gate_ctrl(fe, 0); |
1509 | dev->original_set_voltage = fe->ops.set_voltage; | |
1510 | fe->ops.set_voltage = md8800_set_voltage; | |
1511 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1512 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1513 | } | |
1514 | break; | |
e2fc00c2 MP |
1515 | case SAA7134_BOARD_AVERMEDIA_M103: |
1516 | saa7134_set_gpio(dev, 25, 0); | |
1517 | msleep(10); | |
1518 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1519 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
e2fc00c2 MP |
1520 | &avermedia_xc3028_mt352_dev, |
1521 | &dev->i2c_adap); | |
1522 | attach_xc3028 = 1; | |
1523 | break; | |
301e9d64 | 1524 | case SAA7134_BOARD_ASUSTeK_TIGER_3IN1: |
1525 | if (!use_frontend) { /* terrestrial */ | |
1526 | if (configure_tda827x_fe(dev, &asus_tiger_3in1_config, | |
1527 | &tda827x_cfg_2) < 0) | |
1528 | goto dettach_frontend; | |
1529 | } else { /* satellite */ | |
363c35fc | 1530 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
301e9d64 | 1531 | &flydvbs, &dev->i2c_adap); |
363c35fc | 1532 | if (fe0->dvb.frontend) { |
301e9d64 | 1533 | if (dvb_attach(tda826x_attach, |
363c35fc | 1534 | fe0->dvb.frontend, 0x60, |
301e9d64 | 1535 | &dev->i2c_adap, 0) == NULL) { |
1536 | wprintk("%s: Asus Tiger 3in1, no " | |
1537 | "tda826x found!\n", __func__); | |
1538 | goto dettach_frontend; | |
1539 | } | |
363c35fc | 1540 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
301e9d64 | 1541 | &dev->i2c_adap, 0, 0) == NULL) { |
1542 | wprintk("%s: Asus Tiger 3in1, no lnbp21" | |
1543 | " found!\n", __func__); | |
1544 | goto dettach_frontend; | |
1545 | } | |
1546 | } | |
1547 | } | |
1548 | break; | |
028165a3 HP |
1549 | case SAA7134_BOARD_ASUSTeK_TIGER: |
1550 | if (configure_tda827x_fe(dev, &philips_tiger_config, | |
1551 | &tda827x_cfg_0) < 0) | |
1552 | goto dettach_frontend; | |
1553 | break; | |
47aeba5a | 1554 | case SAA7134_BOARD_BEHOLD_H6: |
b0c4be8c | 1555 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
47aeba5a DB |
1556 | &behold_h6_config, |
1557 | &dev->i2c_adap); | |
b0c4be8c MCC |
1558 | if (fe0->dvb.frontend) { |
1559 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
47aeba5a | 1560 | &dev->i2c_adap, 0x61, |
4786dd65 | 1561 | TUNER_PHILIPS_FMD1216MEX_MK3); |
47aeba5a | 1562 | } |
04574185 | 1563 | break; |
2930992c BILDB |
1564 | case SAA7134_BOARD_BEHOLD_X7: |
1565 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1566 | &behold_x7_config, | |
1567 | &dev->i2c_adap); | |
1568 | if (fe0->dvb.frontend) { | |
1569 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
1570 | &dev->i2c_adap, &behold_x7_tunerconfig); | |
1571 | } | |
1572 | break; | |
0faa2ed5 DB |
1573 | case SAA7134_BOARD_BEHOLD_H7: |
1574 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1575 | &behold_x7_config, | |
1576 | &dev->i2c_adap); | |
1577 | if (fe0->dvb.frontend) { | |
1578 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
1579 | &dev->i2c_adap, &behold_x7_tunerconfig); | |
1580 | } | |
1581 | break; | |
04574185 MS |
1582 | case SAA7134_BOARD_AVERMEDIA_A700_PRO: |
1583 | case SAA7134_BOARD_AVERMEDIA_A700_HYBRID: | |
1584 | /* Zarlink ZL10313 */ | |
1585 | fe0->dvb.frontend = dvb_attach(mt312_attach, | |
1586 | &avertv_a700_mt312, &dev->i2c_adap); | |
1587 | if (fe0->dvb.frontend) { | |
1588 | if (dvb_attach(zl10036_attach, fe0->dvb.frontend, | |
1589 | &avertv_a700_tuner, &dev->i2c_adap) == NULL) { | |
1590 | wprintk("%s: No zl10036 found!\n", | |
1591 | __func__); | |
1592 | } | |
1593 | } | |
ecfcfec8 IL |
1594 | break; |
1595 | case SAA7134_BOARD_VIDEOMATE_S350: | |
1596 | fe0->dvb.frontend = dvb_attach(mt312_attach, | |
1597 | &zl10313_compro_s350_config, &dev->i2c_adap); | |
1598 | if (fe0->dvb.frontend) | |
1599 | if (dvb_attach(zl10039_attach, fe0->dvb.frontend, | |
1600 | 0x60, &dev->i2c_adap) == NULL) | |
1601 | wprintk("%s: No zl10039 found!\n", | |
1602 | __func__); | |
1603 | ||
6c119ff4 HV |
1604 | break; |
1605 | case SAA7134_BOARD_ZOLID_HYBRID_PCI: | |
1606 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | |
1607 | &zolid_tda10048_config, | |
1608 | &dev->i2c_adap); | |
1609 | if (fe0->dvb.frontend != NULL) { | |
1610 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1611 | &dev->i2c_adap, 0x4b, | |
1612 | &tda829x_no_probe); | |
1613 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1614 | 0x60, &dev->i2c_adap, | |
1615 | &zolid_tda18271_config); | |
1616 | } | |
47aeba5a | 1617 | break; |
184e769f MK |
1618 | case SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S: |
1619 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | |
1620 | &dtv1000s_tda10048_config, | |
1621 | &dev->i2c_adap); | |
1622 | if (fe0->dvb.frontend != NULL) { | |
1623 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1624 | &dev->i2c_adap, 0x4b, | |
1625 | &tda829x_no_probe); | |
1626 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1627 | 0x60, &dev->i2c_adap, | |
1628 | &dtv1000s_tda18271_config); | |
1629 | } | |
1630 | break; | |
f0551efc | 1631 | case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG: |
f0551efc MCC |
1632 | saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x14000); |
1633 | saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x14000); | |
1634 | msleep(20); | |
1635 | saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x54000); | |
1636 | saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x54000); | |
1637 | msleep(20); | |
1638 | fe0->dvb.frontend = dvb_attach(mb86a20s_attach, | |
1639 | &kworld_mb86a20s_config, | |
1640 | &dev->i2c_adap); | |
f0551efc MCC |
1641 | if (fe0->dvb.frontend != NULL) { |
1642 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1643 | 0x60, &dev->i2c_adap, | |
1644 | &kworld_tda18271_config); | |
f0551efc MCC |
1645 | } |
1646 | break; | |
1da177e4 | 1647 | default: |
cf3c34c8 | 1648 | wprintk("Huh? unknown DVB card?\n"); |
1da177e4 LT |
1649 | break; |
1650 | } | |
1651 | ||
bc36a686 MCC |
1652 | if (attach_xc3028) { |
1653 | struct dvb_frontend *fe; | |
1654 | struct xc2028_config cfg = { | |
1655 | .i2c_adap = &dev->i2c_adap, | |
1656 | .i2c_addr = 0x61, | |
bc36a686 | 1657 | }; |
95a2fdb6 | 1658 | |
363c35fc | 1659 | if (!fe0->dvb.frontend) |
f3f741e7 | 1660 | goto dettach_frontend; |
95a2fdb6 | 1661 | |
363c35fc | 1662 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); |
bc36a686 MCC |
1663 | if (!fe) { |
1664 | printk(KERN_ERR "%s/2: xc3028 attach failed\n", | |
1665 | dev->name); | |
d557dab5 | 1666 | goto dettach_frontend; |
bc36a686 MCC |
1667 | } |
1668 | } | |
1669 | ||
363c35fc | 1670 | if (NULL == fe0->dvb.frontend) { |
cf3c34c8 | 1671 | printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name); |
f3f741e7 | 1672 | goto dettach_frontend; |
1da177e4 | 1673 | } |
d7cba043 | 1674 | /* define general-purpose callback pointer */ |
363c35fc | 1675 | fe0->dvb.frontend->callback = saa7134_tuner_callback; |
1da177e4 LT |
1676 | |
1677 | /* register everything else */ | |
363c35fc | 1678 | ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, |
9133aee0 | 1679 | &dev->pci->dev, adapter_nr, 0, NULL); |
1c4f76ab HH |
1680 | |
1681 | /* this sequence is necessary to make the tda1004x load its firmware | |
1682 | * and to enter analog mode of hybrid boards | |
1683 | */ | |
1684 | if (!ret) { | |
363c35fc ST |
1685 | if (fe0->dvb.frontend->ops.init) |
1686 | fe0->dvb.frontend->ops.init(fe0->dvb.frontend); | |
1687 | if (fe0->dvb.frontend->ops.sleep) | |
1688 | fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend); | |
1689 | if (fe0->dvb.frontend->ops.tuner_ops.sleep) | |
1690 | fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend); | |
1c4f76ab HH |
1691 | } |
1692 | return ret; | |
d557dab5 MCC |
1693 | |
1694 | dettach_frontend: | |
f3f741e7 DB |
1695 | videobuf_dvb_dealloc_frontends(&dev->frontends); |
1696 | return -EINVAL; | |
1da177e4 LT |
1697 | } |
1698 | ||
1699 | static int dvb_fini(struct saa7134_dev *dev) | |
1700 | { | |
363c35fc ST |
1701 | struct videobuf_dvb_frontend *fe0; |
1702 | ||
1703 | /* Get the first frontend */ | |
1704 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
1705 | if (!fe0) | |
1706 | return -EINVAL; | |
1707 | ||
7f171123 MCC |
1708 | /* FIXME: I suspect that this code is bogus, since the entry for |
1709 | Pinnacle 300I DVB-T PAL already defines the proper init to allow | |
1710 | the detection of mt2032 (TDA9887_PORT2_INACTIVE) | |
1711 | */ | |
1712 | if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) { | |
1713 | struct v4l2_priv_tun_config tda9887_cfg; | |
1714 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1715 | ||
1716 | tda9887_cfg.tuner = TUNER_TDA9887; | |
1717 | tda9887_cfg.priv = &on; | |
1da177e4 | 1718 | |
1da177e4 | 1719 | /* otherwise we don't detect the tuner on next insmod */ |
fac6986c | 1720 | saa_call_all(dev, tuner, s_config, &tda9887_cfg); |
5823b3a6 | 1721 | } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) { |
e9c1ac9d | 1722 | if ((dev->eedata[2] == 0x07) && use_frontend) { |
5823b3a6 HH |
1723 | /* turn off the 2nd lnb supply */ |
1724 | u8 data = 0x80; | |
1725 | struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1}; | |
1726 | struct dvb_frontend *fe; | |
363c35fc | 1727 | fe = fe0->dvb.frontend; |
5823b3a6 HH |
1728 | if (fe->ops.i2c_gate_ctrl) { |
1729 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1730 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1731 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1732 | } | |
1733 | } | |
7f171123 | 1734 | } |
f3f741e7 | 1735 | videobuf_dvb_unregister_bus(&dev->frontends); |
1da177e4 LT |
1736 | return 0; |
1737 | } | |
1738 | ||
1739 | static struct saa7134_mpeg_ops dvb_ops = { | |
1740 | .type = SAA7134_MPEG_DVB, | |
1741 | .init = dvb_init, | |
1742 | .fini = dvb_fini, | |
1743 | }; | |
1744 | ||
1745 | static int __init dvb_register(void) | |
1746 | { | |
1747 | return saa7134_ts_register(&dvb_ops); | |
1748 | } | |
1749 | ||
1750 | static void __exit dvb_unregister(void) | |
1751 | { | |
1752 | saa7134_ts_unregister(&dvb_ops); | |
1753 | } | |
1754 | ||
1755 | module_init(dvb_register); | |
1756 | module_exit(dvb_unregister); | |
1757 | ||
1758 | /* ------------------------------------------------------------------ */ | |
1759 | /* | |
1760 | * Local variables: | |
1761 | * c-basic-offset: 8 | |
1762 | * End: | |
1763 | */ |