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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[linux-2.6-block.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC		 5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT		 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
1da177e4
LT		 27#include <linux/delay.h>
28#include <linux/kthread.h>
29#include <linux/suspend.h>
30
31#include "saa7134-reg.h"
32#include "saa7134.h"
5e453dc7 33#include <media/v4l2-common.h>
a78d0bfa 34#include "dvb-pll.h"
5823b3a6 35#include <dvb_frontend.h>
1da177e4 36
1f10c7af
AQ		 37#include "mt352.h"
38#include "mt352_priv.h" /* FIXME */
39#include "tda1004x.h"
40#include "nxt200x.h"
bc36a686 41#include "tuner-xc2028.h"
2930992c 42#include "xc5000.h"
1da177e4 43
e2ac28fa
IL		 44#include "tda10086.h"
45#include "tda826x.h"
8ce47dad 46#include "tda827x.h"
e2ac28fa 47#include "isl6421.h"
4b1431ca 48#include "isl6405.h"
6ab465a8 49#include "lnbp21.h"
cb89cd33 50#include "tuner-simple.h"
1bc7f51c 51#include "tda10048.h"
3abdedd8
MK		 52#include "tda18271.h"
53#include "lgdt3305.h"
54#include "tda8290.h"
8ce47dad 55
47aeba5a
DB		 56#include "zl10353.h"
57
04574185 58#include "zl10036.h"
ecfcfec8 59#include "zl10039.h"
04574185
MS		 60#include "mt312.h"
61
1da177e4
LT		 62MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
63MODULE_LICENSE("GPL");
64
ff699e6b 65static unsigned int antenna_pwr;
86ddd96f 66
1da177e4
LT		 67module_param(antenna_pwr, int, 0444);
68MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
69
ff699e6b 70static int use_frontend;
b331daa0
SB		 71module_param(use_frontend, int, 0644);
72MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 73
ff699e6b 74static int debug;
58ef4f92
HH		 75module_param(debug, int, 0644);
76MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
77
78e92006
JG		 78DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
79
cf3c34c8
TP		 80#define dprintk(fmt, arg...) do { if (debug) \
81 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
82
83/* Print a warning */
84#define wprintk(fmt, arg...) \
85 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH		 86
87/* ------------------------------------------------------------------
88 * mt352 based DVB-T cards
89 */
90
1da177e4
LT		 91static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
92{
93 u32 ok;
94
95 if (!on) {
96 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
97 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
98 return 0;
99 }
100
101 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
102 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
103 udelay(10);
104
105 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
106 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
107 udelay(10);
108 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
109 udelay(10);
110 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
5823b3a6 111 dprintk("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT		 112
113 if (!ok)
114 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
115 return ok;
116}
117
118static int mt352_pinnacle_init(struct dvb_frontend* fe)
119{
120 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
121 static u8 reset [] = { RESET, 0x80 };
122 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
123 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
124 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
125 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
126 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
127 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
128 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
129 struct saa7134_dev *dev= fe->dvb->priv;
130
5823b3a6 131 dprintk("%s called\n", __func__);
1da177e4
LT		 132
133 mt352_write(fe, clock_config, sizeof(clock_config));
134 udelay(200);
135 mt352_write(fe, reset, sizeof(reset));
136 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
137 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
138 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
139 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
140
141 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
142 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
143 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 144
1da177e4
LT		 145 return 0;
146}
147
a78d0bfa
JAR		 148static int mt352_aver777_init(struct dvb_frontend* fe)
149{
150 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
151 static u8 reset [] = { RESET, 0x80 };
152 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
153 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
154 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
155
156 mt352_write(fe, clock_config, sizeof(clock_config));
157 udelay(200);
158 mt352_write(fe, reset, sizeof(reset));
159 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
160 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
161 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
162
163 return 0;
164}
165
6e501a3f 166static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 167{
6e501a3f
TF		 168 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
169 static u8 reset [] = { RESET, 0x80 };
170 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
171 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC		 172 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
173
174 mt352_write(fe, clock_config, sizeof(clock_config));
175 udelay(200);
176 mt352_write(fe, reset, sizeof(reset));
177 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
178 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
179 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC		 180 return 0;
181}
182
0463f12c
AQ		 183static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
184 struct dvb_frontend_parameters* params)
1da177e4 185{
df8cf706
HH		 186 u8 off[] = { 0x00, 0xf1};
187 u8 on[] = { 0x00, 0x71};
188 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
189
1da177e4
LT		 190 struct saa7134_dev *dev = fe->dvb->priv;
191 struct v4l2_frequency f;
192
193 /* set frequency (mt2050) */
194 f.tuner = 0;
195 f.type = V4L2_TUNER_DIGITAL_TV;
196 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB		 197 if (fe->ops.i2c_gate_ctrl)
198 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 199 i2c_transfer(&dev->i2c_adap, &msg, 1);
fac6986c 200 saa_call_all(dev, tuner, s_frequency, &f);
df8cf706 201 msg.buf = on;
dea74869
PB		 202 if (fe->ops.i2c_gate_ctrl)
203 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 204 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT		 205
206 pinnacle_antenna_pwr(dev, antenna_pwr);
207
208 /* mt352 setup */
0463f12c 209 return mt352_pinnacle_init(fe);
1da177e4
LT		 210}
211
212static struct mt352_config pinnacle_300i = {
213 .demod_address = 0x3c >> 1,
214 .adc_clock = 20333,
215 .if2 = 36150,
216 .no_tuner = 1,
217 .demod_init = mt352_pinnacle_init,
1da177e4 218};
a78d0bfa
JAR		 219
220static struct mt352_config avermedia_777 = {
221 .demod_address = 0xf,
222 .demod_init = mt352_aver777_init,
a78d0bfa 223};
1da177e4 224
6e501a3f 225static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC		 226 .demod_address = (0x1e >> 1),
227 .no_tuner = 1,
6e501a3f 228 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC		 229};
230
58ef4f92
HH		 231/* ==================================================================
232 * tda1004x based DVB-T cards, helper functions
233 */
234
235static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
236 const struct firmware **fw, char *name)
1da177e4
LT		 237{
238 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 239 return request_firmware(fw, name, &dev->pci->dev);
240}
241
58ef4f92
HH		 242/* ------------------------------------------------------------------
243 * these tuners are tu1216, td1316(a)
244 */
245
246static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
247{
248 struct saa7134_dev *dev = fe->dvb->priv;
249 struct tda1004x_state *state = fe->demodulator_priv;
250 u8 addr = state->config->tuner_address;
86ddd96f 251 u8 tuner_buf[4];
2cf36ac4 252 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC		 253 sizeof(tuner_buf) };
254 int tuner_frequency = 0;
255 u8 band, cp, filter;
256
257 /* determine charge pump */
258 tuner_frequency = params->frequency + 36166000;
259 if (tuner_frequency < 87000000)
260 return -EINVAL;
261 else if (tuner_frequency < 130000000)
262 cp = 3;
263 else if (tuner_frequency < 160000000)
264 cp = 5;
265 else if (tuner_frequency < 200000000)
266 cp = 6;
267 else if (tuner_frequency < 290000000)
268 cp = 3;
269 else if (tuner_frequency < 420000000)
270 cp = 5;
271 else if (tuner_frequency < 480000000)
272 cp = 6;
273 else if (tuner_frequency < 620000000)
274 cp = 3;
275 else if (tuner_frequency < 830000000)
276 cp = 5;
277 else if (tuner_frequency < 895000000)
278 cp = 7;
279 else
280 return -EINVAL;
281
282 /* determine band */
283 if (params->frequency < 49000000)
284 return -EINVAL;
285 else if (params->frequency < 161000000)
286 band = 1;
287 else if (params->frequency < 444000000)
288 band = 2;
289 else if (params->frequency < 861000000)
290 band = 4;
291 else
292 return -EINVAL;
293
294 /* setup PLL filter */
295 switch (params->u.ofdm.bandwidth) {
296 case BANDWIDTH_6_MHZ:
297 filter = 0;
298 break;
299
300 case BANDWIDTH_7_MHZ:
301 filter = 0;
302 break;
303
304 case BANDWIDTH_8_MHZ:
305 filter = 1;
306 break;
1da177e4 307
86ddd96f
MCC		 308 default:
309 return -EINVAL;
310 }
311
312 /* calculate divisor
313 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 314 */
86ddd96f
MCC		 315 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
316
317 /* setup tuner buffer */
318 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
319 tuner_buf[1] = tuner_frequency & 0xff;
320 tuner_buf[2] = 0xca;
321 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
322
dea74869
PB		 323 if (fe->ops.i2c_gate_ctrl)
324 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 325 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP		 326 wprintk("could not write to tuner at addr: 0x%02x\n",
327 addr << 1);
86ddd96f 328 return -EIO;
58ef4f92 329 }
2cf36ac4
HH		 330 msleep(1);
331 return 0;
332}
333
58ef4f92 334static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH		 335{
336 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 337 struct tda1004x_state *state = fe->demodulator_priv;
338 u8 addr = state->config->tuner_address;
2cf36ac4
HH		 339 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
340 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 341
2cf36ac4 342 /* setup PLL configuration */
dea74869
PB		 343 if (fe->ops.i2c_gate_ctrl)
344 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 345 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
346 return -EIO;
86ddd96f 347 msleep(1);
2cf36ac4 348
1da177e4
LT		 349 return 0;
350}
351
2cf36ac4
HH		 352/* ------------------------------------------------------------------ */
353
2cf36ac4 354static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC		 355 .demod_address = 0x8,
356 .invert = 1,
2cf36ac4 357 .invert_oclk = 0,
86ddd96f
MCC		 358 .xtal_freq = TDA10046_XTAL_4M,
359 .agc_config = TDA10046_AGC_DEFAULT,
360 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 361 .tuner_address = 0x60,
362 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 363};
364
2cf36ac4
HH		 365static struct tda1004x_config philips_tu1216_61_config = {
366
367 .demod_address = 0x8,
368 .invert = 1,
369 .invert_oclk = 0,
370 .xtal_freq = TDA10046_XTAL_4M,
371 .agc_config = TDA10046_AGC_DEFAULT,
372 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 373 .tuner_address = 0x61,
374 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 375};
376
377/* ------------------------------------------------------------------ */
378
cbb94521 379static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH		 380{
381 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 382 struct tda1004x_state *state = fe->demodulator_priv;
383 u8 addr = state->config->tuner_address;
2cf36ac4 384 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 385 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH		 386
387 /* setup PLL configuration */
dea74869
PB		 388 if (fe->ops.i2c_gate_ctrl)
389 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 390 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
391 return -EIO;
2cf36ac4
HH		 392 return 0;
393}
394
a79ddae9 395static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 396{
58ef4f92
HH		 397 return philips_tda6651_pll_set(fe, params);
398}
399
400static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
401{
402 struct saa7134_dev *dev = fe->dvb->priv;
403 struct tda1004x_state *state = fe->demodulator_priv;
404 u8 addr = state->config->tuner_address;
405 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
406 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
407
408 /* switch the tuner to analog mode */
409 if (fe->ops.i2c_gate_ctrl)
410 fe->ops.i2c_gate_ctrl(fe, 1);
411 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
412 return -EIO;
413 return 0;
2cf36ac4
HH		 414}
415
58ef4f92
HH		 416/* ------------------------------------------------------------------ */
417
cbb94521
HH		 418static int philips_europa_tuner_init(struct dvb_frontend *fe)
419{
420 struct saa7134_dev *dev = fe->dvb->priv;
421 static u8 msg[] = { 0x00, 0x40};
422 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
423
424
425 if (philips_td1316_tuner_init(fe))
426 return -EIO;
427 msleep(1);
428 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
429 return -EIO;
430
431 return 0;
432}
433
a79ddae9 434static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH		 435{
436 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 437
58ef4f92
HH		 438 static u8 msg[] = { 0x00, 0x14 };
439 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
440
441 if (philips_td1316_tuner_sleep(fe))
442 return -EIO;
2cf36ac4
HH		 443
444 /* switch the board to analog mode */
dea74869
PB		 445 if (fe->ops.i2c_gate_ctrl)
446 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 447 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ		 448 return 0;
449}
450
451static int philips_europa_demod_sleep(struct dvb_frontend *fe)
452{
453 struct saa7134_dev *dev = fe->dvb->priv;
454
455 if (dev->original_demod_sleep)
456 dev->original_demod_sleep(fe);
dea74869 457 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 458 return 0;
2cf36ac4
HH		 459}
460
461static struct tda1004x_config philips_europa_config = {
462
463 .demod_address = 0x8,
464 .invert = 0,
465 .invert_oclk = 0,
466 .xtal_freq = TDA10046_XTAL_4M,
467 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
468 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH		 469 .tuner_address = 0x61,
470 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 471};
472
408b664a 473static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC		 474 .demod_address = 0x08,
475 .invert = 1,
476 .invert_oclk = 0,
477 .xtal_freq = TDA10046_XTAL_16M,
478 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
479 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH		 480 .tuner_address = 0x61,
481 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 482};
483
58ef4f92
HH		 484/* ------------------------------------------------------------------
485 * tda 1004x based cards with philips silicon tuner
486 */
487
58ef4f92
HH		 488static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
489{
58ef4f92
HH		 490 struct tda1004x_state *state = fe->demodulator_priv;
491
492 u8 addr = state->config->i2c_gate;
493 static u8 tda8290_close[] = { 0x21, 0xc0};
494 static u8 tda8290_open[] = { 0x21, 0x80};
495 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
496 if (enable) {
497 tda8290_msg.buf = tda8290_close;
498 } else {
499 tda8290_msg.buf = tda8290_open;
500 }
06be3035 501 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP		 502 struct saa7134_dev *dev = fe->dvb->priv;
503 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH		 504 return -EIO;
505 }
506 msleep(20);
507 return 0;
508}
509
58ef4f92 510static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 511{
90e9df7f 512 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 513 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 514
58ef4f92
HH		 515 switch (state->config->antenna_switch) {
516 case 0: break;
517 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
518 saa7134_set_gpio(dev, 21, 0);
519 break;
520 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
521 saa7134_set_gpio(dev, 21, 1);
522 break;
587d2fd7 523 }
587d2fd7
HH		 524 return 0;
525}
526
58ef4f92 527static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 528{
58ef4f92
HH		 529 struct saa7134_dev *dev = fe->dvb->priv;
530 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 531
58ef4f92
HH		 532 switch (state->config->antenna_switch) {
533 case 0: break;
534 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
535 saa7134_set_gpio(dev, 21, 1);
536 break;
537 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
538 saa7134_set_gpio(dev, 21, 0);
539 break;
540 }
587d2fd7 541 return 0;
2d6b5f62 542}
90e9df7f 543
d557dab5
MCC		 544static int configure_tda827x_fe(struct saa7134_dev *dev,
545 struct tda1004x_config *cdec_conf,
546 struct tda827x_config *tuner_conf)
90e9df7f 547{
363c35fc
ST		 548 struct videobuf_dvb_frontend *fe0;
549
92abe9ee
DB		 550 /* Get the first frontend */
551 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
363c35fc
ST		 552
553 fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
554 if (fe0->dvb.frontend) {
7bff4b4d 555 if (cdec_conf->i2c_gate)
363c35fc
ST		 556 fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
557 if (dvb_attach(tda827x_attach, fe0->dvb.frontend,
d557dab5
MCC		 558 cdec_conf->tuner_address,
559 &dev->i2c_adap, tuner_conf))
560 return 0;
561
562 wprintk("no tda827x tuner found at addr: %02x\n",
7bff4b4d 563 cdec_conf->tuner_address);
58ef4f92 564 }
d557dab5 565 return -EINVAL;
90e9df7f
HH		 566}
567
58ef4f92 568/* ------------------------------------------------------------------ */
261f5081 569
7bff4b4d 570static struct tda827x_config tda827x_cfg_0 = {
7bff4b4d
HH		 571 .init = philips_tda827x_tuner_init,
572 .sleep = philips_tda827x_tuner_sleep,
573 .config = 0,
574 .switch_addr = 0
575};
576
577static struct tda827x_config tda827x_cfg_1 = {
7bff4b4d
HH		 578 .init = philips_tda827x_tuner_init,
579 .sleep = philips_tda827x_tuner_sleep,
580 .config = 1,
581 .switch_addr = 0x4b
582};
583
584static struct tda827x_config tda827x_cfg_2 = {
7bff4b4d
HH		 585 .init = philips_tda827x_tuner_init,
586 .sleep = philips_tda827x_tuner_sleep,
587 .config = 2,
588 .switch_addr = 0x4b
589};
590
591static struct tda827x_config tda827x_cfg_2_sw42 = {
7bff4b4d
HH		 592 .init = philips_tda827x_tuner_init,
593 .sleep = philips_tda827x_tuner_sleep,
594 .config = 2,
595 .switch_addr = 0x42
596};
597
598/* ------------------------------------------------------------------ */
599
58ef4f92 600static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH		 601 .demod_address = 0x08,
602 .invert = 1,
603 .invert_oclk = 0,
604 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 605 .agc_config = TDA10046_AGC_TDA827X,
606 .gpio_config = TDA10046_GP11_I,
550a9a5e 607 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 608 .tuner_address = 0x60,
609 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 610};
550a9a5e 611
58ef4f92
HH		 612static struct tda1004x_config philips_tiger_config = {
613 .demod_address = 0x08,
614 .invert = 1,
615 .invert_oclk = 0,
616 .xtal_freq = TDA10046_XTAL_16M,
617 .agc_config = TDA10046_AGC_TDA827X,
618 .gpio_config = TDA10046_GP11_I,
619 .if_freq = TDA10046_FREQ_045,
620 .i2c_gate = 0x4b,
621 .tuner_address = 0x61,
58ef4f92
HH		 622 .antenna_switch= 1,
623 .request_firmware = philips_tda1004x_request_firmware
624};
550a9a5e
HH		 625
626static struct tda1004x_config cinergy_ht_config = {
627 .demod_address = 0x08,
628 .invert = 1,
629 .invert_oclk = 0,
630 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 631 .agc_config = TDA10046_AGC_TDA827X,
632 .gpio_config = TDA10046_GP01_I,
90e9df7f 633 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 634 .i2c_gate = 0x4b,
635 .tuner_address = 0x61,
58ef4f92 636 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH		 637};
638
58ef4f92
HH		 639static struct tda1004x_config cinergy_ht_pci_config = {
640 .demod_address = 0x08,
641 .invert = 1,
642 .invert_oclk = 0,
643 .xtal_freq = TDA10046_XTAL_16M,
644 .agc_config = TDA10046_AGC_TDA827X,
645 .gpio_config = TDA10046_GP01_I,
646 .if_freq = TDA10046_FREQ_045,
647 .i2c_gate = 0x4b,
648 .tuner_address = 0x60,
58ef4f92
HH		 649 .request_firmware = philips_tda1004x_request_firmware
650};
651
652static struct tda1004x_config philips_tiger_s_config = {
653 .demod_address = 0x08,
654 .invert = 1,
655 .invert_oclk = 0,
656 .xtal_freq = TDA10046_XTAL_16M,
657 .agc_config = TDA10046_AGC_TDA827X,
658 .gpio_config = TDA10046_GP01_I,
659 .if_freq = TDA10046_FREQ_045,
660 .i2c_gate = 0x4b,
661 .tuner_address = 0x61,
58ef4f92
HH		 662 .antenna_switch= 1,
663 .request_firmware = philips_tda1004x_request_firmware
664};
df42eaf2 665
587d2fd7
HH		 666static struct tda1004x_config pinnacle_pctv_310i_config = {
667 .demod_address = 0x08,
668 .invert = 1,
669 .invert_oclk = 0,
670 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 671 .agc_config = TDA10046_AGC_TDA827X,
672 .gpio_config = TDA10046_GP11_I,
587d2fd7 673 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 674 .i2c_gate = 0x4b,
675 .tuner_address = 0x61,
58ef4f92 676 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH		 677};
678
c6e53daf
TG		 679static struct tda1004x_config hauppauge_hvr_1110_config = {
680 .demod_address = 0x08,
681 .invert = 1,
682 .invert_oclk = 0,
683 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 684 .agc_config = TDA10046_AGC_TDA827X,
685 .gpio_config = TDA10046_GP11_I,
c6e53daf 686 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 687 .i2c_gate = 0x4b,
688 .tuner_address = 0x61,
689 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG		 690};
691
83646817
HH		 692static struct tda1004x_config asus_p7131_dual_config = {
693 .demod_address = 0x08,
694 .invert = 1,
695 .invert_oclk = 0,
696 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 697 .agc_config = TDA10046_AGC_TDA827X,
698 .gpio_config = TDA10046_GP11_I,
83646817 699 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 700 .i2c_gate = 0x4b,
701 .tuner_address = 0x61,
58ef4f92
HH		 702 .antenna_switch= 2,
703 .request_firmware = philips_tda1004x_request_firmware
83646817
HH		 704};
705
420f32fe
NS		 706static struct tda1004x_config lifeview_trio_config = {
707 .demod_address = 0x09,
708 .invert = 1,
709 .invert_oclk = 0,
710 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 711 .agc_config = TDA10046_AGC_TDA827X,
712 .gpio_config = TDA10046_GP00_I,
420f32fe 713 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 714 .tuner_address = 0x60,
715 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS		 716};
717
58ef4f92 718static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH		 719 .demod_address = 0x08,
720 .invert = 1,
721 .invert_oclk = 0,
722 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 723 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 724 .gpio_config = TDA10046_GP11_I,
df42eaf2 725 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 726 .tuner_address = 0x60,
727 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH		 728};
729
58ef4f92 730static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH		 731 .demod_address = 0x08,
732 .invert = 1,
733 .invert_oclk = 0,
734 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 735 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 736 .gpio_config = TDA10046_GP01_I,
3dfb729f 737 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 738 .i2c_gate = 0x4b,
739 .tuner_address = 0x60,
58ef4f92 740 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH		 741};
742
e06cea4c
HH		 743static struct tda1004x_config asus_p7131_4871_config = {
744 .demod_address = 0x08,
745 .invert = 1,
746 .invert_oclk = 0,
747 .xtal_freq = TDA10046_XTAL_16M,
748 .agc_config = TDA10046_AGC_TDA827X,
749 .gpio_config = TDA10046_GP01_I,
750 .if_freq = TDA10046_FREQ_045,
751 .i2c_gate = 0x4b,
752 .tuner_address = 0x61,
e06cea4c
HH		 753 .antenna_switch= 2,
754 .request_firmware = philips_tda1004x_request_firmware
755};
756
f3eec0c0 757static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH		 758 .demod_address = 0x08,
759 .invert = 1,
760 .invert_oclk = 0,
761 .xtal_freq = TDA10046_XTAL_16M,
762 .agc_config = TDA10046_AGC_TDA827X,
763 .gpio_config = TDA10046_GP11_I,
764 .if_freq = TDA10046_FREQ_045,
765 .i2c_gate = 0x4b,
766 .tuner_address = 0x61,
e06cea4c
HH		 767 .antenna_switch= 2,
768 .request_firmware = philips_tda1004x_request_firmware
769};
261f5081 770
b39423a9
SF		 771static struct tda1004x_config kworld_dvb_t_210_config = {
772 .demod_address = 0x08,
773 .invert = 1,
774 .invert_oclk = 0,
775 .xtal_freq = TDA10046_XTAL_16M,
776 .agc_config = TDA10046_AGC_TDA827X,
777 .gpio_config = TDA10046_GP11_I,
778 .if_freq = TDA10046_FREQ_045,
779 .i2c_gate = 0x4b,
780 .tuner_address = 0x61,
b39423a9
SF		 781 .antenna_switch= 1,
782 .request_firmware = philips_tda1004x_request_firmware
783};
261f5081 784
d90d9f5a
ES		 785static struct tda1004x_config avermedia_super_007_config = {
786 .demod_address = 0x08,
787 .invert = 1,
788 .invert_oclk = 0,
789 .xtal_freq = TDA10046_XTAL_16M,
790 .agc_config = TDA10046_AGC_TDA827X,
791 .gpio_config = TDA10046_GP01_I,
792 .if_freq = TDA10046_FREQ_045,
793 .i2c_gate = 0x4b,
794 .tuner_address = 0x60,
d90d9f5a
ES		 795 .antenna_switch= 1,
796 .request_firmware = philips_tda1004x_request_firmware
797};
798
4ba24373
HP		 799static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
800 .demod_address = 0x08,
801 .invert = 1,
802 .invert_oclk = 0,
803 .xtal_freq = TDA10046_XTAL_16M,
804 .agc_config = TDA10046_AGC_TDA827X,
805 .gpio_config = TDA10046_GP01_I,
806 .if_freq = TDA10046_FREQ_045,
807 .i2c_gate = 0x42,
808 .tuner_address = 0x61,
4ba24373
HP		 809 .antenna_switch = 1,
810 .request_firmware = philips_tda1004x_request_firmware
811};
812
301e9d64 813static struct tda1004x_config asus_tiger_3in1_config = {
814 .demod_address = 0x0b,
815 .invert = 1,
816 .invert_oclk = 0,
817 .xtal_freq = TDA10046_XTAL_16M,
818 .agc_config = TDA10046_AGC_TDA827X,
819 .gpio_config = TDA10046_GP11_I,
820 .if_freq = TDA10046_FREQ_045,
821 .i2c_gate = 0x4b,
822 .tuner_address = 0x61,
823 .antenna_switch = 1,
824 .request_firmware = philips_tda1004x_request_firmware
825};
826
58ef4f92
HH		 827/* ------------------------------------------------------------------
828 * special case: this card uses saa713x GPIO22 for the mode switch
829 */
5eda227f 830
58ef4f92 831static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH		 832{
833 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 834 philips_tda827x_tuner_init(fe);
835 /* route TDA8275a AGC input to the channel decoder */
06be3035 836 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH		 837 return 0;
838}
839
58ef4f92 840static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 841{
5eda227f 842 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 843 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 844 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH		 845 philips_tda827x_tuner_sleep(fe);
846 return 0;
5eda227f
HH		 847}
848
8ce47dad 849static struct tda827x_config ads_duo_cfg = {
8ce47dad 850 .init = ads_duo_tuner_init,
7bff4b4d
HH		 851 .sleep = ads_duo_tuner_sleep,
852 .config = 0
8ce47dad
MK		 853};
854
58ef4f92 855static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH		 856 .demod_address = 0x08,
857 .invert = 1,
858 .invert_oclk = 0,
859 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 860 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 861 .gpio_config = TDA10046_GP00_I,
5eda227f 862 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 863 .tuner_address = 0x61,
864 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH		 865};
866
47aeba5a
DB		 867static struct zl10353_config behold_h6_config = {
868 .demod_address = 0x1e>>1,
869 .no_tuner = 1,
870 .parallel_ts = 1,
5f77af93 871 .disable_i2c_gate_ctrl = 1,
47aeba5a
DB		 872};
873
2930992c
BILDB		 874static struct xc5000_config behold_x7_tunerconfig = {
875 .i2c_address = 0xc2>>1,
876 .if_khz = 4560,
2a0d0560 877 .radio_input = XC5000_RADIO_FM1,
2930992c
BILDB		 878};
879
880static struct zl10353_config behold_x7_config = {
881 .demod_address = 0x1e>>1,
882 .if2 = 45600,
883 .no_tuner = 1,
884 .parallel_ts = 1,
885 .disable_i2c_gate_ctrl = 1,
886};
887
58ef4f92
HH		 888/* ==================================================================
889 * tda10086 based DVB-S cards, helper functions
890 */
891
e2ac28fa
IL		 892static struct tda10086_config flydvbs = {
893 .demod_address = 0x0e,
894 .invert = 0,
ea75baf4 895 .diseqc_tone = 0,
9a1b04e4
HH		 896 .xtal_freq = TDA10086_XTAL_16M,
897};
898
899static struct tda10086_config sd1878_4m = {
900 .demod_address = 0x0e,
901 .invert = 0,
902 .diseqc_tone = 0,
903 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL		 904};
905
1b1cee35
HH		 906/* ------------------------------------------------------------------
907 * special case: lnb supply is connected to the gated i2c
908 */
909
910static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
911{
912 int res = -EIO;
913 struct saa7134_dev *dev = fe->dvb->priv;
914 if (fe->ops.i2c_gate_ctrl) {
915 fe->ops.i2c_gate_ctrl(fe, 1);
916 if (dev->original_set_voltage)
917 res = dev->original_set_voltage(fe, voltage);
918 fe->ops.i2c_gate_ctrl(fe, 0);
919 }
920 return res;
921};
922
923static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
924{
925 int res = -EIO;
926 struct saa7134_dev *dev = fe->dvb->priv;
927 if (fe->ops.i2c_gate_ctrl) {
928 fe->ops.i2c_gate_ctrl(fe, 1);
929 if (dev->original_set_high_voltage)
930 res = dev->original_set_high_voltage(fe, arg);
931 fe->ops.i2c_gate_ctrl(fe, 0);
932 }
933 return res;
934};
935
5823b3a6
HH		 936static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
937{
938 struct saa7134_dev *dev = fe->dvb->priv;
939 u8 wbuf[2] = { 0x1f, 00 };
940 u8 rbuf;
941 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
942 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
943
944 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
945 return -EIO;
946 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
947 if (voltage == SEC_VOLTAGE_18)
948 wbuf[1] = rbuf | 0x10;
949 else
950 wbuf[1] = rbuf & 0xef;
951 msg[0].len = 2;
952 i2c_transfer(&dev->i2c_adap, msg, 1);
953 return 0;
954}
955
956static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
957{
958 struct saa7134_dev *dev = fe->dvb->priv;
959 wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__);
960 return -EIO;
961}
962
58ef4f92
HH		 963/* ==================================================================
964 * nxt200x based ATSC cards, helper functions
965 */
90e9df7f 966
3b64e8e2
MK		 967static struct nxt200x_config avertvhda180 = {
968 .demod_address = 0x0a,
3b64e8e2 969};
3e1410ad
AB		 970
971static struct nxt200x_config kworldatsc110 = {
972 .demod_address = 0x0a,
3e1410ad 973};
3b64e8e2 974
04574185
MS		 975/* ------------------------------------------------------------------ */
976
977static struct mt312_config avertv_a700_mt312 = {
978 .demod_address = 0x0e,
979 .voltage_inverted = 1,
980};
981
982static struct zl10036_config avertv_a700_tuner = {
983 .tuner_address = 0x60,
984};
985
ecfcfec8
IL		 986static struct mt312_config zl10313_compro_s350_config = {
987 .demod_address = 0x0e,
988};
989
3abdedd8
MK		 990static struct lgdt3305_config hcw_lgdt3305_config = {
991 .i2c_addr = 0x0e,
992 .mpeg_mode = LGDT3305_MPEG_SERIAL,
993 .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE,
994 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
995 .deny_i2c_rptr = 1,
996 .spectral_inversion = 1,
997 .qam_if_khz = 4000,
998 .vsb_if_khz = 3250,
999};
1000
1bc7f51c
MK		 1001static struct tda10048_config hcw_tda10048_config = {
1002 .demod_address = 0x10 >> 1,
1003 .output_mode = TDA10048_SERIAL_OUTPUT,
1004 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1005 .inversion = TDA10048_INVERSION_ON,
1006 .dtv6_if_freq_khz = TDA10048_IF_3300,
1007 .dtv7_if_freq_khz = TDA10048_IF_3500,
1008 .dtv8_if_freq_khz = TDA10048_IF_4000,
1009 .clk_freq_khz = TDA10048_CLK_16000,
1010 .disable_gate_access = 1,
1011};
1012
3abdedd8
MK		 1013static struct tda18271_std_map hauppauge_tda18271_std_map = {
1014 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
1015 .if_lvl = 1, .rfagc_top = 0x58, },
1016 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
1017 .if_lvl = 1, .rfagc_top = 0x58, },
1018};
1019
1020static struct tda18271_config hcw_tda18271_config = {
1021 .std_map = &hauppauge_tda18271_std_map,
1022 .gate = TDA18271_GATE_ANALOG,
1023 .config = 3,
542cb057 1024 .output_opt = TDA18271_OUTPUT_LT_OFF,
3abdedd8
MK		 1025};
1026
1027static struct tda829x_config tda829x_no_probe = {
1028 .probe_tuner = TDA829X_DONT_PROBE,
1029};
1030
6c119ff4
HV		 1031static struct tda10048_config zolid_tda10048_config = {
1032 .demod_address = 0x10 >> 1,
1033 .output_mode = TDA10048_PARALLEL_OUTPUT,
1034 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1035 .inversion = TDA10048_INVERSION_ON,
1036 .dtv6_if_freq_khz = TDA10048_IF_3300,
1037 .dtv7_if_freq_khz = TDA10048_IF_3500,
1038 .dtv8_if_freq_khz = TDA10048_IF_4000,
1039 .clk_freq_khz = TDA10048_CLK_16000,
1040 .disable_gate_access = 1,
1041};
1042
1043static struct tda18271_config zolid_tda18271_config = {
1044 .gate = TDA18271_GATE_ANALOG,
1045};
1046
184e769f
MK		 1047static struct tda10048_config dtv1000s_tda10048_config = {
1048 .demod_address = 0x10 >> 1,
1049 .output_mode = TDA10048_PARALLEL_OUTPUT,
1050 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1051 .inversion = TDA10048_INVERSION_ON,
1052 .dtv6_if_freq_khz = TDA10048_IF_3300,
1053 .dtv7_if_freq_khz = TDA10048_IF_3800,
1054 .dtv8_if_freq_khz = TDA10048_IF_4300,
1055 .clk_freq_khz = TDA10048_CLK_16000,
1056 .disable_gate_access = 1,
1057};
1058
1059static struct tda18271_std_map dtv1000s_tda18271_std_map = {
1060 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
1061 .if_lvl = 1, .rfagc_top = 0x37, },
1062 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
1063 .if_lvl = 1, .rfagc_top = 0x37, },
1064 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
1065 .if_lvl = 1, .rfagc_top = 0x37, },
1066};
1067
1068static struct tda18271_config dtv1000s_tda18271_config = {
1069 .std_map = &dtv1000s_tda18271_std_map,
1070 .gate = TDA18271_GATE_ANALOG,
1071};
1072
58ef4f92
HH		 1073/* ==================================================================
1074 * Core code
1075 */
1da177e4
LT		 1076
1077static int dvb_init(struct saa7134_dev *dev)
1078{
1c4f76ab 1079 int ret;
bc36a686 1080 int attach_xc3028 = 0;
363c35fc
ST		 1081 struct videobuf_dvb_frontend *fe0;
1082
f972e0bd
DB		 1083 /* FIXME: add support for multi-frontend */
1084 mutex_init(&dev->frontends.lock);
7bdf84fc 1085 INIT_LIST_HEAD(&dev->frontends.felist);
f972e0bd
DB		 1086
1087 printk(KERN_INFO "%s() allocating 1 frontend\n", __func__);
f3f741e7
DB		 1088 fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1);
1089 if (!fe0) {
f972e0bd
DB		 1090 printk(KERN_ERR "%s() failed to alloc\n", __func__);
1091 return -ENOMEM;
1092 }
1093
1da177e4
LT		 1094 /* init struct videobuf_dvb */
1095 dev->ts.nr_bufs = 32;
1096 dev->ts.nr_packets = 32*4;
363c35fc
ST		 1097 fe0->dvb.name = dev->name;
1098 videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops,
0705135e 1099 &dev->pci->dev, &dev->slock,
1da177e4
LT		 1100 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1101 V4L2_FIELD_ALTERNATE,
1102 sizeof(struct saa7134_buf),
1103 dev);
1104
1105 switch (dev->board) {
1106 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 1107 dprintk("pinnacle 300i dvb setup\n");
363c35fc 1108 fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1109 &dev->i2c_adap);
363c35fc
ST		 1110 if (fe0->dvb.frontend) {
1111 fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1112 }
1da177e4 1113 break;
a78d0bfa 1114 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1115 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 1116 dprintk("avertv 777 dvb setup\n");
363c35fc 1117 fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1118 &dev->i2c_adap);
363c35fc
ST		 1119 if (fe0->dvb.frontend) {
1120 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
fb147e97
MK		 1121 &dev->i2c_adap, 0x61,
1122 TUNER_PHILIPS_TD1316);
6b3ccab7 1123 }
a78d0bfa 1124 break;
95a2fdb6 1125 case SAA7134_BOARD_AVERMEDIA_A16D:
6e501a3f 1126 dprintk("AverMedia A16D dvb setup\n");
363c35fc 1127 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF		 1128 &avermedia_xc3028_mt352_dev,
1129 &dev->i2c_adap);
95a2fdb6
MCC		 1130 attach_xc3028 = 1;
1131 break;
1da177e4 1132 case SAA7134_BOARD_MD7134:
363c35fc 1133 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1134 &medion_cardbus,
1135 &dev->i2c_adap);
363c35fc
ST		 1136 if (fe0->dvb.frontend) {
1137 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK		 1138 &dev->i2c_adap, medion_cardbus.tuner_address,
1139 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 1140 }
1da177e4 1141 break;
86ddd96f 1142 case SAA7134_BOARD_PHILIPS_TOUGH:
363c35fc 1143 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1144 &philips_tu1216_60_config,
1145 &dev->i2c_adap);
363c35fc
ST		 1146 if (fe0->dvb.frontend) {
1147 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1148 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1149 }
86ddd96f
MCC		 1150 break;
1151 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1152 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC		 1153 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1154 &tda827x_cfg_0) < 0)
1155 goto dettach_frontend;
86ddd96f 1156 break;
2cf36ac4 1157 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1158 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
e3c6e1aa 1159 case SAA7134_BOARD_ASUS_EUROPA_HYBRID:
363c35fc 1160 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1161 &philips_europa_config,
1162 &dev->i2c_adap);
363c35fc
ST		 1163 if (fe0->dvb.frontend) {
1164 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1165 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1166 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1167 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1168 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1169 }
2cf36ac4
HH		 1170 break;
1171 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
363c35fc 1172 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1173 &philips_tu1216_61_config,
1174 &dev->i2c_adap);
363c35fc
ST		 1175 if (fe0->dvb.frontend) {
1176 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1177 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1178 }
2cf36ac4 1179 break;
b39423a9 1180 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC		 1181 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1182 &tda827x_cfg_2) < 0)
1183 goto dettach_frontend;
b39423a9 1184 break;
0e316ecf 1185 case SAA7134_BOARD_HAUPPAUGE_HVR1120:
1bc7f51c
MK		 1186 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1187 &hcw_tda10048_config,
1188 &dev->i2c_adap);
1189 if (fe0->dvb.frontend != NULL) {
1190 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1191 &dev->i2c_adap, 0x4b,
1192 &tda829x_no_probe);
1193 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1194 0x60, &dev->i2c_adap,
1195 &hcw_tda18271_config);
1196 }
1197 break;
90e9df7f 1198 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC		 1199 if (configure_tda827x_fe(dev, &philips_tiger_config,
1200 &tda827x_cfg_0) < 0)
1201 goto dettach_frontend;
587d2fd7
HH		 1202 break;
1203 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC		 1204 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1205 &tda827x_cfg_1) < 0)
1206 goto dettach_frontend;
90e9df7f 1207 break;
c6e53daf 1208 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC		 1209 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1210 &tda827x_cfg_1) < 0)
1211 goto dettach_frontend;
c6e53daf 1212 break;
b5f05064 1213 case SAA7134_BOARD_HAUPPAUGE_HVR1150:
3abdedd8
MK		 1214 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
1215 &hcw_lgdt3305_config,
1216 &dev->i2c_adap);
1217 if (fe0->dvb.frontend) {
1218 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1219 &dev->i2c_adap, 0x4b,
1220 &tda829x_no_probe);
1221 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1222 0x60, &dev->i2c_adap,
1223 &hcw_tda18271_config);
1224 }
1225 break;
d4b0aba4 1226 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC		 1227 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1228 &tda827x_cfg_0) < 0)
1229 goto dettach_frontend;
d4b0aba4 1230 break;
3d8466ec 1231 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC		 1232 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1233 &tda827x_cfg_0) < 0)
1234 goto dettach_frontend;
3d8466ec 1235 break;
92abe9ee 1236 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC		 1237 if (!use_frontend) { /* terrestrial */
1238 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1239 &tda827x_cfg_0) < 0)
1240 goto dettach_frontend;
7bff4b4d 1241 } else { /* satellite */
363c35fc
ST		 1242 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1243 if (fe0->dvb.frontend) {
1244 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63,
1f683cd8 1245 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1246 wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__);
d557dab5 1247 goto dettach_frontend;
1f683cd8 1248 }
363c35fc 1249 if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap,
1f683cd8 1250 0x08, 0, 0) == NULL) {
5823b3a6 1251 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__);
d557dab5 1252 goto dettach_frontend;
1f683cd8
NS		 1253 }
1254 }
6b3ccab7 1255 }
420f32fe 1256 break;
df42eaf2 1257 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1258 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
363c35fc 1259 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1260 &ads_tech_duo_config,
1261 &dev->i2c_adap);
363c35fc
ST		 1262 if (fe0->dvb.frontend) {
1263 if (dvb_attach(tda827x_attach,fe0->dvb.frontend,
7bff4b4d
HH		 1264 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1265 &ads_duo_cfg) == NULL) {
cf3c34c8 1266 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d 1267 ads_tech_duo_config.tuner_address);
d557dab5 1268 goto dettach_frontend;
ede2200d 1269 }
bc36ec74
MCC		 1270 } else
1271 wprintk("failed to attach tda10046\n");
df42eaf2 1272 break;
3dfb729f 1273 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC		 1274 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1275 &tda827x_cfg_0) < 0)
1276 goto dettach_frontend;
d95b8942 1277 break;
5eda227f 1278 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1279 if (!use_frontend) { /* terrestrial */
d557dab5
MCC		 1280 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1281 &tda827x_cfg_0) < 0)
1282 goto dettach_frontend;
4b1431ca 1283 } else { /* satellite */
363c35fc 1284 fe0->dvb.frontend = dvb_attach(tda10086_attach,
4b1431ca 1285 &flydvbs, &dev->i2c_adap);
363c35fc
ST		 1286 if (fe0->dvb.frontend) {
1287 struct dvb_frontend *fe = fe0->dvb.frontend;
5823b3a6
HH		 1288 u8 dev_id = dev->eedata[2];
1289 u8 data = 0xc4;
1290 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1291
363c35fc 1292 if (dvb_attach(tda826x_attach, fe0->dvb.frontend,
d557dab5 1293 0x60, &dev->i2c_adap, 0) == NULL) {
4b1431ca 1294 wprintk("%s: Medion Quadro, no tda826x "
5823b3a6 1295 "found !\n", __func__);
d557dab5
MCC		 1296 goto dettach_frontend;
1297 }
5823b3a6
HH		 1298 if (dev_id != 0x08) {
1299 /* we need to open the i2c gate (we know it exists) */
1300 fe->ops.i2c_gate_ctrl(fe, 1);
1301 if (dvb_attach(isl6405_attach, fe,
d557dab5 1302 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6
HH		 1303 wprintk("%s: Medion Quadro, no ISL6405 "
1304 "found !\n", __func__);
d557dab5
MCC		 1305 goto dettach_frontend;
1306 }
e9c1ac9d
HH		 1307 if (dev_id == 0x07) {
1308 /* fire up the 2nd section of the LNB supply since
1309 we can't do this from the other section */
1310 msg.buf = &data;
1311 i2c_transfer(&dev->i2c_adap, &msg, 1);
1312 }
5823b3a6
HH		 1313 fe->ops.i2c_gate_ctrl(fe, 0);
1314 dev->original_set_voltage = fe->ops.set_voltage;
1315 fe->ops.set_voltage = md8800_set_voltage;
1316 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1317 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1318 } else {
1319 fe->ops.set_voltage = md8800_set_voltage2;
1320 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1321 }
4b1431ca
HH		 1322 }
1323 }
5eda227f 1324 break;
3b64e8e2 1325 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
363c35fc 1326 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
f7b54b10 1327 &dev->i2c_adap);
363c35fc
ST		 1328 if (fe0->dvb.frontend)
1329 dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61,
47a9991e 1330 NULL, DVB_PLL_TDHU2);
3b64e8e2 1331 break;
f689d908 1332 case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI:
3e1410ad 1333 case SAA7134_BOARD_KWORLD_ATSC110:
363c35fc 1334 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
f7b54b10 1335 &dev->i2c_adap);
363c35fc
ST		 1336 if (fe0->dvb.frontend)
1337 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
62ff817a
MK		 1338 &dev->i2c_adap, 0x61,
1339 TUNER_PHILIPS_TUV1236D);
3e1410ad 1340 break;
e2ac28fa 1341 case SAA7134_BOARD_FLYDVBS_LR300:
363c35fc 1342 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
f7b54b10 1343 &dev->i2c_adap);
363c35fc
ST		 1344 if (fe0->dvb.frontend) {
1345 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
f7b54b10 1346 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1347 wprintk("%s: No tda826x found!\n", __func__);
d557dab5 1348 goto dettach_frontend;
e2ac28fa 1349 }
363c35fc 1350 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
f7b54b10 1351 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6 1352 wprintk("%s: No ISL6421 found!\n", __func__);
d557dab5 1353 goto dettach_frontend;
e2ac28fa
IL		 1354 }
1355 }
1356 break;
cf146ca4 1357 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
363c35fc 1358 fe0->dvb.frontend = dvb_attach(tda10046_attach,
0e8f4cc5
MS		 1359 &medion_cardbus,
1360 &dev->i2c_adap);
363c35fc
ST		 1361 if (fe0->dvb.frontend) {
1362 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1363 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1364
363c35fc 1365 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK		 1366 &dev->i2c_adap, medion_cardbus.tuner_address,
1367 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH		 1368 }
1369 break;
cbb94521 1370 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
363c35fc 1371 fe0->dvb.frontend = dvb_attach(tda10046_attach,
cbb94521
HH		 1372 &philips_europa_config,
1373 &dev->i2c_adap);
363c35fc
ST		 1374 if (fe0->dvb.frontend) {
1375 fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1376 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
cbb94521
HH		 1377 }
1378 break;
550a9a5e 1379 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC		 1380 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1381 &tda827x_cfg_0) < 0)
1382 goto dettach_frontend;
9de271e6
MK		 1383 break;
1384 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC		 1385 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1386 &tda827x_cfg_0) < 0)
1387 goto dettach_frontend;
58ef4f92
HH		 1388 break;
1389 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC		 1390 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1391 &tda827x_cfg_2) < 0)
1392 goto dettach_frontend;
550a9a5e 1393 break;
e06cea4c 1394 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC		 1395 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1396 &tda827x_cfg_2) < 0)
1397 goto dettach_frontend;
e06cea4c 1398 break;
f3eec0c0 1399 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC		 1400 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1401 &tda827x_cfg_2) < 0)
1402 goto dettach_frontend;
e06cea4c 1403 break;
d90d9f5a 1404 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC		 1405 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1406 &tda827x_cfg_0) < 0)
1407 goto dettach_frontend;
d90d9f5a 1408 break;
4ba24373 1409 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC		 1410 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1411 &tda827x_cfg_2_sw42) < 0)
1412 goto dettach_frontend;
4ba24373 1413 break;
6ab465a8 1414 case SAA7134_BOARD_PHILIPS_SNAKE:
363c35fc 1415 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
6ab465a8 1416 &dev->i2c_adap);
363c35fc
ST		 1417 if (fe0->dvb.frontend) {
1418 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
d557dab5 1419 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1420 wprintk("%s: No tda826x found!\n", __func__);
d557dab5
MCC		 1421 goto dettach_frontend;
1422 }
363c35fc 1423 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
d557dab5 1424 &dev->i2c_adap, 0, 0) == NULL) {
5823b3a6 1425 wprintk("%s: No lnbp21 found!\n", __func__);
d557dab5
MCC		 1426 goto dettach_frontend;
1427 }
6ab465a8
HH		 1428 }
1429 break;
7b5b3f17 1430 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC		 1431 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1432 &tda827x_cfg_0) < 0)
1433 goto dettach_frontend;
7b5b3f17 1434 break;
6a6179b6 1435 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC		 1436 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1437 &tda827x_cfg_2) < 0)
1438 goto dettach_frontend;
6a6179b6 1439 break;
bc36a686 1440 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
6e501a3f
TF		 1441 dprintk("AverMedia E506R dvb setup\n");
1442 saa7134_set_gpio(dev, 25, 0);
1443 msleep(10);
1444 saa7134_set_gpio(dev, 25, 1);
363c35fc 1445 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF		 1446 &avermedia_xc3028_mt352_dev,
1447 &dev->i2c_adap);
bc36a686 1448 attach_xc3028 = 1;
e2fc00c2 1449 break;
637afdb5 1450 case SAA7134_BOARD_MD7134_BRIDGE_2:
363c35fc 1451 fe0->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1452 &sd1878_4m, &dev->i2c_adap);
363c35fc 1453 if (fe0->dvb.frontend) {
637afdb5 1454 struct dvb_frontend *fe;
363c35fc 1455 if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
d557dab5 1456 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
637afdb5 1457 wprintk("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1458 "found !\n", __func__);
d557dab5
MCC		 1459 goto dettach_frontend;
1460 }
637afdb5 1461 /* we need to open the i2c gate (we know it exists) */
363c35fc 1462 fe = fe0->dvb.frontend;
637afdb5
HH		 1463 fe->ops.i2c_gate_ctrl(fe, 1);
1464 if (dvb_attach(isl6405_attach, fe,
d557dab5 1465 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
637afdb5 1466 wprintk("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1467 "found !\n", __func__);
d557dab5
MCC		 1468 goto dettach_frontend;
1469 }
637afdb5
HH		 1470 fe->ops.i2c_gate_ctrl(fe, 0);
1471 dev->original_set_voltage = fe->ops.set_voltage;
1472 fe->ops.set_voltage = md8800_set_voltage;
1473 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1474 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1475 }
1476 break;
e2fc00c2
MP		 1477 case SAA7134_BOARD_AVERMEDIA_M103:
1478 saa7134_set_gpio(dev, 25, 0);
1479 msleep(10);
1480 saa7134_set_gpio(dev, 25, 1);
363c35fc 1481 fe0->dvb.frontend = dvb_attach(mt352_attach,
e2fc00c2
MP		 1482 &avermedia_xc3028_mt352_dev,
1483 &dev->i2c_adap);
1484 attach_xc3028 = 1;
1485 break;
301e9d64 1486 case SAA7134_BOARD_ASUSTeK_TIGER_3IN1:
1487 if (!use_frontend) { /* terrestrial */
1488 if (configure_tda827x_fe(dev, &asus_tiger_3in1_config,
1489 &tda827x_cfg_2) < 0)
1490 goto dettach_frontend;
1491 } else { /* satellite */
363c35fc 1492 fe0->dvb.frontend = dvb_attach(tda10086_attach,
301e9d64 1493 &flydvbs, &dev->i2c_adap);
363c35fc 1494 if (fe0->dvb.frontend) {
301e9d64 1495 if (dvb_attach(tda826x_attach,
363c35fc 1496 fe0->dvb.frontend, 0x60,
301e9d64 1497 &dev->i2c_adap, 0) == NULL) {
1498 wprintk("%s: Asus Tiger 3in1, no "
1499 "tda826x found!\n", __func__);
1500 goto dettach_frontend;
1501 }
363c35fc 1502 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
301e9d64 1503 &dev->i2c_adap, 0, 0) == NULL) {
1504 wprintk("%s: Asus Tiger 3in1, no lnbp21"
1505 " found!\n", __func__);
1506 goto dettach_frontend;
1507 }
1508 }
1509 }
1510 break;
028165a3
HP		 1511 case SAA7134_BOARD_ASUSTeK_TIGER:
1512 if (configure_tda827x_fe(dev, &philips_tiger_config,
1513 &tda827x_cfg_0) < 0)
1514 goto dettach_frontend;
1515 break;
47aeba5a 1516 case SAA7134_BOARD_BEHOLD_H6:
b0c4be8c 1517 fe0->dvb.frontend = dvb_attach(zl10353_attach,
47aeba5a
DB		 1518 &behold_h6_config,
1519 &dev->i2c_adap);
b0c4be8c
MCC		 1520 if (fe0->dvb.frontend) {
1521 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
47aeba5a 1522 &dev->i2c_adap, 0x61,
4786dd65 1523 TUNER_PHILIPS_FMD1216MEX_MK3);
47aeba5a 1524 }
04574185 1525 break;
2930992c
BILDB		 1526 case SAA7134_BOARD_BEHOLD_X7:
1527 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1528 &behold_x7_config,
1529 &dev->i2c_adap);
1530 if (fe0->dvb.frontend) {
1531 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1532 &dev->i2c_adap, &behold_x7_tunerconfig);
1533 }
1534 break;
04574185
MS		 1535 case SAA7134_BOARD_AVERMEDIA_A700_PRO:
1536 case SAA7134_BOARD_AVERMEDIA_A700_HYBRID:
1537 /* Zarlink ZL10313 */
1538 fe0->dvb.frontend = dvb_attach(mt312_attach,
1539 &avertv_a700_mt312, &dev->i2c_adap);
1540 if (fe0->dvb.frontend) {
1541 if (dvb_attach(zl10036_attach, fe0->dvb.frontend,
1542 &avertv_a700_tuner, &dev->i2c_adap) == NULL) {
1543 wprintk("%s: No zl10036 found!\n",
1544 __func__);
1545 }
1546 }
ecfcfec8
IL		 1547 break;
1548 case SAA7134_BOARD_VIDEOMATE_S350:
1549 fe0->dvb.frontend = dvb_attach(mt312_attach,
1550 &zl10313_compro_s350_config, &dev->i2c_adap);
1551 if (fe0->dvb.frontend)
1552 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1553 0x60, &dev->i2c_adap) == NULL)
1554 wprintk("%s: No zl10039 found!\n",
1555 __func__);
1556
6c119ff4
HV		 1557 break;
1558 case SAA7134_BOARD_ZOLID_HYBRID_PCI:
1559 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1560 &zolid_tda10048_config,
1561 &dev->i2c_adap);
1562 if (fe0->dvb.frontend != NULL) {
1563 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1564 &dev->i2c_adap, 0x4b,
1565 &tda829x_no_probe);
1566 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1567 0x60, &dev->i2c_adap,
1568 &zolid_tda18271_config);
1569 }
47aeba5a 1570 break;
184e769f
MK		 1571 case SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S:
1572 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1573 &dtv1000s_tda10048_config,
1574 &dev->i2c_adap);
1575 if (fe0->dvb.frontend != NULL) {
1576 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1577 &dev->i2c_adap, 0x4b,
1578 &tda829x_no_probe);
1579 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1580 0x60, &dev->i2c_adap,
1581 &dtv1000s_tda18271_config);
1582 }
1583 break;
1da177e4 1584 default:
cf3c34c8 1585 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT		 1586 break;
1587 }
1588
bc36a686
MCC		 1589 if (attach_xc3028) {
1590 struct dvb_frontend *fe;
1591 struct xc2028_config cfg = {
1592 .i2c_adap = &dev->i2c_adap,
1593 .i2c_addr = 0x61,
bc36a686 1594 };
95a2fdb6 1595
363c35fc 1596 if (!fe0->dvb.frontend)
f3f741e7 1597 goto dettach_frontend;
95a2fdb6 1598
363c35fc 1599 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
bc36a686
MCC		 1600 if (!fe) {
1601 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
1602 dev->name);
d557dab5 1603 goto dettach_frontend;
bc36a686
MCC		 1604 }
1605 }
1606
363c35fc 1607 if (NULL == fe0->dvb.frontend) {
cf3c34c8 1608 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
f3f741e7 1609 goto dettach_frontend;
1da177e4 1610 }
d7cba043 1611 /* define general-purpose callback pointer */
363c35fc 1612 fe0->dvb.frontend->callback = saa7134_tuner_callback;
1da177e4
LT		 1613
1614 /* register everything else */
363c35fc 1615 ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
9133aee0 1616 &dev->pci->dev, adapter_nr, 0, NULL);
1c4f76ab
HH		 1617
1618 /* this sequence is necessary to make the tda1004x load its firmware
1619 * and to enter analog mode of hybrid boards
1620 */
1621 if (!ret) {
363c35fc
ST		 1622 if (fe0->dvb.frontend->ops.init)
1623 fe0->dvb.frontend->ops.init(fe0->dvb.frontend);
1624 if (fe0->dvb.frontend->ops.sleep)
1625 fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend);
1626 if (fe0->dvb.frontend->ops.tuner_ops.sleep)
1627 fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend);
1c4f76ab
HH		 1628 }
1629 return ret;
d557dab5
MCC		 1630
1631dettach_frontend:
f3f741e7
DB		 1632 videobuf_dvb_dealloc_frontends(&dev->frontends);
1633 return -EINVAL;
1da177e4
LT		 1634}
1635
1636static int dvb_fini(struct saa7134_dev *dev)
1637{
363c35fc
ST		 1638 struct videobuf_dvb_frontend *fe0;
1639
1640 /* Get the first frontend */
1641 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
1642 if (!fe0)
1643 return -EINVAL;
1644
7f171123
MCC		 1645 /* FIXME: I suspect that this code is bogus, since the entry for
1646 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1647 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1648 */
1649 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1650 struct v4l2_priv_tun_config tda9887_cfg;
1651 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1652
1653 tda9887_cfg.tuner = TUNER_TDA9887;
1654 tda9887_cfg.priv = &on;
1da177e4 1655
1da177e4 1656 /* otherwise we don't detect the tuner on next insmod */
fac6986c 1657 saa_call_all(dev, tuner, s_config, &tda9887_cfg);
5823b3a6 1658 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1659 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH		 1660 /* turn off the 2nd lnb supply */
1661 u8 data = 0x80;
1662 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1663 struct dvb_frontend *fe;
363c35fc 1664 fe = fe0->dvb.frontend;
5823b3a6
HH		 1665 if (fe->ops.i2c_gate_ctrl) {
1666 fe->ops.i2c_gate_ctrl(fe, 1);
1667 i2c_transfer(&dev->i2c_adap, &msg, 1);
1668 fe->ops.i2c_gate_ctrl(fe, 0);
1669 }
1670 }
7f171123 1671 }
f3f741e7 1672 videobuf_dvb_unregister_bus(&dev->frontends);
1da177e4
LT		 1673 return 0;
1674}
1675
1676static struct saa7134_mpeg_ops dvb_ops = {
1677 .type = SAA7134_MPEG_DVB,
1678 .init = dvb_init,
1679 .fini = dvb_fini,
1680};
1681
1682static int __init dvb_register(void)
1683{
1684 return saa7134_ts_register(&dvb_ops);
1685}
1686
1687static void __exit dvb_unregister(void)
1688{
1689 saa7134_ts_unregister(&dvb_ops);
1690}
1691
1692module_init(dvb_register);
1693module_exit(dvb_unregister);
1694
1695/* ------------------------------------------------------------------ */
1696/*
1697 * Local variables:
1698 * c-basic-offset: 8
1699 * End:
1700 */
Linux 6.x block layer and io_uring tree(s)