V4L/DVB (13080): saa7134: add support for the digital side of the Behold X7
[linux-2.6-block.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
5823b3a6 36#include <dvb_frontend.h>
1da177e4 37
1f10c7af
AQ
38#include "mt352.h"
39#include "mt352_priv.h" /* FIXME */
40#include "tda1004x.h"
41#include "nxt200x.h"
bc36a686 42#include "tuner-xc2028.h"
2930992c 43#include "xc5000.h"
1da177e4 44
e2ac28fa
IL
45#include "tda10086.h"
46#include "tda826x.h"
8ce47dad 47#include "tda827x.h"
e2ac28fa 48#include "isl6421.h"
4b1431ca 49#include "isl6405.h"
6ab465a8 50#include "lnbp21.h"
cb89cd33 51#include "tuner-simple.h"
1bc7f51c 52#include "tda10048.h"
3abdedd8
MK
53#include "tda18271.h"
54#include "lgdt3305.h"
55#include "tda8290.h"
8ce47dad 56
47aeba5a
DB
57#include "zl10353.h"
58
04574185 59#include "zl10036.h"
ecfcfec8 60#include "zl10039.h"
04574185
MS
61#include "mt312.h"
62
1da177e4
LT
63MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
64MODULE_LICENSE("GPL");
65
ff699e6b 66static unsigned int antenna_pwr;
86ddd96f 67
1da177e4
LT
68module_param(antenna_pwr, int, 0444);
69MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
70
ff699e6b 71static int use_frontend;
b331daa0
SB
72module_param(use_frontend, int, 0644);
73MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 74
ff699e6b 75static int debug;
58ef4f92
HH
76module_param(debug, int, 0644);
77MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
78
78e92006
JG
79DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
80
cf3c34c8
TP
81#define dprintk(fmt, arg...) do { if (debug) \
82 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
83
84/* Print a warning */
85#define wprintk(fmt, arg...) \
86 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH
87
88/* ------------------------------------------------------------------
89 * mt352 based DVB-T cards
90 */
91
1da177e4
LT
92static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
93{
94 u32 ok;
95
96 if (!on) {
97 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
98 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
99 return 0;
100 }
101
102 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
103 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
104 udelay(10);
105
106 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
107 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
108 udelay(10);
109 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
110 udelay(10);
111 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
5823b3a6 112 dprintk("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT
113
114 if (!ok)
115 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
116 return ok;
117}
118
119static int mt352_pinnacle_init(struct dvb_frontend* fe)
120{
121 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
122 static u8 reset [] = { RESET, 0x80 };
123 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
124 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
125 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
126 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
127 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
128 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
129 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
130 struct saa7134_dev *dev= fe->dvb->priv;
131
5823b3a6 132 dprintk("%s called\n", __func__);
1da177e4
LT
133
134 mt352_write(fe, clock_config, sizeof(clock_config));
135 udelay(200);
136 mt352_write(fe, reset, sizeof(reset));
137 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
138 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
139 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
140 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
141
142 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
143 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
144 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 145
1da177e4
LT
146 return 0;
147}
148
a78d0bfa
JAR
149static int mt352_aver777_init(struct dvb_frontend* fe)
150{
151 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
152 static u8 reset [] = { RESET, 0x80 };
153 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
154 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
155 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
156
157 mt352_write(fe, clock_config, sizeof(clock_config));
158 udelay(200);
159 mt352_write(fe, reset, sizeof(reset));
160 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
161 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
162 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
163
164 return 0;
165}
166
6e501a3f 167static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 168{
6e501a3f
TF
169 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
170 static u8 reset [] = { RESET, 0x80 };
171 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
172 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC
173 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
174
175 mt352_write(fe, clock_config, sizeof(clock_config));
176 udelay(200);
177 mt352_write(fe, reset, sizeof(reset));
178 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
179 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
180 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC
181 return 0;
182}
183
0463f12c
AQ
184static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
185 struct dvb_frontend_parameters* params)
1da177e4 186{
df8cf706
HH
187 u8 off[] = { 0x00, 0xf1};
188 u8 on[] = { 0x00, 0x71};
189 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
190
1da177e4
LT
191 struct saa7134_dev *dev = fe->dvb->priv;
192 struct v4l2_frequency f;
193
194 /* set frequency (mt2050) */
195 f.tuner = 0;
196 f.type = V4L2_TUNER_DIGITAL_TV;
197 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB
198 if (fe->ops.i2c_gate_ctrl)
199 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 200 i2c_transfer(&dev->i2c_adap, &msg, 1);
fac6986c 201 saa_call_all(dev, tuner, s_frequency, &f);
df8cf706 202 msg.buf = on;
dea74869
PB
203 if (fe->ops.i2c_gate_ctrl)
204 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 205 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
206
207 pinnacle_antenna_pwr(dev, antenna_pwr);
208
209 /* mt352 setup */
0463f12c 210 return mt352_pinnacle_init(fe);
1da177e4
LT
211}
212
213static struct mt352_config pinnacle_300i = {
214 .demod_address = 0x3c >> 1,
215 .adc_clock = 20333,
216 .if2 = 36150,
217 .no_tuner = 1,
218 .demod_init = mt352_pinnacle_init,
1da177e4 219};
a78d0bfa
JAR
220
221static struct mt352_config avermedia_777 = {
222 .demod_address = 0xf,
223 .demod_init = mt352_aver777_init,
a78d0bfa 224};
1da177e4 225
6e501a3f 226static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC
227 .demod_address = (0x1e >> 1),
228 .no_tuner = 1,
6e501a3f 229 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC
230};
231
58ef4f92
HH
232/* ==================================================================
233 * tda1004x based DVB-T cards, helper functions
234 */
235
236static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
237 const struct firmware **fw, char *name)
1da177e4
LT
238{
239 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
240 return request_firmware(fw, name, &dev->pci->dev);
241}
242
58ef4f92
HH
243/* ------------------------------------------------------------------
244 * these tuners are tu1216, td1316(a)
245 */
246
247static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
248{
249 struct saa7134_dev *dev = fe->dvb->priv;
250 struct tda1004x_state *state = fe->demodulator_priv;
251 u8 addr = state->config->tuner_address;
86ddd96f 252 u8 tuner_buf[4];
2cf36ac4 253 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
254 sizeof(tuner_buf) };
255 int tuner_frequency = 0;
256 u8 band, cp, filter;
257
258 /* determine charge pump */
259 tuner_frequency = params->frequency + 36166000;
260 if (tuner_frequency < 87000000)
261 return -EINVAL;
262 else if (tuner_frequency < 130000000)
263 cp = 3;
264 else if (tuner_frequency < 160000000)
265 cp = 5;
266 else if (tuner_frequency < 200000000)
267 cp = 6;
268 else if (tuner_frequency < 290000000)
269 cp = 3;
270 else if (tuner_frequency < 420000000)
271 cp = 5;
272 else if (tuner_frequency < 480000000)
273 cp = 6;
274 else if (tuner_frequency < 620000000)
275 cp = 3;
276 else if (tuner_frequency < 830000000)
277 cp = 5;
278 else if (tuner_frequency < 895000000)
279 cp = 7;
280 else
281 return -EINVAL;
282
283 /* determine band */
284 if (params->frequency < 49000000)
285 return -EINVAL;
286 else if (params->frequency < 161000000)
287 band = 1;
288 else if (params->frequency < 444000000)
289 band = 2;
290 else if (params->frequency < 861000000)
291 band = 4;
292 else
293 return -EINVAL;
294
295 /* setup PLL filter */
296 switch (params->u.ofdm.bandwidth) {
297 case BANDWIDTH_6_MHZ:
298 filter = 0;
299 break;
300
301 case BANDWIDTH_7_MHZ:
302 filter = 0;
303 break;
304
305 case BANDWIDTH_8_MHZ:
306 filter = 1;
307 break;
1da177e4 308
86ddd96f
MCC
309 default:
310 return -EINVAL;
311 }
312
313 /* calculate divisor
314 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 315 */
86ddd96f
MCC
316 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
317
318 /* setup tuner buffer */
319 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
320 tuner_buf[1] = tuner_frequency & 0xff;
321 tuner_buf[2] = 0xca;
322 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
323
dea74869
PB
324 if (fe->ops.i2c_gate_ctrl)
325 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 326 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP
327 wprintk("could not write to tuner at addr: 0x%02x\n",
328 addr << 1);
86ddd96f 329 return -EIO;
58ef4f92 330 }
2cf36ac4
HH
331 msleep(1);
332 return 0;
333}
334
58ef4f92 335static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH
336{
337 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
338 struct tda1004x_state *state = fe->demodulator_priv;
339 u8 addr = state->config->tuner_address;
2cf36ac4
HH
340 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
341 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 342
2cf36ac4 343 /* setup PLL configuration */
dea74869
PB
344 if (fe->ops.i2c_gate_ctrl)
345 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
346 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
347 return -EIO;
86ddd96f 348 msleep(1);
2cf36ac4 349
1da177e4
LT
350 return 0;
351}
352
2cf36ac4
HH
353/* ------------------------------------------------------------------ */
354
2cf36ac4 355static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
356 .demod_address = 0x8,
357 .invert = 1,
2cf36ac4 358 .invert_oclk = 0,
86ddd96f
MCC
359 .xtal_freq = TDA10046_XTAL_4M,
360 .agc_config = TDA10046_AGC_DEFAULT,
361 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
362 .tuner_address = 0x60,
363 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
364};
365
2cf36ac4
HH
366static struct tda1004x_config philips_tu1216_61_config = {
367
368 .demod_address = 0x8,
369 .invert = 1,
370 .invert_oclk = 0,
371 .xtal_freq = TDA10046_XTAL_4M,
372 .agc_config = TDA10046_AGC_DEFAULT,
373 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
374 .tuner_address = 0x61,
375 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
376};
377
378/* ------------------------------------------------------------------ */
379
cbb94521 380static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
381{
382 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
383 struct tda1004x_state *state = fe->demodulator_priv;
384 u8 addr = state->config->tuner_address;
2cf36ac4 385 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 386 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH
387
388 /* setup PLL configuration */
dea74869
PB
389 if (fe->ops.i2c_gate_ctrl)
390 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
391 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
392 return -EIO;
2cf36ac4
HH
393 return 0;
394}
395
a79ddae9 396static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 397{
58ef4f92
HH
398 return philips_tda6651_pll_set(fe, params);
399}
400
401static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
402{
403 struct saa7134_dev *dev = fe->dvb->priv;
404 struct tda1004x_state *state = fe->demodulator_priv;
405 u8 addr = state->config->tuner_address;
406 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
407 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
408
409 /* switch the tuner to analog mode */
410 if (fe->ops.i2c_gate_ctrl)
411 fe->ops.i2c_gate_ctrl(fe, 1);
412 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
413 return -EIO;
414 return 0;
2cf36ac4
HH
415}
416
58ef4f92
HH
417/* ------------------------------------------------------------------ */
418
cbb94521
HH
419static int philips_europa_tuner_init(struct dvb_frontend *fe)
420{
421 struct saa7134_dev *dev = fe->dvb->priv;
422 static u8 msg[] = { 0x00, 0x40};
423 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
424
425
426 if (philips_td1316_tuner_init(fe))
427 return -EIO;
428 msleep(1);
429 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
430 return -EIO;
431
432 return 0;
433}
434
a79ddae9 435static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
436{
437 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 438
58ef4f92
HH
439 static u8 msg[] = { 0x00, 0x14 };
440 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
441
442 if (philips_td1316_tuner_sleep(fe))
443 return -EIO;
2cf36ac4
HH
444
445 /* switch the board to analog mode */
dea74869
PB
446 if (fe->ops.i2c_gate_ctrl)
447 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 448 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
449 return 0;
450}
451
452static int philips_europa_demod_sleep(struct dvb_frontend *fe)
453{
454 struct saa7134_dev *dev = fe->dvb->priv;
455
456 if (dev->original_demod_sleep)
457 dev->original_demod_sleep(fe);
dea74869 458 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 459 return 0;
2cf36ac4
HH
460}
461
462static struct tda1004x_config philips_europa_config = {
463
464 .demod_address = 0x8,
465 .invert = 0,
466 .invert_oclk = 0,
467 .xtal_freq = TDA10046_XTAL_4M,
468 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
469 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH
470 .tuner_address = 0x61,
471 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
472};
473
408b664a 474static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
475 .demod_address = 0x08,
476 .invert = 1,
477 .invert_oclk = 0,
478 .xtal_freq = TDA10046_XTAL_16M,
479 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
480 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH
481 .tuner_address = 0x61,
482 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
483};
484
58ef4f92
HH
485/* ------------------------------------------------------------------
486 * tda 1004x based cards with philips silicon tuner
487 */
488
58ef4f92
HH
489static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
490{
58ef4f92
HH
491 struct tda1004x_state *state = fe->demodulator_priv;
492
493 u8 addr = state->config->i2c_gate;
494 static u8 tda8290_close[] = { 0x21, 0xc0};
495 static u8 tda8290_open[] = { 0x21, 0x80};
496 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
497 if (enable) {
498 tda8290_msg.buf = tda8290_close;
499 } else {
500 tda8290_msg.buf = tda8290_open;
501 }
06be3035 502 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP
503 struct saa7134_dev *dev = fe->dvb->priv;
504 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH
505 return -EIO;
506 }
507 msleep(20);
508 return 0;
509}
510
58ef4f92 511static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 512{
90e9df7f 513 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 514 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 515
58ef4f92
HH
516 switch (state->config->antenna_switch) {
517 case 0: break;
518 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
519 saa7134_set_gpio(dev, 21, 0);
520 break;
521 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
522 saa7134_set_gpio(dev, 21, 1);
523 break;
587d2fd7 524 }
587d2fd7
HH
525 return 0;
526}
527
58ef4f92 528static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 529{
58ef4f92
HH
530 struct saa7134_dev *dev = fe->dvb->priv;
531 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 532
58ef4f92
HH
533 switch (state->config->antenna_switch) {
534 case 0: break;
535 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
536 saa7134_set_gpio(dev, 21, 1);
537 break;
538 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
539 saa7134_set_gpio(dev, 21, 0);
540 break;
541 }
587d2fd7 542 return 0;
2d6b5f62 543}
90e9df7f 544
d557dab5
MCC
545static int configure_tda827x_fe(struct saa7134_dev *dev,
546 struct tda1004x_config *cdec_conf,
547 struct tda827x_config *tuner_conf)
90e9df7f 548{
363c35fc
ST
549 struct videobuf_dvb_frontend *fe0;
550
92abe9ee
DB
551 /* Get the first frontend */
552 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
363c35fc
ST
553
554 fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
555 if (fe0->dvb.frontend) {
7bff4b4d 556 if (cdec_conf->i2c_gate)
363c35fc
ST
557 fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
558 if (dvb_attach(tda827x_attach, fe0->dvb.frontend,
d557dab5
MCC
559 cdec_conf->tuner_address,
560 &dev->i2c_adap, tuner_conf))
561 return 0;
562
563 wprintk("no tda827x tuner found at addr: %02x\n",
7bff4b4d 564 cdec_conf->tuner_address);
58ef4f92 565 }
d557dab5 566 return -EINVAL;
90e9df7f
HH
567}
568
58ef4f92 569/* ------------------------------------------------------------------ */
261f5081 570
7bff4b4d 571static struct tda827x_config tda827x_cfg_0 = {
7bff4b4d
HH
572 .init = philips_tda827x_tuner_init,
573 .sleep = philips_tda827x_tuner_sleep,
574 .config = 0,
575 .switch_addr = 0
576};
577
578static struct tda827x_config tda827x_cfg_1 = {
7bff4b4d
HH
579 .init = philips_tda827x_tuner_init,
580 .sleep = philips_tda827x_tuner_sleep,
581 .config = 1,
582 .switch_addr = 0x4b
583};
584
585static struct tda827x_config tda827x_cfg_2 = {
7bff4b4d
HH
586 .init = philips_tda827x_tuner_init,
587 .sleep = philips_tda827x_tuner_sleep,
588 .config = 2,
589 .switch_addr = 0x4b
590};
591
592static struct tda827x_config tda827x_cfg_2_sw42 = {
7bff4b4d
HH
593 .init = philips_tda827x_tuner_init,
594 .sleep = philips_tda827x_tuner_sleep,
595 .config = 2,
596 .switch_addr = 0x42
597};
598
599/* ------------------------------------------------------------------ */
600
58ef4f92 601static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH
602 .demod_address = 0x08,
603 .invert = 1,
604 .invert_oclk = 0,
605 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
606 .agc_config = TDA10046_AGC_TDA827X,
607 .gpio_config = TDA10046_GP11_I,
550a9a5e 608 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
609 .tuner_address = 0x60,
610 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 611};
550a9a5e 612
58ef4f92
HH
613static struct tda1004x_config philips_tiger_config = {
614 .demod_address = 0x08,
615 .invert = 1,
616 .invert_oclk = 0,
617 .xtal_freq = TDA10046_XTAL_16M,
618 .agc_config = TDA10046_AGC_TDA827X,
619 .gpio_config = TDA10046_GP11_I,
620 .if_freq = TDA10046_FREQ_045,
621 .i2c_gate = 0x4b,
622 .tuner_address = 0x61,
58ef4f92
HH
623 .antenna_switch= 1,
624 .request_firmware = philips_tda1004x_request_firmware
625};
550a9a5e
HH
626
627static struct tda1004x_config cinergy_ht_config = {
628 .demod_address = 0x08,
629 .invert = 1,
630 .invert_oclk = 0,
631 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
632 .agc_config = TDA10046_AGC_TDA827X,
633 .gpio_config = TDA10046_GP01_I,
90e9df7f 634 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
635 .i2c_gate = 0x4b,
636 .tuner_address = 0x61,
58ef4f92 637 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH
638};
639
58ef4f92
HH
640static struct tda1004x_config cinergy_ht_pci_config = {
641 .demod_address = 0x08,
642 .invert = 1,
643 .invert_oclk = 0,
644 .xtal_freq = TDA10046_XTAL_16M,
645 .agc_config = TDA10046_AGC_TDA827X,
646 .gpio_config = TDA10046_GP01_I,
647 .if_freq = TDA10046_FREQ_045,
648 .i2c_gate = 0x4b,
649 .tuner_address = 0x60,
58ef4f92
HH
650 .request_firmware = philips_tda1004x_request_firmware
651};
652
653static struct tda1004x_config philips_tiger_s_config = {
654 .demod_address = 0x08,
655 .invert = 1,
656 .invert_oclk = 0,
657 .xtal_freq = TDA10046_XTAL_16M,
658 .agc_config = TDA10046_AGC_TDA827X,
659 .gpio_config = TDA10046_GP01_I,
660 .if_freq = TDA10046_FREQ_045,
661 .i2c_gate = 0x4b,
662 .tuner_address = 0x61,
58ef4f92
HH
663 .antenna_switch= 1,
664 .request_firmware = philips_tda1004x_request_firmware
665};
df42eaf2 666
587d2fd7
HH
667static struct tda1004x_config pinnacle_pctv_310i_config = {
668 .demod_address = 0x08,
669 .invert = 1,
670 .invert_oclk = 0,
671 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
672 .agc_config = TDA10046_AGC_TDA827X,
673 .gpio_config = TDA10046_GP11_I,
587d2fd7 674 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
675 .i2c_gate = 0x4b,
676 .tuner_address = 0x61,
58ef4f92 677 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH
678};
679
c6e53daf
TG
680static struct tda1004x_config hauppauge_hvr_1110_config = {
681 .demod_address = 0x08,
682 .invert = 1,
683 .invert_oclk = 0,
684 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
685 .agc_config = TDA10046_AGC_TDA827X,
686 .gpio_config = TDA10046_GP11_I,
c6e53daf 687 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
688 .i2c_gate = 0x4b,
689 .tuner_address = 0x61,
690 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG
691};
692
83646817
HH
693static struct tda1004x_config asus_p7131_dual_config = {
694 .demod_address = 0x08,
695 .invert = 1,
696 .invert_oclk = 0,
697 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
698 .agc_config = TDA10046_AGC_TDA827X,
699 .gpio_config = TDA10046_GP11_I,
83646817 700 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
701 .i2c_gate = 0x4b,
702 .tuner_address = 0x61,
58ef4f92
HH
703 .antenna_switch= 2,
704 .request_firmware = philips_tda1004x_request_firmware
83646817
HH
705};
706
420f32fe
NS
707static struct tda1004x_config lifeview_trio_config = {
708 .demod_address = 0x09,
709 .invert = 1,
710 .invert_oclk = 0,
711 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
712 .agc_config = TDA10046_AGC_TDA827X,
713 .gpio_config = TDA10046_GP00_I,
420f32fe 714 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
715 .tuner_address = 0x60,
716 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS
717};
718
58ef4f92 719static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH
720 .demod_address = 0x08,
721 .invert = 1,
722 .invert_oclk = 0,
723 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 724 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 725 .gpio_config = TDA10046_GP11_I,
df42eaf2 726 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
727 .tuner_address = 0x60,
728 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH
729};
730
58ef4f92 731static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH
732 .demod_address = 0x08,
733 .invert = 1,
734 .invert_oclk = 0,
735 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 736 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 737 .gpio_config = TDA10046_GP01_I,
3dfb729f 738 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
739 .i2c_gate = 0x4b,
740 .tuner_address = 0x60,
58ef4f92 741 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH
742};
743
e06cea4c
HH
744static struct tda1004x_config asus_p7131_4871_config = {
745 .demod_address = 0x08,
746 .invert = 1,
747 .invert_oclk = 0,
748 .xtal_freq = TDA10046_XTAL_16M,
749 .agc_config = TDA10046_AGC_TDA827X,
750 .gpio_config = TDA10046_GP01_I,
751 .if_freq = TDA10046_FREQ_045,
752 .i2c_gate = 0x4b,
753 .tuner_address = 0x61,
e06cea4c
HH
754 .antenna_switch= 2,
755 .request_firmware = philips_tda1004x_request_firmware
756};
757
f3eec0c0 758static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH
759 .demod_address = 0x08,
760 .invert = 1,
761 .invert_oclk = 0,
762 .xtal_freq = TDA10046_XTAL_16M,
763 .agc_config = TDA10046_AGC_TDA827X,
764 .gpio_config = TDA10046_GP11_I,
765 .if_freq = TDA10046_FREQ_045,
766 .i2c_gate = 0x4b,
767 .tuner_address = 0x61,
e06cea4c
HH
768 .antenna_switch= 2,
769 .request_firmware = philips_tda1004x_request_firmware
770};
261f5081 771
b39423a9
SF
772static struct tda1004x_config kworld_dvb_t_210_config = {
773 .demod_address = 0x08,
774 .invert = 1,
775 .invert_oclk = 0,
776 .xtal_freq = TDA10046_XTAL_16M,
777 .agc_config = TDA10046_AGC_TDA827X,
778 .gpio_config = TDA10046_GP11_I,
779 .if_freq = TDA10046_FREQ_045,
780 .i2c_gate = 0x4b,
781 .tuner_address = 0x61,
b39423a9
SF
782 .antenna_switch= 1,
783 .request_firmware = philips_tda1004x_request_firmware
784};
261f5081 785
d90d9f5a
ES
786static struct tda1004x_config avermedia_super_007_config = {
787 .demod_address = 0x08,
788 .invert = 1,
789 .invert_oclk = 0,
790 .xtal_freq = TDA10046_XTAL_16M,
791 .agc_config = TDA10046_AGC_TDA827X,
792 .gpio_config = TDA10046_GP01_I,
793 .if_freq = TDA10046_FREQ_045,
794 .i2c_gate = 0x4b,
795 .tuner_address = 0x60,
d90d9f5a
ES
796 .antenna_switch= 1,
797 .request_firmware = philips_tda1004x_request_firmware
798};
799
4ba24373
HP
800static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
801 .demod_address = 0x08,
802 .invert = 1,
803 .invert_oclk = 0,
804 .xtal_freq = TDA10046_XTAL_16M,
805 .agc_config = TDA10046_AGC_TDA827X,
806 .gpio_config = TDA10046_GP01_I,
807 .if_freq = TDA10046_FREQ_045,
808 .i2c_gate = 0x42,
809 .tuner_address = 0x61,
4ba24373
HP
810 .antenna_switch = 1,
811 .request_firmware = philips_tda1004x_request_firmware
812};
813
301e9d64 814static struct tda1004x_config asus_tiger_3in1_config = {
815 .demod_address = 0x0b,
816 .invert = 1,
817 .invert_oclk = 0,
818 .xtal_freq = TDA10046_XTAL_16M,
819 .agc_config = TDA10046_AGC_TDA827X,
820 .gpio_config = TDA10046_GP11_I,
821 .if_freq = TDA10046_FREQ_045,
822 .i2c_gate = 0x4b,
823 .tuner_address = 0x61,
824 .antenna_switch = 1,
825 .request_firmware = philips_tda1004x_request_firmware
826};
827
58ef4f92
HH
828/* ------------------------------------------------------------------
829 * special case: this card uses saa713x GPIO22 for the mode switch
830 */
5eda227f 831
58ef4f92 832static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH
833{
834 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
835 philips_tda827x_tuner_init(fe);
836 /* route TDA8275a AGC input to the channel decoder */
06be3035 837 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH
838 return 0;
839}
840
58ef4f92 841static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 842{
5eda227f 843 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 844 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 845 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH
846 philips_tda827x_tuner_sleep(fe);
847 return 0;
5eda227f
HH
848}
849
8ce47dad 850static struct tda827x_config ads_duo_cfg = {
8ce47dad 851 .init = ads_duo_tuner_init,
7bff4b4d
HH
852 .sleep = ads_duo_tuner_sleep,
853 .config = 0
8ce47dad
MK
854};
855
58ef4f92 856static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH
857 .demod_address = 0x08,
858 .invert = 1,
859 .invert_oclk = 0,
860 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 861 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 862 .gpio_config = TDA10046_GP00_I,
5eda227f 863 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
864 .tuner_address = 0x61,
865 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH
866};
867
47aeba5a
DB
868static struct zl10353_config behold_h6_config = {
869 .demod_address = 0x1e>>1,
870 .no_tuner = 1,
871 .parallel_ts = 1,
5f77af93 872 .disable_i2c_gate_ctrl = 1,
47aeba5a
DB
873};
874
2930992c
BILDB
875static struct xc5000_config behold_x7_tunerconfig = {
876 .i2c_address = 0xc2>>1,
877 .if_khz = 4560,
878 .radio_input = 1,
879};
880
881static struct zl10353_config behold_x7_config = {
882 .demod_address = 0x1e>>1,
883 .if2 = 45600,
884 .no_tuner = 1,
885 .parallel_ts = 1,
886 .disable_i2c_gate_ctrl = 1,
887};
888
58ef4f92
HH
889/* ==================================================================
890 * tda10086 based DVB-S cards, helper functions
891 */
892
e2ac28fa
IL
893static struct tda10086_config flydvbs = {
894 .demod_address = 0x0e,
895 .invert = 0,
ea75baf4 896 .diseqc_tone = 0,
9a1b04e4
HH
897 .xtal_freq = TDA10086_XTAL_16M,
898};
899
900static struct tda10086_config sd1878_4m = {
901 .demod_address = 0x0e,
902 .invert = 0,
903 .diseqc_tone = 0,
904 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL
905};
906
1b1cee35
HH
907/* ------------------------------------------------------------------
908 * special case: lnb supply is connected to the gated i2c
909 */
910
911static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
912{
913 int res = -EIO;
914 struct saa7134_dev *dev = fe->dvb->priv;
915 if (fe->ops.i2c_gate_ctrl) {
916 fe->ops.i2c_gate_ctrl(fe, 1);
917 if (dev->original_set_voltage)
918 res = dev->original_set_voltage(fe, voltage);
919 fe->ops.i2c_gate_ctrl(fe, 0);
920 }
921 return res;
922};
923
924static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
925{
926 int res = -EIO;
927 struct saa7134_dev *dev = fe->dvb->priv;
928 if (fe->ops.i2c_gate_ctrl) {
929 fe->ops.i2c_gate_ctrl(fe, 1);
930 if (dev->original_set_high_voltage)
931 res = dev->original_set_high_voltage(fe, arg);
932 fe->ops.i2c_gate_ctrl(fe, 0);
933 }
934 return res;
935};
936
5823b3a6
HH
937static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
938{
939 struct saa7134_dev *dev = fe->dvb->priv;
940 u8 wbuf[2] = { 0x1f, 00 };
941 u8 rbuf;
942 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
943 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
944
945 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
946 return -EIO;
947 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
948 if (voltage == SEC_VOLTAGE_18)
949 wbuf[1] = rbuf | 0x10;
950 else
951 wbuf[1] = rbuf & 0xef;
952 msg[0].len = 2;
953 i2c_transfer(&dev->i2c_adap, msg, 1);
954 return 0;
955}
956
957static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
958{
959 struct saa7134_dev *dev = fe->dvb->priv;
960 wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__);
961 return -EIO;
962}
963
58ef4f92
HH
964/* ==================================================================
965 * nxt200x based ATSC cards, helper functions
966 */
90e9df7f 967
3b64e8e2
MK
968static struct nxt200x_config avertvhda180 = {
969 .demod_address = 0x0a,
3b64e8e2 970};
3e1410ad
AB
971
972static struct nxt200x_config kworldatsc110 = {
973 .demod_address = 0x0a,
3e1410ad 974};
3b64e8e2 975
04574185
MS
976/* ------------------------------------------------------------------ */
977
978static struct mt312_config avertv_a700_mt312 = {
979 .demod_address = 0x0e,
980 .voltage_inverted = 1,
981};
982
983static struct zl10036_config avertv_a700_tuner = {
984 .tuner_address = 0x60,
985};
986
ecfcfec8
IL
987static struct mt312_config zl10313_compro_s350_config = {
988 .demod_address = 0x0e,
989};
990
3abdedd8
MK
991static struct lgdt3305_config hcw_lgdt3305_config = {
992 .i2c_addr = 0x0e,
993 .mpeg_mode = LGDT3305_MPEG_SERIAL,
994 .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE,
995 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
996 .deny_i2c_rptr = 1,
997 .spectral_inversion = 1,
998 .qam_if_khz = 4000,
999 .vsb_if_khz = 3250,
1000};
1001
1bc7f51c
MK
1002static struct tda10048_config hcw_tda10048_config = {
1003 .demod_address = 0x10 >> 1,
1004 .output_mode = TDA10048_SERIAL_OUTPUT,
1005 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1006 .inversion = TDA10048_INVERSION_ON,
1007 .dtv6_if_freq_khz = TDA10048_IF_3300,
1008 .dtv7_if_freq_khz = TDA10048_IF_3500,
1009 .dtv8_if_freq_khz = TDA10048_IF_4000,
1010 .clk_freq_khz = TDA10048_CLK_16000,
1011 .disable_gate_access = 1,
1012};
1013
3abdedd8
MK
1014static struct tda18271_std_map hauppauge_tda18271_std_map = {
1015 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
1016 .if_lvl = 1, .rfagc_top = 0x58, },
1017 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
1018 .if_lvl = 1, .rfagc_top = 0x58, },
1019};
1020
1021static struct tda18271_config hcw_tda18271_config = {
1022 .std_map = &hauppauge_tda18271_std_map,
1023 .gate = TDA18271_GATE_ANALOG,
1024 .config = 3,
542cb057 1025 .output_opt = TDA18271_OUTPUT_LT_OFF,
3abdedd8
MK
1026};
1027
1028static struct tda829x_config tda829x_no_probe = {
1029 .probe_tuner = TDA829X_DONT_PROBE,
1030};
1031
6c119ff4
HV
1032static struct tda10048_config zolid_tda10048_config = {
1033 .demod_address = 0x10 >> 1,
1034 .output_mode = TDA10048_PARALLEL_OUTPUT,
1035 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1036 .inversion = TDA10048_INVERSION_ON,
1037 .dtv6_if_freq_khz = TDA10048_IF_3300,
1038 .dtv7_if_freq_khz = TDA10048_IF_3500,
1039 .dtv8_if_freq_khz = TDA10048_IF_4000,
1040 .clk_freq_khz = TDA10048_CLK_16000,
1041 .disable_gate_access = 1,
1042};
1043
1044static struct tda18271_config zolid_tda18271_config = {
1045 .gate = TDA18271_GATE_ANALOG,
1046};
1047
58ef4f92
HH
1048/* ==================================================================
1049 * Core code
1050 */
1da177e4
LT
1051
1052static int dvb_init(struct saa7134_dev *dev)
1053{
1c4f76ab 1054 int ret;
bc36a686 1055 int attach_xc3028 = 0;
363c35fc
ST
1056 struct videobuf_dvb_frontend *fe0;
1057
f972e0bd
DB
1058 /* FIXME: add support for multi-frontend */
1059 mutex_init(&dev->frontends.lock);
7bdf84fc 1060 INIT_LIST_HEAD(&dev->frontends.felist);
f972e0bd
DB
1061
1062 printk(KERN_INFO "%s() allocating 1 frontend\n", __func__);
f3f741e7
DB
1063 fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1);
1064 if (!fe0) {
f972e0bd
DB
1065 printk(KERN_ERR "%s() failed to alloc\n", __func__);
1066 return -ENOMEM;
1067 }
1068
1da177e4
LT
1069 /* init struct videobuf_dvb */
1070 dev->ts.nr_bufs = 32;
1071 dev->ts.nr_packets = 32*4;
363c35fc
ST
1072 fe0->dvb.name = dev->name;
1073 videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops,
0705135e 1074 &dev->pci->dev, &dev->slock,
1da177e4
LT
1075 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1076 V4L2_FIELD_ALTERNATE,
1077 sizeof(struct saa7134_buf),
1078 dev);
1079
1080 switch (dev->board) {
1081 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 1082 dprintk("pinnacle 300i dvb setup\n");
363c35fc 1083 fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1084 &dev->i2c_adap);
363c35fc
ST
1085 if (fe0->dvb.frontend) {
1086 fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1087 }
1da177e4 1088 break;
a78d0bfa 1089 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1090 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 1091 dprintk("avertv 777 dvb setup\n");
363c35fc 1092 fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1093 &dev->i2c_adap);
363c35fc
ST
1094 if (fe0->dvb.frontend) {
1095 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
fb147e97
MK
1096 &dev->i2c_adap, 0x61,
1097 TUNER_PHILIPS_TD1316);
6b3ccab7 1098 }
a78d0bfa 1099 break;
95a2fdb6 1100 case SAA7134_BOARD_AVERMEDIA_A16D:
6e501a3f 1101 dprintk("AverMedia A16D dvb setup\n");
363c35fc 1102 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1103 &avermedia_xc3028_mt352_dev,
1104 &dev->i2c_adap);
95a2fdb6
MCC
1105 attach_xc3028 = 1;
1106 break;
1da177e4 1107 case SAA7134_BOARD_MD7134:
363c35fc 1108 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1109 &medion_cardbus,
1110 &dev->i2c_adap);
363c35fc
ST
1111 if (fe0->dvb.frontend) {
1112 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1113 &dev->i2c_adap, medion_cardbus.tuner_address,
1114 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 1115 }
1da177e4 1116 break;
86ddd96f 1117 case SAA7134_BOARD_PHILIPS_TOUGH:
363c35fc 1118 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1119 &philips_tu1216_60_config,
1120 &dev->i2c_adap);
363c35fc
ST
1121 if (fe0->dvb.frontend) {
1122 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1123 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1124 }
86ddd96f
MCC
1125 break;
1126 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1127 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC
1128 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1129 &tda827x_cfg_0) < 0)
1130 goto dettach_frontend;
86ddd96f 1131 break;
2cf36ac4 1132 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1133 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
363c35fc 1134 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1135 &philips_europa_config,
1136 &dev->i2c_adap);
363c35fc
ST
1137 if (fe0->dvb.frontend) {
1138 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1139 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1140 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1141 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1142 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1143 }
2cf36ac4
HH
1144 break;
1145 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
363c35fc 1146 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1147 &philips_tu1216_61_config,
1148 &dev->i2c_adap);
363c35fc
ST
1149 if (fe0->dvb.frontend) {
1150 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1151 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1152 }
2cf36ac4 1153 break;
b39423a9 1154 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC
1155 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1156 &tda827x_cfg_2) < 0)
1157 goto dettach_frontend;
b39423a9 1158 break;
0e316ecf 1159 case SAA7134_BOARD_HAUPPAUGE_HVR1120:
1bc7f51c
MK
1160 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1161 &hcw_tda10048_config,
1162 &dev->i2c_adap);
1163 if (fe0->dvb.frontend != NULL) {
1164 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1165 &dev->i2c_adap, 0x4b,
1166 &tda829x_no_probe);
1167 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1168 0x60, &dev->i2c_adap,
1169 &hcw_tda18271_config);
1170 }
1171 break;
90e9df7f 1172 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC
1173 if (configure_tda827x_fe(dev, &philips_tiger_config,
1174 &tda827x_cfg_0) < 0)
1175 goto dettach_frontend;
587d2fd7
HH
1176 break;
1177 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC
1178 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1179 &tda827x_cfg_1) < 0)
1180 goto dettach_frontend;
90e9df7f 1181 break;
c6e53daf 1182 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC
1183 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1184 &tda827x_cfg_1) < 0)
1185 goto dettach_frontend;
c6e53daf 1186 break;
b5f05064 1187 case SAA7134_BOARD_HAUPPAUGE_HVR1150:
3abdedd8
MK
1188 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
1189 &hcw_lgdt3305_config,
1190 &dev->i2c_adap);
1191 if (fe0->dvb.frontend) {
1192 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1193 &dev->i2c_adap, 0x4b,
1194 &tda829x_no_probe);
1195 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1196 0x60, &dev->i2c_adap,
1197 &hcw_tda18271_config);
1198 }
1199 break;
d4b0aba4 1200 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC
1201 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1202 &tda827x_cfg_0) < 0)
1203 goto dettach_frontend;
d4b0aba4 1204 break;
3d8466ec 1205 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC
1206 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1207 &tda827x_cfg_0) < 0)
1208 goto dettach_frontend;
3d8466ec 1209 break;
92abe9ee 1210 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC
1211 if (!use_frontend) { /* terrestrial */
1212 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1213 &tda827x_cfg_0) < 0)
1214 goto dettach_frontend;
7bff4b4d 1215 } else { /* satellite */
363c35fc
ST
1216 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1217 if (fe0->dvb.frontend) {
1218 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63,
1f683cd8 1219 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1220 wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__);
d557dab5 1221 goto dettach_frontend;
1f683cd8 1222 }
363c35fc 1223 if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap,
1f683cd8 1224 0x08, 0, 0) == NULL) {
5823b3a6 1225 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__);
d557dab5 1226 goto dettach_frontend;
1f683cd8
NS
1227 }
1228 }
6b3ccab7 1229 }
420f32fe 1230 break;
df42eaf2 1231 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1232 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
363c35fc 1233 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1234 &ads_tech_duo_config,
1235 &dev->i2c_adap);
363c35fc
ST
1236 if (fe0->dvb.frontend) {
1237 if (dvb_attach(tda827x_attach,fe0->dvb.frontend,
7bff4b4d
HH
1238 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1239 &ads_duo_cfg) == NULL) {
cf3c34c8 1240 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d 1241 ads_tech_duo_config.tuner_address);
d557dab5 1242 goto dettach_frontend;
ede2200d 1243 }
bc36ec74
MCC
1244 } else
1245 wprintk("failed to attach tda10046\n");
df42eaf2 1246 break;
3dfb729f 1247 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC
1248 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1249 &tda827x_cfg_0) < 0)
1250 goto dettach_frontend;
d95b8942 1251 break;
5eda227f 1252 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1253 if (!use_frontend) { /* terrestrial */
d557dab5
MCC
1254 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1255 &tda827x_cfg_0) < 0)
1256 goto dettach_frontend;
4b1431ca 1257 } else { /* satellite */
363c35fc 1258 fe0->dvb.frontend = dvb_attach(tda10086_attach,
4b1431ca 1259 &flydvbs, &dev->i2c_adap);
363c35fc
ST
1260 if (fe0->dvb.frontend) {
1261 struct dvb_frontend *fe = fe0->dvb.frontend;
5823b3a6
HH
1262 u8 dev_id = dev->eedata[2];
1263 u8 data = 0xc4;
1264 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1265
363c35fc 1266 if (dvb_attach(tda826x_attach, fe0->dvb.frontend,
d557dab5 1267 0x60, &dev->i2c_adap, 0) == NULL) {
4b1431ca 1268 wprintk("%s: Medion Quadro, no tda826x "
5823b3a6 1269 "found !\n", __func__);
d557dab5
MCC
1270 goto dettach_frontend;
1271 }
5823b3a6
HH
1272 if (dev_id != 0x08) {
1273 /* we need to open the i2c gate (we know it exists) */
1274 fe->ops.i2c_gate_ctrl(fe, 1);
1275 if (dvb_attach(isl6405_attach, fe,
d557dab5 1276 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6
HH
1277 wprintk("%s: Medion Quadro, no ISL6405 "
1278 "found !\n", __func__);
d557dab5
MCC
1279 goto dettach_frontend;
1280 }
e9c1ac9d
HH
1281 if (dev_id == 0x07) {
1282 /* fire up the 2nd section of the LNB supply since
1283 we can't do this from the other section */
1284 msg.buf = &data;
1285 i2c_transfer(&dev->i2c_adap, &msg, 1);
1286 }
5823b3a6
HH
1287 fe->ops.i2c_gate_ctrl(fe, 0);
1288 dev->original_set_voltage = fe->ops.set_voltage;
1289 fe->ops.set_voltage = md8800_set_voltage;
1290 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1291 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1292 } else {
1293 fe->ops.set_voltage = md8800_set_voltage2;
1294 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1295 }
4b1431ca
HH
1296 }
1297 }
5eda227f 1298 break;
3b64e8e2 1299 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
363c35fc 1300 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
f7b54b10 1301 &dev->i2c_adap);
363c35fc
ST
1302 if (fe0->dvb.frontend)
1303 dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61,
47a9991e 1304 NULL, DVB_PLL_TDHU2);
3b64e8e2 1305 break;
f689d908 1306 case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI:
3e1410ad 1307 case SAA7134_BOARD_KWORLD_ATSC110:
363c35fc 1308 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
f7b54b10 1309 &dev->i2c_adap);
363c35fc
ST
1310 if (fe0->dvb.frontend)
1311 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
62ff817a
MK
1312 &dev->i2c_adap, 0x61,
1313 TUNER_PHILIPS_TUV1236D);
3e1410ad 1314 break;
e2ac28fa 1315 case SAA7134_BOARD_FLYDVBS_LR300:
363c35fc 1316 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
f7b54b10 1317 &dev->i2c_adap);
363c35fc
ST
1318 if (fe0->dvb.frontend) {
1319 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
f7b54b10 1320 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1321 wprintk("%s: No tda826x found!\n", __func__);
d557dab5 1322 goto dettach_frontend;
e2ac28fa 1323 }
363c35fc 1324 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
f7b54b10 1325 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6 1326 wprintk("%s: No ISL6421 found!\n", __func__);
d557dab5 1327 goto dettach_frontend;
e2ac28fa
IL
1328 }
1329 }
1330 break;
cf146ca4 1331 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
363c35fc 1332 fe0->dvb.frontend = dvb_attach(tda10046_attach,
0e8f4cc5
MS
1333 &medion_cardbus,
1334 &dev->i2c_adap);
363c35fc
ST
1335 if (fe0->dvb.frontend) {
1336 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1337 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1338
363c35fc 1339 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1340 &dev->i2c_adap, medion_cardbus.tuner_address,
1341 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH
1342 }
1343 break;
cbb94521 1344 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
363c35fc 1345 fe0->dvb.frontend = dvb_attach(tda10046_attach,
cbb94521
HH
1346 &philips_europa_config,
1347 &dev->i2c_adap);
363c35fc
ST
1348 if (fe0->dvb.frontend) {
1349 fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1350 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
cbb94521
HH
1351 }
1352 break;
550a9a5e 1353 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC
1354 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1355 &tda827x_cfg_0) < 0)
1356 goto dettach_frontend;
9de271e6
MK
1357 break;
1358 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC
1359 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1360 &tda827x_cfg_0) < 0)
1361 goto dettach_frontend;
58ef4f92
HH
1362 break;
1363 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC
1364 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1365 &tda827x_cfg_2) < 0)
1366 goto dettach_frontend;
550a9a5e 1367 break;
e06cea4c 1368 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC
1369 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1370 &tda827x_cfg_2) < 0)
1371 goto dettach_frontend;
e06cea4c 1372 break;
f3eec0c0 1373 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC
1374 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1375 &tda827x_cfg_2) < 0)
1376 goto dettach_frontend;
e06cea4c 1377 break;
d90d9f5a 1378 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC
1379 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1380 &tda827x_cfg_0) < 0)
1381 goto dettach_frontend;
d90d9f5a 1382 break;
4ba24373 1383 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC
1384 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1385 &tda827x_cfg_2_sw42) < 0)
1386 goto dettach_frontend;
4ba24373 1387 break;
6ab465a8 1388 case SAA7134_BOARD_PHILIPS_SNAKE:
363c35fc 1389 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
6ab465a8 1390 &dev->i2c_adap);
363c35fc
ST
1391 if (fe0->dvb.frontend) {
1392 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
d557dab5 1393 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1394 wprintk("%s: No tda826x found!\n", __func__);
d557dab5
MCC
1395 goto dettach_frontend;
1396 }
363c35fc 1397 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
d557dab5 1398 &dev->i2c_adap, 0, 0) == NULL) {
5823b3a6 1399 wprintk("%s: No lnbp21 found!\n", __func__);
d557dab5
MCC
1400 goto dettach_frontend;
1401 }
6ab465a8
HH
1402 }
1403 break;
7b5b3f17 1404 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC
1405 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1406 &tda827x_cfg_0) < 0)
1407 goto dettach_frontend;
7b5b3f17 1408 break;
6a6179b6 1409 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC
1410 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1411 &tda827x_cfg_2) < 0)
1412 goto dettach_frontend;
6a6179b6 1413 break;
bc36a686 1414 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
6e501a3f
TF
1415 dprintk("AverMedia E506R dvb setup\n");
1416 saa7134_set_gpio(dev, 25, 0);
1417 msleep(10);
1418 saa7134_set_gpio(dev, 25, 1);
363c35fc 1419 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1420 &avermedia_xc3028_mt352_dev,
1421 &dev->i2c_adap);
bc36a686 1422 attach_xc3028 = 1;
e2fc00c2 1423 break;
637afdb5 1424 case SAA7134_BOARD_MD7134_BRIDGE_2:
363c35fc 1425 fe0->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1426 &sd1878_4m, &dev->i2c_adap);
363c35fc 1427 if (fe0->dvb.frontend) {
637afdb5 1428 struct dvb_frontend *fe;
363c35fc 1429 if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
d557dab5 1430 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
637afdb5 1431 wprintk("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1432 "found !\n", __func__);
d557dab5
MCC
1433 goto dettach_frontend;
1434 }
637afdb5 1435 /* we need to open the i2c gate (we know it exists) */
363c35fc 1436 fe = fe0->dvb.frontend;
637afdb5
HH
1437 fe->ops.i2c_gate_ctrl(fe, 1);
1438 if (dvb_attach(isl6405_attach, fe,
d557dab5 1439 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
637afdb5 1440 wprintk("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1441 "found !\n", __func__);
d557dab5
MCC
1442 goto dettach_frontend;
1443 }
637afdb5
HH
1444 fe->ops.i2c_gate_ctrl(fe, 0);
1445 dev->original_set_voltage = fe->ops.set_voltage;
1446 fe->ops.set_voltage = md8800_set_voltage;
1447 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1448 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1449 }
1450 break;
e2fc00c2
MP
1451 case SAA7134_BOARD_AVERMEDIA_M103:
1452 saa7134_set_gpio(dev, 25, 0);
1453 msleep(10);
1454 saa7134_set_gpio(dev, 25, 1);
363c35fc 1455 fe0->dvb.frontend = dvb_attach(mt352_attach,
e2fc00c2
MP
1456 &avermedia_xc3028_mt352_dev,
1457 &dev->i2c_adap);
1458 attach_xc3028 = 1;
1459 break;
301e9d64 1460 case SAA7134_BOARD_ASUSTeK_TIGER_3IN1:
1461 if (!use_frontend) { /* terrestrial */
1462 if (configure_tda827x_fe(dev, &asus_tiger_3in1_config,
1463 &tda827x_cfg_2) < 0)
1464 goto dettach_frontend;
1465 } else { /* satellite */
363c35fc 1466 fe0->dvb.frontend = dvb_attach(tda10086_attach,
301e9d64 1467 &flydvbs, &dev->i2c_adap);
363c35fc 1468 if (fe0->dvb.frontend) {
301e9d64 1469 if (dvb_attach(tda826x_attach,
363c35fc 1470 fe0->dvb.frontend, 0x60,
301e9d64 1471 &dev->i2c_adap, 0) == NULL) {
1472 wprintk("%s: Asus Tiger 3in1, no "
1473 "tda826x found!\n", __func__);
1474 goto dettach_frontend;
1475 }
363c35fc 1476 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
301e9d64 1477 &dev->i2c_adap, 0, 0) == NULL) {
1478 wprintk("%s: Asus Tiger 3in1, no lnbp21"
1479 " found!\n", __func__);
1480 goto dettach_frontend;
1481 }
1482 }
1483 }
1484 break;
028165a3
HP
1485 case SAA7134_BOARD_ASUSTeK_TIGER:
1486 if (configure_tda827x_fe(dev, &philips_tiger_config,
1487 &tda827x_cfg_0) < 0)
1488 goto dettach_frontend;
1489 break;
47aeba5a 1490 case SAA7134_BOARD_BEHOLD_H6:
b0c4be8c 1491 fe0->dvb.frontend = dvb_attach(zl10353_attach,
47aeba5a
DB
1492 &behold_h6_config,
1493 &dev->i2c_adap);
b0c4be8c
MCC
1494 if (fe0->dvb.frontend) {
1495 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
47aeba5a 1496 &dev->i2c_adap, 0x61,
4786dd65 1497 TUNER_PHILIPS_FMD1216MEX_MK3);
47aeba5a 1498 }
04574185 1499 break;
2930992c
BILDB
1500 case SAA7134_BOARD_BEHOLD_X7:
1501 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1502 &behold_x7_config,
1503 &dev->i2c_adap);
1504 if (fe0->dvb.frontend) {
1505 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1506 &dev->i2c_adap, &behold_x7_tunerconfig);
1507 }
1508 break;
04574185
MS
1509 case SAA7134_BOARD_AVERMEDIA_A700_PRO:
1510 case SAA7134_BOARD_AVERMEDIA_A700_HYBRID:
1511 /* Zarlink ZL10313 */
1512 fe0->dvb.frontend = dvb_attach(mt312_attach,
1513 &avertv_a700_mt312, &dev->i2c_adap);
1514 if (fe0->dvb.frontend) {
1515 if (dvb_attach(zl10036_attach, fe0->dvb.frontend,
1516 &avertv_a700_tuner, &dev->i2c_adap) == NULL) {
1517 wprintk("%s: No zl10036 found!\n",
1518 __func__);
1519 }
1520 }
ecfcfec8
IL
1521 break;
1522 case SAA7134_BOARD_VIDEOMATE_S350:
1523 fe0->dvb.frontend = dvb_attach(mt312_attach,
1524 &zl10313_compro_s350_config, &dev->i2c_adap);
1525 if (fe0->dvb.frontend)
1526 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1527 0x60, &dev->i2c_adap) == NULL)
1528 wprintk("%s: No zl10039 found!\n",
1529 __func__);
1530
6c119ff4
HV
1531 break;
1532 case SAA7134_BOARD_ZOLID_HYBRID_PCI:
1533 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1534 &zolid_tda10048_config,
1535 &dev->i2c_adap);
1536 if (fe0->dvb.frontend != NULL) {
1537 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1538 &dev->i2c_adap, 0x4b,
1539 &tda829x_no_probe);
1540 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1541 0x60, &dev->i2c_adap,
1542 &zolid_tda18271_config);
1543 }
47aeba5a 1544 break;
1da177e4 1545 default:
cf3c34c8 1546 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT
1547 break;
1548 }
1549
bc36a686
MCC
1550 if (attach_xc3028) {
1551 struct dvb_frontend *fe;
1552 struct xc2028_config cfg = {
1553 .i2c_adap = &dev->i2c_adap,
1554 .i2c_addr = 0x61,
bc36a686 1555 };
95a2fdb6 1556
363c35fc 1557 if (!fe0->dvb.frontend)
f3f741e7 1558 goto dettach_frontend;
95a2fdb6 1559
363c35fc 1560 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
bc36a686
MCC
1561 if (!fe) {
1562 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
1563 dev->name);
d557dab5 1564 goto dettach_frontend;
bc36a686
MCC
1565 }
1566 }
1567
363c35fc 1568 if (NULL == fe0->dvb.frontend) {
cf3c34c8 1569 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
f3f741e7 1570 goto dettach_frontend;
1da177e4 1571 }
d7cba043 1572 /* define general-purpose callback pointer */
363c35fc 1573 fe0->dvb.frontend->callback = saa7134_tuner_callback;
1da177e4
LT
1574
1575 /* register everything else */
363c35fc 1576 ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
59b1842d 1577 &dev->pci->dev, adapter_nr, 0);
1c4f76ab
HH
1578
1579 /* this sequence is necessary to make the tda1004x load its firmware
1580 * and to enter analog mode of hybrid boards
1581 */
1582 if (!ret) {
363c35fc
ST
1583 if (fe0->dvb.frontend->ops.init)
1584 fe0->dvb.frontend->ops.init(fe0->dvb.frontend);
1585 if (fe0->dvb.frontend->ops.sleep)
1586 fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend);
1587 if (fe0->dvb.frontend->ops.tuner_ops.sleep)
1588 fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend);
1c4f76ab
HH
1589 }
1590 return ret;
d557dab5
MCC
1591
1592dettach_frontend:
f3f741e7
DB
1593 videobuf_dvb_dealloc_frontends(&dev->frontends);
1594 return -EINVAL;
1da177e4
LT
1595}
1596
1597static int dvb_fini(struct saa7134_dev *dev)
1598{
363c35fc
ST
1599 struct videobuf_dvb_frontend *fe0;
1600
1601 /* Get the first frontend */
1602 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
1603 if (!fe0)
1604 return -EINVAL;
1605
7f171123
MCC
1606 /* FIXME: I suspect that this code is bogus, since the entry for
1607 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1608 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1609 */
1610 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1611 struct v4l2_priv_tun_config tda9887_cfg;
1612 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1613
1614 tda9887_cfg.tuner = TUNER_TDA9887;
1615 tda9887_cfg.priv = &on;
1da177e4 1616
1da177e4 1617 /* otherwise we don't detect the tuner on next insmod */
fac6986c 1618 saa_call_all(dev, tuner, s_config, &tda9887_cfg);
5823b3a6 1619 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1620 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH
1621 /* turn off the 2nd lnb supply */
1622 u8 data = 0x80;
1623 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1624 struct dvb_frontend *fe;
363c35fc 1625 fe = fe0->dvb.frontend;
5823b3a6
HH
1626 if (fe->ops.i2c_gate_ctrl) {
1627 fe->ops.i2c_gate_ctrl(fe, 1);
1628 i2c_transfer(&dev->i2c_adap, &msg, 1);
1629 fe->ops.i2c_gate_ctrl(fe, 0);
1630 }
1631 }
7f171123 1632 }
f3f741e7 1633 videobuf_dvb_unregister_bus(&dev->frontends);
1da177e4
LT
1634 return 0;
1635}
1636
1637static struct saa7134_mpeg_ops dvb_ops = {
1638 .type = SAA7134_MPEG_DVB,
1639 .init = dvb_init,
1640 .fini = dvb_fini,
1641};
1642
1643static int __init dvb_register(void)
1644{
1645 return saa7134_ts_register(&dvb_ops);
1646}
1647
1648static void __exit dvb_unregister(void)
1649{
1650 saa7134_ts_unregister(&dvb_ops);
1651}
1652
1653module_init(dvb_register);
1654module_exit(dvb_unregister);
1655
1656/* ------------------------------------------------------------------ */
1657/*
1658 * Local variables:
1659 * c-basic-offset: 8
1660 * End:
1661 */