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af935746 KD |
1 | /* |
2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_shm.h | |
3 | * | |
4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com/ | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #ifndef S5P_MFC_SHM_H_ | |
14 | #define S5P_MFC_SHM_H_ | |
15 | ||
16 | enum MFC_SHM_OFS | |
17 | { | |
18 | EXTENEDED_DECODE_STATUS = 0x00, /* D */ | |
19 | SET_FRAME_TAG = 0x04, /* D */ | |
20 | GET_FRAME_TAG_TOP = 0x08, /* D */ | |
21 | GET_FRAME_TAG_BOT = 0x0C, /* D */ | |
22 | PIC_TIME_TOP = 0x10, /* D */ | |
23 | PIC_TIME_BOT = 0x14, /* D */ | |
24 | START_BYTE_NUM = 0x18, /* D */ | |
25 | ||
26 | CROP_INFO_H = 0x20, /* D */ | |
27 | CROP_INFO_V = 0x24, /* D */ | |
28 | EXT_ENC_CONTROL = 0x28, /* E */ | |
29 | ENC_PARAM_CHANGE = 0x2C, /* E */ | |
30 | RC_VOP_TIMING = 0x30, /* E, MPEG4 */ | |
31 | HEC_PERIOD = 0x34, /* E, MPEG4 */ | |
32 | METADATA_ENABLE = 0x38, /* C */ | |
33 | METADATA_STATUS = 0x3C, /* C */ | |
34 | METADATA_DISPLAY_INDEX = 0x40, /* C */ | |
35 | EXT_METADATA_START_ADDR = 0x44, /* C */ | |
36 | PUT_EXTRADATA = 0x48, /* C */ | |
37 | EXTRADATA_ADDR = 0x4C, /* C */ | |
38 | ||
39 | ALLOC_LUMA_DPB_SIZE = 0x64, /* D */ | |
40 | ALLOC_CHROMA_DPB_SIZE = 0x68, /* D */ | |
41 | ALLOC_MV_SIZE = 0x6C, /* D */ | |
42 | P_B_FRAME_QP = 0x70, /* E */ | |
43 | SAMPLE_ASPECT_RATIO_IDC = 0x74, /* E, H.264, depend on | |
44 | ASPECT_RATIO_VUI_ENABLE in EXT_ENC_CONTROL */ | |
45 | EXTENDED_SAR = 0x78, /* E, H.264, depned on | |
46 | ASPECT_RATIO_VUI_ENABLE in EXT_ENC_CONTROL */ | |
47 | DISP_PIC_PROFILE = 0x7C, /* D */ | |
48 | FLUSH_CMD_TYPE = 0x80, /* C */ | |
49 | FLUSH_CMD_INBUF1 = 0x84, /* C */ | |
50 | FLUSH_CMD_INBUF2 = 0x88, /* C */ | |
51 | FLUSH_CMD_OUTBUF = 0x8C, /* E */ | |
52 | NEW_RC_BIT_RATE = 0x90, /* E, format as RC_BIT_RATE(0xC5A8) | |
53 | depend on RC_BIT_RATE_CHANGE in ENC_PARAM_CHANGE */ | |
54 | NEW_RC_FRAME_RATE = 0x94, /* E, format as RC_FRAME_RATE(0xD0D0) | |
55 | depend on RC_FRAME_RATE_CHANGE in ENC_PARAM_CHANGE */ | |
56 | NEW_I_PERIOD = 0x98, /* E, format as I_FRM_CTRL(0xC504) | |
57 | depend on I_PERIOD_CHANGE in ENC_PARAM_CHANGE */ | |
58 | H264_I_PERIOD = 0x9C, /* E, H.264, open GOP */ | |
59 | RC_CONTROL_CONFIG = 0xA0, /* E */ | |
60 | BATCH_INPUT_ADDR = 0xA4, /* E */ | |
61 | BATCH_OUTPUT_ADDR = 0xA8, /* E */ | |
62 | BATCH_OUTPUT_SIZE = 0xAC, /* E */ | |
63 | MIN_LUMA_DPB_SIZE = 0xB0, /* D */ | |
64 | DEVICE_FORMAT_ID = 0xB4, /* C */ | |
65 | H264_POC_TYPE = 0xB8, /* D */ | |
66 | MIN_CHROMA_DPB_SIZE = 0xBC, /* D */ | |
67 | DISP_PIC_FRAME_TYPE = 0xC0, /* D */ | |
68 | FREE_LUMA_DPB = 0xC4, /* D, VC1 MPEG4 */ | |
69 | ASPECT_RATIO_INFO = 0xC8, /* D, MPEG4 */ | |
70 | EXTENDED_PAR = 0xCC, /* D, MPEG4 */ | |
71 | DBG_HISTORY_INPUT0 = 0xD0, /* C */ | |
72 | DBG_HISTORY_INPUT1 = 0xD4, /* C */ | |
73 | DBG_HISTORY_OUTPUT = 0xD8, /* C */ | |
74 | HIERARCHICAL_P_QP = 0xE0, /* E, H.264 */ | |
75 | }; | |
76 | ||
77 | int s5p_mfc_init_shm(struct s5p_mfc_ctx *ctx); | |
78 | ||
79 | #define s5p_mfc_write_shm(ctx, x, ofs) \ | |
80 | do { \ | |
81 | writel(x, (ctx->shm + ofs)); \ | |
82 | wmb(); \ | |
83 | } while (0) | |
84 | ||
85 | static inline u32 s5p_mfc_read_shm(struct s5p_mfc_ctx *ctx, unsigned int ofs) | |
86 | { | |
87 | rmb(); | |
88 | return readl(ctx->shm + ofs); | |
89 | } | |
90 | ||
91 | #endif /* S5P_MFC_SHM_H_ */ |