Commit | Line | Data |
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111f3356 JC |
1 | /* |
2 | * A V4L2 driver for OmniVision OV7670 cameras. | |
3 | * | |
4 | * Copyright 2006 One Laptop Per Child Association, Inc. Written | |
5 | * by Jonathan Corbet with substantial inspiration from Mark | |
6 | * McClelland's ovcamchip code. | |
7 | * | |
77d5140f JC |
8 | * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> |
9 | * | |
111f3356 JC |
10 | * This file may be distributed under the terms of the GNU General |
11 | * Public License, version 2. | |
12 | */ | |
13 | #include <linux/init.h> | |
14 | #include <linux/module.h> | |
111f3356 JC |
15 | #include <linux/slab.h> |
16 | #include <linux/delay.h> | |
17 | #include <linux/videodev.h> | |
18 | #include <media/v4l2-common.h> | |
3434eb7e | 19 | #include <media/v4l2-chip-ident.h> |
111f3356 JC |
20 | #include <linux/i2c.h> |
21 | ||
22 | ||
5e614475 | 23 | MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); |
111f3356 JC |
24 | MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors"); |
25 | MODULE_LICENSE("GPL"); | |
26 | ||
27 | /* | |
28 | * Basic window sizes. These probably belong somewhere more globally | |
29 | * useful. | |
30 | */ | |
31 | #define VGA_WIDTH 640 | |
32 | #define VGA_HEIGHT 480 | |
33 | #define QVGA_WIDTH 320 | |
34 | #define QVGA_HEIGHT 240 | |
35 | #define CIF_WIDTH 352 | |
36 | #define CIF_HEIGHT 288 | |
37 | #define QCIF_WIDTH 176 | |
38 | #define QCIF_HEIGHT 144 | |
39 | ||
c8f5b2f5 JC |
40 | /* |
41 | * Our nominal (default) frame rate. | |
42 | */ | |
43 | #define OV7670_FRAME_RATE 30 | |
44 | ||
111f3356 JC |
45 | /* |
46 | * The 7670 sits on i2c with ID 0x42 | |
47 | */ | |
48 | #define OV7670_I2C_ADDR 0x42 | |
49 | ||
50 | /* Registers */ | |
51 | #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */ | |
52 | #define REG_BLUE 0x01 /* blue gain */ | |
53 | #define REG_RED 0x02 /* red gain */ | |
54 | #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */ | |
55 | #define REG_COM1 0x04 /* Control 1 */ | |
56 | #define COM1_CCIR656 0x40 /* CCIR656 enable */ | |
57 | #define REG_BAVE 0x05 /* U/B Average level */ | |
58 | #define REG_GbAVE 0x06 /* Y/Gb Average level */ | |
59 | #define REG_AECHH 0x07 /* AEC MS 5 bits */ | |
60 | #define REG_RAVE 0x08 /* V/R Average level */ | |
61 | #define REG_COM2 0x09 /* Control 2 */ | |
62 | #define COM2_SSLEEP 0x10 /* Soft sleep mode */ | |
63 | #define REG_PID 0x0a /* Product ID MSB */ | |
64 | #define REG_VER 0x0b /* Product ID LSB */ | |
65 | #define REG_COM3 0x0c /* Control 3 */ | |
66 | #define COM3_SWAP 0x40 /* Byte swap */ | |
67 | #define COM3_SCALEEN 0x08 /* Enable scaling */ | |
68 | #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */ | |
69 | #define REG_COM4 0x0d /* Control 4 */ | |
70 | #define REG_COM5 0x0e /* All "reserved" */ | |
71 | #define REG_COM6 0x0f /* Control 6 */ | |
72 | #define REG_AECH 0x10 /* More bits of AEC value */ | |
73 | #define REG_CLKRC 0x11 /* Clocl control */ | |
74 | #define CLK_EXT 0x40 /* Use external clock directly */ | |
75 | #define CLK_SCALE 0x3f /* Mask for internal clock scale */ | |
76 | #define REG_COM7 0x12 /* Control 7 */ | |
77 | #define COM7_RESET 0x80 /* Register reset */ | |
78 | #define COM7_FMT_MASK 0x38 | |
79 | #define COM7_FMT_VGA 0x00 | |
80 | #define COM7_FMT_CIF 0x20 /* CIF format */ | |
81 | #define COM7_FMT_QVGA 0x10 /* QVGA format */ | |
82 | #define COM7_FMT_QCIF 0x08 /* QCIF format */ | |
83 | #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */ | |
84 | #define COM7_YUV 0x00 /* YUV */ | |
85 | #define COM7_BAYER 0x01 /* Bayer format */ | |
86 | #define COM7_PBAYER 0x05 /* "Processed bayer" */ | |
87 | #define REG_COM8 0x13 /* Control 8 */ | |
88 | #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */ | |
89 | #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */ | |
90 | #define COM8_BFILT 0x20 /* Band filter enable */ | |
91 | #define COM8_AGC 0x04 /* Auto gain enable */ | |
92 | #define COM8_AWB 0x02 /* White balance enable */ | |
93 | #define COM8_AEC 0x01 /* Auto exposure enable */ | |
94 | #define REG_COM9 0x14 /* Control 9 - gain ceiling */ | |
95 | #define REG_COM10 0x15 /* Control 10 */ | |
96 | #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */ | |
97 | #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */ | |
98 | #define COM10_HREF_REV 0x08 /* Reverse HREF */ | |
99 | #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */ | |
100 | #define COM10_VS_NEG 0x02 /* VSYNC negative */ | |
101 | #define COM10_HS_NEG 0x01 /* HSYNC negative */ | |
102 | #define REG_HSTART 0x17 /* Horiz start high bits */ | |
103 | #define REG_HSTOP 0x18 /* Horiz stop high bits */ | |
104 | #define REG_VSTART 0x19 /* Vert start high bits */ | |
105 | #define REG_VSTOP 0x1a /* Vert stop high bits */ | |
106 | #define REG_PSHFT 0x1b /* Pixel delay after HREF */ | |
107 | #define REG_MIDH 0x1c /* Manuf. ID high */ | |
108 | #define REG_MIDL 0x1d /* Manuf. ID low */ | |
109 | #define REG_MVFP 0x1e /* Mirror / vflip */ | |
110 | #define MVFP_MIRROR 0x20 /* Mirror image */ | |
111 | #define MVFP_FLIP 0x10 /* Vertical flip */ | |
112 | ||
113 | #define REG_AEW 0x24 /* AGC upper limit */ | |
114 | #define REG_AEB 0x25 /* AGC lower limit */ | |
115 | #define REG_VPT 0x26 /* AGC/AEC fast mode op region */ | |
116 | #define REG_HSYST 0x30 /* HSYNC rising edge delay */ | |
117 | #define REG_HSYEN 0x31 /* HSYNC falling edge delay */ | |
118 | #define REG_HREF 0x32 /* HREF pieces */ | |
119 | #define REG_TSLB 0x3a /* lots of stuff */ | |
120 | #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */ | |
121 | #define REG_COM11 0x3b /* Control 11 */ | |
122 | #define COM11_NIGHT 0x80 /* NIght mode enable */ | |
123 | #define COM11_NMFR 0x60 /* Two bit NM frame rate */ | |
124 | #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */ | |
125 | #define COM11_50HZ 0x08 /* Manual 50Hz select */ | |
126 | #define COM11_EXP 0x02 | |
127 | #define REG_COM12 0x3c /* Control 12 */ | |
128 | #define COM12_HREF 0x80 /* HREF always */ | |
129 | #define REG_COM13 0x3d /* Control 13 */ | |
130 | #define COM13_GAMMA 0x80 /* Gamma enable */ | |
131 | #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */ | |
132 | #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */ | |
133 | #define REG_COM14 0x3e /* Control 14 */ | |
134 | #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */ | |
135 | #define REG_EDGE 0x3f /* Edge enhancement factor */ | |
136 | #define REG_COM15 0x40 /* Control 15 */ | |
137 | #define COM15_R10F0 0x00 /* Data range 10 to F0 */ | |
138 | #define COM15_R01FE 0x80 /* 01 to FE */ | |
139 | #define COM15_R00FF 0xc0 /* 00 to FF */ | |
140 | #define COM15_RGB565 0x10 /* RGB565 output */ | |
141 | #define COM15_RGB555 0x30 /* RGB555 output */ | |
142 | #define REG_COM16 0x41 /* Control 16 */ | |
143 | #define COM16_AWBGAIN 0x08 /* AWB gain enable */ | |
144 | #define REG_COM17 0x42 /* Control 17 */ | |
145 | #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */ | |
146 | #define COM17_CBAR 0x08 /* DSP Color bar */ | |
147 | ||
f9a76156 JC |
148 | /* |
149 | * This matrix defines how the colors are generated, must be | |
150 | * tweaked to adjust hue and saturation. | |
151 | * | |
152 | * Order: v-red, v-green, v-blue, u-red, u-green, u-blue | |
153 | * | |
154 | * They are nine-bit signed quantities, with the sign bit | |
155 | * stored in 0x58. Sign for v-red is bit 0, and up from there. | |
156 | */ | |
157 | #define REG_CMATRIX_BASE 0x4f | |
158 | #define CMATRIX_LEN 6 | |
159 | #define REG_CMATRIX_SIGN 0x58 | |
160 | ||
161 | ||
111f3356 JC |
162 | #define REG_BRIGHT 0x55 /* Brightness */ |
163 | #define REG_CONTRAS 0x56 /* Contrast control */ | |
164 | ||
165 | #define REG_GFIX 0x69 /* Fix gain control */ | |
166 | ||
585553ec JC |
167 | #define REG_REG76 0x76 /* OV's name */ |
168 | #define R76_BLKPCOR 0x80 /* Black pixel correction enable */ | |
169 | #define R76_WHTPCOR 0x40 /* White pixel correction enable */ | |
170 | ||
111f3356 JC |
171 | #define REG_RGB444 0x8c /* RGB 444 control */ |
172 | #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */ | |
173 | #define R444_RGBX 0x01 /* Empty nibble at end */ | |
174 | ||
175 | #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */ | |
176 | #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */ | |
177 | ||
178 | #define REG_BD50MAX 0xa5 /* 50hz banding step limit */ | |
179 | #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */ | |
180 | #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */ | |
181 | #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */ | |
182 | #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */ | |
183 | #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */ | |
184 | #define REG_BD60MAX 0xab /* 60hz banding step limit */ | |
185 | ||
186 | ||
f9a76156 JC |
187 | /* |
188 | * Information we maintain about a known sensor. | |
189 | */ | |
190 | struct ov7670_format_struct; /* coming later */ | |
191 | struct ov7670_info { | |
192 | struct ov7670_format_struct *fmt; /* Current format */ | |
193 | unsigned char sat; /* Saturation value */ | |
194 | int hue; /* Hue value */ | |
195 | }; | |
196 | ||
197 | ||
198 | ||
199 | ||
111f3356 JC |
200 | /* |
201 | * The default register settings, as obtained from OmniVision. There | |
202 | * is really no making sense of most of these - lots of "reserved" values | |
203 | * and such. | |
204 | * | |
205 | * These settings give VGA YUYV. | |
206 | */ | |
207 | ||
208 | struct regval_list { | |
209 | unsigned char reg_num; | |
210 | unsigned char value; | |
211 | }; | |
212 | ||
213 | static struct regval_list ov7670_default_regs[] = { | |
214 | { REG_COM7, COM7_RESET }, | |
215 | /* | |
216 | * Clock scale: 3 = 15fps | |
217 | * 2 = 20fps | |
218 | * 1 = 30fps | |
219 | */ | |
f9a76156 | 220 | { REG_CLKRC, 0x1 }, /* OV: clock scale (30 fps) */ |
111f3356 JC |
221 | { REG_TSLB, 0x04 }, /* OV */ |
222 | { REG_COM7, 0 }, /* VGA */ | |
223 | /* | |
224 | * Set the hardware window. These values from OV don't entirely | |
225 | * make sense - hstop is less than hstart. But they work... | |
226 | */ | |
227 | { REG_HSTART, 0x13 }, { REG_HSTOP, 0x01 }, | |
228 | { REG_HREF, 0xb6 }, { REG_VSTART, 0x02 }, | |
229 | { REG_VSTOP, 0x7a }, { REG_VREF, 0x0a }, | |
230 | ||
231 | { REG_COM3, 0 }, { REG_COM14, 0 }, | |
232 | /* Mystery scaling numbers */ | |
233 | { 0x70, 0x3a }, { 0x71, 0x35 }, | |
234 | { 0x72, 0x11 }, { 0x73, 0xf0 }, | |
235 | { 0xa2, 0x02 }, { REG_COM10, 0x0 }, | |
236 | ||
237 | /* Gamma curve values */ | |
238 | { 0x7a, 0x20 }, { 0x7b, 0x10 }, | |
239 | { 0x7c, 0x1e }, { 0x7d, 0x35 }, | |
240 | { 0x7e, 0x5a }, { 0x7f, 0x69 }, | |
241 | { 0x80, 0x76 }, { 0x81, 0x80 }, | |
242 | { 0x82, 0x88 }, { 0x83, 0x8f }, | |
243 | { 0x84, 0x96 }, { 0x85, 0xa3 }, | |
244 | { 0x86, 0xaf }, { 0x87, 0xc4 }, | |
245 | { 0x88, 0xd7 }, { 0x89, 0xe8 }, | |
246 | ||
247 | /* AGC and AEC parameters. Note we start by disabling those features, | |
248 | then turn them only after tweaking the values. */ | |
249 | { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT }, | |
250 | { REG_GAIN, 0 }, { REG_AECH, 0 }, | |
251 | { REG_COM4, 0x40 }, /* magic reserved bit */ | |
252 | { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */ | |
253 | { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 }, | |
254 | { REG_AEW, 0x95 }, { REG_AEB, 0x33 }, | |
255 | { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 }, | |
256 | { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */ | |
257 | { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 }, | |
258 | { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 }, | |
259 | { REG_HAECC7, 0x94 }, | |
260 | { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC }, | |
261 | ||
262 | /* Almost all of these are magic "reserved" values. */ | |
263 | { REG_COM5, 0x61 }, { REG_COM6, 0x4b }, | |
7f7b12f0 | 264 | { 0x16, 0x02 }, { REG_MVFP, 0x07 }, |
111f3356 JC |
265 | { 0x21, 0x02 }, { 0x22, 0x91 }, |
266 | { 0x29, 0x07 }, { 0x33, 0x0b }, | |
267 | { 0x35, 0x0b }, { 0x37, 0x1d }, | |
268 | { 0x38, 0x71 }, { 0x39, 0x2a }, | |
269 | { REG_COM12, 0x78 }, { 0x4d, 0x40 }, | |
270 | { 0x4e, 0x20 }, { REG_GFIX, 0 }, | |
271 | { 0x6b, 0x4a }, { 0x74, 0x10 }, | |
272 | { 0x8d, 0x4f }, { 0x8e, 0 }, | |
273 | { 0x8f, 0 }, { 0x90, 0 }, | |
274 | { 0x91, 0 }, { 0x96, 0 }, | |
275 | { 0x9a, 0 }, { 0xb0, 0x84 }, | |
276 | { 0xb1, 0x0c }, { 0xb2, 0x0e }, | |
277 | { 0xb3, 0x82 }, { 0xb8, 0x0a }, | |
278 | ||
279 | /* More reserved magic, some of which tweaks white balance */ | |
280 | { 0x43, 0x0a }, { 0x44, 0xf0 }, | |
281 | { 0x45, 0x34 }, { 0x46, 0x58 }, | |
282 | { 0x47, 0x28 }, { 0x48, 0x3a }, | |
283 | { 0x59, 0x88 }, { 0x5a, 0x88 }, | |
284 | { 0x5b, 0x44 }, { 0x5c, 0x67 }, | |
285 | { 0x5d, 0x49 }, { 0x5e, 0x0e }, | |
286 | { 0x6c, 0x0a }, { 0x6d, 0x55 }, | |
287 | { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */ | |
288 | { 0x6a, 0x40 }, { REG_BLUE, 0x40 }, | |
289 | { REG_RED, 0x60 }, | |
290 | { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB }, | |
291 | ||
292 | /* Matrix coefficients */ | |
293 | { 0x4f, 0x80 }, { 0x50, 0x80 }, | |
294 | { 0x51, 0 }, { 0x52, 0x22 }, | |
295 | { 0x53, 0x5e }, { 0x54, 0x80 }, | |
296 | { 0x58, 0x9e }, | |
297 | ||
298 | { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 }, | |
299 | { 0x75, 0x05 }, { 0x76, 0xe1 }, | |
300 | { 0x4c, 0 }, { 0x77, 0x01 }, | |
301 | { REG_COM13, 0xc3 }, { 0x4b, 0x09 }, | |
302 | { 0xc9, 0x60 }, { REG_COM16, 0x38 }, | |
303 | { 0x56, 0x40 }, | |
304 | ||
c8f5b2f5 | 305 | { 0x34, 0x11 }, { REG_COM11, COM11_EXP|COM11_HZAUTO }, |
111f3356 JC |
306 | { 0xa4, 0x88 }, { 0x96, 0 }, |
307 | { 0x97, 0x30 }, { 0x98, 0x20 }, | |
308 | { 0x99, 0x30 }, { 0x9a, 0x84 }, | |
309 | { 0x9b, 0x29 }, { 0x9c, 0x03 }, | |
310 | { 0x9d, 0x4c }, { 0x9e, 0x3f }, | |
311 | { 0x78, 0x04 }, | |
312 | ||
313 | /* Extra-weird stuff. Some sort of multiplexor register */ | |
314 | { 0x79, 0x01 }, { 0xc8, 0xf0 }, | |
315 | { 0x79, 0x0f }, { 0xc8, 0x00 }, | |
316 | { 0x79, 0x10 }, { 0xc8, 0x7e }, | |
317 | { 0x79, 0x0a }, { 0xc8, 0x80 }, | |
318 | { 0x79, 0x0b }, { 0xc8, 0x01 }, | |
319 | { 0x79, 0x0c }, { 0xc8, 0x0f }, | |
320 | { 0x79, 0x0d }, { 0xc8, 0x20 }, | |
321 | { 0x79, 0x09 }, { 0xc8, 0x80 }, | |
322 | { 0x79, 0x02 }, { 0xc8, 0xc0 }, | |
323 | { 0x79, 0x03 }, { 0xc8, 0x40 }, | |
324 | { 0x79, 0x05 }, { 0xc8, 0x30 }, | |
325 | { 0x79, 0x26 }, | |
326 | ||
111f3356 JC |
327 | { 0xff, 0xff }, /* END MARKER */ |
328 | }; | |
329 | ||
330 | ||
331 | /* | |
332 | * Here we'll try to encapsulate the changes for just the output | |
333 | * video format. | |
334 | * | |
335 | * RGB656 and YUV422 come from OV; RGB444 is homebrewed. | |
336 | * | |
337 | * IMPORTANT RULE: the first entry must be for COM7, see ov7670_s_fmt for why. | |
338 | */ | |
339 | ||
340 | ||
341 | static struct regval_list ov7670_fmt_yuv422[] = { | |
342 | { REG_COM7, 0x0 }, /* Selects YUV mode */ | |
343 | { REG_RGB444, 0 }, /* No RGB444 please */ | |
344 | { REG_COM1, 0 }, | |
345 | { REG_COM15, COM15_R00FF }, | |
346 | { REG_COM9, 0x18 }, /* 4x gain ceiling; 0x8 is reserved bit */ | |
347 | { 0x4f, 0x80 }, /* "matrix coefficient 1" */ | |
348 | { 0x50, 0x80 }, /* "matrix coefficient 2" */ | |
f9a76156 | 349 | { 0x51, 0 }, /* vb */ |
111f3356 JC |
350 | { 0x52, 0x22 }, /* "matrix coefficient 4" */ |
351 | { 0x53, 0x5e }, /* "matrix coefficient 5" */ | |
352 | { 0x54, 0x80 }, /* "matrix coefficient 6" */ | |
353 | { REG_COM13, COM13_GAMMA|COM13_UVSAT }, | |
354 | { 0xff, 0xff }, | |
355 | }; | |
356 | ||
357 | static struct regval_list ov7670_fmt_rgb565[] = { | |
358 | { REG_COM7, COM7_RGB }, /* Selects RGB mode */ | |
359 | { REG_RGB444, 0 }, /* No RGB444 please */ | |
360 | { REG_COM1, 0x0 }, | |
361 | { REG_COM15, COM15_RGB565 }, | |
362 | { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */ | |
363 | { 0x4f, 0xb3 }, /* "matrix coefficient 1" */ | |
364 | { 0x50, 0xb3 }, /* "matrix coefficient 2" */ | |
f9a76156 | 365 | { 0x51, 0 }, /* vb */ |
111f3356 JC |
366 | { 0x52, 0x3d }, /* "matrix coefficient 4" */ |
367 | { 0x53, 0xa7 }, /* "matrix coefficient 5" */ | |
368 | { 0x54, 0xe4 }, /* "matrix coefficient 6" */ | |
369 | { REG_COM13, COM13_GAMMA|COM13_UVSAT }, | |
370 | { 0xff, 0xff }, | |
371 | }; | |
372 | ||
373 | static struct regval_list ov7670_fmt_rgb444[] = { | |
374 | { REG_COM7, COM7_RGB }, /* Selects RGB mode */ | |
375 | { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */ | |
376 | { REG_COM1, 0x40 }, /* Magic reserved bit */ | |
377 | { REG_COM15, COM15_R01FE|COM15_RGB565 }, /* Data range needed? */ | |
378 | { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */ | |
379 | { 0x4f, 0xb3 }, /* "matrix coefficient 1" */ | |
380 | { 0x50, 0xb3 }, /* "matrix coefficient 2" */ | |
f9a76156 | 381 | { 0x51, 0 }, /* vb */ |
111f3356 JC |
382 | { 0x52, 0x3d }, /* "matrix coefficient 4" */ |
383 | { 0x53, 0xa7 }, /* "matrix coefficient 5" */ | |
384 | { 0x54, 0xe4 }, /* "matrix coefficient 6" */ | |
385 | { REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */ | |
386 | { 0xff, 0xff }, | |
387 | }; | |
388 | ||
585553ec JC |
389 | static struct regval_list ov7670_fmt_raw[] = { |
390 | { REG_COM7, COM7_BAYER }, | |
391 | { REG_COM13, 0x08 }, /* No gamma, magic rsvd bit */ | |
392 | { REG_COM16, 0x3d }, /* Edge enhancement, denoise */ | |
393 | { REG_REG76, 0xe1 }, /* Pix correction, magic rsvd */ | |
394 | { 0xff, 0xff }, | |
395 | }; | |
111f3356 JC |
396 | |
397 | ||
398 | ||
399 | /* | |
400 | * Low-level register I/O. | |
401 | */ | |
402 | ||
403 | static int ov7670_read(struct i2c_client *c, unsigned char reg, | |
404 | unsigned char *value) | |
405 | { | |
406 | int ret; | |
407 | ||
408 | ret = i2c_smbus_read_byte_data(c, reg); | |
bca5c2c5 | 409 | if (ret >= 0) { |
111f3356 | 410 | *value = (unsigned char) ret; |
bca5c2c5 AS |
411 | ret = 0; |
412 | } | |
111f3356 JC |
413 | return ret; |
414 | } | |
415 | ||
416 | ||
417 | static int ov7670_write(struct i2c_client *c, unsigned char reg, | |
418 | unsigned char value) | |
419 | { | |
6d77444a JC |
420 | int ret = i2c_smbus_write_byte_data(c, reg, value); |
421 | if (reg == REG_COM7 && (value & COM7_RESET)) | |
422 | msleep(2); /* Wait for reset to run */ | |
423 | return ret; | |
111f3356 JC |
424 | } |
425 | ||
426 | ||
427 | /* | |
428 | * Write a list of register settings; ff/ff stops the process. | |
429 | */ | |
430 | static int ov7670_write_array(struct i2c_client *c, struct regval_list *vals) | |
431 | { | |
432 | while (vals->reg_num != 0xff || vals->value != 0xff) { | |
433 | int ret = ov7670_write(c, vals->reg_num, vals->value); | |
434 | if (ret < 0) | |
435 | return ret; | |
436 | vals++; | |
437 | } | |
438 | return 0; | |
439 | } | |
440 | ||
441 | ||
442 | /* | |
443 | * Stuff that knows about the sensor. | |
444 | */ | |
445 | static void ov7670_reset(struct i2c_client *client) | |
446 | { | |
447 | ov7670_write(client, REG_COM7, COM7_RESET); | |
448 | msleep(1); | |
449 | } | |
450 | ||
451 | ||
452 | static int ov7670_init(struct i2c_client *client) | |
453 | { | |
454 | return ov7670_write_array(client, ov7670_default_regs); | |
455 | } | |
456 | ||
457 | ||
458 | ||
459 | static int ov7670_detect(struct i2c_client *client) | |
460 | { | |
461 | unsigned char v; | |
462 | int ret; | |
463 | ||
464 | ret = ov7670_init(client); | |
465 | if (ret < 0) | |
466 | return ret; | |
467 | ret = ov7670_read(client, REG_MIDH, &v); | |
468 | if (ret < 0) | |
469 | return ret; | |
470 | if (v != 0x7f) /* OV manuf. id. */ | |
471 | return -ENODEV; | |
472 | ret = ov7670_read(client, REG_MIDL, &v); | |
473 | if (ret < 0) | |
474 | return ret; | |
475 | if (v != 0xa2) | |
476 | return -ENODEV; | |
477 | /* | |
478 | * OK, we know we have an OmniVision chip...but which one? | |
479 | */ | |
480 | ret = ov7670_read(client, REG_PID, &v); | |
481 | if (ret < 0) | |
482 | return ret; | |
483 | if (v != 0x76) /* PID + VER = 0x76 / 0x73 */ | |
484 | return -ENODEV; | |
485 | ret = ov7670_read(client, REG_VER, &v); | |
486 | if (ret < 0) | |
487 | return ret; | |
488 | if (v != 0x73) /* PID + VER = 0x76 / 0x73 */ | |
489 | return -ENODEV; | |
490 | return 0; | |
491 | } | |
492 | ||
493 | ||
f9a76156 JC |
494 | /* |
495 | * Store information about the video data format. The color matrix | |
496 | * is deeply tied into the format, so keep the relevant values here. | |
497 | * The magic matrix nubmers come from OmniVision. | |
498 | */ | |
111f3356 JC |
499 | static struct ov7670_format_struct { |
500 | __u8 *desc; | |
501 | __u32 pixelformat; | |
502 | struct regval_list *regs; | |
f9a76156 | 503 | int cmatrix[CMATRIX_LEN]; |
585553ec | 504 | int bpp; /* Bytes per pixel */ |
111f3356 JC |
505 | } ov7670_formats[] = { |
506 | { | |
507 | .desc = "YUYV 4:2:2", | |
508 | .pixelformat = V4L2_PIX_FMT_YUYV, | |
509 | .regs = ov7670_fmt_yuv422, | |
f9a76156 | 510 | .cmatrix = { 128, -128, 0, -34, -94, 128 }, |
585553ec | 511 | .bpp = 2, |
111f3356 JC |
512 | }, |
513 | { | |
514 | .desc = "RGB 444", | |
515 | .pixelformat = V4L2_PIX_FMT_RGB444, | |
516 | .regs = ov7670_fmt_rgb444, | |
f9a76156 | 517 | .cmatrix = { 179, -179, 0, -61, -176, 228 }, |
585553ec | 518 | .bpp = 2, |
111f3356 JC |
519 | }, |
520 | { | |
521 | .desc = "RGB 565", | |
522 | .pixelformat = V4L2_PIX_FMT_RGB565, | |
523 | .regs = ov7670_fmt_rgb565, | |
f9a76156 | 524 | .cmatrix = { 179, -179, 0, -61, -176, 228 }, |
585553ec JC |
525 | .bpp = 2, |
526 | }, | |
527 | { | |
528 | .desc = "Raw RGB Bayer", | |
529 | .pixelformat = V4L2_PIX_FMT_SBGGR8, | |
530 | .regs = ov7670_fmt_raw, | |
531 | .cmatrix = { 0, 0, 0, 0, 0, 0 }, | |
532 | .bpp = 1 | |
111f3356 | 533 | }, |
111f3356 | 534 | }; |
585553ec | 535 | #define N_OV7670_FMTS ARRAY_SIZE(ov7670_formats) |
111f3356 | 536 | |
111f3356 JC |
537 | |
538 | /* | |
539 | * Then there is the issue of window sizes. Try to capture the info here. | |
540 | */ | |
f9a76156 JC |
541 | |
542 | /* | |
543 | * QCIF mode is done (by OV) in a very strange way - it actually looks like | |
544 | * VGA with weird scaling options - they do *not* use the canned QCIF mode | |
545 | * which is allegedly provided by the sensor. So here's the weird register | |
546 | * settings. | |
547 | */ | |
548 | static struct regval_list ov7670_qcif_regs[] = { | |
549 | { REG_COM3, COM3_SCALEEN|COM3_DCWEN }, | |
550 | { REG_COM3, COM3_DCWEN }, | |
551 | { REG_COM14, COM14_DCWEN | 0x01}, | |
552 | { 0x73, 0xf1 }, | |
553 | { 0xa2, 0x52 }, | |
554 | { 0x7b, 0x1c }, | |
555 | { 0x7c, 0x28 }, | |
556 | { 0x7d, 0x3c }, | |
557 | { 0x7f, 0x69 }, | |
558 | { REG_COM9, 0x38 }, | |
559 | { 0xa1, 0x0b }, | |
560 | { 0x74, 0x19 }, | |
561 | { 0x9a, 0x80 }, | |
562 | { 0x43, 0x14 }, | |
563 | { REG_COM13, 0xc0 }, | |
564 | { 0xff, 0xff }, | |
565 | }; | |
566 | ||
111f3356 JC |
567 | static struct ov7670_win_size { |
568 | int width; | |
569 | int height; | |
570 | unsigned char com7_bit; | |
571 | int hstart; /* Start/stop values for the camera. Note */ | |
572 | int hstop; /* that they do not always make complete */ | |
573 | int vstart; /* sense to humans, but evidently the sensor */ | |
574 | int vstop; /* will do the right thing... */ | |
f9a76156 | 575 | struct regval_list *regs; /* Regs to tweak */ |
111f3356 JC |
576 | /* h/vref stuff */ |
577 | } ov7670_win_sizes[] = { | |
578 | /* VGA */ | |
579 | { | |
580 | .width = VGA_WIDTH, | |
581 | .height = VGA_HEIGHT, | |
582 | .com7_bit = COM7_FMT_VGA, | |
583 | .hstart = 158, /* These values from */ | |
584 | .hstop = 14, /* Omnivision */ | |
585 | .vstart = 10, | |
586 | .vstop = 490, | |
f9a76156 | 587 | .regs = NULL, |
111f3356 JC |
588 | }, |
589 | /* CIF */ | |
590 | { | |
591 | .width = CIF_WIDTH, | |
592 | .height = CIF_HEIGHT, | |
593 | .com7_bit = COM7_FMT_CIF, | |
594 | .hstart = 170, /* Empirically determined */ | |
595 | .hstop = 90, | |
596 | .vstart = 14, | |
597 | .vstop = 494, | |
f9a76156 | 598 | .regs = NULL, |
111f3356 JC |
599 | }, |
600 | /* QVGA */ | |
601 | { | |
602 | .width = QVGA_WIDTH, | |
603 | .height = QVGA_HEIGHT, | |
604 | .com7_bit = COM7_FMT_QVGA, | |
605 | .hstart = 164, /* Empirically determined */ | |
606 | .hstop = 20, | |
607 | .vstart = 14, | |
608 | .vstop = 494, | |
f9a76156 JC |
609 | .regs = NULL, |
610 | }, | |
611 | /* QCIF */ | |
612 | { | |
613 | .width = QCIF_WIDTH, | |
614 | .height = QCIF_HEIGHT, | |
615 | .com7_bit = COM7_FMT_VGA, /* see comment above */ | |
616 | .hstart = 456, /* Empirically determined */ | |
617 | .hstop = 24, | |
618 | .vstart = 14, | |
619 | .vstop = 494, | |
620 | .regs = ov7670_qcif_regs, | |
111f3356 JC |
621 | }, |
622 | }; | |
623 | ||
0c71bf1c | 624 | #define N_WIN_SIZES (ARRAY_SIZE(ov7670_win_sizes)) |
111f3356 JC |
625 | |
626 | ||
627 | /* | |
628 | * Store a set of start/stop values into the camera. | |
629 | */ | |
630 | static int ov7670_set_hw(struct i2c_client *client, int hstart, int hstop, | |
631 | int vstart, int vstop) | |
632 | { | |
633 | int ret; | |
634 | unsigned char v; | |
635 | /* | |
636 | * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of | |
637 | * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is | |
638 | * a mystery "edge offset" value in the top two bits of href. | |
639 | */ | |
640 | ret = ov7670_write(client, REG_HSTART, (hstart >> 3) & 0xff); | |
641 | ret += ov7670_write(client, REG_HSTOP, (hstop >> 3) & 0xff); | |
642 | ret += ov7670_read(client, REG_HREF, &v); | |
643 | v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7); | |
644 | msleep(10); | |
645 | ret += ov7670_write(client, REG_HREF, v); | |
646 | /* | |
647 | * Vertical: similar arrangement, but only 10 bits. | |
648 | */ | |
649 | ret += ov7670_write(client, REG_VSTART, (vstart >> 2) & 0xff); | |
650 | ret += ov7670_write(client, REG_VSTOP, (vstop >> 2) & 0xff); | |
651 | ret += ov7670_read(client, REG_VREF, &v); | |
652 | v = (v & 0xf0) | ((vstop & 0x3) << 2) | (vstart & 0x3); | |
653 | msleep(10); | |
654 | ret += ov7670_write(client, REG_VREF, v); | |
655 | return ret; | |
656 | } | |
657 | ||
658 | ||
659 | static int ov7670_enum_fmt(struct i2c_client *c, struct v4l2_fmtdesc *fmt) | |
660 | { | |
661 | struct ov7670_format_struct *ofmt; | |
662 | ||
663 | if (fmt->index >= N_OV7670_FMTS) | |
664 | return -EINVAL; | |
665 | ||
666 | ofmt = ov7670_formats + fmt->index; | |
667 | fmt->flags = 0; | |
668 | strcpy(fmt->description, ofmt->desc); | |
669 | fmt->pixelformat = ofmt->pixelformat; | |
670 | return 0; | |
671 | } | |
672 | ||
673 | ||
674 | static int ov7670_try_fmt(struct i2c_client *c, struct v4l2_format *fmt, | |
675 | struct ov7670_format_struct **ret_fmt, | |
676 | struct ov7670_win_size **ret_wsize) | |
677 | { | |
678 | int index; | |
679 | struct ov7670_win_size *wsize; | |
680 | struct v4l2_pix_format *pix = &fmt->fmt.pix; | |
681 | ||
682 | for (index = 0; index < N_OV7670_FMTS; index++) | |
683 | if (ov7670_formats[index].pixelformat == pix->pixelformat) | |
684 | break; | |
cd257a6f DD |
685 | if (index >= N_OV7670_FMTS) { |
686 | /* default to first format */ | |
687 | index = 0; | |
688 | pix->pixelformat = ov7670_formats[0].pixelformat; | |
689 | } | |
111f3356 JC |
690 | if (ret_fmt != NULL) |
691 | *ret_fmt = ov7670_formats + index; | |
692 | /* | |
693 | * Fields: the OV devices claim to be progressive. | |
694 | */ | |
cd257a6f | 695 | pix->field = V4L2_FIELD_NONE; |
111f3356 JC |
696 | /* |
697 | * Round requested image size down to the nearest | |
698 | * we support, but not below the smallest. | |
699 | */ | |
700 | for (wsize = ov7670_win_sizes; wsize < ov7670_win_sizes + N_WIN_SIZES; | |
701 | wsize++) | |
702 | if (pix->width >= wsize->width && pix->height >= wsize->height) | |
703 | break; | |
f9a76156 | 704 | if (wsize >= ov7670_win_sizes + N_WIN_SIZES) |
111f3356 JC |
705 | wsize--; /* Take the smallest one */ |
706 | if (ret_wsize != NULL) | |
707 | *ret_wsize = wsize; | |
708 | /* | |
709 | * Note the size we'll actually handle. | |
710 | */ | |
711 | pix->width = wsize->width; | |
712 | pix->height = wsize->height; | |
585553ec | 713 | pix->bytesperline = pix->width*ov7670_formats[index].bpp; |
111f3356 JC |
714 | pix->sizeimage = pix->height*pix->bytesperline; |
715 | return 0; | |
111f3356 JC |
716 | } |
717 | ||
718 | /* | |
719 | * Set a format. | |
720 | */ | |
721 | static int ov7670_s_fmt(struct i2c_client *c, struct v4l2_format *fmt) | |
722 | { | |
723 | int ret; | |
724 | struct ov7670_format_struct *ovfmt; | |
725 | struct ov7670_win_size *wsize; | |
f9a76156 | 726 | struct ov7670_info *info = i2c_get_clientdata(c); |
edd75ede | 727 | unsigned char com7, clkrc; |
111f3356 JC |
728 | |
729 | ret = ov7670_try_fmt(c, fmt, &ovfmt, &wsize); | |
730 | if (ret) | |
731 | return ret; | |
edd75ede JC |
732 | /* |
733 | * HACK: if we're running rgb565 we need to grab then rewrite | |
734 | * CLKRC. If we're *not*, however, then rewriting clkrc hoses | |
735 | * the colors. | |
736 | */ | |
737 | if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565) { | |
738 | ret = ov7670_read(c, REG_CLKRC, &clkrc); | |
739 | if (ret) | |
740 | return ret; | |
741 | } | |
111f3356 JC |
742 | /* |
743 | * COM7 is a pain in the ass, it doesn't like to be read then | |
744 | * quickly written afterward. But we have everything we need | |
745 | * to set it absolutely here, as long as the format-specific | |
746 | * register sets list it first. | |
747 | */ | |
748 | com7 = ovfmt->regs[0].value; | |
749 | com7 |= wsize->com7_bit; | |
750 | ov7670_write(c, REG_COM7, com7); | |
751 | /* | |
752 | * Now write the rest of the array. Also store start/stops | |
753 | */ | |
754 | ov7670_write_array(c, ovfmt->regs + 1); | |
755 | ov7670_set_hw(c, wsize->hstart, wsize->hstop, wsize->vstart, | |
756 | wsize->vstop); | |
f9a76156 JC |
757 | ret = 0; |
758 | if (wsize->regs) | |
759 | ret = ov7670_write_array(c, wsize->regs); | |
760 | info->fmt = ovfmt; | |
edd75ede JC |
761 | |
762 | if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565 && ret == 0) | |
763 | ret = ov7670_write(c, REG_CLKRC, clkrc); | |
764 | return ret; | |
111f3356 JC |
765 | } |
766 | ||
c8f5b2f5 JC |
767 | /* |
768 | * Implement G/S_PARM. There is a "high quality" mode we could try | |
769 | * to do someday; for now, we just do the frame rate tweak. | |
770 | */ | |
771 | static int ov7670_g_parm(struct i2c_client *c, struct v4l2_streamparm *parms) | |
772 | { | |
773 | struct v4l2_captureparm *cp = &parms->parm.capture; | |
774 | unsigned char clkrc; | |
775 | int ret; | |
776 | ||
777 | if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
778 | return -EINVAL; | |
779 | ret = ov7670_read(c, REG_CLKRC, &clkrc); | |
780 | if (ret < 0) | |
781 | return ret; | |
782 | memset(cp, 0, sizeof(struct v4l2_captureparm)); | |
783 | cp->capability = V4L2_CAP_TIMEPERFRAME; | |
784 | cp->timeperframe.numerator = 1; | |
785 | cp->timeperframe.denominator = OV7670_FRAME_RATE; | |
786 | if ((clkrc & CLK_EXT) == 0 && (clkrc & CLK_SCALE) > 1) | |
787 | cp->timeperframe.denominator /= (clkrc & CLK_SCALE); | |
788 | return 0; | |
789 | } | |
790 | ||
791 | static int ov7670_s_parm(struct i2c_client *c, struct v4l2_streamparm *parms) | |
792 | { | |
793 | struct v4l2_captureparm *cp = &parms->parm.capture; | |
794 | struct v4l2_fract *tpf = &cp->timeperframe; | |
795 | unsigned char clkrc; | |
796 | int ret, div; | |
797 | ||
798 | if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
799 | return -EINVAL; | |
800 | if (cp->extendedmode != 0) | |
801 | return -EINVAL; | |
802 | /* | |
803 | * CLKRC has a reserved bit, so let's preserve it. | |
804 | */ | |
805 | ret = ov7670_read(c, REG_CLKRC, &clkrc); | |
806 | if (ret < 0) | |
807 | return ret; | |
808 | if (tpf->numerator == 0 || tpf->denominator == 0) | |
809 | div = 1; /* Reset to full rate */ | |
810 | else | |
811 | div = (tpf->numerator*OV7670_FRAME_RATE)/tpf->denominator; | |
812 | if (div == 0) | |
813 | div = 1; | |
814 | else if (div > CLK_SCALE) | |
815 | div = CLK_SCALE; | |
816 | clkrc = (clkrc & 0x80) | div; | |
817 | tpf->numerator = 1; | |
818 | tpf->denominator = OV7670_FRAME_RATE/div; | |
819 | return ov7670_write(c, REG_CLKRC, clkrc); | |
820 | } | |
821 | ||
822 | ||
823 | ||
111f3356 JC |
824 | /* |
825 | * Code for dealing with controls. | |
826 | */ | |
827 | ||
f9a76156 JC |
828 | |
829 | ||
830 | ||
831 | ||
832 | static int ov7670_store_cmatrix(struct i2c_client *client, | |
833 | int matrix[CMATRIX_LEN]) | |
834 | { | |
835 | int i, ret; | |
e3bf20de | 836 | unsigned char signbits = 0; |
f9a76156 JC |
837 | |
838 | /* | |
839 | * Weird crap seems to exist in the upper part of | |
840 | * the sign bits register, so let's preserve it. | |
841 | */ | |
842 | ret = ov7670_read(client, REG_CMATRIX_SIGN, &signbits); | |
843 | signbits &= 0xc0; | |
844 | ||
845 | for (i = 0; i < CMATRIX_LEN; i++) { | |
846 | unsigned char raw; | |
847 | ||
848 | if (matrix[i] < 0) { | |
849 | signbits |= (1 << i); | |
850 | if (matrix[i] < -255) | |
851 | raw = 0xff; | |
852 | else | |
853 | raw = (-1 * matrix[i]) & 0xff; | |
854 | } | |
855 | else { | |
856 | if (matrix[i] > 255) | |
857 | raw = 0xff; | |
858 | else | |
859 | raw = matrix[i] & 0xff; | |
860 | } | |
861 | ret += ov7670_write(client, REG_CMATRIX_BASE + i, raw); | |
862 | } | |
863 | ret += ov7670_write(client, REG_CMATRIX_SIGN, signbits); | |
864 | return ret; | |
865 | } | |
866 | ||
867 | ||
868 | /* | |
869 | * Hue also requires messing with the color matrix. It also requires | |
870 | * trig functions, which tend not to be well supported in the kernel. | |
871 | * So here is a simple table of sine values, 0-90 degrees, in steps | |
872 | * of five degrees. Values are multiplied by 1000. | |
873 | * | |
874 | * The following naive approximate trig functions require an argument | |
875 | * carefully limited to -180 <= theta <= 180. | |
876 | */ | |
877 | #define SIN_STEP 5 | |
878 | static const int ov7670_sin_table[] = { | |
879 | 0, 87, 173, 258, 342, 422, | |
880 | 499, 573, 642, 707, 766, 819, | |
881 | 866, 906, 939, 965, 984, 996, | |
882 | 1000 | |
883 | }; | |
884 | ||
885 | static int ov7670_sine(int theta) | |
886 | { | |
887 | int chs = 1; | |
888 | int sine; | |
889 | ||
890 | if (theta < 0) { | |
891 | theta = -theta; | |
892 | chs = -1; | |
893 | } | |
894 | if (theta <= 90) | |
895 | sine = ov7670_sin_table[theta/SIN_STEP]; | |
896 | else { | |
897 | theta -= 90; | |
898 | sine = 1000 - ov7670_sin_table[theta/SIN_STEP]; | |
899 | } | |
900 | return sine*chs; | |
901 | } | |
902 | ||
903 | static int ov7670_cosine(int theta) | |
904 | { | |
905 | theta = 90 - theta; | |
906 | if (theta > 180) | |
907 | theta -= 360; | |
908 | else if (theta < -180) | |
909 | theta += 360; | |
910 | return ov7670_sine(theta); | |
911 | } | |
912 | ||
913 | ||
914 | ||
915 | ||
916 | static void ov7670_calc_cmatrix(struct ov7670_info *info, | |
917 | int matrix[CMATRIX_LEN]) | |
918 | { | |
919 | int i; | |
920 | /* | |
921 | * Apply the current saturation setting first. | |
922 | */ | |
923 | for (i = 0; i < CMATRIX_LEN; i++) | |
924 | matrix[i] = (info->fmt->cmatrix[i]*info->sat) >> 7; | |
925 | /* | |
926 | * Then, if need be, rotate the hue value. | |
927 | */ | |
928 | if (info->hue != 0) { | |
929 | int sinth, costh, tmpmatrix[CMATRIX_LEN]; | |
930 | ||
931 | memcpy(tmpmatrix, matrix, CMATRIX_LEN*sizeof(int)); | |
932 | sinth = ov7670_sine(info->hue); | |
933 | costh = ov7670_cosine(info->hue); | |
934 | ||
935 | matrix[0] = (matrix[3]*sinth + matrix[0]*costh)/1000; | |
936 | matrix[1] = (matrix[4]*sinth + matrix[1]*costh)/1000; | |
937 | matrix[2] = (matrix[5]*sinth + matrix[2]*costh)/1000; | |
938 | matrix[3] = (matrix[3]*costh - matrix[0]*sinth)/1000; | |
939 | matrix[4] = (matrix[4]*costh - matrix[1]*sinth)/1000; | |
940 | matrix[5] = (matrix[5]*costh - matrix[2]*sinth)/1000; | |
941 | } | |
942 | } | |
943 | ||
944 | ||
945 | ||
946 | static int ov7670_t_sat(struct i2c_client *client, int value) | |
947 | { | |
948 | struct ov7670_info *info = i2c_get_clientdata(client); | |
949 | int matrix[CMATRIX_LEN]; | |
950 | int ret; | |
951 | ||
952 | info->sat = value; | |
953 | ov7670_calc_cmatrix(info, matrix); | |
954 | ret = ov7670_store_cmatrix(client, matrix); | |
955 | return ret; | |
956 | } | |
957 | ||
958 | static int ov7670_q_sat(struct i2c_client *client, __s32 *value) | |
959 | { | |
960 | struct ov7670_info *info = i2c_get_clientdata(client); | |
961 | ||
962 | *value = info->sat; | |
963 | return 0; | |
964 | } | |
965 | ||
966 | static int ov7670_t_hue(struct i2c_client *client, int value) | |
967 | { | |
968 | struct ov7670_info *info = i2c_get_clientdata(client); | |
969 | int matrix[CMATRIX_LEN]; | |
970 | int ret; | |
971 | ||
972 | if (value < -180 || value > 180) | |
973 | return -EINVAL; | |
974 | info->hue = value; | |
975 | ov7670_calc_cmatrix(info, matrix); | |
976 | ret = ov7670_store_cmatrix(client, matrix); | |
977 | return ret; | |
978 | } | |
979 | ||
980 | ||
981 | static int ov7670_q_hue(struct i2c_client *client, __s32 *value) | |
982 | { | |
983 | struct ov7670_info *info = i2c_get_clientdata(client); | |
984 | ||
985 | *value = info->hue; | |
986 | return 0; | |
987 | } | |
988 | ||
989 | ||
111f3356 JC |
990 | /* |
991 | * Some weird registers seem to store values in a sign/magnitude format! | |
992 | */ | |
993 | static unsigned char ov7670_sm_to_abs(unsigned char v) | |
994 | { | |
995 | if ((v & 0x80) == 0) | |
996 | return v + 128; | |
997 | else | |
998 | return 128 - (v & 0x7f); | |
999 | } | |
1000 | ||
1001 | ||
1002 | static unsigned char ov7670_abs_to_sm(unsigned char v) | |
1003 | { | |
1004 | if (v > 127) | |
1005 | return v & 0x7f; | |
1006 | else | |
1007 | return (128 - v) | 0x80; | |
1008 | } | |
1009 | ||
f9a76156 | 1010 | static int ov7670_t_brightness(struct i2c_client *client, int value) |
111f3356 | 1011 | { |
e3bf20de | 1012 | unsigned char com8 = 0, v; |
111f3356 JC |
1013 | int ret; |
1014 | ||
1015 | ov7670_read(client, REG_COM8, &com8); | |
1016 | com8 &= ~COM8_AEC; | |
1017 | ov7670_write(client, REG_COM8, com8); | |
f9a76156 JC |
1018 | v = ov7670_abs_to_sm(value); |
1019 | ret = ov7670_write(client, REG_BRIGHT, v); | |
111f3356 JC |
1020 | return ret; |
1021 | } | |
1022 | ||
f9a76156 | 1023 | static int ov7670_q_brightness(struct i2c_client *client, __s32 *value) |
111f3356 | 1024 | { |
e3bf20de | 1025 | unsigned char v = 0; |
f9a76156 JC |
1026 | int ret = ov7670_read(client, REG_BRIGHT, &v); |
1027 | ||
1028 | *value = ov7670_sm_to_abs(v); | |
111f3356 JC |
1029 | return ret; |
1030 | } | |
1031 | ||
f9a76156 | 1032 | static int ov7670_t_contrast(struct i2c_client *client, int value) |
111f3356 | 1033 | { |
f9a76156 | 1034 | return ov7670_write(client, REG_CONTRAS, (unsigned char) value); |
111f3356 JC |
1035 | } |
1036 | ||
f9a76156 | 1037 | static int ov7670_q_contrast(struct i2c_client *client, __s32 *value) |
111f3356 | 1038 | { |
e3bf20de | 1039 | unsigned char v = 0; |
f9a76156 JC |
1040 | int ret = ov7670_read(client, REG_CONTRAS, &v); |
1041 | ||
1042 | *value = v; | |
1043 | return ret; | |
111f3356 JC |
1044 | } |
1045 | ||
f9a76156 | 1046 | static int ov7670_q_hflip(struct i2c_client *client, __s32 *value) |
111f3356 JC |
1047 | { |
1048 | int ret; | |
e3bf20de | 1049 | unsigned char v = 0; |
111f3356 JC |
1050 | |
1051 | ret = ov7670_read(client, REG_MVFP, &v); | |
1052 | *value = (v & MVFP_MIRROR) == MVFP_MIRROR; | |
1053 | return ret; | |
1054 | } | |
1055 | ||
1056 | ||
f9a76156 | 1057 | static int ov7670_t_hflip(struct i2c_client *client, int value) |
111f3356 | 1058 | { |
e3bf20de | 1059 | unsigned char v = 0; |
111f3356 JC |
1060 | int ret; |
1061 | ||
1062 | ret = ov7670_read(client, REG_MVFP, &v); | |
1063 | if (value) | |
1064 | v |= MVFP_MIRROR; | |
1065 | else | |
1066 | v &= ~MVFP_MIRROR; | |
1067 | msleep(10); /* FIXME */ | |
1068 | ret += ov7670_write(client, REG_MVFP, v); | |
1069 | return ret; | |
1070 | } | |
1071 | ||
1072 | ||
1073 | ||
f9a76156 | 1074 | static int ov7670_q_vflip(struct i2c_client *client, __s32 *value) |
111f3356 JC |
1075 | { |
1076 | int ret; | |
e3bf20de | 1077 | unsigned char v = 0; |
111f3356 JC |
1078 | |
1079 | ret = ov7670_read(client, REG_MVFP, &v); | |
1080 | *value = (v & MVFP_FLIP) == MVFP_FLIP; | |
1081 | return ret; | |
1082 | } | |
1083 | ||
1084 | ||
f9a76156 | 1085 | static int ov7670_t_vflip(struct i2c_client *client, int value) |
111f3356 | 1086 | { |
e3bf20de | 1087 | unsigned char v = 0; |
111f3356 JC |
1088 | int ret; |
1089 | ||
1090 | ret = ov7670_read(client, REG_MVFP, &v); | |
1091 | if (value) | |
1092 | v |= MVFP_FLIP; | |
1093 | else | |
1094 | v &= ~MVFP_FLIP; | |
1095 | msleep(10); /* FIXME */ | |
1096 | ret += ov7670_write(client, REG_MVFP, v); | |
1097 | return ret; | |
1098 | } | |
1099 | ||
1100 | ||
1101 | static struct ov7670_control { | |
1102 | struct v4l2_queryctrl qc; | |
f9a76156 JC |
1103 | int (*query)(struct i2c_client *c, __s32 *value); |
1104 | int (*tweak)(struct i2c_client *c, int value); | |
111f3356 JC |
1105 | } ov7670_controls[] = |
1106 | { | |
1107 | { | |
1108 | .qc = { | |
1109 | .id = V4L2_CID_BRIGHTNESS, | |
1110 | .type = V4L2_CTRL_TYPE_INTEGER, | |
1111 | .name = "Brightness", | |
1112 | .minimum = 0, | |
1113 | .maximum = 255, | |
1114 | .step = 1, | |
1115 | .default_value = 0x80, | |
1116 | .flags = V4L2_CTRL_FLAG_SLIDER | |
1117 | }, | |
1118 | .tweak = ov7670_t_brightness, | |
1119 | .query = ov7670_q_brightness, | |
1120 | }, | |
1121 | { | |
1122 | .qc = { | |
1123 | .id = V4L2_CID_CONTRAST, | |
1124 | .type = V4L2_CTRL_TYPE_INTEGER, | |
1125 | .name = "Contrast", | |
1126 | .minimum = 0, | |
1127 | .maximum = 127, | |
1128 | .step = 1, | |
1129 | .default_value = 0x40, /* XXX ov7670 spec */ | |
1130 | .flags = V4L2_CTRL_FLAG_SLIDER | |
1131 | }, | |
1132 | .tweak = ov7670_t_contrast, | |
1133 | .query = ov7670_q_contrast, | |
1134 | }, | |
f9a76156 JC |
1135 | { |
1136 | .qc = { | |
1137 | .id = V4L2_CID_SATURATION, | |
1138 | .type = V4L2_CTRL_TYPE_INTEGER, | |
1139 | .name = "Saturation", | |
1140 | .minimum = 0, | |
1141 | .maximum = 256, | |
1142 | .step = 1, | |
1143 | .default_value = 0x80, | |
1144 | .flags = V4L2_CTRL_FLAG_SLIDER | |
1145 | }, | |
1146 | .tweak = ov7670_t_sat, | |
1147 | .query = ov7670_q_sat, | |
1148 | }, | |
1149 | { | |
1150 | .qc = { | |
1151 | .id = V4L2_CID_HUE, | |
1152 | .type = V4L2_CTRL_TYPE_INTEGER, | |
1153 | .name = "HUE", | |
1154 | .minimum = -180, | |
1155 | .maximum = 180, | |
1156 | .step = 5, | |
1157 | .default_value = 0, | |
1158 | .flags = V4L2_CTRL_FLAG_SLIDER | |
1159 | }, | |
1160 | .tweak = ov7670_t_hue, | |
1161 | .query = ov7670_q_hue, | |
1162 | }, | |
111f3356 JC |
1163 | { |
1164 | .qc = { | |
1165 | .id = V4L2_CID_VFLIP, | |
1166 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
1167 | .name = "Vertical flip", | |
1168 | .minimum = 0, | |
1169 | .maximum = 1, | |
1170 | .step = 1, | |
1171 | .default_value = 0, | |
1172 | }, | |
1173 | .tweak = ov7670_t_vflip, | |
1174 | .query = ov7670_q_vflip, | |
1175 | }, | |
1176 | { | |
1177 | .qc = { | |
1178 | .id = V4L2_CID_HFLIP, | |
1179 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
1180 | .name = "Horizontal mirror", | |
1181 | .minimum = 0, | |
1182 | .maximum = 1, | |
1183 | .step = 1, | |
1184 | .default_value = 0, | |
1185 | }, | |
1186 | .tweak = ov7670_t_hflip, | |
1187 | .query = ov7670_q_hflip, | |
1188 | }, | |
1189 | }; | |
0c71bf1c | 1190 | #define N_CONTROLS (ARRAY_SIZE(ov7670_controls)) |
111f3356 JC |
1191 | |
1192 | static struct ov7670_control *ov7670_find_control(__u32 id) | |
1193 | { | |
1194 | int i; | |
1195 | ||
1196 | for (i = 0; i < N_CONTROLS; i++) | |
1197 | if (ov7670_controls[i].qc.id == id) | |
1198 | return ov7670_controls + i; | |
1199 | return NULL; | |
1200 | } | |
1201 | ||
1202 | ||
1203 | static int ov7670_queryctrl(struct i2c_client *client, | |
1204 | struct v4l2_queryctrl *qc) | |
1205 | { | |
1206 | struct ov7670_control *ctrl = ov7670_find_control(qc->id); | |
1207 | ||
1208 | if (ctrl == NULL) | |
1209 | return -EINVAL; | |
1210 | *qc = ctrl->qc; | |
1211 | return 0; | |
1212 | } | |
1213 | ||
1214 | static int ov7670_g_ctrl(struct i2c_client *client, struct v4l2_control *ctrl) | |
1215 | { | |
1216 | struct ov7670_control *octrl = ov7670_find_control(ctrl->id); | |
1217 | int ret; | |
111f3356 JC |
1218 | |
1219 | if (octrl == NULL) | |
1220 | return -EINVAL; | |
f9a76156 JC |
1221 | ret = octrl->query(client, &ctrl->value); |
1222 | if (ret >= 0) | |
111f3356 | 1223 | return 0; |
111f3356 JC |
1224 | return ret; |
1225 | } | |
1226 | ||
1227 | static int ov7670_s_ctrl(struct i2c_client *client, struct v4l2_control *ctrl) | |
1228 | { | |
1229 | struct ov7670_control *octrl = ov7670_find_control(ctrl->id); | |
f9a76156 | 1230 | int ret; |
111f3356 JC |
1231 | |
1232 | if (octrl == NULL) | |
1233 | return -EINVAL; | |
f9a76156 JC |
1234 | ret = octrl->tweak(client, ctrl->value); |
1235 | if (ret >= 0) | |
1236 | return 0; | |
1237 | return ret; | |
111f3356 JC |
1238 | } |
1239 | ||
1240 | ||
1241 | ||
1242 | ||
1243 | ||
1244 | ||
111f3356 JC |
1245 | /* |
1246 | * Basic i2c stuff. | |
1247 | */ | |
1248 | static struct i2c_driver ov7670_driver; | |
1249 | ||
1250 | static int ov7670_attach(struct i2c_adapter *adapter) | |
1251 | { | |
1252 | int ret; | |
1253 | struct i2c_client *client; | |
f9a76156 | 1254 | struct ov7670_info *info; |
111f3356 | 1255 | |
111f3356 JC |
1256 | /* |
1257 | * For now: only deal with adapters we recognize. | |
1258 | */ | |
1259 | if (adapter->id != I2C_HW_SMBUS_CAFE) | |
1260 | return -ENODEV; | |
1261 | ||
111f3356 JC |
1262 | client = kzalloc(sizeof (struct i2c_client), GFP_KERNEL); |
1263 | if (! client) | |
1264 | return -ENOMEM; | |
1265 | client->adapter = adapter; | |
1266 | client->addr = OV7670_I2C_ADDR; | |
1267 | client->driver = &ov7670_driver, | |
1268 | strcpy(client->name, "OV7670"); | |
f9a76156 JC |
1269 | /* |
1270 | * Set up our info structure. | |
1271 | */ | |
1272 | info = kzalloc(sizeof (struct ov7670_info), GFP_KERNEL); | |
1273 | if (! info) { | |
1274 | ret = -ENOMEM; | |
1275 | goto out_free; | |
1276 | } | |
1277 | info->fmt = &ov7670_formats[0]; | |
1278 | info->sat = 128; /* Review this */ | |
1279 | i2c_set_clientdata(client, info); | |
111f3356 JC |
1280 | |
1281 | /* | |
1282 | * Make sure it's an ov7670 | |
1283 | */ | |
1284 | ret = ov7670_detect(client); | |
111f3356 | 1285 | if (ret) |
f9a76156 | 1286 | goto out_free_info; |
edd75ede JC |
1287 | ret = i2c_attach_client(client); |
1288 | if (ret) | |
1289 | goto out_free_info; | |
111f3356 JC |
1290 | return 0; |
1291 | ||
f9a76156 JC |
1292 | out_free_info: |
1293 | kfree(info); | |
111f3356 JC |
1294 | out_free: |
1295 | kfree(client); | |
1296 | return ret; | |
1297 | } | |
1298 | ||
1299 | ||
1300 | static int ov7670_detach(struct i2c_client *client) | |
1301 | { | |
1302 | i2c_detach_client(client); | |
f9a76156 | 1303 | kfree(i2c_get_clientdata(client)); |
111f3356 JC |
1304 | kfree(client); |
1305 | return 0; | |
1306 | } | |
1307 | ||
1308 | ||
1309 | static int ov7670_command(struct i2c_client *client, unsigned int cmd, | |
1310 | void *arg) | |
1311 | { | |
1312 | switch (cmd) { | |
3434eb7e HV |
1313 | case VIDIOC_G_CHIP_IDENT: |
1314 | return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_OV7670, 0); | |
111f3356 JC |
1315 | |
1316 | case VIDIOC_INT_RESET: | |
1317 | ov7670_reset(client); | |
1318 | return 0; | |
1319 | ||
1320 | case VIDIOC_INT_INIT: | |
1321 | return ov7670_init(client); | |
1322 | ||
1323 | case VIDIOC_ENUM_FMT: | |
1324 | return ov7670_enum_fmt(client, (struct v4l2_fmtdesc *) arg); | |
1325 | case VIDIOC_TRY_FMT: | |
1326 | return ov7670_try_fmt(client, (struct v4l2_format *) arg, NULL, NULL); | |
1327 | case VIDIOC_S_FMT: | |
1328 | return ov7670_s_fmt(client, (struct v4l2_format *) arg); | |
1329 | case VIDIOC_QUERYCTRL: | |
1330 | return ov7670_queryctrl(client, (struct v4l2_queryctrl *) arg); | |
1331 | case VIDIOC_S_CTRL: | |
1332 | return ov7670_s_ctrl(client, (struct v4l2_control *) arg); | |
1333 | case VIDIOC_G_CTRL: | |
1334 | return ov7670_g_ctrl(client, (struct v4l2_control *) arg); | |
c8f5b2f5 JC |
1335 | case VIDIOC_S_PARM: |
1336 | return ov7670_s_parm(client, (struct v4l2_streamparm *) arg); | |
1337 | case VIDIOC_G_PARM: | |
1338 | return ov7670_g_parm(client, (struct v4l2_streamparm *) arg); | |
111f3356 JC |
1339 | } |
1340 | return -EINVAL; | |
1341 | } | |
1342 | ||
1343 | ||
1344 | ||
1345 | static struct i2c_driver ov7670_driver = { | |
1346 | .driver = { | |
1347 | .name = "ov7670", | |
1348 | }, | |
1349 | .id = I2C_DRIVERID_OV7670, | |
1350 | .class = I2C_CLASS_CAM_DIGITAL, | |
1351 | .attach_adapter = ov7670_attach, | |
1352 | .detach_client = ov7670_detach, | |
1353 | .command = ov7670_command, | |
1354 | }; | |
1355 | ||
1356 | ||
1357 | /* | |
1358 | * Module initialization | |
1359 | */ | |
1360 | static int __init ov7670_mod_init(void) | |
1361 | { | |
1362 | printk(KERN_NOTICE "OmniVision ov7670 sensor driver, at your service\n"); | |
1363 | return i2c_add_driver(&ov7670_driver); | |
1364 | } | |
1365 | ||
1366 | static void __exit ov7670_mod_exit(void) | |
1367 | { | |
1368 | i2c_del_driver(&ov7670_driver); | |
1369 | } | |
1370 | ||
1371 | module_init(ov7670_mod_init); | |
1372 | module_exit(ov7670_mod_exit); |