projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[linux-block.git] / drivers / media / video / mx1_camera.c
CommitLineData
6acc81c3
PZ		 1/*
2 * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
3 *
4 * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
6 *
7 * Based on PXA SoC camera driver
8 * Copyright (C) 2006, Sascha Hauer, Pengutronix
9 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/clk.h>
17#include <linux/delay.h>
18#include <linux/device.h>
19#include <linux/dma-mapping.h>
20#include <linux/errno.h>
21#include <linux/fs.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/io.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/moduleparam.h>
29#include <linux/mutex.h>
30#include <linux/platform_device.h>
f39c1ab3 31#include <linux/sched.h>
5a0e3ad6 32#include <linux/slab.h>
6acc81c3
PZ		 33#include <linux/time.h>
34#include <linux/version.h>
35#include <linux/videodev2.h>
36
37#include <media/soc_camera.h>
38#include <media/v4l2-common.h>
39#include <media/v4l2-dev.h>
40#include <media/videobuf-dma-contig.h>
760697be 41#include <media/soc_mediabus.h>
6acc81c3
PZ		 42
43#include <asm/dma.h>
44#include <asm/fiq.h>
45#include <mach/dma-mx1-mx2.h>
46#include <mach/hardware.h>
47#include <mach/mx1_camera.h>
48
49/*
50 * CSI registers
51 */
52#define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
53#define DMA_DIMR 0x08 /* Interrupt mask Register */
54#define CSICR1 0x00 /* CSI Control Register 1 */
55#define CSISR 0x08 /* CSI Status Register */
56#define CSIRXR 0x10 /* CSI RxFIFO Register */
57
58#define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
59#define CSICR1_SOF_POL (1 << 17)
60#define CSICR1_SOF_INTEN (1 << 16)
61#define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
62#define CSICR1_MCLKEN (1 << 9)
63#define CSICR1_FCC (1 << 8)
64#define CSICR1_BIG_ENDIAN (1 << 7)
65#define CSICR1_CLR_RXFIFO (1 << 5)
66#define CSICR1_GCLK_MODE (1 << 4)
67#define CSICR1_DATA_POL (1 << 2)
68#define CSICR1_REDGE (1 << 1)
69#define CSICR1_EN (1 << 0)
70
71#define CSISR_SFF_OR_INT (1 << 25)
72#define CSISR_RFF_OR_INT (1 << 24)
73#define CSISR_STATFF_INT (1 << 21)
74#define CSISR_RXFF_INT (1 << 18)
75#define CSISR_SOF_INT (1 << 16)
76#define CSISR_DRDY (1 << 0)
77
78#define VERSION_CODE KERNEL_VERSION(0, 0, 1)
79#define DRIVER_NAME "mx1-camera"
80
81#define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
82 CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
83
84#define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
85 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
86 SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
87 SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
88 SOCAM_DATAWIDTH_8)
89
90#define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
91
92/*
93 * Structures
94 */
95
96/* buffer for one video frame */
97struct mx1_buffer {
98 /* common v4l buffer stuff -- must be first */
760697be
GL		 99 struct videobuf_buffer vb;
100 enum v4l2_mbus_pixelcode code;
101 int inwork;
6acc81c3
PZ		 102};
103
5d28d525
GL		 104/*
105 * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
6acc81c3 106 * Interface. If anyone ever builds hardware to enable more than
5d28d525
GL		 107 * one camera, they will have to modify this driver too
108 */
6acc81c3 109struct mx1_camera_dev {
eb6c8558 110 struct soc_camera_host soc_host;
6acc81c3
PZ		 111 struct soc_camera_device *icd;
112 struct mx1_camera_pdata *pdata;
113 struct mx1_buffer *active;
6acc81c3
PZ		 114 struct resource *res;
115 struct clk *clk;
116 struct list_head capture;
117
118 void __iomem *base;
119 int dma_chan;
120 unsigned int irq;
121 unsigned long mclk;
122
123 spinlock_t lock;
124};
125
126/*
127 * Videobuf operations
128 */
129static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
130 unsigned int *size)
131{
132 struct soc_camera_device *icd = vq->priv_data;
760697be
GL		 133 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
134 icd->current_fmt->host_fmt);
6acc81c3 135
760697be
GL		 136 if (bytes_per_line < 0)
137 return bytes_per_line;
138
139 *size = bytes_per_line * icd->user_height;
6acc81c3
PZ		 140
141 if (!*count)
142 *count = 32;
143
144 while (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
145 (*count)--;
146
0166b743 147 dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size);
6acc81c3
PZ		 148
149 return 0;
150}
151
152static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
153{
154 struct soc_camera_device *icd = vq->priv_data;
155 struct videobuf_buffer *vb = &buf->vb;
156
157 BUG_ON(in_interrupt());
158
0166b743 159 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 160 vb, vb->baddr, vb->bsize);
161
5d28d525
GL		 162 /*
163 * This waits until this buffer is out of danger, i.e., until it is no
164 * longer in STATE_QUEUED or STATE_ACTIVE
165 */
6acc81c3
PZ		 166 videobuf_waiton(vb, 0, 0);
167 videobuf_dma_contig_free(vq, vb);
168
169 vb->state = VIDEOBUF_NEEDS_INIT;
170}
171
172static int mx1_videobuf_prepare(struct videobuf_queue *vq,
173 struct videobuf_buffer *vb, enum v4l2_field field)
174{
175 struct soc_camera_device *icd = vq->priv_data;
176 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
177 int ret;
760697be
GL		 178 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
179 icd->current_fmt->host_fmt);
180
181 if (bytes_per_line < 0)
182 return bytes_per_line;
6acc81c3 183
0166b743 184 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 185 vb, vb->baddr, vb->bsize);
186
187 /* Added list head initialization on alloc */
188 WARN_ON(!list_empty(&vb->queue));
189
190 BUG_ON(NULL == icd->current_fmt);
191
5d28d525
GL		 192 /*
193 * I think, in buf_prepare you only have to protect global data,
194 * the actual buffer is yours
195 */
6acc81c3
PZ		 196 buf->inwork = 1;
197
760697be 198 if (buf->code != icd->current_fmt->code ||
6a6c8786
GL		 199 vb->width != icd->user_width ||
200 vb->height != icd->user_height ||
6acc81c3 201 vb->field != field) {
760697be 202 buf->code = icd->current_fmt->code;
6a6c8786
GL		 203 vb->width = icd->user_width;
204 vb->height = icd->user_height;
6acc81c3
PZ		 205 vb->field = field;
206 vb->state = VIDEOBUF_NEEDS_INIT;
207 }
208
760697be 209 vb->size = bytes_per_line * vb->height;
6acc81c3
PZ		 210 if (0 != vb->baddr && vb->bsize < vb->size) {
211 ret = -EINVAL;
212 goto out;
213 }
214
215 if (vb->state == VIDEOBUF_NEEDS_INIT) {
216 ret = videobuf_iolock(vq, vb, NULL);
217 if (ret)
218 goto fail;
219
220 vb->state = VIDEOBUF_PREPARED;
221 }
222
223 buf->inwork = 0;
224
225 return 0;
226
227fail:
228 free_buffer(vq, buf);
229out:
230 buf->inwork = 0;
231 return ret;
232}
233
234static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
235{
236 struct videobuf_buffer *vbuf = &pcdev->active->vb;
0166b743 237 struct device *dev = pcdev->icd->dev.parent;
6acc81c3
PZ		 238 int ret;
239
240 if (unlikely(!pcdev->active)) {
0166b743 241 dev_err(dev, "DMA End IRQ with no active buffer\n");
6acc81c3
PZ		 242 return -EFAULT;
243 }
244
245 /* setup sg list for future DMA */
246 ret = imx_dma_setup_single(pcdev->dma_chan,
247 videobuf_to_dma_contig(vbuf),
248 vbuf->size, pcdev->res->start +
249 CSIRXR, DMA_MODE_READ);
250 if (unlikely(ret))
0166b743 251 dev_err(dev, "Failed to setup DMA sg list\n");
6acc81c3
PZ		 252
253 return ret;
254}
255
2dd54a54 256/* Called under spinlock_irqsave(&pcdev->lock, ...) */
6acc81c3
PZ		 257static void mx1_videobuf_queue(struct videobuf_queue *vq,
258 struct videobuf_buffer *vb)
259{
260 struct soc_camera_device *icd = vq->priv_data;
261 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
262 struct mx1_camera_dev *pcdev = ici->priv;
263 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
6acc81c3 264
0166b743 265 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 266 vb, vb->baddr, vb->bsize);
267
6acc81c3
PZ		 268 list_add_tail(&vb->queue, &pcdev->capture);
269
270 vb->state = VIDEOBUF_ACTIVE;
271
272 if (!pcdev->active) {
273 pcdev->active = buf;
274
275 /* setup sg list for future DMA */
276 if (!mx1_camera_setup_dma(pcdev)) {
277 unsigned int temp;
278 /* enable SOF irq */
279 temp = __raw_readl(pcdev->base + CSICR1) |
280 CSICR1_SOF_INTEN;
281 __raw_writel(temp, pcdev->base + CSICR1);
282 }
283 }
6acc81c3
PZ		 284}
285
286static void mx1_videobuf_release(struct videobuf_queue *vq,
287 struct videobuf_buffer *vb)
288{
289 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
290#ifdef DEBUG
291 struct soc_camera_device *icd = vq->priv_data;
0166b743 292 struct device *dev = icd->dev.parent;
6acc81c3 293
0166b743 294 dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 295 vb, vb->baddr, vb->bsize);
296
297 switch (vb->state) {
298 case VIDEOBUF_ACTIVE:
0166b743 299 dev_dbg(dev, "%s (active)\n", __func__);
6acc81c3
PZ		 300 break;
301 case VIDEOBUF_QUEUED:
0166b743 302 dev_dbg(dev, "%s (queued)\n", __func__);
6acc81c3
PZ		 303 break;
304 case VIDEOBUF_PREPARED:
0166b743 305 dev_dbg(dev, "%s (prepared)\n", __func__);
6acc81c3
PZ		 306 break;
307 default:
0166b743 308 dev_dbg(dev, "%s (unknown)\n", __func__);
6acc81c3
PZ		 309 break;
310 }
311#endif
312
313 free_buffer(vq, buf);
314}
315
316static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
317 struct videobuf_buffer *vb,
318 struct mx1_buffer *buf)
319{
320 /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
321 list_del_init(&vb->queue);
322 vb->state = VIDEOBUF_DONE;
323 do_gettimeofday(&vb->ts);
324 vb->field_count++;
325 wake_up(&vb->done);
326
327 if (list_empty(&pcdev->capture)) {
328 pcdev->active = NULL;
329 return;
330 }
331
332 pcdev->active = list_entry(pcdev->capture.next,
333 struct mx1_buffer, vb.queue);
334
335 /* setup sg list for future DMA */
336 if (likely(!mx1_camera_setup_dma(pcdev))) {
337 unsigned int temp;
338
339 /* enable SOF irq */
340 temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
341 __raw_writel(temp, pcdev->base + CSICR1);
342 }
343}
344
345static void mx1_camera_dma_irq(int channel, void *data)
346{
347 struct mx1_camera_dev *pcdev = data;
0166b743 348 struct device *dev = pcdev->icd->dev.parent;
6acc81c3
PZ		 349 struct mx1_buffer *buf;
350 struct videobuf_buffer *vb;
351 unsigned long flags;
352
353 spin_lock_irqsave(&pcdev->lock, flags);
354
355 imx_dma_disable(channel);
356
357 if (unlikely(!pcdev->active)) {
0166b743 358 dev_err(dev, "DMA End IRQ with no active buffer\n");
6acc81c3
PZ		 359 goto out;
360 }
361
362 vb = &pcdev->active->vb;
363 buf = container_of(vb, struct mx1_buffer, vb);
364 WARN_ON(buf->inwork || list_empty(&vb->queue));
0166b743 365 dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 366 vb, vb->baddr, vb->bsize);
367
368 mx1_camera_wakeup(pcdev, vb, buf);
369out:
370 spin_unlock_irqrestore(&pcdev->lock, flags);
371}
372
373static struct videobuf_queue_ops mx1_videobuf_ops = {
374 .buf_setup = mx1_videobuf_setup,
375 .buf_prepare = mx1_videobuf_prepare,
376 .buf_queue = mx1_videobuf_queue,
377 .buf_release = mx1_videobuf_release,
378};
379
380static void mx1_camera_init_videobuf(struct videobuf_queue *q,
381 struct soc_camera_device *icd)
382{
383 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
384 struct mx1_camera_dev *pcdev = ici->priv;
385
979ea1dd 386 videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent,
6acc81c3
PZ		 387 &pcdev->lock,
388 V4L2_BUF_TYPE_VIDEO_CAPTURE,
389 V4L2_FIELD_NONE,
390 sizeof(struct mx1_buffer), icd);
391}
392
393static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
394{
395 unsigned int mclk = pcdev->mclk;
396 unsigned long div;
397 unsigned long lcdclk;
398
399 lcdclk = clk_get_rate(pcdev->clk);
400
5d28d525
GL		 401 /*
402 * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
403 * they get a nice Oops
404 */
6acc81c3
PZ		 405 div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
406
0166b743
GL		 407 dev_dbg(pcdev->icd->dev.parent,
408 "System clock %lukHz, target freq %dkHz, divisor %lu\n",
409 lcdclk / 1000, mclk / 1000, div);
6acc81c3
PZ		 410
411 return div;
412}
413
414static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
415{
416 unsigned int csicr1 = CSICR1_EN;
417
979ea1dd 418 dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
6acc81c3
PZ		 419
420 clk_enable(pcdev->clk);
421
422 /* enable CSI before doing anything else */
423 __raw_writel(csicr1, pcdev->base + CSICR1);
424
425 csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
426 csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
427 csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
428
429 __raw_writel(csicr1, pcdev->base + CSICR1);
430}
431
432static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
433{
979ea1dd 434 dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
6acc81c3
PZ		 435
436 /* Disable all CSI interface */
437 __raw_writel(0x00, pcdev->base + CSICR1);
438
439 clk_disable(pcdev->clk);
440}
441
5d28d525
GL		 442/*
443 * The following two functions absolutely depend on the fact, that
444 * there can be only one camera on i.MX1/i.MXL camera sensor interface
445 */
6acc81c3
PZ		 446static int mx1_camera_add_device(struct soc_camera_device *icd)
447{
448 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
449 struct mx1_camera_dev *pcdev = ici->priv;
450 int ret;
451
452 if (pcdev->icd) {
453 ret = -EBUSY;
454 goto ebusy;
455 }
456
0166b743 457 dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n",
6acc81c3
PZ		 458 icd->devnum);
459
460 mx1_camera_activate(pcdev);
6acc81c3 461
979ea1dd 462 pcdev->icd = icd;
6acc81c3
PZ		 463
464ebusy:
465 return ret;
466}
467
468static void mx1_camera_remove_device(struct soc_camera_device *icd)
469{
470 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
471 struct mx1_camera_dev *pcdev = ici->priv;
472 unsigned int csicr1;
473
474 BUG_ON(icd != pcdev->icd);
475
476 /* disable interrupts */
477 csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
478 __raw_writel(csicr1, pcdev->base + CSICR1);
479
480 /* Stop DMA engine */
481 imx_dma_disable(pcdev->dma_chan);
482
0166b743 483 dev_info(icd->dev.parent, "MX1 Camera driver detached from camera %d\n",
6acc81c3
PZ		 484 icd->devnum);
485
6acc81c3
PZ		 486 mx1_camera_deactivate(pcdev);
487
488 pcdev->icd = NULL;
489}
490
491static int mx1_camera_set_crop(struct soc_camera_device *icd,
08590b96 492 struct v4l2_crop *a)
6acc81c3 493{
c9c1f1c0 494 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
08590b96
GL		 495
496 return v4l2_subdev_call(sd, video, s_crop, a);
6acc81c3
PZ		 497}
498
499static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
500{
501 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
502 struct mx1_camera_dev *pcdev = ici->priv;
503 unsigned long camera_flags, common_flags;
504 unsigned int csicr1;
505 int ret;
506
507 camera_flags = icd->ops->query_bus_param(icd);
508
509 /* MX1 supports only 8bit buswidth */
510 common_flags = soc_camera_bus_param_compatible(camera_flags,
760697be 511 CSI_BUS_FLAGS);
6acc81c3
PZ		 512 if (!common_flags)
513 return -EINVAL;
514
6acc81c3
PZ		 515 /* Make choises, based on platform choice */
516 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
517 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
518 if (!pcdev->pdata ||
519 pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
520 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
521 else
522 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
523 }
524
525 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
526 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
527 if (!pcdev->pdata ||
528 pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
529 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
530 else
531 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
532 }
533
534 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
535 (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
536 if (!pcdev->pdata ||
537 pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
538 common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
539 else
540 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
541 }
542
543 ret = icd->ops->set_bus_param(icd, common_flags);
544 if (ret < 0)
545 return ret;
546
547 csicr1 = __raw_readl(pcdev->base + CSICR1);
548
549 if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
550 csicr1 |= CSICR1_REDGE;
551 if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
552 csicr1 |= CSICR1_SOF_POL;
553 if (common_flags & SOCAM_DATA_ACTIVE_LOW)
554 csicr1 |= CSICR1_DATA_POL;
555
556 __raw_writel(csicr1, pcdev->base + CSICR1);
557
558 return 0;
559}
560
561static int mx1_camera_set_fmt(struct soc_camera_device *icd,
562 struct v4l2_format *f)
563{
c9c1f1c0 564 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
6acc81c3
PZ		 565 const struct soc_camera_format_xlate *xlate;
566 struct v4l2_pix_format *pix = &f->fmt.pix;
760697be
GL		 567 struct v4l2_mbus_framefmt mf;
568 int ret, buswidth;
6acc81c3
PZ		 569
570 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
571 if (!xlate) {
96c75399
GL		 572 dev_warn(icd->dev.parent, "Format %x not found\n",
573 pix->pixelformat);
6acc81c3
PZ		 574 return -EINVAL;
575 }
576
760697be
GL		 577 buswidth = xlate->host_fmt->bits_per_sample;
578 if (buswidth > 8) {
579 dev_warn(icd->dev.parent,
580 "bits-per-sample %d for format %x unsupported\n",
581 buswidth, pix->pixelformat);
582 return -EINVAL;
6acc81c3
PZ		 583 }
584
760697be
GL		 585 mf.width = pix->width;
586 mf.height = pix->height;
587 mf.field = pix->field;
588 mf.colorspace = pix->colorspace;
589 mf.code = xlate->code;
590
591 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
592 if (ret < 0)
593 return ret;
594
595 if (mf.code != xlate->code)
596 return -EINVAL;
597
598 pix->width = mf.width;
599 pix->height = mf.height;
600 pix->field = mf.field;
601 pix->colorspace = mf.colorspace;
602 icd->current_fmt = xlate;
603
6acc81c3
PZ		 604 return ret;
605}
606
607static int mx1_camera_try_fmt(struct soc_camera_device *icd,
608 struct v4l2_format *f)
609{
c9c1f1c0 610 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
760697be
GL		 611 const struct soc_camera_format_xlate *xlate;
612 struct v4l2_pix_format *pix = &f->fmt.pix;
613 struct v4l2_mbus_framefmt mf;
614 int ret;
6acc81c3
PZ		 615 /* TODO: limit to mx1 hardware capabilities */
616
760697be
GL		 617 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
618 if (!xlate) {
619 dev_warn(icd->dev.parent, "Format %x not found\n",
620 pix->pixelformat);
621 return -EINVAL;
622 }
623
624 mf.width = pix->width;
625 mf.height = pix->height;
626 mf.field = pix->field;
627 mf.colorspace = pix->colorspace;
628 mf.code = xlate->code;
629
6acc81c3 630 /* limit to sensor capabilities */
760697be
GL		 631 ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
632 if (ret < 0)
633 return ret;
634
635 pix->width = mf.width;
636 pix->height = mf.height;
637 pix->field = mf.field;
638 pix->colorspace = mf.colorspace;
639
640 return 0;
6acc81c3
PZ		 641}
642
643static int mx1_camera_reqbufs(struct soc_camera_file *icf,
644 struct v4l2_requestbuffers *p)
645{
646 int i;
647
5d28d525
GL		 648 /*
649 * This is for locking debugging only. I removed spinlocks and now I
6acc81c3
PZ		 650 * check whether .prepare is ever called on a linked buffer, or whether
651 * a dma IRQ can occur for an in-work or unlinked buffer. Until now
5d28d525
GL		 652 * it hadn't triggered
653 */
6acc81c3
PZ		 654 for (i = 0; i < p->count; i++) {
655 struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
656 struct mx1_buffer, vb);
657 buf->inwork = 0;
658 INIT_LIST_HEAD(&buf->vb.queue);
659 }
660
661 return 0;
662}
663
664static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
665{
666 struct soc_camera_file *icf = file->private_data;
667 struct mx1_buffer *buf;
668
669 buf = list_entry(icf->vb_vidq.stream.next, struct mx1_buffer,
670 vb.stream);
671
672 poll_wait(file, &buf->vb.done, pt);
673
674 if (buf->vb.state == VIDEOBUF_DONE ||
675 buf->vb.state == VIDEOBUF_ERROR)
676 return POLLIN | POLLRDNORM;
677
678 return 0;
679}
680
681static int mx1_camera_querycap(struct soc_camera_host *ici,
682 struct v4l2_capability *cap)
683{
684 /* cap->name is set by the friendly caller:-> */
685 strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
686 cap->version = VERSION_CODE;
687 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
688
689 return 0;
690}
691
692static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
693 .owner = THIS_MODULE,
694 .add = mx1_camera_add_device,
695 .remove = mx1_camera_remove_device,
696 .set_bus_param = mx1_camera_set_bus_param,
697 .set_crop = mx1_camera_set_crop,
698 .set_fmt = mx1_camera_set_fmt,
699 .try_fmt = mx1_camera_try_fmt,
700 .init_videobuf = mx1_camera_init_videobuf,
701 .reqbufs = mx1_camera_reqbufs,
702 .poll = mx1_camera_poll,
703 .querycap = mx1_camera_querycap,
704};
705
6acc81c3
PZ		 706static struct fiq_handler fh = {
707 .name = "csi_sof"
708};
709
710static int __init mx1_camera_probe(struct platform_device *pdev)
711{
712 struct mx1_camera_dev *pcdev;
713 struct resource *res;
714 struct pt_regs regs;
715 struct clk *clk;
716 void __iomem *base;
717 unsigned int irq;
718 int err = 0;
719
720 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
721 irq = platform_get_irq(pdev, 0);
30883ea8 722 if (!res || (int)irq <= 0) {
6acc81c3
PZ		 723 err = -ENODEV;
724 goto exit;
725 }
726
727 clk = clk_get(&pdev->dev, "csi_clk");
728 if (IS_ERR(clk)) {
729 err = PTR_ERR(clk);
730 goto exit;
731 }
732
733 pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
734 if (!pcdev) {
735 dev_err(&pdev->dev, "Could not allocate pcdev\n");
736 err = -ENOMEM;
737 goto exit_put_clk;
738 }
739
6acc81c3
PZ		 740 pcdev->res = res;
741 pcdev->clk = clk;
742
743 pcdev->pdata = pdev->dev.platform_data;
744
745 if (pcdev->pdata)
746 pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
747
748 if (!pcdev->mclk) {
749 dev_warn(&pdev->dev,
750 "mclk_10khz == 0! Please, fix your platform data. "
751 "Using default 20MHz\n");
752 pcdev->mclk = 20000000;
753 }
754
755 INIT_LIST_HEAD(&pcdev->capture);
756 spin_lock_init(&pcdev->lock);
757
758 /*
759 * Request the regions.
760 */
761 if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
762 err = -EBUSY;
763 goto exit_kfree;
764 }
765
766 base = ioremap(res->start, resource_size(res));
767 if (!base) {
768 err = -ENOMEM;
769 goto exit_release;
770 }
771 pcdev->irq = irq;
772 pcdev->base = base;
6acc81c3
PZ		 773
774 /* request dma */
775 pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
776 if (pcdev->dma_chan < 0) {
eff505fa 777 dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
6acc81c3
PZ		 778 err = -EBUSY;
779 goto exit_iounmap;
780 }
eff505fa 781 dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
6acc81c3
PZ		 782
783 imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
784 pcdev);
785
786 imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
787 IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
788 /* burst length : 16 words = 64 bytes */
789 imx_dma_config_burstlen(pcdev->dma_chan, 0);
790
791 /* request irq */
792 err = claim_fiq(&fh);
793 if (err) {
eff505fa 794 dev_err(&pdev->dev, "Camera interrupt register failed \n");
6acc81c3
PZ		 795 goto exit_free_dma;
796 }
797
798 set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
799 &mx1_camera_sof_fiq_start);
800
801 regs.ARM_r8 = DMA_BASE + DMA_DIMR;
802 regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
803 regs.ARM_r10 = (long)pcdev->base + CSICR1;
804 regs.ARM_fp = (long)pcdev->base + CSISR;
805 regs.ARM_sp = 1 << pcdev->dma_chan;
806 set_fiq_regs(&regs);
807
808 mxc_set_irq_fiq(irq, 1);
809 enable_fiq(irq);
810
eb6c8558
GL		 811 pcdev->soc_host.drv_name = DRIVER_NAME;
812 pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
813 pcdev->soc_host.priv = pcdev;
979ea1dd 814 pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
eb6c8558
GL		 815 pcdev->soc_host.nr = pdev->id;
816 err = soc_camera_host_register(&pcdev->soc_host);
6acc81c3
PZ		 817 if (err)
818 goto exit_free_irq;
819
820 dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
821
822 return 0;
823
824exit_free_irq:
825 disable_fiq(irq);
826 mxc_set_irq_fiq(irq, 0);
827 release_fiq(&fh);
828exit_free_dma:
829 imx_dma_free(pcdev->dma_chan);
830exit_iounmap:
831 iounmap(base);
832exit_release:
833 release_mem_region(res->start, resource_size(res));
834exit_kfree:
835 kfree(pcdev);
836exit_put_clk:
837 clk_put(clk);
838exit:
839 return err;
840}
841
842static int __exit mx1_camera_remove(struct platform_device *pdev)
843{
eff505fa
GL		 844 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
845 struct mx1_camera_dev *pcdev = container_of(soc_host,
846 struct mx1_camera_dev, soc_host);
6acc81c3
PZ		 847 struct resource *res;
848
849 imx_dma_free(pcdev->dma_chan);
850 disable_fiq(pcdev->irq);
851 mxc_set_irq_fiq(pcdev->irq, 0);
852 release_fiq(&fh);
853
854 clk_put(pcdev->clk);
855
eff505fa 856 soc_camera_host_unregister(soc_host);
6acc81c3
PZ		 857
858 iounmap(pcdev->base);
859
860 res = pcdev->res;
861 release_mem_region(res->start, resource_size(res));
862
863 kfree(pcdev);
864
865 dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
866
867 return 0;
868}
869
870static struct platform_driver mx1_camera_driver = {
871 .driver = {
872 .name = DRIVER_NAME,
873 },
874 .remove = __exit_p(mx1_camera_remove),
875};
876
877static int __init mx1_camera_init(void)
878{
879 return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
880}
881
882static void __exit mx1_camera_exit(void)
883{
884 return platform_driver_unregister(&mx1_camera_driver);
885}
886
887module_init(mx1_camera_init);
888module_exit(mx1_camera_exit);
889
890MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
891MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
892MODULE_LICENSE("GPL v2");
893MODULE_ALIAS("platform:" DRIVER_NAME);
Linux 6.x block layer and io_uring tree(s)