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[linux-2.6-block.git] / drivers / media / video / mx1_camera.c
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6acc81c3
PZ		 1/*
2 * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
3 *
4 * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
6 *
7 * Based on PXA SoC camera driver
8 * Copyright (C) 2006, Sascha Hauer, Pengutronix
9 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/clk.h>
17#include <linux/delay.h>
18#include <linux/device.h>
19#include <linux/dma-mapping.h>
20#include <linux/errno.h>
21#include <linux/fs.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/io.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/moduleparam.h>
29#include <linux/mutex.h>
30#include <linux/platform_device.h>
31#include <linux/time.h>
32#include <linux/version.h>
33#include <linux/videodev2.h>
34
35#include <media/soc_camera.h>
36#include <media/v4l2-common.h>
37#include <media/v4l2-dev.h>
38#include <media/videobuf-dma-contig.h>
39
40#include <asm/dma.h>
41#include <asm/fiq.h>
42#include <mach/dma-mx1-mx2.h>
43#include <mach/hardware.h>
44#include <mach/mx1_camera.h>
45
46/*
47 * CSI registers
48 */
49#define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
50#define DMA_DIMR 0x08 /* Interrupt mask Register */
51#define CSICR1 0x00 /* CSI Control Register 1 */
52#define CSISR 0x08 /* CSI Status Register */
53#define CSIRXR 0x10 /* CSI RxFIFO Register */
54
55#define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
56#define CSICR1_SOF_POL (1 << 17)
57#define CSICR1_SOF_INTEN (1 << 16)
58#define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
59#define CSICR1_MCLKEN (1 << 9)
60#define CSICR1_FCC (1 << 8)
61#define CSICR1_BIG_ENDIAN (1 << 7)
62#define CSICR1_CLR_RXFIFO (1 << 5)
63#define CSICR1_GCLK_MODE (1 << 4)
64#define CSICR1_DATA_POL (1 << 2)
65#define CSICR1_REDGE (1 << 1)
66#define CSICR1_EN (1 << 0)
67
68#define CSISR_SFF_OR_INT (1 << 25)
69#define CSISR_RFF_OR_INT (1 << 24)
70#define CSISR_STATFF_INT (1 << 21)
71#define CSISR_RXFF_INT (1 << 18)
72#define CSISR_SOF_INT (1 << 16)
73#define CSISR_DRDY (1 << 0)
74
75#define VERSION_CODE KERNEL_VERSION(0, 0, 1)
76#define DRIVER_NAME "mx1-camera"
77
78#define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
79 CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
80
81#define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
82 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
83 SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
84 SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
85 SOCAM_DATAWIDTH_8)
86
87#define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
88
89/*
90 * Structures
91 */
92
93/* buffer for one video frame */
94struct mx1_buffer {
95 /* common v4l buffer stuff -- must be first */
96 struct videobuf_buffer vb;
97 const struct soc_camera_data_format *fmt;
98 int inwork;
99};
100
101/* i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
102 * Interface. If anyone ever builds hardware to enable more than
103 * one camera, they will have to modify this driver too */
104struct mx1_camera_dev {
eb6c8558 105 struct soc_camera_host soc_host;
6acc81c3
PZ		 106 struct soc_camera_device *icd;
107 struct mx1_camera_pdata *pdata;
108 struct mx1_buffer *active;
6acc81c3
PZ		 109 struct resource *res;
110 struct clk *clk;
111 struct list_head capture;
112
113 void __iomem *base;
114 int dma_chan;
115 unsigned int irq;
116 unsigned long mclk;
117
118 spinlock_t lock;
119};
120
121/*
122 * Videobuf operations
123 */
124static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
125 unsigned int *size)
126{
127 struct soc_camera_device *icd = vq->priv_data;
128
6a6c8786 129 *size = icd->user_width * icd->user_height *
6acc81c3
PZ		 130 ((icd->current_fmt->depth + 7) >> 3);
131
132 if (!*count)
133 *count = 32;
134
135 while (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
136 (*count)--;
137
0166b743 138 dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size);
6acc81c3
PZ		 139
140 return 0;
141}
142
143static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
144{
145 struct soc_camera_device *icd = vq->priv_data;
146 struct videobuf_buffer *vb = &buf->vb;
147
148 BUG_ON(in_interrupt());
149
0166b743 150 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 151 vb, vb->baddr, vb->bsize);
152
153 /* This waits until this buffer is out of danger, i.e., until it is no
154 * longer in STATE_QUEUED or STATE_ACTIVE */
155 videobuf_waiton(vb, 0, 0);
156 videobuf_dma_contig_free(vq, vb);
157
158 vb->state = VIDEOBUF_NEEDS_INIT;
159}
160
161static int mx1_videobuf_prepare(struct videobuf_queue *vq,
162 struct videobuf_buffer *vb, enum v4l2_field field)
163{
164 struct soc_camera_device *icd = vq->priv_data;
165 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
166 int ret;
167
0166b743 168 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 169 vb, vb->baddr, vb->bsize);
170
171 /* Added list head initialization on alloc */
172 WARN_ON(!list_empty(&vb->queue));
173
174 BUG_ON(NULL == icd->current_fmt);
175
176 /* I think, in buf_prepare you only have to protect global data,
177 * the actual buffer is yours */
178 buf->inwork = 1;
179
180 if (buf->fmt != icd->current_fmt ||
6a6c8786
GL		 181 vb->width != icd->user_width ||
182 vb->height != icd->user_height ||
6acc81c3
PZ		 183 vb->field != field) {
184 buf->fmt = icd->current_fmt;
6a6c8786
GL		 185 vb->width = icd->user_width;
186 vb->height = icd->user_height;
6acc81c3
PZ		 187 vb->field = field;
188 vb->state = VIDEOBUF_NEEDS_INIT;
189 }
190
191 vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
192 if (0 != vb->baddr && vb->bsize < vb->size) {
193 ret = -EINVAL;
194 goto out;
195 }
196
197 if (vb->state == VIDEOBUF_NEEDS_INIT) {
198 ret = videobuf_iolock(vq, vb, NULL);
199 if (ret)
200 goto fail;
201
202 vb->state = VIDEOBUF_PREPARED;
203 }
204
205 buf->inwork = 0;
206
207 return 0;
208
209fail:
210 free_buffer(vq, buf);
211out:
212 buf->inwork = 0;
213 return ret;
214}
215
216static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
217{
218 struct videobuf_buffer *vbuf = &pcdev->active->vb;
0166b743 219 struct device *dev = pcdev->icd->dev.parent;
6acc81c3
PZ		 220 int ret;
221
222 if (unlikely(!pcdev->active)) {
0166b743 223 dev_err(dev, "DMA End IRQ with no active buffer\n");
6acc81c3
PZ		 224 return -EFAULT;
225 }
226
227 /* setup sg list for future DMA */
228 ret = imx_dma_setup_single(pcdev->dma_chan,
229 videobuf_to_dma_contig(vbuf),
230 vbuf->size, pcdev->res->start +
231 CSIRXR, DMA_MODE_READ);
232 if (unlikely(ret))
0166b743 233 dev_err(dev, "Failed to setup DMA sg list\n");
6acc81c3
PZ		 234
235 return ret;
236}
237
2dd54a54 238/* Called under spinlock_irqsave(&pcdev->lock, ...) */
6acc81c3
PZ		 239static void mx1_videobuf_queue(struct videobuf_queue *vq,
240 struct videobuf_buffer *vb)
241{
242 struct soc_camera_device *icd = vq->priv_data;
243 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
244 struct mx1_camera_dev *pcdev = ici->priv;
245 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
6acc81c3 246
0166b743 247 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 248 vb, vb->baddr, vb->bsize);
249
6acc81c3
PZ		 250 list_add_tail(&vb->queue, &pcdev->capture);
251
252 vb->state = VIDEOBUF_ACTIVE;
253
254 if (!pcdev->active) {
255 pcdev->active = buf;
256
257 /* setup sg list for future DMA */
258 if (!mx1_camera_setup_dma(pcdev)) {
259 unsigned int temp;
260 /* enable SOF irq */
261 temp = __raw_readl(pcdev->base + CSICR1) |
262 CSICR1_SOF_INTEN;
263 __raw_writel(temp, pcdev->base + CSICR1);
264 }
265 }
6acc81c3
PZ		 266}
267
268static void mx1_videobuf_release(struct videobuf_queue *vq,
269 struct videobuf_buffer *vb)
270{
271 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
272#ifdef DEBUG
273 struct soc_camera_device *icd = vq->priv_data;
0166b743 274 struct device *dev = icd->dev.parent;
6acc81c3 275
0166b743 276 dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 277 vb, vb->baddr, vb->bsize);
278
279 switch (vb->state) {
280 case VIDEOBUF_ACTIVE:
0166b743 281 dev_dbg(dev, "%s (active)\n", __func__);
6acc81c3
PZ		 282 break;
283 case VIDEOBUF_QUEUED:
0166b743 284 dev_dbg(dev, "%s (queued)\n", __func__);
6acc81c3
PZ		 285 break;
286 case VIDEOBUF_PREPARED:
0166b743 287 dev_dbg(dev, "%s (prepared)\n", __func__);
6acc81c3
PZ		 288 break;
289 default:
0166b743 290 dev_dbg(dev, "%s (unknown)\n", __func__);
6acc81c3
PZ		 291 break;
292 }
293#endif
294
295 free_buffer(vq, buf);
296}
297
298static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
299 struct videobuf_buffer *vb,
300 struct mx1_buffer *buf)
301{
302 /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
303 list_del_init(&vb->queue);
304 vb->state = VIDEOBUF_DONE;
305 do_gettimeofday(&vb->ts);
306 vb->field_count++;
307 wake_up(&vb->done);
308
309 if (list_empty(&pcdev->capture)) {
310 pcdev->active = NULL;
311 return;
312 }
313
314 pcdev->active = list_entry(pcdev->capture.next,
315 struct mx1_buffer, vb.queue);
316
317 /* setup sg list for future DMA */
318 if (likely(!mx1_camera_setup_dma(pcdev))) {
319 unsigned int temp;
320
321 /* enable SOF irq */
322 temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
323 __raw_writel(temp, pcdev->base + CSICR1);
324 }
325}
326
327static void mx1_camera_dma_irq(int channel, void *data)
328{
329 struct mx1_camera_dev *pcdev = data;
0166b743 330 struct device *dev = pcdev->icd->dev.parent;
6acc81c3
PZ		 331 struct mx1_buffer *buf;
332 struct videobuf_buffer *vb;
333 unsigned long flags;
334
335 spin_lock_irqsave(&pcdev->lock, flags);
336
337 imx_dma_disable(channel);
338
339 if (unlikely(!pcdev->active)) {
0166b743 340 dev_err(dev, "DMA End IRQ with no active buffer\n");
6acc81c3
PZ		 341 goto out;
342 }
343
344 vb = &pcdev->active->vb;
345 buf = container_of(vb, struct mx1_buffer, vb);
346 WARN_ON(buf->inwork || list_empty(&vb->queue));
0166b743 347 dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 348 vb, vb->baddr, vb->bsize);
349
350 mx1_camera_wakeup(pcdev, vb, buf);
351out:
352 spin_unlock_irqrestore(&pcdev->lock, flags);
353}
354
355static struct videobuf_queue_ops mx1_videobuf_ops = {
356 .buf_setup = mx1_videobuf_setup,
357 .buf_prepare = mx1_videobuf_prepare,
358 .buf_queue = mx1_videobuf_queue,
359 .buf_release = mx1_videobuf_release,
360};
361
362static void mx1_camera_init_videobuf(struct videobuf_queue *q,
363 struct soc_camera_device *icd)
364{
365 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
366 struct mx1_camera_dev *pcdev = ici->priv;
367
979ea1dd 368 videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent,
6acc81c3
PZ		 369 &pcdev->lock,
370 V4L2_BUF_TYPE_VIDEO_CAPTURE,
371 V4L2_FIELD_NONE,
372 sizeof(struct mx1_buffer), icd);
373}
374
375static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
376{
377 unsigned int mclk = pcdev->mclk;
378 unsigned long div;
379 unsigned long lcdclk;
380
381 lcdclk = clk_get_rate(pcdev->clk);
382
383 /* We verify platform_mclk_10khz != 0, so if anyone breaks it, here
384 * they get a nice Oops */
385 div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
386
0166b743
GL		 387 dev_dbg(pcdev->icd->dev.parent,
388 "System clock %lukHz, target freq %dkHz, divisor %lu\n",
389 lcdclk / 1000, mclk / 1000, div);
6acc81c3
PZ		 390
391 return div;
392}
393
394static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
395{
396 unsigned int csicr1 = CSICR1_EN;
397
979ea1dd 398 dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
6acc81c3
PZ		 399
400 clk_enable(pcdev->clk);
401
402 /* enable CSI before doing anything else */
403 __raw_writel(csicr1, pcdev->base + CSICR1);
404
405 csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
406 csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
407 csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
408
409 __raw_writel(csicr1, pcdev->base + CSICR1);
410}
411
412static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
413{
979ea1dd 414 dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
6acc81c3
PZ		 415
416 /* Disable all CSI interface */
417 __raw_writel(0x00, pcdev->base + CSICR1);
418
419 clk_disable(pcdev->clk);
420}
421
422/* The following two functions absolutely depend on the fact, that
423 * there can be only one camera on i.MX1/i.MXL camera sensor interface */
424static int mx1_camera_add_device(struct soc_camera_device *icd)
425{
426 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
427 struct mx1_camera_dev *pcdev = ici->priv;
428 int ret;
429
430 if (pcdev->icd) {
431 ret = -EBUSY;
432 goto ebusy;
433 }
434
0166b743 435 dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n",
6acc81c3
PZ		 436 icd->devnum);
437
438 mx1_camera_activate(pcdev);
6acc81c3 439
979ea1dd 440 pcdev->icd = icd;
6acc81c3
PZ		 441
442ebusy:
443 return ret;
444}
445
446static void mx1_camera_remove_device(struct soc_camera_device *icd)
447{
448 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
449 struct mx1_camera_dev *pcdev = ici->priv;
450 unsigned int csicr1;
451
452 BUG_ON(icd != pcdev->icd);
453
454 /* disable interrupts */
455 csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
456 __raw_writel(csicr1, pcdev->base + CSICR1);
457
458 /* Stop DMA engine */
459 imx_dma_disable(pcdev->dma_chan);
460
0166b743 461 dev_info(icd->dev.parent, "MX1 Camera driver detached from camera %d\n",
6acc81c3
PZ		 462 icd->devnum);
463
6acc81c3
PZ		 464 mx1_camera_deactivate(pcdev);
465
466 pcdev->icd = NULL;
467}
468
469static int mx1_camera_set_crop(struct soc_camera_device *icd,
08590b96 470 struct v4l2_crop *a)
6acc81c3 471{
c9c1f1c0 472 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
08590b96
GL		 473
474 return v4l2_subdev_call(sd, video, s_crop, a);
6acc81c3
PZ		 475}
476
477static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
478{
479 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
480 struct mx1_camera_dev *pcdev = ici->priv;
481 unsigned long camera_flags, common_flags;
482 unsigned int csicr1;
483 int ret;
484
485 camera_flags = icd->ops->query_bus_param(icd);
486
487 /* MX1 supports only 8bit buswidth */
488 common_flags = soc_camera_bus_param_compatible(camera_flags,
489 CSI_BUS_FLAGS);
490 if (!common_flags)
491 return -EINVAL;
492
493 icd->buswidth = 8;
494
495 /* Make choises, based on platform choice */
496 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
497 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
498 if (!pcdev->pdata ||
499 pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
500 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
501 else
502 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
503 }
504
505 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
506 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
507 if (!pcdev->pdata ||
508 pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
509 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
510 else
511 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
512 }
513
514 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
515 (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
516 if (!pcdev->pdata ||
517 pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
518 common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
519 else
520 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
521 }
522
523 ret = icd->ops->set_bus_param(icd, common_flags);
524 if (ret < 0)
525 return ret;
526
527 csicr1 = __raw_readl(pcdev->base + CSICR1);
528
529 if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
530 csicr1 |= CSICR1_REDGE;
531 if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
532 csicr1 |= CSICR1_SOF_POL;
533 if (common_flags & SOCAM_DATA_ACTIVE_LOW)
534 csicr1 |= CSICR1_DATA_POL;
535
536 __raw_writel(csicr1, pcdev->base + CSICR1);
537
538 return 0;
539}
540
541static int mx1_camera_set_fmt(struct soc_camera_device *icd,
542 struct v4l2_format *f)
543{
c9c1f1c0 544 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
6acc81c3
PZ		 545 const struct soc_camera_format_xlate *xlate;
546 struct v4l2_pix_format *pix = &f->fmt.pix;
547 int ret;
548
549 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
550 if (!xlate) {
96c75399
GL		 551 dev_warn(icd->dev.parent, "Format %x not found\n",
552 pix->pixelformat);
6acc81c3
PZ		 553 return -EINVAL;
554 }
555
c9c1f1c0 556 ret = v4l2_subdev_call(sd, video, s_fmt, f);
6acc81c3
PZ		 557 if (!ret) {
558 icd->buswidth = xlate->buswidth;
559 icd->current_fmt = xlate->host_fmt;
560 }
561
562 return ret;
563}
564
565static int mx1_camera_try_fmt(struct soc_camera_device *icd,
566 struct v4l2_format *f)
567{
c9c1f1c0 568 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
6acc81c3
PZ		 569 /* TODO: limit to mx1 hardware capabilities */
570
571 /* limit to sensor capabilities */
c9c1f1c0 572 return v4l2_subdev_call(sd, video, try_fmt, f);
6acc81c3
PZ		 573}
574
575static int mx1_camera_reqbufs(struct soc_camera_file *icf,
576 struct v4l2_requestbuffers *p)
577{
578 int i;
579
580 /* This is for locking debugging only. I removed spinlocks and now I
581 * check whether .prepare is ever called on a linked buffer, or whether
582 * a dma IRQ can occur for an in-work or unlinked buffer. Until now
583 * it hadn't triggered */
584 for (i = 0; i < p->count; i++) {
585 struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
586 struct mx1_buffer, vb);
587 buf->inwork = 0;
588 INIT_LIST_HEAD(&buf->vb.queue);
589 }
590
591 return 0;
592}
593
594static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
595{
596 struct soc_camera_file *icf = file->private_data;
597 struct mx1_buffer *buf;
598
599 buf = list_entry(icf->vb_vidq.stream.next, struct mx1_buffer,
600 vb.stream);
601
602 poll_wait(file, &buf->vb.done, pt);
603
604 if (buf->vb.state == VIDEOBUF_DONE ||
605 buf->vb.state == VIDEOBUF_ERROR)
606 return POLLIN | POLLRDNORM;
607
608 return 0;
609}
610
611static int mx1_camera_querycap(struct soc_camera_host *ici,
612 struct v4l2_capability *cap)
613{
614 /* cap->name is set by the friendly caller:-> */
615 strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
616 cap->version = VERSION_CODE;
617 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
618
619 return 0;
620}
621
622static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
623 .owner = THIS_MODULE,
624 .add = mx1_camera_add_device,
625 .remove = mx1_camera_remove_device,
626 .set_bus_param = mx1_camera_set_bus_param,
627 .set_crop = mx1_camera_set_crop,
628 .set_fmt = mx1_camera_set_fmt,
629 .try_fmt = mx1_camera_try_fmt,
630 .init_videobuf = mx1_camera_init_videobuf,
631 .reqbufs = mx1_camera_reqbufs,
632 .poll = mx1_camera_poll,
633 .querycap = mx1_camera_querycap,
634};
635
6acc81c3
PZ		 636static struct fiq_handler fh = {
637 .name = "csi_sof"
638};
639
640static int __init mx1_camera_probe(struct platform_device *pdev)
641{
642 struct mx1_camera_dev *pcdev;
643 struct resource *res;
644 struct pt_regs regs;
645 struct clk *clk;
646 void __iomem *base;
647 unsigned int irq;
648 int err = 0;
649
650 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
651 irq = platform_get_irq(pdev, 0);
652 if (!res || !irq) {
653 err = -ENODEV;
654 goto exit;
655 }
656
657 clk = clk_get(&pdev->dev, "csi_clk");
658 if (IS_ERR(clk)) {
659 err = PTR_ERR(clk);
660 goto exit;
661 }
662
663 pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
664 if (!pcdev) {
665 dev_err(&pdev->dev, "Could not allocate pcdev\n");
666 err = -ENOMEM;
667 goto exit_put_clk;
668 }
669
6acc81c3
PZ		 670 pcdev->res = res;
671 pcdev->clk = clk;
672
673 pcdev->pdata = pdev->dev.platform_data;
674
675 if (pcdev->pdata)
676 pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
677
678 if (!pcdev->mclk) {
679 dev_warn(&pdev->dev,
680 "mclk_10khz == 0! Please, fix your platform data. "
681 "Using default 20MHz\n");
682 pcdev->mclk = 20000000;
683 }
684
685 INIT_LIST_HEAD(&pcdev->capture);
686 spin_lock_init(&pcdev->lock);
687
688 /*
689 * Request the regions.
690 */
691 if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
692 err = -EBUSY;
693 goto exit_kfree;
694 }
695
696 base = ioremap(res->start, resource_size(res));
697 if (!base) {
698 err = -ENOMEM;
699 goto exit_release;
700 }
701 pcdev->irq = irq;
702 pcdev->base = base;
6acc81c3
PZ		 703
704 /* request dma */
705 pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
706 if (pcdev->dma_chan < 0) {
eff505fa 707 dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
6acc81c3
PZ		 708 err = -EBUSY;
709 goto exit_iounmap;
710 }
eff505fa 711 dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
6acc81c3
PZ		 712
713 imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
714 pcdev);
715
716 imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
717 IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
718 /* burst length : 16 words = 64 bytes */
719 imx_dma_config_burstlen(pcdev->dma_chan, 0);
720
721 /* request irq */
722 err = claim_fiq(&fh);
723 if (err) {
eff505fa 724 dev_err(&pdev->dev, "Camera interrupt register failed \n");
6acc81c3
PZ		 725 goto exit_free_dma;
726 }
727
728 set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
729 &mx1_camera_sof_fiq_start);
730
731 regs.ARM_r8 = DMA_BASE + DMA_DIMR;
732 regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
733 regs.ARM_r10 = (long)pcdev->base + CSICR1;
734 regs.ARM_fp = (long)pcdev->base + CSISR;
735 regs.ARM_sp = 1 << pcdev->dma_chan;
736 set_fiq_regs(&regs);
737
738 mxc_set_irq_fiq(irq, 1);
739 enable_fiq(irq);
740
eb6c8558
GL		 741 pcdev->soc_host.drv_name = DRIVER_NAME;
742 pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
743 pcdev->soc_host.priv = pcdev;
979ea1dd 744 pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
eb6c8558
GL		 745 pcdev->soc_host.nr = pdev->id;
746 err = soc_camera_host_register(&pcdev->soc_host);
6acc81c3
PZ		 747 if (err)
748 goto exit_free_irq;
749
750 dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
751
752 return 0;
753
754exit_free_irq:
755 disable_fiq(irq);
756 mxc_set_irq_fiq(irq, 0);
757 release_fiq(&fh);
758exit_free_dma:
759 imx_dma_free(pcdev->dma_chan);
760exit_iounmap:
761 iounmap(base);
762exit_release:
763 release_mem_region(res->start, resource_size(res));
764exit_kfree:
765 kfree(pcdev);
766exit_put_clk:
767 clk_put(clk);
768exit:
769 return err;
770}
771
772static int __exit mx1_camera_remove(struct platform_device *pdev)
773{
eff505fa
GL		 774 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
775 struct mx1_camera_dev *pcdev = container_of(soc_host,
776 struct mx1_camera_dev, soc_host);
6acc81c3
PZ		 777 struct resource *res;
778
779 imx_dma_free(pcdev->dma_chan);
780 disable_fiq(pcdev->irq);
781 mxc_set_irq_fiq(pcdev->irq, 0);
782 release_fiq(&fh);
783
784 clk_put(pcdev->clk);
785
eff505fa 786 soc_camera_host_unregister(soc_host);
6acc81c3
PZ		 787
788 iounmap(pcdev->base);
789
790 res = pcdev->res;
791 release_mem_region(res->start, resource_size(res));
792
793 kfree(pcdev);
794
795 dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
796
797 return 0;
798}
799
800static struct platform_driver mx1_camera_driver = {
801 .driver = {
802 .name = DRIVER_NAME,
803 },
804 .remove = __exit_p(mx1_camera_remove),
805};
806
807static int __init mx1_camera_init(void)
808{
809 return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
810}
811
812static void __exit mx1_camera_exit(void)
813{
814 return platform_driver_unregister(&mx1_camera_driver);
815}
816
817module_init(mx1_camera_init);
818module_exit(mx1_camera_exit);
819
820MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
821MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
822MODULE_LICENSE("GPL v2");
823MODULE_ALIAS("platform:" DRIVER_NAME);
Linux 6.x block layer and io_uring tree(s)