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7397bfbe GL |
1 | /* |
2 | * Driver for MT9V022 CMOS Image Sensor from Micron | |
3 | * | |
4 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/videodev2.h> | |
12 | #include <linux/slab.h> | |
13 | #include <linux/i2c.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/log2.h> | |
16 | ||
17 | #include <media/v4l2-common.h> | |
18 | #include <media/v4l2-chip-ident.h> | |
19 | #include <media/soc_camera.h> | |
20 | ||
ef6ad5c3 | 21 | #ifdef CONFIG_MT9M001_PCA9536_SWITCH |
7397bfbe | 22 | #include <asm/gpio.h> |
ef6ad5c3 | 23 | #endif |
7397bfbe GL |
24 | |
25 | /* mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c | |
26 | * The platform has to define i2c_board_info | |
27 | * and call i2c_register_board_info() */ | |
28 | ||
29 | static char *sensor_type; | |
30 | module_param(sensor_type, charp, S_IRUGO); | |
31 | MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\"\n"); | |
32 | ||
33 | /* mt9v022 selected register addresses */ | |
34 | #define MT9V022_CHIP_VERSION 0x00 | |
35 | #define MT9V022_COLUMN_START 0x01 | |
36 | #define MT9V022_ROW_START 0x02 | |
37 | #define MT9V022_WINDOW_HEIGHT 0x03 | |
38 | #define MT9V022_WINDOW_WIDTH 0x04 | |
39 | #define MT9V022_HORIZONTAL_BLANKING 0x05 | |
40 | #define MT9V022_VERTICAL_BLANKING 0x06 | |
41 | #define MT9V022_CHIP_CONTROL 0x07 | |
42 | #define MT9V022_SHUTTER_WIDTH1 0x08 | |
43 | #define MT9V022_SHUTTER_WIDTH2 0x09 | |
44 | #define MT9V022_SHUTTER_WIDTH_CTRL 0x0a | |
45 | #define MT9V022_TOTAL_SHUTTER_WIDTH 0x0b | |
46 | #define MT9V022_RESET 0x0c | |
47 | #define MT9V022_READ_MODE 0x0d | |
48 | #define MT9V022_MONITOR_MODE 0x0e | |
49 | #define MT9V022_PIXEL_OPERATION_MODE 0x0f | |
50 | #define MT9V022_LED_OUT_CONTROL 0x1b | |
51 | #define MT9V022_ADC_MODE_CONTROL 0x1c | |
52 | #define MT9V022_ANALOG_GAIN 0x34 | |
53 | #define MT9V022_BLACK_LEVEL_CALIB_CTRL 0x47 | |
54 | #define MT9V022_PIXCLK_FV_LV 0x74 | |
55 | #define MT9V022_DIGITAL_TEST_PATTERN 0x7f | |
56 | #define MT9V022_AEC_AGC_ENABLE 0xAF | |
57 | #define MT9V022_MAX_TOTAL_SHUTTER_WIDTH 0xBD | |
58 | ||
59 | /* Progressive scan, master, defaults */ | |
60 | #define MT9V022_CHIP_CONTROL_DEFAULT 0x188 | |
61 | ||
bb55de3b GL |
62 | static const struct soc_camera_data_format mt9v022_colour_formats[] = { |
63 | /* Order important: first natively supported, | |
64 | * second supported with a GPIO extender */ | |
7397bfbe | 65 | { |
bb55de3b | 66 | .name = "Bayer (sRGB) 10 bit", |
7397bfbe GL |
67 | .depth = 10, |
68 | .fourcc = V4L2_PIX_FMT_SBGGR16, | |
69 | .colorspace = V4L2_COLORSPACE_SRGB, | |
70 | }, { | |
bb55de3b GL |
71 | .name = "Bayer (sRGB) 8 bit", |
72 | .depth = 8, | |
73 | .fourcc = V4L2_PIX_FMT_SBGGR8, | |
74 | .colorspace = V4L2_COLORSPACE_SRGB, | |
75 | } | |
76 | }; | |
77 | ||
78 | static const struct soc_camera_data_format mt9v022_monochrome_formats[] = { | |
79 | /* Order important - see above */ | |
80 | { | |
7397bfbe GL |
81 | .name = "Monochrome 10 bit", |
82 | .depth = 10, | |
83 | .fourcc = V4L2_PIX_FMT_Y16, | |
84 | }, { | |
85 | .name = "Monochrome 8 bit", | |
86 | .depth = 8, | |
87 | .fourcc = V4L2_PIX_FMT_GREY, | |
88 | }, | |
89 | }; | |
90 | ||
91 | struct mt9v022 { | |
92 | struct i2c_client *client; | |
93 | struct soc_camera_device icd; | |
94 | int model; /* V4L2_IDENT_MT9M001* codes from v4l2-chip-ident.h */ | |
95 | int switch_gpio; | |
96 | u16 chip_control; | |
97 | unsigned char datawidth; | |
98 | }; | |
99 | ||
100 | static int reg_read(struct soc_camera_device *icd, const u8 reg) | |
101 | { | |
102 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
103 | struct i2c_client *client = mt9v022->client; | |
104 | s32 data = i2c_smbus_read_word_data(client, reg); | |
105 | return data < 0 ? data : swab16(data); | |
106 | } | |
107 | ||
108 | static int reg_write(struct soc_camera_device *icd, const u8 reg, | |
109 | const u16 data) | |
110 | { | |
111 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
112 | return i2c_smbus_write_word_data(mt9v022->client, reg, swab16(data)); | |
113 | } | |
114 | ||
115 | static int reg_set(struct soc_camera_device *icd, const u8 reg, | |
116 | const u16 data) | |
117 | { | |
118 | int ret; | |
119 | ||
120 | ret = reg_read(icd, reg); | |
121 | if (ret < 0) | |
122 | return ret; | |
123 | return reg_write(icd, reg, ret | data); | |
124 | } | |
125 | ||
126 | static int reg_clear(struct soc_camera_device *icd, const u8 reg, | |
127 | const u16 data) | |
128 | { | |
129 | int ret; | |
130 | ||
131 | ret = reg_read(icd, reg); | |
132 | if (ret < 0) | |
133 | return ret; | |
134 | return reg_write(icd, reg, ret & ~data); | |
135 | } | |
136 | ||
137 | static int mt9v022_init(struct soc_camera_device *icd) | |
138 | { | |
139 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
140 | int ret; | |
141 | ||
142 | /* Almost the default mode: master, parallel, simultaneous, and an | |
143 | * undocumented bit 0x200, which is present in table 7, but not in 8, | |
144 | * plus snapshot mode to disable scan for now */ | |
145 | mt9v022->chip_control |= 0x10; | |
146 | ret = reg_write(icd, MT9V022_CHIP_CONTROL, mt9v022->chip_control); | |
147 | if (ret >= 0) | |
148 | reg_write(icd, MT9V022_READ_MODE, 0x300); | |
149 | ||
150 | /* All defaults */ | |
151 | if (ret >= 0) | |
152 | /* AEC, AGC on */ | |
153 | ret = reg_set(icd, MT9V022_AEC_AGC_ENABLE, 0x3); | |
154 | if (ret >= 0) | |
155 | ret = reg_write(icd, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, 480); | |
156 | if (ret >= 0) | |
157 | /* default - auto */ | |
158 | ret = reg_clear(icd, MT9V022_BLACK_LEVEL_CALIB_CTRL, 1); | |
159 | if (ret >= 0) | |
160 | ret = reg_write(icd, MT9V022_DIGITAL_TEST_PATTERN, 0); | |
161 | ||
162 | return ret >= 0 ? 0 : -EIO; | |
163 | } | |
164 | ||
165 | static int mt9v022_release(struct soc_camera_device *icd) | |
166 | { | |
167 | /* Nothing? */ | |
168 | return 0; | |
169 | } | |
170 | ||
171 | static int mt9v022_start_capture(struct soc_camera_device *icd) | |
172 | { | |
173 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
174 | /* Switch to master "normal" mode */ | |
175 | mt9v022->chip_control &= ~0x10; | |
176 | if (reg_write(icd, MT9V022_CHIP_CONTROL, | |
177 | mt9v022->chip_control) < 0) | |
178 | return -EIO; | |
179 | return 0; | |
180 | } | |
181 | ||
182 | static int mt9v022_stop_capture(struct soc_camera_device *icd) | |
183 | { | |
184 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
185 | /* Switch to snapshot mode */ | |
186 | mt9v022->chip_control |= 0x10; | |
187 | if (reg_write(icd, MT9V022_CHIP_CONTROL, | |
188 | mt9v022->chip_control) < 0) | |
189 | return -EIO; | |
190 | return 0; | |
191 | } | |
192 | ||
193 | static int bus_switch_request(struct mt9v022 *mt9v022, struct soc_camera_link *icl) | |
194 | { | |
195 | #ifdef CONFIG_MT9V022_PCA9536_SWITCH | |
196 | int ret; | |
197 | unsigned int gpio = icl->gpio; | |
198 | ||
b4333a3b | 199 | if (gpio_is_valid(gpio)) { |
7397bfbe GL |
200 | /* We have a data bus switch. */ |
201 | ret = gpio_request(gpio, "mt9v022"); | |
202 | if (ret < 0) { | |
203 | dev_err(&mt9v022->client->dev, "Cannot get GPIO %u\n", gpio); | |
204 | return ret; | |
205 | } | |
206 | ||
207 | ret = gpio_direction_output(gpio, 0); | |
208 | if (ret < 0) { | |
209 | dev_err(&mt9v022->client->dev, | |
210 | "Cannot set GPIO %u to output\n", gpio); | |
211 | gpio_free(gpio); | |
212 | return ret; | |
213 | } | |
214 | } | |
215 | ||
216 | mt9v022->switch_gpio = gpio; | |
217 | #else | |
b4333a3b | 218 | mt9v022->switch_gpio = -EINVAL; |
7397bfbe GL |
219 | #endif |
220 | return 0; | |
221 | } | |
222 | ||
223 | static void bus_switch_release(struct mt9v022 *mt9v022) | |
224 | { | |
225 | #ifdef CONFIG_MT9V022_PCA9536_SWITCH | |
b4333a3b | 226 | if (gpio_is_valid(mt9v022->switch_gpio)) |
7397bfbe GL |
227 | gpio_free(mt9v022->switch_gpio); |
228 | #endif | |
229 | } | |
230 | ||
231 | static int bus_switch_act(struct mt9v022 *mt9v022, int go8bit) | |
232 | { | |
233 | #ifdef CONFIG_MT9V022_PCA9536_SWITCH | |
b4333a3b | 234 | if (!gpio_is_valid(mt9v022->switch_gpio)) |
7397bfbe GL |
235 | return -ENODEV; |
236 | ||
237 | gpio_set_value_cansleep(mt9v022->switch_gpio, go8bit); | |
238 | return 0; | |
239 | #else | |
240 | return -ENODEV; | |
241 | #endif | |
242 | } | |
243 | ||
ad5f2e85 GL |
244 | static int bus_switch_possible(struct mt9v022 *mt9v022) |
245 | { | |
246 | #ifdef CONFIG_MT9V022_PCA9536_SWITCH | |
247 | return gpio_is_valid(mt9v022->switch_gpio); | |
248 | #else | |
249 | return 0; | |
250 | #endif | |
251 | } | |
252 | ||
253 | static int mt9v022_set_bus_param(struct soc_camera_device *icd, | |
254 | unsigned long flags) | |
7397bfbe GL |
255 | { |
256 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
ad5f2e85 | 257 | unsigned int width_flag = flags & SOCAM_DATAWIDTH_MASK; |
7397bfbe | 258 | int ret; |
ad5f2e85 | 259 | u16 pixclk = 0; |
7397bfbe GL |
260 | |
261 | /* Only one width bit may be set */ | |
262 | if (!is_power_of_2(width_flag)) | |
263 | return -EINVAL; | |
264 | ||
ad5f2e85 GL |
265 | if ((mt9v022->datawidth != 10 && (width_flag == SOCAM_DATAWIDTH_10)) || |
266 | (mt9v022->datawidth != 9 && (width_flag == SOCAM_DATAWIDTH_9)) || | |
267 | (mt9v022->datawidth != 8 && (width_flag == SOCAM_DATAWIDTH_8))) { | |
268 | /* Well, we actually only can do 10 or 8 bits... */ | |
269 | if (width_flag == SOCAM_DATAWIDTH_9) | |
270 | return -EINVAL; | |
271 | ||
272 | ret = bus_switch_act(mt9v022, | |
273 | width_flag == SOCAM_DATAWIDTH_8); | |
274 | if (ret < 0) | |
275 | return ret; | |
276 | ||
277 | mt9v022->datawidth = width_flag == SOCAM_DATAWIDTH_8 ? 8 : 10; | |
278 | } | |
279 | ||
280 | if (flags & SOCAM_PCLK_SAMPLE_RISING) | |
281 | pixclk |= 0x10; | |
282 | ||
283 | if (!(flags & SOCAM_HSYNC_ACTIVE_HIGH)) | |
284 | pixclk |= 0x1; | |
285 | ||
286 | if (!(flags & SOCAM_VSYNC_ACTIVE_HIGH)) | |
287 | pixclk |= 0x2; | |
288 | ||
289 | ret = reg_write(icd, MT9V022_PIXCLK_FV_LV, pixclk); | |
290 | if (ret < 0) | |
291 | return ret; | |
292 | ||
293 | if (!(flags & SOCAM_MASTER)) | |
294 | mt9v022->chip_control &= ~0x8; | |
295 | ||
296 | ret = reg_write(icd, MT9V022_CHIP_CONTROL, mt9v022->chip_control); | |
297 | if (ret < 0) | |
298 | return ret; | |
299 | ||
300 | dev_dbg(&icd->dev, "Calculated pixclk 0x%x, chip control 0x%x\n", | |
301 | pixclk, mt9v022->chip_control); | |
302 | ||
303 | return 0; | |
304 | } | |
305 | ||
306 | static unsigned long mt9v022_query_bus_param(struct soc_camera_device *icd) | |
307 | { | |
308 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
309 | unsigned int width_flag = SOCAM_DATAWIDTH_10; | |
310 | ||
311 | if (bus_switch_possible(mt9v022)) | |
312 | width_flag |= SOCAM_DATAWIDTH_8; | |
313 | ||
314 | return SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | | |
315 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_LOW | | |
316 | SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | | |
317 | SOCAM_MASTER | SOCAM_SLAVE | | |
318 | width_flag; | |
319 | } | |
320 | ||
321 | static int mt9v022_set_fmt_cap(struct soc_camera_device *icd, | |
322 | __u32 pixfmt, struct v4l2_rect *rect) | |
323 | { | |
324 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
325 | int ret; | |
326 | ||
7397bfbe GL |
327 | /* The caller provides a supported format, as verified per call to |
328 | * icd->try_fmt_cap(), datawidth is from our supported format list */ | |
329 | switch (pixfmt) { | |
330 | case V4L2_PIX_FMT_GREY: | |
331 | case V4L2_PIX_FMT_Y16: | |
332 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATM) | |
333 | return -EINVAL; | |
334 | break; | |
335 | case V4L2_PIX_FMT_SBGGR8: | |
336 | case V4L2_PIX_FMT_SBGGR16: | |
337 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATC) | |
338 | return -EINVAL; | |
339 | break; | |
340 | case 0: | |
341 | /* No format change, only geometry */ | |
342 | break; | |
343 | default: | |
344 | return -EINVAL; | |
345 | } | |
346 | ||
347 | /* Like in example app. Contradicts the datasheet though */ | |
348 | ret = reg_read(icd, MT9V022_AEC_AGC_ENABLE); | |
349 | if (ret >= 0) { | |
350 | if (ret & 1) /* Autoexposure */ | |
351 | ret = reg_write(icd, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, | |
352 | rect->height + icd->y_skip_top + 43); | |
353 | else | |
354 | ret = reg_write(icd, MT9V022_TOTAL_SHUTTER_WIDTH, | |
355 | rect->height + icd->y_skip_top + 43); | |
356 | } | |
357 | /* Setup frame format: defaults apart from width and height */ | |
358 | if (ret >= 0) | |
359 | ret = reg_write(icd, MT9V022_COLUMN_START, rect->left); | |
360 | if (ret >= 0) | |
361 | ret = reg_write(icd, MT9V022_ROW_START, rect->top); | |
362 | if (ret >= 0) | |
363 | /* Default 94, Phytec driver says: | |
364 | * "width + horizontal blank >= 660" */ | |
365 | ret = reg_write(icd, MT9V022_HORIZONTAL_BLANKING, | |
366 | rect->width > 660 - 43 ? 43 : | |
367 | 660 - rect->width); | |
368 | if (ret >= 0) | |
369 | ret = reg_write(icd, MT9V022_VERTICAL_BLANKING, 45); | |
370 | if (ret >= 0) | |
371 | ret = reg_write(icd, MT9V022_WINDOW_WIDTH, rect->width); | |
372 | if (ret >= 0) | |
373 | ret = reg_write(icd, MT9V022_WINDOW_HEIGHT, | |
374 | rect->height + icd->y_skip_top); | |
375 | ||
376 | if (ret < 0) | |
377 | return ret; | |
378 | ||
379 | dev_dbg(&icd->dev, "Frame %ux%u pixel\n", rect->width, rect->height); | |
380 | ||
7397bfbe GL |
381 | return 0; |
382 | } | |
383 | ||
384 | static int mt9v022_try_fmt_cap(struct soc_camera_device *icd, | |
385 | struct v4l2_format *f) | |
386 | { | |
387 | if (f->fmt.pix.height < 32 + icd->y_skip_top) | |
388 | f->fmt.pix.height = 32 + icd->y_skip_top; | |
389 | if (f->fmt.pix.height > 480 + icd->y_skip_top) | |
390 | f->fmt.pix.height = 480 + icd->y_skip_top; | |
391 | if (f->fmt.pix.width < 48) | |
392 | f->fmt.pix.width = 48; | |
393 | if (f->fmt.pix.width > 752) | |
394 | f->fmt.pix.width = 752; | |
395 | f->fmt.pix.width &= ~0x03; /* ? */ | |
396 | ||
397 | return 0; | |
398 | } | |
399 | ||
400 | static int mt9v022_get_chip_id(struct soc_camera_device *icd, | |
401 | struct v4l2_chip_ident *id) | |
402 | { | |
403 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
404 | ||
405 | if (id->match_type != V4L2_CHIP_MATCH_I2C_ADDR) | |
406 | return -EINVAL; | |
407 | ||
408 | if (id->match_chip != mt9v022->client->addr) | |
409 | return -ENODEV; | |
410 | ||
411 | id->ident = mt9v022->model; | |
412 | id->revision = 0; | |
413 | ||
414 | return 0; | |
415 | } | |
416 | ||
417 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
418 | static int mt9v022_get_register(struct soc_camera_device *icd, | |
419 | struct v4l2_register *reg) | |
420 | { | |
421 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
422 | ||
423 | if (reg->match_type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) | |
424 | return -EINVAL; | |
425 | ||
426 | if (reg->match_chip != mt9v022->client->addr) | |
427 | return -ENODEV; | |
428 | ||
429 | reg->val = reg_read(icd, reg->reg); | |
430 | ||
431 | if (reg->val > 0xffff) | |
432 | return -EIO; | |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
437 | static int mt9v022_set_register(struct soc_camera_device *icd, | |
438 | struct v4l2_register *reg) | |
439 | { | |
440 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
441 | ||
442 | if (reg->match_type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) | |
443 | return -EINVAL; | |
444 | ||
445 | if (reg->match_chip != mt9v022->client->addr) | |
446 | return -ENODEV; | |
447 | ||
448 | if (reg_write(icd, reg->reg, reg->val) < 0) | |
449 | return -EIO; | |
450 | ||
451 | return 0; | |
452 | } | |
453 | #endif | |
454 | ||
4407a463 | 455 | static const struct v4l2_queryctrl mt9v022_controls[] = { |
7397bfbe GL |
456 | { |
457 | .id = V4L2_CID_VFLIP, | |
458 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
459 | .name = "Flip Vertically", | |
460 | .minimum = 0, | |
461 | .maximum = 1, | |
462 | .step = 1, | |
463 | .default_value = 0, | |
464 | }, { | |
465 | .id = V4L2_CID_HFLIP, | |
466 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
467 | .name = "Flip Horizontally", | |
468 | .minimum = 0, | |
469 | .maximum = 1, | |
470 | .step = 1, | |
471 | .default_value = 0, | |
472 | }, { | |
473 | .id = V4L2_CID_GAIN, | |
474 | .type = V4L2_CTRL_TYPE_INTEGER, | |
475 | .name = "Analog Gain", | |
476 | .minimum = 64, | |
477 | .maximum = 127, | |
478 | .step = 1, | |
479 | .default_value = 64, | |
480 | .flags = V4L2_CTRL_FLAG_SLIDER, | |
481 | }, { | |
482 | .id = V4L2_CID_EXPOSURE, | |
483 | .type = V4L2_CTRL_TYPE_INTEGER, | |
484 | .name = "Exposure", | |
485 | .minimum = 1, | |
486 | .maximum = 255, | |
487 | .step = 1, | |
488 | .default_value = 255, | |
489 | .flags = V4L2_CTRL_FLAG_SLIDER, | |
490 | }, { | |
491 | .id = V4L2_CID_AUTOGAIN, | |
492 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
493 | .name = "Automatic Gain", | |
494 | .minimum = 0, | |
495 | .maximum = 1, | |
496 | .step = 1, | |
497 | .default_value = 1, | |
498 | }, { | |
499 | .id = V4L2_CID_EXPOSURE_AUTO, | |
500 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
501 | .name = "Automatic Exposure", | |
502 | .minimum = 0, | |
503 | .maximum = 1, | |
504 | .step = 1, | |
505 | .default_value = 1, | |
506 | } | |
507 | }; | |
508 | ||
26f1b942 GL |
509 | static int mt9v022_video_probe(struct soc_camera_device *); |
510 | static void mt9v022_video_remove(struct soc_camera_device *); | |
511 | static int mt9v022_get_control(struct soc_camera_device *, struct v4l2_control *); | |
512 | static int mt9v022_set_control(struct soc_camera_device *, struct v4l2_control *); | |
7397bfbe GL |
513 | |
514 | static struct soc_camera_ops mt9v022_ops = { | |
515 | .owner = THIS_MODULE, | |
26f1b942 GL |
516 | .probe = mt9v022_video_probe, |
517 | .remove = mt9v022_video_remove, | |
7397bfbe GL |
518 | .init = mt9v022_init, |
519 | .release = mt9v022_release, | |
520 | .start_capture = mt9v022_start_capture, | |
521 | .stop_capture = mt9v022_stop_capture, | |
ad5f2e85 | 522 | .set_fmt_cap = mt9v022_set_fmt_cap, |
7397bfbe | 523 | .try_fmt_cap = mt9v022_try_fmt_cap, |
ad5f2e85 GL |
524 | .set_bus_param = mt9v022_set_bus_param, |
525 | .query_bus_param = mt9v022_query_bus_param, | |
7397bfbe GL |
526 | .controls = mt9v022_controls, |
527 | .num_controls = ARRAY_SIZE(mt9v022_controls), | |
528 | .get_control = mt9v022_get_control, | |
529 | .set_control = mt9v022_set_control, | |
530 | .get_chip_id = mt9v022_get_chip_id, | |
531 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
532 | .get_register = mt9v022_get_register, | |
533 | .set_register = mt9v022_set_register, | |
534 | #endif | |
535 | }; | |
536 | ||
537 | static int mt9v022_get_control(struct soc_camera_device *icd, | |
538 | struct v4l2_control *ctrl) | |
539 | { | |
540 | int data; | |
541 | ||
542 | switch (ctrl->id) { | |
543 | case V4L2_CID_VFLIP: | |
544 | data = reg_read(icd, MT9V022_READ_MODE); | |
545 | if (data < 0) | |
546 | return -EIO; | |
547 | ctrl->value = !!(data & 0x10); | |
548 | break; | |
549 | case V4L2_CID_HFLIP: | |
550 | data = reg_read(icd, MT9V022_READ_MODE); | |
551 | if (data < 0) | |
552 | return -EIO; | |
553 | ctrl->value = !!(data & 0x20); | |
554 | break; | |
555 | case V4L2_CID_EXPOSURE_AUTO: | |
556 | data = reg_read(icd, MT9V022_AEC_AGC_ENABLE); | |
557 | if (data < 0) | |
558 | return -EIO; | |
559 | ctrl->value = !!(data & 0x1); | |
560 | break; | |
561 | case V4L2_CID_AUTOGAIN: | |
562 | data = reg_read(icd, MT9V022_AEC_AGC_ENABLE); | |
563 | if (data < 0) | |
564 | return -EIO; | |
565 | ctrl->value = !!(data & 0x2); | |
566 | break; | |
567 | } | |
568 | return 0; | |
569 | } | |
570 | ||
571 | static int mt9v022_set_control(struct soc_camera_device *icd, | |
572 | struct v4l2_control *ctrl) | |
573 | { | |
574 | int data; | |
575 | const struct v4l2_queryctrl *qctrl; | |
576 | ||
577 | qctrl = soc_camera_find_qctrl(&mt9v022_ops, ctrl->id); | |
578 | ||
579 | if (!qctrl) | |
580 | return -EINVAL; | |
581 | ||
582 | switch (ctrl->id) { | |
583 | case V4L2_CID_VFLIP: | |
584 | if (ctrl->value) | |
585 | data = reg_set(icd, MT9V022_READ_MODE, 0x10); | |
586 | else | |
587 | data = reg_clear(icd, MT9V022_READ_MODE, 0x10); | |
588 | if (data < 0) | |
589 | return -EIO; | |
590 | break; | |
591 | case V4L2_CID_HFLIP: | |
592 | if (ctrl->value) | |
593 | data = reg_set(icd, MT9V022_READ_MODE, 0x20); | |
594 | else | |
595 | data = reg_clear(icd, MT9V022_READ_MODE, 0x20); | |
596 | if (data < 0) | |
597 | return -EIO; | |
598 | break; | |
599 | case V4L2_CID_GAIN: | |
600 | /* mt9v022 has minimum == default */ | |
601 | if (ctrl->value > qctrl->maximum || ctrl->value < qctrl->minimum) | |
602 | return -EINVAL; | |
603 | else { | |
604 | unsigned long range = qctrl->maximum - qctrl->minimum; | |
605 | /* Datasheet says 16 to 64. autogain only works properly | |
606 | * after setting gain to maximum 14. Larger values | |
607 | * produce "white fly" noise effect. On the whole, | |
608 | * manually setting analog gain does no good. */ | |
609 | unsigned long gain = ((ctrl->value - qctrl->minimum) * | |
610 | 10 + range / 2) / range + 4; | |
611 | if (gain >= 32) | |
612 | gain &= ~1; | |
613 | /* The user wants to set gain manually, hope, she | |
614 | * knows, what she's doing... Switch AGC off. */ | |
615 | ||
616 | if (reg_clear(icd, MT9V022_AEC_AGC_ENABLE, 0x2) < 0) | |
617 | return -EIO; | |
618 | ||
619 | dev_info(&icd->dev, "Setting gain from %d to %lu\n", | |
620 | reg_read(icd, MT9V022_ANALOG_GAIN), gain); | |
621 | if (reg_write(icd, MT9V022_ANALOG_GAIN, gain) < 0) | |
622 | return -EIO; | |
623 | icd->gain = ctrl->value; | |
624 | } | |
625 | break; | |
626 | case V4L2_CID_EXPOSURE: | |
627 | /* mt9v022 has maximum == default */ | |
628 | if (ctrl->value > qctrl->maximum || ctrl->value < qctrl->minimum) | |
629 | return -EINVAL; | |
630 | else { | |
631 | unsigned long range = qctrl->maximum - qctrl->minimum; | |
632 | unsigned long shutter = ((ctrl->value - qctrl->minimum) * | |
633 | 479 + range / 2) / range + 1; | |
634 | /* The user wants to set shutter width manually, hope, | |
635 | * she knows, what she's doing... Switch AEC off. */ | |
636 | ||
637 | if (reg_clear(icd, MT9V022_AEC_AGC_ENABLE, 0x1) < 0) | |
638 | return -EIO; | |
639 | ||
640 | dev_dbg(&icd->dev, "Shutter width from %d to %lu\n", | |
641 | reg_read(icd, MT9V022_TOTAL_SHUTTER_WIDTH), | |
642 | shutter); | |
643 | if (reg_write(icd, MT9V022_TOTAL_SHUTTER_WIDTH, | |
644 | shutter) < 0) | |
645 | return -EIO; | |
646 | icd->exposure = ctrl->value; | |
647 | } | |
648 | break; | |
649 | case V4L2_CID_AUTOGAIN: | |
650 | if (ctrl->value) | |
651 | data = reg_set(icd, MT9V022_AEC_AGC_ENABLE, 0x2); | |
652 | else | |
653 | data = reg_clear(icd, MT9V022_AEC_AGC_ENABLE, 0x2); | |
654 | if (data < 0) | |
655 | return -EIO; | |
656 | break; | |
657 | case V4L2_CID_EXPOSURE_AUTO: | |
658 | if (ctrl->value) | |
659 | data = reg_set(icd, MT9V022_AEC_AGC_ENABLE, 0x1); | |
660 | else | |
661 | data = reg_clear(icd, MT9V022_AEC_AGC_ENABLE, 0x1); | |
662 | if (data < 0) | |
663 | return -EIO; | |
664 | break; | |
665 | } | |
666 | return 0; | |
667 | } | |
668 | ||
669 | /* Interface active, can use i2c. If it fails, it can indeed mean, that | |
670 | * this wasn't our capture interface, so, we wait for the right one */ | |
671 | static int mt9v022_video_probe(struct soc_camera_device *icd) | |
672 | { | |
673 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
674 | s32 data; | |
675 | int ret; | |
676 | ||
677 | if (!icd->dev.parent || | |
678 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | |
679 | return -ENODEV; | |
680 | ||
681 | /* Read out the chip version register */ | |
682 | data = reg_read(icd, MT9V022_CHIP_VERSION); | |
683 | ||
684 | /* must be 0x1311 or 0x1313 */ | |
685 | if (data != 0x1311 && data != 0x1313) { | |
686 | ret = -ENODEV; | |
687 | dev_info(&icd->dev, "No MT9V022 detected, ID register 0x%x\n", | |
688 | data); | |
689 | goto ei2c; | |
690 | } | |
691 | ||
692 | /* Soft reset */ | |
693 | ret = reg_write(icd, MT9V022_RESET, 1); | |
694 | if (ret < 0) | |
695 | goto ei2c; | |
696 | /* 15 clock cycles */ | |
697 | udelay(200); | |
698 | if (reg_read(icd, MT9V022_RESET)) { | |
699 | dev_err(&icd->dev, "Resetting MT9V022 failed!\n"); | |
700 | goto ei2c; | |
701 | } | |
702 | ||
703 | /* Set monochrome or colour sensor type */ | |
704 | if (sensor_type && (!strcmp("colour", sensor_type) || | |
705 | !strcmp("color", sensor_type))) { | |
706 | ret = reg_write(icd, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11); | |
707 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATC; | |
26f1b942 | 708 | icd->formats = mt9v022_colour_formats; |
bb55de3b | 709 | if (mt9v022->client->dev.platform_data) |
26f1b942 | 710 | icd->num_formats = ARRAY_SIZE(mt9v022_colour_formats); |
bb55de3b | 711 | else |
26f1b942 | 712 | icd->num_formats = 1; |
7397bfbe GL |
713 | } else { |
714 | ret = reg_write(icd, MT9V022_PIXEL_OPERATION_MODE, 0x11); | |
715 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATM; | |
26f1b942 | 716 | icd->formats = mt9v022_monochrome_formats; |
bb55de3b | 717 | if (mt9v022->client->dev.platform_data) |
26f1b942 | 718 | icd->num_formats = ARRAY_SIZE(mt9v022_monochrome_formats); |
bb55de3b | 719 | else |
26f1b942 | 720 | icd->num_formats = 1; |
7397bfbe GL |
721 | } |
722 | ||
723 | if (ret >= 0) | |
724 | ret = soc_camera_video_start(icd); | |
725 | if (ret < 0) | |
726 | goto eisis; | |
727 | ||
728 | dev_info(&icd->dev, "Detected a MT9V022 chip ID %x, %s sensor\n", | |
729 | data, mt9v022->model == V4L2_IDENT_MT9V022IX7ATM ? | |
730 | "monochrome" : "colour"); | |
731 | ||
732 | return 0; | |
733 | ||
734 | eisis: | |
735 | ei2c: | |
736 | return ret; | |
737 | } | |
738 | ||
739 | static void mt9v022_video_remove(struct soc_camera_device *icd) | |
740 | { | |
741 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
742 | ||
743 | dev_dbg(&icd->dev, "Video %x removed: %p, %p\n", mt9v022->client->addr, | |
744 | mt9v022->icd.dev.parent, mt9v022->icd.vdev); | |
745 | soc_camera_video_stop(&mt9v022->icd); | |
746 | } | |
747 | ||
d2653e92 JD |
748 | static int mt9v022_probe(struct i2c_client *client, |
749 | const struct i2c_device_id *did) | |
7397bfbe GL |
750 | { |
751 | struct mt9v022 *mt9v022; | |
752 | struct soc_camera_device *icd; | |
753 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); | |
754 | struct soc_camera_link *icl = client->dev.platform_data; | |
755 | int ret; | |
756 | ||
757 | if (!icl) { | |
758 | dev_err(&client->dev, "MT9V022 driver needs platform data\n"); | |
759 | return -EINVAL; | |
760 | } | |
761 | ||
762 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { | |
763 | dev_warn(&adapter->dev, | |
764 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); | |
765 | return -EIO; | |
766 | } | |
767 | ||
768 | mt9v022 = kzalloc(sizeof(struct mt9v022), GFP_KERNEL); | |
769 | if (!mt9v022) | |
770 | return -ENOMEM; | |
771 | ||
772 | mt9v022->chip_control = MT9V022_CHIP_CONTROL_DEFAULT; | |
773 | mt9v022->client = client; | |
774 | i2c_set_clientdata(client, mt9v022); | |
775 | ||
776 | icd = &mt9v022->icd; | |
7397bfbe GL |
777 | icd->ops = &mt9v022_ops; |
778 | icd->control = &client->dev; | |
779 | icd->x_min = 1; | |
780 | icd->y_min = 4; | |
781 | icd->x_current = 1; | |
782 | icd->y_current = 4; | |
783 | icd->width_min = 48; | |
784 | icd->width_max = 752; | |
785 | icd->height_min = 32; | |
786 | icd->height_max = 480; | |
787 | icd->y_skip_top = 1; | |
788 | icd->iface = icl->bus_id; | |
789 | /* Default datawidth - this is the only width this camera (normally) | |
790 | * supports. It is only with extra logic that it can support | |
791 | * other widths. Therefore it seems to be a sensible default. */ | |
792 | mt9v022->datawidth = 10; | |
793 | ||
794 | ret = bus_switch_request(mt9v022, icl); | |
795 | if (ret) | |
796 | goto eswinit; | |
797 | ||
798 | ret = soc_camera_device_register(icd); | |
799 | if (ret) | |
800 | goto eisdr; | |
801 | ||
802 | return 0; | |
803 | ||
804 | eisdr: | |
805 | bus_switch_release(mt9v022); | |
806 | eswinit: | |
807 | kfree(mt9v022); | |
808 | return ret; | |
809 | } | |
810 | ||
811 | static int mt9v022_remove(struct i2c_client *client) | |
812 | { | |
813 | struct mt9v022 *mt9v022 = i2c_get_clientdata(client); | |
814 | ||
815 | soc_camera_device_unregister(&mt9v022->icd); | |
816 | bus_switch_release(mt9v022); | |
817 | kfree(mt9v022); | |
818 | ||
819 | return 0; | |
820 | } | |
821 | ||
3760f736 JD |
822 | static const struct i2c_device_id mt9v022_id[] = { |
823 | { "mt9v022", 0 }, | |
824 | { } | |
825 | }; | |
826 | MODULE_DEVICE_TABLE(i2c, mt9v022_id); | |
827 | ||
7397bfbe GL |
828 | static struct i2c_driver mt9v022_i2c_driver = { |
829 | .driver = { | |
830 | .name = "mt9v022", | |
831 | }, | |
832 | .probe = mt9v022_probe, | |
833 | .remove = mt9v022_remove, | |
3760f736 | 834 | .id_table = mt9v022_id, |
7397bfbe GL |
835 | }; |
836 | ||
837 | static int __init mt9v022_mod_init(void) | |
838 | { | |
839 | return i2c_add_driver(&mt9v022_i2c_driver); | |
840 | } | |
841 | ||
842 | static void __exit mt9v022_mod_exit(void) | |
843 | { | |
844 | i2c_del_driver(&mt9v022_i2c_driver); | |
845 | } | |
846 | ||
847 | module_init(mt9v022_mod_init); | |
848 | module_exit(mt9v022_mod_exit); | |
849 | ||
850 | MODULE_DESCRIPTION("Micron MT9V022 Camera driver"); | |
851 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); | |
852 | MODULE_LICENSE("GPL"); |