[linux-2.6-block.git] / drivers / media / video / em28xx / em28xx-core.c

/*
   em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices

   Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
		      Markus Rechberger <mrechberger@gmail.com>
		      Mauro Carvalho Chehab <mchehab@infradead.org>
		      Sascha Sommer <saschasommer@freenet.de>

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/init.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/usb.h>
#include <linux/vmalloc.h>

#include "em28xx.h"

/* #define ENABLE_DEBUG_ISOC_FRAMES */

static unsigned int core_debug;
module_param(core_debug,int,0644);
MODULE_PARM_DESC(core_debug,"enable debug messages [core]");

#define em28xx_coredbg(fmt, arg...) do {\
	if (core_debug) \
		printk(KERN_INFO "%s %s :"fmt, \
			 dev->name, __func__ , ##arg); } while (0)

static unsigned int reg_debug;
module_param(reg_debug,int,0644);
MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");

#define em28xx_regdbg(fmt, arg...) do {\
	if (reg_debug) \
		printk(KERN_INFO "%s %s :"fmt, \
			 dev->name, __func__ , ##arg); } while (0)

static int alt = EM28XX_PINOUT;
module_param(alt, int, 0644);
MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");

/* FIXME */
#define em28xx_isocdbg(fmt, arg...) do {\
	if (core_debug) \
		printk(KERN_INFO "%s %s :"fmt, \
			 dev->name, __func__ , ##arg); } while (0)

/*
 * em28xx_read_reg_req()
 * reads data from the usb device specifying bRequest
 */
int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
				   char *buf, int len)
{
	int ret, byte;

	if (dev->state & DEV_DISCONNECTED)
		return(-ENODEV);

	em28xx_regdbg("req=%02x, reg=%02x ", req, reg);

	ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
			      USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			      0x0000, reg, buf, len, HZ);

	if (reg_debug) {
		printk(ret < 0 ? " failed!\n" : "%02x values: ", ret);
		for (byte = 0; byte < len; byte++)
			printk(KERN_INFO " %02x", (unsigned char)buf[byte]);

		printk(KERN_INFO "\n");
	}

	return ret;
}

/*
 * em28xx_read_reg_req()
 * reads data from the usb device specifying bRequest
 */
int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
{
	u8 val;
	int ret;

	if (dev->state & DEV_DISCONNECTED)
		return(-ENODEV);

	em28xx_regdbg("req=%02x, reg=%02x:", req, reg);

	ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
			      USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			      0x0000, reg, &val, 1, HZ);

	if (reg_debug)
		printk(ret < 0 ? " failed!\n" :
				 "%02x\n", (unsigned char) val);

	if (ret < 0)
		return ret;

	return val;
}

int em28xx_read_reg(struct em28xx *dev, u16 reg)
{
	return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
}

/*
 * em28xx_write_regs_req()
 * sends data to the usb device, specifying bRequest
 */
int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
				 int len)
{
	int ret;

	/*usb_control_msg seems to expect a kmalloced buffer */
	unsigned char *bufs;

	if (dev->state & DEV_DISCONNECTED)
		return(-ENODEV);

	bufs = kmalloc(len, GFP_KERNEL);

	em28xx_regdbg("req=%02x reg=%02x:", req, reg);

	if (reg_debug) {
		int i;
		for (i = 0; i < len; ++i)
			printk(KERN_INFO " %02x", (unsigned char)buf[i]);
		printk(KERN_INFO "\n");
	}

	if (!bufs)
		return -ENOMEM;
	memcpy(bufs, buf, len);
	ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req,
			      USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			      0x0000, reg, bufs, len, HZ);
	kfree(bufs);
	return ret;
}

int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
{
	return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
}

/*
 * em28xx_write_reg_bits()
 * sets only some bits (specified by bitmask) of a register, by first reading
 * the actual value
 */
static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
				 u8 bitmask)
{
	int oldval;
	u8 newval;

	oldval = em28xx_read_reg(dev, reg);

	if (oldval < 0)
		return oldval;

	newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
	return em28xx_write_regs(dev, reg, &newval, 1);
}

/*
 * em28xx_write_ac97()
 * write a 16 bit value to the specified AC97 address (LSB first!)
 */
static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u8 *val)
{
	int ret, i;
	u8 addr = reg & 0x7f;

	ret = em28xx_write_regs(dev, AC97LSB_REG, val, 2);
	if (ret < 0)
		return ret;

	ret = em28xx_write_regs(dev, AC97ADDR_REG, &addr, 1);
	if (ret < 0)
		return ret;

	/* Wait up to 50 ms for AC97 command to complete */
	for (i = 0; i < 10; i++) {
		ret = em28xx_read_reg(dev, AC97BUSY_REG);
		if (ret < 0)
			return ret;

		if (!(ret & 0x01))
			return 0;
		msleep(5);
	}
	em28xx_warn("AC97 command still being executed: not handled properly!\n");
	return 0;
}

static int em28xx_set_audio_source(struct em28xx *dev)
{
	static char *enable  = "\x08\x08";
	static char *disable = "\x08\x88";
	char *video = enable, *line = disable;
	int ret;
	u8 input;

	if (dev->is_em2800) {
		if (dev->ctl_ainput)
			input = EM2800_AUDIO_SRC_LINE;
		else
			input = EM2800_AUDIO_SRC_TUNER;

		ret = em28xx_write_regs(dev, EM2800_AUDIOSRC_REG, &input, 1);
		if (ret < 0)
			return ret;
	}

	if (dev->has_msp34xx)
		input = EM28XX_AUDIO_SRC_TUNER;
	else {
		switch (dev->ctl_ainput) {
		case EM28XX_AMUX_VIDEO:
			input = EM28XX_AUDIO_SRC_TUNER;
			break;
		case EM28XX_AMUX_LINE_IN:
			input = EM28XX_AUDIO_SRC_LINE;
			break;
		case EM28XX_AMUX_AC97_VIDEO:
			input = EM28XX_AUDIO_SRC_LINE;
			break;
		case EM28XX_AMUX_AC97_LINE_IN:
			input = EM28XX_AUDIO_SRC_LINE;
			video = disable;
			line  = enable;
			break;
		}
	}

	ret = em28xx_write_reg_bits(dev, AUDIOSRC_REG, input, 0xc0);
	if (ret < 0)
		return ret;
	msleep(5);

	/* Sets AC97 mixer registers
	   This is seems to be needed, even for non-ac97 configs
	 */
	ret = em28xx_write_ac97(dev, VIDEO_AC97, video);
	if (ret < 0)
		return ret;

	ret = em28xx_write_ac97(dev, LINE_IN_AC97, line);

	return ret;
}

int em28xx_audio_analog_set(struct em28xx *dev)
{
	int ret;
	char s[2] = { 0x00, 0x00 };
	u8 xclk = 0x07;

	s[0] |= 0x1f - dev->volume;
	s[1] |= 0x1f - dev->volume;

	/* Mute */
	s[1] |= 0x80;
	ret = em28xx_write_ac97(dev, MASTER_AC97, s);

	if (ret < 0)
		return ret;

	if (dev->has_12mhz_i2s)
		xclk |= 0x20;

	if (!dev->mute)
		xclk |= 0x80;

	ret = em28xx_write_reg_bits(dev, XCLK_REG, xclk, 0xa7);
	if (ret < 0)
		return ret;
	msleep(10);

	/* Selects the proper audio input */
	ret = em28xx_set_audio_source(dev);

	/* Unmute device */
	if (!dev->mute)
		s[1] &= ~0x80;
	ret = em28xx_write_ac97(dev, MASTER_AC97, s);

	return ret;
}
EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);

int em28xx_colorlevels_set_default(struct em28xx *dev)
{
	em28xx_write_regs(dev, YGAIN_REG, "\x10", 1);	/* contrast */
	em28xx_write_regs(dev, YOFFSET_REG, "\x00", 1);	/* brightness */
	em28xx_write_regs(dev, UVGAIN_REG, "\x10", 1);	/* saturation */
	em28xx_write_regs(dev, UOFFSET_REG, "\x00", 1);
	em28xx_write_regs(dev, VOFFSET_REG, "\x00", 1);
	em28xx_write_regs(dev, SHARPNESS_REG, "\x00", 1);

	em28xx_write_regs(dev, GAMMA_REG, "\x20", 1);
	em28xx_write_regs(dev, RGAIN_REG, "\x20", 1);
	em28xx_write_regs(dev, GGAIN_REG, "\x20", 1);
	em28xx_write_regs(dev, BGAIN_REG, "\x20", 1);
	em28xx_write_regs(dev, ROFFSET_REG, "\x00", 1);
	em28xx_write_regs(dev, GOFFSET_REG, "\x00", 1);
	return em28xx_write_regs(dev, BOFFSET_REG, "\x00", 1);
}

int em28xx_capture_start(struct em28xx *dev, int start)
{
	int rc;
	/* FIXME: which is the best order? */
	/* video registers are sampled by VREF */
	rc = em28xx_write_reg_bits(dev, USBSUSP_REG,
				   start ? 0x10 : 0x00, 0x10);
	if (rc < 0)
		return rc;

	if (!start) {
		/* disable video capture */
		rc = em28xx_write_regs(dev, VINENABLE_REG, "\x27", 1);
		return rc;
	}

	/* enable video capture */
	rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);

	if (dev->mode == EM28XX_ANALOG_MODE)
		rc = em28xx_write_regs(dev, VINENABLE_REG, "\x67", 1);
	else
		rc = em28xx_write_regs(dev, VINENABLE_REG, "\x37", 1);

	msleep(6);

	return rc;
}

int em28xx_outfmt_set_yuv422(struct em28xx *dev)
{
	em28xx_write_regs(dev, OUTFMT_REG, "\x34", 1);
	em28xx_write_regs(dev, VINMODE_REG, "\x10", 1);
	return em28xx_write_regs(dev, VINCTRL_REG, "\x11", 1);
}

static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
				  u8 ymin, u8 ymax)
{
	em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
			xmin, ymin, xmax, ymax);

	em28xx_write_regs(dev, XMIN_REG, &xmin, 1);
	em28xx_write_regs(dev, XMAX_REG, &xmax, 1);
	em28xx_write_regs(dev, YMIN_REG, &ymin, 1);
	return em28xx_write_regs(dev, YMAX_REG, &ymax, 1);
}

static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
				   u16 width, u16 height)
{
	u8 cwidth = width;
	u8 cheight = height;
	u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);

	em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
			(width | (overflow & 2) << 7),
			(height | (overflow & 1) << 8));

	em28xx_write_regs(dev, HSTART_REG, &hstart, 1);
	em28xx_write_regs(dev, VSTART_REG, &vstart, 1);
	em28xx_write_regs(dev, CWIDTH_REG, &cwidth, 1);
	em28xx_write_regs(dev, CHEIGHT_REG, &cheight, 1);
	return em28xx_write_regs(dev, OFLOW_REG, &overflow, 1);
}

static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
{
	u8 mode;
	/* the em2800 scaler only supports scaling down to 50% */
	if (dev->is_em2800)
		mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
	else {
		u8 buf[2];
		buf[0] = h;
		buf[1] = h >> 8;
		em28xx_write_regs(dev, HSCALELOW_REG, (char *)buf, 2);
		buf[0] = v;
		buf[1] = v >> 8;
		em28xx_write_regs(dev, VSCALELOW_REG, (char *)buf, 2);
		/* it seems that both H and V scalers must be active
		   to work correctly */
		mode = (h || v)? 0x30: 0x00;
	}
	return em28xx_write_reg_bits(dev, COMPR_REG, mode, 0x30);
}

/* FIXME: this only function read values from dev */
int em28xx_resolution_set(struct em28xx *dev)
{
	int width, height;
	width = norm_maxw(dev);
	height = norm_maxh(dev) >> 1;

	em28xx_outfmt_set_yuv422(dev);
	em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
	em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
	return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
}

int em28xx_set_alternate(struct em28xx *dev)
{
	int errCode, prev_alt = dev->alt;
	int i;
	unsigned int min_pkt_size = dev->width * 2 + 4;

	/* When image size is bigger than a certain value,
	   the frame size should be increased, otherwise, only
	   green screen will be received.
	 */
	if (dev->width * 2 * dev->height > 720 * 240 * 2)
		min_pkt_size *= 2;

	for (i = 0; i < dev->num_alt; i++) {
		/* stop when the selected alt setting offers enough bandwidth */
		if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
			dev->alt = i;
			break;
		/* otherwise make sure that we end up with the maximum bandwidth
		   because the min_pkt_size equation might be wrong...
		*/
		} else if (dev->alt_max_pkt_size[i] >
			   dev->alt_max_pkt_size[dev->alt])
			dev->alt = i;
	}

	if (dev->alt != prev_alt) {
		em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
				min_pkt_size, dev->alt);
		dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
		em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
			       dev->alt, dev->max_pkt_size);
		errCode = usb_set_interface(dev->udev, 0, dev->alt);
		if (errCode < 0) {
			em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
					dev->alt, errCode);
			return errCode;
		}
	}
	return 0;
}

/* ------------------------------------------------------------------
	URB control
   ------------------------------------------------------------------*/

/*
 * IRQ callback, called by URB callback
 */
static void em28xx_irq_callback(struct urb *urb)
{
	struct em28xx_dmaqueue  *dma_q = urb->context;
	struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
	int rc, i;

	/* Copy data from URB */
	spin_lock(&dev->slock);
	rc = dev->isoc_ctl.isoc_copy(dev, urb);
	spin_unlock(&dev->slock);

	/* Reset urb buffers */
	for (i = 0; i < urb->number_of_packets; i++) {
		urb->iso_frame_desc[i].status = 0;
		urb->iso_frame_desc[i].actual_length = 0;
	}
	urb->status = 0;

	urb->status = usb_submit_urb(urb, GFP_ATOMIC);
	if (urb->status) {
		em28xx_err("urb resubmit failed (error=%i)\n",
			urb->status);
	}
}

/*
 * Stop and Deallocate URBs
 */
void em28xx_uninit_isoc(struct em28xx *dev)
{
	struct urb *urb;
	int i;

	em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");

	dev->isoc_ctl.nfields = -1;
	for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
		urb = dev->isoc_ctl.urb[i];
		if (urb) {
			usb_kill_urb(urb);
			usb_unlink_urb(urb);
			if (dev->isoc_ctl.transfer_buffer[i]) {
				usb_buffer_free(dev->udev,
					urb->transfer_buffer_length,
					dev->isoc_ctl.transfer_buffer[i],
					urb->transfer_dma);
			}
			usb_free_urb(urb);
			dev->isoc_ctl.urb[i] = NULL;
		}
		dev->isoc_ctl.transfer_buffer[i] = NULL;
	}

	kfree(dev->isoc_ctl.urb);
	kfree(dev->isoc_ctl.transfer_buffer);

	dev->isoc_ctl.urb = NULL;
	dev->isoc_ctl.transfer_buffer = NULL;
	dev->isoc_ctl.num_bufs = 0;

	em28xx_capture_start(dev, 0);
}
EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);

/*
 * Allocate URBs and start IRQ
 */
int em28xx_init_isoc(struct em28xx *dev, int max_packets,
		     int num_bufs, int max_pkt_size,
		     int (*isoc_copy) (struct em28xx *dev, struct urb *urb),
		     int cap_type)
{
	struct em28xx_dmaqueue *dma_q = &dev->vidq;
	int i;
	int sb_size, pipe;
	struct urb *urb;
	int j, k;
	int rc;

	em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");

	/* De-allocates all pending stuff */
	em28xx_uninit_isoc(dev);

	dev->isoc_ctl.isoc_copy = isoc_copy;
	dev->isoc_ctl.num_bufs = num_bufs;

	dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs,  GFP_KERNEL);
	if (!dev->isoc_ctl.urb) {
		em28xx_errdev("cannot alloc memory for usb buffers\n");
		return -ENOMEM;
	}

	dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
					      GFP_KERNEL);
	if (!dev->isoc_ctl.urb) {
		em28xx_errdev("cannot allocate memory for usbtransfer\n");
		kfree(dev->isoc_ctl.urb);
		return -ENOMEM;
	}

	dev->isoc_ctl.max_pkt_size = max_pkt_size;
	dev->isoc_ctl.buf = NULL;

	sb_size = max_packets * dev->isoc_ctl.max_pkt_size;

	/* allocate urbs and transfer buffers */
	for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
		urb = usb_alloc_urb(max_packets, GFP_KERNEL);
		if (!urb) {
			em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
			em28xx_uninit_isoc(dev);
			return -ENOMEM;
		}
		dev->isoc_ctl.urb[i] = urb;

		dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
			sb_size, GFP_KERNEL, &urb->transfer_dma);
		if (!dev->isoc_ctl.transfer_buffer[i]) {
			em28xx_err("unable to allocate %i bytes for transfer"
					" buffer %i%s\n",
					sb_size, i,
					in_interrupt()?" while in int":"");
			em28xx_uninit_isoc(dev);
			return -ENOMEM;
		}
		memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);

		/* FIXME: this is a hack - should be
			'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
			should also be using 'desc.bInterval'
		 */
		pipe = usb_rcvisocpipe(dev->udev,
			cap_type == EM28XX_ANALOG_CAPTURE ? 0x82 : 0x84);

		usb_fill_int_urb(urb, dev->udev, pipe,
				 dev->isoc_ctl.transfer_buffer[i], sb_size,
				 em28xx_irq_callback, dma_q, 1);

		urb->number_of_packets = max_packets;
		urb->transfer_flags = URB_ISO_ASAP;

		k = 0;
		for (j = 0; j < max_packets; j++) {
			urb->iso_frame_desc[j].offset = k;
			urb->iso_frame_desc[j].length =
						dev->isoc_ctl.max_pkt_size;
			k += dev->isoc_ctl.max_pkt_size;
		}
	}

	init_waitqueue_head(&dma_q->wq);

	em28xx_capture_start(dev, cap_type);

	/* submit urbs and enables IRQ */
	for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
		rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
		if (rc) {
			em28xx_err("submit of urb %i failed (error=%i)\n", i,
				   rc);
			em28xx_uninit_isoc(dev);
			return rc;
		}
	}

	return 0;
}
EXPORT_SYMBOL_GPL(em28xx_init_isoc);
Commit	Line	Data
a6c2ba28	1	/*
3acf2809	2	em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28	3
f7abcd38 MCC	4	Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
f7abcd38 MCC	5	Markus Rechberger <mrechberger@gmail.com>
2e7c6dc3	6	Mauro Carvalho Chehab <mchehab@infradead.org>
f7abcd38	7	Sascha Sommer <saschasommer@freenet.de>
a6c2ba28	8
	9	This program is free software; you can redistribute it and/or modify
	10	it under the terms of the GNU General Public License as published by
	11	the Free Software Foundation; either version 2 of the License, or
	12	(at your option) any later version.
	13
	14	This program is distributed in the hope that it will be useful,
	15	but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	GNU General Public License for more details.
	18
	19	You should have received a copy of the GNU General Public License
	20	along with this program; if not, write to the Free Software
	21	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	22	*/
	23
	24	#include <linux/init.h>
	25	#include <linux/list.h>
	26	#include <linux/module.h>
a6c2ba28	27	#include <linux/usb.h>
	28	#include <linux/vmalloc.h>
	29
f7abcd38	30	#include "em28xx.h"
a6c2ba28	31
	32	/* #define ENABLE_DEBUG_ISOC_FRAMES */
	33
ff699e6b	34	static unsigned int core_debug;
a6c2ba28	35	module_param(core_debug,int,0644);
	36	MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
	37
3acf2809	38	#define em28xx_coredbg(fmt, arg...) do {\
4ac97914 MCC	39	if (core_debug) \
4ac97914 MCC	40	printk(KERN_INFO "%s %s :"fmt, \
d80e134d	41	dev->name, __func__ , ##arg); } while (0)
a6c2ba28	42
ff699e6b	43	static unsigned int reg_debug;
a6c2ba28	44	module_param(reg_debug,int,0644);
	45	MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
	46
3acf2809	47	#define em28xx_regdbg(fmt, arg...) do {\
4ac97914 MCC	48	if (reg_debug) \
4ac97914 MCC	49	printk(KERN_INFO "%s %s :"fmt, \
d80e134d	50	dev->name, __func__ , ##arg); } while (0)
a6c2ba28	51
3acf2809	52	static int alt = EM28XX_PINOUT;
a6c2ba28	53	module_param(alt, int, 0644);
	54	MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
	55
579f72e4 AT	56	/* FIXME */
	57	#define em28xx_isocdbg(fmt, arg...) do {\
	58	if (core_debug) \
	59	printk(KERN_INFO "%s %s :"fmt, \
	60	dev->name, __func__ , ##arg); } while (0)
	61
a6c2ba28	62	/*
3acf2809	63	* em28xx_read_reg_req()
a6c2ba28	64	* reads data from the usb device specifying bRequest
a6c2ba28	65	*/
3acf2809	66	int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28	67	char *buf, int len)
	68	{
	69	int ret, byte;
	70
9f38724a MR	71	if (dev->state & DEV_DISCONNECTED)
	72	return(-ENODEV);
	73
3acf2809	74	em28xx_regdbg("req=%02x, reg=%02x ", req, reg);
a6c2ba28	75
	76	ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
	77	USB_DIR_IN \| USB_TYPE_VENDOR \| USB_RECIP_DEVICE,
	78	0x0000, reg, buf, len, HZ);
	79
6ea54d93	80	if (reg_debug) {
a6c2ba28	81	printk(ret < 0 ? " failed!\n" : "%02x values: ", ret);
6ea54d93 DSL	82	for (byte = 0; byte < len; byte++)
	83	printk(KERN_INFO " %02x", (unsigned char)buf[byte]);
	84
	85	printk(KERN_INFO "\n");
a6c2ba28	86	}
	87
	88	return ret;
	89	}
	90
	91	/*
3acf2809	92	* em28xx_read_reg_req()
a6c2ba28	93	* reads data from the usb device specifying bRequest
a6c2ba28	94	*/
3acf2809	95	int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
a6c2ba28	96	{
	97	u8 val;
	98	int ret;
	99
9f38724a MR	100	if (dev->state & DEV_DISCONNECTED)
	101	return(-ENODEV);
	102
3acf2809	103	em28xx_regdbg("req=%02x, reg=%02x:", req, reg);
a6c2ba28	104
	105	ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
	106	USB_DIR_IN \| USB_TYPE_VENDOR \| USB_RECIP_DEVICE,
	107	0x0000, reg, &val, 1, HZ);
	108
	109	if (reg_debug)
0da5176f MCC	110	printk(ret < 0 ? " failed!\n" :
0da5176f MCC	111	"%02x\n", (unsigned char) val);
a6c2ba28	112
	113	if (ret < 0)
	114	return ret;
	115
	116	return val;
	117	}
	118
3acf2809	119	int em28xx_read_reg(struct em28xx *dev, u16 reg)
a6c2ba28	120	{
3acf2809	121	return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
a6c2ba28	122	}
	123
	124	/*
3acf2809	125	* em28xx_write_regs_req()
a6c2ba28	126	* sends data to the usb device, specifying bRequest
a6c2ba28	127	*/
3acf2809	128	int em28xx_write_regs_req(struct em28xx dev, u8 req, u16 reg, char buf,
a6c2ba28	129	int len)
	130	{
	131	int ret;
	132
	133	/usb_control_msg seems to expect a kmalloced buffer /
9f38724a MR	134	unsigned char *bufs;
	135
	136	if (dev->state & DEV_DISCONNECTED)
	137	return(-ENODEV);
	138
	139	bufs = kmalloc(len, GFP_KERNEL);
a6c2ba28	140
3acf2809	141	em28xx_regdbg("req=%02x reg=%02x:", req, reg);
a6c2ba28	142
	143	if (reg_debug) {
	144	int i;
	145	for (i = 0; i < len; ++i)
6ea54d93 DSL	146	printk(KERN_INFO " %02x", (unsigned char)buf[i]);
6ea54d93 DSL	147	printk(KERN_INFO "\n");
a6c2ba28	148	}
	149
	150	if (!bufs)
	151	return -ENOMEM;
	152	memcpy(bufs, buf, len);
	153	ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req,
	154	USB_DIR_OUT \| USB_TYPE_VENDOR \| USB_RECIP_DEVICE,
	155	0x0000, reg, bufs, len, HZ);
a6c2ba28	156	kfree(bufs);
	157	return ret;
	158	}
	159
3acf2809	160	int em28xx_write_regs(struct em28xx dev, u16 reg, char buf, int len)
a6c2ba28	161	{
3acf2809	162	return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
a6c2ba28	163	}
	164
	165	/*
3acf2809	166	* em28xx_write_reg_bits()
a6c2ba28	167	* sets only some bits (specified by bitmask) of a register, by first reading
	168	* the actual value
	169	*/
532fe652	170	static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
a6c2ba28	171	u8 bitmask)
	172	{
	173	int oldval;
	174	u8 newval;
6ea54d93 DSL	175
	176	oldval = em28xx_read_reg(dev, reg);
	177
	178	if (oldval < 0)
a6c2ba28	179	return oldval;
6ea54d93	180
a6c2ba28	181	newval = (((u8) oldval) & ~bitmask) \| (val & bitmask);
3acf2809	182	return em28xx_write_regs(dev, reg, &newval, 1);
a6c2ba28	183	}
	184
	185	/*
3acf2809	186	* em28xx_write_ac97()
a6c2ba28	187	* write a 16 bit value to the specified AC97 address (LSB first!)
a6c2ba28	188	*/
539c96d0	189	static int em28xx_write_ac97(struct em28xx dev, u8 reg, u8 val)
a6c2ba28	190	{
00b8730f	191	int ret, i;
a6c2ba28	192	u8 addr = reg & 0x7f;
6ea54d93 DSL	193
	194	ret = em28xx_write_regs(dev, AC97LSB_REG, val, 2);
	195	if (ret < 0)
a6c2ba28	196	return ret;
6ea54d93 DSL	197
	198	ret = em28xx_write_regs(dev, AC97ADDR_REG, &addr, 1);
	199	if (ret < 0)
a6c2ba28	200	return ret;
00b8730f MCC	201
	202	/* Wait up to 50 ms for AC97 command to complete */
	203	for (i = 0; i < 10; i++) {
6ea54d93 DSL	204	ret = em28xx_read_reg(dev, AC97BUSY_REG);
6ea54d93 DSL	205	if (ret < 0)
00b8730f	206	return ret;
6ea54d93	207
46cb57e6	208	if (!(ret & 0x01))
00b8730f MCC	209	return 0;
00b8730f MCC	210	msleep(5);
a6c2ba28	211	}
6ea54d93	212	em28xx_warn("AC97 command still being executed: not handled properly!\n");
a6c2ba28	213	return 0;
	214	}
	215
00b8730f	216	static int em28xx_set_audio_source(struct em28xx *dev)
539c96d0 MCC	217	{
	218	static char *enable = "\x08\x08";
	219	static char *disable = "\x08\x88";
	220	char video = enable, line = disable;
1685a6fe	221	int ret;
539c96d0 MCC	222	u8 input;
	223
	224	if (dev->is_em2800) {
	225	if (dev->ctl_ainput)
	226	input = EM2800_AUDIO_SRC_LINE;
	227	else
	228	input = EM2800_AUDIO_SRC_TUNER;
	229
	230	ret = em28xx_write_regs(dev, EM2800_AUDIOSRC_REG, &input, 1);
	231	if (ret < 0)
	232	return ret;
	233	}
	234
	235	if (dev->has_msp34xx)
	236	input = EM28XX_AUDIO_SRC_TUNER;
	237	else {
	238	switch (dev->ctl_ainput) {
	239	case EM28XX_AMUX_VIDEO:
	240	input = EM28XX_AUDIO_SRC_TUNER;
539c96d0 MCC	241	break;
	242	case EM28XX_AMUX_LINE_IN:
	243	input = EM28XX_AUDIO_SRC_LINE;
539c96d0 MCC	244	break;
	245	case EM28XX_AMUX_AC97_VIDEO:
	246	input = EM28XX_AUDIO_SRC_LINE;
	247	break;
	248	case EM28XX_AMUX_AC97_LINE_IN:
	249	input = EM28XX_AUDIO_SRC_LINE;
	250	video = disable;
	251	line = enable;
	252	break;
	253	}
	254	}
	255
	256	ret = em28xx_write_reg_bits(dev, AUDIOSRC_REG, input, 0xc0);
	257	if (ret < 0)
	258	return ret;
00b8730f	259	msleep(5);
539c96d0	260
7463dda2 MCC	261	/* Sets AC97 mixer registers
	262	This is seems to be needed, even for non-ac97 configs
	263	*/
539c96d0 MCC	264	ret = em28xx_write_ac97(dev, VIDEO_AC97, video);
	265	if (ret < 0)
	266	return ret;
	267
	268	ret = em28xx_write_ac97(dev, LINE_IN_AC97, line);
	269
	270	return ret;
	271	}
	272
3acf2809	273	int em28xx_audio_analog_set(struct em28xx *dev)
a6c2ba28	274	{
539c96d0	275	int ret;
a6c2ba28	276	char s[2] = { 0x00, 0x00 };
3abee53e	277	u8 xclk = 0x07;
539c96d0	278
a6c2ba28	279	s[0] \|= 0x1f - dev->volume;
a6c2ba28	280	s[1] \|= 0x1f - dev->volume;
539c96d0	281
00b8730f MCC	282	/* Mute */
00b8730f MCC	283	s[1] \|= 0x80;
539c96d0	284	ret = em28xx_write_ac97(dev, MASTER_AC97, s);
00b8730f	285
539c96d0 MCC	286	if (ret < 0)
	287	return ret;
	288
3abee53e MCC	289	if (dev->has_12mhz_i2s)
	290	xclk \|= 0x20;
	291
	292	if (!dev->mute)
	293	xclk \|= 0x80;
	294
	295	ret = em28xx_write_reg_bits(dev, XCLK_REG, xclk, 0xa7);
539c96d0 MCC	296	if (ret < 0)
539c96d0 MCC	297	return ret;
3abee53e	298	msleep(10);
539c96d0 MCC	299
	300	/* Selects the proper audio input */
	301	ret = em28xx_set_audio_source(dev);
a6c2ba28	302
00b8730f MCC	303	/* Unmute device */
	304	if (!dev->mute)
	305	s[1] &= ~0x80;
	306	ret = em28xx_write_ac97(dev, MASTER_AC97, s);
	307
539c96d0 MCC	308	return ret;
	309	}
	310	EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
a6c2ba28	311
3acf2809	312	int em28xx_colorlevels_set_default(struct em28xx *dev)
a6c2ba28	313	{
3acf2809 MCC	314	em28xx_write_regs(dev, YGAIN_REG, "\x10", 1); /* contrast */
	315	em28xx_write_regs(dev, YOFFSET_REG, "\x00", 1); /* brightness */
	316	em28xx_write_regs(dev, UVGAIN_REG, "\x10", 1); /* saturation */
	317	em28xx_write_regs(dev, UOFFSET_REG, "\x00", 1);
	318	em28xx_write_regs(dev, VOFFSET_REG, "\x00", 1);
	319	em28xx_write_regs(dev, SHARPNESS_REG, "\x00", 1);
	320
	321	em28xx_write_regs(dev, GAMMA_REG, "\x20", 1);
	322	em28xx_write_regs(dev, RGAIN_REG, "\x20", 1);
	323	em28xx_write_regs(dev, GGAIN_REG, "\x20", 1);
	324	em28xx_write_regs(dev, BGAIN_REG, "\x20", 1);
	325	em28xx_write_regs(dev, ROFFSET_REG, "\x00", 1);
	326	em28xx_write_regs(dev, GOFFSET_REG, "\x00", 1);
	327	return em28xx_write_regs(dev, BOFFSET_REG, "\x00", 1);
a6c2ba28	328	}
a6c2ba28	329
3acf2809	330	int em28xx_capture_start(struct em28xx *dev, int start)
a6c2ba28	331	{
ee6e3a86	332	int rc;
a6c2ba28	333	/* FIXME: which is the best order? */
a6c2ba28	334	/* video registers are sampled by VREF */
ee6e3a86 MCC	335	rc = em28xx_write_reg_bits(dev, USBSUSP_REG,
	336	start ? 0x10 : 0x00, 0x10);
	337	if (rc < 0)
	338	return rc;
	339
	340	if (!start) {
	341	/* disable video capture */
	342	rc = em28xx_write_regs(dev, VINENABLE_REG, "\x27", 1);
102a0b08	343	return rc;
ee6e3a86 MCC	344	}
ee6e3a86 MCC	345
a6c2ba28	346	/* enable video capture */
ee6e3a86	347	rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
102a0b08	348
ee6e3a86	349	if (dev->mode == EM28XX_ANALOG_MODE)
6ea54d93	350	rc = em28xx_write_regs(dev, VINENABLE_REG, "\x67", 1);
ee6e3a86	351	else
6ea54d93	352	rc = em28xx_write_regs(dev, VINENABLE_REG, "\x37", 1);
ee6e3a86	353
6ea54d93	354	msleep(6);
ee6e3a86 MCC	355
ee6e3a86 MCC	356	return rc;
a6c2ba28	357	}
a6c2ba28	358
3acf2809	359	int em28xx_outfmt_set_yuv422(struct em28xx *dev)
a6c2ba28	360	{
3acf2809 MCC	361	em28xx_write_regs(dev, OUTFMT_REG, "\x34", 1);
	362	em28xx_write_regs(dev, VINMODE_REG, "\x10", 1);
	363	return em28xx_write_regs(dev, VINCTRL_REG, "\x11", 1);
a6c2ba28	364	}
a6c2ba28	365
adcb0fa2 AB	366	static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
adcb0fa2 AB	367	u8 ymin, u8 ymax)
a6c2ba28	368	{
6ea54d93 DSL	369	em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
6ea54d93 DSL	370	xmin, ymin, xmax, ymax);
a6c2ba28	371
3acf2809 MCC	372	em28xx_write_regs(dev, XMIN_REG, &xmin, 1);
	373	em28xx_write_regs(dev, XMAX_REG, &xmax, 1);
	374	em28xx_write_regs(dev, YMIN_REG, &ymin, 1);
	375	return em28xx_write_regs(dev, YMAX_REG, &ymax, 1);
a6c2ba28	376	}
a6c2ba28	377
adcb0fa2	378	static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
a6c2ba28	379	u16 width, u16 height)
	380	{
	381	u8 cwidth = width;
	382	u8 cheight = height;
	383	u8 overflow = (height >> 7 & 0x02) \| (width >> 8 & 0x01);
	384
6ea54d93 DSL	385	em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
6ea54d93 DSL	386	(width \| (overflow & 2) << 7),
a6c2ba28	387	(height \| (overflow & 1) << 8));
a6c2ba28	388
3acf2809 MCC	389	em28xx_write_regs(dev, HSTART_REG, &hstart, 1);
	390	em28xx_write_regs(dev, VSTART_REG, &vstart, 1);
	391	em28xx_write_regs(dev, CWIDTH_REG, &cwidth, 1);
	392	em28xx_write_regs(dev, CHEIGHT_REG, &cheight, 1);
	393	return em28xx_write_regs(dev, OFLOW_REG, &overflow, 1);
a6c2ba28	394	}
a6c2ba28	395
adcb0fa2	396	static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
a6c2ba28	397	{
52c02fcd SS	398	u8 mode;
52c02fcd SS	399	/* the em2800 scaler only supports scaling down to 50% */
6ea54d93	400	if (dev->is_em2800)
52c02fcd SS	401	mode = (v ? 0x20 : 0x00) \| (h ? 0x10 : 0x00);
	402	else {
	403	u8 buf[2];
	404	buf[0] = h;
	405	buf[1] = h >> 8;
3acf2809	406	em28xx_write_regs(dev, HSCALELOW_REG, (char *)buf, 2);
52c02fcd SS	407	buf[0] = v;
52c02fcd SS	408	buf[1] = v >> 8;
3acf2809	409	em28xx_write_regs(dev, VSCALELOW_REG, (char *)buf, 2);
6ea54d93 DSL	410	/* it seems that both H and V scalers must be active
6ea54d93 DSL	411	to work correctly */
52c02fcd	412	mode = (h \|\| v)? 0x30: 0x00;
74458e6c	413	}
3acf2809	414	return em28xx_write_reg_bits(dev, COMPR_REG, mode, 0x30);
a6c2ba28	415	}
	416
	417	/* FIXME: this only function read values from dev */
3acf2809	418	int em28xx_resolution_set(struct em28xx *dev)
a6c2ba28	419	{
	420	int width, height;
	421	width = norm_maxw(dev);
	422	height = norm_maxh(dev) >> 1;
	423
3acf2809 MCC	424	em28xx_outfmt_set_yuv422(dev);
	425	em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
	426	em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
	427	return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
a6c2ba28	428	}
a6c2ba28	429
3acf2809	430	int em28xx_set_alternate(struct em28xx *dev)
a6c2ba28	431	{
a6c2ba28	432	int errCode, prev_alt = dev->alt;
3687e1e6	433	int i;
44dc733c	434	unsigned int min_pkt_size = dev->width * 2 + 4;
3687e1e6	435
2c4a07b2	436	/* When image size is bigger than a certain value,
3687e1e6 MCC	437	the frame size should be increased, otherwise, only
	438	green screen will be received.
	439	*/
44dc733c	440	if (dev->width * 2 * dev->height > 720 * 240 * 2)
3687e1e6 MCC	441	min_pkt_size *= 2;
3687e1e6 MCC	442
2c4a07b2 SS	443	for (i = 0; i < dev->num_alt; i++) {
	444	/* stop when the selected alt setting offers enough bandwidth */
	445	if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
	446	dev->alt = i;
3687e1e6	447	break;
2c4a07b2 SS	448	/* otherwise make sure that we end up with the maximum bandwidth
	449	because the min_pkt_size equation might be wrong...
	450	*/
	451	} else if (dev->alt_max_pkt_size[i] >
	452	dev->alt_max_pkt_size[dev->alt])
	453	dev->alt = i;
	454	}
a6c2ba28	455
a6c2ba28	456	if (dev->alt != prev_alt) {
3687e1e6 MCC	457	em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
3687e1e6 MCC	458	min_pkt_size, dev->alt);
a6c2ba28	459	dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
3687e1e6 MCC	460	em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
3687e1e6 MCC	461	dev->alt, dev->max_pkt_size);
a6c2ba28	462	errCode = usb_set_interface(dev->udev, 0, dev->alt);
a6c2ba28	463	if (errCode < 0) {
6ea54d93	464	em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
3687e1e6	465	dev->alt, errCode);
a6c2ba28	466	return errCode;
	467	}
	468	}
	469	return 0;
	470	}
579f72e4 AT	471
	472	/* ------------------------------------------------------------------
	473	URB control
	474	------------------------------------------------------------------*/
	475
	476	/*
	477	* IRQ callback, called by URB callback
	478	*/
	479	static void em28xx_irq_callback(struct urb *urb)
	480	{
	481	struct em28xx_dmaqueue *dma_q = urb->context;
	482	struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
	483	int rc, i;
	484
	485	/* Copy data from URB */
	486	spin_lock(&dev->slock);
	487	rc = dev->isoc_ctl.isoc_copy(dev, urb);
	488	spin_unlock(&dev->slock);
	489
	490	/* Reset urb buffers */
	491	for (i = 0; i < urb->number_of_packets; i++) {
	492	urb->iso_frame_desc[i].status = 0;
	493	urb->iso_frame_desc[i].actual_length = 0;
	494	}
	495	urb->status = 0;
	496
	497	urb->status = usb_submit_urb(urb, GFP_ATOMIC);
	498	if (urb->status) {
	499	em28xx_err("urb resubmit failed (error=%i)\n",
	500	urb->status);
	501	}
	502	}
	503
	504	/*
	505	* Stop and Deallocate URBs
	506	*/
	507	void em28xx_uninit_isoc(struct em28xx *dev)
	508	{
	509	struct urb *urb;
	510	int i;
	511
	512	em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
	513
	514	dev->isoc_ctl.nfields = -1;
	515	for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
	516	urb = dev->isoc_ctl.urb[i];
	517	if (urb) {
	518	usb_kill_urb(urb);
	519	usb_unlink_urb(urb);
	520	if (dev->isoc_ctl.transfer_buffer[i]) {
	521	usb_buffer_free(dev->udev,
6ea54d93 DSL	522	urb->transfer_buffer_length,
	523	dev->isoc_ctl.transfer_buffer[i],
	524	urb->transfer_dma);
579f72e4 AT	525	}
	526	usb_free_urb(urb);
	527	dev->isoc_ctl.urb[i] = NULL;
	528	}
	529	dev->isoc_ctl.transfer_buffer[i] = NULL;
	530	}
	531
	532	kfree(dev->isoc_ctl.urb);
	533	kfree(dev->isoc_ctl.transfer_buffer);
	534
	535	dev->isoc_ctl.urb = NULL;
	536	dev->isoc_ctl.transfer_buffer = NULL;
	537	dev->isoc_ctl.num_bufs = 0;
	538
	539	em28xx_capture_start(dev, 0);
	540	}
	541	EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
	542
	543	/*
	544	* Allocate URBs and start IRQ
	545	*/
	546	int em28xx_init_isoc(struct em28xx *dev, int max_packets,
	547	int num_bufs, int max_pkt_size,
	548	int (isoc_copy) (struct em28xx dev, struct urb *urb),
	549	int cap_type)
	550	{
	551	struct em28xx_dmaqueue *dma_q = &dev->vidq;
	552	int i;
	553	int sb_size, pipe;
	554	struct urb *urb;
	555	int j, k;
	556	int rc;
	557
	558	em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
	559
	560	/* De-allocates all pending stuff */
	561	em28xx_uninit_isoc(dev);
	562
	563	dev->isoc_ctl.isoc_copy = isoc_copy;
	564	dev->isoc_ctl.num_bufs = num_bufs;
	565
	566	dev->isoc_ctl.urb = kzalloc(sizeof(void )num_bufs, GFP_KERNEL);
	567	if (!dev->isoc_ctl.urb) {
	568	em28xx_errdev("cannot alloc memory for usb buffers\n");
	569	return -ENOMEM;
	570	}
	571
	572	dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void )num_bufs,
	573	GFP_KERNEL);
	574	if (!dev->isoc_ctl.urb) {
	575	em28xx_errdev("cannot allocate memory for usbtransfer\n");
	576	kfree(dev->isoc_ctl.urb);
	577	return -ENOMEM;
	578	}
	579
	580	dev->isoc_ctl.max_pkt_size = max_pkt_size;
	581	dev->isoc_ctl.buf = NULL;
	582
	583	sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
	584
	585	/* allocate urbs and transfer buffers */
	586	for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
	587	urb = usb_alloc_urb(max_packets, GFP_KERNEL);
	588	if (!urb) {
589	em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
590	em28xx_uninit_isoc(dev);
591	return -ENOMEM;
592	}
593	dev->isoc_ctl.urb[i] = urb;
594
595	dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
596	sb_size, GFP_KERNEL, &urb->transfer_dma);
597	if (!dev->isoc_ctl.transfer_buffer[i]) {
598	em28xx_err("unable to allocate %i bytes for transfer"
599	" buffer %i%s\n",
600	sb_size, i,
601	in_interrupt()?" while in int":"");
602	em28xx_uninit_isoc(dev);
603	return -ENOMEM;
604	}
605	memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
606
607	/* FIXME: this is a hack - should be
608	'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
609	should also be using 'desc.bInterval'
610	*/
6ea54d93 DSL	611	pipe = usb_rcvisocpipe(dev->udev,
	612	cap_type == EM28XX_ANALOG_CAPTURE ? 0x82 : 0x84);
	613
579f72e4 AT	614	usb_fill_int_urb(urb, dev->udev, pipe,
	615	dev->isoc_ctl.transfer_buffer[i], sb_size,
	616	em28xx_irq_callback, dma_q, 1);
	617
	618	urb->number_of_packets = max_packets;
	619	urb->transfer_flags = URB_ISO_ASAP;
	620
	621	k = 0;
	622	for (j = 0; j < max_packets; j++) {
	623	urb->iso_frame_desc[j].offset = k;
	624	urb->iso_frame_desc[j].length =
	625	dev->isoc_ctl.max_pkt_size;
	626	k += dev->isoc_ctl.max_pkt_size;
	627	}
	628	}
	629
	630	init_waitqueue_head(&dma_q->wq);
	631
	632	em28xx_capture_start(dev, cap_type);
	633
	634	/* submit urbs and enables IRQ */
	635	for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
	636	rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
	637	if (rc) {
	638	em28xx_err("submit of urb %i failed (error=%i)\n", i,
	639	rc);
	640	em28xx_uninit_isoc(dev);
	641	return rc;
	642	}
	643	}
	644
	645	return 0;
	646	}
	647	EXPORT_SYMBOL_GPL(em28xx_init_isoc);