Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * device driver for Conexant 2388x based TV cards | |
4 | * video4linux video interface | |
5 | * | |
6 | * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/kmod.h> | |
28 | #include <linux/kernel.h> | |
29 | #include <linux/slab.h> | |
30 | #include <linux/interrupt.h> | |
31 | #include <linux/delay.h> | |
32 | #include <linux/kthread.h> | |
33 | #include <asm/div64.h> | |
34 | ||
35 | #include "cx88.h" | |
5e453dc7 | 36 | #include <media/v4l2-common.h> |
1da177e4 | 37 | |
cd41e28e | 38 | #ifdef CONFIG_VIDEO_V4L1_COMPAT |
79436633 MCC |
39 | /* Include V4L1 specific functions. Should be removed soon */ |
40 | #include <linux/videodev.h> | |
cd41e28e | 41 | #endif |
79436633 | 42 | |
1da177e4 LT |
43 | MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards"); |
44 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | |
45 | MODULE_LICENSE("GPL"); | |
46 | ||
47 | /* ------------------------------------------------------------------ */ | |
48 | ||
49 | static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
50 | static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
51 | static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
52 | ||
53 | module_param_array(video_nr, int, NULL, 0444); | |
54 | module_param_array(vbi_nr, int, NULL, 0444); | |
55 | module_param_array(radio_nr, int, NULL, 0444); | |
56 | ||
57 | MODULE_PARM_DESC(video_nr,"video device numbers"); | |
58 | MODULE_PARM_DESC(vbi_nr,"vbi device numbers"); | |
59 | MODULE_PARM_DESC(radio_nr,"radio device numbers"); | |
60 | ||
61 | static unsigned int video_debug = 0; | |
62 | module_param(video_debug,int,0644); | |
63 | MODULE_PARM_DESC(video_debug,"enable debug messages [video]"); | |
64 | ||
65 | static unsigned int irq_debug = 0; | |
66 | module_param(irq_debug,int,0644); | |
67 | MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]"); | |
68 | ||
69 | static unsigned int vid_limit = 16; | |
70 | module_param(vid_limit,int,0644); | |
71 | MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes"); | |
72 | ||
73 | #define dprintk(level,fmt, arg...) if (video_debug >= level) \ | |
e52e98a7 | 74 | printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) |
1da177e4 LT |
75 | |
76 | /* ------------------------------------------------------------------ */ | |
77 | ||
78 | static LIST_HEAD(cx8800_devlist); | |
79 | ||
80 | /* ------------------------------------------------------------------- */ | |
81 | /* static data */ | |
82 | ||
83 | static struct cx88_tvnorm tvnorms[] = { | |
84 | { | |
85 | .name = "NTSC-M", | |
86 | .id = V4L2_STD_NTSC_M, | |
87 | .cxiformat = VideoFormatNTSC, | |
88 | .cxoformat = 0x181f0008, | |
89 | },{ | |
90 | .name = "NTSC-JP", | |
91 | .id = V4L2_STD_NTSC_M_JP, | |
92 | .cxiformat = VideoFormatNTSCJapan, | |
93 | .cxoformat = 0x181f0008, | |
1da177e4 LT |
94 | },{ |
95 | .name = "PAL-BG", | |
96 | .id = V4L2_STD_PAL_BG, | |
97 | .cxiformat = VideoFormatPAL, | |
98 | .cxoformat = 0x181f0008, | |
99 | },{ | |
100 | .name = "PAL-DK", | |
101 | .id = V4L2_STD_PAL_DK, | |
102 | .cxiformat = VideoFormatPAL, | |
103 | .cxoformat = 0x181f0008, | |
104 | },{ | |
105 | .name = "PAL-I", | |
106 | .id = V4L2_STD_PAL_I, | |
107 | .cxiformat = VideoFormatPAL, | |
108 | .cxoformat = 0x181f0008, | |
4ac97914 | 109 | },{ |
1da177e4 LT |
110 | .name = "PAL-M", |
111 | .id = V4L2_STD_PAL_M, | |
112 | .cxiformat = VideoFormatPALM, | |
113 | .cxoformat = 0x1c1f0008, | |
114 | },{ | |
115 | .name = "PAL-N", | |
116 | .id = V4L2_STD_PAL_N, | |
117 | .cxiformat = VideoFormatPALN, | |
118 | .cxoformat = 0x1c1f0008, | |
119 | },{ | |
120 | .name = "PAL-Nc", | |
121 | .id = V4L2_STD_PAL_Nc, | |
122 | .cxiformat = VideoFormatPALNC, | |
123 | .cxoformat = 0x1c1f0008, | |
124 | },{ | |
125 | .name = "PAL-60", | |
126 | .id = V4L2_STD_PAL_60, | |
127 | .cxiformat = VideoFormatPAL60, | |
128 | .cxoformat = 0x181f0008, | |
129 | },{ | |
130 | .name = "SECAM-L", | |
131 | .id = V4L2_STD_SECAM_L, | |
132 | .cxiformat = VideoFormatSECAM, | |
133 | .cxoformat = 0x181f0008, | |
134 | },{ | |
135 | .name = "SECAM-DK", | |
136 | .id = V4L2_STD_SECAM_DK, | |
137 | .cxiformat = VideoFormatSECAM, | |
138 | .cxoformat = 0x181f0008, | |
139 | } | |
140 | }; | |
141 | ||
142 | static struct cx8800_fmt formats[] = { | |
143 | { | |
144 | .name = "8 bpp, gray", | |
145 | .fourcc = V4L2_PIX_FMT_GREY, | |
146 | .cxformat = ColorFormatY8, | |
147 | .depth = 8, | |
148 | .flags = FORMAT_FLAGS_PACKED, | |
149 | },{ | |
150 | .name = "15 bpp RGB, le", | |
151 | .fourcc = V4L2_PIX_FMT_RGB555, | |
152 | .cxformat = ColorFormatRGB15, | |
153 | .depth = 16, | |
154 | .flags = FORMAT_FLAGS_PACKED, | |
155 | },{ | |
156 | .name = "15 bpp RGB, be", | |
157 | .fourcc = V4L2_PIX_FMT_RGB555X, | |
158 | .cxformat = ColorFormatRGB15 | ColorFormatBSWAP, | |
159 | .depth = 16, | |
160 | .flags = FORMAT_FLAGS_PACKED, | |
161 | },{ | |
162 | .name = "16 bpp RGB, le", | |
163 | .fourcc = V4L2_PIX_FMT_RGB565, | |
164 | .cxformat = ColorFormatRGB16, | |
165 | .depth = 16, | |
166 | .flags = FORMAT_FLAGS_PACKED, | |
167 | },{ | |
168 | .name = "16 bpp RGB, be", | |
169 | .fourcc = V4L2_PIX_FMT_RGB565X, | |
170 | .cxformat = ColorFormatRGB16 | ColorFormatBSWAP, | |
171 | .depth = 16, | |
172 | .flags = FORMAT_FLAGS_PACKED, | |
173 | },{ | |
174 | .name = "24 bpp RGB, le", | |
175 | .fourcc = V4L2_PIX_FMT_BGR24, | |
176 | .cxformat = ColorFormatRGB24, | |
177 | .depth = 24, | |
178 | .flags = FORMAT_FLAGS_PACKED, | |
179 | },{ | |
180 | .name = "32 bpp RGB, le", | |
181 | .fourcc = V4L2_PIX_FMT_BGR32, | |
182 | .cxformat = ColorFormatRGB32, | |
183 | .depth = 32, | |
184 | .flags = FORMAT_FLAGS_PACKED, | |
185 | },{ | |
186 | .name = "32 bpp RGB, be", | |
187 | .fourcc = V4L2_PIX_FMT_RGB32, | |
188 | .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP, | |
189 | .depth = 32, | |
190 | .flags = FORMAT_FLAGS_PACKED, | |
191 | },{ | |
192 | .name = "4:2:2, packed, YUYV", | |
193 | .fourcc = V4L2_PIX_FMT_YUYV, | |
194 | .cxformat = ColorFormatYUY2, | |
195 | .depth = 16, | |
196 | .flags = FORMAT_FLAGS_PACKED, | |
197 | },{ | |
198 | .name = "4:2:2, packed, UYVY", | |
199 | .fourcc = V4L2_PIX_FMT_UYVY, | |
200 | .cxformat = ColorFormatYUY2 | ColorFormatBSWAP, | |
201 | .depth = 16, | |
202 | .flags = FORMAT_FLAGS_PACKED, | |
203 | }, | |
204 | }; | |
205 | ||
206 | static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc) | |
207 | { | |
208 | unsigned int i; | |
209 | ||
210 | for (i = 0; i < ARRAY_SIZE(formats); i++) | |
211 | if (formats[i].fourcc == fourcc) | |
212 | return formats+i; | |
213 | return NULL; | |
214 | } | |
215 | ||
216 | /* ------------------------------------------------------------------- */ | |
217 | ||
218 | static const struct v4l2_queryctrl no_ctl = { | |
219 | .name = "42", | |
220 | .flags = V4L2_CTRL_FLAG_DISABLED, | |
221 | }; | |
222 | ||
223 | static struct cx88_ctrl cx8800_ctls[] = { | |
224 | /* --- video --- */ | |
225 | { | |
226 | .v = { | |
227 | .id = V4L2_CID_BRIGHTNESS, | |
228 | .name = "Brightness", | |
229 | .minimum = 0x00, | |
230 | .maximum = 0xff, | |
231 | .step = 1, | |
9f9c907f | 232 | .default_value = 0x7f, |
1da177e4 LT |
233 | .type = V4L2_CTRL_TYPE_INTEGER, |
234 | }, | |
235 | .off = 128, | |
236 | .reg = MO_CONTR_BRIGHT, | |
237 | .mask = 0x00ff, | |
238 | .shift = 0, | |
239 | },{ | |
240 | .v = { | |
241 | .id = V4L2_CID_CONTRAST, | |
242 | .name = "Contrast", | |
243 | .minimum = 0, | |
244 | .maximum = 0xff, | |
245 | .step = 1, | |
70f00044 | 246 | .default_value = 0x3f, |
1da177e4 LT |
247 | .type = V4L2_CTRL_TYPE_INTEGER, |
248 | }, | |
41ef7c1e | 249 | .off = 0, |
1da177e4 LT |
250 | .reg = MO_CONTR_BRIGHT, |
251 | .mask = 0xff00, | |
252 | .shift = 8, | |
253 | },{ | |
254 | .v = { | |
255 | .id = V4L2_CID_HUE, | |
256 | .name = "Hue", | |
257 | .minimum = 0, | |
258 | .maximum = 0xff, | |
259 | .step = 1, | |
9f9c907f | 260 | .default_value = 0x7f, |
1da177e4 LT |
261 | .type = V4L2_CTRL_TYPE_INTEGER, |
262 | }, | |
9ac4c158 | 263 | .off = 128, |
1da177e4 LT |
264 | .reg = MO_HUE, |
265 | .mask = 0x00ff, | |
266 | .shift = 0, | |
267 | },{ | |
268 | /* strictly, this only describes only U saturation. | |
269 | * V saturation is handled specially through code. | |
270 | */ | |
271 | .v = { | |
272 | .id = V4L2_CID_SATURATION, | |
273 | .name = "Saturation", | |
274 | .minimum = 0, | |
275 | .maximum = 0xff, | |
276 | .step = 1, | |
70f00044 | 277 | .default_value = 0x7f, |
1da177e4 LT |
278 | .type = V4L2_CTRL_TYPE_INTEGER, |
279 | }, | |
280 | .off = 0, | |
281 | .reg = MO_UV_SATURATION, | |
282 | .mask = 0x00ff, | |
283 | .shift = 0, | |
284 | },{ | |
285 | /* --- audio --- */ | |
286 | .v = { | |
287 | .id = V4L2_CID_AUDIO_MUTE, | |
288 | .name = "Mute", | |
289 | .minimum = 0, | |
290 | .maximum = 1, | |
70f00044 | 291 | .default_value = 1, |
1da177e4 LT |
292 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
293 | }, | |
294 | .reg = AUD_VOL_CTL, | |
295 | .sreg = SHADOW_AUD_VOL_CTL, | |
296 | .mask = (1 << 6), | |
297 | .shift = 6, | |
298 | },{ | |
299 | .v = { | |
300 | .id = V4L2_CID_AUDIO_VOLUME, | |
301 | .name = "Volume", | |
302 | .minimum = 0, | |
303 | .maximum = 0x3f, | |
304 | .step = 1, | |
9f9c907f | 305 | .default_value = 0x3f, |
1da177e4 LT |
306 | .type = V4L2_CTRL_TYPE_INTEGER, |
307 | }, | |
308 | .reg = AUD_VOL_CTL, | |
309 | .sreg = SHADOW_AUD_VOL_CTL, | |
310 | .mask = 0x3f, | |
311 | .shift = 0, | |
312 | },{ | |
313 | .v = { | |
314 | .id = V4L2_CID_AUDIO_BALANCE, | |
315 | .name = "Balance", | |
316 | .minimum = 0, | |
317 | .maximum = 0x7f, | |
318 | .step = 1, | |
319 | .default_value = 0x40, | |
320 | .type = V4L2_CTRL_TYPE_INTEGER, | |
321 | }, | |
322 | .reg = AUD_BAL_CTL, | |
323 | .sreg = SHADOW_AUD_BAL_CTL, | |
324 | .mask = 0x7f, | |
325 | .shift = 0, | |
326 | } | |
327 | }; | |
408b664a | 328 | static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls); |
1da177e4 | 329 | |
38a2713a MK |
330 | const u32 cx88_user_ctrls[] = { |
331 | V4L2_CID_USER_CLASS, | |
332 | V4L2_CID_BRIGHTNESS, | |
333 | V4L2_CID_CONTRAST, | |
334 | V4L2_CID_SATURATION, | |
335 | V4L2_CID_HUE, | |
336 | V4L2_CID_AUDIO_VOLUME, | |
337 | V4L2_CID_AUDIO_BALANCE, | |
338 | V4L2_CID_AUDIO_MUTE, | |
339 | 0 | |
340 | }; | |
341 | EXPORT_SYMBOL(cx88_user_ctrls); | |
342 | ||
343 | static const u32 *ctrl_classes[] = { | |
344 | cx88_user_ctrls, | |
345 | NULL | |
346 | }; | |
347 | ||
348 | int cx8800_ctrl_query(struct v4l2_queryctrl *qctrl) | |
349 | { | |
350 | int i; | |
351 | ||
352 | if (qctrl->id < V4L2_CID_BASE || | |
353 | qctrl->id >= V4L2_CID_LASTP1) | |
354 | return -EINVAL; | |
355 | for (i = 0; i < CX8800_CTLS; i++) | |
356 | if (cx8800_ctls[i].v.id == qctrl->id) | |
357 | break; | |
358 | if (i == CX8800_CTLS) { | |
359 | *qctrl = no_ctl; | |
360 | return 0; | |
361 | } | |
362 | *qctrl = cx8800_ctls[i].v; | |
363 | return 0; | |
364 | } | |
365 | EXPORT_SYMBOL(cx8800_ctrl_query); | |
366 | ||
367 | static int cx88_queryctrl(struct v4l2_queryctrl *qctrl) | |
368 | { | |
369 | qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id); | |
370 | if (qctrl->id == 0) | |
371 | return -EINVAL; | |
372 | return cx8800_ctrl_query(qctrl); | |
373 | } | |
374 | ||
1da177e4 LT |
375 | /* ------------------------------------------------------------------- */ |
376 | /* resource management */ | |
377 | ||
378 | static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit) | |
379 | { | |
e52e98a7 | 380 | struct cx88_core *core = dev->core; |
1da177e4 LT |
381 | if (fh->resources & bit) |
382 | /* have it already allocated */ | |
383 | return 1; | |
384 | ||
385 | /* is it free? */ | |
3593cab5 | 386 | mutex_lock(&core->lock); |
1da177e4 LT |
387 | if (dev->resources & bit) { |
388 | /* no, someone else uses it */ | |
3593cab5 | 389 | mutex_unlock(&core->lock); |
1da177e4 LT |
390 | return 0; |
391 | } | |
392 | /* it's free, grab it */ | |
393 | fh->resources |= bit; | |
394 | dev->resources |= bit; | |
395 | dprintk(1,"res: get %d\n",bit); | |
3593cab5 | 396 | mutex_unlock(&core->lock); |
1da177e4 LT |
397 | return 1; |
398 | } | |
399 | ||
400 | static | |
401 | int res_check(struct cx8800_fh *fh, unsigned int bit) | |
402 | { | |
403 | return (fh->resources & bit); | |
404 | } | |
405 | ||
406 | static | |
407 | int res_locked(struct cx8800_dev *dev, unsigned int bit) | |
408 | { | |
409 | return (dev->resources & bit); | |
410 | } | |
411 | ||
412 | static | |
413 | void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits) | |
414 | { | |
e52e98a7 | 415 | struct cx88_core *core = dev->core; |
ae24601b | 416 | BUG_ON((fh->resources & bits) != bits); |
1da177e4 | 417 | |
3593cab5 | 418 | mutex_lock(&core->lock); |
1da177e4 LT |
419 | fh->resources &= ~bits; |
420 | dev->resources &= ~bits; | |
421 | dprintk(1,"res: put %d\n",bits); | |
3593cab5 | 422 | mutex_unlock(&core->lock); |
1da177e4 LT |
423 | } |
424 | ||
425 | /* ------------------------------------------------------------------ */ | |
426 | ||
e52e98a7 MCC |
427 | /* static int video_mux(struct cx8800_dev *dev, unsigned int input) */ |
428 | static int video_mux(struct cx88_core *core, unsigned int input) | |
1da177e4 | 429 | { |
e52e98a7 | 430 | /* struct cx88_core *core = dev->core; */ |
1da177e4 LT |
431 | |
432 | dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n", | |
433 | input, INPUT(input)->vmux, | |
434 | INPUT(input)->gpio0,INPUT(input)->gpio1, | |
435 | INPUT(input)->gpio2,INPUT(input)->gpio3); | |
e52e98a7 | 436 | core->input = input; |
1da177e4 LT |
437 | cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input)->vmux << 14); |
438 | cx_write(MO_GP3_IO, INPUT(input)->gpio3); | |
439 | cx_write(MO_GP0_IO, INPUT(input)->gpio0); | |
440 | cx_write(MO_GP1_IO, INPUT(input)->gpio1); | |
441 | cx_write(MO_GP2_IO, INPUT(input)->gpio2); | |
442 | ||
443 | switch (INPUT(input)->type) { | |
444 | case CX88_VMUX_SVIDEO: | |
445 | cx_set(MO_AFECFG_IO, 0x00000001); | |
446 | cx_set(MO_INPUT_FORMAT, 0x00010010); | |
447 | cx_set(MO_FILTER_EVEN, 0x00002020); | |
448 | cx_set(MO_FILTER_ODD, 0x00002020); | |
449 | break; | |
450 | default: | |
451 | cx_clear(MO_AFECFG_IO, 0x00000001); | |
452 | cx_clear(MO_INPUT_FORMAT, 0x00010010); | |
453 | cx_clear(MO_FILTER_EVEN, 0x00002020); | |
454 | cx_clear(MO_FILTER_ODD, 0x00002020); | |
455 | break; | |
456 | } | |
457 | return 0; | |
458 | } | |
459 | ||
460 | /* ------------------------------------------------------------------ */ | |
461 | ||
462 | static int start_video_dma(struct cx8800_dev *dev, | |
463 | struct cx88_dmaqueue *q, | |
464 | struct cx88_buffer *buf) | |
465 | { | |
466 | struct cx88_core *core = dev->core; | |
467 | ||
468 | /* setup fifo + format */ | |
e52e98a7 | 469 | cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21], |
1da177e4 | 470 | buf->bpl, buf->risc.dma); |
e52e98a7 | 471 | cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field); |
1da177e4 LT |
472 | cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma); |
473 | ||
474 | /* reset counter */ | |
475 | cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET); | |
476 | q->count = 1; | |
477 | ||
478 | /* enable irqs */ | |
479 | cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01); | |
e52e98a7 MCC |
480 | |
481 | /* Enables corresponding bits at PCI_INT_STAT: | |
482 | bits 0 to 4: video, audio, transport stream, VIP, Host | |
483 | bit 7: timer | |
484 | bits 8 and 9: DMA complete for: SRC, DST | |
485 | bits 10 and 11: BERR signal asserted for RISC: RD, WR | |
486 | bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB | |
487 | */ | |
1da177e4 LT |
488 | cx_set(MO_VID_INTMSK, 0x0f0011); |
489 | ||
490 | /* enable capture */ | |
491 | cx_set(VID_CAPTURE_CONTROL,0x06); | |
492 | ||
493 | /* start dma */ | |
494 | cx_set(MO_DEV_CNTRL2, (1<<5)); | |
e52e98a7 | 495 | cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */ |
1da177e4 LT |
496 | |
497 | return 0; | |
498 | } | |
499 | ||
17bc98a4 | 500 | #ifdef CONFIG_PM |
1da177e4 LT |
501 | static int stop_video_dma(struct cx8800_dev *dev) |
502 | { | |
503 | struct cx88_core *core = dev->core; | |
504 | ||
505 | /* stop dma */ | |
506 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
507 | ||
508 | /* disable capture */ | |
509 | cx_clear(VID_CAPTURE_CONTROL,0x06); | |
510 | ||
511 | /* disable irqs */ | |
512 | cx_clear(MO_PCI_INTMSK, 0x000001); | |
513 | cx_clear(MO_VID_INTMSK, 0x0f0011); | |
514 | return 0; | |
515 | } | |
17bc98a4 | 516 | #endif |
1da177e4 LT |
517 | |
518 | static int restart_video_queue(struct cx8800_dev *dev, | |
519 | struct cx88_dmaqueue *q) | |
520 | { | |
e52e98a7 | 521 | struct cx88_core *core = dev->core; |
1da177e4 LT |
522 | struct cx88_buffer *buf, *prev; |
523 | struct list_head *item; | |
524 | ||
525 | if (!list_empty(&q->active)) { | |
4ac97914 | 526 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); |
1da177e4 LT |
527 | dprintk(2,"restart_queue [%p/%d]: restart dma\n", |
528 | buf, buf->vb.i); | |
529 | start_video_dma(dev, q, buf); | |
530 | list_for_each(item,&q->active) { | |
531 | buf = list_entry(item, struct cx88_buffer, vb.queue); | |
532 | buf->count = q->count++; | |
533 | } | |
534 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
535 | return 0; | |
536 | } | |
537 | ||
538 | prev = NULL; | |
539 | for (;;) { | |
540 | if (list_empty(&q->queued)) | |
541 | return 0; | |
4ac97914 | 542 | buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue); |
1da177e4 | 543 | if (NULL == prev) { |
179e0917 | 544 | list_move_tail(&buf->vb.queue, &q->active); |
1da177e4 LT |
545 | start_video_dma(dev, q, buf); |
546 | buf->vb.state = STATE_ACTIVE; | |
547 | buf->count = q->count++; | |
548 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
549 | dprintk(2,"[%p/%d] restart_queue - first active\n", | |
550 | buf,buf->vb.i); | |
551 | ||
552 | } else if (prev->vb.width == buf->vb.width && | |
553 | prev->vb.height == buf->vb.height && | |
554 | prev->fmt == buf->fmt) { | |
179e0917 | 555 | list_move_tail(&buf->vb.queue, &q->active); |
1da177e4 LT |
556 | buf->vb.state = STATE_ACTIVE; |
557 | buf->count = q->count++; | |
558 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); | |
559 | dprintk(2,"[%p/%d] restart_queue - move to active\n", | |
560 | buf,buf->vb.i); | |
561 | } else { | |
562 | return 0; | |
563 | } | |
564 | prev = buf; | |
565 | } | |
566 | } | |
567 | ||
568 | /* ------------------------------------------------------------------ */ | |
569 | ||
570 | static int | |
571 | buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size) | |
572 | { | |
573 | struct cx8800_fh *fh = q->priv_data; | |
574 | ||
575 | *size = fh->fmt->depth*fh->width*fh->height >> 3; | |
576 | if (0 == *count) | |
577 | *count = 32; | |
578 | while (*size * *count > vid_limit * 1024 * 1024) | |
579 | (*count)--; | |
580 | return 0; | |
581 | } | |
582 | ||
583 | static int | |
584 | buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb, | |
585 | enum v4l2_field field) | |
586 | { | |
587 | struct cx8800_fh *fh = q->priv_data; | |
588 | struct cx8800_dev *dev = fh->dev; | |
e52e98a7 | 589 | struct cx88_core *core = dev->core; |
1da177e4 LT |
590 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); |
591 | int rc, init_buffer = 0; | |
592 | ||
593 | BUG_ON(NULL == fh->fmt); | |
e52e98a7 MCC |
594 | if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) || |
595 | fh->height < 32 || fh->height > norm_maxh(core->tvnorm)) | |
1da177e4 LT |
596 | return -EINVAL; |
597 | buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3; | |
598 | if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size) | |
599 | return -EINVAL; | |
600 | ||
601 | if (buf->fmt != fh->fmt || | |
602 | buf->vb.width != fh->width || | |
603 | buf->vb.height != fh->height || | |
604 | buf->vb.field != field) { | |
605 | buf->fmt = fh->fmt; | |
606 | buf->vb.width = fh->width; | |
607 | buf->vb.height = fh->height; | |
608 | buf->vb.field = field; | |
609 | init_buffer = 1; | |
610 | } | |
611 | ||
612 | if (STATE_NEEDS_INIT == buf->vb.state) { | |
613 | init_buffer = 1; | |
c7b0ac05 | 614 | if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL))) |
1da177e4 LT |
615 | goto fail; |
616 | } | |
617 | ||
618 | if (init_buffer) { | |
619 | buf->bpl = buf->vb.width * buf->fmt->depth >> 3; | |
620 | switch (buf->vb.field) { | |
621 | case V4L2_FIELD_TOP: | |
622 | cx88_risc_buffer(dev->pci, &buf->risc, | |
623 | buf->vb.dma.sglist, 0, UNSET, | |
624 | buf->bpl, 0, buf->vb.height); | |
625 | break; | |
626 | case V4L2_FIELD_BOTTOM: | |
627 | cx88_risc_buffer(dev->pci, &buf->risc, | |
628 | buf->vb.dma.sglist, UNSET, 0, | |
629 | buf->bpl, 0, buf->vb.height); | |
630 | break; | |
631 | case V4L2_FIELD_INTERLACED: | |
632 | cx88_risc_buffer(dev->pci, &buf->risc, | |
633 | buf->vb.dma.sglist, 0, buf->bpl, | |
634 | buf->bpl, buf->bpl, | |
635 | buf->vb.height >> 1); | |
636 | break; | |
637 | case V4L2_FIELD_SEQ_TB: | |
638 | cx88_risc_buffer(dev->pci, &buf->risc, | |
639 | buf->vb.dma.sglist, | |
640 | 0, buf->bpl * (buf->vb.height >> 1), | |
641 | buf->bpl, 0, | |
642 | buf->vb.height >> 1); | |
643 | break; | |
644 | case V4L2_FIELD_SEQ_BT: | |
645 | cx88_risc_buffer(dev->pci, &buf->risc, | |
646 | buf->vb.dma.sglist, | |
647 | buf->bpl * (buf->vb.height >> 1), 0, | |
648 | buf->bpl, 0, | |
649 | buf->vb.height >> 1); | |
650 | break; | |
651 | default: | |
652 | BUG(); | |
653 | } | |
654 | } | |
655 | dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n", | |
656 | buf, buf->vb.i, | |
657 | fh->width, fh->height, fh->fmt->depth, fh->fmt->name, | |
658 | (unsigned long)buf->risc.dma); | |
659 | ||
660 | buf->vb.state = STATE_PREPARED; | |
661 | return 0; | |
662 | ||
663 | fail: | |
c7b0ac05 | 664 | cx88_free_buffer(q,buf); |
1da177e4 LT |
665 | return rc; |
666 | } | |
667 | ||
668 | static void | |
669 | buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) | |
670 | { | |
671 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); | |
672 | struct cx88_buffer *prev; | |
673 | struct cx8800_fh *fh = vq->priv_data; | |
674 | struct cx8800_dev *dev = fh->dev; | |
e52e98a7 | 675 | struct cx88_core *core = dev->core; |
1da177e4 LT |
676 | struct cx88_dmaqueue *q = &dev->vidq; |
677 | ||
678 | /* add jump to stopper */ | |
679 | buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); | |
680 | buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma); | |
681 | ||
682 | if (!list_empty(&q->queued)) { | |
683 | list_add_tail(&buf->vb.queue,&q->queued); | |
684 | buf->vb.state = STATE_QUEUED; | |
685 | dprintk(2,"[%p/%d] buffer_queue - append to queued\n", | |
686 | buf, buf->vb.i); | |
687 | ||
688 | } else if (list_empty(&q->active)) { | |
689 | list_add_tail(&buf->vb.queue,&q->active); | |
690 | start_video_dma(dev, q, buf); | |
691 | buf->vb.state = STATE_ACTIVE; | |
692 | buf->count = q->count++; | |
693 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
694 | dprintk(2,"[%p/%d] buffer_queue - first active\n", | |
695 | buf, buf->vb.i); | |
696 | ||
697 | } else { | |
698 | prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue); | |
699 | if (prev->vb.width == buf->vb.width && | |
700 | prev->vb.height == buf->vb.height && | |
701 | prev->fmt == buf->fmt) { | |
702 | list_add_tail(&buf->vb.queue,&q->active); | |
703 | buf->vb.state = STATE_ACTIVE; | |
704 | buf->count = q->count++; | |
705 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); | |
706 | dprintk(2,"[%p/%d] buffer_queue - append to active\n", | |
707 | buf, buf->vb.i); | |
708 | ||
709 | } else { | |
710 | list_add_tail(&buf->vb.queue,&q->queued); | |
711 | buf->vb.state = STATE_QUEUED; | |
712 | dprintk(2,"[%p/%d] buffer_queue - first queued\n", | |
713 | buf, buf->vb.i); | |
714 | } | |
715 | } | |
716 | } | |
717 | ||
718 | static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
719 | { | |
720 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); | |
1da177e4 | 721 | |
c7b0ac05 | 722 | cx88_free_buffer(q,buf); |
1da177e4 LT |
723 | } |
724 | ||
408b664a | 725 | static struct videobuf_queue_ops cx8800_video_qops = { |
1da177e4 LT |
726 | .buf_setup = buffer_setup, |
727 | .buf_prepare = buffer_prepare, | |
728 | .buf_queue = buffer_queue, | |
729 | .buf_release = buffer_release, | |
730 | }; | |
731 | ||
732 | /* ------------------------------------------------------------------ */ | |
733 | ||
1da177e4 LT |
734 | |
735 | /* ------------------------------------------------------------------ */ | |
736 | ||
737 | static struct videobuf_queue* get_queue(struct cx8800_fh *fh) | |
738 | { | |
739 | switch (fh->type) { | |
740 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
741 | return &fh->vidq; | |
742 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
743 | return &fh->vbiq; | |
744 | default: | |
745 | BUG(); | |
746 | return NULL; | |
747 | } | |
748 | } | |
749 | ||
750 | static int get_ressource(struct cx8800_fh *fh) | |
751 | { | |
752 | switch (fh->type) { | |
753 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
754 | return RESOURCE_VIDEO; | |
755 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
756 | return RESOURCE_VBI; | |
757 | default: | |
758 | BUG(); | |
759 | return 0; | |
760 | } | |
761 | } | |
762 | ||
763 | static int video_open(struct inode *inode, struct file *file) | |
764 | { | |
765 | int minor = iminor(inode); | |
766 | struct cx8800_dev *h,*dev = NULL; | |
e52e98a7 | 767 | struct cx88_core *core; |
1da177e4 LT |
768 | struct cx8800_fh *fh; |
769 | struct list_head *list; | |
770 | enum v4l2_buf_type type = 0; | |
771 | int radio = 0; | |
772 | ||
773 | list_for_each(list,&cx8800_devlist) { | |
774 | h = list_entry(list, struct cx8800_dev, devlist); | |
775 | if (h->video_dev->minor == minor) { | |
776 | dev = h; | |
777 | type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
778 | } | |
779 | if (h->vbi_dev->minor == minor) { | |
780 | dev = h; | |
781 | type = V4L2_BUF_TYPE_VBI_CAPTURE; | |
782 | } | |
783 | if (h->radio_dev && | |
784 | h->radio_dev->minor == minor) { | |
785 | radio = 1; | |
786 | dev = h; | |
787 | } | |
788 | } | |
789 | if (NULL == dev) | |
790 | return -ENODEV; | |
791 | ||
e52e98a7 MCC |
792 | core = dev->core; |
793 | ||
1da177e4 LT |
794 | dprintk(1,"open minor=%d radio=%d type=%s\n", |
795 | minor,radio,v4l2_type_names[type]); | |
796 | ||
797 | /* allocate + initialize per filehandle data */ | |
7408187d | 798 | fh = kzalloc(sizeof(*fh),GFP_KERNEL); |
1da177e4 LT |
799 | if (NULL == fh) |
800 | return -ENOMEM; | |
1da177e4 LT |
801 | file->private_data = fh; |
802 | fh->dev = dev; | |
803 | fh->radio = radio; | |
804 | fh->type = type; | |
805 | fh->width = 320; | |
806 | fh->height = 240; | |
807 | fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24); | |
808 | ||
809 | videobuf_queue_init(&fh->vidq, &cx8800_video_qops, | |
810 | dev->pci, &dev->slock, | |
811 | V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
812 | V4L2_FIELD_INTERLACED, | |
813 | sizeof(struct cx88_buffer), | |
814 | fh); | |
815 | videobuf_queue_init(&fh->vbiq, &cx8800_vbi_qops, | |
816 | dev->pci, &dev->slock, | |
817 | V4L2_BUF_TYPE_VBI_CAPTURE, | |
818 | V4L2_FIELD_SEQ_TB, | |
819 | sizeof(struct cx88_buffer), | |
820 | fh); | |
821 | ||
822 | if (fh->radio) { | |
1da177e4 LT |
823 | int board = core->board; |
824 | dprintk(1,"video_open: setting radio device\n"); | |
fd3113e8 | 825 | cx_write(MO_GP3_IO, cx88_boards[board].radio.gpio3); |
1da177e4 LT |
826 | cx_write(MO_GP0_IO, cx88_boards[board].radio.gpio0); |
827 | cx_write(MO_GP1_IO, cx88_boards[board].radio.gpio1); | |
828 | cx_write(MO_GP2_IO, cx88_boards[board].radio.gpio2); | |
e52e98a7 | 829 | core->tvaudio = WW_FM; |
1da177e4 LT |
830 | cx88_set_tvaudio(core); |
831 | cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1); | |
e52e98a7 | 832 | cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL); |
1da177e4 LT |
833 | } |
834 | ||
4ac97914 | 835 | return 0; |
1da177e4 LT |
836 | } |
837 | ||
838 | static ssize_t | |
f9e7a020 | 839 | video_read(struct file *file, char __user *data, size_t count, loff_t *ppos) |
1da177e4 LT |
840 | { |
841 | struct cx8800_fh *fh = file->private_data; | |
842 | ||
843 | switch (fh->type) { | |
844 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
845 | if (res_locked(fh->dev,RESOURCE_VIDEO)) | |
846 | return -EBUSY; | |
847 | return videobuf_read_one(&fh->vidq, data, count, ppos, | |
848 | file->f_flags & O_NONBLOCK); | |
849 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
850 | if (!res_get(fh->dev,fh,RESOURCE_VBI)) | |
851 | return -EBUSY; | |
852 | return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1, | |
853 | file->f_flags & O_NONBLOCK); | |
854 | default: | |
855 | BUG(); | |
856 | return 0; | |
857 | } | |
858 | } | |
859 | ||
860 | static unsigned int | |
861 | video_poll(struct file *file, struct poll_table_struct *wait) | |
862 | { | |
863 | struct cx8800_fh *fh = file->private_data; | |
864 | struct cx88_buffer *buf; | |
865 | ||
866 | if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) { | |
867 | if (!res_get(fh->dev,fh,RESOURCE_VBI)) | |
868 | return POLLERR; | |
869 | return videobuf_poll_stream(file, &fh->vbiq, wait); | |
870 | } | |
871 | ||
872 | if (res_check(fh,RESOURCE_VIDEO)) { | |
873 | /* streaming capture */ | |
874 | if (list_empty(&fh->vidq.stream)) | |
875 | return POLLERR; | |
876 | buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream); | |
877 | } else { | |
878 | /* read() capture */ | |
879 | buf = (struct cx88_buffer*)fh->vidq.read_buf; | |
880 | if (NULL == buf) | |
881 | return POLLERR; | |
882 | } | |
883 | poll_wait(file, &buf->vb.done, wait); | |
884 | if (buf->vb.state == STATE_DONE || | |
885 | buf->vb.state == STATE_ERROR) | |
886 | return POLLIN|POLLRDNORM; | |
887 | return 0; | |
888 | } | |
889 | ||
890 | static int video_release(struct inode *inode, struct file *file) | |
891 | { | |
892 | struct cx8800_fh *fh = file->private_data; | |
893 | struct cx8800_dev *dev = fh->dev; | |
894 | ||
895 | /* turn off overlay */ | |
896 | if (res_check(fh, RESOURCE_OVERLAY)) { | |
897 | /* FIXME */ | |
898 | res_free(dev,fh,RESOURCE_OVERLAY); | |
899 | } | |
900 | ||
901 | /* stop video capture */ | |
902 | if (res_check(fh, RESOURCE_VIDEO)) { | |
903 | videobuf_queue_cancel(&fh->vidq); | |
904 | res_free(dev,fh,RESOURCE_VIDEO); | |
905 | } | |
906 | if (fh->vidq.read_buf) { | |
907 | buffer_release(&fh->vidq,fh->vidq.read_buf); | |
908 | kfree(fh->vidq.read_buf); | |
909 | } | |
910 | ||
911 | /* stop vbi capture */ | |
912 | if (res_check(fh, RESOURCE_VBI)) { | |
913 | if (fh->vbiq.streaming) | |
914 | videobuf_streamoff(&fh->vbiq); | |
915 | if (fh->vbiq.reading) | |
916 | videobuf_read_stop(&fh->vbiq); | |
917 | res_free(dev,fh,RESOURCE_VBI); | |
918 | } | |
919 | ||
920 | videobuf_mmap_free(&fh->vidq); | |
921 | videobuf_mmap_free(&fh->vbiq); | |
922 | file->private_data = NULL; | |
923 | kfree(fh); | |
e52e98a7 MCC |
924 | |
925 | cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL); | |
926 | ||
1da177e4 LT |
927 | return 0; |
928 | } | |
929 | ||
930 | static int | |
931 | video_mmap(struct file *file, struct vm_area_struct * vma) | |
932 | { | |
933 | struct cx8800_fh *fh = file->private_data; | |
934 | ||
935 | return videobuf_mmap_mapper(get_queue(fh), vma); | |
936 | } | |
937 | ||
938 | /* ------------------------------------------------------------------ */ | |
939 | ||
e52e98a7 MCC |
940 | /* static int get_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */ |
941 | static int get_control(struct cx88_core *core, struct v4l2_control *ctl) | |
1da177e4 | 942 | { |
e52e98a7 | 943 | /* struct cx88_core *core = dev->core; */ |
1da177e4 LT |
944 | struct cx88_ctrl *c = NULL; |
945 | u32 value; | |
946 | int i; | |
947 | ||
948 | for (i = 0; i < CX8800_CTLS; i++) | |
949 | if (cx8800_ctls[i].v.id == ctl->id) | |
950 | c = &cx8800_ctls[i]; | |
951 | if (NULL == c) | |
952 | return -EINVAL; | |
953 | ||
954 | value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg); | |
955 | switch (ctl->id) { | |
956 | case V4L2_CID_AUDIO_BALANCE: | |
9f9c907f MR |
957 | ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40) |
958 | : (0x7f - (value & 0x7f)); | |
1da177e4 LT |
959 | break; |
960 | case V4L2_CID_AUDIO_VOLUME: | |
961 | ctl->value = 0x3f - (value & 0x3f); | |
962 | break; | |
963 | default: | |
964 | ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift; | |
965 | break; | |
966 | } | |
6457af5f IP |
967 | dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", |
968 | ctl->id, c->v.name, ctl->value, c->reg, | |
969 | value,c->mask, c->sreg ? " [shadowed]" : ""); | |
1da177e4 LT |
970 | return 0; |
971 | } | |
972 | ||
e52e98a7 MCC |
973 | /* static int set_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */ |
974 | static int set_control(struct cx88_core *core, struct v4l2_control *ctl) | |
1da177e4 | 975 | { |
e52e98a7 | 976 | /* struct cx88_core *core = dev->core; */ |
1da177e4 | 977 | struct cx88_ctrl *c = NULL; |
70f00044 | 978 | u32 value,mask; |
1da177e4 | 979 | int i; |
70f00044 MCC |
980 | for (i = 0; i < CX8800_CTLS; i++) { |
981 | if (cx8800_ctls[i].v.id == ctl->id) { | |
1da177e4 | 982 | c = &cx8800_ctls[i]; |
70f00044 MCC |
983 | } |
984 | } | |
1da177e4 LT |
985 | if (NULL == c) |
986 | return -EINVAL; | |
987 | ||
988 | if (ctl->value < c->v.minimum) | |
e52e98a7 | 989 | ctl->value = c->v.minimum; |
1da177e4 | 990 | if (ctl->value > c->v.maximum) |
e52e98a7 | 991 | ctl->value = c->v.maximum; |
70f00044 | 992 | mask=c->mask; |
1da177e4 LT |
993 | switch (ctl->id) { |
994 | case V4L2_CID_AUDIO_BALANCE: | |
9f9c907f | 995 | value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40); |
1da177e4 LT |
996 | break; |
997 | case V4L2_CID_AUDIO_VOLUME: | |
998 | value = 0x3f - (ctl->value & 0x3f); | |
999 | break; | |
1000 | case V4L2_CID_SATURATION: | |
1001 | /* special v_sat handling */ | |
70f00044 MCC |
1002 | |
1003 | value = ((ctl->value - c->off) << c->shift) & c->mask; | |
1004 | ||
1005 | if (core->tvnorm->id & V4L2_STD_SECAM) { | |
1006 | /* For SECAM, both U and V sat should be equal */ | |
1007 | value=value<<8|value; | |
1008 | } else { | |
1009 | /* Keeps U Saturation proportional to V Sat */ | |
1010 | value=(value*0x5a)/0x7f<<8|value; | |
1011 | } | |
1012 | mask=0xffff; | |
1013 | break; | |
1da177e4 LT |
1014 | default: |
1015 | value = ((ctl->value - c->off) << c->shift) & c->mask; | |
1016 | break; | |
1017 | } | |
6457af5f IP |
1018 | dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", |
1019 | ctl->id, c->v.name, ctl->value, c->reg, value, | |
1020 | mask, c->sreg ? " [shadowed]" : ""); | |
1da177e4 | 1021 | if (c->sreg) { |
70f00044 | 1022 | cx_sandor(c->sreg, c->reg, mask, value); |
1da177e4 | 1023 | } else { |
70f00044 | 1024 | cx_andor(c->reg, mask, value); |
1da177e4 LT |
1025 | } |
1026 | return 0; | |
1027 | } | |
1028 | ||
e52e98a7 | 1029 | static void init_controls(struct cx88_core *core) |
1da177e4 | 1030 | { |
70f00044 MCC |
1031 | struct v4l2_control ctrl; |
1032 | int i; | |
1da177e4 | 1033 | |
70f00044 MCC |
1034 | for (i = 0; i < CX8800_CTLS; i++) { |
1035 | ctrl.id=cx8800_ctls[i].v.id; | |
9f9c907f | 1036 | ctrl.value=cx8800_ctls[i].v.default_value; |
70f00044 MCC |
1037 | set_control(core, &ctrl); |
1038 | } | |
1da177e4 LT |
1039 | } |
1040 | ||
1041 | /* ------------------------------------------------------------------ */ | |
1042 | ||
1043 | static int cx8800_g_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh, | |
1044 | struct v4l2_format *f) | |
1045 | { | |
1046 | switch (f->type) { | |
1047 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
1048 | memset(&f->fmt.pix,0,sizeof(f->fmt.pix)); | |
1049 | f->fmt.pix.width = fh->width; | |
1050 | f->fmt.pix.height = fh->height; | |
1051 | f->fmt.pix.field = fh->vidq.field; | |
1052 | f->fmt.pix.pixelformat = fh->fmt->fourcc; | |
1053 | f->fmt.pix.bytesperline = | |
1054 | (f->fmt.pix.width * fh->fmt->depth) >> 3; | |
1055 | f->fmt.pix.sizeimage = | |
1056 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
1057 | return 0; | |
1058 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
1059 | cx8800_vbi_fmt(dev, f); | |
1060 | return 0; | |
1061 | default: | |
1062 | return -EINVAL; | |
1063 | } | |
1064 | } | |
1065 | ||
1066 | static int cx8800_try_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh, | |
1067 | struct v4l2_format *f) | |
1068 | { | |
e52e98a7 MCC |
1069 | struct cx88_core *core = dev->core; |
1070 | ||
1da177e4 LT |
1071 | switch (f->type) { |
1072 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
1073 | { | |
1074 | struct cx8800_fmt *fmt; | |
1075 | enum v4l2_field field; | |
1076 | unsigned int maxw, maxh; | |
1077 | ||
1078 | fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
1079 | if (NULL == fmt) | |
1080 | return -EINVAL; | |
1081 | ||
1082 | field = f->fmt.pix.field; | |
e52e98a7 MCC |
1083 | maxw = norm_maxw(core->tvnorm); |
1084 | maxh = norm_maxh(core->tvnorm); | |
1da177e4 LT |
1085 | |
1086 | if (V4L2_FIELD_ANY == field) { | |
1087 | field = (f->fmt.pix.height > maxh/2) | |
1088 | ? V4L2_FIELD_INTERLACED | |
1089 | : V4L2_FIELD_BOTTOM; | |
1090 | } | |
1091 | ||
1092 | switch (field) { | |
1093 | case V4L2_FIELD_TOP: | |
1094 | case V4L2_FIELD_BOTTOM: | |
1095 | maxh = maxh / 2; | |
1096 | break; | |
1097 | case V4L2_FIELD_INTERLACED: | |
1098 | break; | |
1099 | default: | |
1100 | return -EINVAL; | |
1101 | } | |
1102 | ||
1103 | f->fmt.pix.field = field; | |
1104 | if (f->fmt.pix.height < 32) | |
1105 | f->fmt.pix.height = 32; | |
1106 | if (f->fmt.pix.height > maxh) | |
1107 | f->fmt.pix.height = maxh; | |
1108 | if (f->fmt.pix.width < 48) | |
1109 | f->fmt.pix.width = 48; | |
1110 | if (f->fmt.pix.width > maxw) | |
1111 | f->fmt.pix.width = maxw; | |
1112 | f->fmt.pix.width &= ~0x03; | |
1113 | f->fmt.pix.bytesperline = | |
1114 | (f->fmt.pix.width * fmt->depth) >> 3; | |
1115 | f->fmt.pix.sizeimage = | |
1116 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
1117 | ||
1118 | return 0; | |
1119 | } | |
1120 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
1121 | cx8800_vbi_fmt(dev, f); | |
1122 | return 0; | |
1123 | default: | |
1124 | return -EINVAL; | |
1125 | } | |
1126 | } | |
1127 | ||
1128 | static int cx8800_s_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh, | |
1129 | struct v4l2_format *f) | |
1130 | { | |
1131 | int err; | |
1132 | ||
1133 | switch (f->type) { | |
1134 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
1135 | err = cx8800_try_fmt(dev,fh,f); | |
1136 | if (0 != err) | |
1137 | return err; | |
1138 | ||
1139 | fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
1140 | fh->width = f->fmt.pix.width; | |
1141 | fh->height = f->fmt.pix.height; | |
1142 | fh->vidq.field = f->fmt.pix.field; | |
1143 | return 0; | |
1144 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
1145 | cx8800_vbi_fmt(dev, f); | |
1146 | return 0; | |
1147 | default: | |
1148 | return -EINVAL; | |
1149 | } | |
1150 | } | |
1151 | ||
1152 | /* | |
1153 | * This function is _not_ called directly, but from | |
1154 | * video_generic_ioctl (and maybe others). userspace | |
1155 | * copying is done already, arg is a kernel pointer. | |
1156 | */ | |
1157 | static int video_do_ioctl(struct inode *inode, struct file *file, | |
1158 | unsigned int cmd, void *arg) | |
1159 | { | |
1160 | struct cx8800_fh *fh = file->private_data; | |
1161 | struct cx8800_dev *dev = fh->dev; | |
1162 | struct cx88_core *core = dev->core; | |
1da177e4 LT |
1163 | int err; |
1164 | ||
1165 | if (video_debug > 1) | |
5e453dc7 | 1166 | v4l_print_ioctl(core->name,cmd); |
1da177e4 | 1167 | switch (cmd) { |
e52e98a7 MCC |
1168 | |
1169 | /* --- capabilities ------------------------------------------ */ | |
1da177e4 LT |
1170 | case VIDIOC_QUERYCAP: |
1171 | { | |
1172 | struct v4l2_capability *cap = arg; | |
1173 | ||
1174 | memset(cap,0,sizeof(*cap)); | |
e52e98a7 | 1175 | strcpy(cap->driver, "cx8800"); |
1da177e4 LT |
1176 | strlcpy(cap->card, cx88_boards[core->board].name, |
1177 | sizeof(cap->card)); | |
1178 | sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); | |
1179 | cap->version = CX88_VERSION_CODE; | |
1180 | cap->capabilities = | |
1181 | V4L2_CAP_VIDEO_CAPTURE | | |
1182 | V4L2_CAP_READWRITE | | |
1183 | V4L2_CAP_STREAMING | | |
1184 | V4L2_CAP_VBI_CAPTURE | | |
1da177e4 LT |
1185 | 0; |
1186 | if (UNSET != core->tuner_type) | |
1187 | cap->capabilities |= V4L2_CAP_TUNER; | |
1188 | return 0; | |
1189 | } | |
1190 | ||
e52e98a7 MCC |
1191 | /* --- capture ioctls ---------------------------------------- */ |
1192 | case VIDIOC_ENUM_FMT: | |
1193 | { | |
1194 | struct v4l2_fmtdesc *f = arg; | |
1195 | enum v4l2_buf_type type; | |
1196 | unsigned int index; | |
1197 | ||
1198 | index = f->index; | |
1199 | type = f->type; | |
1200 | switch (type) { | |
1201 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
1202 | if (index >= ARRAY_SIZE(formats)) | |
1203 | return -EINVAL; | |
1204 | memset(f,0,sizeof(*f)); | |
1205 | f->index = index; | |
1206 | f->type = type; | |
1207 | strlcpy(f->description,formats[index].name,sizeof(f->description)); | |
1208 | f->pixelformat = formats[index].fourcc; | |
1209 | break; | |
1210 | default: | |
1211 | return -EINVAL; | |
1212 | } | |
1213 | return 0; | |
1214 | } | |
1215 | case VIDIOC_G_FMT: | |
1216 | { | |
1217 | struct v4l2_format *f = arg; | |
1218 | return cx8800_g_fmt(dev,fh,f); | |
1219 | } | |
1220 | case VIDIOC_S_FMT: | |
1221 | { | |
1222 | struct v4l2_format *f = arg; | |
1223 | return cx8800_s_fmt(dev,fh,f); | |
1224 | } | |
1225 | case VIDIOC_TRY_FMT: | |
1226 | { | |
1227 | struct v4l2_format *f = arg; | |
1228 | return cx8800_try_fmt(dev,fh,f); | |
1229 | } | |
0dfa9abd | 1230 | #ifdef CONFIG_VIDEO_V4L1_COMPAT |
e52e98a7 MCC |
1231 | /* --- streaming capture ------------------------------------- */ |
1232 | case VIDIOCGMBUF: | |
1233 | { | |
1234 | struct video_mbuf *mbuf = arg; | |
1235 | struct videobuf_queue *q; | |
1236 | struct v4l2_requestbuffers req; | |
1237 | unsigned int i; | |
1238 | ||
1239 | q = get_queue(fh); | |
1240 | memset(&req,0,sizeof(req)); | |
1241 | req.type = q->type; | |
1242 | req.count = 8; | |
1243 | req.memory = V4L2_MEMORY_MMAP; | |
1244 | err = videobuf_reqbufs(q,&req); | |
1245 | if (err < 0) | |
1246 | return err; | |
1247 | memset(mbuf,0,sizeof(*mbuf)); | |
1248 | mbuf->frames = req.count; | |
1249 | mbuf->size = 0; | |
1250 | for (i = 0; i < mbuf->frames; i++) { | |
1251 | mbuf->offsets[i] = q->bufs[i]->boff; | |
1252 | mbuf->size += q->bufs[i]->bsize; | |
1253 | } | |
1254 | return 0; | |
1255 | } | |
79436633 | 1256 | #endif |
e52e98a7 MCC |
1257 | case VIDIOC_REQBUFS: |
1258 | return videobuf_reqbufs(get_queue(fh), arg); | |
1259 | ||
1260 | case VIDIOC_QUERYBUF: | |
1261 | return videobuf_querybuf(get_queue(fh), arg); | |
1262 | ||
1263 | case VIDIOC_QBUF: | |
1264 | return videobuf_qbuf(get_queue(fh), arg); | |
1265 | ||
1266 | case VIDIOC_DQBUF: | |
1267 | return videobuf_dqbuf(get_queue(fh), arg, | |
1268 | file->f_flags & O_NONBLOCK); | |
1269 | ||
1270 | case VIDIOC_STREAMON: | |
1271 | { | |
1272 | int res = get_ressource(fh); | |
1273 | ||
1274 | if (!res_get(dev,fh,res)) | |
1275 | return -EBUSY; | |
1276 | return videobuf_streamon(get_queue(fh)); | |
1277 | } | |
1278 | case VIDIOC_STREAMOFF: | |
1279 | { | |
1280 | int res = get_ressource(fh); | |
1281 | ||
1282 | err = videobuf_streamoff(get_queue(fh)); | |
1283 | if (err < 0) | |
1284 | return err; | |
1285 | res_free(dev,fh,res); | |
1286 | return 0; | |
1287 | } | |
e52e98a7 MCC |
1288 | default: |
1289 | return cx88_do_ioctl( inode, file, fh->radio, core, cmd, arg, video_do_ioctl ); | |
1290 | } | |
1291 | return 0; | |
1292 | } | |
1293 | ||
1294 | int cx88_do_ioctl(struct inode *inode, struct file *file, int radio, | |
4ac97914 | 1295 | struct cx88_core *core, unsigned int cmd, void *arg, v4l2_kioctl driver_ioctl) |
e52e98a7 MCC |
1296 | { |
1297 | int err; | |
1298 | ||
c7b0ac05 MCC |
1299 | if (video_debug) { |
1300 | if (video_debug > 1) { | |
1301 | if (_IOC_DIR(cmd) & _IOC_WRITE) | |
1302 | v4l_printk_ioctl_arg("cx88(w)",cmd, arg); | |
1303 | else if (!_IOC_DIR(cmd) & _IOC_READ) { | |
1304 | v4l_print_ioctl("cx88", cmd); | |
1305 | } | |
1306 | } else | |
1307 | v4l_print_ioctl(core->name,cmd); | |
1308 | ||
1309 | } | |
e52e98a7 MCC |
1310 | |
1311 | switch (cmd) { | |
1da177e4 LT |
1312 | /* ---------- tv norms ---------- */ |
1313 | case VIDIOC_ENUMSTD: | |
1314 | { | |
1315 | struct v4l2_standard *e = arg; | |
1316 | unsigned int i; | |
1317 | ||
1318 | i = e->index; | |
1319 | if (i >= ARRAY_SIZE(tvnorms)) | |
1320 | return -EINVAL; | |
1321 | err = v4l2_video_std_construct(e, tvnorms[e->index].id, | |
1322 | tvnorms[e->index].name); | |
1323 | e->index = i; | |
1324 | if (err < 0) | |
1325 | return err; | |
1326 | return 0; | |
1327 | } | |
1328 | case VIDIOC_G_STD: | |
1329 | { | |
1330 | v4l2_std_id *id = arg; | |
1331 | ||
1332 | *id = core->tvnorm->id; | |
1333 | return 0; | |
1334 | } | |
1335 | case VIDIOC_S_STD: | |
1336 | { | |
1337 | v4l2_std_id *id = arg; | |
1338 | unsigned int i; | |
1339 | ||
1340 | for(i = 0; i < ARRAY_SIZE(tvnorms); i++) | |
1341 | if (*id & tvnorms[i].id) | |
1342 | break; | |
1343 | if (i == ARRAY_SIZE(tvnorms)) | |
1344 | return -EINVAL; | |
1345 | ||
3593cab5 | 1346 | mutex_lock(&core->lock); |
e52e98a7 | 1347 | cx88_set_tvnorm(core,&tvnorms[i]); |
3593cab5 | 1348 | mutex_unlock(&core->lock); |
1da177e4 LT |
1349 | return 0; |
1350 | } | |
1351 | ||
1352 | /* ------ input switching ---------- */ | |
1353 | case VIDIOC_ENUMINPUT: | |
1354 | { | |
1355 | static const char *iname[] = { | |
1356 | [ CX88_VMUX_COMPOSITE1 ] = "Composite1", | |
1357 | [ CX88_VMUX_COMPOSITE2 ] = "Composite2", | |
1358 | [ CX88_VMUX_COMPOSITE3 ] = "Composite3", | |
1359 | [ CX88_VMUX_COMPOSITE4 ] = "Composite4", | |
1360 | [ CX88_VMUX_SVIDEO ] = "S-Video", | |
1361 | [ CX88_VMUX_TELEVISION ] = "Television", | |
1362 | [ CX88_VMUX_CABLE ] = "Cable TV", | |
1363 | [ CX88_VMUX_DVB ] = "DVB", | |
1364 | [ CX88_VMUX_DEBUG ] = "for debug only", | |
1365 | }; | |
1366 | struct v4l2_input *i = arg; | |
1367 | unsigned int n; | |
1368 | ||
1369 | n = i->index; | |
1370 | if (n >= 4) | |
1371 | return -EINVAL; | |
1372 | if (0 == INPUT(n)->type) | |
1373 | return -EINVAL; | |
1374 | memset(i,0,sizeof(*i)); | |
1375 | i->index = n; | |
1376 | i->type = V4L2_INPUT_TYPE_CAMERA; | |
1377 | strcpy(i->name,iname[INPUT(n)->type]); | |
1378 | if ((CX88_VMUX_TELEVISION == INPUT(n)->type) || | |
1379 | (CX88_VMUX_CABLE == INPUT(n)->type)) | |
1380 | i->type = V4L2_INPUT_TYPE_TUNER; | |
1381 | for (n = 0; n < ARRAY_SIZE(tvnorms); n++) | |
1382 | i->std |= tvnorms[n].id; | |
1383 | return 0; | |
1384 | } | |
1385 | case VIDIOC_G_INPUT: | |
1386 | { | |
1387 | unsigned int *i = arg; | |
1388 | ||
e52e98a7 | 1389 | *i = core->input; |
1da177e4 LT |
1390 | return 0; |
1391 | } | |
1392 | case VIDIOC_S_INPUT: | |
1393 | { | |
1394 | unsigned int *i = arg; | |
1395 | ||
1396 | if (*i >= 4) | |
1397 | return -EINVAL; | |
3593cab5 | 1398 | mutex_lock(&core->lock); |
1da177e4 | 1399 | cx88_newstation(core); |
e52e98a7 | 1400 | video_mux(core,*i); |
3593cab5 | 1401 | mutex_unlock(&core->lock); |
1da177e4 LT |
1402 | return 0; |
1403 | } | |
1404 | ||
1405 | ||
1da177e4 | 1406 | |
1da177e4 LT |
1407 | /* --- controls ---------------------------------------------- */ |
1408 | case VIDIOC_QUERYCTRL: | |
1409 | { | |
1410 | struct v4l2_queryctrl *c = arg; | |
1da177e4 | 1411 | |
38a2713a | 1412 | return cx88_queryctrl(c); |
1da177e4 LT |
1413 | } |
1414 | case VIDIOC_G_CTRL: | |
e52e98a7 | 1415 | return get_control(core,arg); |
1da177e4 | 1416 | case VIDIOC_S_CTRL: |
e52e98a7 | 1417 | return set_control(core,arg); |
1da177e4 LT |
1418 | |
1419 | /* --- tuner ioctls ------------------------------------------ */ | |
1420 | case VIDIOC_G_TUNER: | |
1421 | { | |
1422 | struct v4l2_tuner *t = arg; | |
1423 | u32 reg; | |
1424 | ||
1425 | if (UNSET == core->tuner_type) | |
1426 | return -EINVAL; | |
1427 | if (0 != t->index) | |
1428 | return -EINVAL; | |
1429 | ||
1430 | memset(t,0,sizeof(*t)); | |
1431 | strcpy(t->name, "Television"); | |
1432 | t->type = V4L2_TUNER_ANALOG_TV; | |
1433 | t->capability = V4L2_TUNER_CAP_NORM; | |
1434 | t->rangehigh = 0xffffffffUL; | |
1435 | ||
1436 | cx88_get_stereo(core ,t); | |
1437 | reg = cx_read(MO_DEVICE_STATUS); | |
4ac97914 | 1438 | t->signal = (reg & (1<<5)) ? 0xffff : 0x0000; |
1da177e4 LT |
1439 | return 0; |
1440 | } | |
1441 | case VIDIOC_S_TUNER: | |
1442 | { | |
1443 | struct v4l2_tuner *t = arg; | |
1444 | ||
1445 | if (UNSET == core->tuner_type) | |
1446 | return -EINVAL; | |
1447 | if (0 != t->index) | |
1448 | return -EINVAL; | |
1449 | cx88_set_stereo(core, t->audmode, 1); | |
1450 | return 0; | |
1451 | } | |
1452 | case VIDIOC_G_FREQUENCY: | |
1453 | { | |
1454 | struct v4l2_frequency *f = arg; | |
1455 | ||
a82decf6 MCC |
1456 | memset(f,0,sizeof(*f)); |
1457 | ||
1da177e4 LT |
1458 | if (UNSET == core->tuner_type) |
1459 | return -EINVAL; | |
a82decf6 | 1460 | |
e52e98a7 MCC |
1461 | /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */ |
1462 | f->type = radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; | |
1463 | f->frequency = core->freq; | |
41ef7c1e | 1464 | |
e52e98a7 | 1465 | cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f); |
41ef7c1e | 1466 | |
1da177e4 LT |
1467 | return 0; |
1468 | } | |
1469 | case VIDIOC_S_FREQUENCY: | |
1470 | { | |
1471 | struct v4l2_frequency *f = arg; | |
1472 | ||
1473 | if (UNSET == core->tuner_type) | |
1474 | return -EINVAL; | |
1475 | if (f->tuner != 0) | |
1476 | return -EINVAL; | |
e52e98a7 | 1477 | if (0 == radio && f->type != V4L2_TUNER_ANALOG_TV) |
1da177e4 | 1478 | return -EINVAL; |
e52e98a7 | 1479 | if (1 == radio && f->type != V4L2_TUNER_RADIO) |
1da177e4 | 1480 | return -EINVAL; |
3593cab5 | 1481 | mutex_lock(&core->lock); |
e52e98a7 | 1482 | core->freq = f->frequency; |
1da177e4 | 1483 | cx88_newstation(core); |
e52e98a7 | 1484 | cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f); |
c5287ba1 MCC |
1485 | |
1486 | /* When changing channels it is required to reset TVAUDIO */ | |
1487 | msleep (10); | |
1488 | cx88_set_tvaudio(core); | |
1489 | ||
3593cab5 | 1490 | mutex_unlock(&core->lock); |
1da177e4 LT |
1491 | return 0; |
1492 | } | |
1493 | ||
1494 | default: | |
1495 | return v4l_compat_translate_ioctl(inode,file,cmd,arg, | |
e52e98a7 | 1496 | driver_ioctl); |
1da177e4 LT |
1497 | } |
1498 | return 0; | |
1499 | } | |
1500 | ||
1501 | static int video_ioctl(struct inode *inode, struct file *file, | |
1502 | unsigned int cmd, unsigned long arg) | |
1503 | { | |
c7b0ac05 MCC |
1504 | int retval; |
1505 | ||
1506 | retval=video_usercopy(inode, file, cmd, arg, video_do_ioctl); | |
1507 | ||
1508 | if (video_debug > 1) { | |
1509 | if (retval < 0) { | |
1510 | v4l_print_ioctl("cx88(err)", cmd); | |
1511 | printk(KERN_DEBUG "cx88(err): errcode=%d\n",retval); | |
1512 | } else if (_IOC_DIR(cmd) & _IOC_READ) | |
1513 | v4l_printk_ioctl_arg("cx88(r)",cmd, (void *)arg); | |
1514 | } | |
1515 | ||
1516 | return retval; | |
1da177e4 LT |
1517 | } |
1518 | ||
1519 | /* ----------------------------------------------------------- */ | |
1520 | ||
1521 | static int radio_do_ioctl(struct inode *inode, struct file *file, | |
1522 | unsigned int cmd, void *arg) | |
1523 | { | |
1524 | struct cx8800_fh *fh = file->private_data; | |
1525 | struct cx8800_dev *dev = fh->dev; | |
1526 | struct cx88_core *core = dev->core; | |
1527 | ||
1528 | if (video_debug > 1) | |
5e453dc7 | 1529 | v4l_print_ioctl(core->name,cmd); |
1da177e4 LT |
1530 | |
1531 | switch (cmd) { | |
1532 | case VIDIOC_QUERYCAP: | |
1533 | { | |
1534 | struct v4l2_capability *cap = arg; | |
1535 | ||
1536 | memset(cap,0,sizeof(*cap)); | |
4ac97914 | 1537 | strcpy(cap->driver, "cx8800"); |
1da177e4 LT |
1538 | strlcpy(cap->card, cx88_boards[core->board].name, |
1539 | sizeof(cap->card)); | |
1540 | sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); | |
1541 | cap->version = CX88_VERSION_CODE; | |
a82decf6 | 1542 | cap->capabilities = V4L2_CAP_TUNER; |
1da177e4 LT |
1543 | return 0; |
1544 | } | |
1545 | case VIDIOC_G_TUNER: | |
1546 | { | |
1547 | struct v4l2_tuner *t = arg; | |
1548 | ||
1549 | if (t->index > 0) | |
1550 | return -EINVAL; | |
1551 | ||
1552 | memset(t,0,sizeof(*t)); | |
1553 | strcpy(t->name, "Radio"); | |
48c42596 | 1554 | t->type = V4L2_TUNER_RADIO; |
1da177e4 | 1555 | |
e52e98a7 | 1556 | cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t); |
1da177e4 LT |
1557 | return 0; |
1558 | } | |
1559 | case VIDIOC_ENUMINPUT: | |
1560 | { | |
1561 | struct v4l2_input *i = arg; | |
1562 | ||
1563 | if (i->index != 0) | |
1564 | return -EINVAL; | |
1565 | strcpy(i->name,"Radio"); | |
1566 | i->type = V4L2_INPUT_TYPE_TUNER; | |
1567 | return 0; | |
1568 | } | |
1569 | case VIDIOC_G_INPUT: | |
1570 | { | |
1571 | int *i = arg; | |
1572 | *i = 0; | |
1573 | return 0; | |
1574 | } | |
1575 | case VIDIOC_G_AUDIO: | |
1576 | { | |
1577 | struct v4l2_audio *a = arg; | |
1578 | ||
1579 | memset(a,0,sizeof(*a)); | |
1580 | strcpy(a->name,"Radio"); | |
1581 | return 0; | |
1582 | } | |
1583 | case VIDIOC_G_STD: | |
1584 | { | |
1585 | v4l2_std_id *id = arg; | |
1586 | *id = 0; | |
1587 | return 0; | |
1588 | } | |
0dfa9abd | 1589 | #ifdef CONFIG_VIDEO_V4L1_COMPAT |
a82decf6 MCC |
1590 | case VIDIOCSTUNER: |
1591 | { | |
1592 | struct video_tuner *v = arg; | |
1593 | ||
1594 | if (v->tuner) /* Only tuner 0 */ | |
1595 | return -EINVAL; | |
1596 | ||
e52e98a7 MCC |
1597 | cx88_call_i2c_clients(core,VIDIOCSTUNER,v); |
1598 | return 0; | |
a82decf6 | 1599 | } |
79436633 | 1600 | #endif |
1da177e4 | 1601 | case VIDIOC_S_TUNER: |
a82decf6 MCC |
1602 | { |
1603 | struct v4l2_tuner *t = arg; | |
1604 | ||
1605 | if (0 != t->index) | |
1606 | return -EINVAL; | |
1607 | ||
e52e98a7 | 1608 | cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t); |
a82decf6 MCC |
1609 | |
1610 | return 0; | |
1611 | } | |
1612 | ||
1613 | case VIDIOC_S_AUDIO: | |
1da177e4 LT |
1614 | case VIDIOC_S_INPUT: |
1615 | case VIDIOC_S_STD: | |
1616 | return 0; | |
1617 | ||
1618 | case VIDIOC_QUERYCTRL: | |
1619 | { | |
1620 | struct v4l2_queryctrl *c = arg; | |
1621 | int i; | |
1622 | ||
1623 | if (c->id < V4L2_CID_BASE || | |
1624 | c->id >= V4L2_CID_LASTP1) | |
1625 | return -EINVAL; | |
1626 | if (c->id == V4L2_CID_AUDIO_MUTE) { | |
1627 | for (i = 0; i < CX8800_CTLS; i++) | |
1628 | if (cx8800_ctls[i].v.id == c->id) | |
1629 | break; | |
1630 | *c = cx8800_ctls[i].v; | |
1631 | } else | |
1632 | *c = no_ctl; | |
1633 | return 0; | |
1634 | } | |
1635 | ||
1636 | ||
1637 | case VIDIOC_G_CTRL: | |
1638 | case VIDIOC_S_CTRL: | |
1639 | case VIDIOC_G_FREQUENCY: | |
1640 | case VIDIOC_S_FREQUENCY: | |
1641 | return video_do_ioctl(inode,file,cmd,arg); | |
1642 | ||
1643 | default: | |
1644 | return v4l_compat_translate_ioctl(inode,file,cmd,arg, | |
1645 | radio_do_ioctl); | |
1646 | } | |
1647 | return 0; | |
1648 | }; | |
1649 | ||
1650 | static int radio_ioctl(struct inode *inode, struct file *file, | |
1651 | unsigned int cmd, unsigned long arg) | |
1652 | { | |
1653 | return video_usercopy(inode, file, cmd, arg, radio_do_ioctl); | |
1654 | }; | |
1655 | ||
1656 | /* ----------------------------------------------------------- */ | |
1657 | ||
1658 | static void cx8800_vid_timeout(unsigned long data) | |
1659 | { | |
1660 | struct cx8800_dev *dev = (struct cx8800_dev*)data; | |
1661 | struct cx88_core *core = dev->core; | |
1662 | struct cx88_dmaqueue *q = &dev->vidq; | |
1663 | struct cx88_buffer *buf; | |
1664 | unsigned long flags; | |
1665 | ||
e52e98a7 | 1666 | cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); |
1da177e4 LT |
1667 | |
1668 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
1669 | cx_clear(VID_CAPTURE_CONTROL, 0x06); | |
1670 | ||
1671 | spin_lock_irqsave(&dev->slock,flags); | |
1672 | while (!list_empty(&q->active)) { | |
1673 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); | |
1674 | list_del(&buf->vb.queue); | |
1675 | buf->vb.state = STATE_ERROR; | |
1676 | wake_up(&buf->vb.done); | |
1677 | printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name, | |
1678 | buf, buf->vb.i, (unsigned long)buf->risc.dma); | |
1679 | } | |
1680 | restart_video_queue(dev,q); | |
1681 | spin_unlock_irqrestore(&dev->slock,flags); | |
1682 | } | |
1683 | ||
41ef7c1e MCC |
1684 | static char *cx88_vid_irqs[32] = { |
1685 | "y_risci1", "u_risci1", "v_risci1", "vbi_risc1", | |
1686 | "y_risci2", "u_risci2", "v_risci2", "vbi_risc2", | |
1687 | "y_oflow", "u_oflow", "v_oflow", "vbi_oflow", | |
1688 | "y_sync", "u_sync", "v_sync", "vbi_sync", | |
1689 | "opc_err", "par_err", "rip_err", "pci_abort", | |
1690 | }; | |
1691 | ||
1da177e4 LT |
1692 | static void cx8800_vid_irq(struct cx8800_dev *dev) |
1693 | { | |
1694 | struct cx88_core *core = dev->core; | |
1695 | u32 status, mask, count; | |
1696 | ||
1697 | status = cx_read(MO_VID_INTSTAT); | |
1698 | mask = cx_read(MO_VID_INTMSK); | |
1699 | if (0 == (status & mask)) | |
1700 | return; | |
1701 | cx_write(MO_VID_INTSTAT, status); | |
1702 | if (irq_debug || (status & mask & ~0xff)) | |
1703 | cx88_print_irqbits(core->name, "irq vid", | |
1704 | cx88_vid_irqs, status, mask); | |
1705 | ||
1706 | /* risc op code error */ | |
1707 | if (status & (1 << 16)) { | |
1708 | printk(KERN_WARNING "%s/0: video risc op code error\n",core->name); | |
1709 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
1710 | cx_clear(VID_CAPTURE_CONTROL, 0x06); | |
e52e98a7 | 1711 | cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); |
1da177e4 LT |
1712 | } |
1713 | ||
1714 | /* risc1 y */ | |
1715 | if (status & 0x01) { | |
1716 | spin_lock(&dev->slock); | |
1717 | count = cx_read(MO_VIDY_GPCNT); | |
e52e98a7 | 1718 | cx88_wakeup(core, &dev->vidq, count); |
1da177e4 LT |
1719 | spin_unlock(&dev->slock); |
1720 | } | |
1721 | ||
1722 | /* risc1 vbi */ | |
1723 | if (status & 0x08) { | |
1724 | spin_lock(&dev->slock); | |
1725 | count = cx_read(MO_VBI_GPCNT); | |
e52e98a7 | 1726 | cx88_wakeup(core, &dev->vbiq, count); |
1da177e4 LT |
1727 | spin_unlock(&dev->slock); |
1728 | } | |
1729 | ||
1730 | /* risc2 y */ | |
1731 | if (status & 0x10) { | |
1732 | dprintk(2,"stopper video\n"); | |
1733 | spin_lock(&dev->slock); | |
1734 | restart_video_queue(dev,&dev->vidq); | |
1735 | spin_unlock(&dev->slock); | |
1736 | } | |
1737 | ||
1738 | /* risc2 vbi */ | |
1739 | if (status & 0x80) { | |
1740 | dprintk(2,"stopper vbi\n"); | |
1741 | spin_lock(&dev->slock); | |
1742 | cx8800_restart_vbi_queue(dev,&dev->vbiq); | |
1743 | spin_unlock(&dev->slock); | |
1744 | } | |
1745 | } | |
1746 | ||
7d12e780 | 1747 | static irqreturn_t cx8800_irq(int irq, void *dev_id) |
1da177e4 LT |
1748 | { |
1749 | struct cx8800_dev *dev = dev_id; | |
1750 | struct cx88_core *core = dev->core; | |
1751 | u32 status; | |
1752 | int loop, handled = 0; | |
1753 | ||
1754 | for (loop = 0; loop < 10; loop++) { | |
1755 | status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x01); | |
1756 | if (0 == status) | |
1757 | goto out; | |
1758 | cx_write(MO_PCI_INTSTAT, status); | |
1759 | handled = 1; | |
1760 | ||
1761 | if (status & core->pci_irqmask) | |
1762 | cx88_core_irq(core,status); | |
1763 | if (status & 0x01) | |
1764 | cx8800_vid_irq(dev); | |
1765 | }; | |
1766 | if (10 == loop) { | |
1767 | printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n", | |
1768 | core->name); | |
1769 | cx_write(MO_PCI_INTMSK,0); | |
1770 | } | |
1771 | ||
1772 | out: | |
1773 | return IRQ_RETVAL(handled); | |
1774 | } | |
1775 | ||
1776 | /* ----------------------------------------------------------- */ | |
1777 | /* exported stuff */ | |
1778 | ||
1779 | static struct file_operations video_fops = | |
1780 | { | |
1781 | .owner = THIS_MODULE, | |
1782 | .open = video_open, | |
1783 | .release = video_release, | |
1784 | .read = video_read, | |
1785 | .poll = video_poll, | |
1786 | .mmap = video_mmap, | |
1787 | .ioctl = video_ioctl, | |
0d0fbf81 | 1788 | .compat_ioctl = v4l_compat_ioctl32, |
1da177e4 LT |
1789 | .llseek = no_llseek, |
1790 | }; | |
1791 | ||
408b664a | 1792 | static struct video_device cx8800_video_template = |
1da177e4 LT |
1793 | { |
1794 | .name = "cx8800-video", | |
1795 | .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES, | |
1796 | .hardware = 0, | |
1797 | .fops = &video_fops, | |
1798 | .minor = -1, | |
1799 | }; | |
1800 | ||
408b664a | 1801 | static struct video_device cx8800_vbi_template = |
1da177e4 LT |
1802 | { |
1803 | .name = "cx8800-vbi", | |
1804 | .type = VID_TYPE_TELETEXT|VID_TYPE_TUNER, | |
1805 | .hardware = 0, | |
1806 | .fops = &video_fops, | |
1807 | .minor = -1, | |
1808 | }; | |
1809 | ||
1810 | static struct file_operations radio_fops = | |
1811 | { | |
1812 | .owner = THIS_MODULE, | |
1813 | .open = video_open, | |
1814 | .release = video_release, | |
1815 | .ioctl = radio_ioctl, | |
0d0fbf81 | 1816 | .compat_ioctl = v4l_compat_ioctl32, |
1da177e4 LT |
1817 | .llseek = no_llseek, |
1818 | }; | |
1819 | ||
408b664a | 1820 | static struct video_device cx8800_radio_template = |
1da177e4 LT |
1821 | { |
1822 | .name = "cx8800-radio", | |
1823 | .type = VID_TYPE_TUNER, | |
1824 | .hardware = 0, | |
1825 | .fops = &radio_fops, | |
1826 | .minor = -1, | |
1827 | }; | |
1828 | ||
1829 | /* ----------------------------------------------------------- */ | |
1830 | ||
1831 | static void cx8800_unregister_video(struct cx8800_dev *dev) | |
1832 | { | |
1833 | if (dev->radio_dev) { | |
1834 | if (-1 != dev->radio_dev->minor) | |
1835 | video_unregister_device(dev->radio_dev); | |
1836 | else | |
1837 | video_device_release(dev->radio_dev); | |
1838 | dev->radio_dev = NULL; | |
1839 | } | |
1840 | if (dev->vbi_dev) { | |
1841 | if (-1 != dev->vbi_dev->minor) | |
1842 | video_unregister_device(dev->vbi_dev); | |
1843 | else | |
1844 | video_device_release(dev->vbi_dev); | |
1845 | dev->vbi_dev = NULL; | |
1846 | } | |
1847 | if (dev->video_dev) { | |
1848 | if (-1 != dev->video_dev->minor) | |
1849 | video_unregister_device(dev->video_dev); | |
1850 | else | |
1851 | video_device_release(dev->video_dev); | |
1852 | dev->video_dev = NULL; | |
1853 | } | |
1854 | } | |
1855 | ||
1856 | static int __devinit cx8800_initdev(struct pci_dev *pci_dev, | |
1857 | const struct pci_device_id *pci_id) | |
1858 | { | |
1859 | struct cx8800_dev *dev; | |
1860 | struct cx88_core *core; | |
1861 | int err; | |
1862 | ||
7408187d | 1863 | dev = kzalloc(sizeof(*dev),GFP_KERNEL); |
1da177e4 LT |
1864 | if (NULL == dev) |
1865 | return -ENOMEM; | |
1da177e4 LT |
1866 | |
1867 | /* pci init */ | |
1868 | dev->pci = pci_dev; | |
1869 | if (pci_enable_device(pci_dev)) { | |
1870 | err = -EIO; | |
1871 | goto fail_free; | |
1872 | } | |
1873 | core = cx88_core_get(dev->pci); | |
1874 | if (NULL == core) { | |
1875 | err = -EINVAL; | |
1876 | goto fail_free; | |
1877 | } | |
1878 | dev->core = core; | |
1879 | ||
1880 | /* print pci info */ | |
1881 | pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev); | |
4ac97914 MCC |
1882 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); |
1883 | printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, " | |
228aef63 | 1884 | "latency: %d, mmio: 0x%llx\n", core->name, |
1da177e4 | 1885 | pci_name(pci_dev), dev->pci_rev, pci_dev->irq, |
228aef63 | 1886 | dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0)); |
1da177e4 LT |
1887 | |
1888 | pci_set_master(pci_dev); | |
1889 | if (!pci_dma_supported(pci_dev,0xffffffff)) { | |
1890 | printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name); | |
1891 | err = -EIO; | |
1892 | goto fail_core; | |
1893 | } | |
1894 | ||
1895 | /* initialize driver struct */ | |
1da177e4 LT |
1896 | spin_lock_init(&dev->slock); |
1897 | core->tvnorm = tvnorms; | |
1898 | ||
1899 | /* init video dma queues */ | |
1900 | INIT_LIST_HEAD(&dev->vidq.active); | |
1901 | INIT_LIST_HEAD(&dev->vidq.queued); | |
1902 | dev->vidq.timeout.function = cx8800_vid_timeout; | |
1903 | dev->vidq.timeout.data = (unsigned long)dev; | |
1904 | init_timer(&dev->vidq.timeout); | |
1905 | cx88_risc_stopper(dev->pci,&dev->vidq.stopper, | |
1906 | MO_VID_DMACNTRL,0x11,0x00); | |
1907 | ||
1908 | /* init vbi dma queues */ | |
1909 | INIT_LIST_HEAD(&dev->vbiq.active); | |
1910 | INIT_LIST_HEAD(&dev->vbiq.queued); | |
1911 | dev->vbiq.timeout.function = cx8800_vbi_timeout; | |
1912 | dev->vbiq.timeout.data = (unsigned long)dev; | |
1913 | init_timer(&dev->vbiq.timeout); | |
1914 | cx88_risc_stopper(dev->pci,&dev->vbiq.stopper, | |
1915 | MO_VID_DMACNTRL,0x88,0x00); | |
1916 | ||
1917 | /* get irq */ | |
1918 | err = request_irq(pci_dev->irq, cx8800_irq, | |
8076fe32 | 1919 | IRQF_SHARED | IRQF_DISABLED, core->name, dev); |
1da177e4 LT |
1920 | if (err < 0) { |
1921 | printk(KERN_ERR "%s: can't get IRQ %d\n", | |
1922 | core->name,pci_dev->irq); | |
1923 | goto fail_core; | |
1924 | } | |
1925 | cx_set(MO_PCI_INTMSK, core->pci_irqmask); | |
1926 | ||
1927 | /* load and configure helper modules */ | |
1928 | if (TUNER_ABSENT != core->tuner_type) | |
1929 | request_module("tuner"); | |
e52e98a7 | 1930 | |
3057906d ST |
1931 | if (cx88_boards[ core->board ].audio_chip == AUDIO_CHIP_WM8775) |
1932 | request_module("wm8775"); | |
1933 | ||
1da177e4 LT |
1934 | /* register v4l devices */ |
1935 | dev->video_dev = cx88_vdev_init(core,dev->pci, | |
1936 | &cx8800_video_template,"video"); | |
1937 | err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER, | |
1938 | video_nr[core->nr]); | |
1939 | if (err < 0) { | |
1940 | printk(KERN_INFO "%s: can't register video device\n", | |
1941 | core->name); | |
1942 | goto fail_unreg; | |
1943 | } | |
1944 | printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n", | |
1945 | core->name,dev->video_dev->minor & 0x1f); | |
1946 | ||
1947 | dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi"); | |
1948 | err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI, | |
1949 | vbi_nr[core->nr]); | |
1950 | if (err < 0) { | |
1951 | printk(KERN_INFO "%s/0: can't register vbi device\n", | |
1952 | core->name); | |
1953 | goto fail_unreg; | |
1954 | } | |
1955 | printk(KERN_INFO "%s/0: registered device vbi%d\n", | |
1956 | core->name,dev->vbi_dev->minor & 0x1f); | |
1957 | ||
1958 | if (core->has_radio) { | |
1959 | dev->radio_dev = cx88_vdev_init(core,dev->pci, | |
1960 | &cx8800_radio_template,"radio"); | |
1961 | err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO, | |
1962 | radio_nr[core->nr]); | |
1963 | if (err < 0) { | |
1964 | printk(KERN_INFO "%s/0: can't register radio device\n", | |
1965 | core->name); | |
1966 | goto fail_unreg; | |
1967 | } | |
1968 | printk(KERN_INFO "%s/0: registered device radio%d\n", | |
1969 | core->name,dev->radio_dev->minor & 0x1f); | |
1970 | } | |
1971 | ||
1972 | /* everything worked */ | |
1973 | list_add_tail(&dev->devlist,&cx8800_devlist); | |
1974 | pci_set_drvdata(pci_dev,dev); | |
1975 | ||
1976 | /* initial device configuration */ | |
3593cab5 | 1977 | mutex_lock(&core->lock); |
e52e98a7 | 1978 | cx88_set_tvnorm(core,tvnorms); |
70f00044 | 1979 | init_controls(core); |
e52e98a7 | 1980 | video_mux(core,0); |
3593cab5 | 1981 | mutex_unlock(&core->lock); |
1da177e4 LT |
1982 | |
1983 | /* start tvaudio thread */ | |
1984 | if (core->tuner_type != TUNER_ABSENT) | |
1985 | core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio"); | |
1986 | return 0; | |
1987 | ||
1988 | fail_unreg: | |
1989 | cx8800_unregister_video(dev); | |
1990 | free_irq(pci_dev->irq, dev); | |
1991 | fail_core: | |
1992 | cx88_core_put(core,dev->pci); | |
1993 | fail_free: | |
1994 | kfree(dev); | |
1995 | return err; | |
1996 | } | |
1997 | ||
1998 | static void __devexit cx8800_finidev(struct pci_dev *pci_dev) | |
1999 | { | |
4ac97914 | 2000 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
e52e98a7 | 2001 | struct cx88_core *core = dev->core; |
1da177e4 LT |
2002 | |
2003 | /* stop thread */ | |
e52e98a7 MCC |
2004 | if (core->kthread) { |
2005 | kthread_stop(core->kthread); | |
2006 | core->kthread = NULL; | |
1da177e4 LT |
2007 | } |
2008 | ||
e52e98a7 | 2009 | cx88_shutdown(core); /* FIXME */ |
1da177e4 LT |
2010 | pci_disable_device(pci_dev); |
2011 | ||
2012 | /* unregister stuff */ | |
2013 | ||
2014 | free_irq(pci_dev->irq, dev); | |
2015 | cx8800_unregister_video(dev); | |
2016 | pci_set_drvdata(pci_dev, NULL); | |
2017 | ||
2018 | /* free memory */ | |
2019 | btcx_riscmem_free(dev->pci,&dev->vidq.stopper); | |
2020 | list_del(&dev->devlist); | |
e52e98a7 | 2021 | cx88_core_put(core,dev->pci); |
1da177e4 LT |
2022 | kfree(dev); |
2023 | } | |
2024 | ||
17bc98a4 | 2025 | #ifdef CONFIG_PM |
1da177e4 LT |
2026 | static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state) |
2027 | { | |
b45009b0 | 2028 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
1da177e4 LT |
2029 | struct cx88_core *core = dev->core; |
2030 | ||
2031 | /* stop video+vbi capture */ | |
2032 | spin_lock(&dev->slock); | |
2033 | if (!list_empty(&dev->vidq.active)) { | |
2034 | printk("%s: suspend video\n", core->name); | |
2035 | stop_video_dma(dev); | |
2036 | del_timer(&dev->vidq.timeout); | |
2037 | } | |
2038 | if (!list_empty(&dev->vbiq.active)) { | |
2039 | printk("%s: suspend vbi\n", core->name); | |
2040 | cx8800_stop_vbi_dma(dev); | |
2041 | del_timer(&dev->vbiq.timeout); | |
2042 | } | |
2043 | spin_unlock(&dev->slock); | |
2044 | ||
1da177e4 | 2045 | /* FIXME -- shutdown device */ |
e52e98a7 | 2046 | cx88_shutdown(core); |
1da177e4 LT |
2047 | |
2048 | pci_save_state(pci_dev); | |
2049 | if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) { | |
2050 | pci_disable_device(pci_dev); | |
2051 | dev->state.disabled = 1; | |
2052 | } | |
2053 | return 0; | |
2054 | } | |
2055 | ||
2056 | static int cx8800_resume(struct pci_dev *pci_dev) | |
2057 | { | |
b45009b0 | 2058 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
1da177e4 | 2059 | struct cx88_core *core = dev->core; |
08adb9e2 | 2060 | int err; |
1da177e4 LT |
2061 | |
2062 | if (dev->state.disabled) { | |
08adb9e2 MCC |
2063 | err=pci_enable_device(pci_dev); |
2064 | if (err) { | |
2065 | printk(KERN_ERR "%s: can't enable device\n", | |
2066 | core->name); | |
2067 | return err; | |
2068 | } | |
2069 | ||
1da177e4 LT |
2070 | dev->state.disabled = 0; |
2071 | } | |
08adb9e2 MCC |
2072 | err= pci_set_power_state(pci_dev, PCI_D0); |
2073 | if (err) { | |
2074 | printk(KERN_ERR "%s: can't enable device\n", | |
2075 | core->name); | |
2076 | ||
2077 | pci_disable_device(pci_dev); | |
2078 | dev->state.disabled = 1; | |
2079 | ||
2080 | return err; | |
2081 | } | |
1da177e4 LT |
2082 | pci_restore_state(pci_dev); |
2083 | ||
1da177e4 | 2084 | /* FIXME: re-initialize hardware */ |
e52e98a7 | 2085 | cx88_reset(core); |
1da177e4 LT |
2086 | |
2087 | /* restart video+vbi capture */ | |
2088 | spin_lock(&dev->slock); | |
2089 | if (!list_empty(&dev->vidq.active)) { | |
2090 | printk("%s: resume video\n", core->name); | |
2091 | restart_video_queue(dev,&dev->vidq); | |
2092 | } | |
2093 | if (!list_empty(&dev->vbiq.active)) { | |
2094 | printk("%s: resume vbi\n", core->name); | |
2095 | cx8800_restart_vbi_queue(dev,&dev->vbiq); | |
2096 | } | |
2097 | spin_unlock(&dev->slock); | |
2098 | ||
2099 | return 0; | |
2100 | } | |
17bc98a4 | 2101 | #endif |
1da177e4 LT |
2102 | |
2103 | /* ----------------------------------------------------------- */ | |
2104 | ||
408b664a | 2105 | static struct pci_device_id cx8800_pci_tbl[] = { |
1da177e4 LT |
2106 | { |
2107 | .vendor = 0x14f1, | |
2108 | .device = 0x8800, | |
b45009b0 MCC |
2109 | .subvendor = PCI_ANY_ID, |
2110 | .subdevice = PCI_ANY_ID, | |
1da177e4 LT |
2111 | },{ |
2112 | /* --- end of list --- */ | |
2113 | } | |
2114 | }; | |
2115 | MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl); | |
2116 | ||
2117 | static struct pci_driver cx8800_pci_driver = { | |
b45009b0 MCC |
2118 | .name = "cx8800", |
2119 | .id_table = cx8800_pci_tbl, | |
2120 | .probe = cx8800_initdev, | |
2121 | .remove = __devexit_p(cx8800_finidev), | |
17bc98a4 | 2122 | #ifdef CONFIG_PM |
1da177e4 LT |
2123 | .suspend = cx8800_suspend, |
2124 | .resume = cx8800_resume, | |
17bc98a4 | 2125 | #endif |
1da177e4 LT |
2126 | }; |
2127 | ||
2128 | static int cx8800_init(void) | |
2129 | { | |
2130 | printk(KERN_INFO "cx2388x v4l2 driver version %d.%d.%d loaded\n", | |
2131 | (CX88_VERSION_CODE >> 16) & 0xff, | |
2132 | (CX88_VERSION_CODE >> 8) & 0xff, | |
2133 | CX88_VERSION_CODE & 0xff); | |
2134 | #ifdef SNAPSHOT | |
2135 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | |
2136 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | |
2137 | #endif | |
2138 | return pci_register_driver(&cx8800_pci_driver); | |
2139 | } | |
2140 | ||
2141 | static void cx8800_fini(void) | |
2142 | { | |
2143 | pci_unregister_driver(&cx8800_pci_driver); | |
2144 | } | |
2145 | ||
2146 | module_init(cx8800_init); | |
2147 | module_exit(cx8800_fini); | |
2148 | ||
e52e98a7 MCC |
2149 | EXPORT_SYMBOL(cx88_do_ioctl); |
2150 | ||
1da177e4 LT |
2151 | /* ----------------------------------------------------------- */ |
2152 | /* | |
2153 | * Local variables: | |
2154 | * c-basic-offset: 8 | |
2155 | * End: | |
b45009b0 | 2156 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off |
1da177e4 | 2157 | */ |