V4L/DVB (9822): cs53l32a: convert to v4l2_subdev.
[linux-block.git] / drivers / media / video / cx25840 / cx25840-core.c
CommitLineData
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1/* cx25840 - Conexant CX25840 audio/video decoder driver
2 *
3 * Copyright (C) 2004 Ulf Eklund
4 *
5 * Based on the saa7115 driver and on the first verison of Chris Kennedy's
6 * cx25840 driver.
7 *
8 * Changes by Tyler Trafford <tatrafford@comcast.net>
9 * - cleanup/rewrite for V4L2 API (2005)
10 *
11 * VBI support by Hans Verkuil <hverkuil@xs4all.nl>.
12 *
3e3bf277
CN
13 * NTSC sliced VBI support by Christopher Neufeld <television@cneufeld.ca>
14 * with additional fixes by Hans Verkuil <hverkuil@xs4all.nl>.
15 *
6d897616 16 * CX23885 support by Steven Toth <stoth@linuxtv.org>.
f234081b 17 *
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18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version 2
21 * of the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
31 */
32
33
34#include <linux/kernel.h>
35#include <linux/module.h>
36#include <linux/slab.h>
37#include <linux/videodev2.h>
38#include <linux/i2c.h>
f61b48f7 39#include <linux/delay.h>
bd985160 40#include <media/v4l2-common.h>
3434eb7e 41#include <media/v4l2-chip-ident.h>
1a39275a 42#include <media/v4l2-i2c-drv-legacy.h>
31bc09b5 43#include <media/cx25840.h>
bd985160 44
31bc09b5 45#include "cx25840-core.h"
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46
47MODULE_DESCRIPTION("Conexant CX25840 audio/video decoder driver");
1f4b3365 48MODULE_AUTHOR("Ulf Eklund, Chris Kennedy, Hans Verkuil, Tyler Trafford");
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49MODULE_LICENSE("GPL");
50
51static unsigned short normal_i2c[] = { 0x88 >> 1, I2C_CLIENT_END };
52
fe0d3dff 53static int cx25840_debug;
bd985160 54
b5fc7144 55module_param_named(debug,cx25840_debug, int, 0644);
bd985160 56
fac9e899 57MODULE_PARM_DESC(debug, "Debugging messages [0=Off (default) 1=On]");
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58
59I2C_CLIENT_INSMOD;
60
61/* ----------------------------------------------------------------------- */
62
63int cx25840_write(struct i2c_client *client, u16 addr, u8 value)
64{
65 u8 buffer[3];
66 buffer[0] = addr >> 8;
67 buffer[1] = addr & 0xff;
68 buffer[2] = value;
69 return i2c_master_send(client, buffer, 3);
70}
71
72int cx25840_write4(struct i2c_client *client, u16 addr, u32 value)
73{
74 u8 buffer[6];
75 buffer[0] = addr >> 8;
76 buffer[1] = addr & 0xff;
4a56eb3f
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77 buffer[2] = value & 0xff;
78 buffer[3] = (value >> 8) & 0xff;
79 buffer[4] = (value >> 16) & 0xff;
80 buffer[5] = value >> 24;
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81 return i2c_master_send(client, buffer, 6);
82}
83
84u8 cx25840_read(struct i2c_client * client, u16 addr)
85{
86 u8 buffer[2];
87 buffer[0] = addr >> 8;
88 buffer[1] = addr & 0xff;
89
90 if (i2c_master_send(client, buffer, 2) < 2)
91 return 0;
92
93 if (i2c_master_recv(client, buffer, 1) < 1)
94 return 0;
95
96 return buffer[0];
97}
98
99u32 cx25840_read4(struct i2c_client * client, u16 addr)
100{
101 u8 buffer[4];
102 buffer[0] = addr >> 8;
103 buffer[1] = addr & 0xff;
104
105 if (i2c_master_send(client, buffer, 2) < 2)
106 return 0;
107
108 if (i2c_master_recv(client, buffer, 4) < 4)
109 return 0;
110
17531c16
HV
111 return (buffer[3] << 24) | (buffer[2] << 16) |
112 (buffer[1] << 8) | buffer[0];
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113}
114
e2b8cf4c 115int cx25840_and_or(struct i2c_client *client, u16 addr, unsigned and_mask,
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116 u8 or_value)
117{
118 return cx25840_write(client, addr,
119 (cx25840_read(client, addr) & and_mask) |
120 or_value);
121}
122
123/* ----------------------------------------------------------------------- */
124
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125static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
126 enum cx25840_audio_input aud_input);
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127
128/* ----------------------------------------------------------------------- */
129
d92c20e0 130static void init_dll1(struct i2c_client *client)
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131{
132 /* This is the Hauppauge sequence used to
133 * initialize the Delay Lock Loop 1 (ADC DLL). */
134 cx25840_write(client, 0x159, 0x23);
135 cx25840_write(client, 0x15a, 0x87);
136 cx25840_write(client, 0x15b, 0x06);
38051450 137 udelay(10);
bd985160 138 cx25840_write(client, 0x159, 0xe1);
38051450 139 udelay(10);
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140 cx25840_write(client, 0x15a, 0x86);
141 cx25840_write(client, 0x159, 0xe0);
142 cx25840_write(client, 0x159, 0xe1);
143 cx25840_write(client, 0x15b, 0x10);
144}
145
d92c20e0 146static void init_dll2(struct i2c_client *client)
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147{
148 /* This is the Hauppauge sequence used to
149 * initialize the Delay Lock Loop 2 (ADC DLL). */
150 cx25840_write(client, 0x15d, 0xe3);
151 cx25840_write(client, 0x15e, 0x86);
152 cx25840_write(client, 0x15f, 0x06);
38051450 153 udelay(10);
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154 cx25840_write(client, 0x15d, 0xe1);
155 cx25840_write(client, 0x15d, 0xe0);
156 cx25840_write(client, 0x15d, 0xe1);
157}
158
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159static void cx25836_initialize(struct i2c_client *client)
160{
161 /* reset configuration is described on page 3-77 of the CX25836 datasheet */
162 /* 2. */
163 cx25840_and_or(client, 0x000, ~0x01, 0x01);
164 cx25840_and_or(client, 0x000, ~0x01, 0x00);
165 /* 3a. */
166 cx25840_and_or(client, 0x15a, ~0x70, 0x00);
167 /* 3b. */
168 cx25840_and_or(client, 0x15b, ~0x1e, 0x06);
169 /* 3c. */
170 cx25840_and_or(client, 0x159, ~0x02, 0x02);
171 /* 3d. */
38051450 172 udelay(10);
e2b8cf4c
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173 /* 3e. */
174 cx25840_and_or(client, 0x159, ~0x02, 0x00);
175 /* 3f. */
176 cx25840_and_or(client, 0x159, ~0xc0, 0xc0);
177 /* 3g. */
178 cx25840_and_or(client, 0x159, ~0x01, 0x00);
179 cx25840_and_or(client, 0x159, ~0x01, 0x01);
180 /* 3h. */
181 cx25840_and_or(client, 0x15b, ~0x1e, 0x10);
182}
183
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184static void cx25840_work_handler(struct work_struct *work)
185{
186 struct cx25840_state *state = container_of(work, struct cx25840_state, fw_work);
187 cx25840_loadfw(state->c);
188 wake_up(&state->fw_wait);
189}
190
89fc4eb9 191static void cx25840_initialize(struct i2c_client *client)
bd985160 192{
21340ae0 193 DEFINE_WAIT(wait);
bd985160 194 struct cx25840_state *state = i2c_get_clientdata(client);
21340ae0 195 struct workqueue_struct *q;
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196
197 /* datasheet startup in numbered steps, refer to page 3-77 */
198 /* 2. */
199 cx25840_and_or(client, 0x803, ~0x10, 0x00);
200 /* The default of this register should be 4, but I get 0 instead.
201 * Set this register to 4 manually. */
202 cx25840_write(client, 0x000, 0x04);
203 /* 3. */
204 init_dll1(client);
205 init_dll2(client);
206 cx25840_write(client, 0x136, 0x0a);
207 /* 4. */
208 cx25840_write(client, 0x13c, 0x01);
209 cx25840_write(client, 0x13c, 0x00);
210 /* 5. */
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211 /* Do the firmware load in a work handler to prevent.
212 Otherwise the kernel is blocked waiting for the
213 bit-banging i2c interface to finish uploading the
214 firmware. */
215 INIT_WORK(&state->fw_work, cx25840_work_handler);
216 init_waitqueue_head(&state->fw_wait);
217 q = create_singlethread_workqueue("cx25840_fw");
218 prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
219 queue_work(q, &state->fw_work);
220 schedule();
221 finish_wait(&state->fw_wait, &wait);
222 destroy_workqueue(q);
223
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224 /* 6. */
225 cx25840_write(client, 0x115, 0x8c);
226 cx25840_write(client, 0x116, 0x07);
227 cx25840_write(client, 0x118, 0x02);
228 /* 7. */
229 cx25840_write(client, 0x4a5, 0x80);
230 cx25840_write(client, 0x4a5, 0x00);
231 cx25840_write(client, 0x402, 0x00);
232 /* 8. */
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233 cx25840_and_or(client, 0x401, ~0x18, 0);
234 cx25840_and_or(client, 0x4a2, ~0x10, 0x10);
235 /* steps 8c and 8d are done in change_input() */
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236 /* 10. */
237 cx25840_write(client, 0x8d3, 0x1f);
238 cx25840_write(client, 0x8e3, 0x03);
239
cb5aa1c6 240 cx25840_std_setup(client);
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241
242 /* trial and error says these are needed to get audio */
243 cx25840_write(client, 0x914, 0xa0);
244 cx25840_write(client, 0x918, 0xa0);
245 cx25840_write(client, 0x919, 0x01);
246
247 /* stereo prefered */
248 cx25840_write(client, 0x809, 0x04);
249 /* AC97 shift */
250 cx25840_write(client, 0x8cf, 0x0f);
251
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252 /* (re)set input */
253 set_input(client, state->vid_input, state->aud_input);
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254
255 /* start microcontroller */
256 cx25840_and_or(client, 0x803, ~0x10, 0x10);
257}
258
f234081b
ST
259static void cx23885_initialize(struct i2c_client *client)
260{
261 DEFINE_WAIT(wait);
262 struct cx25840_state *state = i2c_get_clientdata(client);
263 struct workqueue_struct *q;
264
265 /* Internal Reset */
266 cx25840_and_or(client, 0x102, ~0x01, 0x01);
267 cx25840_and_or(client, 0x102, ~0x01, 0x00);
268
269 /* Stop microcontroller */
270 cx25840_and_or(client, 0x803, ~0x10, 0x00);
271
272 /* DIF in reset? */
273 cx25840_write(client, 0x398, 0);
274
275 /* Trust the default xtal, no division */
276 /* This changes for the cx23888 products */
277 cx25840_write(client, 0x2, 0x76);
278
279 /* Bring down the regulator for AUX clk */
280 cx25840_write(client, 0x1, 0x40);
281
282 /* Sys PLL frac */
283 cx25840_write4(client, 0x11c, 0x01d1744c);
284
285 /* Sys PLL int */
286 cx25840_write4(client, 0x118, 0x00000416);
287
288 /* Disable DIF bypass */
289 cx25840_write4(client, 0x33c, 0x00000001);
290
291 /* DIF Src phase inc */
292 cx25840_write4(client, 0x340, 0x0df7df83);
293
294 /* Vid PLL frac */
295 cx25840_write4(client, 0x10c, 0x01b6db7b);
296
297 /* Vid PLL int */
298 cx25840_write4(client, 0x108, 0x00000512);
299
300 /* Luma */
301 cx25840_write4(client, 0x414, 0x00107d12);
302
303 /* Chroma */
304 cx25840_write4(client, 0x420, 0x3d008282);
305
306 /* Aux PLL frac */
307 cx25840_write4(client, 0x114, 0x017dbf48);
308
309 /* Aux PLL int */
310 cx25840_write4(client, 0x110, 0x000a030e);
311
312 /* ADC2 input select */
313 cx25840_write(client, 0x102, 0x10);
314
315 /* VIN1 & VIN5 */
316 cx25840_write(client, 0x103, 0x11);
317
318 /* Enable format auto detect */
319 cx25840_write(client, 0x400, 0);
320 /* Fast subchroma lock */
321 /* White crush, Chroma AGC & Chroma Killer enabled */
322 cx25840_write(client, 0x401, 0xe8);
323
324 /* Select AFE clock pad output source */
325 cx25840_write(client, 0x144, 0x05);
326
327 /* Do the firmware load in a work handler to prevent.
328 Otherwise the kernel is blocked waiting for the
329 bit-banging i2c interface to finish uploading the
330 firmware. */
331 INIT_WORK(&state->fw_work, cx25840_work_handler);
332 init_waitqueue_head(&state->fw_wait);
333 q = create_singlethread_workqueue("cx25840_fw");
334 prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
335 queue_work(q, &state->fw_work);
336 schedule();
337 finish_wait(&state->fw_wait, &wait);
338 destroy_workqueue(q);
339
cb5aa1c6 340 cx25840_std_setup(client);
f234081b
ST
341
342 /* (re)set input */
343 set_input(client, state->vid_input, state->aud_input);
344
345 /* start microcontroller */
346 cx25840_and_or(client, 0x803, ~0x10, 0x10);
347}
348
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349/* ----------------------------------------------------------------------- */
350
cb5aa1c6
HV
351void cx25840_std_setup(struct i2c_client *client)
352{
353 struct cx25840_state *state = i2c_get_clientdata(client);
354 v4l2_std_id std = state->std;
355 int hblank, hactive, burst, vblank, vactive, sc;
356 int vblank656, src_decimation;
357 int luma_lpf, uv_lpf, comb;
358 u32 pll_int, pll_frac, pll_post;
359
360 /* datasheet startup, step 8d */
361 if (std & ~V4L2_STD_NTSC)
362 cx25840_write(client, 0x49f, 0x11);
363 else
364 cx25840_write(client, 0x49f, 0x14);
365
366 if (std & V4L2_STD_625_50) {
367 hblank = 132;
368 hactive = 720;
369 burst = 93;
370 vblank = 36;
371 vactive = 580;
372 vblank656 = 40;
373 src_decimation = 0x21f;
374 luma_lpf = 2;
375
376 if (std & V4L2_STD_SECAM) {
377 uv_lpf = 0;
378 comb = 0;
379 sc = 0x0a425f;
380 } else if (std == V4L2_STD_PAL_Nc) {
381 uv_lpf = 1;
382 comb = 0x20;
383 sc = 556453;
384 } else {
385 uv_lpf = 1;
386 comb = 0x20;
387 sc = 688739;
388 }
389 } else {
390 hactive = 720;
391 hblank = 122;
392 vactive = 487;
393 luma_lpf = 1;
394 uv_lpf = 1;
395
396 src_decimation = 0x21f;
397 if (std == V4L2_STD_PAL_60) {
398 vblank = 26;
399 vblank656 = 26;
400 burst = 0x5b;
401 luma_lpf = 2;
402 comb = 0x20;
403 sc = 688739;
404 } else if (std == V4L2_STD_PAL_M) {
405 vblank = 20;
406 vblank656 = 24;
407 burst = 0x61;
408 comb = 0x20;
409 sc = 555452;
410 } else {
411 vblank = 26;
412 vblank656 = 26;
413 burst = 0x5b;
414 comb = 0x66;
415 sc = 556063;
416 }
417 }
418
419 /* DEBUG: Displays configured PLL frequency */
420 pll_int = cx25840_read(client, 0x108);
421 pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
422 pll_post = cx25840_read(client, 0x109);
423 v4l_dbg(1, cx25840_debug, client,
424 "PLL regs = int: %u, frac: %u, post: %u\n",
425 pll_int, pll_frac, pll_post);
426
427 if (pll_post) {
428 int fin, fsc;
429 int pll = (28636363L * ((((u64)pll_int) << 25L) + pll_frac)) >> 25L;
430
431 pll /= pll_post;
432 v4l_dbg(1, cx25840_debug, client, "PLL = %d.%06d MHz\n",
433 pll / 1000000, pll % 1000000);
434 v4l_dbg(1, cx25840_debug, client, "PLL/8 = %d.%06d MHz\n",
435 pll / 8000000, (pll / 8) % 1000000);
436
437 fin = ((u64)src_decimation * pll) >> 12;
438 v4l_dbg(1, cx25840_debug, client,
439 "ADC Sampling freq = %d.%06d MHz\n",
440 fin / 1000000, fin % 1000000);
441
442 fsc = (((u64)sc) * pll) >> 24L;
443 v4l_dbg(1, cx25840_debug, client,
444 "Chroma sub-carrier freq = %d.%06d MHz\n",
445 fsc / 1000000, fsc % 1000000);
446
447 v4l_dbg(1, cx25840_debug, client, "hblank %i, hactive %i, "
448 "vblank %i, vactive %i, vblank656 %i, src_dec %i, "
449 "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x, "
450 "sc 0x%06x\n",
451 hblank, hactive, vblank, vactive, vblank656,
452 src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
453 }
454
455 /* Sets horizontal blanking delay and active lines */
456 cx25840_write(client, 0x470, hblank);
457 cx25840_write(client, 0x471,
458 0xff & (((hblank >> 8) & 0x3) | (hactive << 4)));
459 cx25840_write(client, 0x472, hactive >> 4);
460
461 /* Sets burst gate delay */
462 cx25840_write(client, 0x473, burst);
463
464 /* Sets vertical blanking delay and active duration */
465 cx25840_write(client, 0x474, vblank);
466 cx25840_write(client, 0x475,
467 0xff & (((vblank >> 8) & 0x3) | (vactive << 4)));
468 cx25840_write(client, 0x476, vactive >> 4);
469 cx25840_write(client, 0x477, vblank656);
470
471 /* Sets src decimation rate */
472 cx25840_write(client, 0x478, 0xff & src_decimation);
473 cx25840_write(client, 0x479, 0xff & (src_decimation >> 8));
474
475 /* Sets Luma and UV Low pass filters */
476 cx25840_write(client, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
477
478 /* Enables comb filters */
479 cx25840_write(client, 0x47b, comb);
480
481 /* Sets SC Step*/
482 cx25840_write(client, 0x47c, sc);
483 cx25840_write(client, 0x47d, 0xff & sc >> 8);
484 cx25840_write(client, 0x47e, 0xff & sc >> 16);
485
486 /* Sets VBI parameters */
487 if (std & V4L2_STD_625_50) {
488 cx25840_write(client, 0x47f, 0x01);
489 state->vbi_line_offset = 5;
490 } else {
491 cx25840_write(client, 0x47f, 0x00);
492 state->vbi_line_offset = 8;
493 }
494}
495
496/* ----------------------------------------------------------------------- */
497
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HV
498static void input_change(struct i2c_client *client)
499{
f95006f8 500 struct cx25840_state *state = i2c_get_clientdata(client);
081b496a 501 v4l2_std_id std = state->std;
bd985160 502
73dcddc5
HV
503 /* Follow step 8c and 8d of section 3.16 in the cx25840 datasheet */
504 if (std & V4L2_STD_SECAM) {
505 cx25840_write(client, 0x402, 0);
506 }
507 else {
508 cx25840_write(client, 0x402, 0x04);
509 cx25840_write(client, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
510 }
511 cx25840_and_or(client, 0x401, ~0x60, 0);
512 cx25840_and_or(client, 0x401, ~0x60, 0x60);
82677618 513 cx25840_and_or(client, 0x810, ~0x01, 1);
73dcddc5 514
39c4ad6a
HV
515 if (state->radio) {
516 cx25840_write(client, 0x808, 0xf9);
517 cx25840_write(client, 0x80b, 0x00);
518 }
519 else if (std & V4L2_STD_525_60) {
d97a11e0
HV
520 /* Certain Hauppauge PVR150 models have a hardware bug
521 that causes audio to drop out. For these models the
522 audio standard must be set explicitly.
523 To be precise: it affects cards with tuner models
524 85, 99 and 112 (model numbers from tveeprom). */
525 int hw_fix = state->pvr150_workaround;
526
527 if (std == V4L2_STD_NTSC_M_JP) {
f95006f8 528 /* Japan uses EIAJ audio standard */
d97a11e0
HV
529 cx25840_write(client, 0x808, hw_fix ? 0x2f : 0xf7);
530 } else if (std == V4L2_STD_NTSC_M_KR) {
531 /* South Korea uses A2 audio standard */
532 cx25840_write(client, 0x808, hw_fix ? 0x3f : 0xf8);
f95006f8
HV
533 } else {
534 /* Others use the BTSC audio standard */
d97a11e0 535 cx25840_write(client, 0x808, hw_fix ? 0x1f : 0xf6);
f95006f8 536 }
bd985160 537 cx25840_write(client, 0x80b, 0x00);
839e4a4a
MCC
538 } else if (std & V4L2_STD_PAL) {
539 /* Follow tuner change procedure for PAL */
540 cx25840_write(client, 0x808, 0xff);
541 cx25840_write(client, 0x80b, 0x10);
542 } else if (std & V4L2_STD_SECAM) {
543 /* Select autodetect for SECAM */
544 cx25840_write(client, 0x808, 0xff);
545 cx25840_write(client, 0x80b, 0x10);
bd985160
HV
546 }
547
82677618 548 cx25840_and_or(client, 0x810, ~0x01, 0);
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HV
549}
550
a8bbf12a
HV
551static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
552 enum cx25840_audio_input aud_input)
bd985160
HV
553{
554 struct cx25840_state *state = i2c_get_clientdata(client);
a8bbf12a
HV
555 u8 is_composite = (vid_input >= CX25840_COMPOSITE1 &&
556 vid_input <= CX25840_COMPOSITE8);
557 u8 reg;
bd985160 558
f234081b
ST
559 v4l_dbg(1, cx25840_debug, client,
560 "decoder set video input %d, audio input %d\n",
561 vid_input, aud_input);
bd985160 562
f234081b
ST
563 if (vid_input >= CX25840_VIN1_CH1) {
564 v4l_dbg(1, cx25840_debug, client, "vid_input 0x%x\n",
565 vid_input);
566 reg = vid_input & 0xff;
567 if ((vid_input & CX25840_SVIDEO_ON) == CX25840_SVIDEO_ON)
568 is_composite = 0;
569 else
570 is_composite = 1;
571
572 v4l_dbg(1, cx25840_debug, client, "mux cfg 0x%x comp=%d\n",
573 reg, is_composite);
574 } else
a8bbf12a
HV
575 if (is_composite) {
576 reg = 0xf0 + (vid_input - CX25840_COMPOSITE1);
577 } else {
578 int luma = vid_input & 0xf0;
579 int chroma = vid_input & 0xf00;
bd985160 580
a8bbf12a 581 if ((vid_input & ~0xff0) ||
45270a15 582 luma < CX25840_SVIDEO_LUMA1 || luma > CX25840_SVIDEO_LUMA8 ||
a8bbf12a 583 chroma < CX25840_SVIDEO_CHROMA4 || chroma > CX25840_SVIDEO_CHROMA8) {
f234081b
ST
584 v4l_err(client, "0x%04x is not a valid video input!\n",
585 vid_input);
a8bbf12a 586 return -EINVAL;
bd985160 587 }
a8bbf12a
HV
588 reg = 0xf0 + ((luma - CX25840_SVIDEO_LUMA1) >> 4);
589 if (chroma >= CX25840_SVIDEO_CHROMA7) {
590 reg &= 0x3f;
591 reg |= (chroma - CX25840_SVIDEO_CHROMA7) >> 2;
bd985160 592 } else {
a8bbf12a
HV
593 reg &= 0xcf;
594 reg |= (chroma - CX25840_SVIDEO_CHROMA4) >> 4;
bd985160 595 }
a8bbf12a 596 }
bd985160 597
f234081b
ST
598 /* The caller has previously prepared the correct routing
599 * configuration in reg (for the cx23885) so we have no
600 * need to attempt to flip bits for earlier av decoders.
601 */
602 if (!state->is_cx23885) {
603 switch (aud_input) {
604 case CX25840_AUDIO_SERIAL:
605 /* do nothing, use serial audio input */
606 break;
607 case CX25840_AUDIO4: reg &= ~0x30; break;
608 case CX25840_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
609 case CX25840_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
610 case CX25840_AUDIO7: reg &= ~0xc0; break;
611 case CX25840_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
bd985160 612
f234081b
ST
613 default:
614 v4l_err(client, "0x%04x is not a valid audio input!\n",
615 aud_input);
616 return -EINVAL;
617 }
bd985160
HV
618 }
619
a8bbf12a 620 cx25840_write(client, 0x103, reg);
f234081b 621
a8bbf12a
HV
622 /* Set INPUT_MODE to Composite (0) or S-Video (1) */
623 cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
f234081b
ST
624
625 if (!state->is_cx23885) {
626 /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
627 cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
628 /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2&CH3 */
629 if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
630 cx25840_and_or(client, 0x102, ~0x4, 4);
631 else
632 cx25840_and_or(client, 0x102, ~0x4, 0);
633 } else {
634 if (is_composite)
635 /* ADC2 input select channel 2 */
636 cx25840_and_or(client, 0x102, ~0x2, 0);
637 else
638 /* ADC2 input select channel 3 */
639 cx25840_and_or(client, 0x102, ~0x2, 2);
640 }
a8bbf12a
HV
641
642 state->vid_input = vid_input;
643 state->aud_input = aud_input;
e2b8cf4c
HV
644 if (!state->is_cx25836) {
645 cx25840_audio_set_path(client);
646 input_change(client);
647 }
f234081b
ST
648
649 if (state->is_cx23885) {
650 /* Audio channel 1 src : Parallel 1 */
651 cx25840_write(client, 0x124, 0x03);
652
653 /* Select AFE clock pad output source */
654 cx25840_write(client, 0x144, 0x05);
655
656 /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
657 cx25840_write(client, 0x914, 0xa0);
658
659 /* I2S_OUT_CTL:
660 * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
661 * I2S_OUT_MASTER_MODE = Master
662 */
663 cx25840_write(client, 0x918, 0xa0);
664 cx25840_write(client, 0x919, 0x01);
665 }
666
bd985160
HV
667 return 0;
668}
669
670/* ----------------------------------------------------------------------- */
671
081b496a 672static int set_v4lstd(struct i2c_client *client)
bd985160 673{
081b496a
HV
674 struct cx25840_state *state = i2c_get_clientdata(client);
675 u8 fmt = 0; /* zero is autodetect */
676 u8 pal_m = 0;
468a0a54
MCC
677
678 /* First tests should be against specific std */
081b496a
HV
679 if (state->std == V4L2_STD_NTSC_M_JP) {
680 fmt = 0x2;
681 } else if (state->std == V4L2_STD_NTSC_443) {
682 fmt = 0x3;
683 } else if (state->std == V4L2_STD_PAL_M) {
684 pal_m = 1;
685 fmt = 0x5;
686 } else if (state->std == V4L2_STD_PAL_N) {
687 fmt = 0x6;
688 } else if (state->std == V4L2_STD_PAL_Nc) {
689 fmt = 0x7;
690 } else if (state->std == V4L2_STD_PAL_60) {
691 fmt = 0x8;
468a0a54
MCC
692 } else {
693 /* Then, test against generic ones */
081b496a
HV
694 if (state->std & V4L2_STD_NTSC)
695 fmt = 0x1;
696 else if (state->std & V4L2_STD_PAL)
697 fmt = 0x4;
698 else if (state->std & V4L2_STD_SECAM)
699 fmt = 0xc;
bd985160
HV
700 }
701
839e4a4a
MCC
702 v4l_dbg(1, cx25840_debug, client, "changing video std to fmt %i\n",fmt);
703
73dcddc5
HV
704 /* Follow step 9 of section 3.16 in the cx25840 datasheet.
705 Without this PAL may display a vertical ghosting effect.
706 This happens for example with the Yuan MPC622. */
707 if (fmt >= 4 && fmt < 8) {
708 /* Set format to NTSC-M */
709 cx25840_and_or(client, 0x400, ~0xf, 1);
710 /* Turn off LCOMB */
711 cx25840_and_or(client, 0x47b, ~6, 0);
712 }
bd985160 713 cx25840_and_or(client, 0x400, ~0xf, fmt);
081b496a 714 cx25840_and_or(client, 0x403, ~0x3, pal_m);
cb5aa1c6 715 cx25840_std_setup(client);
081b496a
HV
716 if (!state->is_cx25836)
717 input_change(client);
bd985160
HV
718 return 0;
719}
720
bd985160
HV
721/* ----------------------------------------------------------------------- */
722
723static int set_v4lctrl(struct i2c_client *client, struct v4l2_control *ctrl)
724{
725 struct cx25840_state *state = i2c_get_clientdata(client);
726
727 switch (ctrl->id) {
a8bbf12a
HV
728 case CX25840_CID_ENABLE_PVR150_WORKAROUND:
729 state->pvr150_workaround = ctrl->value;
730 set_input(client, state->vid_input, state->aud_input);
bd985160
HV
731 break;
732
733 case V4L2_CID_BRIGHTNESS:
734 if (ctrl->value < 0 || ctrl->value > 255) {
fac9e899 735 v4l_err(client, "invalid brightness setting %d\n",
bd985160
HV
736 ctrl->value);
737 return -ERANGE;
738 }
739
740 cx25840_write(client, 0x414, ctrl->value - 128);
741 break;
742
743 case V4L2_CID_CONTRAST:
744 if (ctrl->value < 0 || ctrl->value > 127) {
fac9e899 745 v4l_err(client, "invalid contrast setting %d\n",
bd985160
HV
746 ctrl->value);
747 return -ERANGE;
748 }
749
750 cx25840_write(client, 0x415, ctrl->value << 1);
751 break;
752
753 case V4L2_CID_SATURATION:
754 if (ctrl->value < 0 || ctrl->value > 127) {
fac9e899 755 v4l_err(client, "invalid saturation setting %d\n",
bd985160
HV
756 ctrl->value);
757 return -ERANGE;
758 }
759
760 cx25840_write(client, 0x420, ctrl->value << 1);
761 cx25840_write(client, 0x421, ctrl->value << 1);
762 break;
763
764 case V4L2_CID_HUE:
765 if (ctrl->value < -127 || ctrl->value > 127) {
fac9e899 766 v4l_err(client, "invalid hue setting %d\n", ctrl->value);
bd985160
HV
767 return -ERANGE;
768 }
769
770 cx25840_write(client, 0x422, ctrl->value);
771 break;
772
773 case V4L2_CID_AUDIO_VOLUME:
774 case V4L2_CID_AUDIO_BASS:
775 case V4L2_CID_AUDIO_TREBLE:
776 case V4L2_CID_AUDIO_BALANCE:
777 case V4L2_CID_AUDIO_MUTE:
e2b8cf4c
HV
778 if (state->is_cx25836)
779 return -EINVAL;
bd985160 780 return cx25840_audio(client, VIDIOC_S_CTRL, ctrl);
3faeeae4
HV
781
782 default:
783 return -EINVAL;
bd985160
HV
784 }
785
786 return 0;
787}
788
789static int get_v4lctrl(struct i2c_client *client, struct v4l2_control *ctrl)
790{
791 struct cx25840_state *state = i2c_get_clientdata(client);
792
793 switch (ctrl->id) {
a8bbf12a
HV
794 case CX25840_CID_ENABLE_PVR150_WORKAROUND:
795 ctrl->value = state->pvr150_workaround;
bd985160
HV
796 break;
797 case V4L2_CID_BRIGHTNESS:
0de71224 798 ctrl->value = (s8)cx25840_read(client, 0x414) + 128;
bd985160
HV
799 break;
800 case V4L2_CID_CONTRAST:
801 ctrl->value = cx25840_read(client, 0x415) >> 1;
802 break;
803 case V4L2_CID_SATURATION:
804 ctrl->value = cx25840_read(client, 0x420) >> 1;
805 break;
806 case V4L2_CID_HUE:
c5099a64 807 ctrl->value = (s8)cx25840_read(client, 0x422);
bd985160
HV
808 break;
809 case V4L2_CID_AUDIO_VOLUME:
810 case V4L2_CID_AUDIO_BASS:
811 case V4L2_CID_AUDIO_TREBLE:
812 case V4L2_CID_AUDIO_BALANCE:
813 case V4L2_CID_AUDIO_MUTE:
e2b8cf4c
HV
814 if (state->is_cx25836)
815 return -EINVAL;
bd985160
HV
816 return cx25840_audio(client, VIDIOC_G_CTRL, ctrl);
817 default:
818 return -EINVAL;
819 }
820
821 return 0;
822}
823
824/* ----------------------------------------------------------------------- */
825
826static int get_v4lfmt(struct i2c_client *client, struct v4l2_format *fmt)
827{
828 switch (fmt->type) {
829 case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
830 return cx25840_vbi(client, VIDIOC_G_FMT, fmt);
831 default:
832 return -EINVAL;
833 }
834
835 return 0;
836}
837
838static int set_v4lfmt(struct i2c_client *client, struct v4l2_format *fmt)
839{
081b496a 840 struct cx25840_state *state = i2c_get_clientdata(client);
bd985160
HV
841 struct v4l2_pix_format *pix;
842 int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
081b496a 843 int is_50Hz = !(state->std & V4L2_STD_525_60);
bd985160
HV
844
845 switch (fmt->type) {
846 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
847 pix = &(fmt->fmt.pix);
848
849 Vsrc = (cx25840_read(client, 0x476) & 0x3f) << 4;
850 Vsrc |= (cx25840_read(client, 0x475) & 0xf0) >> 4;
851
852 Hsrc = (cx25840_read(client, 0x472) & 0x3f) << 4;
853 Hsrc |= (cx25840_read(client, 0x471) & 0xf0) >> 4;
854
ba70d59b 855 Vlines = pix->height + (is_50Hz ? 4 : 7);
bd985160
HV
856
857 if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
858 (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
fac9e899 859 v4l_err(client, "%dx%d is not a valid size!\n",
bd985160
HV
860 pix->width, pix->height);
861 return -ERANGE;
862 }
863
864 HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
865 VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
866 VSC &= 0x1fff;
867
868 if (pix->width >= 385)
869 filter = 0;
870 else if (pix->width > 192)
871 filter = 1;
872 else if (pix->width > 96)
873 filter = 2;
874 else
875 filter = 3;
876
b5fc7144 877 v4l_dbg(1, cx25840_debug, client, "decoder set size %dx%d -> scale %ux%u\n",
bd985160
HV
878 pix->width, pix->height, HSC, VSC);
879
880 /* HSCALE=HSC */
881 cx25840_write(client, 0x418, HSC & 0xff);
882 cx25840_write(client, 0x419, (HSC >> 8) & 0xff);
883 cx25840_write(client, 0x41a, HSC >> 16);
884 /* VSCALE=VSC */
885 cx25840_write(client, 0x41c, VSC & 0xff);
886 cx25840_write(client, 0x41d, VSC >> 8);
887 /* VS_INTRLACE=1 VFILT=filter */
888 cx25840_write(client, 0x41e, 0x8 | filter);
889 break;
890
891 case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
892 return cx25840_vbi(client, VIDIOC_S_FMT, fmt);
893
894 case V4L2_BUF_TYPE_VBI_CAPTURE:
895 return cx25840_vbi(client, VIDIOC_S_FMT, fmt);
896
897 default:
898 return -EINVAL;
899 }
900
901 return 0;
902}
903
904/* ----------------------------------------------------------------------- */
905
1a39275a
HV
906static void log_video_status(struct i2c_client *client)
907{
908 static const char *const fmt_strs[] = {
909 "0x0",
910 "NTSC-M", "NTSC-J", "NTSC-4.43",
911 "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
912 "0x9", "0xA", "0xB",
913 "SECAM",
914 "0xD", "0xE", "0xF"
915 };
916
917 struct cx25840_state *state = i2c_get_clientdata(client);
918 u8 vidfmt_sel = cx25840_read(client, 0x400) & 0xf;
919 u8 gen_stat1 = cx25840_read(client, 0x40d);
920 u8 gen_stat2 = cx25840_read(client, 0x40e);
921 int vid_input = state->vid_input;
922
923 v4l_info(client, "Video signal: %spresent\n",
924 (gen_stat2 & 0x20) ? "" : "not ");
925 v4l_info(client, "Detected format: %s\n",
926 fmt_strs[gen_stat1 & 0xf]);
927
928 v4l_info(client, "Specified standard: %s\n",
929 vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
930
931 if (vid_input >= CX25840_COMPOSITE1 &&
932 vid_input <= CX25840_COMPOSITE8) {
933 v4l_info(client, "Specified video input: Composite %d\n",
934 vid_input - CX25840_COMPOSITE1 + 1);
935 } else {
936 v4l_info(client, "Specified video input: S-Video (Luma In%d, Chroma In%d)\n",
937 (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
938 }
939
940 v4l_info(client, "Specified audioclock freq: %d Hz\n", state->audclk_freq);
941}
942
943/* ----------------------------------------------------------------------- */
944
945static void log_audio_status(struct i2c_client *client)
946{
947 struct cx25840_state *state = i2c_get_clientdata(client);
948 u8 download_ctl = cx25840_read(client, 0x803);
949 u8 mod_det_stat0 = cx25840_read(client, 0x804);
950 u8 mod_det_stat1 = cx25840_read(client, 0x805);
951 u8 audio_config = cx25840_read(client, 0x808);
952 u8 pref_mode = cx25840_read(client, 0x809);
953 u8 afc0 = cx25840_read(client, 0x80b);
954 u8 mute_ctl = cx25840_read(client, 0x8d3);
955 int aud_input = state->aud_input;
956 char *p;
957
958 switch (mod_det_stat0) {
959 case 0x00: p = "mono"; break;
960 case 0x01: p = "stereo"; break;
961 case 0x02: p = "dual"; break;
962 case 0x04: p = "tri"; break;
963 case 0x10: p = "mono with SAP"; break;
964 case 0x11: p = "stereo with SAP"; break;
965 case 0x12: p = "dual with SAP"; break;
966 case 0x14: p = "tri with SAP"; break;
967 case 0xfe: p = "forced mode"; break;
968 default: p = "not defined";
969 }
970 v4l_info(client, "Detected audio mode: %s\n", p);
971
972 switch (mod_det_stat1) {
973 case 0x00: p = "not defined"; break;
974 case 0x01: p = "EIAJ"; break;
975 case 0x02: p = "A2-M"; break;
976 case 0x03: p = "A2-BG"; break;
977 case 0x04: p = "A2-DK1"; break;
978 case 0x05: p = "A2-DK2"; break;
979 case 0x06: p = "A2-DK3"; break;
980 case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
981 case 0x08: p = "AM-L"; break;
982 case 0x09: p = "NICAM-BG"; break;
983 case 0x0a: p = "NICAM-DK"; break;
984 case 0x0b: p = "NICAM-I"; break;
985 case 0x0c: p = "NICAM-L"; break;
986 case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
987 case 0x0e: p = "IF FM Radio"; break;
988 case 0x0f: p = "BTSC"; break;
989 case 0x10: p = "high-deviation FM"; break;
990 case 0x11: p = "very high-deviation FM"; break;
991 case 0xfd: p = "unknown audio standard"; break;
992 case 0xfe: p = "forced audio standard"; break;
993 case 0xff: p = "no detected audio standard"; break;
994 default: p = "not defined";
995 }
996 v4l_info(client, "Detected audio standard: %s\n", p);
997 v4l_info(client, "Audio muted: %s\n",
998 (state->unmute_volume >= 0) ? "yes" : "no");
999 v4l_info(client, "Audio microcontroller: %s\n",
1000 (download_ctl & 0x10) ?
1001 ((mute_ctl & 0x2) ? "detecting" : "running") : "stopped");
1002
1003 switch (audio_config >> 4) {
1004 case 0x00: p = "undefined"; break;
1005 case 0x01: p = "BTSC"; break;
1006 case 0x02: p = "EIAJ"; break;
1007 case 0x03: p = "A2-M"; break;
1008 case 0x04: p = "A2-BG"; break;
1009 case 0x05: p = "A2-DK1"; break;
1010 case 0x06: p = "A2-DK2"; break;
1011 case 0x07: p = "A2-DK3"; break;
1012 case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
1013 case 0x09: p = "AM-L"; break;
1014 case 0x0a: p = "NICAM-BG"; break;
1015 case 0x0b: p = "NICAM-DK"; break;
1016 case 0x0c: p = "NICAM-I"; break;
1017 case 0x0d: p = "NICAM-L"; break;
1018 case 0x0e: p = "FM radio"; break;
1019 case 0x0f: p = "automatic detection"; break;
1020 default: p = "undefined";
1021 }
1022 v4l_info(client, "Configured audio standard: %s\n", p);
1023
1024 if ((audio_config >> 4) < 0xF) {
1025 switch (audio_config & 0xF) {
1026 case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
1027 case 0x01: p = "MONO2 (LANGUAGE B)"; break;
1028 case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
1029 case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
1030 case 0x04: p = "STEREO"; break;
1031 case 0x05: p = "DUAL1 (AB)"; break;
1032 case 0x06: p = "DUAL2 (AC) (FM)"; break;
1033 case 0x07: p = "DUAL3 (BC) (FM)"; break;
1034 case 0x08: p = "DUAL4 (AC) (AM)"; break;
1035 case 0x09: p = "DUAL5 (BC) (AM)"; break;
1036 case 0x0a: p = "SAP"; break;
1037 default: p = "undefined";
1038 }
1039 v4l_info(client, "Configured audio mode: %s\n", p);
1040 } else {
1041 switch (audio_config & 0xF) {
1042 case 0x00: p = "BG"; break;
1043 case 0x01: p = "DK1"; break;
1044 case 0x02: p = "DK2"; break;
1045 case 0x03: p = "DK3"; break;
1046 case 0x04: p = "I"; break;
1047 case 0x05: p = "L"; break;
1048 case 0x06: p = "BTSC"; break;
1049 case 0x07: p = "EIAJ"; break;
1050 case 0x08: p = "A2-M"; break;
1051 case 0x09: p = "FM Radio"; break;
1052 case 0x0f: p = "automatic standard and mode detection"; break;
1053 default: p = "undefined";
1054 }
1055 v4l_info(client, "Configured audio system: %s\n", p);
1056 }
1057
1058 if (aud_input) {
1059 v4l_info(client, "Specified audio input: Tuner (In%d)\n", aud_input);
1060 } else {
1061 v4l_info(client, "Specified audio input: External\n");
1062 }
1063
1064 switch (pref_mode & 0xf) {
1065 case 0: p = "mono/language A"; break;
1066 case 1: p = "language B"; break;
1067 case 2: p = "language C"; break;
1068 case 3: p = "analog fallback"; break;
1069 case 4: p = "stereo"; break;
1070 case 5: p = "language AC"; break;
1071 case 6: p = "language BC"; break;
1072 case 7: p = "language AB"; break;
1073 default: p = "undefined";
1074 }
1075 v4l_info(client, "Preferred audio mode: %s\n", p);
1076
1077 if ((audio_config & 0xf) == 0xf) {
1078 switch ((afc0 >> 3) & 0x3) {
1079 case 0: p = "system DK"; break;
1080 case 1: p = "system L"; break;
1081 case 2: p = "autodetect"; break;
1082 default: p = "undefined";
1083 }
1084 v4l_info(client, "Selected 65 MHz format: %s\n", p);
1085
1086 switch (afc0 & 0x7) {
1087 case 0: p = "chroma"; break;
1088 case 1: p = "BTSC"; break;
1089 case 2: p = "EIAJ"; break;
1090 case 3: p = "A2-M"; break;
1091 case 4: p = "autodetect"; break;
1092 default: p = "undefined";
1093 }
1094 v4l_info(client, "Selected 45 MHz format: %s\n", p);
1095 }
1096}
1097
1098/* ----------------------------------------------------------------------- */
1099
bd985160
HV
1100static int cx25840_command(struct i2c_client *client, unsigned int cmd,
1101 void *arg)
1102{
1103 struct cx25840_state *state = i2c_get_clientdata(client);
1104 struct v4l2_tuner *vt = arg;
31bc09b5 1105 struct v4l2_routing *route = arg;
bd985160 1106
c976bc82
HV
1107 /* ignore these commands */
1108 switch (cmd) {
1109 case TUNER_SET_TYPE_ADDR:
1110 return 0;
1111 }
1112
1113 if (!state->is_initialized) {
1114 v4l_dbg(1, cx25840_debug, client, "cmd %08x triggered fw load\n", cmd);
1115 /* initialize on first use */
1116 state->is_initialized = 1;
1117 if (state->is_cx25836)
1118 cx25836_initialize(client);
f234081b
ST
1119 else if (state->is_cx23885)
1120 cx23885_initialize(client);
c976bc82 1121 else
89fc4eb9 1122 cx25840_initialize(client);
c976bc82
HV
1123 }
1124
bd985160 1125 switch (cmd) {
bd985160
HV
1126#ifdef CONFIG_VIDEO_ADV_DEBUG
1127 /* ioctls to allow direct access to the
1128 * cx25840 registers for testing */
52ebc763 1129 case VIDIOC_DBG_G_REGISTER:
52ebc763 1130 case VIDIOC_DBG_S_REGISTER:
bd985160
HV
1131 {
1132 struct v4l2_register *reg = arg;
1133
f3d092b8 1134 if (!v4l2_chip_match_i2c_client(client, reg->match_type, reg->match_chip))
bd985160
HV
1135 return -EINVAL;
1136 if (!capable(CAP_SYS_ADMIN))
1137 return -EPERM;
f234081b 1138
62d50add
TP
1139 if (cmd == VIDIOC_DBG_G_REGISTER)
1140 reg->val = cx25840_read(client, reg->reg & 0x0fff);
1141 else
1142 cx25840_write(client, reg->reg & 0x0fff, reg->val & 0xff);
bd985160
HV
1143 break;
1144 }
1145#endif
1146
1147 case VIDIOC_INT_DECODE_VBI_LINE:
1148 return cx25840_vbi(client, cmd, arg);
1149
1150 case VIDIOC_INT_AUDIO_CLOCK_FREQ:
3faeeae4 1151 return cx25840_audio(client, cmd, arg);
bd985160
HV
1152
1153 case VIDIOC_STREAMON:
b5fc7144 1154 v4l_dbg(1, cx25840_debug, client, "enable output\n");
f234081b
ST
1155 if (state->is_cx23885) {
1156 u8 v = (cx25840_read(client, 0x421) | 0x0b);
1157 cx25840_write(client, 0x421, v);
1158 } else {
1159 cx25840_write(client, 0x115,
1160 state->is_cx25836 ? 0x0c : 0x8c);
1161 cx25840_write(client, 0x116,
1162 state->is_cx25836 ? 0x04 : 0x07);
1163 }
bd985160
HV
1164 break;
1165
1166 case VIDIOC_STREAMOFF:
b5fc7144 1167 v4l_dbg(1, cx25840_debug, client, "disable output\n");
f234081b
ST
1168 if (state->is_cx23885) {
1169 u8 v = cx25840_read(client, 0x421) & ~(0x0b);
1170 cx25840_write(client, 0x421, v);
1171 } else {
1172 cx25840_write(client, 0x115, 0x00);
1173 cx25840_write(client, 0x116, 0x00);
1174 }
bd985160
HV
1175 break;
1176
1177 case VIDIOC_LOG_STATUS:
e2b8cf4c
HV
1178 log_video_status(client);
1179 if (!state->is_cx25836)
1180 log_audio_status(client);
bd985160
HV
1181 break;
1182
1183 case VIDIOC_G_CTRL:
3faeeae4 1184 return get_v4lctrl(client, (struct v4l2_control *)arg);
bd985160
HV
1185
1186 case VIDIOC_S_CTRL:
3faeeae4 1187 return set_v4lctrl(client, (struct v4l2_control *)arg);
bd985160 1188
d92c20e0
HV
1189 case VIDIOC_QUERYCTRL:
1190 {
1191 struct v4l2_queryctrl *qc = arg;
d92c20e0 1192
18318e00
HV
1193 switch (qc->id) {
1194 case V4L2_CID_BRIGHTNESS:
1195 case V4L2_CID_CONTRAST:
1196 case V4L2_CID_SATURATION:
1197 case V4L2_CID_HUE:
1198 return v4l2_ctrl_query_fill_std(qc);
1199 default:
1200 break;
1201 }
e2b8cf4c
HV
1202 if (state->is_cx25836)
1203 return -EINVAL;
1204
18318e00
HV
1205 switch (qc->id) {
1206 case V4L2_CID_AUDIO_VOLUME:
ca130eef
HV
1207 return v4l2_ctrl_query_fill(qc, 0, 65535,
1208 65535 / 100, state->default_volume);
18318e00
HV
1209 case V4L2_CID_AUDIO_MUTE:
1210 case V4L2_CID_AUDIO_BALANCE:
1211 case V4L2_CID_AUDIO_BASS:
1212 case V4L2_CID_AUDIO_TREBLE:
1213 return v4l2_ctrl_query_fill_std(qc);
1214 default:
1215 return -EINVAL;
1216 }
d92c20e0
HV
1217 return -EINVAL;
1218 }
1219
bd985160 1220 case VIDIOC_G_STD:
081b496a 1221 *(v4l2_std_id *)arg = state->std;
bd985160
HV
1222 break;
1223
1224 case VIDIOC_S_STD:
081b496a
HV
1225 if (state->radio == 0 && state->std == *(v4l2_std_id *)arg)
1226 return 0;
3faeeae4 1227 state->radio = 0;
081b496a
HV
1228 state->std = *(v4l2_std_id *)arg;
1229 return set_v4lstd(client);
3faeeae4
HV
1230
1231 case AUDC_SET_RADIO:
1232 state->radio = 1;
bd985160
HV
1233 break;
1234
31bc09b5
HV
1235 case VIDIOC_INT_G_VIDEO_ROUTING:
1236 route->input = state->vid_input;
1237 route->output = 0;
bd985160
HV
1238 break;
1239
31bc09b5
HV
1240 case VIDIOC_INT_S_VIDEO_ROUTING:
1241 return set_input(client, route->input, state->aud_input);
bd985160 1242
31bc09b5 1243 case VIDIOC_INT_G_AUDIO_ROUTING:
e2b8cf4c
HV
1244 if (state->is_cx25836)
1245 return -EINVAL;
31bc09b5
HV
1246 route->input = state->aud_input;
1247 route->output = 0;
1248 break;
a8bbf12a 1249
31bc09b5 1250 case VIDIOC_INT_S_AUDIO_ROUTING:
e2b8cf4c
HV
1251 if (state->is_cx25836)
1252 return -EINVAL;
31bc09b5 1253 return set_input(client, state->vid_input, route->input);
a8bbf12a 1254
bd985160 1255 case VIDIOC_S_FREQUENCY:
e2b8cf4c
HV
1256 if (!state->is_cx25836) {
1257 input_change(client);
1258 }
bd985160
HV
1259 break;
1260
1261 case VIDIOC_G_TUNER:
1262 {
e2b8cf4c
HV
1263 u8 vpres = cx25840_read(client, 0x40e) & 0x20;
1264 u8 mode;
bd985160
HV
1265 int val = 0;
1266
3faeeae4
HV
1267 if (state->radio)
1268 break;
1269
e2b8cf4c
HV
1270 vt->signal = vpres ? 0xffff : 0x0;
1271 if (state->is_cx25836)
1272 break;
1273
bd985160
HV
1274 vt->capability |=
1275 V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
1276 V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
1277
e2b8cf4c 1278 mode = cx25840_read(client, 0x804);
bd985160
HV
1279
1280 /* get rxsubchans and audmode */
1281 if ((mode & 0xf) == 1)
1282 val |= V4L2_TUNER_SUB_STEREO;
1283 else
1284 val |= V4L2_TUNER_SUB_MONO;
1285
1286 if (mode == 2 || mode == 4)
8a4b275f 1287 val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
bd985160
HV
1288
1289 if (mode & 0x10)
1290 val |= V4L2_TUNER_SUB_SAP;
1291
1292 vt->rxsubchans = val;
8a4b275f 1293 vt->audmode = state->audmode;
bd985160
HV
1294 break;
1295 }
1296
1297 case VIDIOC_S_TUNER:
e2b8cf4c 1298 if (state->radio || state->is_cx25836)
8a4b275f
HV
1299 break;
1300
bd985160
HV
1301 switch (vt->audmode) {
1302 case V4L2_TUNER_MODE_MONO:
8a4b275f
HV
1303 /* mono -> mono
1304 stereo -> mono
1305 bilingual -> lang1 */
bd985160
HV
1306 cx25840_and_or(client, 0x809, ~0xf, 0x00);
1307 break;
301e22d6 1308 case V4L2_TUNER_MODE_STEREO:
8a4b275f
HV
1309 case V4L2_TUNER_MODE_LANG1:
1310 /* mono -> mono
1311 stereo -> stereo
1312 bilingual -> lang1 */
bd985160
HV
1313 cx25840_and_or(client, 0x809, ~0xf, 0x04);
1314 break;
301e22d6 1315 case V4L2_TUNER_MODE_LANG1_LANG2:
8a4b275f
HV
1316 /* mono -> mono
1317 stereo -> stereo
1318 bilingual -> lang1/lang2 */
1319 cx25840_and_or(client, 0x809, ~0xf, 0x07);
1320 break;
bd985160 1321 case V4L2_TUNER_MODE_LANG2:
8a4b275f 1322 /* mono -> mono
301e22d6 1323 stereo -> stereo
8a4b275f 1324 bilingual -> lang2 */
bd985160
HV
1325 cx25840_and_or(client, 0x809, ~0xf, 0x01);
1326 break;
8a4b275f
HV
1327 default:
1328 return -EINVAL;
bd985160 1329 }
8a4b275f 1330 state->audmode = vt->audmode;
bd985160
HV
1331 break;
1332
1333 case VIDIOC_G_FMT:
3faeeae4 1334 return get_v4lfmt(client, (struct v4l2_format *)arg);
bd985160
HV
1335
1336 case VIDIOC_S_FMT:
3faeeae4 1337 return set_v4lfmt(client, (struct v4l2_format *)arg);
bd985160
HV
1338
1339 case VIDIOC_INT_RESET:
e2b8cf4c
HV
1340 if (state->is_cx25836)
1341 cx25836_initialize(client);
f234081b
ST
1342 else if (state->is_cx23885)
1343 cx23885_initialize(client);
e2b8cf4c 1344 else
89fc4eb9 1345 cx25840_initialize(client);
bd985160
HV
1346 break;
1347
3434eb7e
HV
1348 case VIDIOC_G_CHIP_IDENT:
1349 return v4l2_chip_ident_i2c_client(client, arg, state->id, state->rev);
bd985160
HV
1350
1351 default:
bd985160
HV
1352 return -EINVAL;
1353 }
1354
3faeeae4 1355 return 0;
bd985160
HV
1356}
1357
1358/* ----------------------------------------------------------------------- */
1359
d2653e92
JD
1360static int cx25840_probe(struct i2c_client *client,
1361 const struct i2c_device_id *did)
bd985160 1362{
bd985160 1363 struct cx25840_state *state;
3434eb7e 1364 u32 id;
bd985160
HV
1365 u16 device_id;
1366
188f3457
HV
1367 /* Check if the adapter supports the needed features */
1368 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1369 return -EIO;
1370
21340ae0 1371 v4l_dbg(1, cx25840_debug, client, "detecting cx25840 client on address 0x%x\n", client->addr << 1);
bd985160
HV
1372
1373 device_id = cx25840_read(client, 0x101) << 8;
1374 device_id |= cx25840_read(client, 0x100);
f234081b 1375 v4l_dbg(1, cx25840_debug, client, "device_id = 0x%04x\n", device_id);
bd985160
HV
1376
1377 /* The high byte of the device ID should be
e2b8cf4c
HV
1378 * 0x83 for the cx2583x and 0x84 for the cx2584x */
1379 if ((device_id & 0xff00) == 0x8300) {
1380 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
e2b8cf4c
HV
1381 }
1382 else if ((device_id & 0xff00) == 0x8400) {
1383 id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
f234081b
ST
1384 } else if (device_id == 0x0000) {
1385 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
1386 } else if (device_id == 0x1313) {
1387 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
e2b8cf4c
HV
1388 }
1389 else {
b5fc7144 1390 v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n");
188f3457 1391 return -ENODEV;
bd985160
HV
1392 }
1393
21340ae0
HV
1394 state = kzalloc(sizeof(struct cx25840_state), GFP_KERNEL);
1395 if (state == NULL) {
21340ae0
HV
1396 return -ENOMEM;
1397 }
1398
b7a01e72
HV
1399 /* Note: revision '(device_id & 0x0f) == 2' was never built. The
1400 marking skips from 0x1 == 22 to 0x3 == 23. */
fac9e899 1401 v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n",
bd985160 1402 (device_id & 0xfff0) >> 4,
b7a01e72 1403 (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1 : (device_id & 0x0f),
21340ae0 1404 client->addr << 1, client->adapter->name);
bd985160 1405
bd985160 1406 i2c_set_clientdata(client, state);
21340ae0
HV
1407 state->c = client;
1408 state->is_cx25836 = ((device_id & 0xff00) == 0x8300);
f234081b 1409 state->is_cx23885 = (device_id == 0x0000) || (device_id == 0x1313);
a8bbf12a
HV
1410 state->vid_input = CX25840_COMPOSITE7;
1411 state->aud_input = CX25840_AUDIO8;
3578d3dd 1412 state->audclk_freq = 48000;
a8bbf12a 1413 state->pvr150_workaround = 0;
8a4b275f 1414 state->audmode = V4L2_TUNER_MODE_LANG1;
87410dab 1415 state->unmute_volume = -1;
ca130eef
HV
1416 state->default_volume = 228 - cx25840_read(client, 0x8d4);
1417 state->default_volume = ((state->default_volume / 2) + 23) << 9;
3e3bf277 1418 state->vbi_line_offset = 8;
e2b8cf4c 1419 state->id = id;
3434eb7e 1420 state->rev = device_id;
f234081b 1421
2770b7d7
ST
1422 if (state->is_cx23885) {
1423 /* Drive GPIO2 direction and values */
1424 cx25840_write(client, 0x160, 0x1d);
1425 cx25840_write(client, 0x164, 0x00);
1426 }
1427
bd985160
HV
1428 return 0;
1429}
1430
1a39275a 1431static int cx25840_remove(struct i2c_client *client)
bd985160 1432{
1a39275a 1433 kfree(i2c_get_clientdata(client));
bd985160
HV
1434 return 0;
1435}
1436
af294867
JD
1437static const struct i2c_device_id cx25840_id[] = {
1438 { "cx25840", 0 },
1439 { }
1440};
1441MODULE_DEVICE_TABLE(i2c, cx25840_id);
1442
1a39275a
HV
1443static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1444 .name = "cx25840",
1445 .driverid = I2C_DRIVERID_CX25840,
bd985160 1446 .command = cx25840_command,
1a39275a
HV
1447 .probe = cx25840_probe,
1448 .remove = cx25840_remove,
af294867 1449 .id_table = cx25840_id,
bd985160 1450};