V4L/DVB (10952): cx25840: prepare it to be used by cx231xx module
[linux-block.git] / drivers / media / video / cx25840 / cx25840-core.c
CommitLineData
bd985160
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1/* cx25840 - Conexant CX25840 audio/video decoder driver
2 *
3 * Copyright (C) 2004 Ulf Eklund
4 *
5 * Based on the saa7115 driver and on the first verison of Chris Kennedy's
6 * cx25840 driver.
7 *
8 * Changes by Tyler Trafford <tatrafford@comcast.net>
9 * - cleanup/rewrite for V4L2 API (2005)
10 *
11 * VBI support by Hans Verkuil <hverkuil@xs4all.nl>.
12 *
3e3bf277
CN
13 * NTSC sliced VBI support by Christopher Neufeld <television@cneufeld.ca>
14 * with additional fixes by Hans Verkuil <hverkuil@xs4all.nl>.
15 *
6d897616 16 * CX23885 support by Steven Toth <stoth@linuxtv.org>.
f234081b 17 *
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18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version 2
21 * of the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
31 */
32
33
34#include <linux/kernel.h>
35#include <linux/module.h>
36#include <linux/slab.h>
37#include <linux/videodev2.h>
38#include <linux/i2c.h>
f61b48f7 39#include <linux/delay.h>
bd985160 40#include <media/v4l2-common.h>
3434eb7e 41#include <media/v4l2-chip-ident.h>
b6198ade 42#include <media/v4l2-i2c-drv.h>
31bc09b5 43#include <media/cx25840.h>
bd985160 44
31bc09b5 45#include "cx25840-core.h"
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46
47MODULE_DESCRIPTION("Conexant CX25840 audio/video decoder driver");
1f4b3365 48MODULE_AUTHOR("Ulf Eklund, Chris Kennedy, Hans Verkuil, Tyler Trafford");
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49MODULE_LICENSE("GPL");
50
fe0d3dff 51static int cx25840_debug;
bd985160 52
b5fc7144 53module_param_named(debug,cx25840_debug, int, 0644);
bd985160 54
fac9e899 55MODULE_PARM_DESC(debug, "Debugging messages [0=Off (default) 1=On]");
bd985160 56
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57
58/* ----------------------------------------------------------------------- */
59
60int cx25840_write(struct i2c_client *client, u16 addr, u8 value)
61{
62 u8 buffer[3];
63 buffer[0] = addr >> 8;
64 buffer[1] = addr & 0xff;
65 buffer[2] = value;
66 return i2c_master_send(client, buffer, 3);
67}
68
69int cx25840_write4(struct i2c_client *client, u16 addr, u32 value)
70{
71 u8 buffer[6];
72 buffer[0] = addr >> 8;
73 buffer[1] = addr & 0xff;
4a56eb3f
HV
74 buffer[2] = value & 0xff;
75 buffer[3] = (value >> 8) & 0xff;
76 buffer[4] = (value >> 16) & 0xff;
77 buffer[5] = value >> 24;
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78 return i2c_master_send(client, buffer, 6);
79}
80
81u8 cx25840_read(struct i2c_client * client, u16 addr)
82{
83 u8 buffer[2];
84 buffer[0] = addr >> 8;
85 buffer[1] = addr & 0xff;
86
87 if (i2c_master_send(client, buffer, 2) < 2)
88 return 0;
89
90 if (i2c_master_recv(client, buffer, 1) < 1)
91 return 0;
92
93 return buffer[0];
94}
95
96u32 cx25840_read4(struct i2c_client * client, u16 addr)
97{
98 u8 buffer[4];
99 buffer[0] = addr >> 8;
100 buffer[1] = addr & 0xff;
101
102 if (i2c_master_send(client, buffer, 2) < 2)
103 return 0;
104
105 if (i2c_master_recv(client, buffer, 4) < 4)
106 return 0;
107
17531c16
HV
108 return (buffer[3] << 24) | (buffer[2] << 16) |
109 (buffer[1] << 8) | buffer[0];
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110}
111
e2b8cf4c 112int cx25840_and_or(struct i2c_client *client, u16 addr, unsigned and_mask,
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113 u8 or_value)
114{
115 return cx25840_write(client, addr,
116 (cx25840_read(client, addr) & and_mask) |
117 or_value);
118}
119
120/* ----------------------------------------------------------------------- */
121
a8bbf12a
HV
122static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
123 enum cx25840_audio_input aud_input);
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124
125/* ----------------------------------------------------------------------- */
126
d92c20e0 127static void init_dll1(struct i2c_client *client)
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128{
129 /* This is the Hauppauge sequence used to
130 * initialize the Delay Lock Loop 1 (ADC DLL). */
131 cx25840_write(client, 0x159, 0x23);
132 cx25840_write(client, 0x15a, 0x87);
133 cx25840_write(client, 0x15b, 0x06);
38051450 134 udelay(10);
bd985160 135 cx25840_write(client, 0x159, 0xe1);
38051450 136 udelay(10);
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HV
137 cx25840_write(client, 0x15a, 0x86);
138 cx25840_write(client, 0x159, 0xe0);
139 cx25840_write(client, 0x159, 0xe1);
140 cx25840_write(client, 0x15b, 0x10);
141}
142
d92c20e0 143static void init_dll2(struct i2c_client *client)
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144{
145 /* This is the Hauppauge sequence used to
146 * initialize the Delay Lock Loop 2 (ADC DLL). */
147 cx25840_write(client, 0x15d, 0xe3);
148 cx25840_write(client, 0x15e, 0x86);
149 cx25840_write(client, 0x15f, 0x06);
38051450 150 udelay(10);
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151 cx25840_write(client, 0x15d, 0xe1);
152 cx25840_write(client, 0x15d, 0xe0);
153 cx25840_write(client, 0x15d, 0xe1);
154}
155
e2b8cf4c
HV
156static void cx25836_initialize(struct i2c_client *client)
157{
158 /* reset configuration is described on page 3-77 of the CX25836 datasheet */
159 /* 2. */
160 cx25840_and_or(client, 0x000, ~0x01, 0x01);
161 cx25840_and_or(client, 0x000, ~0x01, 0x00);
162 /* 3a. */
163 cx25840_and_or(client, 0x15a, ~0x70, 0x00);
164 /* 3b. */
165 cx25840_and_or(client, 0x15b, ~0x1e, 0x06);
166 /* 3c. */
167 cx25840_and_or(client, 0x159, ~0x02, 0x02);
168 /* 3d. */
38051450 169 udelay(10);
e2b8cf4c
HV
170 /* 3e. */
171 cx25840_and_or(client, 0x159, ~0x02, 0x00);
172 /* 3f. */
173 cx25840_and_or(client, 0x159, ~0xc0, 0xc0);
174 /* 3g. */
175 cx25840_and_or(client, 0x159, ~0x01, 0x00);
176 cx25840_and_or(client, 0x159, ~0x01, 0x01);
177 /* 3h. */
178 cx25840_and_or(client, 0x15b, ~0x1e, 0x10);
179}
180
21340ae0
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181static void cx25840_work_handler(struct work_struct *work)
182{
183 struct cx25840_state *state = container_of(work, struct cx25840_state, fw_work);
184 cx25840_loadfw(state->c);
185 wake_up(&state->fw_wait);
186}
187
89fc4eb9 188static void cx25840_initialize(struct i2c_client *client)
bd985160 189{
21340ae0 190 DEFINE_WAIT(wait);
9357b31c 191 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
21340ae0 192 struct workqueue_struct *q;
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193
194 /* datasheet startup in numbered steps, refer to page 3-77 */
195 /* 2. */
196 cx25840_and_or(client, 0x803, ~0x10, 0x00);
197 /* The default of this register should be 4, but I get 0 instead.
198 * Set this register to 4 manually. */
199 cx25840_write(client, 0x000, 0x04);
200 /* 3. */
201 init_dll1(client);
202 init_dll2(client);
203 cx25840_write(client, 0x136, 0x0a);
204 /* 4. */
205 cx25840_write(client, 0x13c, 0x01);
206 cx25840_write(client, 0x13c, 0x00);
207 /* 5. */
21340ae0
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208 /* Do the firmware load in a work handler to prevent.
209 Otherwise the kernel is blocked waiting for the
210 bit-banging i2c interface to finish uploading the
211 firmware. */
212 INIT_WORK(&state->fw_work, cx25840_work_handler);
213 init_waitqueue_head(&state->fw_wait);
214 q = create_singlethread_workqueue("cx25840_fw");
215 prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
216 queue_work(q, &state->fw_work);
217 schedule();
218 finish_wait(&state->fw_wait, &wait);
219 destroy_workqueue(q);
220
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221 /* 6. */
222 cx25840_write(client, 0x115, 0x8c);
223 cx25840_write(client, 0x116, 0x07);
224 cx25840_write(client, 0x118, 0x02);
225 /* 7. */
226 cx25840_write(client, 0x4a5, 0x80);
227 cx25840_write(client, 0x4a5, 0x00);
228 cx25840_write(client, 0x402, 0x00);
229 /* 8. */
73dcddc5
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230 cx25840_and_or(client, 0x401, ~0x18, 0);
231 cx25840_and_or(client, 0x4a2, ~0x10, 0x10);
232 /* steps 8c and 8d are done in change_input() */
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233 /* 10. */
234 cx25840_write(client, 0x8d3, 0x1f);
235 cx25840_write(client, 0x8e3, 0x03);
236
cb5aa1c6 237 cx25840_std_setup(client);
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238
239 /* trial and error says these are needed to get audio */
240 cx25840_write(client, 0x914, 0xa0);
241 cx25840_write(client, 0x918, 0xa0);
242 cx25840_write(client, 0x919, 0x01);
243
244 /* stereo prefered */
245 cx25840_write(client, 0x809, 0x04);
246 /* AC97 shift */
247 cx25840_write(client, 0x8cf, 0x0f);
248
a8bbf12a
HV
249 /* (re)set input */
250 set_input(client, state->vid_input, state->aud_input);
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251
252 /* start microcontroller */
253 cx25840_and_or(client, 0x803, ~0x10, 0x10);
254}
255
f234081b
ST
256static void cx23885_initialize(struct i2c_client *client)
257{
258 DEFINE_WAIT(wait);
9357b31c 259 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
f234081b
ST
260 struct workqueue_struct *q;
261
262 /* Internal Reset */
263 cx25840_and_or(client, 0x102, ~0x01, 0x01);
264 cx25840_and_or(client, 0x102, ~0x01, 0x00);
265
266 /* Stop microcontroller */
267 cx25840_and_or(client, 0x803, ~0x10, 0x00);
268
269 /* DIF in reset? */
270 cx25840_write(client, 0x398, 0);
271
272 /* Trust the default xtal, no division */
273 /* This changes for the cx23888 products */
274 cx25840_write(client, 0x2, 0x76);
275
276 /* Bring down the regulator for AUX clk */
277 cx25840_write(client, 0x1, 0x40);
278
279 /* Sys PLL frac */
280 cx25840_write4(client, 0x11c, 0x01d1744c);
281
282 /* Sys PLL int */
283 cx25840_write4(client, 0x118, 0x00000416);
284
285 /* Disable DIF bypass */
286 cx25840_write4(client, 0x33c, 0x00000001);
287
288 /* DIF Src phase inc */
289 cx25840_write4(client, 0x340, 0x0df7df83);
290
291 /* Vid PLL frac */
292 cx25840_write4(client, 0x10c, 0x01b6db7b);
293
294 /* Vid PLL int */
295 cx25840_write4(client, 0x108, 0x00000512);
296
297 /* Luma */
298 cx25840_write4(client, 0x414, 0x00107d12);
299
300 /* Chroma */
301 cx25840_write4(client, 0x420, 0x3d008282);
302
303 /* Aux PLL frac */
304 cx25840_write4(client, 0x114, 0x017dbf48);
305
306 /* Aux PLL int */
307 cx25840_write4(client, 0x110, 0x000a030e);
308
309 /* ADC2 input select */
310 cx25840_write(client, 0x102, 0x10);
311
312 /* VIN1 & VIN5 */
313 cx25840_write(client, 0x103, 0x11);
314
315 /* Enable format auto detect */
316 cx25840_write(client, 0x400, 0);
317 /* Fast subchroma lock */
318 /* White crush, Chroma AGC & Chroma Killer enabled */
319 cx25840_write(client, 0x401, 0xe8);
320
321 /* Select AFE clock pad output source */
322 cx25840_write(client, 0x144, 0x05);
323
324 /* Do the firmware load in a work handler to prevent.
325 Otherwise the kernel is blocked waiting for the
326 bit-banging i2c interface to finish uploading the
327 firmware. */
328 INIT_WORK(&state->fw_work, cx25840_work_handler);
329 init_waitqueue_head(&state->fw_wait);
330 q = create_singlethread_workqueue("cx25840_fw");
331 prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
332 queue_work(q, &state->fw_work);
333 schedule();
334 finish_wait(&state->fw_wait, &wait);
335 destroy_workqueue(q);
336
cb5aa1c6 337 cx25840_std_setup(client);
f234081b
ST
338
339 /* (re)set input */
340 set_input(client, state->vid_input, state->aud_input);
341
342 /* start microcontroller */
343 cx25840_and_or(client, 0x803, ~0x10, 0x10);
344}
345
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HV
346/* ----------------------------------------------------------------------- */
347
149783b5
SD
348static void cx231xx_initialize(struct i2c_client *client)
349{
350 DEFINE_WAIT(wait);
351 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
352 struct workqueue_struct *q;
353
354 /* Internal Reset */
355 cx25840_and_or(client, 0x102, ~0x01, 0x01);
356 cx25840_and_or(client, 0x102, ~0x01, 0x00);
357
358 /* Stop microcontroller */
359 cx25840_and_or(client, 0x803, ~0x10, 0x00);
360
361 /* DIF in reset? */
362 cx25840_write(client, 0x398, 0);
363
364 /* Trust the default xtal, no division */
365 /* This changes for the cx23888 products */
366 cx25840_write(client, 0x2, 0x76);
367
368 /* Bring down the regulator for AUX clk */
369 cx25840_write(client, 0x1, 0x40);
370
371 /* Disable DIF bypass */
372 cx25840_write4(client, 0x33c, 0x00000001);
373
374 /* DIF Src phase inc */
375 cx25840_write4(client, 0x340, 0x0df7df83);
376
377
378 /* Luma */
379 cx25840_write4(client, 0x414, 0x00107d12);
380
381 /* Chroma */
382 cx25840_write4(client, 0x420, 0x3d008282);
383
384
385
386 /* ADC2 input select */
387 cx25840_write(client, 0x102, 0x10);
388
389 /* VIN1 & VIN5 */
390 cx25840_write(client, 0x103, 0x11);
391
392 /* Enable format auto detect */
393 cx25840_write(client, 0x400, 0);
394 /* Fast subchroma lock */
395 /* White crush, Chroma AGC & Chroma Killer enabled */
396 cx25840_write(client, 0x401, 0xe8);
397
398
399 /* Do the firmware load in a work handler to prevent.
400 Otherwise the kernel is blocked waiting for the
401 bit-banging i2c interface to finish uploading the
402 firmware. */
403 INIT_WORK(&state->fw_work, cx25840_work_handler);
404 init_waitqueue_head(&state->fw_wait);
405 q = create_singlethread_workqueue("cx25840_fw");
406 prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
407 queue_work(q, &state->fw_work);
408 schedule();
409 finish_wait(&state->fw_wait, &wait);
410 destroy_workqueue(q);
411
412 cx25840_std_setup(client);
413
414 /* (re)set input */
415 set_input(client, state->vid_input, state->aud_input);
416
417 /* start microcontroller */
418 cx25840_and_or(client, 0x803, ~0x10, 0x10);
419}
420
421/* ----------------------------------------------------------------------- */
422
cb5aa1c6
HV
423void cx25840_std_setup(struct i2c_client *client)
424{
9357b31c 425 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
cb5aa1c6
HV
426 v4l2_std_id std = state->std;
427 int hblank, hactive, burst, vblank, vactive, sc;
428 int vblank656, src_decimation;
429 int luma_lpf, uv_lpf, comb;
430 u32 pll_int, pll_frac, pll_post;
431
432 /* datasheet startup, step 8d */
433 if (std & ~V4L2_STD_NTSC)
434 cx25840_write(client, 0x49f, 0x11);
435 else
436 cx25840_write(client, 0x49f, 0x14);
437
438 if (std & V4L2_STD_625_50) {
439 hblank = 132;
440 hactive = 720;
441 burst = 93;
442 vblank = 36;
443 vactive = 580;
444 vblank656 = 40;
445 src_decimation = 0x21f;
446 luma_lpf = 2;
447
448 if (std & V4L2_STD_SECAM) {
449 uv_lpf = 0;
450 comb = 0;
451 sc = 0x0a425f;
452 } else if (std == V4L2_STD_PAL_Nc) {
453 uv_lpf = 1;
454 comb = 0x20;
455 sc = 556453;
456 } else {
457 uv_lpf = 1;
458 comb = 0x20;
459 sc = 688739;
460 }
461 } else {
462 hactive = 720;
463 hblank = 122;
464 vactive = 487;
465 luma_lpf = 1;
466 uv_lpf = 1;
467
468 src_decimation = 0x21f;
469 if (std == V4L2_STD_PAL_60) {
470 vblank = 26;
471 vblank656 = 26;
472 burst = 0x5b;
473 luma_lpf = 2;
474 comb = 0x20;
475 sc = 688739;
476 } else if (std == V4L2_STD_PAL_M) {
477 vblank = 20;
478 vblank656 = 24;
479 burst = 0x61;
480 comb = 0x20;
481 sc = 555452;
482 } else {
483 vblank = 26;
484 vblank656 = 26;
485 burst = 0x5b;
486 comb = 0x66;
487 sc = 556063;
488 }
489 }
490
491 /* DEBUG: Displays configured PLL frequency */
149783b5 492 if (!state->is_cx231xx) {
cb5aa1c6
HV
493 pll_int = cx25840_read(client, 0x108);
494 pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
495 pll_post = cx25840_read(client, 0x109);
496 v4l_dbg(1, cx25840_debug, client,
497 "PLL regs = int: %u, frac: %u, post: %u\n",
498 pll_int, pll_frac, pll_post);
499
500 if (pll_post) {
501 int fin, fsc;
502 int pll = (28636363L * ((((u64)pll_int) << 25L) + pll_frac)) >> 25L;
503
504 pll /= pll_post;
505 v4l_dbg(1, cx25840_debug, client, "PLL = %d.%06d MHz\n",
506 pll / 1000000, pll % 1000000);
507 v4l_dbg(1, cx25840_debug, client, "PLL/8 = %d.%06d MHz\n",
508 pll / 8000000, (pll / 8) % 1000000);
509
510 fin = ((u64)src_decimation * pll) >> 12;
511 v4l_dbg(1, cx25840_debug, client,
512 "ADC Sampling freq = %d.%06d MHz\n",
513 fin / 1000000, fin % 1000000);
514
515 fsc = (((u64)sc) * pll) >> 24L;
516 v4l_dbg(1, cx25840_debug, client,
517 "Chroma sub-carrier freq = %d.%06d MHz\n",
518 fsc / 1000000, fsc % 1000000);
519
520 v4l_dbg(1, cx25840_debug, client, "hblank %i, hactive %i, "
521 "vblank %i, vactive %i, vblank656 %i, src_dec %i, "
522 "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x, "
523 "sc 0x%06x\n",
524 hblank, hactive, vblank, vactive, vblank656,
525 src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
526 }
149783b5 527 }
cb5aa1c6
HV
528
529 /* Sets horizontal blanking delay and active lines */
530 cx25840_write(client, 0x470, hblank);
531 cx25840_write(client, 0x471,
532 0xff & (((hblank >> 8) & 0x3) | (hactive << 4)));
533 cx25840_write(client, 0x472, hactive >> 4);
534
535 /* Sets burst gate delay */
536 cx25840_write(client, 0x473, burst);
537
538 /* Sets vertical blanking delay and active duration */
539 cx25840_write(client, 0x474, vblank);
540 cx25840_write(client, 0x475,
541 0xff & (((vblank >> 8) & 0x3) | (vactive << 4)));
542 cx25840_write(client, 0x476, vactive >> 4);
543 cx25840_write(client, 0x477, vblank656);
544
545 /* Sets src decimation rate */
546 cx25840_write(client, 0x478, 0xff & src_decimation);
547 cx25840_write(client, 0x479, 0xff & (src_decimation >> 8));
548
549 /* Sets Luma and UV Low pass filters */
550 cx25840_write(client, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
551
552 /* Enables comb filters */
553 cx25840_write(client, 0x47b, comb);
554
555 /* Sets SC Step*/
556 cx25840_write(client, 0x47c, sc);
557 cx25840_write(client, 0x47d, 0xff & sc >> 8);
558 cx25840_write(client, 0x47e, 0xff & sc >> 16);
559
560 /* Sets VBI parameters */
561 if (std & V4L2_STD_625_50) {
562 cx25840_write(client, 0x47f, 0x01);
563 state->vbi_line_offset = 5;
564 } else {
565 cx25840_write(client, 0x47f, 0x00);
566 state->vbi_line_offset = 8;
567 }
568}
569
570/* ----------------------------------------------------------------------- */
571
bd985160
HV
572static void input_change(struct i2c_client *client)
573{
9357b31c 574 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
081b496a 575 v4l2_std_id std = state->std;
bd985160 576
73dcddc5
HV
577 /* Follow step 8c and 8d of section 3.16 in the cx25840 datasheet */
578 if (std & V4L2_STD_SECAM) {
579 cx25840_write(client, 0x402, 0);
580 }
581 else {
582 cx25840_write(client, 0x402, 0x04);
583 cx25840_write(client, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
584 }
585 cx25840_and_or(client, 0x401, ~0x60, 0);
586 cx25840_and_or(client, 0x401, ~0x60, 0x60);
82677618 587 cx25840_and_or(client, 0x810, ~0x01, 1);
73dcddc5 588
39c4ad6a
HV
589 if (state->radio) {
590 cx25840_write(client, 0x808, 0xf9);
591 cx25840_write(client, 0x80b, 0x00);
592 }
593 else if (std & V4L2_STD_525_60) {
d97a11e0
HV
594 /* Certain Hauppauge PVR150 models have a hardware bug
595 that causes audio to drop out. For these models the
596 audio standard must be set explicitly.
597 To be precise: it affects cards with tuner models
598 85, 99 and 112 (model numbers from tveeprom). */
599 int hw_fix = state->pvr150_workaround;
600
601 if (std == V4L2_STD_NTSC_M_JP) {
f95006f8 602 /* Japan uses EIAJ audio standard */
d97a11e0
HV
603 cx25840_write(client, 0x808, hw_fix ? 0x2f : 0xf7);
604 } else if (std == V4L2_STD_NTSC_M_KR) {
605 /* South Korea uses A2 audio standard */
606 cx25840_write(client, 0x808, hw_fix ? 0x3f : 0xf8);
f95006f8
HV
607 } else {
608 /* Others use the BTSC audio standard */
d97a11e0 609 cx25840_write(client, 0x808, hw_fix ? 0x1f : 0xf6);
f95006f8 610 }
bd985160 611 cx25840_write(client, 0x80b, 0x00);
839e4a4a
MCC
612 } else if (std & V4L2_STD_PAL) {
613 /* Follow tuner change procedure for PAL */
614 cx25840_write(client, 0x808, 0xff);
615 cx25840_write(client, 0x80b, 0x10);
616 } else if (std & V4L2_STD_SECAM) {
617 /* Select autodetect for SECAM */
618 cx25840_write(client, 0x808, 0xff);
619 cx25840_write(client, 0x80b, 0x10);
bd985160
HV
620 }
621
82677618 622 cx25840_and_or(client, 0x810, ~0x01, 0);
bd985160
HV
623}
624
a8bbf12a
HV
625static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
626 enum cx25840_audio_input aud_input)
bd985160 627{
9357b31c 628 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
a8bbf12a
HV
629 u8 is_composite = (vid_input >= CX25840_COMPOSITE1 &&
630 vid_input <= CX25840_COMPOSITE8);
631 u8 reg;
bd985160 632
f234081b
ST
633 v4l_dbg(1, cx25840_debug, client,
634 "decoder set video input %d, audio input %d\n",
635 vid_input, aud_input);
bd985160 636
f234081b
ST
637 if (vid_input >= CX25840_VIN1_CH1) {
638 v4l_dbg(1, cx25840_debug, client, "vid_input 0x%x\n",
639 vid_input);
640 reg = vid_input & 0xff;
641 if ((vid_input & CX25840_SVIDEO_ON) == CX25840_SVIDEO_ON)
642 is_composite = 0;
643 else
644 is_composite = 1;
645
646 v4l_dbg(1, cx25840_debug, client, "mux cfg 0x%x comp=%d\n",
647 reg, is_composite);
648 } else
a8bbf12a
HV
649 if (is_composite) {
650 reg = 0xf0 + (vid_input - CX25840_COMPOSITE1);
651 } else {
652 int luma = vid_input & 0xf0;
653 int chroma = vid_input & 0xf00;
bd985160 654
a8bbf12a 655 if ((vid_input & ~0xff0) ||
45270a15 656 luma < CX25840_SVIDEO_LUMA1 || luma > CX25840_SVIDEO_LUMA8 ||
a8bbf12a 657 chroma < CX25840_SVIDEO_CHROMA4 || chroma > CX25840_SVIDEO_CHROMA8) {
f234081b
ST
658 v4l_err(client, "0x%04x is not a valid video input!\n",
659 vid_input);
a8bbf12a 660 return -EINVAL;
bd985160 661 }
a8bbf12a
HV
662 reg = 0xf0 + ((luma - CX25840_SVIDEO_LUMA1) >> 4);
663 if (chroma >= CX25840_SVIDEO_CHROMA7) {
664 reg &= 0x3f;
665 reg |= (chroma - CX25840_SVIDEO_CHROMA7) >> 2;
bd985160 666 } else {
a8bbf12a
HV
667 reg &= 0xcf;
668 reg |= (chroma - CX25840_SVIDEO_CHROMA4) >> 4;
bd985160 669 }
a8bbf12a 670 }
bd985160 671
f234081b
ST
672 /* The caller has previously prepared the correct routing
673 * configuration in reg (for the cx23885) so we have no
674 * need to attempt to flip bits for earlier av decoders.
675 */
149783b5 676 if (!state->is_cx23885 && !state->is_cx231xx) {
f234081b
ST
677 switch (aud_input) {
678 case CX25840_AUDIO_SERIAL:
679 /* do nothing, use serial audio input */
680 break;
681 case CX25840_AUDIO4: reg &= ~0x30; break;
682 case CX25840_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
683 case CX25840_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
684 case CX25840_AUDIO7: reg &= ~0xc0; break;
685 case CX25840_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
bd985160 686
f234081b
ST
687 default:
688 v4l_err(client, "0x%04x is not a valid audio input!\n",
689 aud_input);
690 return -EINVAL;
691 }
bd985160
HV
692 }
693
a8bbf12a 694 cx25840_write(client, 0x103, reg);
f234081b 695
a8bbf12a
HV
696 /* Set INPUT_MODE to Composite (0) or S-Video (1) */
697 cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
f234081b 698
149783b5 699 if (!state->is_cx23885 && !state->is_cx231xx) {
f234081b
ST
700 /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
701 cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
702 /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2&CH3 */
703 if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
704 cx25840_and_or(client, 0x102, ~0x4, 4);
705 else
706 cx25840_and_or(client, 0x102, ~0x4, 0);
707 } else {
708 if (is_composite)
709 /* ADC2 input select channel 2 */
710 cx25840_and_or(client, 0x102, ~0x2, 0);
711 else
712 /* ADC2 input select channel 3 */
713 cx25840_and_or(client, 0x102, ~0x2, 2);
714 }
a8bbf12a
HV
715
716 state->vid_input = vid_input;
717 state->aud_input = aud_input;
e2b8cf4c
HV
718 if (!state->is_cx25836) {
719 cx25840_audio_set_path(client);
720 input_change(client);
721 }
f234081b
ST
722
723 if (state->is_cx23885) {
724 /* Audio channel 1 src : Parallel 1 */
725 cx25840_write(client, 0x124, 0x03);
726
727 /* Select AFE clock pad output source */
728 cx25840_write(client, 0x144, 0x05);
729
730 /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
731 cx25840_write(client, 0x914, 0xa0);
732
149783b5
SD
733 /* I2S_OUT_CTL:
734 * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
735 * I2S_OUT_MASTER_MODE = Master
736 */
737 cx25840_write(client, 0x918, 0xa0);
738 cx25840_write(client, 0x919, 0x01);
739 } else if (state->is_cx231xx) {
740 /* Audio channel 1 src : Parallel 1 */
741 cx25840_write(client, 0x124, 0x03);
742
743 /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
744 cx25840_write(client, 0x914, 0xa0);
745
f234081b
ST
746 /* I2S_OUT_CTL:
747 * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
748 * I2S_OUT_MASTER_MODE = Master
749 */
750 cx25840_write(client, 0x918, 0xa0);
751 cx25840_write(client, 0x919, 0x01);
752 }
753
bd985160
HV
754 return 0;
755}
756
757/* ----------------------------------------------------------------------- */
758
081b496a 759static int set_v4lstd(struct i2c_client *client)
bd985160 760{
9357b31c 761 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
081b496a
HV
762 u8 fmt = 0; /* zero is autodetect */
763 u8 pal_m = 0;
468a0a54
MCC
764
765 /* First tests should be against specific std */
081b496a
HV
766 if (state->std == V4L2_STD_NTSC_M_JP) {
767 fmt = 0x2;
768 } else if (state->std == V4L2_STD_NTSC_443) {
769 fmt = 0x3;
770 } else if (state->std == V4L2_STD_PAL_M) {
771 pal_m = 1;
772 fmt = 0x5;
773 } else if (state->std == V4L2_STD_PAL_N) {
774 fmt = 0x6;
775 } else if (state->std == V4L2_STD_PAL_Nc) {
776 fmt = 0x7;
777 } else if (state->std == V4L2_STD_PAL_60) {
778 fmt = 0x8;
468a0a54
MCC
779 } else {
780 /* Then, test against generic ones */
081b496a
HV
781 if (state->std & V4L2_STD_NTSC)
782 fmt = 0x1;
783 else if (state->std & V4L2_STD_PAL)
784 fmt = 0x4;
785 else if (state->std & V4L2_STD_SECAM)
786 fmt = 0xc;
bd985160
HV
787 }
788
839e4a4a
MCC
789 v4l_dbg(1, cx25840_debug, client, "changing video std to fmt %i\n",fmt);
790
73dcddc5
HV
791 /* Follow step 9 of section 3.16 in the cx25840 datasheet.
792 Without this PAL may display a vertical ghosting effect.
793 This happens for example with the Yuan MPC622. */
794 if (fmt >= 4 && fmt < 8) {
795 /* Set format to NTSC-M */
796 cx25840_and_or(client, 0x400, ~0xf, 1);
797 /* Turn off LCOMB */
798 cx25840_and_or(client, 0x47b, ~6, 0);
799 }
bd985160 800 cx25840_and_or(client, 0x400, ~0xf, fmt);
081b496a 801 cx25840_and_or(client, 0x403, ~0x3, pal_m);
cb5aa1c6 802 cx25840_std_setup(client);
081b496a
HV
803 if (!state->is_cx25836)
804 input_change(client);
bd985160
HV
805 return 0;
806}
807
bd985160
HV
808/* ----------------------------------------------------------------------- */
809
9357b31c 810static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
bd985160 811{
149783b5 812 struct cx25840_state *state = to_state(sd);
9357b31c 813 struct i2c_client *client = v4l2_get_subdevdata(sd);
bd985160
HV
814
815 switch (ctrl->id) {
a8bbf12a
HV
816 case CX25840_CID_ENABLE_PVR150_WORKAROUND:
817 state->pvr150_workaround = ctrl->value;
818 set_input(client, state->vid_input, state->aud_input);
bd985160
HV
819 break;
820
821 case V4L2_CID_BRIGHTNESS:
822 if (ctrl->value < 0 || ctrl->value > 255) {
fac9e899 823 v4l_err(client, "invalid brightness setting %d\n",
bd985160
HV
824 ctrl->value);
825 return -ERANGE;
826 }
827
828 cx25840_write(client, 0x414, ctrl->value - 128);
829 break;
830
831 case V4L2_CID_CONTRAST:
832 if (ctrl->value < 0 || ctrl->value > 127) {
fac9e899 833 v4l_err(client, "invalid contrast setting %d\n",
bd985160
HV
834 ctrl->value);
835 return -ERANGE;
836 }
837
838 cx25840_write(client, 0x415, ctrl->value << 1);
839 break;
840
841 case V4L2_CID_SATURATION:
842 if (ctrl->value < 0 || ctrl->value > 127) {
fac9e899 843 v4l_err(client, "invalid saturation setting %d\n",
bd985160
HV
844 ctrl->value);
845 return -ERANGE;
846 }
847
848 cx25840_write(client, 0x420, ctrl->value << 1);
849 cx25840_write(client, 0x421, ctrl->value << 1);
850 break;
851
852 case V4L2_CID_HUE:
de6476f5 853 if (ctrl->value < -128 || ctrl->value > 127) {
fac9e899 854 v4l_err(client, "invalid hue setting %d\n", ctrl->value);
bd985160
HV
855 return -ERANGE;
856 }
857
858 cx25840_write(client, 0x422, ctrl->value);
859 break;
860
861 case V4L2_CID_AUDIO_VOLUME:
862 case V4L2_CID_AUDIO_BASS:
863 case V4L2_CID_AUDIO_TREBLE:
864 case V4L2_CID_AUDIO_BALANCE:
865 case V4L2_CID_AUDIO_MUTE:
e2b8cf4c
HV
866 if (state->is_cx25836)
867 return -EINVAL;
df1d5ed8 868 return cx25840_audio_s_ctrl(sd, ctrl);
3faeeae4
HV
869
870 default:
871 return -EINVAL;
bd985160
HV
872 }
873
874 return 0;
875}
876
9357b31c 877static int cx25840_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
bd985160 878{
149783b5 879 struct cx25840_state *state = to_state(sd);
9357b31c 880 struct i2c_client *client = v4l2_get_subdevdata(sd);
bd985160
HV
881
882 switch (ctrl->id) {
a8bbf12a
HV
883 case CX25840_CID_ENABLE_PVR150_WORKAROUND:
884 ctrl->value = state->pvr150_workaround;
bd985160
HV
885 break;
886 case V4L2_CID_BRIGHTNESS:
0de71224 887 ctrl->value = (s8)cx25840_read(client, 0x414) + 128;
bd985160
HV
888 break;
889 case V4L2_CID_CONTRAST:
890 ctrl->value = cx25840_read(client, 0x415) >> 1;
891 break;
892 case V4L2_CID_SATURATION:
893 ctrl->value = cx25840_read(client, 0x420) >> 1;
894 break;
895 case V4L2_CID_HUE:
c5099a64 896 ctrl->value = (s8)cx25840_read(client, 0x422);
bd985160
HV
897 break;
898 case V4L2_CID_AUDIO_VOLUME:
899 case V4L2_CID_AUDIO_BASS:
900 case V4L2_CID_AUDIO_TREBLE:
901 case V4L2_CID_AUDIO_BALANCE:
902 case V4L2_CID_AUDIO_MUTE:
e2b8cf4c
HV
903 if (state->is_cx25836)
904 return -EINVAL;
df1d5ed8 905 return cx25840_audio_g_ctrl(sd, ctrl);
bd985160
HV
906 default:
907 return -EINVAL;
908 }
909
910 return 0;
911}
912
913/* ----------------------------------------------------------------------- */
914
9357b31c 915static int cx25840_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
bd985160
HV
916{
917 switch (fmt->type) {
918 case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
df1d5ed8 919 return cx25840_vbi_g_fmt(sd, fmt);
bd985160
HV
920 default:
921 return -EINVAL;
922 }
bd985160
HV
923 return 0;
924}
925
9357b31c 926static int cx25840_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
bd985160 927{
9357b31c
HV
928 struct cx25840_state *state = to_state(sd);
929 struct i2c_client *client = v4l2_get_subdevdata(sd);
bd985160
HV
930 struct v4l2_pix_format *pix;
931 int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
081b496a 932 int is_50Hz = !(state->std & V4L2_STD_525_60);
bd985160
HV
933
934 switch (fmt->type) {
935 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
936 pix = &(fmt->fmt.pix);
937
938 Vsrc = (cx25840_read(client, 0x476) & 0x3f) << 4;
939 Vsrc |= (cx25840_read(client, 0x475) & 0xf0) >> 4;
940
941 Hsrc = (cx25840_read(client, 0x472) & 0x3f) << 4;
942 Hsrc |= (cx25840_read(client, 0x471) & 0xf0) >> 4;
943
ba70d59b 944 Vlines = pix->height + (is_50Hz ? 4 : 7);
bd985160
HV
945
946 if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
947 (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
fac9e899 948 v4l_err(client, "%dx%d is not a valid size!\n",
bd985160
HV
949 pix->width, pix->height);
950 return -ERANGE;
951 }
952
953 HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
954 VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
955 VSC &= 0x1fff;
956
957 if (pix->width >= 385)
958 filter = 0;
959 else if (pix->width > 192)
960 filter = 1;
961 else if (pix->width > 96)
962 filter = 2;
963 else
964 filter = 3;
965
b5fc7144 966 v4l_dbg(1, cx25840_debug, client, "decoder set size %dx%d -> scale %ux%u\n",
bd985160
HV
967 pix->width, pix->height, HSC, VSC);
968
969 /* HSCALE=HSC */
970 cx25840_write(client, 0x418, HSC & 0xff);
971 cx25840_write(client, 0x419, (HSC >> 8) & 0xff);
972 cx25840_write(client, 0x41a, HSC >> 16);
973 /* VSCALE=VSC */
974 cx25840_write(client, 0x41c, VSC & 0xff);
975 cx25840_write(client, 0x41d, VSC >> 8);
976 /* VS_INTRLACE=1 VFILT=filter */
977 cx25840_write(client, 0x41e, 0x8 | filter);
978 break;
979
980 case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
df1d5ed8 981 return cx25840_vbi_s_fmt(sd, fmt);
bd985160
HV
982
983 case V4L2_BUF_TYPE_VBI_CAPTURE:
df1d5ed8 984 return cx25840_vbi_s_fmt(sd, fmt);
bd985160
HV
985
986 default:
987 return -EINVAL;
988 }
989
990 return 0;
991}
992
993/* ----------------------------------------------------------------------- */
994
1a39275a
HV
995static void log_video_status(struct i2c_client *client)
996{
997 static const char *const fmt_strs[] = {
998 "0x0",
999 "NTSC-M", "NTSC-J", "NTSC-4.43",
1000 "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
1001 "0x9", "0xA", "0xB",
1002 "SECAM",
1003 "0xD", "0xE", "0xF"
1004 };
1005
9357b31c 1006 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1a39275a
HV
1007 u8 vidfmt_sel = cx25840_read(client, 0x400) & 0xf;
1008 u8 gen_stat1 = cx25840_read(client, 0x40d);
1009 u8 gen_stat2 = cx25840_read(client, 0x40e);
1010 int vid_input = state->vid_input;
1011
1012 v4l_info(client, "Video signal: %spresent\n",
1013 (gen_stat2 & 0x20) ? "" : "not ");
1014 v4l_info(client, "Detected format: %s\n",
1015 fmt_strs[gen_stat1 & 0xf]);
1016
1017 v4l_info(client, "Specified standard: %s\n",
1018 vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
1019
1020 if (vid_input >= CX25840_COMPOSITE1 &&
1021 vid_input <= CX25840_COMPOSITE8) {
1022 v4l_info(client, "Specified video input: Composite %d\n",
1023 vid_input - CX25840_COMPOSITE1 + 1);
1024 } else {
1025 v4l_info(client, "Specified video input: S-Video (Luma In%d, Chroma In%d)\n",
1026 (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
1027 }
1028
1029 v4l_info(client, "Specified audioclock freq: %d Hz\n", state->audclk_freq);
1030}
1031
1032/* ----------------------------------------------------------------------- */
1033
1034static void log_audio_status(struct i2c_client *client)
1035{
9357b31c 1036 struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1a39275a
HV
1037 u8 download_ctl = cx25840_read(client, 0x803);
1038 u8 mod_det_stat0 = cx25840_read(client, 0x804);
1039 u8 mod_det_stat1 = cx25840_read(client, 0x805);
1040 u8 audio_config = cx25840_read(client, 0x808);
1041 u8 pref_mode = cx25840_read(client, 0x809);
1042 u8 afc0 = cx25840_read(client, 0x80b);
1043 u8 mute_ctl = cx25840_read(client, 0x8d3);
1044 int aud_input = state->aud_input;
1045 char *p;
1046
1047 switch (mod_det_stat0) {
1048 case 0x00: p = "mono"; break;
1049 case 0x01: p = "stereo"; break;
1050 case 0x02: p = "dual"; break;
1051 case 0x04: p = "tri"; break;
1052 case 0x10: p = "mono with SAP"; break;
1053 case 0x11: p = "stereo with SAP"; break;
1054 case 0x12: p = "dual with SAP"; break;
1055 case 0x14: p = "tri with SAP"; break;
1056 case 0xfe: p = "forced mode"; break;
1057 default: p = "not defined";
1058 }
1059 v4l_info(client, "Detected audio mode: %s\n", p);
1060
1061 switch (mod_det_stat1) {
1062 case 0x00: p = "not defined"; break;
1063 case 0x01: p = "EIAJ"; break;
1064 case 0x02: p = "A2-M"; break;
1065 case 0x03: p = "A2-BG"; break;
1066 case 0x04: p = "A2-DK1"; break;
1067 case 0x05: p = "A2-DK2"; break;
1068 case 0x06: p = "A2-DK3"; break;
1069 case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
1070 case 0x08: p = "AM-L"; break;
1071 case 0x09: p = "NICAM-BG"; break;
1072 case 0x0a: p = "NICAM-DK"; break;
1073 case 0x0b: p = "NICAM-I"; break;
1074 case 0x0c: p = "NICAM-L"; break;
1075 case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
1076 case 0x0e: p = "IF FM Radio"; break;
1077 case 0x0f: p = "BTSC"; break;
1078 case 0x10: p = "high-deviation FM"; break;
1079 case 0x11: p = "very high-deviation FM"; break;
1080 case 0xfd: p = "unknown audio standard"; break;
1081 case 0xfe: p = "forced audio standard"; break;
1082 case 0xff: p = "no detected audio standard"; break;
1083 default: p = "not defined";
1084 }
1085 v4l_info(client, "Detected audio standard: %s\n", p);
1086 v4l_info(client, "Audio muted: %s\n",
1087 (state->unmute_volume >= 0) ? "yes" : "no");
1088 v4l_info(client, "Audio microcontroller: %s\n",
1089 (download_ctl & 0x10) ?
1090 ((mute_ctl & 0x2) ? "detecting" : "running") : "stopped");
1091
1092 switch (audio_config >> 4) {
1093 case 0x00: p = "undefined"; break;
1094 case 0x01: p = "BTSC"; break;
1095 case 0x02: p = "EIAJ"; break;
1096 case 0x03: p = "A2-M"; break;
1097 case 0x04: p = "A2-BG"; break;
1098 case 0x05: p = "A2-DK1"; break;
1099 case 0x06: p = "A2-DK2"; break;
1100 case 0x07: p = "A2-DK3"; break;
1101 case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
1102 case 0x09: p = "AM-L"; break;
1103 case 0x0a: p = "NICAM-BG"; break;
1104 case 0x0b: p = "NICAM-DK"; break;
1105 case 0x0c: p = "NICAM-I"; break;
1106 case 0x0d: p = "NICAM-L"; break;
1107 case 0x0e: p = "FM radio"; break;
1108 case 0x0f: p = "automatic detection"; break;
1109 default: p = "undefined";
1110 }
1111 v4l_info(client, "Configured audio standard: %s\n", p);
1112
1113 if ((audio_config >> 4) < 0xF) {
1114 switch (audio_config & 0xF) {
1115 case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
1116 case 0x01: p = "MONO2 (LANGUAGE B)"; break;
1117 case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
1118 case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
1119 case 0x04: p = "STEREO"; break;
1120 case 0x05: p = "DUAL1 (AB)"; break;
1121 case 0x06: p = "DUAL2 (AC) (FM)"; break;
1122 case 0x07: p = "DUAL3 (BC) (FM)"; break;
1123 case 0x08: p = "DUAL4 (AC) (AM)"; break;
1124 case 0x09: p = "DUAL5 (BC) (AM)"; break;
1125 case 0x0a: p = "SAP"; break;
1126 default: p = "undefined";
1127 }
1128 v4l_info(client, "Configured audio mode: %s\n", p);
1129 } else {
1130 switch (audio_config & 0xF) {
1131 case 0x00: p = "BG"; break;
1132 case 0x01: p = "DK1"; break;
1133 case 0x02: p = "DK2"; break;
1134 case 0x03: p = "DK3"; break;
1135 case 0x04: p = "I"; break;
1136 case 0x05: p = "L"; break;
1137 case 0x06: p = "BTSC"; break;
1138 case 0x07: p = "EIAJ"; break;
1139 case 0x08: p = "A2-M"; break;
1140 case 0x09: p = "FM Radio"; break;
1141 case 0x0f: p = "automatic standard and mode detection"; break;
1142 default: p = "undefined";
1143 }
1144 v4l_info(client, "Configured audio system: %s\n", p);
1145 }
1146
1147 if (aud_input) {
1148 v4l_info(client, "Specified audio input: Tuner (In%d)\n", aud_input);
1149 } else {
1150 v4l_info(client, "Specified audio input: External\n");
1151 }
1152
1153 switch (pref_mode & 0xf) {
1154 case 0: p = "mono/language A"; break;
1155 case 1: p = "language B"; break;
1156 case 2: p = "language C"; break;
1157 case 3: p = "analog fallback"; break;
1158 case 4: p = "stereo"; break;
1159 case 5: p = "language AC"; break;
1160 case 6: p = "language BC"; break;
1161 case 7: p = "language AB"; break;
1162 default: p = "undefined";
1163 }
1164 v4l_info(client, "Preferred audio mode: %s\n", p);
1165
1166 if ((audio_config & 0xf) == 0xf) {
1167 switch ((afc0 >> 3) & 0x3) {
1168 case 0: p = "system DK"; break;
1169 case 1: p = "system L"; break;
1170 case 2: p = "autodetect"; break;
1171 default: p = "undefined";
1172 }
1173 v4l_info(client, "Selected 65 MHz format: %s\n", p);
1174
1175 switch (afc0 & 0x7) {
1176 case 0: p = "chroma"; break;
1177 case 1: p = "BTSC"; break;
1178 case 2: p = "EIAJ"; break;
1179 case 3: p = "A2-M"; break;
1180 case 4: p = "autodetect"; break;
1181 default: p = "undefined";
1182 }
1183 v4l_info(client, "Selected 45 MHz format: %s\n", p);
1184 }
1185}
1186
1187/* ----------------------------------------------------------------------- */
1188
6ca187ab
HV
1189/* This init operation must be called to load the driver's firmware.
1190 Without this the audio standard detection will fail and you will
1191 only get mono.
1192
1193 Since loading the firmware is often problematic when the driver is
1194 compiled into the kernel I recommend postponing calling this function
1195 until the first open of the video device. Another reason for
1196 postponing it is that loading this firmware takes a long time (seconds)
1197 due to the slow i2c bus speed. So it will speed up the boot process if
1198 you can avoid loading the fw as long as the video device isn't used. */
9357b31c 1199static int cx25840_init(struct v4l2_subdev *sd, u32 val)
bd985160 1200{
9357b31c
HV
1201 struct cx25840_state *state = to_state(sd);
1202 struct i2c_client *client = v4l2_get_subdevdata(sd);
c976bc82
HV
1203
1204 if (!state->is_initialized) {
c976bc82
HV
1205 /* initialize on first use */
1206 state->is_initialized = 1;
1207 if (state->is_cx25836)
1208 cx25836_initialize(client);
f234081b
ST
1209 else if (state->is_cx23885)
1210 cx23885_initialize(client);
149783b5
SD
1211 else if (state->is_cx231xx)
1212 cx231xx_initialize(client);
c976bc82 1213 else
89fc4eb9 1214 cx25840_initialize(client);
c976bc82 1215 }
9357b31c
HV
1216 return 0;
1217}
c976bc82 1218
bd985160 1219#ifdef CONFIG_VIDEO_ADV_DEBUG
aecde8b5 1220static int cx25840_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
9357b31c
HV
1221{
1222 struct i2c_client *client = v4l2_get_subdevdata(sd);
f234081b 1223
aecde8b5 1224 if (!v4l2_chip_match_i2c_client(client, &reg->match))
9357b31c
HV
1225 return -EINVAL;
1226 if (!capable(CAP_SYS_ADMIN))
1227 return -EPERM;
aecde8b5 1228 reg->size = 1;
9357b31c
HV
1229 reg->val = cx25840_read(client, reg->reg & 0x0fff);
1230 return 0;
1231}
1232
aecde8b5 1233static int cx25840_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
9357b31c
HV
1234{
1235 struct i2c_client *client = v4l2_get_subdevdata(sd);
1236
aecde8b5 1237 if (!v4l2_chip_match_i2c_client(client, &reg->match))
9357b31c
HV
1238 return -EINVAL;
1239 if (!capable(CAP_SYS_ADMIN))
1240 return -EPERM;
1241 cx25840_write(client, reg->reg & 0x0fff, reg->val & 0xff);
1242 return 0;
1243}
bd985160
HV
1244#endif
1245
9357b31c
HV
1246static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
1247{
1248 struct cx25840_state *state = to_state(sd);
1249 struct i2c_client *client = v4l2_get_subdevdata(sd);
bd985160 1250
9357b31c
HV
1251 v4l_dbg(1, cx25840_debug, client, "%s output\n",
1252 enable ? "enable" : "disable");
1253 if (enable) {
149783b5 1254 if (state->is_cx23885 || state->is_cx231xx) {
f234081b
ST
1255 u8 v = (cx25840_read(client, 0x421) | 0x0b);
1256 cx25840_write(client, 0x421, v);
1257 } else {
1258 cx25840_write(client, 0x115,
9357b31c 1259 state->is_cx25836 ? 0x0c : 0x8c);
f234081b 1260 cx25840_write(client, 0x116,
9357b31c 1261 state->is_cx25836 ? 0x04 : 0x07);
f234081b 1262 }
9357b31c 1263 } else {
149783b5 1264 if (state->is_cx23885 || state->is_cx231xx) {
f234081b
ST
1265 u8 v = cx25840_read(client, 0x421) & ~(0x0b);
1266 cx25840_write(client, 0x421, v);
1267 } else {
1268 cx25840_write(client, 0x115, 0x00);
1269 cx25840_write(client, 0x116, 0x00);
1270 }
9357b31c
HV
1271 }
1272 return 0;
1273}
bd985160 1274
9357b31c
HV
1275static int cx25840_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1276{
1277 struct cx25840_state *state = to_state(sd);
bd985160 1278
9357b31c
HV
1279 switch (qc->id) {
1280 case V4L2_CID_BRIGHTNESS:
10afbef1 1281 return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);
9357b31c
HV
1282 case V4L2_CID_CONTRAST:
1283 case V4L2_CID_SATURATION:
10afbef1 1284 return v4l2_ctrl_query_fill(qc, 0, 127, 1, 64);
9357b31c 1285 case V4L2_CID_HUE:
10afbef1 1286 return v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);
9357b31c
HV
1287 default:
1288 break;
1289 }
1290 if (state->is_cx25836)
1291 return -EINVAL;
bd985160 1292
9357b31c
HV
1293 switch (qc->id) {
1294 case V4L2_CID_AUDIO_VOLUME:
1295 return v4l2_ctrl_query_fill(qc, 0, 65535,
1296 65535 / 100, state->default_volume);
1297 case V4L2_CID_AUDIO_MUTE:
10afbef1 1298 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
9357b31c
HV
1299 case V4L2_CID_AUDIO_BALANCE:
1300 case V4L2_CID_AUDIO_BASS:
1301 case V4L2_CID_AUDIO_TREBLE:
10afbef1 1302 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
9357b31c
HV
1303 default:
1304 return -EINVAL;
1305 }
1306 return -EINVAL;
1307}
bd985160 1308
9357b31c
HV
1309static int cx25840_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1310{
1311 struct cx25840_state *state = to_state(sd);
1312 struct i2c_client *client = v4l2_get_subdevdata(sd);
d92c20e0 1313
9357b31c
HV
1314 if (state->radio == 0 && state->std == std)
1315 return 0;
1316 state->radio = 0;
1317 state->std = std;
1318 return set_v4lstd(client);
1319}
e2b8cf4c 1320
9357b31c
HV
1321static int cx25840_s_radio(struct v4l2_subdev *sd)
1322{
1323 struct cx25840_state *state = to_state(sd);
d92c20e0 1324
9357b31c
HV
1325 state->radio = 1;
1326 return 0;
1327}
bd985160 1328
9357b31c
HV
1329static int cx25840_s_video_routing(struct v4l2_subdev *sd, const struct v4l2_routing *route)
1330{
1331 struct cx25840_state *state = to_state(sd);
1332 struct i2c_client *client = v4l2_get_subdevdata(sd);
3faeeae4 1333
9357b31c
HV
1334 return set_input(client, route->input, state->aud_input);
1335}
bd985160 1336
9357b31c
HV
1337static int cx25840_s_audio_routing(struct v4l2_subdev *sd, const struct v4l2_routing *route)
1338{
1339 struct cx25840_state *state = to_state(sd);
1340 struct i2c_client *client = v4l2_get_subdevdata(sd);
bd985160 1341
9357b31c
HV
1342 if (state->is_cx25836)
1343 return -EINVAL;
1344 return set_input(client, state->vid_input, route->input);
1345}
bd985160 1346
9357b31c
HV
1347static int cx25840_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1348{
1349 struct cx25840_state *state = to_state(sd);
1350 struct i2c_client *client = v4l2_get_subdevdata(sd);
a8bbf12a 1351
9357b31c
HV
1352 if (!state->is_cx25836)
1353 input_change(client);
1354 return 0;
1355}
a8bbf12a 1356
9357b31c
HV
1357static int cx25840_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1358{
1359 struct cx25840_state *state = to_state(sd);
1360 struct i2c_client *client = v4l2_get_subdevdata(sd);
1361 u8 vpres = cx25840_read(client, 0x40e) & 0x20;
1362 u8 mode;
1363 int val = 0;
bd985160 1364
9357b31c
HV
1365 if (state->radio)
1366 return 0;
bd985160 1367
9357b31c
HV
1368 vt->signal = vpres ? 0xffff : 0x0;
1369 if (state->is_cx25836)
1370 return 0;
3faeeae4 1371
9357b31c
HV
1372 vt->capability |=
1373 V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
1374 V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
e2b8cf4c 1375
9357b31c 1376 mode = cx25840_read(client, 0x804);
bd985160 1377
9357b31c
HV
1378 /* get rxsubchans and audmode */
1379 if ((mode & 0xf) == 1)
1380 val |= V4L2_TUNER_SUB_STEREO;
1381 else
1382 val |= V4L2_TUNER_SUB_MONO;
bd985160 1383
9357b31c
HV
1384 if (mode == 2 || mode == 4)
1385 val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
bd985160 1386
9357b31c
HV
1387 if (mode & 0x10)
1388 val |= V4L2_TUNER_SUB_SAP;
bd985160 1389
9357b31c
HV
1390 vt->rxsubchans = val;
1391 vt->audmode = state->audmode;
1392 return 0;
1393}
bd985160 1394
9357b31c
HV
1395static int cx25840_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1396{
1397 struct cx25840_state *state = to_state(sd);
1398 struct i2c_client *client = v4l2_get_subdevdata(sd);
bd985160 1399
9357b31c
HV
1400 if (state->radio || state->is_cx25836)
1401 return 0;
8a4b275f 1402
9357b31c 1403 switch (vt->audmode) {
bd985160 1404 case V4L2_TUNER_MODE_MONO:
8a4b275f
HV
1405 /* mono -> mono
1406 stereo -> mono
1407 bilingual -> lang1 */
bd985160
HV
1408 cx25840_and_or(client, 0x809, ~0xf, 0x00);
1409 break;
301e22d6 1410 case V4L2_TUNER_MODE_STEREO:
8a4b275f
HV
1411 case V4L2_TUNER_MODE_LANG1:
1412 /* mono -> mono
1413 stereo -> stereo
1414 bilingual -> lang1 */
bd985160
HV
1415 cx25840_and_or(client, 0x809, ~0xf, 0x04);
1416 break;
301e22d6 1417 case V4L2_TUNER_MODE_LANG1_LANG2:
8a4b275f
HV
1418 /* mono -> mono
1419 stereo -> stereo
1420 bilingual -> lang1/lang2 */
1421 cx25840_and_or(client, 0x809, ~0xf, 0x07);
1422 break;
bd985160 1423 case V4L2_TUNER_MODE_LANG2:
8a4b275f 1424 /* mono -> mono
301e22d6 1425 stereo -> stereo
8a4b275f 1426 bilingual -> lang2 */
bd985160
HV
1427 cx25840_and_or(client, 0x809, ~0xf, 0x01);
1428 break;
8a4b275f
HV
1429 default:
1430 return -EINVAL;
9357b31c
HV
1431 }
1432 state->audmode = vt->audmode;
1433 return 0;
1434}
bd985160 1435
9357b31c
HV
1436static int cx25840_reset(struct v4l2_subdev *sd, u32 val)
1437{
1438 struct cx25840_state *state = to_state(sd);
1439 struct i2c_client *client = v4l2_get_subdevdata(sd);
bd985160 1440
9357b31c
HV
1441 if (state->is_cx25836)
1442 cx25836_initialize(client);
1443 else if (state->is_cx23885)
1444 cx23885_initialize(client);
149783b5
SD
1445 else if (state->is_cx231xx)
1446 cx231xx_initialize(client);
9357b31c
HV
1447 else
1448 cx25840_initialize(client);
1449 return 0;
1450}
bd985160 1451
aecde8b5 1452static int cx25840_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
9357b31c
HV
1453{
1454 struct cx25840_state *state = to_state(sd);
1455 struct i2c_client *client = v4l2_get_subdevdata(sd);
bd985160 1456
9357b31c
HV
1457 return v4l2_chip_ident_i2c_client(client, chip, state->id, state->rev);
1458}
bd985160 1459
9357b31c
HV
1460static int cx25840_log_status(struct v4l2_subdev *sd)
1461{
1462 struct cx25840_state *state = to_state(sd);
1463 struct i2c_client *client = v4l2_get_subdevdata(sd);
bd985160 1464
9357b31c
HV
1465 log_video_status(client);
1466 if (!state->is_cx25836)
1467 log_audio_status(client);
3faeeae4 1468 return 0;
bd985160
HV
1469}
1470
9357b31c
HV
1471/* ----------------------------------------------------------------------- */
1472
1473static const struct v4l2_subdev_core_ops cx25840_core_ops = {
1474 .log_status = cx25840_log_status,
1475 .g_chip_ident = cx25840_g_chip_ident,
1476 .g_ctrl = cx25840_g_ctrl,
1477 .s_ctrl = cx25840_s_ctrl,
1478 .queryctrl = cx25840_queryctrl,
1479 .reset = cx25840_reset,
1480 .init = cx25840_init,
1481#ifdef CONFIG_VIDEO_ADV_DEBUG
1482 .g_register = cx25840_g_register,
1483 .s_register = cx25840_s_register,
1484#endif
1485};
1486
1487static const struct v4l2_subdev_tuner_ops cx25840_tuner_ops = {
1488 .s_frequency = cx25840_s_frequency,
1489 .s_std = cx25840_s_std,
1490 .s_radio = cx25840_s_radio,
1491 .g_tuner = cx25840_g_tuner,
1492 .s_tuner = cx25840_s_tuner,
1493};
1494
1495static const struct v4l2_subdev_audio_ops cx25840_audio_ops = {
1496 .s_clock_freq = cx25840_s_clock_freq,
1497 .s_routing = cx25840_s_audio_routing,
1498};
1499
1500static const struct v4l2_subdev_video_ops cx25840_video_ops = {
1501 .s_routing = cx25840_s_video_routing,
1502 .g_fmt = cx25840_g_fmt,
1503 .s_fmt = cx25840_s_fmt,
1504 .decode_vbi_line = cx25840_decode_vbi_line,
1505 .s_stream = cx25840_s_stream,
1506};
1507
1508static const struct v4l2_subdev_ops cx25840_ops = {
1509 .core = &cx25840_core_ops,
1510 .tuner = &cx25840_tuner_ops,
1511 .audio = &cx25840_audio_ops,
1512 .video = &cx25840_video_ops,
1513};
1514
bd985160
HV
1515/* ----------------------------------------------------------------------- */
1516
d2653e92
JD
1517static int cx25840_probe(struct i2c_client *client,
1518 const struct i2c_device_id *did)
bd985160 1519{
bd985160 1520 struct cx25840_state *state;
9357b31c 1521 struct v4l2_subdev *sd;
3434eb7e 1522 u32 id;
bd985160
HV
1523 u16 device_id;
1524
188f3457
HV
1525 /* Check if the adapter supports the needed features */
1526 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1527 return -EIO;
1528
21340ae0 1529 v4l_dbg(1, cx25840_debug, client, "detecting cx25840 client on address 0x%x\n", client->addr << 1);
bd985160
HV
1530
1531 device_id = cx25840_read(client, 0x101) << 8;
1532 device_id |= cx25840_read(client, 0x100);
f234081b 1533 v4l_dbg(1, cx25840_debug, client, "device_id = 0x%04x\n", device_id);
bd985160
HV
1534
1535 /* The high byte of the device ID should be
e2b8cf4c
HV
1536 * 0x83 for the cx2583x and 0x84 for the cx2584x */
1537 if ((device_id & 0xff00) == 0x8300) {
1538 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
e2b8cf4c
HV
1539 }
1540 else if ((device_id & 0xff00) == 0x8400) {
1541 id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
149783b5 1542 } /* else if (device_id == 0x0000) {
f234081b 1543 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
149783b5 1544 } */ else if (device_id == 0x1313) {
f234081b 1545 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
149783b5
SD
1546 } else if ((device_id & 0xfff0) == 0x5A30) {
1547 id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
e2b8cf4c
HV
1548 }
1549 else {
b5fc7144 1550 v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n");
188f3457 1551 return -ENODEV;
bd985160
HV
1552 }
1553
21340ae0 1554 state = kzalloc(sizeof(struct cx25840_state), GFP_KERNEL);
9357b31c 1555 if (state == NULL)
21340ae0 1556 return -ENOMEM;
21340ae0 1557
9357b31c
HV
1558 sd = &state->sd;
1559 v4l2_i2c_subdev_init(sd, client, &cx25840_ops);
b7a01e72
HV
1560 /* Note: revision '(device_id & 0x0f) == 2' was never built. The
1561 marking skips from 0x1 == 22 to 0x3 == 23. */
fac9e899 1562 v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n",
bd985160 1563 (device_id & 0xfff0) >> 4,
b7a01e72 1564 (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1 : (device_id & 0x0f),
21340ae0 1565 client->addr << 1, client->adapter->name);
bd985160 1566
21340ae0
HV
1567 state->c = client;
1568 state->is_cx25836 = ((device_id & 0xff00) == 0x8300);
f234081b 1569 state->is_cx23885 = (device_id == 0x0000) || (device_id == 0x1313);
149783b5 1570 state->is_cx231xx = (device_id == 0x5A3E);
a8bbf12a
HV
1571 state->vid_input = CX25840_COMPOSITE7;
1572 state->aud_input = CX25840_AUDIO8;
3578d3dd 1573 state->audclk_freq = 48000;
a8bbf12a 1574 state->pvr150_workaround = 0;
8a4b275f 1575 state->audmode = V4L2_TUNER_MODE_LANG1;
87410dab 1576 state->unmute_volume = -1;
ca130eef
HV
1577 state->default_volume = 228 - cx25840_read(client, 0x8d4);
1578 state->default_volume = ((state->default_volume / 2) + 23) << 9;
3e3bf277 1579 state->vbi_line_offset = 8;
e2b8cf4c 1580 state->id = id;
3434eb7e 1581 state->rev = device_id;
f234081b 1582
2770b7d7
ST
1583 if (state->is_cx23885) {
1584 /* Drive GPIO2 direction and values */
1585 cx25840_write(client, 0x160, 0x1d);
1586 cx25840_write(client, 0x164, 0x00);
1587 }
1588
bd985160
HV
1589 return 0;
1590}
1591
1a39275a 1592static int cx25840_remove(struct i2c_client *client)
bd985160 1593{
9357b31c
HV
1594 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1595
1596 v4l2_device_unregister_subdev(sd);
1597 kfree(to_state(sd));
bd985160
HV
1598 return 0;
1599}
1600
af294867
JD
1601static const struct i2c_device_id cx25840_id[] = {
1602 { "cx25840", 0 },
1603 { }
1604};
1605MODULE_DEVICE_TABLE(i2c, cx25840_id);
1606
1a39275a
HV
1607static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1608 .name = "cx25840",
1a39275a
HV
1609 .probe = cx25840_probe,
1610 .remove = cx25840_remove,
af294867 1611 .id_table = cx25840_id,
bd985160 1612};