Merge git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6
[linux-2.6-block.git] / drivers / media / video / cx23885 / cx23885-dvb.c
CommitLineData
d19770e5
ST
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/device.h>
25#include <linux/fs.h>
26#include <linux/kthread.h>
27#include <linux/file.h>
28#include <linux/suspend.h>
29
30#include "cx23885.h"
d19770e5
ST
31#include <media/v4l2-common.h>
32
33#include "s5h1409.h"
52b50450 34#include "s5h1411.h"
d19770e5 35#include "mt2131.h"
3ba71d21 36#include "tda8290.h"
4041f1a5 37#include "tda18271.h"
9bc37caa 38#include "lgdt330x.h"
d1987d55 39#include "xc5000.h"
b3ea0166 40#include "tda10048.h"
07b4a835 41#include "tuner-xc2028.h"
827855d3 42#include "tuner-simple.h"
66762373
ST
43#include "dib7000p.h"
44#include "dibx000_common.h"
aef2d186 45#include "zl10353.h"
d19770e5 46
4513fc69 47static unsigned int debug;
d19770e5 48
4513fc69
ST
49#define dprintk(level, fmt, arg...)\
50 do { if (debug >= level)\
51 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
52 } while (0)
d19770e5
ST
53
54/* ------------------------------------------------------------------ */
55
3ba71d21
MK
56static unsigned int alt_tuner;
57module_param(alt_tuner, int, 0644);
58MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
59
78e92006
JG
60DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
61
3ba71d21
MK
62/* ------------------------------------------------------------------ */
63
d19770e5
ST
64static int dvb_buf_setup(struct videobuf_queue *q,
65 unsigned int *count, unsigned int *size)
66{
67 struct cx23885_tsport *port = q->priv_data;
68
69 port->ts_packet_size = 188 * 4;
70 port->ts_packet_count = 32;
71
72 *size = port->ts_packet_size * port->ts_packet_count;
73 *count = 32;
74 return 0;
75}
76
44a6481d
MK
77static int dvb_buf_prepare(struct videobuf_queue *q,
78 struct videobuf_buffer *vb, enum v4l2_field field)
d19770e5
ST
79{
80 struct cx23885_tsport *port = q->priv_data;
44a6481d 81 return cx23885_buf_prepare(q, port, (struct cx23885_buffer*)vb, field);
d19770e5
ST
82}
83
84static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
85{
86 struct cx23885_tsport *port = q->priv_data;
87 cx23885_buf_queue(port, (struct cx23885_buffer*)vb);
88}
89
44a6481d
MK
90static void dvb_buf_release(struct videobuf_queue *q,
91 struct videobuf_buffer *vb)
d19770e5
ST
92{
93 cx23885_free_buffer(q, (struct cx23885_buffer*)vb);
94}
95
96static struct videobuf_queue_ops dvb_qops = {
97 .buf_setup = dvb_buf_setup,
98 .buf_prepare = dvb_buf_prepare,
99 .buf_queue = dvb_buf_queue,
100 .buf_release = dvb_buf_release,
101};
102
86184e06 103static struct s5h1409_config hauppauge_generic_config = {
fc959bef
ST
104 .demod_address = 0x32 >> 1,
105 .output_mode = S5H1409_SERIAL_OUTPUT,
106 .gpio = S5H1409_GPIO_ON,
2b03238a 107 .qam_if = 44000,
fc959bef 108 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
109 .status_mode = S5H1409_DEMODLOCKING,
110 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
fc959bef
ST
111};
112
b3ea0166
ST
113static struct tda10048_config hauppauge_hvr1200_config = {
114 .demod_address = 0x10 >> 1,
115 .output_mode = TDA10048_SERIAL_OUTPUT,
116 .fwbulkwritelen = TDA10048_BULKWRITE_200,
117 .inversion = TDA10048_INVERSION_ON
118};
119
3ba71d21
MK
120static struct s5h1409_config hauppauge_ezqam_config = {
121 .demod_address = 0x32 >> 1,
122 .output_mode = S5H1409_SERIAL_OUTPUT,
123 .gpio = S5H1409_GPIO_OFF,
124 .qam_if = 4000,
125 .inversion = S5H1409_INVERSION_ON,
dfc1c08a
ST
126 .status_mode = S5H1409_DEMODLOCKING,
127 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
3ba71d21
MK
128};
129
fc959bef 130static struct s5h1409_config hauppauge_hvr1800lp_config = {
d19770e5
ST
131 .demod_address = 0x32 >> 1,
132 .output_mode = S5H1409_SERIAL_OUTPUT,
133 .gpio = S5H1409_GPIO_OFF,
2b03238a 134 .qam_if = 44000,
fe475163 135 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
136 .status_mode = S5H1409_DEMODLOCKING,
137 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d19770e5
ST
138};
139
07b4a835
MK
140static struct s5h1409_config hauppauge_hvr1500_config = {
141 .demod_address = 0x32 >> 1,
142 .output_mode = S5H1409_SERIAL_OUTPUT,
143 .gpio = S5H1409_GPIO_OFF,
144 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
145 .status_mode = S5H1409_DEMODLOCKING,
146 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
07b4a835
MK
147};
148
86184e06 149static struct mt2131_config hauppauge_generic_tunerconfig = {
a77743bc
ST
150 0x61
151};
152
9bc37caa
MK
153static struct lgdt330x_config fusionhdtv_5_express = {
154 .demod_address = 0x0e,
155 .demod_chip = LGDT3303,
156 .serial_mpeg = 0x40,
157};
158
d1987d55
ST
159static struct s5h1409_config hauppauge_hvr1500q_config = {
160 .demod_address = 0x32 >> 1,
161 .output_mode = S5H1409_SERIAL_OUTPUT,
162 .gpio = S5H1409_GPIO_ON,
163 .qam_if = 44000,
164 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
165 .status_mode = S5H1409_DEMODLOCKING,
166 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d1987d55
ST
167};
168
335377b7
MK
169static struct s5h1409_config dvico_s5h1409_config = {
170 .demod_address = 0x32 >> 1,
171 .output_mode = S5H1409_SERIAL_OUTPUT,
172 .gpio = S5H1409_GPIO_ON,
173 .qam_if = 44000,
174 .inversion = S5H1409_INVERSION_OFF,
175 .status_mode = S5H1409_DEMODLOCKING,
176 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
177};
178
52b50450
MK
179static struct s5h1411_config dvico_s5h1411_config = {
180 .output_mode = S5H1411_SERIAL_OUTPUT,
181 .gpio = S5H1411_GPIO_ON,
182 .qam_if = S5H1411_IF_44000,
183 .vsb_if = S5H1411_IF_44000,
184 .inversion = S5H1411_INVERSION_OFF,
185 .status_mode = S5H1411_DEMODLOCKING,
186 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
187};
188
d1987d55 189static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
e12671cf
ST
190 .i2c_address = 0x61,
191 .if_khz = 5380,
d1987d55
ST
192};
193
335377b7
MK
194static struct xc5000_config dvico_xc5000_tunerconfig = {
195 .i2c_address = 0x64,
196 .if_khz = 5380,
335377b7
MK
197};
198
4041f1a5
MK
199static struct tda829x_config tda829x_no_probe = {
200 .probe_tuner = TDA829X_DONT_PROBE,
201};
202
f21e0d7f 203static struct tda18271_std_map hauppauge_tda18271_std_map = {
c0dc0c11
MK
204 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
205 .if_lvl = 6, .rfagc_top = 0x37 },
206 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
207 .if_lvl = 6, .rfagc_top = 0x37 },
f21e0d7f
MK
208};
209
210static struct tda18271_config hauppauge_tda18271_config = {
211 .std_map = &hauppauge_tda18271_std_map,
212 .gate = TDA18271_GATE_ANALOG,
213};
214
b3ea0166
ST
215static struct tda18271_config hauppauge_hvr1200_tuner_config = {
216 .gate = TDA18271_GATE_ANALOG,
217};
218
b1721d0d 219static struct dibx000_agc_config xc3028_agc_config = {
66762373
ST
220 BAND_VHF | BAND_UHF, /* band_caps */
221
222 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
223 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
224 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
225 * P_agc_nb_est=2, P_agc_write=0
226 */
227 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
228 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
229
230 712, /* inv_gain */
231 21, /* time_stabiliz */
232
233 0, /* alpha_level */
234 118, /* thlock */
235
236 0, /* wbd_inv */
237 2867, /* wbd_ref */
238 0, /* wbd_sel */
239 2, /* wbd_alpha */
240
241 0, /* agc1_max */
242 0, /* agc1_min */
243 39718, /* agc2_max */
244 9930, /* agc2_min */
245 0, /* agc1_pt1 */
246 0, /* agc1_pt2 */
247 0, /* agc1_pt3 */
248 0, /* agc1_slope1 */
249 0, /* agc1_slope2 */
250 0, /* agc2_pt1 */
251 128, /* agc2_pt2 */
252 29, /* agc2_slope1 */
253 29, /* agc2_slope2 */
254
255 17, /* alpha_mant */
256 27, /* alpha_exp */
257 23, /* beta_mant */
258 51, /* beta_exp */
259
260 1, /* perform_agc_softsplit */
261};
262
263/* PLL Configuration for COFDM BW_MHz = 8.000000
264 * With external clock = 30.000000 */
b1721d0d 265static struct dibx000_bandwidth_config xc3028_bw_config = {
66762373
ST
266 60000, /* internal */
267 30000, /* sampling */
268 1, /* pll_cfg: prediv */
269 8, /* pll_cfg: ratio */
270 3, /* pll_cfg: range */
271 1, /* pll_cfg: reset */
272 0, /* pll_cfg: bypass */
273 0, /* misc: refdiv */
274 0, /* misc: bypclk_div */
275 1, /* misc: IO_CLK_en_core */
276 1, /* misc: ADClkSrc */
277 0, /* misc: modulo */
278 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
279 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
280 20452225, /* timf */
281 30000000 /* xtal_hz */
282};
283
284static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
285 .output_mpeg2_in_188_bytes = 1,
286 .hostbus_diversity = 1,
287 .tuner_is_baseband = 0,
288 .update_lna = NULL,
289
290 .agc_config_count = 1,
291 .agc = &xc3028_agc_config,
292 .bw = &xc3028_bw_config,
293
294 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
295 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
296 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
297
298 .pwm_freq_div = 0,
299 .agc_control = NULL,
300 .spur_protect = 0,
301
302 .output_mode = OUTMODE_MPEG2_SERIAL,
303};
304
aef2d186
ST
305static struct zl10353_config dvico_fusionhdtv_xc3028 = {
306 .demod_address = 0x0f,
307 .if2 = 45600,
308 .no_tuner = 1,
309};
310
d19770e5
ST
311static int dvb_register(struct cx23885_tsport *port)
312{
313 struct cx23885_dev *dev = port->dev;
f139fa71 314 struct cx23885_i2c *i2c_bus = NULL;
d19770e5
ST
315
316 /* init struct videobuf_dvb */
317 port->dvb.name = dev->name;
318
319 /* init frontend */
320 switch (dev->board) {
a77743bc 321 case CX23885_BOARD_HAUPPAUGE_HVR1250:
f139fa71 322 i2c_bus = &dev->i2c_bus[0];
d19770e5 323 port->dvb.frontend = dvb_attach(s5h1409_attach,
86184e06 324 &hauppauge_generic_config,
f139fa71 325 &i2c_bus->i2c_adap);
d19770e5 326 if (port->dvb.frontend != NULL) {
44a6481d 327 dvb_attach(mt2131_attach, port->dvb.frontend,
f139fa71 328 &i2c_bus->i2c_adap,
86184e06 329 &hauppauge_generic_tunerconfig, 0);
d19770e5
ST
330 }
331 break;
3ba71d21
MK
332 case CX23885_BOARD_HAUPPAUGE_HVR1800:
333 i2c_bus = &dev->i2c_bus[0];
334 switch (alt_tuner) {
335 case 1:
336 port->dvb.frontend =
337 dvb_attach(s5h1409_attach,
338 &hauppauge_ezqam_config,
339 &i2c_bus->i2c_adap);
340 if (port->dvb.frontend != NULL) {
341 dvb_attach(tda829x_attach, port->dvb.frontend,
342 &dev->i2c_bus[1].i2c_adap, 0x42,
4041f1a5
MK
343 &tda829x_no_probe);
344 dvb_attach(tda18271_attach, port->dvb.frontend,
345 0x60, &dev->i2c_bus[1].i2c_adap,
f21e0d7f 346 &hauppauge_tda18271_config);
3ba71d21
MK
347 }
348 break;
349 case 0:
350 default:
351 port->dvb.frontend =
352 dvb_attach(s5h1409_attach,
353 &hauppauge_generic_config,
354 &i2c_bus->i2c_adap);
355 if (port->dvb.frontend != NULL)
356 dvb_attach(mt2131_attach, port->dvb.frontend,
357 &i2c_bus->i2c_adap,
358 &hauppauge_generic_tunerconfig, 0);
359 break;
360 }
361 break;
fc959bef 362 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
f139fa71 363 i2c_bus = &dev->i2c_bus[0];
fc959bef
ST
364 port->dvb.frontend = dvb_attach(s5h1409_attach,
365 &hauppauge_hvr1800lp_config,
f139fa71 366 &i2c_bus->i2c_adap);
fc959bef
ST
367 if (port->dvb.frontend != NULL) {
368 dvb_attach(mt2131_attach, port->dvb.frontend,
f139fa71 369 &i2c_bus->i2c_adap,
fc959bef
ST
370 &hauppauge_generic_tunerconfig, 0);
371 }
372 break;
9bc37caa 373 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
f139fa71 374 i2c_bus = &dev->i2c_bus[0];
9bc37caa
MK
375 port->dvb.frontend = dvb_attach(lgdt330x_attach,
376 &fusionhdtv_5_express,
f139fa71 377 &i2c_bus->i2c_adap);
9bc37caa 378 if (port->dvb.frontend != NULL) {
827855d3
MK
379 dvb_attach(simple_tuner_attach, port->dvb.frontend,
380 &i2c_bus->i2c_adap, 0x61,
381 TUNER_LG_TDVS_H06XF);
9bc37caa
MK
382 }
383 break;
d1987d55
ST
384 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
385 i2c_bus = &dev->i2c_bus[1];
386 port->dvb.frontend = dvb_attach(s5h1409_attach,
387 &hauppauge_hvr1500q_config,
388 &dev->i2c_bus[0].i2c_adap);
48723543 389 if (port->dvb.frontend != NULL)
d1987d55 390 dvb_attach(xc5000_attach, port->dvb.frontend,
30650961
MK
391 &i2c_bus->i2c_adap,
392 &hauppauge_hvr1500q_tunerconfig);
d1987d55 393 break;
07b4a835
MK
394 case CX23885_BOARD_HAUPPAUGE_HVR1500:
395 i2c_bus = &dev->i2c_bus[1];
396 port->dvb.frontend = dvb_attach(s5h1409_attach,
397 &hauppauge_hvr1500_config,
398 &dev->i2c_bus[0].i2c_adap);
399 if (port->dvb.frontend != NULL) {
400 struct dvb_frontend *fe;
401 struct xc2028_config cfg = {
402 .i2c_adap = &i2c_bus->i2c_adap,
403 .i2c_addr = 0x61,
07b4a835
MK
404 };
405 static struct xc2028_ctrl ctl = {
ef80bfeb 406 .fname = XC2028_DEFAULT_FIRMWARE,
07b4a835 407 .max_len = 64,
33e53161 408 .scode_table = XC3028_FE_OREN538,
07b4a835
MK
409 };
410
411 fe = dvb_attach(xc2028_attach,
412 port->dvb.frontend, &cfg);
413 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
414 fe->ops.tuner_ops.set_config(fe, &ctl);
415 }
416 break;
b3ea0166 417 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 418 case CX23885_BOARD_HAUPPAUGE_HVR1700:
b3ea0166
ST
419 i2c_bus = &dev->i2c_bus[0];
420 port->dvb.frontend = dvb_attach(tda10048_attach,
421 &hauppauge_hvr1200_config,
422 &i2c_bus->i2c_adap);
423 if (port->dvb.frontend != NULL) {
424 dvb_attach(tda829x_attach, port->dvb.frontend,
425 &dev->i2c_bus[1].i2c_adap, 0x42,
426 &tda829x_no_probe);
427 dvb_attach(tda18271_attach, port->dvb.frontend,
428 0x60, &dev->i2c_bus[1].i2c_adap,
429 &hauppauge_hvr1200_tuner_config);
430 }
431 break;
66762373
ST
432 case CX23885_BOARD_HAUPPAUGE_HVR1400:
433 i2c_bus = &dev->i2c_bus[0];
434 port->dvb.frontend = dvb_attach(dib7000p_attach,
435 &i2c_bus->i2c_adap,
436 0x12, &hauppauge_hvr1400_dib7000_config);
437 if (port->dvb.frontend != NULL) {
438 struct dvb_frontend *fe;
439 struct xc2028_config cfg = {
440 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
441 .i2c_addr = 0x64,
66762373
ST
442 };
443 static struct xc2028_ctrl ctl = {
ef80bfeb 444 .fname = XC3028L_DEFAULT_FIRMWARE,
66762373
ST
445 .max_len = 64,
446 .demod = 5000,
0975fc68
MCC
447 /* This is true for all demods with v36 firmware? */
448 .type = XC2028_D2633,
66762373
ST
449 };
450
451 fe = dvb_attach(xc2028_attach,
452 port->dvb.frontend, &cfg);
453 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
454 fe->ops.tuner_ops.set_config(fe, &ctl);
455 }
456 break;
335377b7
MK
457 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
458 i2c_bus = &dev->i2c_bus[port->nr - 1];
459
460 port->dvb.frontend = dvb_attach(s5h1409_attach,
461 &dvico_s5h1409_config,
462 &i2c_bus->i2c_adap);
52b50450
MK
463 if (port->dvb.frontend == NULL)
464 port->dvb.frontend = dvb_attach(s5h1411_attach,
465 &dvico_s5h1411_config,
466 &i2c_bus->i2c_adap);
335377b7
MK
467 if (port->dvb.frontend != NULL)
468 dvb_attach(xc5000_attach, port->dvb.frontend,
30650961
MK
469 &i2c_bus->i2c_adap,
470 &dvico_xc5000_tunerconfig);
335377b7 471 break;
aef2d186
ST
472 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
473 i2c_bus = &dev->i2c_bus[port->nr - 1];
474
475 port->dvb.frontend = dvb_attach(zl10353_attach,
476 &dvico_fusionhdtv_xc3028,
477 &i2c_bus->i2c_adap);
478 if (port->dvb.frontend != NULL) {
479 struct dvb_frontend *fe;
480 struct xc2028_config cfg = {
481 .i2c_adap = &i2c_bus->i2c_adap,
482 .i2c_addr = 0x61,
aef2d186
ST
483 };
484 static struct xc2028_ctrl ctl = {
ef80bfeb 485 .fname = XC2028_DEFAULT_FIRMWARE,
aef2d186
ST
486 .max_len = 64,
487 .demod = XC3028_FE_ZARLINK456,
488 };
489
490 fe = dvb_attach(xc2028_attach, port->dvb.frontend,
491 &cfg);
492 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
493 fe->ops.tuner_ops.set_config(fe, &ctl);
494 }
495 break;
496 }
4c56b04a
ST
497 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
498 i2c_bus = &dev->i2c_bus[0];
499
500 port->dvb.frontend = dvb_attach(zl10353_attach,
501 &dvico_fusionhdtv_xc3028,
502 &i2c_bus->i2c_adap);
503 if (port->dvb.frontend != NULL) {
504 struct dvb_frontend *fe;
505 struct xc2028_config cfg = {
506 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
507 .i2c_addr = 0x61,
4c56b04a
ST
508 };
509 static struct xc2028_ctrl ctl = {
ef80bfeb 510 .fname = XC2028_DEFAULT_FIRMWARE,
4c56b04a
ST
511 .max_len = 64,
512 .demod = XC3028_FE_ZARLINK456,
513 };
514
515 fe = dvb_attach(xc2028_attach, port->dvb.frontend,
516 &cfg);
517 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
518 fe->ops.tuner_ops.set_config(fe, &ctl);
519 }
520 break;
d19770e5
ST
521 default:
522 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
523 dev->name);
524 break;
525 }
526 if (NULL == port->dvb.frontend) {
527 printk("%s: frontend initialization failed\n", dev->name);
528 return -1;
529 }
d7cba043
MK
530 /* define general-purpose callback pointer */
531 port->dvb.frontend->callback = cx23885_tuner_callback;
d19770e5
ST
532
533 /* Put the analog decoder in standby to keep it quiet */
f139fa71 534 cx23885_call_i2c_clients(i2c_bus, TUNER_SET_STANDBY, NULL);
d19770e5 535
3ba71d21
MK
536 if (port->dvb.frontend->ops.analog_ops.standby)
537 port->dvb.frontend->ops.analog_ops.standby(port->dvb.frontend);
538
d19770e5 539 /* register everything */
44a6481d 540 return videobuf_dvb_register(&port->dvb, THIS_MODULE, port,
78e92006 541 &dev->pci->dev, adapter_nr);
d19770e5
ST
542}
543
544int cx23885_dvb_register(struct cx23885_tsport *port)
545{
546 struct cx23885_dev *dev = port->dev;
547 int err;
548
22b4e64f 549 dprintk(1, "%s\n", __func__);
44a6481d 550 dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
d19770e5
ST
551 dev->board,
552 dev->name,
553 dev->pci_bus,
554 dev->pci_slot);
555
556 err = -ENODEV;
d19770e5
ST
557
558 /* dvb stuff */
559 printk("%s: cx23885 based dvb card\n", dev->name);
0705135e 560 videobuf_queue_sg_init(&port->dvb.dvbq, &dvb_qops, &dev->pci->dev, &port->slock,
44a6481d
MK
561 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
562 sizeof(struct cx23885_buffer), port);
d19770e5
ST
563 err = dvb_register(port);
564 if (err != 0)
22b4e64f 565 printk("%s() dvb_register failed err = %d\n", __func__, err);
d19770e5 566
d19770e5
ST
567 return err;
568}
569
570int cx23885_dvb_unregister(struct cx23885_tsport *port)
571{
572 /* dvb */
573 if(port->dvb.frontend)
574 videobuf_dvb_unregister(&port->dvb);
575
576 return 0;
577}
44a6481d
MK
578
579/*
580 * Local variables:
581 * c-basic-offset: 8
582 * End:
583 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
584*/