Commit | Line | Data |
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ddddfa78 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
b18787ed HV |
2 | /* |
3 | * v4l2-dv-timings - dv-timings helper functions | |
4 | * | |
5 | * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved. | |
b18787ed HV |
6 | */ |
7 | ||
8 | #include <linux/module.h> | |
9 | #include <linux/types.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/errno.h> | |
65243076 | 12 | #include <linux/rational.h> |
b18787ed HV |
13 | #include <linux/videodev2.h> |
14 | #include <linux/v4l2-dv-timings.h> | |
b18787ed | 15 | #include <media/v4l2-dv-timings.h> |
c9bc9f50 | 16 | #include <linux/math64.h> |
357a856a | 17 | #include <linux/hdmi.h> |
9cfd2753 | 18 | #include <media/cec.h> |
b18787ed | 19 | |
c4885ada HV |
20 | MODULE_AUTHOR("Hans Verkuil"); |
21 | MODULE_DESCRIPTION("V4L2 DV Timings Helper Functions"); | |
22 | MODULE_LICENSE("GPL"); | |
23 | ||
d1c65ad6 | 24 | const struct v4l2_dv_timings v4l2_dv_timings_presets[] = { |
b18787ed HV |
25 | V4L2_DV_BT_CEA_640X480P59_94, |
26 | V4L2_DV_BT_CEA_720X480I59_94, | |
27 | V4L2_DV_BT_CEA_720X480P59_94, | |
28 | V4L2_DV_BT_CEA_720X576I50, | |
29 | V4L2_DV_BT_CEA_720X576P50, | |
30 | V4L2_DV_BT_CEA_1280X720P24, | |
31 | V4L2_DV_BT_CEA_1280X720P25, | |
32 | V4L2_DV_BT_CEA_1280X720P30, | |
33 | V4L2_DV_BT_CEA_1280X720P50, | |
34 | V4L2_DV_BT_CEA_1280X720P60, | |
35 | V4L2_DV_BT_CEA_1920X1080P24, | |
36 | V4L2_DV_BT_CEA_1920X1080P25, | |
37 | V4L2_DV_BT_CEA_1920X1080P30, | |
38 | V4L2_DV_BT_CEA_1920X1080I50, | |
39 | V4L2_DV_BT_CEA_1920X1080P50, | |
40 | V4L2_DV_BT_CEA_1920X1080I60, | |
41 | V4L2_DV_BT_CEA_1920X1080P60, | |
42 | V4L2_DV_BT_DMT_640X350P85, | |
43 | V4L2_DV_BT_DMT_640X400P85, | |
44 | V4L2_DV_BT_DMT_720X400P85, | |
45 | V4L2_DV_BT_DMT_640X480P72, | |
46 | V4L2_DV_BT_DMT_640X480P75, | |
47 | V4L2_DV_BT_DMT_640X480P85, | |
48 | V4L2_DV_BT_DMT_800X600P56, | |
49 | V4L2_DV_BT_DMT_800X600P60, | |
50 | V4L2_DV_BT_DMT_800X600P72, | |
51 | V4L2_DV_BT_DMT_800X600P75, | |
52 | V4L2_DV_BT_DMT_800X600P85, | |
53 | V4L2_DV_BT_DMT_800X600P120_RB, | |
54 | V4L2_DV_BT_DMT_848X480P60, | |
55 | V4L2_DV_BT_DMT_1024X768I43, | |
56 | V4L2_DV_BT_DMT_1024X768P60, | |
57 | V4L2_DV_BT_DMT_1024X768P70, | |
58 | V4L2_DV_BT_DMT_1024X768P75, | |
59 | V4L2_DV_BT_DMT_1024X768P85, | |
60 | V4L2_DV_BT_DMT_1024X768P120_RB, | |
61 | V4L2_DV_BT_DMT_1152X864P75, | |
62 | V4L2_DV_BT_DMT_1280X768P60_RB, | |
63 | V4L2_DV_BT_DMT_1280X768P60, | |
64 | V4L2_DV_BT_DMT_1280X768P75, | |
65 | V4L2_DV_BT_DMT_1280X768P85, | |
66 | V4L2_DV_BT_DMT_1280X768P120_RB, | |
67 | V4L2_DV_BT_DMT_1280X800P60_RB, | |
68 | V4L2_DV_BT_DMT_1280X800P60, | |
69 | V4L2_DV_BT_DMT_1280X800P75, | |
70 | V4L2_DV_BT_DMT_1280X800P85, | |
71 | V4L2_DV_BT_DMT_1280X800P120_RB, | |
72 | V4L2_DV_BT_DMT_1280X960P60, | |
73 | V4L2_DV_BT_DMT_1280X960P85, | |
74 | V4L2_DV_BT_DMT_1280X960P120_RB, | |
75 | V4L2_DV_BT_DMT_1280X1024P60, | |
76 | V4L2_DV_BT_DMT_1280X1024P75, | |
77 | V4L2_DV_BT_DMT_1280X1024P85, | |
78 | V4L2_DV_BT_DMT_1280X1024P120_RB, | |
79 | V4L2_DV_BT_DMT_1360X768P60, | |
80 | V4L2_DV_BT_DMT_1360X768P120_RB, | |
81 | V4L2_DV_BT_DMT_1366X768P60, | |
82 | V4L2_DV_BT_DMT_1366X768P60_RB, | |
83 | V4L2_DV_BT_DMT_1400X1050P60_RB, | |
84 | V4L2_DV_BT_DMT_1400X1050P60, | |
85 | V4L2_DV_BT_DMT_1400X1050P75, | |
86 | V4L2_DV_BT_DMT_1400X1050P85, | |
87 | V4L2_DV_BT_DMT_1400X1050P120_RB, | |
88 | V4L2_DV_BT_DMT_1440X900P60_RB, | |
89 | V4L2_DV_BT_DMT_1440X900P60, | |
90 | V4L2_DV_BT_DMT_1440X900P75, | |
91 | V4L2_DV_BT_DMT_1440X900P85, | |
92 | V4L2_DV_BT_DMT_1440X900P120_RB, | |
93 | V4L2_DV_BT_DMT_1600X900P60_RB, | |
94 | V4L2_DV_BT_DMT_1600X1200P60, | |
95 | V4L2_DV_BT_DMT_1600X1200P65, | |
96 | V4L2_DV_BT_DMT_1600X1200P70, | |
97 | V4L2_DV_BT_DMT_1600X1200P75, | |
98 | V4L2_DV_BT_DMT_1600X1200P85, | |
99 | V4L2_DV_BT_DMT_1600X1200P120_RB, | |
100 | V4L2_DV_BT_DMT_1680X1050P60_RB, | |
101 | V4L2_DV_BT_DMT_1680X1050P60, | |
102 | V4L2_DV_BT_DMT_1680X1050P75, | |
103 | V4L2_DV_BT_DMT_1680X1050P85, | |
104 | V4L2_DV_BT_DMT_1680X1050P120_RB, | |
105 | V4L2_DV_BT_DMT_1792X1344P60, | |
106 | V4L2_DV_BT_DMT_1792X1344P75, | |
107 | V4L2_DV_BT_DMT_1792X1344P120_RB, | |
108 | V4L2_DV_BT_DMT_1856X1392P60, | |
109 | V4L2_DV_BT_DMT_1856X1392P75, | |
110 | V4L2_DV_BT_DMT_1856X1392P120_RB, | |
111 | V4L2_DV_BT_DMT_1920X1200P60_RB, | |
112 | V4L2_DV_BT_DMT_1920X1200P60, | |
113 | V4L2_DV_BT_DMT_1920X1200P75, | |
114 | V4L2_DV_BT_DMT_1920X1200P85, | |
115 | V4L2_DV_BT_DMT_1920X1200P120_RB, | |
116 | V4L2_DV_BT_DMT_1920X1440P60, | |
117 | V4L2_DV_BT_DMT_1920X1440P75, | |
118 | V4L2_DV_BT_DMT_1920X1440P120_RB, | |
119 | V4L2_DV_BT_DMT_2048X1152P60_RB, | |
120 | V4L2_DV_BT_DMT_2560X1600P60_RB, | |
121 | V4L2_DV_BT_DMT_2560X1600P60, | |
122 | V4L2_DV_BT_DMT_2560X1600P75, | |
123 | V4L2_DV_BT_DMT_2560X1600P85, | |
124 | V4L2_DV_BT_DMT_2560X1600P120_RB, | |
bc96f30c HV |
125 | V4L2_DV_BT_CEA_3840X2160P24, |
126 | V4L2_DV_BT_CEA_3840X2160P25, | |
127 | V4L2_DV_BT_CEA_3840X2160P30, | |
128 | V4L2_DV_BT_CEA_3840X2160P50, | |
129 | V4L2_DV_BT_CEA_3840X2160P60, | |
130 | V4L2_DV_BT_CEA_4096X2160P24, | |
131 | V4L2_DV_BT_CEA_4096X2160P25, | |
132 | V4L2_DV_BT_CEA_4096X2160P30, | |
133 | V4L2_DV_BT_CEA_4096X2160P50, | |
134 | V4L2_DV_BT_DMT_4096X2160P59_94_RB, | |
135 | V4L2_DV_BT_CEA_4096X2160P60, | |
d1c65ad6 | 136 | { } |
b18787ed | 137 | }; |
d1c65ad6 | 138 | EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets); |
b18787ed | 139 | |
70b65494 | 140 | bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t, |
b8f0fff4 HV |
141 | const struct v4l2_dv_timings_cap *dvcap, |
142 | v4l2_check_dv_timings_fnc fnc, | |
143 | void *fnc_handle) | |
b18787ed HV |
144 | { |
145 | const struct v4l2_bt_timings *bt = &t->bt; | |
146 | const struct v4l2_bt_timings_cap *cap = &dvcap->bt; | |
147 | u32 caps = cap->capabilities; | |
5eef2141 HV |
148 | const u32 max_vert = 10240; |
149 | u32 max_hor = 3 * bt->width; | |
b18787ed HV |
150 | |
151 | if (t->type != V4L2_DV_BT_656_1120) | |
152 | return false; | |
153 | if (t->type != dvcap->type || | |
154 | bt->height < cap->min_height || | |
155 | bt->height > cap->max_height || | |
156 | bt->width < cap->min_width || | |
157 | bt->width > cap->max_width || | |
158 | bt->pixelclock < cap->min_pixelclock || | |
159 | bt->pixelclock > cap->max_pixelclock || | |
8e20b803 HV |
160 | (!(caps & V4L2_DV_BT_CAP_CUSTOM) && |
161 | cap->standards && bt->standards && | |
c166845c | 162 | !(bt->standards & cap->standards)) || |
b18787ed HV |
163 | (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) || |
164 | (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE))) | |
165 | return false; | |
4b6d66a4 HV |
166 | |
167 | /* sanity checks for the blanking timings */ | |
168 | if (!bt->interlaced && | |
169 | (bt->il_vbackporch || bt->il_vsync || bt->il_vfrontporch)) | |
170 | return false; | |
5eef2141 HV |
171 | /* |
172 | * Some video receivers cannot properly separate the frontporch, | |
173 | * backporch and sync values, and instead they only have the total | |
174 | * blanking. That can be assigned to any of these three fields. | |
175 | * So just check that none of these are way out of range. | |
176 | */ | |
177 | if (bt->hfrontporch > max_hor || | |
178 | bt->hsync > max_hor || bt->hbackporch > max_hor) | |
4b6d66a4 | 179 | return false; |
5eef2141 HV |
180 | if (bt->vfrontporch > max_vert || |
181 | bt->vsync > max_vert || bt->vbackporch > max_vert) | |
4b6d66a4 | 182 | return false; |
5eef2141 HV |
183 | if (bt->interlaced && (bt->il_vfrontporch > max_vert || |
184 | bt->il_vsync > max_vert || bt->il_vbackporch > max_vert)) | |
4b6d66a4 | 185 | return false; |
b8f0fff4 | 186 | return fnc == NULL || fnc(t, fnc_handle); |
b18787ed | 187 | } |
70b65494 | 188 | EXPORT_SYMBOL_GPL(v4l2_valid_dv_timings); |
b18787ed HV |
189 | |
190 | int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t, | |
b8f0fff4 HV |
191 | const struct v4l2_dv_timings_cap *cap, |
192 | v4l2_check_dv_timings_fnc fnc, | |
193 | void *fnc_handle) | |
b18787ed HV |
194 | { |
195 | u32 i, idx; | |
196 | ||
197 | memset(t->reserved, 0, sizeof(t->reserved)); | |
d1c65ad6 | 198 | for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) { |
b8f0fff4 HV |
199 | if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap, |
200 | fnc, fnc_handle) && | |
b18787ed | 201 | idx++ == t->index) { |
d1c65ad6 | 202 | t->timings = v4l2_dv_timings_presets[i]; |
b18787ed HV |
203 | return 0; |
204 | } | |
205 | } | |
206 | return -EINVAL; | |
207 | } | |
208 | EXPORT_SYMBOL_GPL(v4l2_enum_dv_timings_cap); | |
209 | ||
210 | bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t, | |
211 | const struct v4l2_dv_timings_cap *cap, | |
b8f0fff4 HV |
212 | unsigned pclock_delta, |
213 | v4l2_check_dv_timings_fnc fnc, | |
214 | void *fnc_handle) | |
b18787ed HV |
215 | { |
216 | int i; | |
217 | ||
b8f0fff4 | 218 | if (!v4l2_valid_dv_timings(t, cap, fnc, fnc_handle)) |
b18787ed HV |
219 | return false; |
220 | ||
4108b3e6 | 221 | for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) { |
b8f0fff4 HV |
222 | if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap, |
223 | fnc, fnc_handle) && | |
224 | v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i, | |
85f9e06c | 225 | pclock_delta, false)) { |
8d7322f4 PL |
226 | u32 flags = t->bt.flags & V4L2_DV_FL_REDUCED_FPS; |
227 | ||
d1c65ad6 | 228 | *t = v4l2_dv_timings_presets[i]; |
8d7322f4 PL |
229 | if (can_reduce_fps(&t->bt)) |
230 | t->bt.flags |= flags; | |
231 | ||
b18787ed HV |
232 | return true; |
233 | } | |
234 | } | |
235 | return false; | |
236 | } | |
237 | EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cap); | |
25764158 | 238 | |
65243076 HV |
239 | bool v4l2_find_dv_timings_cea861_vic(struct v4l2_dv_timings *t, u8 vic) |
240 | { | |
241 | unsigned int i; | |
242 | ||
4108b3e6 | 243 | for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) { |
65243076 HV |
244 | const struct v4l2_bt_timings *bt = |
245 | &v4l2_dv_timings_presets[i].bt; | |
246 | ||
247 | if ((bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) && | |
248 | bt->cea861_vic == vic) { | |
249 | *t = v4l2_dv_timings_presets[i]; | |
250 | return true; | |
251 | } | |
252 | } | |
253 | return false; | |
254 | } | |
255 | EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cea861_vic); | |
256 | ||
25764158 | 257 | /** |
ef1ed8f5 | 258 | * v4l2_match_dv_timings - check if two timings match |
d28b2cf9 MCC |
259 | * @t1: compare this v4l2_dv_timings struct... |
260 | * @t2: with this struct. | |
261 | * @pclock_delta: the allowed pixelclock deviation. | |
262 | * @match_reduced_fps: if true, then fail if V4L2_DV_FL_REDUCED_FPS does not | |
4a3fad70 | 263 | * match. |
25764158 HV |
264 | * |
265 | * Compare t1 with t2 with a given margin of error for the pixelclock. | |
266 | */ | |
ef1ed8f5 HV |
267 | bool v4l2_match_dv_timings(const struct v4l2_dv_timings *t1, |
268 | const struct v4l2_dv_timings *t2, | |
85f9e06c | 269 | unsigned pclock_delta, bool match_reduced_fps) |
25764158 HV |
270 | { |
271 | if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120) | |
272 | return false; | |
273 | if (t1->bt.width == t2->bt.width && | |
274 | t1->bt.height == t2->bt.height && | |
275 | t1->bt.interlaced == t2->bt.interlaced && | |
276 | t1->bt.polarities == t2->bt.polarities && | |
277 | t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta && | |
278 | t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta && | |
279 | t1->bt.hfrontporch == t2->bt.hfrontporch && | |
74c9c0fe MR |
280 | t1->bt.hsync == t2->bt.hsync && |
281 | t1->bt.hbackporch == t2->bt.hbackporch && | |
25764158 HV |
282 | t1->bt.vfrontporch == t2->bt.vfrontporch && |
283 | t1->bt.vsync == t2->bt.vsync && | |
284 | t1->bt.vbackporch == t2->bt.vbackporch && | |
85f9e06c HV |
285 | (!match_reduced_fps || |
286 | (t1->bt.flags & V4L2_DV_FL_REDUCED_FPS) == | |
287 | (t2->bt.flags & V4L2_DV_FL_REDUCED_FPS)) && | |
25764158 HV |
288 | (!t1->bt.interlaced || |
289 | (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch && | |
290 | t1->bt.il_vsync == t2->bt.il_vsync && | |
291 | t1->bt.il_vbackporch == t2->bt.il_vbackporch))) | |
292 | return true; | |
293 | return false; | |
294 | } | |
ef1ed8f5 | 295 | EXPORT_SYMBOL_GPL(v4l2_match_dv_timings); |
25764158 | 296 | |
0216dc2f HV |
297 | void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix, |
298 | const struct v4l2_dv_timings *t, bool detailed) | |
299 | { | |
300 | const struct v4l2_bt_timings *bt = &t->bt; | |
301 | u32 htot, vtot; | |
227da85e | 302 | u32 fps; |
0216dc2f HV |
303 | |
304 | if (t->type != V4L2_DV_BT_656_1120) | |
305 | return; | |
306 | ||
307 | htot = V4L2_DV_BT_FRAME_WIDTH(bt); | |
308 | vtot = V4L2_DV_BT_FRAME_HEIGHT(bt); | |
8cf6874e HV |
309 | if (bt->interlaced) |
310 | vtot /= 2; | |
0216dc2f | 311 | |
227da85e PL |
312 | fps = (htot * vtot) > 0 ? div_u64((100 * (u64)bt->pixelclock), |
313 | (htot * vtot)) : 0; | |
314 | ||
0216dc2f HV |
315 | if (prefix == NULL) |
316 | prefix = ""; | |
317 | ||
1adbb827 | 318 | pr_info("%s: %s%ux%u%s%u.%02u (%ux%u)\n", dev_prefix, prefix, |
0216dc2f | 319 | bt->width, bt->height, bt->interlaced ? "i" : "p", |
227da85e | 320 | fps / 100, fps % 100, htot, vtot); |
0216dc2f HV |
321 | |
322 | if (!detailed) | |
323 | return; | |
324 | ||
325 | pr_info("%s: horizontal: fp = %u, %ssync = %u, bp = %u\n", | |
326 | dev_prefix, bt->hfrontporch, | |
327 | (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-", | |
328 | bt->hsync, bt->hbackporch); | |
329 | pr_info("%s: vertical: fp = %u, %ssync = %u, bp = %u\n", | |
330 | dev_prefix, bt->vfrontporch, | |
331 | (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", | |
332 | bt->vsync, bt->vbackporch); | |
8cf6874e HV |
333 | if (bt->interlaced) |
334 | pr_info("%s: vertical bottom field: fp = %u, %ssync = %u, bp = %u\n", | |
335 | dev_prefix, bt->il_vfrontporch, | |
336 | (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", | |
337 | bt->il_vsync, bt->il_vbackporch); | |
0216dc2f | 338 | pr_info("%s: pixelclock: %llu\n", dev_prefix, bt->pixelclock); |
65243076 HV |
339 | pr_info("%s: flags (0x%x):%s%s%s%s%s%s%s%s%s%s\n", |
340 | dev_prefix, bt->flags, | |
0216dc2f HV |
341 | (bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ? |
342 | " REDUCED_BLANKING" : "", | |
1b3b3841 HV |
343 | ((bt->flags & V4L2_DV_FL_REDUCED_BLANKING) && |
344 | bt->vsync == 8) ? " (V2)" : "", | |
0216dc2f HV |
345 | (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ? |
346 | " CAN_REDUCE_FPS" : "", | |
347 | (bt->flags & V4L2_DV_FL_REDUCED_FPS) ? | |
348 | " REDUCED_FPS" : "", | |
349 | (bt->flags & V4L2_DV_FL_HALF_LINE) ? | |
74d802d8 HV |
350 | " HALF_LINE" : "", |
351 | (bt->flags & V4L2_DV_FL_IS_CE_VIDEO) ? | |
7389e6ef CAC |
352 | " CE_VIDEO" : "", |
353 | (bt->flags & V4L2_DV_FL_FIRST_FIELD_EXTRA_LINE) ? | |
65243076 HV |
354 | " FIRST_FIELD_EXTRA_LINE" : "", |
355 | (bt->flags & V4L2_DV_FL_HAS_PICTURE_ASPECT) ? | |
356 | " HAS_PICTURE_ASPECT" : "", | |
357 | (bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) ? | |
358 | " HAS_CEA861_VIC" : "", | |
359 | (bt->flags & V4L2_DV_FL_HAS_HDMI_VIC) ? | |
360 | " HAS_HDMI_VIC" : ""); | |
7389e6ef | 361 | pr_info("%s: standards (0x%x):%s%s%s%s%s\n", dev_prefix, bt->standards, |
0216dc2f HV |
362 | (bt->standards & V4L2_DV_BT_STD_CEA861) ? " CEA" : "", |
363 | (bt->standards & V4L2_DV_BT_STD_DMT) ? " DMT" : "", | |
364 | (bt->standards & V4L2_DV_BT_STD_CVT) ? " CVT" : "", | |
7389e6ef CAC |
365 | (bt->standards & V4L2_DV_BT_STD_GTF) ? " GTF" : "", |
366 | (bt->standards & V4L2_DV_BT_STD_SDI) ? " SDI" : ""); | |
65243076 HV |
367 | if (bt->flags & V4L2_DV_FL_HAS_PICTURE_ASPECT) |
368 | pr_info("%s: picture aspect (hor:vert): %u:%u\n", dev_prefix, | |
369 | bt->picture_aspect.numerator, | |
370 | bt->picture_aspect.denominator); | |
371 | if (bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) | |
372 | pr_info("%s: CEA-861 VIC: %u\n", dev_prefix, bt->cea861_vic); | |
373 | if (bt->flags & V4L2_DV_FL_HAS_HDMI_VIC) | |
374 | pr_info("%s: HDMI VIC: %u\n", dev_prefix, bt->hdmi_vic); | |
0216dc2f HV |
375 | } |
376 | EXPORT_SYMBOL_GPL(v4l2_print_dv_timings); | |
377 | ||
65243076 HV |
378 | struct v4l2_fract v4l2_dv_timings_aspect_ratio(const struct v4l2_dv_timings *t) |
379 | { | |
380 | struct v4l2_fract ratio = { 1, 1 }; | |
381 | unsigned long n, d; | |
382 | ||
383 | if (t->type != V4L2_DV_BT_656_1120) | |
384 | return ratio; | |
385 | if (!(t->bt.flags & V4L2_DV_FL_HAS_PICTURE_ASPECT)) | |
386 | return ratio; | |
387 | ||
388 | ratio.numerator = t->bt.width * t->bt.picture_aspect.denominator; | |
389 | ratio.denominator = t->bt.height * t->bt.picture_aspect.numerator; | |
390 | ||
391 | rational_best_approximation(ratio.numerator, ratio.denominator, | |
392 | ratio.numerator, ratio.denominator, &n, &d); | |
393 | ratio.numerator = n; | |
394 | ratio.denominator = d; | |
395 | return ratio; | |
396 | } | |
397 | EXPORT_SYMBOL_GPL(v4l2_dv_timings_aspect_ratio); | |
398 | ||
87f9ed85 JA |
399 | /** v4l2_calc_timeperframe - helper function to calculate timeperframe based |
400 | * v4l2_dv_timings fields. | |
401 | * @t - Timings for the video mode. | |
402 | * | |
403 | * Calculates the expected timeperframe using the pixel clock value and | |
404 | * horizontal/vertical measures. This means that v4l2_dv_timings structure | |
405 | * must be correctly and fully filled. | |
406 | */ | |
407 | struct v4l2_fract v4l2_calc_timeperframe(const struct v4l2_dv_timings *t) | |
408 | { | |
409 | const struct v4l2_bt_timings *bt = &t->bt; | |
410 | struct v4l2_fract fps_fract = { 1, 1 }; | |
411 | unsigned long n, d; | |
412 | u32 htot, vtot, fps; | |
413 | u64 pclk; | |
414 | ||
415 | if (t->type != V4L2_DV_BT_656_1120) | |
416 | return fps_fract; | |
417 | ||
418 | htot = V4L2_DV_BT_FRAME_WIDTH(bt); | |
419 | vtot = V4L2_DV_BT_FRAME_HEIGHT(bt); | |
420 | pclk = bt->pixelclock; | |
421 | ||
422 | if ((bt->flags & V4L2_DV_FL_CAN_DETECT_REDUCED_FPS) && | |
423 | (bt->flags & V4L2_DV_FL_REDUCED_FPS)) | |
424 | pclk = div_u64(pclk * 1000ULL, 1001); | |
425 | ||
426 | fps = (htot * vtot) > 0 ? div_u64((100 * pclk), (htot * vtot)) : 0; | |
427 | if (!fps) | |
428 | return fps_fract; | |
429 | ||
430 | rational_best_approximation(fps, 100, fps, 100, &n, &d); | |
431 | ||
432 | fps_fract.numerator = d; | |
433 | fps_fract.denominator = n; | |
434 | return fps_fract; | |
435 | } | |
436 | EXPORT_SYMBOL_GPL(v4l2_calc_timeperframe); | |
437 | ||
25764158 HV |
438 | /* |
439 | * CVT defines | |
440 | * Based on Coordinated Video Timings Standard | |
441 | * version 1.1 September 10, 2003 | |
442 | */ | |
443 | ||
444 | #define CVT_PXL_CLK_GRAN 250000 /* pixel clock granularity */ | |
5fea1bb7 | 445 | #define CVT_PXL_CLK_GRAN_RB_V2 1000 /* granularity for reduced blanking v2*/ |
25764158 HV |
446 | |
447 | /* Normal blanking */ | |
448 | #define CVT_MIN_V_BPORCH 7 /* lines */ | |
449 | #define CVT_MIN_V_PORCH_RND 3 /* lines */ | |
450 | #define CVT_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */ | |
9c3f2052 | 451 | #define CVT_HSYNC_PERCENT 8 /* nominal hsync as percentage of line */ |
25764158 HV |
452 | |
453 | /* Normal blanking for CVT uses GTF to calculate horizontal blanking */ | |
454 | #define CVT_CELL_GRAN 8 /* character cell granularity */ | |
455 | #define CVT_M 600 /* blanking formula gradient */ | |
456 | #define CVT_C 40 /* blanking formula offset */ | |
457 | #define CVT_K 128 /* blanking formula scaling factor */ | |
458 | #define CVT_J 20 /* blanking formula scaling factor */ | |
459 | #define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J) | |
460 | #define CVT_M_PRIME (CVT_K * CVT_M / 256) | |
461 | ||
462 | /* Reduced Blanking */ | |
463 | #define CVT_RB_MIN_V_BPORCH 7 /* lines */ | |
464 | #define CVT_RB_V_FPORCH 3 /* lines */ | |
5fea1bb7 | 465 | #define CVT_RB_MIN_V_BLANK 460 /* us */ |
25764158 | 466 | #define CVT_RB_H_SYNC 32 /* pixels */ |
25764158 | 467 | #define CVT_RB_H_BLANK 160 /* pixels */ |
5fea1bb7 PL |
468 | /* Reduce blanking Version 2 */ |
469 | #define CVT_RB_V2_H_BLANK 80 /* pixels */ | |
470 | #define CVT_RB_MIN_V_FPORCH 3 /* lines */ | |
471 | #define CVT_RB_V2_MIN_V_FPORCH 1 /* lines */ | |
472 | #define CVT_RB_V_BPORCH 6 /* lines */ | |
25764158 HV |
473 | |
474 | /** v4l2_detect_cvt - detect if the given timings follow the CVT standard | |
475 | * @frame_height - the total height of the frame (including blanking) in lines. | |
476 | * @hfreq - the horizontal frequency in Hz. | |
477 | * @vsync - the height of the vertical sync in lines. | |
5fea1bb7 PL |
478 | * @active_width - active width of image (does not include blanking). This |
479 | * information is needed only in case of version 2 of reduced blanking. | |
480 | * In other cases, this parameter does not have any effect on timings. | |
25764158 HV |
481 | * @polarities - the horizontal and vertical polarities (same as struct |
482 | * v4l2_bt_timings polarities). | |
061ddda6 | 483 | * @interlaced - if this flag is true, it indicates interlaced format |
25764158 HV |
484 | * @fmt - the resulting timings. |
485 | * | |
486 | * This function will attempt to detect if the given values correspond to a | |
487 | * valid CVT format. If so, then it will return true, and fmt will be filled | |
488 | * in with the found CVT timings. | |
489 | */ | |
5fea1bb7 PL |
490 | bool v4l2_detect_cvt(unsigned frame_height, |
491 | unsigned hfreq, | |
492 | unsigned vsync, | |
493 | unsigned active_width, | |
494 | u32 polarities, | |
495 | bool interlaced, | |
496 | struct v4l2_dv_timings *fmt) | |
25764158 HV |
497 | { |
498 | int v_fp, v_bp, h_fp, h_bp, hsync; | |
499 | int frame_width, image_height, image_width; | |
500 | bool reduced_blanking; | |
5fea1bb7 | 501 | bool rb_v2 = false; |
25764158 HV |
502 | unsigned pix_clk; |
503 | ||
5fea1bb7 | 504 | if (vsync < 4 || vsync > 8) |
25764158 HV |
505 | return false; |
506 | ||
507 | if (polarities == V4L2_DV_VSYNC_POS_POL) | |
508 | reduced_blanking = false; | |
509 | else if (polarities == V4L2_DV_HSYNC_POS_POL) | |
510 | reduced_blanking = true; | |
511 | else | |
512 | return false; | |
513 | ||
5fea1bb7 PL |
514 | if (reduced_blanking && vsync == 8) |
515 | rb_v2 = true; | |
516 | ||
517 | if (rb_v2 && active_width == 0) | |
518 | return false; | |
519 | ||
520 | if (!rb_v2 && vsync > 7) | |
521 | return false; | |
522 | ||
947ed99e PL |
523 | if (hfreq == 0) |
524 | return false; | |
525 | ||
25764158 HV |
526 | /* Vertical */ |
527 | if (reduced_blanking) { | |
5fea1bb7 PL |
528 | if (rb_v2) { |
529 | v_bp = CVT_RB_V_BPORCH; | |
530 | v_fp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1; | |
531 | v_fp -= vsync + v_bp; | |
532 | ||
533 | if (v_fp < CVT_RB_V2_MIN_V_FPORCH) | |
534 | v_fp = CVT_RB_V2_MIN_V_FPORCH; | |
535 | } else { | |
536 | v_fp = CVT_RB_V_FPORCH; | |
537 | v_bp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1; | |
538 | v_bp -= vsync + v_fp; | |
539 | ||
540 | if (v_bp < CVT_RB_MIN_V_BPORCH) | |
541 | v_bp = CVT_RB_MIN_V_BPORCH; | |
542 | } | |
25764158 HV |
543 | } else { |
544 | v_fp = CVT_MIN_V_PORCH_RND; | |
f6747658 | 545 | v_bp = (CVT_MIN_VSYNC_BP * hfreq) / 1000000 + 1 - vsync; |
25764158 HV |
546 | |
547 | if (v_bp < CVT_MIN_V_BPORCH) | |
548 | v_bp = CVT_MIN_V_BPORCH; | |
549 | } | |
061ddda6 PL |
550 | |
551 | if (interlaced) | |
552 | image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1; | |
553 | else | |
554 | image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1; | |
25764158 | 555 | |
947ed99e PL |
556 | if (image_height < 0) |
557 | return false; | |
558 | ||
25764158 HV |
559 | /* Aspect ratio based on vsync */ |
560 | switch (vsync) { | |
561 | case 4: | |
562 | image_width = (image_height * 4) / 3; | |
563 | break; | |
564 | case 5: | |
565 | image_width = (image_height * 16) / 9; | |
566 | break; | |
567 | case 6: | |
568 | image_width = (image_height * 16) / 10; | |
569 | break; | |
570 | case 7: | |
571 | /* special case */ | |
572 | if (image_height == 1024) | |
573 | image_width = (image_height * 5) / 4; | |
574 | else if (image_height == 768) | |
575 | image_width = (image_height * 15) / 9; | |
576 | else | |
577 | return false; | |
578 | break; | |
5fea1bb7 PL |
579 | case 8: |
580 | image_width = active_width; | |
581 | break; | |
25764158 HV |
582 | default: |
583 | return false; | |
584 | } | |
585 | ||
5fea1bb7 PL |
586 | if (!rb_v2) |
587 | image_width = image_width & ~7; | |
25764158 HV |
588 | |
589 | /* Horizontal */ | |
590 | if (reduced_blanking) { | |
5fea1bb7 PL |
591 | int h_blank; |
592 | int clk_gran; | |
593 | ||
594 | h_blank = rb_v2 ? CVT_RB_V2_H_BLANK : CVT_RB_H_BLANK; | |
595 | clk_gran = rb_v2 ? CVT_PXL_CLK_GRAN_RB_V2 : CVT_PXL_CLK_GRAN; | |
596 | ||
597 | pix_clk = (image_width + h_blank) * hfreq; | |
598 | pix_clk = (pix_clk / clk_gran) * clk_gran; | |
25764158 | 599 | |
5fea1bb7 | 600 | h_bp = h_blank / 2; |
25764158 | 601 | hsync = CVT_RB_H_SYNC; |
5fea1bb7 | 602 | h_fp = h_blank - h_bp - hsync; |
25764158 | 603 | |
5fea1bb7 | 604 | frame_width = image_width + h_blank; |
25764158 | 605 | } else { |
c3e75c7d MB |
606 | unsigned ideal_duty_cycle_per_myriad = |
607 | 100 * CVT_C_PRIME - (CVT_M_PRIME * 100000) / hfreq; | |
25764158 | 608 | int h_blank; |
25764158 | 609 | |
c3e75c7d MB |
610 | if (ideal_duty_cycle_per_myriad < 2000) |
611 | ideal_duty_cycle_per_myriad = 2000; | |
25764158 | 612 | |
c3e75c7d MB |
613 | h_blank = image_width * ideal_duty_cycle_per_myriad / |
614 | (10000 - ideal_duty_cycle_per_myriad); | |
615 | h_blank = (h_blank / (2 * CVT_CELL_GRAN)) * 2 * CVT_CELL_GRAN; | |
25764158 HV |
616 | |
617 | pix_clk = (image_width + h_blank) * hfreq; | |
618 | pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN; | |
619 | ||
620 | h_bp = h_blank / 2; | |
621 | frame_width = image_width + h_blank; | |
622 | ||
9c3f2052 | 623 | hsync = frame_width * CVT_HSYNC_PERCENT / 100; |
d7ed5a3d | 624 | hsync = (hsync / CVT_CELL_GRAN) * CVT_CELL_GRAN; |
25764158 HV |
625 | h_fp = h_blank - hsync - h_bp; |
626 | } | |
627 | ||
074ca43f | 628 | fmt->type = V4L2_DV_BT_656_1120; |
25764158 HV |
629 | fmt->bt.polarities = polarities; |
630 | fmt->bt.width = image_width; | |
631 | fmt->bt.height = image_height; | |
632 | fmt->bt.hfrontporch = h_fp; | |
633 | fmt->bt.vfrontporch = v_fp; | |
634 | fmt->bt.hsync = hsync; | |
635 | fmt->bt.vsync = vsync; | |
636 | fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync; | |
061ddda6 PL |
637 | |
638 | if (!interlaced) { | |
639 | fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync; | |
640 | fmt->bt.interlaced = V4L2_DV_PROGRESSIVE; | |
641 | } else { | |
642 | fmt->bt.vbackporch = (frame_height - image_height - 2 * v_fp - | |
643 | 2 * vsync) / 2; | |
644 | fmt->bt.il_vbackporch = frame_height - image_height - 2 * v_fp - | |
645 | 2 * vsync - fmt->bt.vbackporch; | |
646 | fmt->bt.il_vfrontporch = v_fp; | |
647 | fmt->bt.il_vsync = vsync; | |
648 | fmt->bt.flags |= V4L2_DV_FL_HALF_LINE; | |
649 | fmt->bt.interlaced = V4L2_DV_INTERLACED; | |
650 | } | |
651 | ||
25764158 HV |
652 | fmt->bt.pixelclock = pix_clk; |
653 | fmt->bt.standards = V4L2_DV_BT_STD_CVT; | |
061ddda6 | 654 | |
25764158 HV |
655 | if (reduced_blanking) |
656 | fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING; | |
061ddda6 | 657 | |
25764158 HV |
658 | return true; |
659 | } | |
660 | EXPORT_SYMBOL_GPL(v4l2_detect_cvt); | |
661 | ||
662 | /* | |
663 | * GTF defines | |
664 | * Based on Generalized Timing Formula Standard | |
665 | * Version 1.1 September 2, 1999 | |
666 | */ | |
667 | ||
668 | #define GTF_PXL_CLK_GRAN 250000 /* pixel clock granularity */ | |
669 | ||
670 | #define GTF_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */ | |
671 | #define GTF_V_FP 1 /* vertical front porch (lines) */ | |
672 | #define GTF_CELL_GRAN 8 /* character cell granularity */ | |
673 | ||
674 | /* Default */ | |
675 | #define GTF_D_M 600 /* blanking formula gradient */ | |
676 | #define GTF_D_C 40 /* blanking formula offset */ | |
677 | #define GTF_D_K 128 /* blanking formula scaling factor */ | |
678 | #define GTF_D_J 20 /* blanking formula scaling factor */ | |
679 | #define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J) | |
680 | #define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256) | |
681 | ||
682 | /* Secondary */ | |
683 | #define GTF_S_M 3600 /* blanking formula gradient */ | |
684 | #define GTF_S_C 40 /* blanking formula offset */ | |
685 | #define GTF_S_K 128 /* blanking formula scaling factor */ | |
686 | #define GTF_S_J 35 /* blanking formula scaling factor */ | |
687 | #define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J) | |
688 | #define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256) | |
689 | ||
690 | /** v4l2_detect_gtf - detect if the given timings follow the GTF standard | |
691 | * @frame_height - the total height of the frame (including blanking) in lines. | |
692 | * @hfreq - the horizontal frequency in Hz. | |
693 | * @vsync - the height of the vertical sync in lines. | |
694 | * @polarities - the horizontal and vertical polarities (same as struct | |
695 | * v4l2_bt_timings polarities). | |
061ddda6 | 696 | * @interlaced - if this flag is true, it indicates interlaced format |
25764158 HV |
697 | * @aspect - preferred aspect ratio. GTF has no method of determining the |
698 | * aspect ratio in order to derive the image width from the | |
699 | * image height, so it has to be passed explicitly. Usually | |
700 | * the native screen aspect ratio is used for this. If it | |
701 | * is not filled in correctly, then 16:9 will be assumed. | |
702 | * @fmt - the resulting timings. | |
703 | * | |
704 | * This function will attempt to detect if the given values correspond to a | |
705 | * valid GTF format. If so, then it will return true, and fmt will be filled | |
706 | * in with the found GTF timings. | |
707 | */ | |
708 | bool v4l2_detect_gtf(unsigned frame_height, | |
709 | unsigned hfreq, | |
710 | unsigned vsync, | |
711 | u32 polarities, | |
061ddda6 | 712 | bool interlaced, |
25764158 HV |
713 | struct v4l2_fract aspect, |
714 | struct v4l2_dv_timings *fmt) | |
715 | { | |
716 | int pix_clk; | |
717 | int v_fp, v_bp, h_fp, hsync; | |
718 | int frame_width, image_height, image_width; | |
719 | bool default_gtf; | |
720 | int h_blank; | |
721 | ||
722 | if (vsync != 3) | |
723 | return false; | |
724 | ||
725 | if (polarities == V4L2_DV_VSYNC_POS_POL) | |
726 | default_gtf = true; | |
727 | else if (polarities == V4L2_DV_HSYNC_POS_POL) | |
728 | default_gtf = false; | |
729 | else | |
730 | return false; | |
731 | ||
947ed99e PL |
732 | if (hfreq == 0) |
733 | return false; | |
734 | ||
25764158 HV |
735 | /* Vertical */ |
736 | v_fp = GTF_V_FP; | |
f6747658 | 737 | v_bp = (GTF_MIN_VSYNC_BP * hfreq + 500000) / 1000000 - vsync; |
061ddda6 PL |
738 | if (interlaced) |
739 | image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1; | |
740 | else | |
741 | image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1; | |
25764158 | 742 | |
947ed99e PL |
743 | if (image_height < 0) |
744 | return false; | |
745 | ||
25764158 HV |
746 | if (aspect.numerator == 0 || aspect.denominator == 0) { |
747 | aspect.numerator = 16; | |
748 | aspect.denominator = 9; | |
749 | } | |
750 | image_width = ((image_height * aspect.numerator) / aspect.denominator); | |
257cc4b5 | 751 | image_width = (image_width + GTF_CELL_GRAN/2) & ~(GTF_CELL_GRAN - 1); |
25764158 HV |
752 | |
753 | /* Horizontal */ | |
c9bc9f50 PL |
754 | if (default_gtf) { |
755 | u64 num; | |
756 | u32 den; | |
757 | ||
758 | num = ((image_width * GTF_D_C_PRIME * (u64)hfreq) - | |
759 | ((u64)image_width * GTF_D_M_PRIME * 1000)); | |
dc0cf4cf PL |
760 | den = (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) * |
761 | (2 * GTF_CELL_GRAN); | |
c9bc9f50 | 762 | h_blank = div_u64((num + (den >> 1)), den); |
dc0cf4cf | 763 | h_blank *= (2 * GTF_CELL_GRAN); |
c9bc9f50 PL |
764 | } else { |
765 | u64 num; | |
766 | u32 den; | |
767 | ||
768 | num = ((image_width * GTF_S_C_PRIME * (u64)hfreq) - | |
769 | ((u64)image_width * GTF_S_M_PRIME * 1000)); | |
dc0cf4cf PL |
770 | den = (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) * |
771 | (2 * GTF_CELL_GRAN); | |
c9bc9f50 | 772 | h_blank = div_u64((num + (den >> 1)), den); |
dc0cf4cf | 773 | h_blank *= (2 * GTF_CELL_GRAN); |
c9bc9f50 | 774 | } |
25764158 | 775 | |
25764158 HV |
776 | frame_width = image_width + h_blank; |
777 | ||
778 | pix_clk = (image_width + h_blank) * hfreq; | |
779 | pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN; | |
780 | ||
781 | hsync = (frame_width * 8 + 50) / 100; | |
d9739338 | 782 | hsync = DIV_ROUND_CLOSEST(hsync, GTF_CELL_GRAN) * GTF_CELL_GRAN; |
25764158 HV |
783 | |
784 | h_fp = h_blank / 2 - hsync; | |
785 | ||
074ca43f | 786 | fmt->type = V4L2_DV_BT_656_1120; |
25764158 HV |
787 | fmt->bt.polarities = polarities; |
788 | fmt->bt.width = image_width; | |
789 | fmt->bt.height = image_height; | |
790 | fmt->bt.hfrontporch = h_fp; | |
791 | fmt->bt.vfrontporch = v_fp; | |
792 | fmt->bt.hsync = hsync; | |
793 | fmt->bt.vsync = vsync; | |
794 | fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync; | |
061ddda6 PL |
795 | |
796 | if (!interlaced) { | |
797 | fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync; | |
798 | fmt->bt.interlaced = V4L2_DV_PROGRESSIVE; | |
799 | } else { | |
800 | fmt->bt.vbackporch = (frame_height - image_height - 2 * v_fp - | |
801 | 2 * vsync) / 2; | |
802 | fmt->bt.il_vbackporch = frame_height - image_height - 2 * v_fp - | |
803 | 2 * vsync - fmt->bt.vbackporch; | |
804 | fmt->bt.il_vfrontporch = v_fp; | |
805 | fmt->bt.il_vsync = vsync; | |
806 | fmt->bt.flags |= V4L2_DV_FL_HALF_LINE; | |
807 | fmt->bt.interlaced = V4L2_DV_INTERLACED; | |
808 | } | |
809 | ||
25764158 HV |
810 | fmt->bt.pixelclock = pix_clk; |
811 | fmt->bt.standards = V4L2_DV_BT_STD_GTF; | |
061ddda6 | 812 | |
25764158 HV |
813 | if (!default_gtf) |
814 | fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING; | |
061ddda6 | 815 | |
25764158 HV |
816 | return true; |
817 | } | |
818 | EXPORT_SYMBOL_GPL(v4l2_detect_gtf); | |
819 | ||
820 | /** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes | |
821 | * 0x15 and 0x16 from the EDID. | |
822 | * @hor_landscape - byte 0x15 from the EDID. | |
823 | * @vert_portrait - byte 0x16 from the EDID. | |
824 | * | |
825 | * Determines the aspect ratio from the EDID. | |
826 | * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2: | |
827 | * "Horizontal and Vertical Screen Size or Aspect Ratio" | |
828 | */ | |
829 | struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait) | |
830 | { | |
831 | struct v4l2_fract aspect = { 16, 9 }; | |
25764158 HV |
832 | u8 ratio; |
833 | ||
834 | /* Nothing filled in, fallback to 16:9 */ | |
835 | if (!hor_landscape && !vert_portrait) | |
836 | return aspect; | |
837 | /* Both filled in, so they are interpreted as the screen size in cm */ | |
838 | if (hor_landscape && vert_portrait) { | |
839 | aspect.numerator = hor_landscape; | |
840 | aspect.denominator = vert_portrait; | |
841 | return aspect; | |
842 | } | |
843 | /* Only one is filled in, so interpret them as a ratio: | |
844 | (val + 99) / 100 */ | |
845 | ratio = hor_landscape | vert_portrait; | |
846 | /* Change some rounded values into the exact aspect ratio */ | |
847 | if (ratio == 79) { | |
848 | aspect.numerator = 16; | |
849 | aspect.denominator = 9; | |
850 | } else if (ratio == 34) { | |
851 | aspect.numerator = 4; | |
f71920ef | 852 | aspect.denominator = 3; |
25764158 HV |
853 | } else if (ratio == 68) { |
854 | aspect.numerator = 15; | |
f71920ef | 855 | aspect.denominator = 9; |
25764158 HV |
856 | } else { |
857 | aspect.numerator = hor_landscape + 99; | |
858 | aspect.denominator = 100; | |
859 | } | |
860 | if (hor_landscape) | |
861 | return aspect; | |
862 | /* The aspect ratio is for portrait, so swap numerator and denominator */ | |
fd752429 | 863 | swap(aspect.denominator, aspect.numerator); |
25764158 HV |
864 | return aspect; |
865 | } | |
866 | EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio); | |
357a856a HV |
867 | |
868 | /** v4l2_hdmi_rx_colorimetry - determine HDMI colorimetry information | |
869 | * based on various InfoFrames. | |
870 | * @avi: the AVI InfoFrame | |
871 | * @hdmi: the HDMI Vendor InfoFrame, may be NULL | |
872 | * @height: the frame height | |
873 | * | |
874 | * Determines the HDMI colorimetry information, i.e. how the HDMI | |
875 | * pixel color data should be interpreted. | |
876 | * | |
877 | * Note that some of the newer features (DCI-P3, HDR) are not yet | |
878 | * implemented: the hdmi.h header needs to be updated to the HDMI 2.0 | |
879 | * and CTA-861-G standards. | |
880 | */ | |
881 | struct v4l2_hdmi_colorimetry | |
882 | v4l2_hdmi_rx_colorimetry(const struct hdmi_avi_infoframe *avi, | |
883 | const struct hdmi_vendor_infoframe *hdmi, | |
884 | unsigned int height) | |
885 | { | |
886 | struct v4l2_hdmi_colorimetry c = { | |
887 | V4L2_COLORSPACE_SRGB, | |
888 | V4L2_YCBCR_ENC_DEFAULT, | |
889 | V4L2_QUANTIZATION_FULL_RANGE, | |
890 | V4L2_XFER_FUNC_SRGB | |
891 | }; | |
892 | bool is_ce = avi->video_code || (hdmi && hdmi->vic); | |
893 | bool is_sdtv = height <= 576; | |
894 | bool default_is_lim_range_rgb = avi->video_code > 1; | |
895 | ||
896 | switch (avi->colorspace) { | |
897 | case HDMI_COLORSPACE_RGB: | |
898 | /* RGB pixel encoding */ | |
899 | switch (avi->colorimetry) { | |
900 | case HDMI_COLORIMETRY_EXTENDED: | |
901 | switch (avi->extended_colorimetry) { | |
463659a0 | 902 | case HDMI_EXTENDED_COLORIMETRY_OPRGB: |
db034018 HV |
903 | c.colorspace = V4L2_COLORSPACE_OPRGB; |
904 | c.xfer_func = V4L2_XFER_FUNC_OPRGB; | |
357a856a HV |
905 | break; |
906 | case HDMI_EXTENDED_COLORIMETRY_BT2020: | |
907 | c.colorspace = V4L2_COLORSPACE_BT2020; | |
908 | c.xfer_func = V4L2_XFER_FUNC_709; | |
909 | break; | |
910 | default: | |
911 | break; | |
912 | } | |
913 | break; | |
914 | default: | |
915 | break; | |
916 | } | |
917 | switch (avi->quantization_range) { | |
918 | case HDMI_QUANTIZATION_RANGE_LIMITED: | |
919 | c.quantization = V4L2_QUANTIZATION_LIM_RANGE; | |
920 | break; | |
921 | case HDMI_QUANTIZATION_RANGE_FULL: | |
922 | break; | |
923 | default: | |
924 | if (default_is_lim_range_rgb) | |
925 | c.quantization = V4L2_QUANTIZATION_LIM_RANGE; | |
926 | break; | |
927 | } | |
928 | break; | |
929 | ||
930 | default: | |
931 | /* YCbCr pixel encoding */ | |
932 | c.quantization = V4L2_QUANTIZATION_LIM_RANGE; | |
933 | switch (avi->colorimetry) { | |
934 | case HDMI_COLORIMETRY_NONE: | |
935 | if (!is_ce) | |
936 | break; | |
937 | if (is_sdtv) { | |
938 | c.colorspace = V4L2_COLORSPACE_SMPTE170M; | |
939 | c.ycbcr_enc = V4L2_YCBCR_ENC_601; | |
940 | } else { | |
941 | c.colorspace = V4L2_COLORSPACE_REC709; | |
942 | c.ycbcr_enc = V4L2_YCBCR_ENC_709; | |
943 | } | |
944 | c.xfer_func = V4L2_XFER_FUNC_709; | |
945 | break; | |
946 | case HDMI_COLORIMETRY_ITU_601: | |
947 | c.colorspace = V4L2_COLORSPACE_SMPTE170M; | |
948 | c.ycbcr_enc = V4L2_YCBCR_ENC_601; | |
949 | c.xfer_func = V4L2_XFER_FUNC_709; | |
950 | break; | |
951 | case HDMI_COLORIMETRY_ITU_709: | |
952 | c.colorspace = V4L2_COLORSPACE_REC709; | |
953 | c.ycbcr_enc = V4L2_YCBCR_ENC_709; | |
954 | c.xfer_func = V4L2_XFER_FUNC_709; | |
955 | break; | |
956 | case HDMI_COLORIMETRY_EXTENDED: | |
957 | switch (avi->extended_colorimetry) { | |
958 | case HDMI_EXTENDED_COLORIMETRY_XV_YCC_601: | |
959 | c.colorspace = V4L2_COLORSPACE_REC709; | |
960 | c.ycbcr_enc = V4L2_YCBCR_ENC_XV709; | |
961 | c.xfer_func = V4L2_XFER_FUNC_709; | |
962 | break; | |
963 | case HDMI_EXTENDED_COLORIMETRY_XV_YCC_709: | |
964 | c.colorspace = V4L2_COLORSPACE_REC709; | |
965 | c.ycbcr_enc = V4L2_YCBCR_ENC_XV601; | |
966 | c.xfer_func = V4L2_XFER_FUNC_709; | |
967 | break; | |
968 | case HDMI_EXTENDED_COLORIMETRY_S_YCC_601: | |
969 | c.colorspace = V4L2_COLORSPACE_SRGB; | |
970 | c.ycbcr_enc = V4L2_YCBCR_ENC_601; | |
971 | c.xfer_func = V4L2_XFER_FUNC_SRGB; | |
972 | break; | |
463659a0 | 973 | case HDMI_EXTENDED_COLORIMETRY_OPYCC_601: |
db034018 | 974 | c.colorspace = V4L2_COLORSPACE_OPRGB; |
357a856a | 975 | c.ycbcr_enc = V4L2_YCBCR_ENC_601; |
db034018 | 976 | c.xfer_func = V4L2_XFER_FUNC_OPRGB; |
357a856a HV |
977 | break; |
978 | case HDMI_EXTENDED_COLORIMETRY_BT2020: | |
979 | c.colorspace = V4L2_COLORSPACE_BT2020; | |
980 | c.ycbcr_enc = V4L2_YCBCR_ENC_BT2020; | |
981 | c.xfer_func = V4L2_XFER_FUNC_709; | |
982 | break; | |
983 | case HDMI_EXTENDED_COLORIMETRY_BT2020_CONST_LUM: | |
984 | c.colorspace = V4L2_COLORSPACE_BT2020; | |
985 | c.ycbcr_enc = V4L2_YCBCR_ENC_BT2020_CONST_LUM; | |
986 | c.xfer_func = V4L2_XFER_FUNC_709; | |
987 | break; | |
988 | default: /* fall back to ITU_709 */ | |
989 | c.colorspace = V4L2_COLORSPACE_REC709; | |
990 | c.ycbcr_enc = V4L2_YCBCR_ENC_709; | |
991 | c.xfer_func = V4L2_XFER_FUNC_709; | |
992 | break; | |
993 | } | |
994 | break; | |
995 | default: | |
996 | break; | |
997 | } | |
998 | /* | |
999 | * YCC Quantization Range signaling is more-or-less broken, | |
1000 | * let's just ignore this. | |
1001 | */ | |
1002 | break; | |
1003 | } | |
1004 | return c; | |
1005 | } | |
1006 | EXPORT_SYMBOL_GPL(v4l2_hdmi_rx_colorimetry); | |
9cfd2753 HV |
1007 | |
1008 | /** | |
1009 | * v4l2_get_edid_phys_addr() - find and return the physical address | |
1010 | * | |
1011 | * @edid: pointer to the EDID data | |
1012 | * @size: size in bytes of the EDID data | |
1013 | * @offset: If not %NULL then the location of the physical address | |
1014 | * bytes in the EDID will be returned here. This is set to 0 | |
1015 | * if there is no physical address found. | |
1016 | * | |
1017 | * Return: the physical address or CEC_PHYS_ADDR_INVALID if there is none. | |
1018 | */ | |
1019 | u16 v4l2_get_edid_phys_addr(const u8 *edid, unsigned int size, | |
1020 | unsigned int *offset) | |
1021 | { | |
1022 | unsigned int loc = cec_get_edid_spa_location(edid, size); | |
1023 | ||
1024 | if (offset) | |
1025 | *offset = loc; | |
1026 | if (loc == 0) | |
1027 | return CEC_PHYS_ADDR_INVALID; | |
1028 | return (edid[loc] << 8) | edid[loc + 1]; | |
1029 | } | |
1030 | EXPORT_SYMBOL_GPL(v4l2_get_edid_phys_addr); | |
1031 | ||
1032 | /** | |
1033 | * v4l2_set_edid_phys_addr() - find and set the physical address | |
1034 | * | |
1035 | * @edid: pointer to the EDID data | |
1036 | * @size: size in bytes of the EDID data | |
1037 | * @phys_addr: the new physical address | |
1038 | * | |
1039 | * This function finds the location of the physical address in the EDID | |
1040 | * and fills in the given physical address and updates the checksum | |
1041 | * at the end of the EDID block. It does nothing if the EDID doesn't | |
1042 | * contain a physical address. | |
1043 | */ | |
1044 | void v4l2_set_edid_phys_addr(u8 *edid, unsigned int size, u16 phys_addr) | |
1045 | { | |
1046 | unsigned int loc = cec_get_edid_spa_location(edid, size); | |
1047 | u8 sum = 0; | |
1048 | unsigned int i; | |
1049 | ||
1050 | if (loc == 0) | |
1051 | return; | |
1052 | edid[loc] = phys_addr >> 8; | |
1053 | edid[loc + 1] = phys_addr & 0xff; | |
1054 | loc &= ~0x7f; | |
1055 | ||
1056 | /* update the checksum */ | |
1057 | for (i = loc; i < loc + 127; i++) | |
1058 | sum += edid[i]; | |
1059 | edid[i] = 256 - sum; | |
1060 | } | |
1061 | EXPORT_SYMBOL_GPL(v4l2_set_edid_phys_addr); | |
1062 | ||
1063 | /** | |
1064 | * v4l2_phys_addr_for_input() - calculate the PA for an input | |
1065 | * | |
1066 | * @phys_addr: the physical address of the parent | |
1067 | * @input: the number of the input port, must be between 1 and 15 | |
1068 | * | |
1069 | * This function calculates a new physical address based on the input | |
1070 | * port number. For example: | |
1071 | * | |
1072 | * PA = 0.0.0.0 and input = 2 becomes 2.0.0.0 | |
1073 | * | |
1074 | * PA = 3.0.0.0 and input = 1 becomes 3.1.0.0 | |
1075 | * | |
1076 | * PA = 3.2.1.0 and input = 5 becomes 3.2.1.5 | |
1077 | * | |
1078 | * PA = 3.2.1.3 and input = 5 becomes f.f.f.f since it maxed out the depth. | |
1079 | * | |
1080 | * Return: the new physical address or CEC_PHYS_ADDR_INVALID. | |
1081 | */ | |
1082 | u16 v4l2_phys_addr_for_input(u16 phys_addr, u8 input) | |
1083 | { | |
1084 | /* Check if input is sane */ | |
1085 | if (WARN_ON(input == 0 || input > 0xf)) | |
1086 | return CEC_PHYS_ADDR_INVALID; | |
1087 | ||
1088 | if (phys_addr == 0) | |
1089 | return input << 12; | |
1090 | ||
1091 | if ((phys_addr & 0x0fff) == 0) | |
1092 | return phys_addr | (input << 8); | |
1093 | ||
1094 | if ((phys_addr & 0x00ff) == 0) | |
1095 | return phys_addr | (input << 4); | |
1096 | ||
1097 | if ((phys_addr & 0x000f) == 0) | |
1098 | return phys_addr | input; | |
1099 | ||
1100 | /* | |
1101 | * All nibbles are used so no valid physical addresses can be assigned | |
1102 | * to the input. | |
1103 | */ | |
1104 | return CEC_PHYS_ADDR_INVALID; | |
1105 | } | |
1106 | EXPORT_SYMBOL_GPL(v4l2_phys_addr_for_input); | |
1107 | ||
1108 | /** | |
1109 | * v4l2_phys_addr_validate() - validate a physical address from an EDID | |
1110 | * | |
1111 | * @phys_addr: the physical address to validate | |
1112 | * @parent: if not %NULL, then this is filled with the parents PA. | |
1113 | * @port: if not %NULL, then this is filled with the input port. | |
1114 | * | |
1115 | * This validates a physical address as read from an EDID. If the | |
1116 | * PA is invalid (such as 1.0.1.0 since '0' is only allowed at the end), | |
1117 | * then it will return -EINVAL. | |
1118 | * | |
1119 | * The parent PA is passed into %parent and the input port is passed into | |
1120 | * %port. For example: | |
1121 | * | |
1122 | * PA = 0.0.0.0: has parent 0.0.0.0 and input port 0. | |
1123 | * | |
1124 | * PA = 1.0.0.0: has parent 0.0.0.0 and input port 1. | |
1125 | * | |
1126 | * PA = 3.2.0.0: has parent 3.0.0.0 and input port 2. | |
1127 | * | |
1128 | * PA = f.f.f.f: has parent f.f.f.f and input port 0. | |
1129 | * | |
1130 | * Return: 0 if the PA is valid, -EINVAL if not. | |
1131 | */ | |
1132 | int v4l2_phys_addr_validate(u16 phys_addr, u16 *parent, u16 *port) | |
1133 | { | |
1134 | int i; | |
1135 | ||
1136 | if (parent) | |
1137 | *parent = phys_addr; | |
1138 | if (port) | |
1139 | *port = 0; | |
1140 | if (phys_addr == CEC_PHYS_ADDR_INVALID) | |
1141 | return 0; | |
1142 | for (i = 0; i < 16; i += 4) | |
1143 | if (phys_addr & (0xf << i)) | |
1144 | break; | |
1145 | if (i == 16) | |
1146 | return 0; | |
1147 | if (parent) | |
1148 | *parent = phys_addr & (0xfff0 << i); | |
1149 | if (port) | |
1150 | *port = (phys_addr >> i) & 0xf; | |
1151 | for (i += 4; i < 16; i += 4) | |
1152 | if ((phys_addr & (0xf << i)) == 0) | |
1153 | return -EINVAL; | |
1154 | return 0; | |
1155 | } | |
1156 | EXPORT_SYMBOL_GPL(v4l2_phys_addr_validate); |