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Merge branch 'core-objtool-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-block.git] / drivers / media / usb / em28xx / em28xx-dvb.c
CommitLineData
f22e9e71
MCC		 1// SPDX-License-Identifier: GPL-2.0
2//
3// DVB device driver for em28xx
4//
32590819 5// (c) 2008-2011 Mauro Carvalho Chehab <mchehab@kernel.org>
f22e9e71
MCC		 6//
7// (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com>
8// - Fixes for the driver to properly work with HVR-950
9// - Fixes for the driver to properly work with Pinnacle PCTV HD Pro Stick
10// - Fixes for the driver to properly work with AMD ATI TV Wonder HD 600
11//
12// (c) 2008 Aidan Thornton <makosoft@googlemail.com>
13//
14// (c) 2012 Frank Schäfer <fschaefer.oss@googlemail.com>
15//
16// Based on cx88-dvb, saa7134-dvb and videobuf-dvb originally written by:
17// (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
18// (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
19//
20// This program is free software; you can redistribute it and/or modify
21// it under the terms of the GNU General Public License as published by
22// the Free Software Foundation version 2 of the License.
3aefb79a 23
8314d402
MCC		 24#include "em28xx.h"
25
3aefb79a 26#include <linux/kernel.h>
5a0e3ad6 27#include <linux/slab.h>
3aefb79a
MCC		 28#include <linux/usb.h>
29
3aefb79a 30#include <media/v4l2-common.h>
fada1935
MCC		 31#include <media/dvb_demux.h>
32#include <media/dvb_net.h>
33#include <media/dmxdev.h>
d7de5d8f
FM		 34#include <media/tuner.h>
35#include "tuner-simple.h"
1e8f31f3 36#include <linux/gpio.h>
3aefb79a
MCC		 37
38#include "lgdt330x.h"
7e48b30a 39#include "lgdt3305.h"
1586342e 40#include "lgdt3306a.h"
7e6388a1 41#include "zl10353.h"
6e7b9ea0 42#include "s5h1409.h"
8c47311d 43#include "mt2060.h"
4fb202a8
DH		 44#include "mt352.h"
45#include "mt352_priv.h" /* FIXME */
285eb1a4 46#include "tda1002x.h"
38b2df95 47#include "drx39xyj/drx39xxj.h"
7e48b30a 48#include "tda18271.h"
ca3dfd6a 49#include "s921.h"
75e2b869 50#include "drxd.h"
d6a5f921 51#include "cxd2820r.h"
fec528b7
MCC		 52#include "tda18271c2dd.h"
53#include "drxk.h"
36588715 54#include "tda10071.h"
02bc1f55 55#include "tda18212.h"
36588715 56#include "a8293.h"
1985f6fb 57#include "qt1010.h"
4159d01b 58#include "mb86a20s.h"
ec573362 59#include "m88ds3103.h"
83c1b6ce 60#include "ts2020.h"
19229240
AP		 61#include "si2168.h"
62#include "si2157.h"
ab4d1452
SN		 63#include "tc90522.h"
64#include "qm1d1c0042.h"
3aefb79a 65
32590819 66MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@kernel.org>");
f22e9e71 67MODULE_LICENSE("GPL v2");
d8992b09
MCC		 68MODULE_DESCRIPTION(DRIVER_DESC " - digital TV interface");
69MODULE_VERSION(EM28XX_VERSION);
70
3aefb79a
MCC		 71static unsigned int debug;
72module_param(debug, int, 0644);
73MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
74
75DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
76
ce8591ff
MCC		 77#define dprintk(level, fmt, arg...) do { \
78 if (debug >= level) \
29b05e22 79 dev_printk(KERN_DEBUG, &dev->intf->dev, \
ce8591ff 80 "dvb: " fmt, ## arg); \
3aefb79a
MCC		 81} while (0)
82
3421b778 83struct em28xx_dvb {
f71095be 84 struct dvb_frontend *fe[2];
3421b778
AT		 85
86 /* feed count management */
87 struct mutex lock;
88 int nfeeds;
89
90 /* general boilerplate stuff */
91 struct dvb_adapter adapter;
92 struct dvb_demux demux;
93 struct dmxdev dmxdev;
94 struct dmx_frontend fe_hw;
95 struct dmx_frontend fe_mem;
96 struct dvb_net net;
fec528b7 97
c4c3a3d3 98 /* Due to DRX-K - probably need changes */
fe8d54f0 99 int (*gate_ctrl)(struct dvb_frontend *fe, int gate);
fec528b7 100 struct semaphore pll_mutex;
c4c3a3d3 101 bool dont_attach_fe1;
13a5336e 102 int lna_gpio;
19229240 103 struct i2c_client *i2c_client_demod;
eafa2ad6 104 struct i2c_client *i2c_client_tuner;
7098f582 105 struct i2c_client *i2c_client_sec;
3421b778
AT		 106};
107
3421b778 108static inline void print_err_status(struct em28xx *dev,
fdf1bc9f 109 int packet, int status)
3aefb79a 110{
3421b778 111 char *errmsg = "Unknown";
3aefb79a 112
3421b778
AT		 113 switch (status) {
114 case -ENOENT:
b436e26e 115 errmsg = "unlinked synchronously";
3421b778
AT		 116 break;
117 case -ECONNRESET:
b436e26e 118 errmsg = "unlinked asynchronously";
3421b778
AT		 119 break;
120 case -ENOSR:
121 errmsg = "Buffer error (overrun)";
122 break;
123 case -EPIPE:
124 errmsg = "Stalled (device not responding)";
125 break;
126 case -EOVERFLOW:
127 errmsg = "Babble (bad cable?)";
128 break;
129 case -EPROTO:
130 errmsg = "Bit-stuff error (bad cable?)";
131 break;
132 case -EILSEQ:
133 errmsg = "CRC/Timeout (could be anything)";
134 break;
135 case -ETIME:
136 errmsg = "Device does not respond";
137 break;
138 }
139 if (packet < 0) {
140 dprintk(1, "URB status %d [%s].\n", status, errmsg);
141 } else {
6ea54d93
DSL		 142 dprintk(1, "URB packet %d, status %d [%s].\n",
143 packet, status, errmsg);
3421b778
AT		 144 }
145}
3aefb79a 146
a950e4a7 147static inline int em28xx_dvb_urb_data_copy(struct em28xx *dev, struct urb *urb)
3421b778 148{
a950e4a7 149 int xfer_bulk, num_packets, i;
3aefb79a 150
3421b778
AT		 151 if (!dev)
152 return 0;
3aefb79a 153
2665c299 154 if (dev->disconnected)
3421b778
AT		 155 return 0;
156
1653cb0c 157 if (urb->status < 0)
3421b778 158 print_err_status(dev, -1, urb->status);
3421b778 159
a950e4a7
FS		 160 xfer_bulk = usb_pipebulk(urb->pipe);
161
162 if (xfer_bulk) /* bulk */
163 num_packets = 1;
164 else /* isoc */
165 num_packets = urb->number_of_packets;
166
167 for (i = 0; i < num_packets; i++) {
168 if (xfer_bulk) {
169 if (urb->status < 0) {
170 print_err_status(dev, i, urb->status);
171 if (urb->status != -EPROTO)
172 continue;
173 }
ffdeca88
MCC		 174 if (!urb->actual_length)
175 continue;
a950e4a7 176 dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer,
fdf1bc9f 177 urb->actual_length);
a950e4a7
FS		 178 } else {
179 if (urb->iso_frame_desc[i].status < 0) {
180 print_err_status(dev, i,
181 urb->iso_frame_desc[i].status);
182 if (urb->iso_frame_desc[i].status != -EPROTO)
183 continue;
184 }
ffdeca88
MCC		 185 if (!urb->iso_frame_desc[i].actual_length)
186 continue;
a950e4a7
FS		 187 dvb_dmx_swfilter(&dev->dvb->demux,
188 urb->transfer_buffer +
189 urb->iso_frame_desc[i].offset,
190 urb->iso_frame_desc[i].actual_length);
3421b778 191 }
3421b778
AT		 192 }
193
194 return 0;
195}
196
f2d0c1c6 197static int em28xx_start_streaming(struct em28xx_dvb *dvb)
6ea54d93 198{
c67ec53f 199 int rc;
3de09fbb
HV		 200 struct em28xx_i2c_bus *i2c_bus = dvb->adapter.priv;
201 struct em28xx *dev = i2c_bus->dev;
509f8965 202 struct usb_device *udev = interface_to_usbdev(dev->intf);
c647a91a
FS		 203 int dvb_max_packet_size, packet_multiplier, dvb_alt;
204
205 if (dev->dvb_xfer_bulk) {
206 if (!dev->dvb_ep_bulk)
207 return -ENODEV;
208 dvb_max_packet_size = 512; /* USB 2.0 spec */
209 packet_multiplier = EM28XX_DVB_BULK_PACKET_MULTIPLIER;
210 dvb_alt = 0;
211 } else { /* isoc */
212 if (!dev->dvb_ep_isoc)
213 return -ENODEV;
214 dvb_max_packet_size = dev->dvb_max_pkt_size_isoc;
215 if (dvb_max_packet_size < 0)
216 return dvb_max_packet_size;
217 packet_multiplier = EM28XX_DVB_NUM_ISOC_PACKETS;
218 dvb_alt = dev->dvb_alt_isoc;
219 }
3421b778 220
a7853c25
BL		 221 if (!dev->board.has_dual_ts)
222 usb_set_interface(udev, dev->ifnum, dvb_alt);
223
c67ec53f
MCC		 224 rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
225 if (rc < 0)
226 return rc;
3421b778 227
52f7b00e 228 dprintk(1, "Using %d buffers each with %d x %d bytes, alternate %d\n",
f7acc4bb 229 EM28XX_DVB_NUM_BUFS,
c647a91a 230 packet_multiplier,
52f7b00e 231 dvb_max_packet_size, dvb_alt);
d18e2fda 232
c647a91a
FS		 233 return em28xx_init_usb_xfer(dev, EM28XX_DIGITAL_MODE,
234 dev->dvb_xfer_bulk,
057ca0da 235 EM28XX_DVB_NUM_BUFS,
c647a91a
FS		 236 dvb_max_packet_size,
237 packet_multiplier,
a950e4a7 238 em28xx_dvb_urb_data_copy);
3421b778
AT		 239}
240
f2d0c1c6 241static int em28xx_stop_streaming(struct em28xx_dvb *dvb)
6ea54d93 242{
3de09fbb
HV		 243 struct em28xx_i2c_bus *i2c_bus = dvb->adapter.priv;
244 struct em28xx *dev = i2c_bus->dev;
3421b778 245
5f5f147f 246 em28xx_stop_urbs(dev);
c67ec53f 247
3aefb79a
MCC		 248 return 0;
249}
250
f2d0c1c6 251static int em28xx_start_feed(struct dvb_demux_feed *feed)
3421b778
AT		 252{
253 struct dvb_demux *demux = feed->demux;
254 struct em28xx_dvb *dvb = demux->priv;
255 int rc, ret;
256
257 if (!demux->dmx.frontend)
258 return -EINVAL;
259
260 mutex_lock(&dvb->lock);
261 dvb->nfeeds++;
262 rc = dvb->nfeeds;
263
264 if (dvb->nfeeds == 1) {
f2d0c1c6 265 ret = em28xx_start_streaming(dvb);
6ea54d93
DSL		 266 if (ret < 0)
267 rc = ret;
3421b778
AT		 268 }
269
270 mutex_unlock(&dvb->lock);
271 return rc;
272}
273
f2d0c1c6 274static int em28xx_stop_feed(struct dvb_demux_feed *feed)
3421b778
AT		 275{
276 struct dvb_demux *demux = feed->demux;
277 struct em28xx_dvb *dvb = demux->priv;
278 int err = 0;
279
280 mutex_lock(&dvb->lock);
281 dvb->nfeeds--;
6ea54d93 282
fe8d54f0 283 if (!dvb->nfeeds)
f2d0c1c6 284 err = em28xx_stop_streaming(dvb);
6ea54d93 285
3421b778
AT		 286 mutex_unlock(&dvb->lock);
287 return err;
288}
289
e3569abc
MCC		 290/* ------------------------------------------------------------------ */
291static int em28xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
292{
a3b60209 293 struct em28xx_i2c_bus *i2c_bus = fe->dvb->priv;
9634614f 294 struct em28xx *dev = i2c_bus->dev;
e3569abc
MCC		 295
296 if (acquire)
297 return em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
298 else
2fe3e2ee 299 return em28xx_set_mode(dev, EM28XX_SUSPEND);
e3569abc
MCC		 300}
301
3aefb79a
MCC		 302/* ------------------------------------------------------------------ */
303
227ad4ab 304static struct lgdt330x_config em2880_lgdt3303_dev = {
227ad4ab
MCC		 305 .demod_chip = LGDT3303,
306};
3aefb79a 307
7e48b30a
JW		 308static struct lgdt3305_config em2870_lgdt3304_dev = {
309 .i2c_addr = 0x0e,
310 .demod_chip = LGDT3304,
311 .spectral_inversion = 1,
312 .deny_i2c_rptr = 1,
313 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
314 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
315 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
316 .vsb_if_khz = 3250,
317 .qam_if_khz = 4000,
318};
319
6dbea9f0
JFT		 320static struct lgdt3305_config em2874_lgdt3305_dev = {
321 .i2c_addr = 0x0e,
322 .demod_chip = LGDT3305,
323 .spectral_inversion = 1,
324 .deny_i2c_rptr = 0,
325 .mpeg_mode = LGDT3305_MPEG_SERIAL,
326 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
327 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
328 .vsb_if_khz = 3250,
329 .qam_if_khz = 4000,
330};
331
02bc1f55
MCC		 332static struct lgdt3305_config em2874_lgdt3305_nogate_dev = {
333 .i2c_addr = 0x0e,
334 .demod_chip = LGDT3305,
335 .spectral_inversion = 1,
336 .deny_i2c_rptr = 1,
337 .mpeg_mode = LGDT3305_MPEG_SERIAL,
338 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
339 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
340 .vsb_if_khz = 3600,
341 .qam_if_khz = 3600,
342};
343
ca3dfd6a
MCC		 344static struct s921_config sharp_isdbt = {
345 .demod_address = 0x30 >> 1
346};
347
7e6388a1
AT		 348static struct zl10353_config em28xx_zl10353_with_xc3028 = {
349 .demod_address = (0x1e >> 1),
350 .no_tuner = 1,
351 .parallel_ts = 1,
352 .if2 = 45600,
353};
354
6e7b9ea0
RK		 355static struct s5h1409_config em28xx_s5h1409_with_xc3028 = {
356 .demod_address = 0x32 >> 1,
357 .output_mode = S5H1409_PARALLEL_OUTPUT,
358 .gpio = S5H1409_GPIO_OFF,
359 .inversion = S5H1409_INVERSION_OFF,
360 .status_mode = S5H1409_DEMODLOCKING,
ad05ff09 361 .mpeg_timing = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK
6e7b9ea0
RK		 362};
363
7e48b30a
JW		 364static struct tda18271_std_map kworld_a340_std_map = {
365 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 0,
366 .if_lvl = 1, .rfagc_top = 0x37, },
367 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 1,
368 .if_lvl = 1, .rfagc_top = 0x37, },
369};
370
371static struct tda18271_config kworld_a340_config = {
372 .std_map = &kworld_a340_std_map,
373};
374
6dbea9f0
JFT		 375static struct tda18271_config kworld_ub435q_v2_config = {
376 .std_map = &kworld_a340_std_map,
377 .gate = TDA18271_GATE_DIGITAL,
378};
379
02bc1f55 380static struct tda18212_config kworld_ub435q_v3_config = {
02bc1f55
MCC		 381 .if_atsc_vsb = 3600,
382 .if_atsc_qam = 3600,
383};
384
a84f79ae 385static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = {
f797608c
DH		 386 .demod_address = (0x1e >> 1),
387 .no_tuner = 1,
388 .disable_i2c_gate_ctrl = 1,
389 .parallel_ts = 1,
390 .if2 = 45600,
391};
392
75e2b869 393static struct drxd_config em28xx_drxd = {
aac865f7
MCC		 394 .demod_address = 0x70,
395 .demod_revision = 0xa2,
396 .pll_type = DRXD_PLL_NONE,
397 .clock = 12000,
398 .insert_rs_byte = 1,
399 .IF = 42800000,
6b142b3c 400 .disable_i2c_gate_ctrl = 1,
17d9d558 401};
17d9d558 402
61bdbef0 403static struct drxk_config terratec_h5_drxk = {
fec528b7 404 .adr = 0x29,
e4f4f875 405 .single_master = 1,
f1fe1b75 406 .no_i2c_bridge = 1,
8b9456ae 407 .microcode_name = "dvb-usb-terratec-h5-drxk.fw",
9e23f50a 408 .qam_demod_parameter_count = 2,
fec528b7
MCC		 409};
410
61bdbef0 411static struct drxk_config hauppauge_930c_drxk = {
82e7dbbd
EDP		 412 .adr = 0x29,
413 .single_master = 1,
414 .no_i2c_bridge = 1,
415 .microcode_name = "dvb-usb-hauppauge-hvr930c-drxk.fw",
416 .chunk_size = 56,
9e23f50a 417 .qam_demod_parameter_count = 2,
82e7dbbd
EDP		 418};
419
89040136 420static struct drxk_config terratec_htc_stick_drxk = {
c8dce008
MB		 421 .adr = 0x29,
422 .single_master = 1,
423 .no_i2c_bridge = 1,
424 .microcode_name = "dvb-usb-terratec-htc-stick-drxk.fw",
425 .chunk_size = 54,
9e23f50a 426 .qam_demod_parameter_count = 2,
c8dce008
MB		 427 /* Required for the antenna_gpio to disable LNA. */
428 .antenna_dvbt = true,
429 /* The windows driver uses the same. This will disable LNA. */
430 .antenna_gpio = 0x6,
431};
432
61bdbef0 433static struct drxk_config maxmedia_ub425_tc_drxk = {
3553085c
AP		 434 .adr = 0x29,
435 .single_master = 1,
436 .no_i2c_bridge = 1,
8d100b27
AP		 437 .microcode_name = "dvb-demod-drxk-01.fw",
438 .chunk_size = 62,
de0fc463 439 .qam_demod_parameter_count = 2,
3553085c
AP		 440};
441
61bdbef0 442static struct drxk_config pctv_520e_drxk = {
c247d7b1
AP		 443 .adr = 0x29,
444 .single_master = 1,
445 .microcode_name = "dvb-demod-drxk-pctv.fw",
9e23f50a 446 .qam_demod_parameter_count = 2,
c247d7b1 447 .chunk_size = 58,
f6f379df
AP		 448 .antenna_dvbt = true, /* disable LNA */
449 .antenna_gpio = (1 << 2), /* disable LNA */
c247d7b1
AP		 450};
451
fec528b7
MCC		 452static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
453{
454 struct em28xx_dvb *dvb = fe->sec_priv;
455 int status;
456
457 if (!dvb)
458 return -EINVAL;
459
460 if (enable) {
461 down(&dvb->pll_mutex);
462 status = dvb->gate_ctrl(fe, 1);
463 } else {
464 status = dvb->gate_ctrl(fe, 0);
465 up(&dvb->pll_mutex);
466 }
467 return status;
468}
469
82e7dbbd
EDP		 470static void hauppauge_hvr930c_init(struct em28xx *dev)
471{
472 int i;
473
ba0c8e6e 474 static const struct em28xx_reg_seq hauppauge_hvr930c_init[] = {
907d109b
FS		 475 {EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 0x65},
476 {EM2874_R80_GPIO_P0_CTRL, 0xfb, 0xff, 0x32},
477 {EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 0xb8},
b68cafc5 478 { -1, -1, -1, -1},
82e7dbbd 479 };
ba0c8e6e 480 static const struct em28xx_reg_seq hauppauge_hvr930c_end[] = {
907d109b
FS		 481 {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x01},
482 {EM2874_R80_GPIO_P0_CTRL, 0xaf, 0xff, 0x65},
483 {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x76},
484 {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x01},
485 {EM2874_R80_GPIO_P0_CTRL, 0xcf, 0xff, 0x0b},
486 {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x40},
487
488 {EM2874_R80_GPIO_P0_CTRL, 0xcf, 0xff, 0x65},
489 {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x65},
490 {EM2874_R80_GPIO_P0_CTRL, 0xcf, 0xff, 0x0b},
491 {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x65},
82e7dbbd 492
b68cafc5 493 { -1, -1, -1, -1},
82e7dbbd
EDP		 494 };
495
ba0c8e6e 496 static const struct {
82e7dbbd
EDP		 497 unsigned char r[4];
498 int len;
499 } regs[] = {
500 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
501 {{ 0x01, 0x02 }, 2},
502 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
503 {{ 0x01, 0x00 }, 2},
504 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
505 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
506 {{ 0x01, 0x00 }, 2},
507 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
508 {{ 0x04, 0x00 }, 2},
509 {{ 0x00, 0x04 }, 2},
510 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
511 {{ 0x04, 0x14 }, 2},
512 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
513 };
514
515 em28xx_gpio_set(dev, hauppauge_hvr930c_init);
516 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
fe8d54f0 517 usleep_range(10000, 11000);
82e7dbbd 518 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
fe8d54f0 519 usleep_range(10000, 11000);
82e7dbbd 520
c7a45e5b 521 dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1;
82e7dbbd
EDP		 522
523 for (i = 0; i < ARRAY_SIZE(regs); i++)
fe8d54f0
MCC		 524 i2c_master_send(&dev->i2c_client[dev->def_i2c_bus],
525 regs[i].r, regs[i].len);
82e7dbbd
EDP		 526 em28xx_gpio_set(dev, hauppauge_hvr930c_end);
527
528 msleep(100);
529
530 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
531 msleep(30);
532
82e7dbbd 533 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45);
fe8d54f0 534 usleep_range(10000, 11000);
82e7dbbd
EDP		 535}
536
fec528b7
MCC		 537static void terratec_h5_init(struct em28xx *dev)
538{
539 int i;
ba0c8e6e 540 static const struct em28xx_reg_seq terratec_h5_init[] = {
c074fc4c 541 {EM2820_R08_GPIO_CTRL, 0xff, 0xff, 10},
907d109b
FS		 542 {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
543 {EM2874_R80_GPIO_P0_CTRL, 0xf2, 0xff, 50},
544 {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
b68cafc5 545 { -1, -1, -1, -1},
fec528b7 546 };
ba0c8e6e 547 static const struct em28xx_reg_seq terratec_h5_end[] = {
907d109b
FS		 548 {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
549 {EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 50},
550 {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
b68cafc5 551 { -1, -1, -1, -1},
fec528b7 552 };
ba0c8e6e 553 static const struct {
fec528b7
MCC		 554 unsigned char r[4];
555 int len;
556 } regs[] = {
557 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
558 {{ 0x01, 0x02 }, 2},
559 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
560 {{ 0x01, 0x00 }, 2},
561 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
562 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
563 {{ 0x01, 0x00 }, 2},
564 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
565 {{ 0x04, 0x00 }, 2},
566 {{ 0x00, 0x04 }, 2},
567 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
568 {{ 0x04, 0x14 }, 2},
569 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
570 };
571
572 em28xx_gpio_set(dev, terratec_h5_init);
573 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
fe8d54f0 574 usleep_range(10000, 11000);
fec528b7 575 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45);
fe8d54f0 576 usleep_range(10000, 11000);
fec528b7 577
c7a45e5b 578 dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1;
fec528b7
MCC		 579
580 for (i = 0; i < ARRAY_SIZE(regs); i++)
fe8d54f0
MCC		 581 i2c_master_send(&dev->i2c_client[dev->def_i2c_bus],
582 regs[i].r, regs[i].len);
fec528b7
MCC		 583 em28xx_gpio_set(dev, terratec_h5_end);
584};
585
c8dce008
MB		 586static void terratec_htc_stick_init(struct em28xx *dev)
587{
588 int i;
589
590 /*
591 * GPIO configuration:
592 * 0xff: unknown (does not affect DVB-T).
593 * 0xf6: DRX-K (demodulator).
594 * 0xe6: unknown (does not affect DVB-T).
595 * 0xb6: unknown (does not affect DVB-T).
596 */
ba0c8e6e 597 static const struct em28xx_reg_seq terratec_htc_stick_init[] = {
c074fc4c 598 {EM2820_R08_GPIO_CTRL, 0xff, 0xff, 10},
907d109b
FS		 599 {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
600 {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 50},
601 {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
b68cafc5 602 { -1, -1, -1, -1},
c8dce008 603 };
ba0c8e6e 604 static const struct em28xx_reg_seq terratec_htc_stick_end[] = {
907d109b
FS		 605 {EM2874_R80_GPIO_P0_CTRL, 0xb6, 0xff, 100},
606 {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 50},
b68cafc5 607 { -1, -1, -1, -1},
c8dce008
MB		 608 };
609
89040136
MB		 610 /*
611 * Init the analog decoder (not yet supported), but
612 * it's probably still a good idea.
613 */
ba0c8e6e 614 static const struct {
c8dce008
MB		 615 unsigned char r[4];
616 int len;
617 } regs[] = {
618 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
619 {{ 0x01, 0x02 }, 2},
620 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
621 {{ 0x01, 0x00 }, 2},
622 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
623 };
624
625 em28xx_gpio_set(dev, terratec_htc_stick_init);
626
627 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
fe8d54f0 628 usleep_range(10000, 11000);
c8dce008 629 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
fe8d54f0 630 usleep_range(10000, 11000);
c8dce008 631
c7a45e5b 632 dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1;
c8dce008
MB		 633
634 for (i = 0; i < ARRAY_SIZE(regs); i++)
fe8d54f0
MCC		 635 i2c_master_send(&dev->i2c_client[dev->def_i2c_bus],
636 regs[i].r, regs[i].len);
c8dce008
MB		 637
638 em28xx_gpio_set(dev, terratec_htc_stick_end);
639};
640
89040136
MB		 641static void terratec_htc_usb_xs_init(struct em28xx *dev)
642{
643 int i;
644
ba0c8e6e 645 static const struct em28xx_reg_seq terratec_htc_usb_xs_init[] = {
c074fc4c 646 {EM2820_R08_GPIO_CTRL, 0xff, 0xff, 10},
907d109b
FS		 647 {EM2874_R80_GPIO_P0_CTRL, 0xb2, 0xff, 100},
648 {EM2874_R80_GPIO_P0_CTRL, 0xb2, 0xff, 50},
649 {EM2874_R80_GPIO_P0_CTRL, 0xb6, 0xff, 100},
b68cafc5 650 { -1, -1, -1, -1},
89040136 651 };
ba0c8e6e 652 static const struct em28xx_reg_seq terratec_htc_usb_xs_end[] = {
907d109b
FS		 653 {EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 100},
654 {EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 50},
655 {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
b68cafc5 656 { -1, -1, -1, -1},
89040136
MB		 657 };
658
659 /*
660 * Init the analog decoder (not yet supported), but
661 * it's probably still a good idea.
662 */
ba0c8e6e 663 static const struct {
89040136
MB		 664 unsigned char r[4];
665 int len;
666 } regs[] = {
667 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
668 {{ 0x01, 0x02 }, 2},
669 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
670 {{ 0x01, 0x00 }, 2},
671 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
672 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
673 {{ 0x01, 0x00 }, 2},
674 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
675 {{ 0x04, 0x00 }, 2},
676 {{ 0x00, 0x04 }, 2},
677 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
678 {{ 0x04, 0x14 }, 2},
679 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
680 };
681
682 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
683
684 em28xx_gpio_set(dev, terratec_htc_usb_xs_init);
685
686 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
fe8d54f0 687 usleep_range(10000, 11000);
89040136 688 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
fe8d54f0 689 usleep_range(10000, 11000);
89040136 690
c7a45e5b 691 dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1;
89040136
MB		 692
693 for (i = 0; i < ARRAY_SIZE(regs); i++)
fe8d54f0
MCC		 694 i2c_master_send(&dev->i2c_client[dev->def_i2c_bus],
695 regs[i].r, regs[i].len);
89040136
MB		 696
697 em28xx_gpio_set(dev, terratec_htc_usb_xs_end);
698};
699
c247d7b1
AP		 700static void pctv_520e_init(struct em28xx *dev)
701{
702 /*
26c8a729
AP		 703 * Init AVF4910B analog decoder. Looks like I2C traffic to
704 * digital demodulator and tuner are routed via AVF4910B.
c247d7b1
AP		 705 */
706 int i;
ba0c8e6e 707 static const struct {
c247d7b1
AP		 708 unsigned char r[4];
709 int len;
710 } regs[] = {
711 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
712 {{ 0x01, 0x02 }, 2},
713 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
714 {{ 0x01, 0x00 }, 2},
715 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
716 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
717 {{ 0x01, 0x00 }, 2},
718 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
719 };
720
c7a45e5b 721 dev->i2c_client[dev->def_i2c_bus].addr = 0x82 >> 1; /* 0x41 */
c247d7b1
AP		 722
723 for (i = 0; i < ARRAY_SIZE(regs); i++)
fe8d54f0
MCC		 724 i2c_master_send(&dev->i2c_client[dev->def_i2c_bus],
725 regs[i].r, regs[i].len);
c247d7b1
AP		 726};
727
33eebec5 728static int em28xx_pctv_290e_set_lna(struct dvb_frontend *fe)
13a5336e 729{
33eebec5 730 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
3ec40dcf
AP		 731 struct em28xx_i2c_bus *i2c_bus = fe->dvb->priv;
732 struct em28xx *dev = i2c_bus->dev;
13a5336e
AP		 733#ifdef CONFIG_GPIOLIB
734 struct em28xx_dvb *dvb = dev->dvb;
735 int ret;
736 unsigned long flags;
737
33eebec5
AP		 738 if (c->lna == 1)
739 flags = GPIOF_OUT_INIT_HIGH; /* enable LNA */
13a5336e 740 else
33eebec5 741 flags = GPIOF_OUT_INIT_LOW; /* disable LNA */
13a5336e
AP		 742
743 ret = gpio_request_one(dvb->lna_gpio, flags, NULL);
744 if (ret)
29b05e22 745 dev_err(&dev->intf->dev, "gpio request failed %d\n", ret);
13a5336e
AP		 746 else
747 gpio_free(dvb->lna_gpio);
748
749 return ret;
750#else
29b05e22 751 dev_warn(&dev->intf->dev, "%s: LNA control is disabled (lna=%u)\n",
fdf1bc9f 752 KBUILD_MODNAME, c->lna);
13a5336e
AP		 753 return 0;
754#endif
755}
756
ffb9948e
AP		 757static int em28xx_pctv_292e_set_lna(struct dvb_frontend *fe)
758{
759 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
760 struct em28xx_i2c_bus *i2c_bus = fe->dvb->priv;
761 struct em28xx *dev = i2c_bus->dev;
762 u8 lna;
763
764 if (c->lna == 1)
765 lna = 0x01;
766 else
767 lna = 0x00;
768
769 return em28xx_write_reg_bits(dev, EM2874_R80_GPIO_P0_CTRL, lna, 0x01);
770}
771
f2d0c1c6 772static int em28xx_mt352_terratec_xs_init(struct dvb_frontend *fe)
4fb202a8
DH		 773{
774 /* Values extracted from a USB trace of the Terratec Windows driver */
775 static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x2c };
776 static u8 reset[] = { RESET, 0x80 };
777 static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
778 static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0xa0 };
779 static u8 input_freq_cfg[] = { INPUT_FREQ_1, 0x31, 0xb8 };
780 static u8 rs_err_cfg[] = { RS_ERR_PER_1, 0x00, 0x4d };
781 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
782 static u8 trl_nom_cfg[] = { TRL_NOMINAL_RATE_1, 0x64, 0x00 };
783 static u8 tps_given_cfg[] = { TPS_GIVEN_1, 0x40, 0x80, 0x50 };
ff69786b 784 static u8 tuner_go[] = { TUNER_GO, 0x01};
4fb202a8
DH		 785
786 mt352_write(fe, clock_config, sizeof(clock_config));
fe8d54f0 787 usleep_range(200, 250);
4fb202a8
DH		 788 mt352_write(fe, reset, sizeof(reset));
789 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
790 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
791 mt352_write(fe, input_freq_cfg, sizeof(input_freq_cfg));
792 mt352_write(fe, rs_err_cfg, sizeof(rs_err_cfg));
793 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
794 mt352_write(fe, trl_nom_cfg, sizeof(trl_nom_cfg));
795 mt352_write(fe, tps_given_cfg, sizeof(tps_given_cfg));
796 mt352_write(fe, tuner_go, sizeof(tuner_go));
797 return 0;
798}
799
ab4d1452
SN		 800static void px_bcud_init(struct em28xx *dev)
801{
802 int i;
ba0c8e6e 803 static const struct {
ab4d1452
SN		 804 unsigned char r[4];
805 int len;
806 } regs1[] = {
807 {{ 0x0e, 0x77 }, 2},
808 {{ 0x0f, 0x77 }, 2},
809 {{ 0x03, 0x90 }, 2},
810 }, regs2[] = {
811 {{ 0x07, 0x01 }, 2},
812 {{ 0x08, 0x10 }, 2},
813 {{ 0x13, 0x00 }, 2},
814 {{ 0x17, 0x00 }, 2},
815 {{ 0x03, 0x01 }, 2},
816 {{ 0x10, 0xb1 }, 2},
817 {{ 0x11, 0x40 }, 2},
818 {{ 0x85, 0x7a }, 2},
819 {{ 0x87, 0x04 }, 2},
820 };
ba0c8e6e 821 static const struct em28xx_reg_seq gpio[] = {
ab4d1452
SN		 822 {EM28XX_R06_I2C_CLK, 0x40, 0xff, 300},
823 {EM2874_R80_GPIO_P0_CTRL, 0xfd, 0xff, 60},
824 {EM28XX_R15_RGAIN, 0x20, 0xff, 0},
825 {EM28XX_R16_GGAIN, 0x20, 0xff, 0},
826 {EM28XX_R17_BGAIN, 0x20, 0xff, 0},
827 {EM28XX_R18_ROFFSET, 0x00, 0xff, 0},
828 {EM28XX_R19_GOFFSET, 0x00, 0xff, 0},
829 {EM28XX_R1A_BOFFSET, 0x00, 0xff, 0},
830 {EM28XX_R23_UOFFSET, 0x00, 0xff, 0},
831 {EM28XX_R24_VOFFSET, 0x00, 0xff, 0},
832 {EM28XX_R26_COMPR, 0x00, 0xff, 0},
833 {0x13, 0x08, 0xff, 0},
834 {EM28XX_R12_VINENABLE, 0x27, 0xff, 0},
835 {EM28XX_R0C_USBSUSP, 0x10, 0xff, 0},
836 {EM28XX_R27_OUTFMT, 0x00, 0xff, 0},
837 {EM28XX_R10_VINMODE, 0x00, 0xff, 0},
838 {EM28XX_R11_VINCTRL, 0x11, 0xff, 0},
839 {EM2874_R50_IR_CONFIG, 0x01, 0xff, 0},
840 {EM2874_R5F_TS_ENABLE, 0x80, 0xff, 0},
841 {EM28XX_R06_I2C_CLK, 0x46, 0xff, 0},
842 };
843 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x46);
844 /* sleeping ISDB-T */
845 dev->dvb->i2c_client_demod->addr = 0x14;
846 for (i = 0; i < ARRAY_SIZE(regs1); i++)
fe8d54f0
MCC		 847 i2c_master_send(dev->dvb->i2c_client_demod,
848 regs1[i].r, regs1[i].len);
ab4d1452
SN		 849 /* sleeping ISDB-S */
850 dev->dvb->i2c_client_demod->addr = 0x15;
851 for (i = 0; i < ARRAY_SIZE(regs2); i++)
852 i2c_master_send(dev->dvb->i2c_client_demod, regs2[i].r,
853 regs2[i].len);
854 for (i = 0; i < ARRAY_SIZE(gpio); i++) {
855 em28xx_write_reg_bits(dev, gpio[i].reg, gpio[i].val,
856 gpio[i].mask);
857 if (gpio[i].sleep > 0)
858 msleep(gpio[i].sleep);
859 }
860};
861
4fb202a8
DH		 862static struct mt352_config terratec_xs_mt352_cfg = {
863 .demod_address = (0x1e >> 1),
864 .no_tuner = 1,
865 .if2 = 45600,
f2d0c1c6 866 .demod_init = em28xx_mt352_terratec_xs_init,
4fb202a8
DH		 867};
868
285eb1a4
AP		 869static struct tda10023_config em28xx_tda10023_config = {
870 .demod_address = 0x0c,
871 .invert = 1,
872};
873
d6a5f921
AP		 874static struct cxd2820r_config em28xx_cxd2820r_config = {
875 .i2c_address = (0xd8 >> 1),
876 .ts_mode = CXD2820R_TS_SERIAL,
d6a5f921
AP		 877};
878
879static struct tda18271_config em28xx_cxd2820r_tda18271_config = {
880 .output_opt = TDA18271_OUTPUT_LT_OFF,
0db4bf42 881 .gate = TDA18271_GATE_DIGITAL,
d6a5f921
AP		 882};
883
1985f6fb
AP		 884static struct zl10353_config em28xx_zl10353_no_i2c_gate_dev = {
885 .demod_address = (0x1e >> 1),
886 .disable_i2c_gate_ctrl = 1,
887 .no_tuner = 1,
888 .parallel_ts = 1,
889};
fdf1bc9f 890
8c47311d
AM		 891static struct mt2060_config em28xx_mt2060_config = {
892 .i2c_address = 0x60,
893};
894
1985f6fb
AP		 895static struct qt1010_config em28xx_qt1010_config = {
896 .i2c_address = 0x62
4159d01b
MCC		 897};
898
899static const struct mb86a20s_config c3tech_duo_mb86a20s_config = {
900 .demod_address = 0x10,
901 .is_serial = true,
902};
903
904static struct tda18271_std_map mb86a20s_tda18271_config = {
905 .dvbt_6 = { .if_freq = 4000, .agc_mode = 3, .std = 4,
906 .if_lvl = 1, .rfagc_top = 0x37, },
907};
1985f6fb 908
4159d01b
MCC		 909static struct tda18271_config c3tech_duo_tda18271_config = {
910 .std_map = &mb86a20s_tda18271_config,
911 .gate = TDA18271_GATE_DIGITAL,
912 .small_i2c = TDA18271_03_BYTE_CHUNK_INIT,
1985f6fb
AP		 913};
914
38b2df95
DH		 915static struct tda18271_std_map drx_j_std_map = {
916 .atsc_6 = { .if_freq = 5000, .agc_mode = 3, .std = 0, .if_lvl = 1,
917 .rfagc_top = 0x37, },
918 .qam_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, .if_lvl = 1,
919 .rfagc_top = 0x37, },
920};
921
922static struct tda18271_config pinnacle_80e_dvb_config = {
923 .std_map = &drx_j_std_map,
924 .gate = TDA18271_GATE_DIGITAL,
925 .role = TDA18271_MASTER,
926};
927
1586342e
KC		 928static struct lgdt3306a_config hauppauge_01595_lgdt3306a_config = {
929 .qam_if_khz = 4000,
930 .vsb_if_khz = 3250,
931 .spectral_inversion = 0,
932 .deny_i2c_rptr = 0,
933 .mpeg_mode = LGDT3306A_MPEG_SERIAL,
934 .tpclk_edge = LGDT3306A_TPCLK_RISING_EDGE,
935 .tpvalid_polarity = LGDT3306A_TP_VALID_HIGH,
936 .xtalMHz = 25,
937};
938
3aefb79a
MCC		 939/* ------------------------------------------------------------------ */
940
f410b409 941static noinline_for_stack int em28xx_attach_xc3028(u8 addr, struct em28xx *dev)
3aefb79a
MCC		 942{
943 struct dvb_frontend *fe;
3ca9c093 944 struct xc2028_config cfg;
ee97207c 945 struct xc2028_ctrl ctl;
3ca9c093 946
6ea54d93 947 memset(&cfg, 0, sizeof(cfg));
c7a45e5b 948 cfg.i2c_adap = &dev->i2c_adap[dev->def_i2c_bus];
3ca9c093 949 cfg.i2c_addr = addr;
3ca9c093 950
ee97207c
MCC		 951 memset(&ctl, 0, sizeof(ctl));
952 em28xx_setup_xc3028(dev, &ctl);
953 cfg.ctrl = &ctl;
954
f71095be 955 if (!dev->dvb->fe[0]) {
29b05e22 956 dev_err(&dev->intf->dev,
ce8591ff 957 "dvb frontend not attached. Can't attach xc3028\n");
3aefb79a
MCC		 958 return -EINVAL;
959 }
960
f71095be 961 fe = dvb_attach(xc2028_attach, dev->dvb->fe[0], &cfg);
3aefb79a 962 if (!fe) {
29b05e22 963 dev_err(&dev->intf->dev, "xc3028 attach failed\n");
f71095be
AP		 964 dvb_frontend_detach(dev->dvb->fe[0]);
965 dev->dvb->fe[0] = NULL;
3aefb79a
MCC		 966 return -EINVAL;
967 }
968
29b05e22 969 dev_info(&dev->intf->dev, "xc3028 attached\n");
3aefb79a
MCC		 970
971 return 0;
972}
973
3421b778
AT		 974/* ------------------------------------------------------------------ */
975
f2d0c1c6
JW		 976static int em28xx_register_dvb(struct em28xx_dvb *dvb, struct module *module,
977 struct em28xx *dev, struct device *device)
3aefb79a 978{
3421b778 979 int result;
e9ef88bd 980 bool create_rf_connector = false;
3aefb79a 981
3421b778 982 mutex_init(&dvb->lock);
3aefb79a 983
3421b778 984 /* register adapter */
ce8591ff 985 result = dvb_register_adapter(&dvb->adapter,
29b05e22 986 dev_name(&dev->intf->dev), module,
ce8591ff 987 device, adapter_nr);
3421b778 988 if (result < 0) {
29b05e22 989 dev_warn(&dev->intf->dev,
ce8591ff
MCC		 990 "dvb_register_adapter failed (errno = %d)\n",
991 result);
3421b778
AT		 992 goto fail_adapter;
993 }
37ecc7b1
MCC		 994#ifdef CONFIG_MEDIA_CONTROLLER_DVB
995 dvb->adapter.mdev = dev->media_dev;
996#endif
e3569abc
MCC		 997
998 /* Ensure all frontends negotiate bus access */
f71095be
AP		 999 dvb->fe[0]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
1000 if (dvb->fe[1])
1001 dvb->fe[1]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
e3569abc 1002
3de09fbb 1003 dvb->adapter.priv = &dev->i2c_bus[dev->def_i2c_bus];
3421b778
AT		 1004
1005 /* register frontend */
f71095be 1006 result = dvb_register_frontend(&dvb->adapter, dvb->fe[0]);
3421b778 1007 if (result < 0) {
29b05e22 1008 dev_warn(&dev->intf->dev,
ce8591ff
MCC		 1009 "dvb_register_frontend failed (errno = %d)\n",
1010 result);
f71095be
AP		 1011 goto fail_frontend0;
1012 }
1013
1014 /* register 2nd frontend */
1015 if (dvb->fe[1]) {
1016 result = dvb_register_frontend(&dvb->adapter, dvb->fe[1]);
1017 if (result < 0) {
29b05e22 1018 dev_warn(&dev->intf->dev,
ce8591ff
MCC		 1019 "2nd dvb_register_frontend failed (errno = %d)\n",
1020 result);
f71095be
AP		 1021 goto fail_frontend1;
1022 }
3421b778
AT		 1023 }
1024
1025 /* register demux stuff */
1026 dvb->demux.dmx.capabilities =
1027 DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1028 DMX_MEMORY_BASED_FILTERING;
1029 dvb->demux.priv = dvb;
1030 dvb->demux.filternum = 256;
1031 dvb->demux.feednum = 256;
f2d0c1c6
JW		 1032 dvb->demux.start_feed = em28xx_start_feed;
1033 dvb->demux.stop_feed = em28xx_stop_feed;
e3569abc 1034
3421b778
AT		 1035 result = dvb_dmx_init(&dvb->demux);
1036 if (result < 0) {
29b05e22 1037 dev_warn(&dev->intf->dev,
ce8591ff
MCC		 1038 "dvb_dmx_init failed (errno = %d)\n",
1039 result);
3421b778
AT		 1040 goto fail_dmx;
1041 }
1042
1043 dvb->dmxdev.filternum = 256;
1044 dvb->dmxdev.demux = &dvb->demux.dmx;
1045 dvb->dmxdev.capabilities = 0;
1046 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
1047 if (result < 0) {
29b05e22 1048 dev_warn(&dev->intf->dev,
ce8591ff
MCC		 1049 "dvb_dmxdev_init failed (errno = %d)\n",
1050 result);
3421b778
AT		 1051 goto fail_dmxdev;
1052 }
52284c3e 1053
3421b778
AT		 1054 dvb->fe_hw.source = DMX_FRONTEND_0;
1055 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
1056 if (result < 0) {
29b05e22 1057 dev_warn(&dev->intf->dev,
ce8591ff
MCC		 1058 "add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
1059 result);
3421b778
AT		 1060 goto fail_fe_hw;
1061 }
1062
1063 dvb->fe_mem.source = DMX_MEMORY_FE;
1064 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
1065 if (result < 0) {
29b05e22 1066 dev_warn(&dev->intf->dev,
ce8591ff
MCC		 1067 "add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
1068 result);
3421b778
AT		 1069 goto fail_fe_mem;
1070 }
1071
1072 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
1073 if (result < 0) {
29b05e22 1074 dev_warn(&dev->intf->dev,
ce8591ff
MCC		 1075 "connect_frontend failed (errno = %d)\n",
1076 result);
3421b778
AT		 1077 goto fail_fe_conn;
1078 }
1079
1080 /* register network adapter */
1081 dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx);
37ecc7b1 1082
e9ef88bd 1083 /* If the analog part won't create RF connectors, DVB will do it */
fe8d54f0 1084 if (!dev->has_video || dev->tuner_type == TUNER_ABSENT)
e9ef88bd
MCC		 1085 create_rf_connector = true;
1086
1087 result = dvb_create_media_graph(&dvb->adapter, create_rf_connector);
37ecc7b1
MCC		 1088 if (result < 0)
1089 goto fail_create_graph;
1090
3421b778
AT		 1091 return 0;
1092
37ecc7b1
MCC		 1093fail_create_graph:
1094 dvb_net_release(&dvb->net);
3421b778
AT		 1095fail_fe_conn:
1096 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
1097fail_fe_mem:
1098 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
1099fail_fe_hw:
1100 dvb_dmxdev_release(&dvb->dmxdev);
1101fail_dmxdev:
1102 dvb_dmx_release(&dvb->demux);
1103fail_dmx:
f71095be
AP		 1104 if (dvb->fe[1])
1105 dvb_unregister_frontend(dvb->fe[1]);
1106 dvb_unregister_frontend(dvb->fe[0]);
1107fail_frontend1:
1108 if (dvb->fe[1])
1109 dvb_frontend_detach(dvb->fe[1]);
1110fail_frontend0:
1111 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT		 1112 dvb_unregister_adapter(&dvb->adapter);
1113fail_adapter:
1114 return result;
1115}
1116
f2d0c1c6 1117static void em28xx_unregister_dvb(struct em28xx_dvb *dvb)
3421b778
AT		 1118{
1119 dvb_net_release(&dvb->net);
1120 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
1121 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
1122 dvb_dmxdev_release(&dvb->dmxdev);
1123 dvb_dmx_release(&dvb->demux);
f71095be
AP		 1124 if (dvb->fe[1])
1125 dvb_unregister_frontend(dvb->fe[1]);
1126 dvb_unregister_frontend(dvb->fe[0]);
c4c3a3d3 1127 if (dvb->fe[1] && !dvb->dont_attach_fe1)
f71095be
AP		 1128 dvb_frontend_detach(dvb->fe[1]);
1129 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT		 1130 dvb_unregister_adapter(&dvb->adapter);
1131}
1132
ad32495b 1133static int em28174_dvb_init_pctv_460e(struct em28xx *dev)
f410b409
AB		 1134{
1135 struct em28xx_dvb *dvb = dev->dvb;
f410b409
AB		 1136 struct tda10071_platform_data tda10071_pdata = {};
1137 struct a8293_platform_data a8293_pdata = {};
f410b409
AB		 1138
1139 /* attach demod + tuner combo */
ad32495b
MCC		 1140 tda10071_pdata.clk = 40444000; /* 40.444 MHz */
1141 tda10071_pdata.i2c_wr_max = 64;
1142 tda10071_pdata.ts_mode = TDA10071_TS_SERIAL;
1143 tda10071_pdata.pll_multiplier = 20;
1144 tda10071_pdata.tuner_i2c_addr = 0x14;
1145
1146 dvb->i2c_client_demod = dvb_module_probe("tda10071", "tda10071_cx24118",
1147 &dev->i2c_adap[dev->def_i2c_bus],
1148 0x55, &tda10071_pdata);
1149 if (!dvb->i2c_client_demod)
1150 return -ENODEV;
1151
1152 dvb->fe[0] = tda10071_pdata.get_dvb_frontend(dvb->i2c_client_demod);
f410b409
AB		 1153
1154 /* attach SEC */
1155 a8293_pdata.dvb_frontend = dvb->fe[0];
ad32495b
MCC		 1156
1157 dvb->i2c_client_sec = dvb_module_probe("a8293", NULL,
1158 &dev->i2c_adap[dev->def_i2c_bus],
1159 0x08, &a8293_pdata);
1160 if (!dvb->i2c_client_sec) {
1161 dvb_module_release(dvb->i2c_client_demod);
1162 return -ENODEV;
f410b409 1163 }
ad32495b
MCC		 1164
1165 return 0;
f410b409
AB		 1166}
1167
ad32495b 1168static int em28178_dvb_init_pctv_461e(struct em28xx *dev)
f410b409
AB		 1169{
1170 struct em28xx_dvb *dvb = dev->dvb;
f410b409 1171 struct i2c_adapter *i2c_adapter;
f410b409
AB		 1172 struct m88ds3103_platform_data m88ds3103_pdata = {};
1173 struct ts2020_config ts2020_config = {};
1174 struct a8293_platform_data a8293_pdata = {};
f410b409
AB		 1175
1176 /* attach demod */
1177 m88ds3103_pdata.clk = 27000000;
1178 m88ds3103_pdata.i2c_wr_max = 33;
1179 m88ds3103_pdata.ts_mode = M88DS3103_TS_PARALLEL;
1180 m88ds3103_pdata.ts_clk = 16000;
1181 m88ds3103_pdata.ts_clk_pol = 1;
1182 m88ds3103_pdata.agc = 0x99;
ad32495b
MCC		 1183
1184 dvb->i2c_client_demod = dvb_module_probe("m88ds3103", NULL,
1185 &dev->i2c_adap[dev->def_i2c_bus],
1186 0x68, &m88ds3103_pdata);
1187 if (!dvb->i2c_client_demod)
1188 return -ENODEV;
1189
1190 dvb->fe[0] = m88ds3103_pdata.get_dvb_frontend(dvb->i2c_client_demod);
1191 i2c_adapter = m88ds3103_pdata.get_i2c_adapter(dvb->i2c_client_demod);
f410b409
AB		 1192
1193 /* attach tuner */
1194 ts2020_config.fe = dvb->fe[0];
ad32495b
MCC		 1195
1196 dvb->i2c_client_tuner = dvb_module_probe("ts2020", "ts2022",
fe8d54f0
MCC		 1197 i2c_adapter,
1198 0x60, &ts2020_config);
ad32495b
MCC		 1199 if (!dvb->i2c_client_tuner) {
1200 dvb_module_release(dvb->i2c_client_demod);
1201 return -ENODEV;
f410b409 1202 }
ad32495b 1203
f410b409
AB		 1204 /* delegate signal strength measurement to tuner */
1205 dvb->fe[0]->ops.read_signal_strength =
1206 dvb->fe[0]->ops.tuner_ops.get_rf_strength;
1207
1208 /* attach SEC */
1209 a8293_pdata.dvb_frontend = dvb->fe[0];
ad32495b 1210 dvb->i2c_client_sec = dvb_module_probe("a8293", NULL,
fe8d54f0
MCC		 1211 &dev->i2c_adap[dev->def_i2c_bus],
1212 0x08, &a8293_pdata);
ad32495b
MCC		 1213 if (!dvb->i2c_client_sec) {
1214 dvb_module_release(dvb->i2c_client_tuner);
1215 dvb_module_release(dvb->i2c_client_demod);
1216 return -ENODEV;
f410b409 1217 }
ad32495b
MCC		 1218
1219 return 0;
f410b409
AB		 1220}
1221
985b0ede
BL		 1222static int em28178_dvb_init_pctv_461e_v2(struct em28xx *dev)
1223{
1224 struct em28xx_dvb *dvb = dev->dvb;
1225 struct i2c_adapter *i2c_adapter;
1226 struct m88ds3103_platform_data m88ds3103_pdata = {};
1227 struct ts2020_config ts2020_config = {};
1228 struct a8293_platform_data a8293_pdata = {};
1229
1230 /* attach demod */
1231 m88ds3103_pdata.clk = 27000000;
1232 m88ds3103_pdata.i2c_wr_max = 33;
1233 m88ds3103_pdata.ts_mode = M88DS3103_TS_PARALLEL;
1234 m88ds3103_pdata.ts_clk = 16000;
1235 m88ds3103_pdata.ts_clk_pol = 0;
1236 m88ds3103_pdata.agc = 0x99;
1237 m88ds3103_pdata.agc_inv = 0;
1238 m88ds3103_pdata.spec_inv = 0;
1239 dvb->i2c_client_demod = dvb_module_probe("m88ds3103", "m88ds3103b",
1240 &dev->i2c_adap[dev->def_i2c_bus],
1241 0x6a, &m88ds3103_pdata);
1242
1243 if (!dvb->i2c_client_demod)
1244 return -ENODEV;
1245
1246 dvb->fe[0] = m88ds3103_pdata.get_dvb_frontend(dvb->i2c_client_demod);
1247 i2c_adapter = m88ds3103_pdata.get_i2c_adapter(dvb->i2c_client_demod);
1248
1249 /* attach tuner */
1250 ts2020_config.fe = dvb->fe[0];
1251 dvb->i2c_client_tuner = dvb_module_probe("ts2020", "ts2022",
1252 i2c_adapter,
1253 0x60, &ts2020_config);
1254 if (!dvb->i2c_client_tuner) {
1255 dvb_module_release(dvb->i2c_client_demod);
1256 return -ENODEV;
1257 }
1258
1259 /* delegate signal strength measurement to tuner */
1260 dvb->fe[0]->ops.read_signal_strength =
1261 dvb->fe[0]->ops.tuner_ops.get_rf_strength;
1262
1263 /* attach SEC */
1264 a8293_pdata.dvb_frontend = dvb->fe[0];
1265 dvb->i2c_client_sec = dvb_module_probe("a8293", NULL,
1266 &dev->i2c_adap[dev->def_i2c_bus],
1267 0x08, &a8293_pdata);
1268 if (!dvb->i2c_client_sec) {
1269 dvb_module_release(dvb->i2c_client_tuner);
1270 dvb_module_release(dvb->i2c_client_demod);
1271 return -ENODEV;
1272 }
1273
1274 return 0;
1275}
1276
ad32495b 1277static int em28178_dvb_init_pctv_292e(struct em28xx *dev)
f410b409
AB		 1278{
1279 struct em28xx_dvb *dvb = dev->dvb;
1280 struct i2c_adapter *adapter;
ad32495b
MCC		 1281 struct si2168_config si2168_config = {};
1282 struct si2157_config si2157_config = {};
f410b409
AB		 1283
1284 /* attach demod */
f410b409
AB		 1285 si2168_config.i2c_adapter = &adapter;
1286 si2168_config.fe = &dvb->fe[0];
1287 si2168_config.ts_mode = SI2168_TS_PARALLEL;
309d4c4c 1288 si2168_config.spectral_inversion = true;
f410b409 1289
ad32495b
MCC		 1290 dvb->i2c_client_demod = dvb_module_probe("si2168", NULL,
1291 &dev->i2c_adap[dev->def_i2c_bus],
1292 0x64, &si2168_config);
1293 if (!dvb->i2c_client_demod)
1294 return -ENODEV;
f410b409
AB		 1295
1296 /* attach tuner */
f410b409
AB		 1297 si2157_config.fe = dvb->fe[0];
1298 si2157_config.if_port = 1;
1299#ifdef CONFIG_MEDIA_CONTROLLER_DVB
1300 si2157_config.mdev = dev->media_dev;
1301#endif
ad32495b
MCC		 1302 dvb->i2c_client_tuner = dvb_module_probe("si2157", NULL,
1303 adapter,
1304 0x60, &si2157_config);
1305 if (!dvb->i2c_client_tuner) {
1306 dvb_module_release(dvb->i2c_client_demod);
1307 return -ENODEV;
f410b409 1308 }
f410b409 1309 dvb->fe[0]->ops.set_lna = em28xx_pctv_292e_set_lna;
ad32495b
MCC		 1310
1311 return 0;
f410b409
AB		 1312}
1313
ad32495b 1314static int em28178_dvb_init_terratec_t2_stick_hd(struct em28xx *dev)
f410b409
AB		 1315{
1316 struct em28xx_dvb *dvb = dev->dvb;
1317 struct i2c_adapter *adapter;
ad32495b
MCC		 1318 struct si2168_config si2168_config = {};
1319 struct si2157_config si2157_config = {};
f410b409
AB		 1320
1321 /* attach demod */
f410b409
AB		 1322 si2168_config.i2c_adapter = &adapter;
1323 si2168_config.fe = &dvb->fe[0];
1324 si2168_config.ts_mode = SI2168_TS_PARALLEL;
f410b409 1325
ad32495b
MCC		 1326 dvb->i2c_client_demod = dvb_module_probe("si2168", NULL,
1327 &dev->i2c_adap[dev->def_i2c_bus],
1328 0x64, &si2168_config);
1329 if (!dvb->i2c_client_demod)
1330 return -ENODEV;
f410b409
AB		 1331
1332 /* attach tuner */
1333 memset(&si2157_config, 0, sizeof(si2157_config));
1334 si2157_config.fe = dvb->fe[0];
1335 si2157_config.if_port = 0;
1336#ifdef CONFIG_MEDIA_CONTROLLER_DVB
1337 si2157_config.mdev = dev->media_dev;
1338#endif
ad32495b
MCC		 1339 dvb->i2c_client_tuner = dvb_module_probe("si2157", "si2146",
1340 adapter,
1341 0x60, &si2157_config);
1342 if (!dvb->i2c_client_tuner) {
1343 dvb_module_release(dvb->i2c_client_demod);
1344 return -ENODEV;
f410b409
AB		 1345 }
1346
ad32495b 1347 return 0;
f410b409
AB		 1348}
1349
ad32495b 1350static int em28178_dvb_init_plex_px_bcud(struct em28xx *dev)
f410b409
AB		 1351{
1352 struct em28xx_dvb *dvb = dev->dvb;
ad32495b
MCC		 1353 struct tc90522_config tc90522_config = {};
1354 struct qm1d1c0042_config qm1d1c0042_config = {};
f410b409
AB		 1355
1356 /* attach demod */
ad32495b
MCC		 1357 dvb->i2c_client_demod = dvb_module_probe("tc90522", "tc90522sat",
1358 &dev->i2c_adap[dev->def_i2c_bus],
1359 0x15, &tc90522_config);
1360 if (!dvb->i2c_client_demod)
1361 return -ENODEV;
f410b409
AB		 1362
1363 /* attach tuner */
f410b409
AB		 1364 qm1d1c0042_config.fe = tc90522_config.fe;
1365 qm1d1c0042_config.lpf = 1;
ad32495b
MCC		 1366
1367 dvb->i2c_client_tuner = dvb_module_probe("qm1d1c0042", NULL,
1368 tc90522_config.tuner_i2c,
1369 0x61, &qm1d1c0042_config);
1370 if (!dvb->i2c_client_tuner) {
1371 dvb_module_release(dvb->i2c_client_demod);
1372 return -ENODEV;
f410b409 1373 }
ad32495b 1374
f410b409
AB		 1375 dvb->fe[0] = tc90522_config.fe;
1376 px_bcud_init(dev);
ad32495b
MCC		 1377
1378 return 0;
f410b409
AB		 1379}
1380
ad32495b 1381static int em28174_dvb_init_hauppauge_wintv_dualhd_dvb(struct em28xx *dev)
f410b409
AB		 1382{
1383 struct em28xx_dvb *dvb = dev->dvb;
1384 struct i2c_adapter *adapter;
ad32495b
MCC		 1385 struct si2168_config si2168_config = {};
1386 struct si2157_config si2157_config = {};
1387 unsigned char addr;
f410b409
AB		 1388
1389 /* attach demod */
f410b409
AB		 1390 si2168_config.i2c_adapter = &adapter;
1391 si2168_config.fe = &dvb->fe[0];
1392 si2168_config.ts_mode = SI2168_TS_SERIAL;
309d4c4c 1393 si2168_config.spectral_inversion = true;
ad32495b 1394 addr = (dev->ts == PRIMARY_TS) ? 0x64 : 0x67;
f410b409 1395
ad32495b
MCC		 1396 dvb->i2c_client_demod = dvb_module_probe("si2168", NULL,
1397 &dev->i2c_adap[dev->def_i2c_bus],
1398 addr, &si2168_config);
1399 if (!dvb->i2c_client_demod)
1400 return -ENODEV;
f410b409
AB		 1401
1402 /* attach tuner */
1403 memset(&si2157_config, 0, sizeof(si2157_config));
1404 si2157_config.fe = dvb->fe[0];
1405 si2157_config.if_port = 1;
1406#ifdef CONFIG_MEDIA_CONTROLLER_DVB
1407 si2157_config.mdev = dev->media_dev;
1408#endif
ad32495b
MCC		 1409 addr = (dev->ts == PRIMARY_TS) ? 0x60 : 0x63;
1410
1411 dvb->i2c_client_tuner = dvb_module_probe("si2157", NULL,
1412 adapter,
1413 addr, &si2157_config);
1414 if (!dvb->i2c_client_tuner) {
1415 dvb_module_release(dvb->i2c_client_demod);
1416 return -ENODEV;
f410b409
AB		 1417 }
1418
ad32495b 1419 return 0;
f410b409
AB		 1420}
1421
1422static int em28174_dvb_init_hauppauge_wintv_dualhd_01595(struct em28xx *dev)
1423{
1424 struct em28xx_dvb *dvb = dev->dvb;
1425 struct i2c_adapter *adapter;
ad32495b 1426 struct lgdt3306a_config lgdt3306a_config = {};
f410b409 1427 struct si2157_config si2157_config = {};
ad32495b 1428 unsigned char addr;
f410b409
AB		 1429
1430 /* attach demod */
1431 lgdt3306a_config = hauppauge_01595_lgdt3306a_config;
1432 lgdt3306a_config.fe = &dvb->fe[0];
1433 lgdt3306a_config.i2c_adapter = &adapter;
ad32495b 1434 addr = (dev->ts == PRIMARY_TS) ? 0x59 : 0x0e;
f410b409 1435
ad32495b
MCC		 1436 dvb->i2c_client_demod = dvb_module_probe("lgdt3306a", NULL,
1437 &dev->i2c_adap[dev->def_i2c_bus],
1438 addr, &lgdt3306a_config);
1439 if (!dvb->i2c_client_demod)
1440 return -ENODEV;
f410b409
AB		 1441
1442 /* attach tuner */
1443 si2157_config.fe = dvb->fe[0];
1444 si2157_config.if_port = 1;
1445 si2157_config.inversion = 1;
1446#ifdef CONFIG_MEDIA_CONTROLLER_DVB
1447 si2157_config.mdev = dev->media_dev;
1448#endif
ad32495b
MCC		 1449 addr = (dev->ts == PRIMARY_TS) ? 0x60 : 0x62;
1450
1451 dvb->i2c_client_tuner = dvb_module_probe("si2157", NULL,
1452 adapter,
01affb00 1453 addr, &si2157_config);
ad32495b
MCC		 1454 if (!dvb->i2c_client_tuner) {
1455 dvb_module_release(dvb->i2c_client_demod);
1456 return -ENODEV;
f410b409
AB		 1457 }
1458
ad32495b 1459 return 0;
f410b409 1460}
ad32495b 1461
f2d0c1c6 1462static int em28xx_dvb_init(struct em28xx *dev)
3421b778 1463{
be7fd3c3 1464 int result = 0, dvb_alt = 0;
3421b778 1465 struct em28xx_dvb *dvb;
be7fd3c3 1466 struct usb_device *udev;
3421b778 1467
822b8dea
MCC		 1468 if (dev->is_audio_only) {
1469 /* Shouldn't initialize IR for this interface */
1470 return 0;
1471 }
1472
505b6d0b 1473 if (!dev->board.has_dvb) {
df619181
DH		 1474 /* This device does not support the extension */
1475 return 0;
1476 }
1477
29b05e22 1478 dev_info(&dev->intf->dev, "Binding DVB extension\n");
9634614f 1479
fe8d54f0 1480 dvb = kzalloc(sizeof(*dvb), GFP_KERNEL);
8314d402 1481 if (!dvb)
3421b778 1482 return -ENOMEM;
8314d402 1483
3421b778 1484 dev->dvb = dvb;
fe8d54f0
MCC		 1485 dvb->fe[0] = NULL;
1486 dvb->fe[1] = NULL;
3aefb79a 1487
27ba0dac
FS		 1488 /* pre-allocate DVB usb transfer buffers */
1489 if (dev->dvb_xfer_bulk) {
1490 result = em28xx_alloc_urbs(dev, EM28XX_DIGITAL_MODE,
1491 dev->dvb_xfer_bulk,
1492 EM28XX_DVB_NUM_BUFS,
1493 512,
1494 EM28XX_DVB_BULK_PACKET_MULTIPLIER);
1495 } else {
1496 result = em28xx_alloc_urbs(dev, EM28XX_DIGITAL_MODE,
1497 dev->dvb_xfer_bulk,
1498 EM28XX_DVB_NUM_BUFS,
1499 dev->dvb_max_pkt_size_isoc,
1500 EM28XX_DVB_NUM_ISOC_PACKETS);
1501 }
1502 if (result) {
29b05e22 1503 dev_err(&dev->intf->dev,
ce8591ff 1504 "failed to pre-allocate USB transfer buffers for DVB.\n");
27ba0dac
FS		 1505 kfree(dvb);
1506 dev->dvb = NULL;
1507 return result;
1508 }
1509
5013318c 1510 mutex_lock(&dev->lock);
c67ec53f 1511 em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
3aefb79a
MCC		 1512 /* init frontend */
1513 switch (dev->model) {
ebaefdb7 1514 case EM2874_BOARD_LEADERSHIP_ISDBT:
f71095be 1515 dvb->fe[0] = dvb_attach(s921_attach,
fe8d54f0
MCC		 1516 &sharp_isdbt,
1517 &dev->i2c_adap[dev->def_i2c_bus]);
ca3dfd6a 1518
f71095be 1519 if (!dvb->fe[0]) {
ca3dfd6a
MCC		 1520 result = -EINVAL;
1521 goto out_free;
1522 }
1523
1524 break;
f89bc329 1525 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850:
10ac6603 1526 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950:
4fd305b2 1527 case EM2880_BOARD_PINNACLE_PCTV_HD_PRO:
e14b3658 1528 case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600:
f71095be 1529 dvb->fe[0] = dvb_attach(lgdt330x_attach,
fe8d54f0 1530 &em2880_lgdt3303_dev,
23ba635d 1531 0x0e,
fe8d54f0 1532 &dev->i2c_adap[dev->def_i2c_bus]);
f2d0c1c6 1533 if (em28xx_attach_xc3028(0x61, dev) < 0) {
3421b778
AT		 1534 result = -EINVAL;
1535 goto out_free;
1536 }
227ad4ab 1537 break;
46510b56 1538 case EM2880_BOARD_KWORLD_DVB_310U:
f71095be 1539 dvb->fe[0] = dvb_attach(zl10353_attach,
fe8d54f0
MCC		 1540 &em28xx_zl10353_with_xc3028,
1541 &dev->i2c_adap[dev->def_i2c_bus]);
f2d0c1c6 1542 if (em28xx_attach_xc3028(0x61, dev) < 0) {
3421b778
AT		 1543 result = -EINVAL;
1544 goto out_free;
1545 }
7e6388a1 1546 break;
a84f79ae 1547 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900:
ec994d05 1548 case EM2882_BOARD_TERRATEC_HYBRID_XS:
01a5fd6f 1549 case EM2880_BOARD_EMPIRE_DUAL_TV:
acf43845 1550 case EM2882_BOARD_ZOLID_HYBRID_TV_STICK:
f71095be 1551 dvb->fe[0] = dvb_attach(zl10353_attach,
fe8d54f0
MCC		 1552 &em28xx_zl10353_xc3028_no_i2c_gate,
1553 &dev->i2c_adap[dev->def_i2c_bus]);
f2d0c1c6 1554 if (em28xx_attach_xc3028(0x61, dev) < 0) {
a84f79ae
DH		 1555 result = -EINVAL;
1556 goto out_free;
1557 }
1558 break;
f797608c 1559 case EM2880_BOARD_TERRATEC_HYBRID_XS:
65638011 1560 case EM2880_BOARD_TERRATEC_HYBRID_XS_FR:
d5b3ba9c 1561 case EM2881_BOARD_PINNACLE_HYBRID_PRO:
7ca7ef60 1562 case EM2882_BOARD_DIKOM_DK300:
811fab62 1563 case EM2882_BOARD_KWORLD_VS_DVBT:
fe8d54f0
MCC		 1564 /*
1565 * Those boards could have either a zl10353 or a mt352.
1566 * If the chip id isn't for zl10353, try mt352.
1567 */
f71095be 1568 dvb->fe[0] = dvb_attach(zl10353_attach,
fe8d54f0
MCC		 1569 &em28xx_zl10353_xc3028_no_i2c_gate,
1570 &dev->i2c_adap[dev->def_i2c_bus]);
1571 if (!dvb->fe[0])
f71095be 1572 dvb->fe[0] = dvb_attach(mt352_attach,
fe8d54f0
MCC		 1573 &terratec_xs_mt352_cfg,
1574 &dev->i2c_adap[dev->def_i2c_bus]);
4fb202a8 1575
f2d0c1c6 1576 if (em28xx_attach_xc3028(0x61, dev) < 0) {
f797608c
DH		 1577 result = -EINVAL;
1578 goto out_free;
1579 }
1580 break;
8c47311d
AM		 1581 case EM2870_BOARD_TERRATEC_XS_MT2060:
1582 dvb->fe[0] = dvb_attach(zl10353_attach,
fe8d54f0
MCC		 1583 &em28xx_zl10353_no_i2c_gate_dev,
1584 &dev->i2c_adap[dev->def_i2c_bus]);
1585 if (dvb->fe[0]) {
8c47311d 1586 dvb_attach(mt2060_attach, dvb->fe[0],
fe8d54f0
MCC		 1587 &dev->i2c_adap[dev->def_i2c_bus],
1588 &em28xx_mt2060_config, 1220);
8c47311d
AM		 1589 }
1590 break;
1985f6fb
AP		 1591 case EM2870_BOARD_KWORLD_355U:
1592 dvb->fe[0] = dvb_attach(zl10353_attach,
fe8d54f0
MCC		 1593 &em28xx_zl10353_no_i2c_gate_dev,
1594 &dev->i2c_adap[dev->def_i2c_bus]);
1595 if (dvb->fe[0])
1985f6fb 1596 dvb_attach(qt1010_attach, dvb->fe[0],
fe8d54f0
MCC		 1597 &dev->i2c_adap[dev->def_i2c_bus],
1598 &em28xx_qt1010_config);
1985f6fb 1599 break;
6e7b9ea0 1600 case EM2883_BOARD_KWORLD_HYBRID_330U:
19859229 1601 case EM2882_BOARD_EVGA_INDTUBE:
f71095be 1602 dvb->fe[0] = dvb_attach(s5h1409_attach,
fe8d54f0
MCC		 1603 &em28xx_s5h1409_with_xc3028,
1604 &dev->i2c_adap[dev->def_i2c_bus]);
f2d0c1c6 1605 if (em28xx_attach_xc3028(0x61, dev) < 0) {
6e7b9ea0
RK		 1606 result = -EINVAL;
1607 goto out_free;
1608 }
1609 break;
d7de5d8f 1610 case EM2882_BOARD_KWORLD_ATSC_315U:
f71095be 1611 dvb->fe[0] = dvb_attach(lgdt330x_attach,
fe8d54f0 1612 &em2880_lgdt3303_dev,
23ba635d 1613 0x0e,
fe8d54f0
MCC		 1614 &dev->i2c_adap[dev->def_i2c_bus]);
1615 if (dvb->fe[0]) {
f71095be 1616 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
fdf1bc9f
MCC		 1617 &dev->i2c_adap[dev->def_i2c_bus],
1618 0x61, TUNER_THOMSON_DTT761X)) {
d7de5d8f
FM		 1619 result = -EINVAL;
1620 goto out_free;
1621 }
1622 }
1623 break;
17d9d558 1624 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2:
ad9b4bb2 1625 case EM2882_BOARD_PINNACLE_HYBRID_PRO_330E:
f71095be 1626 dvb->fe[0] = dvb_attach(drxd_attach, &em28xx_drxd, NULL,
29b05e22
MCC		 1627 &dev->i2c_adap[dev->def_i2c_bus],
1628 &dev->intf->dev);
f2d0c1c6 1629 if (em28xx_attach_xc3028(0x61, dev) < 0) {
17d9d558
DH		 1630 result = -EINVAL;
1631 goto out_free;
1632 }
1633 break;
285eb1a4
AP		 1634 case EM2870_BOARD_REDDO_DVB_C_USB_BOX:
1635 /* Philips CU1216L NIM (Philips TDA10023 + Infineon TUA6034) */
f71095be 1636 dvb->fe[0] = dvb_attach(tda10023_attach,
fe8d54f0
MCC		 1637 &em28xx_tda10023_config,
1638 &dev->i2c_adap[dev->def_i2c_bus],
1639 0x48);
f71095be
AP		 1640 if (dvb->fe[0]) {
1641 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
fdf1bc9f
MCC		 1642 &dev->i2c_adap[dev->def_i2c_bus],
1643 0x60, TUNER_PHILIPS_CU1216L)) {
285eb1a4
AP		 1644 result = -EINVAL;
1645 goto out_free;
1646 }
1647 }
1648 break;
7e48b30a 1649 case EM2870_BOARD_KWORLD_A340:
f71095be 1650 dvb->fe[0] = dvb_attach(lgdt3305_attach,
fe8d54f0
MCC		 1651 &em2870_lgdt3304_dev,
1652 &dev->i2c_adap[dev->def_i2c_bus]);
4db8954a
SK		 1653 if (!dvb->fe[0]) {
1654 result = -EINVAL;
1655 goto out_free;
1656 }
1657 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
fdf1bc9f 1658 &dev->i2c_adap[dev->def_i2c_bus],
fe8d54f0
MCC		 1659 &kworld_a340_config)) {
1660 dvb_frontend_detach(dvb->fe[0]);
1661 result = -EINVAL;
1662 goto out_free;
4db8954a 1663 }
7e48b30a 1664 break;
d6a5f921 1665 case EM28174_BOARD_PCTV_290E:
a36a66d7
AP		 1666 /* set default GPIO0 for LNA, used if GPIOLIB is undefined */
1667 dvb->lna_gpio = CXD2820R_GPIO_E | CXD2820R_GPIO_O |
1668 CXD2820R_GPIO_L;
d6a5f921 1669 dvb->fe[0] = dvb_attach(cxd2820r_attach,
7e7b8287 1670 &em28xx_cxd2820r_config,
c7a45e5b 1671 &dev->i2c_adap[dev->def_i2c_bus],
13a5336e 1672 &dvb->lna_gpio);
d6a5f921 1673 if (dvb->fe[0]) {
d6a5f921 1674 /* FE 0 attach tuner */
7e7b8287
MA		 1675 if (!dvb_attach(tda18271_attach,
1676 dvb->fe[0],
1677 0x60,
c7a45e5b 1678 &dev->i2c_adap[dev->def_i2c_bus],
7e7b8287 1679 &em28xx_cxd2820r_tda18271_config)) {
d6a5f921
AP		 1680 dvb_frontend_detach(dvb->fe[0]);
1681 result = -EINVAL;
1682 goto out_free;
1683 }
1e8f31f3 1684
13a5336e 1685#ifdef CONFIG_GPIOLIB
0c42a55c
AP		 1686 /* enable LNA for DVB-T, DVB-T2 and DVB-C */
1687 result = gpio_request_one(dvb->lna_gpio,
fdf1bc9f 1688 GPIOF_OUT_INIT_LOW, NULL);
0c42a55c 1689 if (result)
29b05e22 1690 dev_err(&dev->intf->dev,
ce8591ff
MCC		 1691 "gpio request failed %d\n",
1692 result);
0c42a55c
AP		 1693 else
1694 gpio_free(dvb->lna_gpio);
1695
1696 result = 0; /* continue even set LNA fails */
13a5336e 1697#endif
0c42a55c
AP		 1698 dvb->fe[0]->ops.set_lna = em28xx_pctv_290e_set_lna;
1699 }
1700
82e7dbbd
EDP		 1701 break;
1702 case EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C:
8503232f 1703 {
ad32495b 1704 struct xc5000_config cfg = {};
fdf1bc9f 1705
82e7dbbd
EDP		 1706 hauppauge_hvr930c_init(dev);
1707
de72405f 1708 dvb->fe[0] = dvb_attach(drxk_attach,
fe8d54f0
MCC		 1709 &hauppauge_930c_drxk,
1710 &dev->i2c_adap[dev->def_i2c_bus]);
82e7dbbd
EDP		 1711 if (!dvb->fe[0]) {
1712 result = -EINVAL;
1713 goto out_free;
1714 }
1715 /* FIXME: do we need a pll semaphore? */
1716 dvb->fe[0]->sec_priv = dvb;
1717 sema_init(&dvb->pll_mutex, 1);
1718 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
1719 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
82e7dbbd
EDP		 1720
1721 /* Attach xc5000 */
82e7dbbd 1722 cfg.i2c_address = 0x61;
de72405f 1723 cfg.if_khz = 4000;
82e7dbbd
EDP		 1724
1725 if (dvb->fe[0]->ops.i2c_gate_ctrl)
1726 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1);
fe8d54f0
MCC		 1727 if (!dvb_attach(xc5000_attach, dvb->fe[0],
1728 &dev->i2c_adap[dev->def_i2c_bus], &cfg)) {
82e7dbbd
EDP		 1729 result = -EINVAL;
1730 goto out_free;
1731 }
82e7dbbd
EDP		 1732 if (dvb->fe[0]->ops.i2c_gate_ctrl)
1733 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
1734
fec528b7 1735 break;
8503232f 1736 }
fec528b7
MCC		 1737 case EM2884_BOARD_TERRATEC_H5:
1738 terratec_h5_init(dev);
1739
fe8d54f0
MCC		 1740 dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk,
1741 &dev->i2c_adap[dev->def_i2c_bus]);
c4c3a3d3 1742 if (!dvb->fe[0]) {
fec528b7
MCC		 1743 result = -EINVAL;
1744 goto out_free;
1745 }
1746 /* FIXME: do we need a pll semaphore? */
1747 dvb->fe[0]->sec_priv = dvb;
1748 sema_init(&dvb->pll_mutex, 1);
1749 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
1750 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
fec528b7 1751
c4c3a3d3 1752 /* Attach tda18271 to DVB-C frontend */
fec528b7
MCC		 1753 if (dvb->fe[0]->ops.i2c_gate_ctrl)
1754 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1);
fe8d54f0
MCC		 1755 if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0],
1756 &dev->i2c_adap[dev->def_i2c_bus], 0x60)) {
fec528b7
MCC		 1757 result = -EINVAL;
1758 goto out_free;
1759 }
1760 if (dvb->fe[0]->ops.i2c_gate_ctrl)
1761 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
c4c3a3d3 1762
d6a5f921 1763 break;
4159d01b
MCC		 1764 case EM2884_BOARD_C3TECH_DIGITAL_DUO:
1765 dvb->fe[0] = dvb_attach(mb86a20s_attach,
fe8d54f0
MCC		 1766 &c3tech_duo_mb86a20s_config,
1767 &dev->i2c_adap[dev->def_i2c_bus]);
1768 if (dvb->fe[0])
4159d01b
MCC		 1769 dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
1770 &dev->i2c_adap[dev->def_i2c_bus],
1771 &c3tech_duo_tda18271_config);
1772 break;
f410b409
AB		 1773 case EM28174_BOARD_PCTV_460E:
1774 result = em28174_dvb_init_pctv_460e(dev);
1775 if (result)
8022f9af 1776 goto out_free;
36588715 1777 break;
7c1dfdb0 1778 case EM2874_BOARD_DELOCK_61959:
3553085c
AP		 1779 case EM2874_BOARD_MAXMEDIA_UB425_TC:
1780 /* attach demodulator */
1781 dvb->fe[0] = dvb_attach(drxk_attach, &maxmedia_ub425_tc_drxk,
fe8d54f0 1782 &dev->i2c_adap[dev->def_i2c_bus]);
3553085c
AP		 1783
1784 if (dvb->fe[0]) {
1785 /* disable I2C-gate */
1786 dvb->fe[0]->ops.i2c_gate_ctrl = NULL;
1787
1788 /* attach tuner */
b6c7abb1
AP		 1789 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
1790 &dev->i2c_adap[dev->def_i2c_bus],
1791 &em28xx_cxd2820r_tda18271_config)) {
3553085c
AP		 1792 dvb_frontend_detach(dvb->fe[0]);
1793 result = -EINVAL;
1794 goto out_free;
1795 }
1796 }
c247d7b1 1797 break;
fa5527cd
IK		 1798 case EM2884_BOARD_PCTV_510E:
1799 case EM2884_BOARD_PCTV_520E:
1800 pctv_520e_init(dev);
1801
c247d7b1
AP		 1802 /* attach demodulator */
1803 dvb->fe[0] = dvb_attach(drxk_attach, &pctv_520e_drxk,
fe8d54f0 1804 &dev->i2c_adap[dev->def_i2c_bus]);
c247d7b1
AP		 1805
1806 if (dvb->fe[0]) {
1807 /* attach tuner */
1808 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
c7a45e5b 1809 &dev->i2c_adap[dev->def_i2c_bus],
c247d7b1
AP		 1810 &em28xx_cxd2820r_tda18271_config)) {
1811 dvb_frontend_detach(dvb->fe[0]);
1812 result = -EINVAL;
1813 goto out_free;
1814 }
1815 }
3553085c 1816 break;
1fe0fbd6 1817 case EM2884_BOARD_ELGATO_EYETV_HYBRID_2008:
c8dce008 1818 case EM2884_BOARD_CINERGY_HTC_STICK:
d6a64327 1819 case EM2884_BOARD_TERRATEC_H6:
c8dce008
MB		 1820 terratec_htc_stick_init(dev);
1821
89040136
MB		 1822 /* attach demodulator */
1823 dvb->fe[0] = dvb_attach(drxk_attach, &terratec_htc_stick_drxk,
c7a45e5b 1824 &dev->i2c_adap[dev->def_i2c_bus]);
89040136
MB		 1825 if (!dvb->fe[0]) {
1826 result = -EINVAL;
1827 goto out_free;
1828 }
1829
1830 /* Attach the demodulator. */
1831 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
c7a45e5b 1832 &dev->i2c_adap[dev->def_i2c_bus],
89040136
MB		 1833 &em28xx_cxd2820r_tda18271_config)) {
1834 result = -EINVAL;
1835 goto out_free;
1836 }
1837 break;
1838 case EM2884_BOARD_TERRATEC_HTC_USB_XS:
1839 terratec_htc_usb_xs_init(dev);
1840
c8dce008
MB		 1841 /* attach demodulator */
1842 dvb->fe[0] = dvb_attach(drxk_attach, &terratec_htc_stick_drxk,
c7a45e5b 1843 &dev->i2c_adap[dev->def_i2c_bus]);
c8dce008
MB		 1844 if (!dvb->fe[0]) {
1845 result = -EINVAL;
1846 goto out_free;
1847 }
1848
1849 /* Attach the demodulator. */
1850 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
c7a45e5b 1851 &dev->i2c_adap[dev->def_i2c_bus],
c8dce008
MB		 1852 &em28xx_cxd2820r_tda18271_config)) {
1853 result = -EINVAL;
1854 goto out_free;
1855 }
1856 break;
6dbea9f0
JFT		 1857 case EM2874_BOARD_KWORLD_UB435Q_V2:
1858 dvb->fe[0] = dvb_attach(lgdt3305_attach,
1859 &em2874_lgdt3305_dev,
1860 &dev->i2c_adap[dev->def_i2c_bus]);
1861 if (!dvb->fe[0]) {
1862 result = -EINVAL;
1863 goto out_free;
1864 }
1865
1866 /* Attach the demodulator. */
1867 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
1868 &dev->i2c_adap[dev->def_i2c_bus],
1869 &kworld_ub435q_v2_config)) {
1870 result = -EINVAL;
1871 goto out_free;
1872 }
1873 break;
02bc1f55 1874 case EM2874_BOARD_KWORLD_UB435Q_V3:
ac7a24fb 1875 {
ac7a24fb 1876 struct i2c_adapter *adapter = &dev->i2c_adap[dev->def_i2c_bus];
ac7a24fb 1877
02bc1f55
MCC		 1878 dvb->fe[0] = dvb_attach(lgdt3305_attach,
1879 &em2874_lgdt3305_nogate_dev,
1880 &dev->i2c_adap[dev->def_i2c_bus]);
1881 if (!dvb->fe[0]) {
1882 result = -EINVAL;
1883 goto out_free;
1884 }
1885
ac7a24fb
AP		 1886 /* attach tuner */
1887 kworld_ub435q_v3_config.fe = dvb->fe[0];
ac7a24fb 1888
ad32495b 1889 dvb->i2c_client_tuner = dvb_module_probe("tda18212", NULL,
fe8d54f0 1890 adapter, 0x60,
ad32495b
MCC		 1891 &kworld_ub435q_v3_config);
1892 if (!dvb->i2c_client_tuner) {
ac7a24fb
AP		 1893 dvb_frontend_detach(dvb->fe[0]);
1894 result = -ENODEV;
1895 goto out_free;
1896 }
02bc1f55 1897 break;
ac7a24fb 1898 }
38b2df95 1899 case EM2874_BOARD_PCTV_HD_MINI_80E:
fe8d54f0
MCC		 1900 dvb->fe[0] = dvb_attach(drx39xxj_attach,
1901 &dev->i2c_adap[dev->def_i2c_bus]);
1902 if (dvb->fe[0]) {
1903 dvb->fe[0] = dvb_attach(tda18271_attach, dvb->fe[0],
1904 0x60,
38b2df95
DH		 1905 &dev->i2c_adap[dev->def_i2c_bus],
1906 &pinnacle_80e_dvb_config);
1907 if (!dvb->fe[0]) {
1908 result = -EINVAL;
1909 goto out_free;
1910 }
1911 }
1912 break;
f410b409
AB		 1913 case EM28178_BOARD_PCTV_461E:
1914 result = em28178_dvb_init_pctv_461e(dev);
1915 if (result)
76b91be3 1916 goto out_free;
ec573362 1917 break;
985b0ede
BL		 1918 case EM28178_BOARD_PCTV_461E_V2:
1919 result = em28178_dvb_init_pctv_461e_v2(dev);
1920 if (result)
1921 goto out_free;
1922 break;
19229240 1923 case EM28178_BOARD_PCTV_292E:
f410b409
AB		 1924 result = em28178_dvb_init_pctv_292e(dev);
1925 if (result)
1926 goto out_free;
19229240 1927 break;
fc30dd76 1928 case EM28178_BOARD_TERRATEC_T2_STICK_HD:
f410b409
AB		 1929 result = em28178_dvb_init_terratec_t2_stick_hd(dev);
1930 if (result)
1931 goto out_free;
fc30dd76 1932 break;
ab4d1452 1933 case EM28178_BOARD_PLEX_PX_BCUD:
f410b409
AB		 1934 result = em28178_dvb_init_plex_px_bcud(dev);
1935 if (result)
1936 goto out_free;
ab4d1452 1937 break;
11a2a949 1938 case EM28174_BOARD_HAUPPAUGE_WINTV_DUALHD_DVB:
f410b409
AB		 1939 result = em28174_dvb_init_hauppauge_wintv_dualhd_dvb(dev);
1940 if (result)
1941 goto out_free;
11a2a949 1942 break;
1586342e 1943 case EM28174_BOARD_HAUPPAUGE_WINTV_DUALHD_01595:
f410b409
AB		 1944 result = em28174_dvb_init_hauppauge_wintv_dualhd_01595(dev);
1945 if (result)
1946 goto out_free;
1586342e 1947 break;
3aefb79a 1948 default:
29b05e22 1949 dev_err(&dev->intf->dev,
ce8591ff 1950 "The frontend of your DVB/ATSC card isn't supported yet\n");
3aefb79a
MCC		 1951 break;
1952 }
fe8d54f0 1953 if (!dvb->fe[0]) {
29b05e22 1954 dev_err(&dev->intf->dev, "frontend initialization failed\n");
3421b778
AT		 1955 result = -EINVAL;
1956 goto out_free;
3aefb79a 1957 }
d7cba043 1958 /* define general-purpose callback pointer */
f71095be 1959 dvb->fe[0]->callback = em28xx_tuner_callback;
82e7dbbd 1960 if (dvb->fe[1])
de72405f 1961 dvb->fe[1]->callback = em28xx_tuner_callback;
3aefb79a
MCC		 1962
1963 /* register everything */
29b05e22 1964 result = em28xx_register_dvb(dvb, THIS_MODULE, dev, &dev->intf->dev);
3421b778 1965
6ea54d93 1966 if (result < 0)
3421b778 1967 goto out_free;
3421b778 1968
be7fd3c3
BL		 1969 if (dev->dvb_xfer_bulk) {
1970 dvb_alt = 0;
1971 } else { /* isoc */
1972 dvb_alt = dev->dvb_alt_isoc;
1973 }
1974
1975 udev = interface_to_usbdev(dev->intf);
1976 usb_set_interface(udev, dev->ifnum, dvb_alt);
29b05e22 1977 dev_info(&dev->intf->dev, "DVB extension successfully initialized\n");
47677e51
MCC		 1978
1979 kref_get(&dev->ref);
1980
5013318c
MCC		 1981ret:
1982 em28xx_set_mode(dev, EM28XX_SUSPEND);
1983 mutex_unlock(&dev->lock);
1984 return result;
3421b778
AT		 1985
1986out_free:
1987 kfree(dvb);
1988 dev->dvb = NULL;
5013318c 1989 goto ret;
3aefb79a
MCC		 1990}
1991
0b8bd83c
CR		 1992static inline void prevent_sleep(struct dvb_frontend_ops *ops)
1993{
1994 ops->set_voltage = NULL;
1995 ops->sleep = NULL;
1996 ops->tuner_ops.sleep = NULL;
1997}
1998
f2d0c1c6 1999static int em28xx_dvb_fini(struct em28xx *dev)
3aefb79a 2000{
b45e34f2 2001 struct em28xx_dvb *dvb;
b45e34f2 2002
822b8dea
MCC		 2003 if (dev->is_audio_only) {
2004 /* Shouldn't initialize IR for this interface */
2005 return 0;
2006 }
2007
505b6d0b 2008 if (!dev->board.has_dvb) {
df619181
DH		 2009 /* This device does not support the extension */
2010 return 0;
2011 }
2012
b45e34f2
MCC		 2013 if (!dev->dvb)
2014 return 0;
aa929ad7 2015
29b05e22 2016 dev_info(&dev->intf->dev, "Closing DVB extension\n");
0b8bd83c 2017
b45e34f2 2018 dvb = dev->dvb;
27ba0dac 2019
b45e34f2 2020 em28xx_uninit_usb_xfer(dev, EM28XX_DIGITAL_MODE);
0b8bd83c 2021
b45e34f2 2022 if (dev->disconnected) {
fe8d54f0
MCC		 2023 /*
2024 * We cannot tell the device to sleep
2025 * once it has been unplugged.
2026 */
f68e35af 2027 if (dvb->fe[0]) {
b45e34f2 2028 prevent_sleep(&dvb->fe[0]->ops);
f68e35af
SK		 2029 dvb->fe[0]->exit = DVB_FE_DEVICE_REMOVED;
2030 }
2031 if (dvb->fe[1]) {
b45e34f2 2032 prevent_sleep(&dvb->fe[1]->ops);
f68e35af
SK		 2033 dvb->fe[1]->exit = DVB_FE_DEVICE_REMOVED;
2034 }
b45e34f2 2035 }
425f53aa 2036
910b0797
MS		 2037 em28xx_unregister_dvb(dvb);
2038
ad32495b
MCC		 2039 /* release I2C module bindings */
2040 dvb_module_release(dvb->i2c_client_sec);
2041 dvb_module_release(dvb->i2c_client_tuner);
2042 dvb_module_release(dvb->i2c_client_demod);
19229240 2043
b45e34f2
MCC		 2044 kfree(dvb);
2045 dev->dvb = NULL;
2046 kref_put(&dev->ref, em28xx_free_device);
2047
3aefb79a
MCC		 2048 return 0;
2049}
2050
ca2b46da
SK		 2051static int em28xx_dvb_suspend(struct em28xx *dev)
2052{
2053 int ret = 0;
2054
2055 if (dev->is_audio_only)
2056 return 0;
2057
2058 if (!dev->board.has_dvb)
2059 return 0;
2060
29b05e22 2061 dev_info(&dev->intf->dev, "Suspending DVB extension\n");
ca2b46da
SK		 2062 if (dev->dvb) {
2063 struct em28xx_dvb *dvb = dev->dvb;
2064
2065 if (dvb->fe[0]) {
2066 ret = dvb_frontend_suspend(dvb->fe[0]);
29b05e22 2067 dev_info(&dev->intf->dev, "fe0 suspend %d\n", ret);
ca2b46da
SK		 2068 }
2069 if (dvb->fe[1]) {
2070 dvb_frontend_suspend(dvb->fe[1]);
29b05e22 2071 dev_info(&dev->intf->dev, "fe1 suspend %d\n", ret);
ca2b46da
SK		 2072 }
2073 }
2074
2075 return 0;
2076}
2077
2078static int em28xx_dvb_resume(struct em28xx *dev)
2079{
2080 int ret = 0;
2081
2082 if (dev->is_audio_only)
2083 return 0;
2084
2085 if (!dev->board.has_dvb)
2086 return 0;
2087
29b05e22 2088 dev_info(&dev->intf->dev, "Resuming DVB extension\n");
ca2b46da
SK		 2089 if (dev->dvb) {
2090 struct em28xx_dvb *dvb = dev->dvb;
2091
2092 if (dvb->fe[0]) {
2093 ret = dvb_frontend_resume(dvb->fe[0]);
29b05e22 2094 dev_info(&dev->intf->dev, "fe0 resume %d\n", ret);
ca2b46da
SK		 2095 }
2096
2097 if (dvb->fe[1]) {
2098 ret = dvb_frontend_resume(dvb->fe[1]);
29b05e22 2099 dev_info(&dev->intf->dev, "fe1 resume %d\n", ret);
ca2b46da
SK		 2100 }
2101 }
2102
2103 return 0;
2104}
2105
3aefb79a
MCC		 2106static struct em28xx_ops dvb_ops = {
2107 .id = EM28XX_DVB,
2108 .name = "Em28xx dvb Extension",
f2d0c1c6
JW		 2109 .init = em28xx_dvb_init,
2110 .fini = em28xx_dvb_fini,
ca2b46da
SK		 2111 .suspend = em28xx_dvb_suspend,
2112 .resume = em28xx_dvb_resume,
3aefb79a
MCC		 2113};
2114
2115static int __init em28xx_dvb_register(void)
2116{
2117 return em28xx_register_extension(&dvb_ops);
2118}
2119
2120static void __exit em28xx_dvb_unregister(void)
2121{
2122 em28xx_unregister_extension(&dvb_ops);
2123}
2124
2125module_init(em28xx_dvb_register);
2126module_exit(em28xx_dvb_unregister);
Linux 6.x block layer and io_uring tree(s)