Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
e92f9a56 MK |
2 | /* |
3 | * mxl111sf-demod.c - driver for the MaxLinear MXL111SF DVB-T demodulator | |
4 | * | |
08e10972 | 5 | * Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org> |
e92f9a56 MK |
6 | */ |
7 | ||
8 | #include "mxl111sf-demod.h" | |
9 | #include "mxl111sf-reg.h" | |
10 | ||
11 | /* debug */ | |
12 | static int mxl111sf_demod_debug; | |
13 | module_param_named(debug, mxl111sf_demod_debug, int, 0644); | |
14 | MODULE_PARM_DESC(debug, "set debugging level (1=info (or-able))."); | |
15 | ||
16 | #define mxl_dbg(fmt, arg...) \ | |
17 | if (mxl111sf_demod_debug) \ | |
18 | mxl_printk(KERN_DEBUG, fmt, ##arg) | |
19 | ||
20 | /* ------------------------------------------------------------------------ */ | |
21 | ||
22 | struct mxl111sf_demod_state { | |
23 | struct mxl111sf_state *mxl_state; | |
24 | ||
9c5e44a0 | 25 | const struct mxl111sf_demod_config *cfg; |
e92f9a56 MK |
26 | |
27 | struct dvb_frontend fe; | |
28 | }; | |
29 | ||
30 | /* ------------------------------------------------------------------------ */ | |
31 | ||
32 | static int mxl111sf_demod_read_reg(struct mxl111sf_demod_state *state, | |
33 | u8 addr, u8 *data) | |
34 | { | |
35 | return (state->cfg->read_reg) ? | |
36 | state->cfg->read_reg(state->mxl_state, addr, data) : | |
37 | -EINVAL; | |
38 | } | |
39 | ||
40 | static int mxl111sf_demod_write_reg(struct mxl111sf_demod_state *state, | |
41 | u8 addr, u8 data) | |
42 | { | |
43 | return (state->cfg->write_reg) ? | |
44 | state->cfg->write_reg(state->mxl_state, addr, data) : | |
45 | -EINVAL; | |
46 | } | |
47 | ||
48 | static | |
49 | int mxl111sf_demod_program_regs(struct mxl111sf_demod_state *state, | |
50 | struct mxl111sf_reg_ctrl_info *ctrl_reg_info) | |
51 | { | |
52 | return (state->cfg->program_regs) ? | |
53 | state->cfg->program_regs(state->mxl_state, ctrl_reg_info) : | |
54 | -EINVAL; | |
55 | } | |
56 | ||
57 | /* ------------------------------------------------------------------------ */ | |
58 | /* TPS */ | |
59 | ||
60 | static | |
61 | int mxl1x1sf_demod_get_tps_code_rate(struct mxl111sf_demod_state *state, | |
0df289a2 | 62 | enum fe_code_rate *code_rate) |
e92f9a56 MK |
63 | { |
64 | u8 val; | |
65 | int ret = mxl111sf_demod_read_reg(state, V6_CODE_RATE_TPS_REG, &val); | |
66 | /* bit<2:0> - 000:1/2, 001:2/3, 010:3/4, 011:5/6, 100:7/8 */ | |
67 | if (mxl_fail(ret)) | |
68 | goto fail; | |
69 | ||
70 | switch (val & V6_CODE_RATE_TPS_MASK) { | |
71 | case 0: | |
72 | *code_rate = FEC_1_2; | |
73 | break; | |
74 | case 1: | |
75 | *code_rate = FEC_2_3; | |
76 | break; | |
77 | case 2: | |
78 | *code_rate = FEC_3_4; | |
79 | break; | |
80 | case 3: | |
81 | *code_rate = FEC_5_6; | |
82 | break; | |
83 | case 4: | |
84 | *code_rate = FEC_7_8; | |
85 | break; | |
86 | } | |
87 | fail: | |
88 | return ret; | |
89 | } | |
90 | ||
91 | static | |
531157b3 | 92 | int mxl1x1sf_demod_get_tps_modulation(struct mxl111sf_demod_state *state, |
0df289a2 | 93 | enum fe_modulation *modulation) |
e92f9a56 MK |
94 | { |
95 | u8 val; | |
96 | int ret = mxl111sf_demod_read_reg(state, V6_MODORDER_TPS_REG, &val); | |
97 | /* Constellation, 00 : QPSK, 01 : 16QAM, 10:64QAM */ | |
98 | if (mxl_fail(ret)) | |
99 | goto fail; | |
100 | ||
101 | switch ((val & V6_PARAM_CONSTELLATION_MASK) >> 4) { | |
102 | case 0: | |
531157b3 | 103 | *modulation = QPSK; |
e92f9a56 MK |
104 | break; |
105 | case 1: | |
531157b3 | 106 | *modulation = QAM_16; |
e92f9a56 MK |
107 | break; |
108 | case 2: | |
531157b3 | 109 | *modulation = QAM_64; |
e92f9a56 MK |
110 | break; |
111 | } | |
112 | fail: | |
113 | return ret; | |
114 | } | |
115 | ||
116 | static | |
117 | int mxl1x1sf_demod_get_tps_guard_fft_mode(struct mxl111sf_demod_state *state, | |
0df289a2 | 118 | enum fe_transmit_mode *fft_mode) |
e92f9a56 MK |
119 | { |
120 | u8 val; | |
121 | int ret = mxl111sf_demod_read_reg(state, V6_MODE_TPS_REG, &val); | |
122 | /* FFT Mode, 00:2K, 01:8K, 10:4K */ | |
123 | if (mxl_fail(ret)) | |
124 | goto fail; | |
125 | ||
126 | switch ((val & V6_PARAM_FFT_MODE_MASK) >> 2) { | |
127 | case 0: | |
128 | *fft_mode = TRANSMISSION_MODE_2K; | |
129 | break; | |
130 | case 1: | |
131 | *fft_mode = TRANSMISSION_MODE_8K; | |
132 | break; | |
133 | case 2: | |
134 | *fft_mode = TRANSMISSION_MODE_4K; | |
135 | break; | |
136 | } | |
137 | fail: | |
138 | return ret; | |
139 | } | |
140 | ||
141 | static | |
142 | int mxl1x1sf_demod_get_tps_guard_interval(struct mxl111sf_demod_state *state, | |
0df289a2 | 143 | enum fe_guard_interval *guard) |
e92f9a56 MK |
144 | { |
145 | u8 val; | |
146 | int ret = mxl111sf_demod_read_reg(state, V6_CP_TPS_REG, &val); | |
147 | /* 00:1/32, 01:1/16, 10:1/8, 11:1/4 */ | |
148 | if (mxl_fail(ret)) | |
149 | goto fail; | |
150 | ||
151 | switch ((val & V6_PARAM_GI_MASK) >> 4) { | |
152 | case 0: | |
153 | *guard = GUARD_INTERVAL_1_32; | |
154 | break; | |
155 | case 1: | |
156 | *guard = GUARD_INTERVAL_1_16; | |
157 | break; | |
158 | case 2: | |
159 | *guard = GUARD_INTERVAL_1_8; | |
160 | break; | |
161 | case 3: | |
162 | *guard = GUARD_INTERVAL_1_4; | |
163 | break; | |
164 | } | |
165 | fail: | |
166 | return ret; | |
167 | } | |
168 | ||
169 | static | |
170 | int mxl1x1sf_demod_get_tps_hierarchy(struct mxl111sf_demod_state *state, | |
0df289a2 | 171 | enum fe_hierarchy *hierarchy) |
e92f9a56 MK |
172 | { |
173 | u8 val; | |
174 | int ret = mxl111sf_demod_read_reg(state, V6_TPS_HIERACHY_REG, &val); | |
175 | /* bit<6:4> - 000:Non hierarchy, 001:1, 010:2, 011:4 */ | |
176 | if (mxl_fail(ret)) | |
177 | goto fail; | |
178 | ||
179 | switch ((val & V6_TPS_HIERARCHY_INFO_MASK) >> 6) { | |
180 | case 0: | |
181 | *hierarchy = HIERARCHY_NONE; | |
182 | break; | |
183 | case 1: | |
184 | *hierarchy = HIERARCHY_1; | |
185 | break; | |
186 | case 2: | |
187 | *hierarchy = HIERARCHY_2; | |
188 | break; | |
189 | case 3: | |
190 | *hierarchy = HIERARCHY_4; | |
191 | break; | |
192 | } | |
193 | fail: | |
194 | return ret; | |
195 | } | |
196 | ||
197 | /* ------------------------------------------------------------------------ */ | |
198 | /* LOCKS */ | |
199 | ||
200 | static | |
201 | int mxl1x1sf_demod_get_sync_lock_status(struct mxl111sf_demod_state *state, | |
202 | int *sync_lock) | |
203 | { | |
204 | u8 val = 0; | |
205 | int ret = mxl111sf_demod_read_reg(state, V6_SYNC_LOCK_REG, &val); | |
206 | if (mxl_fail(ret)) | |
207 | goto fail; | |
208 | *sync_lock = (val & SYNC_LOCK_MASK) >> 4; | |
209 | fail: | |
210 | return ret; | |
211 | } | |
212 | ||
213 | static | |
214 | int mxl1x1sf_demod_get_rs_lock_status(struct mxl111sf_demod_state *state, | |
215 | int *rs_lock) | |
216 | { | |
217 | u8 val = 0; | |
218 | int ret = mxl111sf_demod_read_reg(state, V6_RS_LOCK_DET_REG, &val); | |
219 | if (mxl_fail(ret)) | |
220 | goto fail; | |
221 | *rs_lock = (val & RS_LOCK_DET_MASK) >> 3; | |
222 | fail: | |
223 | return ret; | |
224 | } | |
225 | ||
226 | static | |
227 | int mxl1x1sf_demod_get_tps_lock_status(struct mxl111sf_demod_state *state, | |
228 | int *tps_lock) | |
229 | { | |
230 | u8 val = 0; | |
231 | int ret = mxl111sf_demod_read_reg(state, V6_TPS_LOCK_REG, &val); | |
232 | if (mxl_fail(ret)) | |
233 | goto fail; | |
234 | *tps_lock = (val & V6_PARAM_TPS_LOCK_MASK) >> 6; | |
235 | fail: | |
236 | return ret; | |
237 | } | |
238 | ||
239 | static | |
240 | int mxl1x1sf_demod_get_fec_lock_status(struct mxl111sf_demod_state *state, | |
241 | int *fec_lock) | |
242 | { | |
243 | u8 val = 0; | |
244 | int ret = mxl111sf_demod_read_reg(state, V6_IRQ_STATUS_REG, &val); | |
245 | if (mxl_fail(ret)) | |
246 | goto fail; | |
247 | *fec_lock = (val & IRQ_MASK_FEC_LOCK) >> 4; | |
248 | fail: | |
249 | return ret; | |
250 | } | |
251 | ||
252 | #if 0 | |
253 | static | |
254 | int mxl1x1sf_demod_get_cp_lock_status(struct mxl111sf_demod_state *state, | |
255 | int *cp_lock) | |
256 | { | |
257 | u8 val = 0; | |
258 | int ret = mxl111sf_demod_read_reg(state, V6_CP_LOCK_DET_REG, &val); | |
259 | if (mxl_fail(ret)) | |
260 | goto fail; | |
261 | *cp_lock = (val & V6_CP_LOCK_DET_MASK) >> 2; | |
262 | fail: | |
263 | return ret; | |
264 | } | |
265 | #endif | |
266 | ||
267 | static int mxl1x1sf_demod_reset_irq_status(struct mxl111sf_demod_state *state) | |
268 | { | |
269 | return mxl111sf_demod_write_reg(state, 0x0e, 0xff); | |
270 | } | |
271 | ||
272 | /* ------------------------------------------------------------------------ */ | |
273 | ||
531157b3 | 274 | static int mxl111sf_demod_set_frontend(struct dvb_frontend *fe) |
e92f9a56 MK |
275 | { |
276 | struct mxl111sf_demod_state *state = fe->demodulator_priv; | |
277 | int ret = 0; | |
278 | ||
279 | struct mxl111sf_reg_ctrl_info phy_pll_patch[] = { | |
280 | {0x00, 0xff, 0x01}, /* change page to 1 */ | |
281 | {0x40, 0xff, 0x05}, | |
282 | {0x40, 0xff, 0x01}, | |
283 | {0x41, 0xff, 0xca}, | |
284 | {0x41, 0xff, 0xc0}, | |
285 | {0x00, 0xff, 0x00}, /* change page to 0 */ | |
286 | {0, 0, 0} | |
287 | }; | |
288 | ||
289 | mxl_dbg("()"); | |
290 | ||
291 | if (fe->ops.tuner_ops.set_params) { | |
14d24d14 | 292 | ret = fe->ops.tuner_ops.set_params(fe); |
e92f9a56 MK |
293 | if (mxl_fail(ret)) |
294 | goto fail; | |
295 | msleep(50); | |
296 | } | |
297 | ret = mxl111sf_demod_program_regs(state, phy_pll_patch); | |
298 | mxl_fail(ret); | |
299 | msleep(50); | |
300 | ret = mxl1x1sf_demod_reset_irq_status(state); | |
301 | mxl_fail(ret); | |
302 | msleep(100); | |
303 | fail: | |
304 | return ret; | |
305 | } | |
306 | ||
307 | /* ------------------------------------------------------------------------ */ | |
308 | ||
309 | #if 0 | |
310 | /* resets TS Packet error count */ | |
311 | /* After setting 7th bit of V5_PER_COUNT_RESET_REG, it should be reset to 0. */ | |
312 | static | |
313 | int mxl1x1sf_demod_reset_packet_error_count(struct mxl111sf_demod_state *state) | |
314 | { | |
315 | struct mxl111sf_reg_ctrl_info reset_per_count[] = { | |
316 | {0x20, 0x01, 0x01}, | |
317 | {0x20, 0x01, 0x00}, | |
318 | {0, 0, 0} | |
319 | }; | |
320 | return mxl111sf_demod_program_regs(state, reset_per_count); | |
321 | } | |
322 | #endif | |
323 | ||
324 | /* returns TS Packet error count */ | |
325 | /* PER Count = FEC_PER_COUNT * (2 ** (FEC_PER_SCALE * 4)) */ | |
326 | static int mxl111sf_demod_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) | |
327 | { | |
328 | struct mxl111sf_demod_state *state = fe->demodulator_priv; | |
329 | u32 fec_per_count, fec_per_scale; | |
330 | u8 val; | |
331 | int ret; | |
332 | ||
333 | *ucblocks = 0; | |
334 | ||
335 | /* FEC_PER_COUNT Register */ | |
336 | ret = mxl111sf_demod_read_reg(state, V6_FEC_PER_COUNT_REG, &val); | |
337 | if (mxl_fail(ret)) | |
338 | goto fail; | |
339 | ||
340 | fec_per_count = val; | |
341 | ||
342 | /* FEC_PER_SCALE Register */ | |
343 | ret = mxl111sf_demod_read_reg(state, V6_FEC_PER_SCALE_REG, &val); | |
344 | if (mxl_fail(ret)) | |
345 | goto fail; | |
346 | ||
347 | val &= V6_FEC_PER_SCALE_MASK; | |
348 | val *= 4; | |
349 | ||
350 | fec_per_scale = 1 << val; | |
351 | ||
352 | fec_per_count *= fec_per_scale; | |
353 | ||
354 | *ucblocks = fec_per_count; | |
355 | fail: | |
356 | return ret; | |
357 | } | |
358 | ||
7e8d8f6d MK |
359 | #ifdef MXL111SF_DEMOD_ENABLE_CALCULATIONS |
360 | /* FIXME: leaving this enabled breaks the build on some architectures, | |
361 | * and we shouldn't have any floating point math in the kernel, anyway. | |
362 | * | |
363 | * These macros need to be re-written, but it's harmless to simply | |
364 | * return zero for now. */ | |
e92f9a56 MK |
365 | #define CALCULATE_BER(avg_errors, count) \ |
366 | ((u32)(avg_errors * 4)/(count*64*188*8)) | |
367 | #define CALCULATE_SNR(data) \ | |
368 | ((u32)((10 * (u32)data / 64) - 2.5)) | |
7e8d8f6d MK |
369 | #else |
370 | #define CALCULATE_BER(avg_errors, count) 0 | |
371 | #define CALCULATE_SNR(data) 0 | |
372 | #endif | |
e92f9a56 MK |
373 | |
374 | static int mxl111sf_demod_read_ber(struct dvb_frontend *fe, u32 *ber) | |
375 | { | |
376 | struct mxl111sf_demod_state *state = fe->demodulator_priv; | |
377 | u8 val1, val2, val3; | |
378 | int ret; | |
379 | ||
380 | *ber = 0; | |
381 | ||
382 | ret = mxl111sf_demod_read_reg(state, V6_RS_AVG_ERRORS_LSB_REG, &val1); | |
383 | if (mxl_fail(ret)) | |
384 | goto fail; | |
385 | ret = mxl111sf_demod_read_reg(state, V6_RS_AVG_ERRORS_MSB_REG, &val2); | |
386 | if (mxl_fail(ret)) | |
387 | goto fail; | |
388 | ret = mxl111sf_demod_read_reg(state, V6_N_ACCUMULATE_REG, &val3); | |
389 | if (mxl_fail(ret)) | |
390 | goto fail; | |
391 | ||
392 | *ber = CALCULATE_BER((val1 | (val2 << 8)), val3); | |
393 | fail: | |
394 | return ret; | |
395 | } | |
396 | ||
397 | static int mxl111sf_demod_calc_snr(struct mxl111sf_demod_state *state, | |
398 | u16 *snr) | |
399 | { | |
400 | u8 val1, val2; | |
401 | int ret; | |
402 | ||
403 | *snr = 0; | |
404 | ||
405 | ret = mxl111sf_demod_read_reg(state, V6_SNR_RB_LSB_REG, &val1); | |
406 | if (mxl_fail(ret)) | |
407 | goto fail; | |
408 | ret = mxl111sf_demod_read_reg(state, V6_SNR_RB_MSB_REG, &val2); | |
409 | if (mxl_fail(ret)) | |
410 | goto fail; | |
411 | ||
412 | *snr = CALCULATE_SNR(val1 | ((val2 & 0x03) << 8)); | |
413 | fail: | |
414 | return ret; | |
415 | } | |
416 | ||
417 | static int mxl111sf_demod_read_snr(struct dvb_frontend *fe, u16 *snr) | |
418 | { | |
419 | struct mxl111sf_demod_state *state = fe->demodulator_priv; | |
420 | ||
421 | int ret = mxl111sf_demod_calc_snr(state, snr); | |
422 | if (mxl_fail(ret)) | |
423 | goto fail; | |
424 | ||
425 | *snr /= 10; /* 0.1 dB */ | |
426 | fail: | |
427 | return ret; | |
428 | } | |
429 | ||
430 | static int mxl111sf_demod_read_status(struct dvb_frontend *fe, | |
0df289a2 | 431 | enum fe_status *status) |
e92f9a56 MK |
432 | { |
433 | struct mxl111sf_demod_state *state = fe->demodulator_priv; | |
434 | int ret, locked, cr_lock, sync_lock, fec_lock; | |
435 | ||
436 | *status = 0; | |
437 | ||
438 | ret = mxl1x1sf_demod_get_rs_lock_status(state, &locked); | |
439 | if (mxl_fail(ret)) | |
440 | goto fail; | |
441 | ret = mxl1x1sf_demod_get_tps_lock_status(state, &cr_lock); | |
442 | if (mxl_fail(ret)) | |
443 | goto fail; | |
444 | ret = mxl1x1sf_demod_get_sync_lock_status(state, &sync_lock); | |
445 | if (mxl_fail(ret)) | |
446 | goto fail; | |
447 | ret = mxl1x1sf_demod_get_fec_lock_status(state, &fec_lock); | |
448 | if (mxl_fail(ret)) | |
449 | goto fail; | |
450 | ||
451 | if (locked) | |
452 | *status |= FE_HAS_SIGNAL; | |
453 | if (cr_lock) | |
454 | *status |= FE_HAS_CARRIER; | |
455 | if (sync_lock) | |
456 | *status |= FE_HAS_SYNC; | |
457 | if (fec_lock) /* false positives? */ | |
458 | *status |= FE_HAS_VITERBI; | |
459 | ||
460 | if ((locked) && (cr_lock) && (sync_lock)) | |
461 | *status |= FE_HAS_LOCK; | |
462 | fail: | |
463 | return ret; | |
464 | } | |
465 | ||
466 | static int mxl111sf_demod_read_signal_strength(struct dvb_frontend *fe, | |
467 | u16 *signal_strength) | |
468 | { | |
469 | struct mxl111sf_demod_state *state = fe->demodulator_priv; | |
0df289a2 | 470 | enum fe_modulation modulation; |
ad7b57d5 | 471 | int ret; |
e92f9a56 MK |
472 | u16 snr; |
473 | ||
ad7b57d5 MCC |
474 | ret = mxl111sf_demod_calc_snr(state, &snr); |
475 | if (ret < 0) | |
476 | return ret; | |
477 | ret = mxl1x1sf_demod_get_tps_modulation(state, &modulation); | |
478 | if (ret < 0) | |
479 | return ret; | |
e92f9a56 | 480 | |
531157b3 | 481 | switch (modulation) { |
e92f9a56 MK |
482 | case QPSK: |
483 | *signal_strength = (snr >= 1300) ? | |
484 | min(65535, snr * 44) : snr * 38; | |
485 | break; | |
486 | case QAM_16: | |
487 | *signal_strength = (snr >= 1500) ? | |
488 | min(65535, snr * 38) : snr * 33; | |
489 | break; | |
490 | case QAM_64: | |
491 | *signal_strength = (snr >= 2000) ? | |
492 | min(65535, snr * 29) : snr * 25; | |
493 | break; | |
494 | default: | |
495 | *signal_strength = 0; | |
496 | return -EINVAL; | |
497 | } | |
498 | ||
499 | return 0; | |
500 | } | |
501 | ||
7e3e68bc MCC |
502 | static int mxl111sf_demod_get_frontend(struct dvb_frontend *fe, |
503 | struct dtv_frontend_properties *p) | |
e92f9a56 MK |
504 | { |
505 | struct mxl111sf_demod_state *state = fe->demodulator_priv; | |
506 | ||
507 | mxl_dbg("()"); | |
508 | #if 0 | |
509 | p->inversion = /* FIXME */ ? INVERSION_ON : INVERSION_OFF; | |
510 | #endif | |
511 | if (fe->ops.tuner_ops.get_bandwidth) | |
531157b3 | 512 | fe->ops.tuner_ops.get_bandwidth(fe, &p->bandwidth_hz); |
e92f9a56 MK |
513 | if (fe->ops.tuner_ops.get_frequency) |
514 | fe->ops.tuner_ops.get_frequency(fe, &p->frequency); | |
531157b3 MCC |
515 | mxl1x1sf_demod_get_tps_code_rate(state, &p->code_rate_HP); |
516 | mxl1x1sf_demod_get_tps_code_rate(state, &p->code_rate_LP); | |
517 | mxl1x1sf_demod_get_tps_modulation(state, &p->modulation); | |
e92f9a56 | 518 | mxl1x1sf_demod_get_tps_guard_fft_mode(state, |
531157b3 | 519 | &p->transmission_mode); |
e92f9a56 | 520 | mxl1x1sf_demod_get_tps_guard_interval(state, |
531157b3 | 521 | &p->guard_interval); |
e92f9a56 | 522 | mxl1x1sf_demod_get_tps_hierarchy(state, |
531157b3 | 523 | &p->hierarchy); |
e92f9a56 MK |
524 | |
525 | return 0; | |
526 | } | |
527 | ||
528 | static | |
529 | int mxl111sf_demod_get_tune_settings(struct dvb_frontend *fe, | |
530 | struct dvb_frontend_tune_settings *tune) | |
531 | { | |
532 | tune->min_delay_ms = 1000; | |
533 | return 0; | |
534 | } | |
535 | ||
536 | static void mxl111sf_demod_release(struct dvb_frontend *fe) | |
537 | { | |
538 | struct mxl111sf_demod_state *state = fe->demodulator_priv; | |
539 | mxl_dbg("()"); | |
540 | kfree(state); | |
541 | fe->demodulator_priv = NULL; | |
542 | } | |
543 | ||
bd336e63 | 544 | static const struct dvb_frontend_ops mxl111sf_demod_ops = { |
531157b3 | 545 | .delsys = { SYS_DVBT }, |
e92f9a56 | 546 | .info = { |
539b4695 | 547 | .name = "MaxLinear MxL111SF DVB-T demodulator", |
f1b1eabf MCC |
548 | .frequency_min_hz = 177 * MHz, |
549 | .frequency_max_hz = 858 * MHz, | |
550 | .frequency_stepsize_hz = 166666, | |
e92f9a56 MK |
551 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | |
552 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | |
553 | FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | | |
554 | FE_CAN_QAM_AUTO | | |
555 | FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | | |
556 | FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER | |
557 | }, | |
558 | .release = mxl111sf_demod_release, | |
559 | #if 0 | |
560 | .init = mxl111sf_init, | |
561 | .i2c_gate_ctrl = mxl111sf_i2c_gate_ctrl, | |
562 | #endif | |
531157b3 MCC |
563 | .set_frontend = mxl111sf_demod_set_frontend, |
564 | .get_frontend = mxl111sf_demod_get_frontend, | |
e92f9a56 MK |
565 | .get_tune_settings = mxl111sf_demod_get_tune_settings, |
566 | .read_status = mxl111sf_demod_read_status, | |
567 | .read_signal_strength = mxl111sf_demod_read_signal_strength, | |
568 | .read_ber = mxl111sf_demod_read_ber, | |
569 | .read_snr = mxl111sf_demod_read_snr, | |
570 | .read_ucblocks = mxl111sf_demod_read_ucblocks, | |
571 | }; | |
572 | ||
573 | struct dvb_frontend *mxl111sf_demod_attach(struct mxl111sf_state *mxl_state, | |
9c5e44a0 | 574 | const struct mxl111sf_demod_config *cfg) |
e92f9a56 MK |
575 | { |
576 | struct mxl111sf_demod_state *state = NULL; | |
577 | ||
578 | mxl_dbg("()"); | |
579 | ||
580 | state = kzalloc(sizeof(struct mxl111sf_demod_state), GFP_KERNEL); | |
581 | if (state == NULL) | |
582 | return NULL; | |
583 | ||
584 | state->mxl_state = mxl_state; | |
585 | state->cfg = cfg; | |
586 | ||
587 | memcpy(&state->fe.ops, &mxl111sf_demod_ops, | |
588 | sizeof(struct dvb_frontend_ops)); | |
589 | ||
590 | state->fe.demodulator_priv = state; | |
591 | return &state->fe; | |
592 | } | |
593 | EXPORT_SYMBOL_GPL(mxl111sf_demod_attach); | |
594 | ||
595 | MODULE_DESCRIPTION("MaxLinear MxL111SF DVB-T demodulator driver"); | |
08e10972 | 596 | MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>"); |
e92f9a56 MK |
597 | MODULE_LICENSE("GPL"); |
598 | MODULE_VERSION("0.1"); |