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media: drivers: remove "/**" from non-kernel-doc comments
[linux-2.6-block.git] / drivers / media / usb / dvb-usb / dib0700_devices.c
CommitLineData
b7f54910
PB		 1/* Linux driver for devices based on the DiBcom DiB0700 USB bridge
2 *
3 * This program is free software; you can redistribute it and/or modify it
4 * under the terms of the GNU General Public License as published by the Free
5 * Software Foundation, version 2.
6 *
ba3fe3a9 7 * Copyright (C) 2005-9 DiBcom, SA et al
b7f54910
PB		 8 */
9#include "dib0700.h"
10
11#include "dib3000mc.h"
91bb9be6 12#include "dib7000m.h"
a75763ff 13#include "dib7000p.h"
ba3fe3a9 14#include "dib8000.h"
be9bae10 15#include "dib9000.h"
b7f54910 16#include "mt2060.h"
54d75eba 17#include "mt2266.h"
6ca8f0b9 18#include "tuner-xc2028.h"
cb22cb52 19#include "xc5000.h"
8d009a0c 20#include "xc4000.h"
cb22cb52 21#include "s5h1411.h"
01373a5c 22#include "dib0070.h"
03245a5e 23#include "dib0090.h"
ce904bcb
MK		 24#include "lgdt3305.h"
25#include "mxl5007t.h"
b7f54910 26
7fb3fc0c
PB		 27static int force_lna_activation;
28module_param(force_lna_activation, int, 0644);
f319ed91 29MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), if applicable for the device (default: 0=automatic/off).");
7fb3fc0c 30
01373a5c 31struct dib0700_adapter_state {
14d24d14 32 int (*set_param_save) (struct dvb_frontend *);
be9bae10 33 const struct firmware *frontend_firmware;
8abe4a0a 34 struct dib7000p_ops dib7000p_ops;
d44913c1 35 struct dib8000_ops dib8000_ops;
01373a5c
PB		 36};
37
38/* Hauppauge Nova-T 500 (aka Bristol)
b7f54910
PB		 39 * has a LNA on GPIO0 which is enabled by setting 1 */
40static struct mt2060_config bristol_mt2060_config[2] = {
41 {
42 .i2c_address = 0x60,
303cbeaa 43 .clock_out = 3,
b7f54910
PB		 44 }, {
45 .i2c_address = 0x61,
46 }
47};
48
99afb989 49
b7f54910
PB		 50static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
51 .band_caps = BAND_VHF | BAND_UHF,
01b4bf31 52 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
b7f54910 53
6958effe
PB		 54 .agc1_max = 42598,
55 .agc1_min = 17694,
56 .agc2_max = 45875,
57 .agc2_min = 0,
b7f54910 58
6958effe
PB		 59 .agc1_pt1 = 0,
60 .agc1_pt2 = 59,
b7f54910 61
6958effe
PB		 62 .agc1_slope1 = 0,
63 .agc1_slope2 = 69,
b7f54910
PB		 64
65 .agc2_pt1 = 0,
6958effe 66 .agc2_pt2 = 59,
b7f54910 67
6958effe
PB		 68 .agc2_slope1 = 111,
69 .agc2_slope2 = 28,
b7f54910
PB		 70};
71
72static struct dib3000mc_config bristol_dib3000mc_config[2] = {
73 { .agc = &bristol_dib3000p_mt2060_agc_config,
74 .max_time = 0x196,
75 .ln_adc_level = 0x1cc7,
76 .output_mpeg2_in_188_bytes = 1,
77 },
78 { .agc = &bristol_dib3000p_mt2060_agc_config,
79 .max_time = 0x196,
80 .ln_adc_level = 0x1cc7,
81 .output_mpeg2_in_188_bytes = 1,
82 }
83};
84
85static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
86{
6958effe 87 struct dib0700_state *st = adap->dev->priv;
b7f54910
PB		 88 if (adap->id == 0) {
89 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
90 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
91 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
92 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
93
7fb3fc0c
PB		 94 if (force_lna_activation)
95 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
96 else
97 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
6958effe 98
b7f54910
PB		 99 if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
100 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
101 return -ENODEV;
102 }
103 }
6958effe 104 st->mt2060_if1[adap->id] = 1220;
77eed219 105 return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
6958effe 106 (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
b7f54910
PB		 107}
108
4a2b1083 109static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
c52344fd
OD		 110{
111 struct i2c_msg msg[2] = {
112 { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
113 { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
114 };
115 if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
116 return 0;
117}
118
b7f54910
PB		 119static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
120{
c52344fd 121 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
77eed219 122 struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
c52344fd
OD		 123 s8 a;
124 int if1=1220;
da5ee486
AV		 125 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
126 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
c52344fd
OD		 127 if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
128 }
9a9677af
MK		 129 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
130 &bristol_mt2060_config[adap->id], if1) == NULL ?
131 -ENODEV : 0;
b7f54910
PB		 132}
133
01373a5c 134/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
54d75eba 135
b6884a17
PB		 136/* MT226x */
137static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
138 {
9c783036 139 BAND_UHF,
b6884a17
PB		 140
141 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
142 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 143 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
144 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
145
146 1130,
147 21,
148
149 0,
150 118,
151
152 0,
153 3530,
154 1,
155 0,
156
157 65535,
158 33770,
159 65535,
160 23592,
161
162 0,
163 62,
164 255,
165 64,
166 64,
167 132,
168 192,
169 80,
170 80,
171
172 17,
173 27,
174 23,
175 51,
176
177 1,
b6884a17 178 }, {
9c783036 179 BAND_VHF | BAND_LBAND,
b6884a17
PB		 180
181 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
182 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 183 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
184 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
185
186 2372,
187 21,
188
189 0,
190 118,
191
192 0,
193 3530,
194 1,
195 0,
196
197 65535,
198 0,
199 65535,
200 23592,
201
202 0,
203 128,
204 128,
205 128,
206 0,
207 128,
208 253,
209 81,
210 0,
211
212 17,
213 27,
214 23,
215 51,
216
217 1,
b6884a17 218 }
54d75eba
OD		 219};
220
221static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
09628b2c
MCC		 222 .internal = 60000,
223 .sampling = 30000,
224 .pll_prediv = 1,
225 .pll_ratio = 8,
226 .pll_range = 3,
227 .pll_reset = 1,
228 .pll_bypass = 0,
229 .enable_refdiv = 0,
230 .bypclk_div = 0,
231 .IO_CLK_en_core = 1,
232 .ADClkSrc = 1,
233 .modulo = 2,
234 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
235 .ifreq = 0,
236 .timf = 20452225,
54d75eba
OD		 237};
238
239static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
240 { .output_mpeg2_in_188_bytes = 1,
241 .hostbus_diversity = 1,
242 .tuner_is_baseband = 1,
243
b6884a17
PB		 244 .agc_config_count = 2,
245 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 246 .bw = &stk7700d_mt2266_pll_config,
247
b6884a17
PB		 248 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
249 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
250 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 251 },
252 { .output_mpeg2_in_188_bytes = 1,
253 .hostbus_diversity = 1,
254 .tuner_is_baseband = 1,
255
b6884a17
PB		 256 .agc_config_count = 2,
257 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 258 .bw = &stk7700d_mt2266_pll_config,
259
b6884a17
PB		 260 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
261 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
262 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 263 }
264};
265
266static struct mt2266_config stk7700d_mt2266_config[2] = {
267 { .i2c_address = 0x60
268 },
269 { .i2c_address = 0x60
270 }
271};
272
132c3188
DG		 273static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
274{
8abe4a0a
MCC		 275 struct dib0700_adapter_state *state = adap->priv;
276
277 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
278 return -ENODEV;
279
132c3188
DG		 280 if (adap->id == 0) {
281 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
282 msleep(10);
283 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
284 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
285 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
286 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
287 msleep(10);
288 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
289 msleep(10);
8abe4a0a 290 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7
DH		 291 stk7700d_dib7000p_mt2266_config)
292 != 0) {
8abe4a0a 293 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 294 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 295 return -ENODEV;
296 }
132c3188
DG		 297 }
298
8abe4a0a 299 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 300 0x80 + (adap->id << 1),
301 &stk7700d_dib7000p_mt2266_config[adap->id]);
132c3188 302
77eed219 303 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
132c3188
DG		 304}
305
54d75eba
OD		 306static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
307{
8abe4a0a
MCC		 308 struct dib0700_adapter_state *state = adap->priv;
309
310 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
311 return -ENODEV;
312
54d75eba
OD		 313 if (adap->id == 0) {
314 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
315 msleep(10);
316 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
317 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
318 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
319 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
320 msleep(10);
321 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
322 msleep(10);
323 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
8abe4a0a 324 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7
DH		 325 stk7700d_dib7000p_mt2266_config)
326 != 0) {
8abe4a0a 327 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 328 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 329 return -ENODEV;
330 }
54d75eba
OD		 331 }
332
8abe4a0a 333 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 334 0x80 + (adap->id << 1),
335 &stk7700d_dib7000p_mt2266_config[adap->id]);
54d75eba 336
77eed219 337 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
54d75eba
OD		 338}
339
340static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
341{
342 struct i2c_adapter *tun_i2c;
8abe4a0a
MCC		 343 struct dib0700_adapter_state *state = adap->priv;
344
345 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
346 DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 347 return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
1ebcad77 348 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
54d75eba
OD		 349}
350
6ca8f0b9 351/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
b1721d0d 352static struct dibx000_agc_config xc3028_agc_config = {
09628b2c 353 .band_caps = BAND_VHF | BAND_UHF,
6ca8f0b9
AC		 354 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
355 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
356 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 357 .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
358 .inv_gain = 712,
359 .time_stabiliz = 21,
360 .alpha_level = 0,
361 .thlock = 118,
362 .wbd_inv = 0,
363 .wbd_ref = 2867,
364 .wbd_sel = 0,
365 .wbd_alpha = 2,
366 .agc1_max = 0,
367 .agc1_min = 0,
368 .agc2_max = 39718,
369 .agc2_min = 9930,
370 .agc1_pt1 = 0,
371 .agc1_pt2 = 0,
372 .agc1_pt3 = 0,
373 .agc1_slope1 = 0,
374 .agc1_slope2 = 0,
375 .agc2_pt1 = 0,
376 .agc2_pt2 = 128,
377 .agc2_slope1 = 29,
378 .agc2_slope2 = 29,
379 .alpha_mant = 17,
380 .alpha_exp = 27,
381 .beta_mant = 23,
382 .beta_exp = 51,
383 .perform_agc_softsplit = 1,
6ca8f0b9
AC		 384};
385
386/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
b1721d0d 387static struct dibx000_bandwidth_config xc3028_bw_config = {
09628b2c
MCC		 388 .internal = 60000,
389 .sampling = 30000,
390 .pll_prediv = 1,
391 .pll_ratio = 8,
392 .pll_range = 3,
393 .pll_reset = 1,
394 .pll_bypass = 0,
395 .enable_refdiv = 0,
396 .bypclk_div = 0,
397 .IO_CLK_en_core = 1,
398 .ADClkSrc = 1,
399 .modulo = 0,
400 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
401 .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
402 .timf = 20452225,
403 .xtal_hz = 30000000,
6ca8f0b9
AC		 404};
405
406static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
407 .output_mpeg2_in_188_bytes = 1,
408 .tuner_is_baseband = 1,
409
410 .agc_config_count = 1,
411 .agc = &xc3028_agc_config,
412 .bw = &xc3028_bw_config,
413
414 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
415 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
416 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
417};
418
d7cba043
MK		 419static int stk7700ph_xc3028_callback(void *ptr, int component,
420 int command, int arg)
6ca8f0b9
AC		 421{
422 struct dvb_usb_adapter *adap = ptr;
8abe4a0a 423 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9
AC		 424
425 switch (command) {
426 case XC2028_TUNER_RESET:
427 /* Send the tuner in then out of reset */
8abe4a0a
MCC		 428 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
429 msleep(10);
430 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6ca8f0b9
AC		 431 break;
432 case XC2028_RESET_CLK:
433 break;
434 default:
435 err("%s: unknown command %d, arg %d\n", __func__,
436 command, arg);
437 return -EINVAL;
438 }
439 return 0;
440}
441
442static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
443 .fname = XC2028_DEFAULT_FIRMWARE,
444 .max_len = 64,
445 .demod = XC3028_FE_DIBCOM52,
446};
447
448static struct xc2028_config stk7700ph_xc3028_config = {
449 .i2c_addr = 0x61,
6ca8f0b9
AC		 450 .ctrl = &stk7700ph_xc3028_ctrl,
451};
452
453static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
454{
455 struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 456 struct dib0700_adapter_state *state = adap->priv;
457
458 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
459 return -ENODEV;
6ca8f0b9 460
da5ee486
AV		 461 if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
462 desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
8abe4a0a 463 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 464 else
8abe4a0a 465 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
6ca8f0b9
AC		 466 msleep(20);
467 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
468 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
469 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
470 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
471 msleep(10);
472 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
473 msleep(20);
474 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
475 msleep(10);
476
8abe4a0a 477 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 478 &stk7700ph_dib7700_xc3028_config) != 0) {
8abe4a0a 479 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 480 __func__);
eb0c1994 481 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 482 return -ENODEV;
483 }
6ca8f0b9 484
8abe4a0a 485 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9
AC		 486 &stk7700ph_dib7700_xc3028_config);
487
77eed219 488 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
6ca8f0b9
AC		 489}
490
491static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
492{
493 struct i2c_adapter *tun_i2c;
8abe4a0a 494 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9 495
8abe4a0a 496 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
6ca8f0b9
AC		 497 DIBX000_I2C_INTERFACE_TUNER, 1);
498
499 stk7700ph_xc3028_config.i2c_adap = tun_i2c;
d7cba043
MK		 500
501 /* FIXME: generalize & move to common area */
77eed219 502 adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
6ca8f0b9 503
77eed219 504 return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
6ca8f0b9
AC		 505 == NULL ? -ENODEV : 0;
506}
507
4b330bee 508#define DEFAULT_RC_INTERVAL 50
54d75eba 509
72b39310
MCC		 510/*
511 * This function is used only when firmware is < 1.20 version. Newer
512 * firmwares use bulk mode, with functions implemented at dib0700_core,
513 * at dib0700_rc_urb_completion()
514 */
515static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
54d75eba 516{
6d741bfe 517 enum rc_proto protocol;
120703f9 518 u32 scancode;
72b39310 519 u8 toggle;
54d75eba 520 int i;
54d75eba 521 struct dib0700_state *st = d->priv;
6a207100 522
6a207100
DH		 523 if (st->fw_version >= 0x10200) {
524 /* For 1.20 firmware , We need to keep the RC polling
525 callback so we can reuse the input device setup in
526 dvb-usb-remote.c. However, the actual work is being done
527 in the bulk URB completion handler. */
528 return 0;
529 }
530
bd1f976c
MCC		 531 st->buf[0] = REQUEST_POLL_RC;
532 st->buf[1] = 0;
533
534 i = dib0700_ctrl_rd(d, st->buf, 2, st->buf, 4);
72b39310 535 if (i <= 0) {
034d65ed 536 err("RC Query Failed");
bd1f976c 537 return -EIO;
54d75eba 538 }
58e6f95e
PB		 539
540 /* losing half of KEY_0 events from Philipps rc5 remotes.. */
bd1f976c
MCC		 541 if (st->buf[0] == 0 && st->buf[1] == 0
542 && st->buf[2] == 0 && st->buf[3] == 0)
72b39310 543 return 0;
58e6f95e 544
bd1f976c 545 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)st->buf[3 - 2],(int)st->buf[3 - 3],(int)st->buf[3 - 1],(int)st->buf[3]); */
58e6f95e 546
c4018fa2 547 dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
58e6f95e 548
0ffd1ab3 549 switch (d->props.rc.core.protocol) {
6d741bfe 550 case RC_PROTO_BIT_NEC:
58e6f95e 551 /* NEC protocol sends repeat code as 0 0 0 FF */
bd1f976c
MCC		 552 if ((st->buf[3 - 2] == 0x00) && (st->buf[3 - 3] == 0x00) &&
553 (st->buf[3] == 0xff)) {
120703f9
DH		 554 rc_repeat(d->rc_dev);
555 return 0;
58e6f95e 556 }
72b39310 557
6d741bfe 558 protocol = RC_PROTO_NEC;
bd1f976c 559 scancode = RC_SCANCODE_NEC(st->buf[3 - 2], st->buf[3 - 3]);
120703f9 560 toggle = 0;
58e6f95e 561 break;
120703f9 562
72b39310 563 default:
58e6f95e 564 /* RC-5 protocol changes toggle bit on new keypress */
6d741bfe 565 protocol = RC_PROTO_RC5;
bd1f976c
MCC		 566 scancode = RC_SCANCODE_RC5(st->buf[3 - 2], st->buf[3 - 3]);
567 toggle = st->buf[3 - 1];
58e6f95e
PB		 568 break;
569 }
120703f9
DH		 570
571 rc_keydown(d->rc_dev, protocol, scancode, toggle);
54d75eba
OD		 572 return 0;
573}
574
b7f54910 575/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
a75763ff 576static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
9c783036 577 BAND_UHF | BAND_VHF,
69ea31e7
PB		 578
579 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
580 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 581 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
582 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
583
584 712,
585 41,
586
587 0,
588 118,
589
590 0,
591 4095,
592 0,
593 0,
594
595 42598,
596 17694,
597 45875,
598 2621,
599 0,
600 76,
601 139,
602 52,
603 59,
604 107,
605 172,
606 57,
607 70,
608
609 21,
610 25,
611 28,
612 48,
613
614 1,
615 { 0,
616 107,
617 51800,
618 24700
69ea31e7
PB		 619 },
620};
621
a75763ff 622static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
09628b2c 623 .band_caps = BAND_UHF | BAND_VHF,
a75763ff
PB		 624 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
625 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 626 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
627 .inv_gain = 712,
628 .time_stabiliz = 41,
629 .alpha_level = 0,
630 .thlock = 118,
631 .wbd_inv = 0,
632 .wbd_ref = 4095,
633 .wbd_sel = 0,
634 .wbd_alpha = 0,
635 .agc1_max = 42598,
636 .agc1_min = 16384,
637 .agc2_max = 42598,
638 .agc2_min = 0,
639 .agc1_pt1 = 0,
640 .agc1_pt2 = 137,
641 .agc1_pt3 = 255,
642 .agc1_slope1 = 0,
643 .agc1_slope2 = 255,
644 .agc2_pt1 = 0,
645 .agc2_pt2 = 0,
646 .agc2_slope1 = 0,
647 .agc2_slope2 = 41,
648 .alpha_mant = 15,
649 .alpha_exp = 25,
650 .beta_mant = 28,
651 .beta_exp = 48,
652 .perform_agc_softsplit = 0,
a75763ff
PB		 653};
654
655static struct dibx000_bandwidth_config stk7700p_pll_config = {
09628b2c
MCC		 656 .internal = 60000,
657 .sampling = 30000,
658 .pll_prediv = 1,
659 .pll_ratio = 8,
660 .pll_range = 3,
661 .pll_reset = 1,
662 .pll_bypass = 0,
663 .enable_refdiv = 0,
664 .bypclk_div = 0,
665 .IO_CLK_en_core = 1,
666 .ADClkSrc = 1,
667 .modulo = 0,
668 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
669 .ifreq = 60258167,
670 .timf = 20452225,
671 .xtal_hz = 30000000,
69ea31e7
PB		 672};
673
674static struct dib7000m_config stk7700p_dib7000m_config = {
675 .dvbt_mode = 1,
676 .output_mpeg2_in_188_bytes = 1,
677 .quartz_direct = 1,
678
679 .agc_config_count = 1,
a75763ff
PB		 680 .agc = &stk7700p_7000m_mt2060_agc_config,
681 .bw = &stk7700p_pll_config,
682
683 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
684 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
685 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
686};
687
688static struct dib7000p_config stk7700p_dib7000p_config = {
689 .output_mpeg2_in_188_bytes = 1,
690
b6884a17 691 .agc_config_count = 1,
a75763ff
PB		 692 .agc = &stk7700p_7000p_mt2060_agc_config,
693 .bw = &stk7700p_pll_config,
69ea31e7
PB		 694
695 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
696 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
697 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
b7f54910
PB		 698};
699
700static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
701{
69ea31e7 702 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 703 struct dib0700_adapter_state *state = adap->priv;
704
705 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
706 return -ENODEV;
707
b7f54910 708 /* unless there is no real power management in DVB - we leave the device on GPIO6 */
a75763ff
PB		 709
710 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
711 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
712
69ea31e7 713 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
a75763ff
PB		 714 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
715
b7f54910 716 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
a75763ff
PB		 717 dib0700_ctrl_clock(adap->dev, 72, 1);
718 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
719
720 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
b7f54910 721
69ea31e7 722 st->mt2060_if1[0] = 1220;
a75763ff 723
8abe4a0a
MCC		 724 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
725 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
a75763ff 726 st->is_dib7000pc = 1;
8abe4a0a 727 } else {
8abe4a0a 728 memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
77eed219 729 adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
8abe4a0a 730 }
a75763ff 731
77eed219 732 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
b7f54910
PB		 733}
734
69ea31e7
PB		 735static struct mt2060_config stk7700p_mt2060_config = {
736 0x60
737};
738
b7f54910
PB		 739static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
740{
c52344fd 741 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
69ea31e7 742 struct dib0700_state *st = adap->dev->priv;
a75763ff 743 struct i2c_adapter *tun_i2c;
8abe4a0a 744 struct dib0700_adapter_state *state = adap->priv;
c52344fd
OD		 745 s8 a;
746 int if1=1220;
8abe4a0a 747
da5ee486
AV		 748 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
749 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
c52344fd
OD		 750 if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
751 }
a75763ff 752 if (st->is_dib7000pc)
8abe4a0a 753 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 754 else
77eed219 755 tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 756
77eed219 757 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
c52344fd 758 if1) == NULL ? -ENODEV : 0;
b7f54910
PB		 759}
760
01373a5c
PB		 761/* DIB7070 generic */
762static struct dibx000_agc_config dib7070_agc_config = {
09628b2c 763 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
01373a5c
PB		 764 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
765 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
09628b2c
MCC		 766 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
767 .inv_gain = 600,
768 .time_stabiliz = 10,
769 .alpha_level = 0,
770 .thlock = 118,
771 .wbd_inv = 0,
772 .wbd_ref = 3530,
773 .wbd_sel = 1,
774 .wbd_alpha = 5,
775 .agc1_max = 65535,
776 .agc1_min = 0,
777 .agc2_max = 65535,
778 .agc2_min = 0,
779 .agc1_pt1 = 0,
780 .agc1_pt2 = 40,
781 .agc1_pt3 = 183,
782 .agc1_slope1 = 206,
783 .agc1_slope2 = 255,
784 .agc2_pt1 = 72,
785 .agc2_pt2 = 152,
786 .agc2_slope1 = 88,
787 .agc2_slope2 = 90,
788 .alpha_mant = 17,
789 .alpha_exp = 27,
790 .beta_mant = 23,
791 .beta_exp = 51,
792 .perform_agc_softsplit = 0,
01373a5c
PB		 793};
794
795static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
796{
8abe4a0a
MCC		 797 struct dvb_usb_adapter *adap = fe->dvb->priv;
798 struct dib0700_adapter_state *state = adap->priv;
799
7e5ce651 800 deb_info("reset: %d", onoff);
8abe4a0a 801 return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
01373a5c
PB		 802}
803
804static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
805{
8abe4a0a
MCC		 806 struct dvb_usb_adapter *adap = fe->dvb->priv;
807 struct dib0700_adapter_state *state = adap->priv;
808
7e5ce651 809 deb_info("sleep: %d", onoff);
8abe4a0a 810 return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
01373a5c
PB		 811}
812
813static struct dib0070_config dib7070p_dib0070_config[2] = {
814 {
815 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
816 .reset = dib7070_tuner_reset,
817 .sleep = dib7070_tuner_sleep,
818 .clock_khz = 12000,
7e5ce651
PB		 819 .clock_pad_drive = 4,
820 .charge_pump = 2,
01373a5c
PB		 821 }, {
822 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
823 .reset = dib7070_tuner_reset,
824 .sleep = dib7070_tuner_sleep,
825 .clock_khz = 12000,
7e5ce651 826 .charge_pump = 2,
01373a5c
PB		 827 }
828};
829
d300bd69
OG		 830static struct dib0070_config dib7770p_dib0070_config = {
831 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
832 .reset = dib7070_tuner_reset,
833 .sleep = dib7070_tuner_sleep,
834 .clock_khz = 12000,
835 .clock_pad_drive = 0,
836 .flip_chip = 1,
eac1fe10 837 .charge_pump = 2,
d300bd69
OG		 838};
839
14d24d14 840static int dib7070_set_param_override(struct dvb_frontend *fe)
01373a5c 841{
47b163af 842 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
01373a5c
PB		 843 struct dvb_usb_adapter *adap = fe->dvb->priv;
844 struct dib0700_adapter_state *state = adap->priv;
845
846 u16 offset;
47b163af 847 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
01373a5c
PB		 848 switch (band) {
849 case BAND_VHF: offset = 950; break;
850 case BAND_UHF:
851 default: offset = 550; break;
852 }
853 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
8abe4a0a 854 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
14d24d14 855 return state->set_param_save(fe);
01373a5c
PB		 856}
857
14d24d14 858static int dib7770_set_param_override(struct dvb_frontend *fe)
d300bd69 859{
47b163af
MCC		 860 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
861 struct dvb_usb_adapter *adap = fe->dvb->priv;
862 struct dib0700_adapter_state *state = adap->priv;
d300bd69 863
316c46b8
MCC		 864 u16 offset;
865 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
866 switch (band) {
867 case BAND_VHF:
868 state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
869 offset = 850;
870 break;
871 case BAND_UHF:
872 default:
873 state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
874 offset = 250;
875 break;
876 }
877 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
878 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
879 return state->set_param_save(fe);
d300bd69
OG		 880}
881
882static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
883{
8abe4a0a
MCC		 884 struct dib0700_adapter_state *st = adap->priv;
885 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
d300bd69
OG		 886 DIBX000_I2C_INTERFACE_TUNER, 1);
887
8abe4a0a
MCC		 888 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
889 &dib7770p_dib0070_config) == NULL)
890 return -ENODEV;
d300bd69 891
8abe4a0a
MCC		 892 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
893 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
894 return 0;
d300bd69
OG		 895}
896
01373a5c
PB		 897static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
898{
899 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a 900 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
01373a5c
PB		 901
902 if (adap->id == 0) {
77eed219 903 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
01373a5c
PB		 904 return -ENODEV;
905 } else {
77eed219 906 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
01373a5c
PB		 907 return -ENODEV;
908 }
909
77eed219
MK		 910 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
911 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
01373a5c
PB		 912 return 0;
913}
914
e192a7cf
OG		 915static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
916 u16 pid, int onoff)
917{
8abe4a0a 918 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 919 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 920
e192a7cf 921 if (st->is_dib7000pc)
8abe4a0a 922 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
77eed219 923 return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
e192a7cf
OG		 924}
925
926static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
927{
928 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 929 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 930 if (st->is_dib7000pc)
8abe4a0a 931 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
77eed219 932 return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
e192a7cf
OG		 933}
934
f8731f4d
OG		 935static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
936{
8abe4a0a
MCC		 937 struct dib0700_adapter_state *state = adapter->priv;
938 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 939}
940
941static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
942{
8abe4a0a
MCC		 943 struct dib0700_adapter_state *state = adapter->priv;
944 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d
OG		 945}
946
01373a5c 947static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
09628b2c
MCC		 948 .internal = 60000,
949 .sampling = 15000,
950 .pll_prediv = 1,
951 .pll_ratio = 20,
952 .pll_range = 3,
953 .pll_reset = 1,
954 .pll_bypass = 0,
955 .enable_refdiv = 0,
956 .bypclk_div = 0,
957 .IO_CLK_en_core = 1,
958 .ADClkSrc = 1,
959 .modulo = 2,
960 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
961 .ifreq = (0 << 25) | 0,
962 .timf = 20452225,
963 .xtal_hz = 12000000,
01373a5c
PB		 964};
965
966static struct dib7000p_config dib7070p_dib7000p_config = {
967 .output_mpeg2_in_188_bytes = 1,
968
969 .agc_config_count = 1,
970 .agc = &dib7070_agc_config,
971 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 972 .tuner_is_baseband = 1,
973 .spur_protect = 1,
01373a5c
PB		 974
975 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
976 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
977 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
978
979 .hostbus_diversity = 1,
980};
981
982/* STK7070P */
983static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
984{
da5ee486 985 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 986 struct dib0700_adapter_state *state = adap->priv;
987
988 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
989 return -ENODEV;
990
da5ee486
AV		 991 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
992 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
993 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 994 else
da5ee486 995 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
01373a5c
PB		 996 msleep(10);
997 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
998 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
999 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1000 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1001
1002 dib0700_ctrl_clock(adap->dev, 72, 1);
1003
1004 msleep(10);
1005 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1006 msleep(10);
1007 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1008
8abe4a0a 1009 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 1010 &dib7070p_dib7000p_config) != 0) {
8abe4a0a 1011 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 1012 __func__);
eb0c1994 1013 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 1014 return -ENODEV;
1015 }
01373a5c 1016
8abe4a0a 1017 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9 1018 &dib7070p_dib7000p_config);
77eed219 1019 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 1020}
1021
90e12cec
OG		 1022/* STK7770P */
1023static struct dib7000p_config dib7770p_dib7000p_config = {
1024 .output_mpeg2_in_188_bytes = 1,
1025
1026 .agc_config_count = 1,
1027 .agc = &dib7070_agc_config,
1028 .bw = &dib7070_bw_config_12_mhz,
1029 .tuner_is_baseband = 1,
1030 .spur_protect = 1,
1031
1032 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
1033 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
1034 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1035
1036 .hostbus_diversity = 1,
1037 .enable_current_mirror = 1,
970d14c6 1038 .disable_sample_and_hold = 0,
90e12cec
OG		 1039};
1040
1041static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
1042{
1043 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 1044 struct dib0700_adapter_state *state = adap->priv;
1045
1046 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
1047 return -ENODEV;
1048
90e12cec
OG		 1049 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
1050 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
1051 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1052 else
1053 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1054 msleep(10);
1055 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1056 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1057 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1058 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1059
1060 dib0700_ctrl_clock(adap->dev, 72, 1);
1061
1062 msleep(10);
1063 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1064 msleep(10);
1065 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1066
8abe4a0a 1067 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
90e12cec 1068 &dib7770p_dib7000p_config) != 0) {
8abe4a0a 1069 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
90e12cec 1070 __func__);
eb0c1994 1071 dvb_detach(state->dib7000p_ops.set_wbd_ref);
90e12cec
OG		 1072 return -ENODEV;
1073 }
1074
8abe4a0a 1075 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
90e12cec 1076 &dib7770p_dib7000p_config);
77eed219 1077 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
90e12cec
OG		 1078}
1079
ba3fe3a9
PB		 1080/* DIB807x generic */
1081static struct dibx000_agc_config dib807x_agc_config[2] = {
1082 {
1083 BAND_VHF,
1084 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1085 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1086 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
1087 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1088 * P_agc_write=0 */
1089 (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
1090 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1091 (0 << 0), /* setup*/
1092
1093 600, /* inv_gain*/
1094 10, /* time_stabiliz*/
1095
1096 0, /* alpha_level*/
1097 118, /* thlock*/
1098
1099 0, /* wbd_inv*/
1100 3530, /* wbd_ref*/
1101 1, /* wbd_sel*/
1102 5, /* wbd_alpha*/
1103
1104 65535, /* agc1_max*/
1105 0, /* agc1_min*/
1106
1107 65535, /* agc2_max*/
1108 0, /* agc2_min*/
1109
1110 0, /* agc1_pt1*/
1111 40, /* agc1_pt2*/
1112 183, /* agc1_pt3*/
1113 206, /* agc1_slope1*/
1114 255, /* agc1_slope2*/
1115 72, /* agc2_pt1*/
1116 152, /* agc2_pt2*/
1117 88, /* agc2_slope1*/
1118 90, /* agc2_slope2*/
1119
1120 17, /* alpha_mant*/
1121 27, /* alpha_exp*/
1122 23, /* beta_mant*/
1123 51, /* beta_exp*/
1124
1125 0, /* perform_agc_softsplit*/
1126 }, {
1127 BAND_UHF,
1128 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1129 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1130 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1131 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1132 * P_agc_write=0 */
1133 (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
1134 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1135 (0 << 0), /* setup */
1136
1137 600, /* inv_gain*/
1138 10, /* time_stabiliz*/
1139
1140 0, /* alpha_level*/
1141 118, /* thlock*/
1142
1143 0, /* wbd_inv*/
1144 3530, /* wbd_ref*/
1145 1, /* wbd_sel*/
1146 5, /* wbd_alpha*/
1147
1148 65535, /* agc1_max*/
1149 0, /* agc1_min*/
1150
1151 65535, /* agc2_max*/
1152 0, /* agc2_min*/
1153
1154 0, /* agc1_pt1*/
1155 40, /* agc1_pt2*/
1156 183, /* agc1_pt3*/
1157 206, /* agc1_slope1*/
1158 255, /* agc1_slope2*/
1159 72, /* agc2_pt1*/
1160 152, /* agc2_pt2*/
1161 88, /* agc2_slope1*/
1162 90, /* agc2_slope2*/
1163
1164 17, /* alpha_mant*/
1165 27, /* alpha_exp*/
1166 23, /* beta_mant*/
1167 51, /* beta_exp*/
1168
1169 0, /* perform_agc_softsplit*/
1170 }
1171};
1172
1173static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
09628b2c
MCC		 1174 .internal = 60000,
1175 .sampling = 15000,
1176 .pll_prediv = 1,
1177 .pll_ratio = 20,
1178 .pll_range = 3,
1179 .pll_reset = 1,
1180 .pll_bypass = 0,
1181 .enable_refdiv = 0,
1182 .bypclk_div = 0,
1183 .IO_CLK_en_core = 1,
1184 .ADClkSrc = 1,
1185 .modulo = 2,
1186 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
1187 .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
1188 .timf = 18179755,
1189 .xtal_hz = 12000000,
ba3fe3a9
PB		 1190};
1191
1192static struct dib8000_config dib807x_dib8000_config[2] = {
1193 {
1194 .output_mpeg2_in_188_bytes = 1,
1195
1196 .agc_config_count = 2,
1197 .agc = dib807x_agc_config,
1198 .pll = &dib807x_bw_config_12_mhz,
1199 .tuner_is_baseband = 1,
1200
1201 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1202 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1203 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1204
1205 .hostbus_diversity = 1,
1206 .div_cfg = 1,
1207 .agc_control = &dib0070_ctrl_agc_filter,
1208 .output_mode = OUTMODE_MPEG2_FIFO,
1209 .drives = 0x2d98,
1210 }, {
1211 .output_mpeg2_in_188_bytes = 1,
1212
1213 .agc_config_count = 2,
1214 .agc = dib807x_agc_config,
1215 .pll = &dib807x_bw_config_12_mhz,
1216 .tuner_is_baseband = 1,
1217
1218 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1219 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1220 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1221
1222 .hostbus_diversity = 1,
1223 .agc_control = &dib0070_ctrl_agc_filter,
1224 .output_mode = OUTMODE_MPEG2_FIFO,
1225 .drives = 0x2d98,
1226 }
1227};
1228
03245a5e 1229static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1230{
d44913c1
MCC		 1231 struct dvb_usb_adapter *adap = fe->dvb->priv;
1232 struct dib0700_adapter_state *state = adap->priv;
1233
1234 return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
ba3fe3a9
PB		 1235}
1236
03245a5e 1237static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1238{
d44913c1
MCC		 1239 struct dvb_usb_adapter *adap = fe->dvb->priv;
1240 struct dib0700_adapter_state *state = adap->priv;
1241
1242 return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
ba3fe3a9
PB		 1243}
1244
1245static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
1246 { 240, 7},
1247 { 0xffff, 6},
1248};
1249
1250static struct dib0070_config dib807x_dib0070_config[2] = {
1251 {
1252 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1253 .reset = dib80xx_tuner_reset,
1254 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1255 .clock_khz = 12000,
1256 .clock_pad_drive = 4,
1257 .vga_filter = 1,
1258 .force_crystal_mode = 1,
1259 .enable_third_order_filter = 1,
1260 .charge_pump = 0,
1261 .wbd_gain = dib8070_wbd_gain_cfg,
1262 .osc_buffer_state = 0,
1263 .freq_offset_khz_uhf = -100,
1264 .freq_offset_khz_vhf = -100,
1265 }, {
1266 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1267 .reset = dib80xx_tuner_reset,
1268 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1269 .clock_khz = 12000,
1270 .clock_pad_drive = 2,
1271 .vga_filter = 1,
1272 .force_crystal_mode = 1,
1273 .enable_third_order_filter = 1,
1274 .charge_pump = 0,
1275 .wbd_gain = dib8070_wbd_gain_cfg,
1276 .osc_buffer_state = 0,
1277 .freq_offset_khz_uhf = -25,
1278 .freq_offset_khz_vhf = -25,
1279 }
1280};
1281
14d24d14 1282static int dib807x_set_param_override(struct dvb_frontend *fe)
ba3fe3a9 1283{
47b163af 1284 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
ba3fe3a9
PB		 1285 struct dvb_usb_adapter *adap = fe->dvb->priv;
1286 struct dib0700_adapter_state *state = adap->priv;
1287
1288 u16 offset = dib0070_wbd_offset(fe);
47b163af 1289 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
ba3fe3a9
PB		 1290 switch (band) {
1291 case BAND_VHF:
1292 offset += 750;
1293 break;
1294 case BAND_UHF: /* fall-thru wanted */
1295 default:
1296 offset += 250; break;
1297 }
1298 deb_info("WBD for DiB8000: %d\n", offset);
d44913c1 1299 state->dib8000_ops.set_wbd_ref(fe, offset);
ba3fe3a9 1300
14d24d14 1301 return state->set_param_save(fe);
ba3fe3a9
PB		 1302}
1303
1304static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
1305{
1306 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1307 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
ba3fe3a9
PB		 1308 DIBX000_I2C_INTERFACE_TUNER, 1);
1309
1310 if (adap->id == 0) {
77eed219 1311 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1312 &dib807x_dib0070_config[0]) == NULL)
1313 return -ENODEV;
1314 } else {
77eed219 1315 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1316 &dib807x_dib0070_config[1]) == NULL)
1317 return -ENODEV;
1318 }
1319
77eed219
MK		 1320 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1321 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
ba3fe3a9
PB		 1322 return 0;
1323}
1324
9c783036
OG		 1325static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
1326 u16 pid, int onoff)
f8731f4d 1327{
d44913c1
MCC		 1328 struct dib0700_adapter_state *state = adapter->priv;
1329
1330 return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 1331}
1332
9c783036 1333static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
be9bae10 1334 int onoff)
f8731f4d 1335{
d44913c1
MCC		 1336 struct dib0700_adapter_state *state = adapter->priv;
1337
1338 return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d 1339}
ba3fe3a9
PB		 1340
1341/* STK807x */
1342static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
1343{
d44913c1
MCC		 1344 struct dib0700_adapter_state *state = adap->priv;
1345
1346 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1347 return -ENODEV;
1348
ba3fe3a9
PB		 1349 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1350 msleep(10);
1351 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1352 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1353 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1354
1355 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1356
1357 dib0700_ctrl_clock(adap->dev, 72, 1);
1358
1359 msleep(10);
1360 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1361 msleep(10);
1362 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1363
d44913c1 1364 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
0c32dbd7 1365 0x80, 0);
ba3fe3a9 1366
d44913c1 1367 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1368 &dib807x_dib8000_config[0]);
1369
77eed219 1370 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1371}
1372
1373/* STK807xPVR */
1374static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
1375{
d44913c1
MCC		 1376 struct dib0700_adapter_state *state = adap->priv;
1377
1378 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1379 return -ENODEV;
1380
ba3fe3a9
PB		 1381 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1382 msleep(30);
1383 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1384 msleep(500);
1385 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1386 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1387 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1388
1389 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1390
1391 dib0700_ctrl_clock(adap->dev, 72, 1);
1392
1393 msleep(10);
1394 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1395 msleep(10);
1396 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1397
1398 /* initialize IC 0 */
d44913c1 1399 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
ba3fe3a9 1400
d44913c1 1401 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1402 &dib807x_dib8000_config[0]);
1403
77eed219 1404 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1405}
1406
1407static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
1408{
d44913c1
MCC		 1409 struct dib0700_adapter_state *state = adap->priv;
1410
1411 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1412 return -ENODEV;
1413
ba3fe3a9 1414 /* initialize IC 1 */
d44913c1 1415 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
ba3fe3a9 1416
d44913c1 1417 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
ba3fe3a9
PB		 1418 &dib807x_dib8000_config[1]);
1419
77eed219 1420 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1421}
1422
03245a5e 1423/* STK8096GP */
a685dbbc 1424static struct dibx000_agc_config dib8090_agc_config[2] = {
be9bae10 1425 {
40d1a7c3 1426 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
9c783036 1427 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1428 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1429 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1430 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1431 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1432
40d1a7c3
MCC		 1433 .inv_gain = 787,
1434 .time_stabiliz = 10,
9c783036 1435
40d1a7c3
MCC		 1436 .alpha_level = 0,
1437 .thlock = 118,
9c783036 1438
40d1a7c3
MCC		 1439 .wbd_inv = 0,
1440 .wbd_ref = 3530,
1441 .wbd_sel = 1,
1442 .wbd_alpha = 5,
9c783036 1443
40d1a7c3
MCC		 1444 .agc1_max = 65535,
1445 .agc1_min = 0,
9c783036 1446
40d1a7c3
MCC		 1447 .agc2_max = 65535,
1448 .agc2_min = 0,
9c783036 1449
40d1a7c3
MCC		 1450 .agc1_pt1 = 0,
1451 .agc1_pt2 = 32,
1452 .agc1_pt3 = 114,
1453 .agc1_slope1 = 143,
1454 .agc1_slope2 = 144,
1455 .agc2_pt1 = 114,
1456 .agc2_pt2 = 227,
1457 .agc2_slope1 = 116,
1458 .agc2_slope2 = 117,
1459
1460 .alpha_mant = 28,
1461 .alpha_exp = 26,
1462 .beta_mant = 31,
1463 .beta_exp = 51,
1464
1465 .perform_agc_softsplit = 0,
be9bae10
OG		 1466 },
1467 {
40d1a7c3 1468 .band_caps = BAND_CBAND,
9c783036 1469 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1470 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1471 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1472 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1473 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1474
40d1a7c3
MCC		 1475 .inv_gain = 787,
1476 .time_stabiliz = 10,
9c783036 1477
40d1a7c3
MCC		 1478 .alpha_level = 0,
1479 .thlock = 118,
9c783036 1480
40d1a7c3
MCC		 1481 .wbd_inv = 0,
1482 .wbd_ref = 3530,
1483 .wbd_sel = 1,
1484 .wbd_alpha = 5,
9c783036 1485
40d1a7c3
MCC		 1486 .agc1_max = 0,
1487 .agc1_min = 0,
9c783036 1488
40d1a7c3
MCC		 1489 .agc2_max = 65535,
1490 .agc2_min = 0,
9c783036 1491
40d1a7c3
MCC		 1492 .agc1_pt1 = 0,
1493 .agc1_pt2 = 32,
1494 .agc1_pt3 = 114,
1495 .agc1_slope1 = 143,
1496 .agc1_slope2 = 144,
1497 .agc2_pt1 = 114,
1498 .agc2_pt2 = 227,
1499 .agc2_slope1 = 116,
1500 .agc2_slope2 = 117,
1501
1502 .alpha_mant = 28,
1503 .alpha_exp = 26,
1504 .beta_mant = 31,
1505 .beta_exp = 51,
1506
1507 .perform_agc_softsplit = 0,
be9bae10 1508 }
03245a5e
OG		 1509};
1510
1511static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
40d1a7c3
MCC		 1512 .internal = 54000,
1513 .sampling = 13500,
1514
1515 .pll_prediv = 1,
1516 .pll_ratio = 18,
1517 .pll_range = 3,
1518 .pll_reset = 1,
1519 .pll_bypass = 0,
1520
1521 .enable_refdiv = 0,
1522 .bypclk_div = 0,
1523 .IO_CLK_en_core = 1,
1524 .ADClkSrc = 1,
1525 .modulo = 2,
1526
1527 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
1528
1529 .ifreq = (0 << 25) | 0,
1530 .timf = 20199727,
1531
1532 .xtal_hz = 12000000,
03245a5e
OG		 1533};
1534
1535static int dib8090_get_adc_power(struct dvb_frontend *fe)
1536{
d44913c1
MCC		 1537 struct dvb_usb_adapter *adap = fe->dvb->priv;
1538 struct dib0700_adapter_state *state = adap->priv;
1539
1540 return state->dib8000_ops.get_adc_power(fe, 1);
be9bae10
OG		 1541}
1542
5e9c85d9
OG		 1543static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
1544{
1545 deb_info("AGC control callback: %i\n", restart);
1546 dib0090_dcc_freq(fe, restart);
1547
1548 if (restart == 0) /* before AGC startup */
1549 dib0090_set_dc_servo(fe, 1);
1550}
1551
be9bae10
OG		 1552static struct dib8000_config dib809x_dib8000_config[2] = {
1553 {
1554 .output_mpeg2_in_188_bytes = 1,
1555
1556 .agc_config_count = 2,
1557 .agc = dib8090_agc_config,
5e9c85d9 1558 .agc_control = dib8090_agc_control,
be9bae10
OG		 1559 .pll = &dib8090_pll_config_12mhz,
1560 .tuner_is_baseband = 1,
1561
1562 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1563 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1564 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1565
1566 .hostbus_diversity = 1,
1567 .div_cfg = 0x31,
1568 .output_mode = OUTMODE_MPEG2_FIFO,
1569 .drives = 0x2d98,
1570 .diversity_delay = 48,
1571 .refclksel = 3,
b4d6046e 1572 }, {
be9bae10
OG		 1573 .output_mpeg2_in_188_bytes = 1,
1574
1575 .agc_config_count = 2,
1576 .agc = dib8090_agc_config,
5e9c85d9 1577 .agc_control = dib8090_agc_control,
be9bae10
OG		 1578 .pll = &dib8090_pll_config_12mhz,
1579 .tuner_is_baseband = 1,
1580
1581 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1582 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1583 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1584
1585 .hostbus_diversity = 1,
1586 .div_cfg = 0x31,
1587 .output_mode = OUTMODE_DIVERSITY,
1588 .drives = 0x2d08,
1589 .diversity_delay = 1,
1590 .refclksel = 3,
1591 }
1592};
1593
1594static struct dib0090_wbd_slope dib8090_wbd_table[] = {
1595 /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
1596 { 120, 0, 500, 0, 500, 4 }, /* CBAND */
1597 { 170, 0, 450, 0, 450, 4 }, /* CBAND */
1598 { 380, 48, 373, 28, 259, 6 }, /* VHF */
1599 { 860, 34, 700, 36, 616, 6 }, /* high UHF */
1600 { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
1601};
1602
1603static struct dib0090_config dib809x_dib0090_config = {
1604 .io.pll_bypass = 1,
1605 .io.pll_range = 1,
1606 .io.pll_prediv = 1,
1607 .io.pll_loopdiv = 20,
1608 .io.adc_clock_ratio = 8,
1609 .io.pll_int_loop_filt = 0,
1610 .io.clock_khz = 12000,
1611 .reset = dib80xx_tuner_reset,
1612 .sleep = dib80xx_tuner_sleep,
1613 .clkouttobamse = 1,
1614 .analog_output = 1,
1615 .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
1616 .use_pwm_agc = 1,
1617 .clkoutdrive = 1,
1618 .get_adc_power = dib8090_get_adc_power,
1619 .freq_offset_khz_uhf = -63,
1620 .freq_offset_khz_vhf = -143,
1621 .wbd = dib8090_wbd_table,
1622 .fref_clock_ratio = 6,
1623};
1624
5e9c85d9
OG		 1625static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
1626{
1627 u8 optimal_pll_ratio = 20;
1628 u32 freq_adc, ratio, rest, max = 0;
1629 u8 pll_ratio;
1630
1631 for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
1632 freq_adc = 12 * pll_ratio * (1 << 8) / 16;
1633 ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
1634 rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
1635
1636 if (rest > freq_adc / 2)
1637 rest = freq_adc - rest;
1638 deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
1639 if ((rest > max) && (rest > 717)) {
1640 optimal_pll_ratio = pll_ratio;
1641 max = rest;
1642 }
1643 }
1644 deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
1645
1646 return optimal_pll_ratio;
1647}
1648
14d24d14 1649static int dib8096_set_param_override(struct dvb_frontend *fe)
be9bae10
OG		 1650{
1651 struct dvb_usb_adapter *adap = fe->dvb->priv;
1652 struct dib0700_adapter_state *state = adap->priv;
5e9c85d9
OG		 1653 u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
1654 u16 target, ltgain, rf_gain_limit;
1655 u32 timf;
be9bae10
OG		 1656 int ret = 0;
1657 enum frontend_tune_state tune_state = CT_SHUTDOWN;
5e9c85d9
OG		 1658
1659 switch (band) {
1660 default:
1661 deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
06eeefe8 1662 /* fall through */
5e9c85d9 1663 case BAND_VHF:
d44913c1 1664 state->dib8000_ops.set_gpio(fe, 3, 0, 1);
5e9c85d9
OG		 1665 break;
1666 case BAND_UHF:
d44913c1 1667 state->dib8000_ops.set_gpio(fe, 3, 0, 0);
5e9c85d9
OG		 1668 break;
1669 }
be9bae10 1670
14d24d14 1671 ret = state->set_param_save(fe);
be9bae10
OG		 1672 if (ret < 0)
1673 return ret;
1674
5e9c85d9
OG		 1675 if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
1676 deb_info("only 6MHz bandwidth is supported\n");
1677 return -EINVAL;
1678 }
1679
cba862dc 1680 /* Update PLL if needed ratio */
d44913c1 1681 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
5e9c85d9 1682
cba862dc 1683 /* Get optimize PLL ratio to remove spurious */
5e9c85d9
OG		 1684 pll_ratio = dib8090_compute_pll_parameters(fe);
1685 if (pll_ratio == 17)
1686 timf = 21387946;
1687 else if (pll_ratio == 18)
1688 timf = 20199727;
1689 else if (pll_ratio == 19)
1690 timf = 19136583;
1691 else
1692 timf = 18179756;
be9bae10 1693
cba862dc 1694 /* Update ratio */
d44913c1 1695 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
5e9c85d9 1696
d44913c1 1697 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
5e9c85d9
OG		 1698
1699 if (band != BAND_CBAND) {
1700 /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
1701 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
d44913c1 1702 state->dib8000_ops.set_wbd_ref(fe, target);
5e9c85d9 1703 }
be9bae10
OG		 1704
1705 if (band == BAND_CBAND) {
b4d6046e
OG		 1706 deb_info("tuning in CBAND - soft-AGC startup\n");
1707 dib0090_set_tune_state(fe, CT_AGC_START);
5e9c85d9 1708
b4d6046e
OG		 1709 do {
1710 ret = dib0090_gain_control(fe);
1711 msleep(ret);
1712 tune_state = dib0090_get_tune_state(fe);
1713 if (tune_state == CT_AGC_STEP_0)
d44913c1 1714 state->dib8000_ops.set_gpio(fe, 6, 0, 1);
b4d6046e
OG		 1715 else if (tune_state == CT_AGC_STEP_1) {
1716 dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
5e9c85d9 1717 if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
d44913c1 1718 state->dib8000_ops.set_gpio(fe, 6, 0, 0);
b4d6046e
OG		 1719 }
1720 } while (tune_state < CT_AGC_STOP);
5e9c85d9
OG		 1721
1722 deb_info("switching to PWM AGC\n");
b4d6046e 1723 dib0090_pwm_gain_reset(fe);
d44913c1
MCC		 1724 state->dib8000_ops.pwm_agc_reset(fe);
1725 state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
be9bae10 1726 } else {
5e9c85d9 1727 /* for everything else than CBAND we are using standard AGC */
b4d6046e
OG		 1728 deb_info("not tuning in CBAND - standard AGC startup\n");
1729 dib0090_pwm_gain_reset(fe);
be9bae10
OG		 1730 }
1731
1732 return 0;
1733}
1734
1735static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
1736{
1737 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1738 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10 1739
91be260f
NS		 1740 if (adap->id == 0) {
1741 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
1742 return -ENODEV;
1743 } else {
1744 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
1745 return -ENODEV;
1746 }
be9bae10 1747
77eed219
MK		 1748 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1749 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1750 return 0;
1751}
1752
1753static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
1754{
d44913c1
MCC		 1755 struct dib0700_adapter_state *state = adap->priv;
1756
1757 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1758 return -ENODEV;
1759
be9bae10
OG		 1760 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1761 msleep(10);
1762 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1763 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1764 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1765
1766 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1767
1768 dib0700_ctrl_clock(adap->dev, 72, 1);
1769
1770 msleep(10);
1771 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1772 msleep(10);
1773 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1774
d44913c1 1775 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
be9bae10 1776
d44913c1 1777 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
be9bae10 1778
77eed219 1779 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 1780}
1781
91be260f
NS		 1782static int stk809x_frontend1_attach(struct dvb_usb_adapter *adap)
1783{
1784 struct dib0700_adapter_state *state = adap->priv;
1785
1786 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1787 return -ENODEV;
1788
1789 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x82, 0);
1790
1791 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1792
1793 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
1794}
1795
be9bae10
OG		 1796static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
1797{
1798 struct dib0700_adapter_state *st = adap->priv;
1799 struct i2c_adapter *tun_i2c;
d44913c1 1800 struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10
OG		 1801
1802 if (fe_slave) {
d44913c1 1803 tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10
OG		 1804 if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
1805 return -ENODEV;
77eed219 1806 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
be9bae10
OG		 1807 fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
1808 }
d44913c1 1809 tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 1810 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
be9bae10
OG		 1811 return -ENODEV;
1812
77eed219
MK		 1813 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1814 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1815
1816 return 0;
1817}
1818
1819static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
1820{
1821 struct dvb_frontend *fe_slave;
d44913c1
MCC		 1822 struct dib0700_adapter_state *state = adap->priv;
1823
1824 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1825 return -ENODEV;
be9bae10
OG		 1826
1827 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
b4d6046e 1828 msleep(20);
be9bae10
OG		 1829 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1830 msleep(1000);
1831 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1832 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1833 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1834
1835 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1836
1837 dib0700_ctrl_clock(adap->dev, 72, 1);
1838
b4d6046e 1839 msleep(20);
be9bae10 1840 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 1841 msleep(20);
be9bae10
OG		 1842 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1843
d44913c1 1844 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
be9bae10 1845
d44913c1 1846 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
77eed219 1847 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 1848 return -ENODEV;
1849
d44913c1
MCC		 1850 /* Needed to increment refcount */
1851 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1852 return -ENODEV;
1853
1854 fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1855 state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 1856
1857 return fe_slave == NULL ? -ENODEV : 0;
1858}
1859
88f3a358
OG		 1860/* TFE8096P */
1861static struct dibx000_agc_config dib8096p_agc_config[2] = {
1862 {
1863 .band_caps = BAND_UHF,
1864 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1865 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1866 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1867 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1868 P_agc_write=0 */
1869 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1870 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1871 | (0 << 4) | (5 << 1) | (0 << 0),
1872
1873 .inv_gain = 684,
1874 .time_stabiliz = 10,
1875
1876 .alpha_level = 0,
1877 .thlock = 118,
1878
1879 .wbd_inv = 0,
1880 .wbd_ref = 1200,
1881 .wbd_sel = 3,
1882 .wbd_alpha = 5,
1883
1884 .agc1_max = 65535,
1885 .agc1_min = 0,
1886
1887 .agc2_max = 32767,
1888 .agc2_min = 0,
1889
1890 .agc1_pt1 = 0,
1891 .agc1_pt2 = 0,
1892 .agc1_pt3 = 105,
1893 .agc1_slope1 = 0,
1894 .agc1_slope2 = 156,
1895 .agc2_pt1 = 105,
1896 .agc2_pt2 = 255,
1897 .agc2_slope1 = 54,
1898 .agc2_slope2 = 0,
1899
1900 .alpha_mant = 28,
1901 .alpha_exp = 26,
1902 .beta_mant = 31,
1903 .beta_exp = 51,
1904
1905 .perform_agc_softsplit = 0,
1906 } , {
1907 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
1908 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1909 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1910 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1911 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1912 P_agc_write=0 */
1913 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1914 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1915 | (0 << 4) | (5 << 1) | (0 << 0),
1916
1917 .inv_gain = 732,
1918 .time_stabiliz = 10,
1919
1920 .alpha_level = 0,
1921 .thlock = 118,
1922
1923 .wbd_inv = 0,
1924 .wbd_ref = 1200,
1925 .wbd_sel = 3,
1926 .wbd_alpha = 5,
1927
1928 .agc1_max = 65535,
1929 .agc1_min = 0,
1930
1931 .agc2_max = 32767,
1932 .agc2_min = 0,
1933
1934 .agc1_pt1 = 0,
1935 .agc1_pt2 = 0,
1936 .agc1_pt3 = 98,
1937 .agc1_slope1 = 0,
1938 .agc1_slope2 = 167,
1939 .agc2_pt1 = 98,
1940 .agc2_pt2 = 255,
1941 .agc2_slope1 = 52,
1942 .agc2_slope2 = 0,
1943
1944 .alpha_mant = 28,
1945 .alpha_exp = 26,
1946 .beta_mant = 31,
1947 .beta_exp = 51,
1948
1949 .perform_agc_softsplit = 0,
1950 }
1951};
1952
1953static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
09628b2c
MCC		 1954 .internal = 108000,
1955 .sampling = 13500,
1956 .pll_prediv = 1,
1957 .pll_ratio = 9,
1958 .pll_range = 1,
1959 .pll_reset = 0,
1960 .pll_bypass = 0,
1961 .enable_refdiv = 0,
1962 .bypclk_div = 0,
1963 .IO_CLK_en_core = 0,
1964 .ADClkSrc = 0,
1965 .modulo = 2,
1966 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1967 .ifreq = (0 << 25) | 0,
1968 .timf = 20199729,
1969 .xtal_hz = 12000000,
88f3a358
OG		 1970};
1971
1972static struct dib8000_config tfe8096p_dib8000_config = {
1973 .output_mpeg2_in_188_bytes = 1,
1974 .hostbus_diversity = 1,
1975 .update_lna = NULL,
1976
1977 .agc_config_count = 2,
1978 .agc = dib8096p_agc_config,
1979 .pll = &dib8096p_clock_config_12_mhz,
1980
1981 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1982 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1983 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1984
1985 .agc_control = NULL,
1986 .diversity_delay = 48,
1987 .output_mode = OUTMODE_MPEG2_FIFO,
1988 .enMpegOutput = 1,
1989};
1990
1991static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
1992 { 380, 81, 850, 64, 540, 4},
1993 { 860, 51, 866, 21, 375, 4},
1994 {1700, 0, 250, 0, 100, 6},
1995 {2600, 0, 250, 0, 100, 6},
1996 { 0xFFFF, 0, 0, 0, 0, 0},
1997};
1998
d44913c1 1999static struct dib0090_config tfe8096p_dib0090_config = {
88f3a358
OG		 2000 .io.clock_khz = 12000,
2001 .io.pll_bypass = 0,
2002 .io.pll_range = 0,
2003 .io.pll_prediv = 3,
2004 .io.pll_loopdiv = 6,
2005 .io.adc_clock_ratio = 0,
2006 .io.pll_int_loop_filt = 0,
88f3a358
OG		 2007
2008 .freq_offset_khz_uhf = -143,
2009 .freq_offset_khz_vhf = -143,
2010
2011 .get_adc_power = dib8090_get_adc_power,
2012
2013 .clkouttobamse = 1,
2014 .analog_output = 0,
2015
2016 .wbd_vhf_offset = 0,
2017 .wbd_cband_offset = 0,
2018 .use_pwm_agc = 1,
2019 .clkoutdrive = 0,
2020
2021 .fref_clock_ratio = 1,
2022
88f3a358
OG		 2023 .ls_cfg_pad_drv = 0,
2024 .data_tx_drv = 0,
2025 .low_if = NULL,
2026 .in_soc = 1,
2027 .force_cband_input = 0,
2028};
2029
2030struct dibx090p_adc {
2031 u32 freq; /* RF freq MHz */
2032 u32 timf; /* New Timf */
2033 u32 pll_loopdiv; /* New prediv */
2034 u32 pll_prediv; /* New loopdiv */
2035};
2036
5e9c85d9
OG		 2037struct dibx090p_best_adc {
2038 u32 timf;
2039 u32 pll_loopdiv;
2040 u32 pll_prediv;
88f3a358
OG		 2041};
2042
5e9c85d9
OG		 2043static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
2044{
2045 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2046 u16 xtal = 12000;
2047 u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
2048 u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
2049 u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
2050 u32 fdem_min = 66000;
2051 u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
2052 u32 harmonic_id = 0;
2053
2054 adc->timf = 0;
2055 adc->pll_loopdiv = loopdiv;
2056 adc->pll_prediv = prediv;
2057
2058 deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
2059
2060 /* Find Min and Max prediv */
2061 while ((xtal / max_prediv) >= fcp_min)
2062 max_prediv++;
2063
2064 max_prediv--;
2065 min_prediv = max_prediv;
2066 while ((xtal / min_prediv) <= fcp_max) {
2067 min_prediv--;
2068 if (min_prediv == 1)
2069 break;
2070 }
2071 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2072
2073 min_prediv = 1;
2074
2075 for (prediv = min_prediv; prediv < max_prediv; prediv++) {
2076 fcp = xtal / prediv;
2077 if (fcp > fcp_min && fcp < fcp_max) {
2078 for (loopdiv = 1; loopdiv < 64; loopdiv++) {
2079 fmem = ((xtal/prediv) * loopdiv);
2080 fdem = fmem / 2;
2081 fs = fdem / 4;
2082
2083 /* test min/max system restrictions */
2084 if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
2085 spur = 0;
2086 /* test fs harmonics positions */
2087 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
2088 if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
2089 spur = 1;
2090 break;
2091 }
2092 }
2093
2094 if (!spur) {
2095 adc->pll_loopdiv = loopdiv;
2096 adc->pll_prediv = prediv;
2097 adc->timf = (4260880253U / fdem) * (1 << 8);
2098 adc->timf += ((4260880253U % fdem) << 8) / fdem;
2099
2100 deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
2101 break;
2102 }
2103 }
2104 }
2105 }
2106 if (!spur)
2107 break;
2108 }
2109
2110 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
2111 return -EINVAL;
2112 return 0;
2113}
2114
14d24d14 2115static int dib8096p_agc_startup(struct dvb_frontend *fe)
88f3a358
OG		 2116{
2117 struct dvb_usb_adapter *adap = fe->dvb->priv;
2118 struct dib0700_adapter_state *state = adap->priv;
2119 struct dibx000_bandwidth_config pll;
5e9c85d9 2120 struct dibx090p_best_adc adc;
88f3a358 2121 u16 target;
5e9c85d9 2122 int ret;
88f3a358 2123
14d24d14 2124 ret = state->set_param_save(fe);
88f3a358
OG		 2125 if (ret < 0)
2126 return ret;
2127 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2128
2129 dib0090_pwm_gain_reset(fe);
2130 /* dib0090_get_wbd_target is returning any possible
2131 temperature compensated wbd-target */
2132 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
d44913c1 2133 state->dib8000_ops.set_wbd_ref(fe, target);
88f3a358 2134
5e9c85d9
OG		 2135 if (dib8096p_get_best_sampling(fe, &adc) == 0) {
2136 pll.pll_ratio = adc.pll_loopdiv;
2137 pll.pll_prediv = adc.pll_prediv;
88f3a358 2138
5e9c85d9 2139 dib0700_set_i2c_speed(adap->dev, 200);
d44913c1
MCC		 2140 state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
2141 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
5e9c85d9 2142 dib0700_set_i2c_speed(adap->dev, 1000);
88f3a358
OG		 2143 }
2144 return 0;
2145}
2146
2147static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
2148{
5e9c85d9
OG		 2149 struct dib0700_state *st = adap->dev->priv;
2150 u32 fw_version;
d44913c1
MCC		 2151 struct dib0700_adapter_state *state = adap->priv;
2152
2153 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
2154 return -ENODEV;
5e9c85d9
OG		 2155
2156 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2157 if (fw_version >= 0x10200)
2158 st->fw_use_new_i2c_api = 1;
2159
88f3a358
OG		 2160 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
2161 msleep(20);
2162 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2163 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2164 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2165
2166 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2167
2168 dib0700_ctrl_clock(adap->dev, 72, 1);
2169
2170 msleep(20);
2171 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
2172 msleep(20);
2173 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2174
d44913c1 2175 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
88f3a358 2176
d44913c1
MCC		 2177 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
2178 0x80, &tfe8096p_dib8000_config);
88f3a358
OG		 2179
2180 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
2181}
2182
2183static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
2184{
2185 struct dib0700_adapter_state *st = adap->priv;
d44913c1
MCC		 2186 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
2187
2188 tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
2189 tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
2190 tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
88f3a358
OG		 2191
2192 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
2193 &tfe8096p_dib0090_config) == NULL)
2194 return -ENODEV;
2195
d44913c1 2196 st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
88f3a358
OG		 2197
2198 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
2199 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
2200 return 0;
2201}
2202
be9bae10
OG		 2203/* STK9090M */
2204static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
2205{
77eed219 2206 return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
be9bae10
OG		 2207}
2208
2209static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
2210{
77eed219 2211 return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
be9bae10
OG		 2212}
2213
2214static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
2215{
2216 return dib9000_set_gpio(fe, 5, 0, !onoff);
2217}
2218
2219static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
2220{
2221 return dib9000_set_gpio(fe, 0, 0, onoff);
2222}
2223
2224static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
2225{
2226 u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
2227 u8 rb[2];
2228 struct i2c_msg msg[2] = {
b4d6046e
OG		 2229 {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
2230 {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
be9bae10
OG		 2231 };
2232 u8 index_data;
2233
2234 dibx000_i2c_set_speed(i2c, 250);
2235
2236 if (i2c_transfer(i2c, msg, 2) != 2)
2237 return -EIO;
2238
2239 switch (rb[0] << 8 | rb[1]) {
b4d6046e 2240 case 0:
be9bae10
OG		 2241 deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
2242 return -EIO;
b4d6046e 2243 case 1:
be9bae10
OG		 2244 deb_info("Found DiB0170 rev2");
2245 break;
b4d6046e 2246 case 2:
be9bae10
OG		 2247 deb_info("Found DiB0190 rev2");
2248 break;
b4d6046e 2249 default:
be9bae10
OG		 2250 deb_info("DiB01x0 not found");
2251 return -EIO;
b4d6046e 2252 }
be9bae10
OG		 2253
2254 for (index_data = 0; index_data < len; index_data += 2) {
2255 wb[2] = (data[index_data + 1] >> 8) & 0xff;
2256 wb[3] = (data[index_data + 1]) & 0xff;
2257
2258 if (data[index_data] == 0) {
2259 wb[0] = (data[index_data] >> 8) & 0xff;
2260 wb[1] = (data[index_data]) & 0xff;
2261 msg[0].len = 2;
2262 if (i2c_transfer(i2c, msg, 2) != 2)
2263 return -EIO;
2264 wb[2] |= rb[0];
2265 wb[3] |= rb[1] & ~(3 << 4);
2266 }
2267
b4d6046e
OG		 2268 wb[0] = (data[index_data] >> 8)&0xff;
2269 wb[1] = (data[index_data])&0xff;
be9bae10
OG		 2270 msg[0].len = 4;
2271 if (i2c_transfer(i2c, &msg[0], 1) != 1)
2272 return -EIO;
2273 }
2274 return 0;
2275}
2276
2277static struct dib9000_config stk9090m_config = {
2278 .output_mpeg2_in_188_bytes = 1,
2279 .output_mode = OUTMODE_MPEG2_FIFO,
2280 .vcxo_timer = 279620,
2281 .timing_frequency = 20452225,
2282 .demod_clock_khz = 60000,
2283 .xtal_clock_khz = 30000,
2284 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2285 .subband = {
2286 2,
2287 {
2288 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
2289 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
2290 { 0 },
2291 },
2292 },
2293 .gpio_function = {
2294 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2295 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2296 },
2297};
2298
2299static struct dib9000_config nim9090md_config[2] = {
2300 {
2301 .output_mpeg2_in_188_bytes = 1,
2302 .output_mode = OUTMODE_MPEG2_FIFO,
2303 .vcxo_timer = 279620,
2304 .timing_frequency = 20452225,
2305 .demod_clock_khz = 60000,
2306 .xtal_clock_khz = 30000,
2307 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2308 }, {
2309 .output_mpeg2_in_188_bytes = 1,
2310 .output_mode = OUTMODE_DIVERSITY,
2311 .vcxo_timer = 279620,
2312 .timing_frequency = 20452225,
2313 .demod_clock_khz = 60000,
2314 .xtal_clock_khz = 30000,
2315 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2316 .subband = {
2317 2,
2318 {
2319 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
2320 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
2321 { 0 },
2322 },
2323 },
2324 .gpio_function = {
2325 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2326 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2327 },
2328 }
2329};
2330
2331static struct dib0090_config dib9090_dib0090_config = {
2332 .io.pll_bypass = 0,
2333 .io.pll_range = 1,
2334 .io.pll_prediv = 1,
2335 .io.pll_loopdiv = 8,
2336 .io.adc_clock_ratio = 8,
2337 .io.pll_int_loop_filt = 0,
2338 .io.clock_khz = 30000,
2339 .reset = dib90x0_tuner_reset,
2340 .sleep = dib90x0_tuner_sleep,
2341 .clkouttobamse = 0,
2342 .analog_output = 0,
2343 .use_pwm_agc = 0,
2344 .clkoutdrive = 0,
2345 .freq_offset_khz_uhf = 0,
2346 .freq_offset_khz_vhf = 0,
2347};
2348
2349static struct dib0090_config nim9090md_dib0090_config[2] = {
2350 {
2351 .io.pll_bypass = 0,
2352 .io.pll_range = 1,
2353 .io.pll_prediv = 1,
2354 .io.pll_loopdiv = 8,
2355 .io.adc_clock_ratio = 8,
2356 .io.pll_int_loop_filt = 0,
2357 .io.clock_khz = 30000,
2358 .reset = dib90x0_tuner_reset,
2359 .sleep = dib90x0_tuner_sleep,
2360 .clkouttobamse = 1,
2361 .analog_output = 0,
2362 .use_pwm_agc = 0,
2363 .clkoutdrive = 0,
2364 .freq_offset_khz_uhf = 0,
2365 .freq_offset_khz_vhf = 0,
b4d6046e 2366 }, {
be9bae10
OG		 2367 .io.pll_bypass = 0,
2368 .io.pll_range = 1,
2369 .io.pll_prediv = 1,
2370 .io.pll_loopdiv = 8,
2371 .io.adc_clock_ratio = 8,
2372 .io.pll_int_loop_filt = 0,
2373 .io.clock_khz = 30000,
2374 .reset = dib90x0_tuner_reset,
2375 .sleep = dib90x0_tuner_sleep,
2376 .clkouttobamse = 0,
2377 .analog_output = 0,
2378 .use_pwm_agc = 0,
2379 .clkoutdrive = 0,
2380 .freq_offset_khz_uhf = 0,
2381 .freq_offset_khz_vhf = 0,
2382 }
2383};
2384
2385
2386static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
2387{
2388 struct dib0700_adapter_state *state = adap->priv;
2389 struct dib0700_state *st = adap->dev->priv;
2390 u32 fw_version;
2391
2392 /* Make use of the new i2c functions from FW 1.20 */
2393 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2394 if (fw_version >= 0x10200)
2395 st->fw_use_new_i2c_api = 1;
2396 dib0700_set_i2c_speed(adap->dev, 340);
2397
2398 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2399 msleep(20);
be9bae10
OG		 2400 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2401 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2402 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2403 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2404
2405 dib0700_ctrl_clock(adap->dev, 72, 1);
2406
b4d6046e 2407 msleep(20);
be9bae10 2408 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2409 msleep(20);
be9bae10
OG		 2410 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2411
2412 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
2413
2414 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2415 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2416 return -ENODEV;
2417 } else {
5b5e0928 2418 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2419 }
2420 stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
2421 stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
2422
77eed219 2423 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
be9bae10 2424
77eed219 2425 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 2426}
2427
2428static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
2429{
2430 struct dib0700_adapter_state *state = adap->priv;
77eed219 2431 struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2432 u16 data_dib190[10] = {
2433 1, 0x1374,
2434 2, 0x01a2,
2435 7, 0x0020,
2436 0, 0x00ef,
2437 8, 0x0486,
2438 };
2439
77eed219 2440 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
be9bae10 2441 return -ENODEV;
77eed219 2442 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2443 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
2444 return -ENODEV;
d1190024 2445 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2446 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10 2447 return -ENODEV;
b4d6046e 2448 release_firmware(state->frontend_firmware);
be9bae10
OG		 2449 return 0;
2450}
2451
2452static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
2453{
2454 struct dib0700_adapter_state *state = adap->priv;
2455 struct dib0700_state *st = adap->dev->priv;
2456 struct i2c_adapter *i2c;
2457 struct dvb_frontend *fe_slave;
2458 u32 fw_version;
2459
2460 /* Make use of the new i2c functions from FW 1.20 */
2461 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2462 if (fw_version >= 0x10200)
2463 st->fw_use_new_i2c_api = 1;
2464 dib0700_set_i2c_speed(adap->dev, 340);
2465
2466 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2467 msleep(20);
be9bae10
OG		 2468 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2469 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2470 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2471 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2472
2473 dib0700_ctrl_clock(adap->dev, 72, 1);
2474
b4d6046e 2475 msleep(20);
be9bae10 2476 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2477 msleep(20);
be9bae10
OG		 2478 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2479
2480 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2481 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2482 return -EIO;
2483 } else {
5b5e0928 2484 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2485 }
2486 nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
2487 nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
2488 nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
2489 nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
2490
2491 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
77eed219 2492 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
be9bae10 2493
77eed219 2494 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 2495 return -ENODEV;
2496
77eed219 2497 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
be9bae10
OG		 2498 dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
2499
2500 fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
77eed219 2501 dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 2502
2503 return fe_slave == NULL ? -ENODEV : 0;
03245a5e
OG		 2504}
2505
be9bae10
OG		 2506static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
2507{
2508 struct dib0700_adapter_state *state = adap->priv;
2509 struct i2c_adapter *i2c;
2510 struct dvb_frontend *fe_slave;
2511 u16 data_dib190[10] = {
2512 1, 0x5374,
2513 2, 0x01ae,
2514 7, 0x0020,
2515 0, 0x00ef,
2516 8, 0x0406,
2517 };
77eed219
MK		 2518 i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
2519 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
be9bae10 2520 return -ENODEV;
77eed219 2521 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2522 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
2523 return -ENODEV;
d1190024
OG		 2524
2525 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2526 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10
OG		 2527 return -ENODEV;
2528
77eed219 2529 fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10 2530 if (fe_slave != NULL) {
77eed219 2531 i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2532 dib9000_set_i2c_adapter(fe_slave, i2c);
2533
2534 i2c = dib9000_get_tuner_interface(fe_slave);
2535 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
2536 return -ENODEV;
77eed219 2537 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
d1190024 2538 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
be9bae10
OG		 2539 if (dib9000_firmware_post_pll_init(fe_slave) < 0)
2540 return -ENODEV;
2541 }
b4d6046e 2542 release_firmware(state->frontend_firmware);
be9bae10
OG		 2543
2544 return 0;
2545}
2546
2547/* NIM7090 */
5e9c85d9 2548static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
be9bae10
OG		 2549{
2550 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2551
2552 u16 xtal = 12000;
2553 u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
2554 u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
2555 u32 fdem_max = 76000;
2556 u32 fdem_min = 69500;
2557 u32 fcp = 0, fs = 0, fdem = 0;
2558 u32 harmonic_id = 0;
2559
2560 adc->pll_loopdiv = loopdiv;
2561 adc->pll_prediv = prediv;
2562 adc->timf = 0;
2563
2564 deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
2565
2566 /* Find Min and Max prediv */
b4d6046e 2567 while ((xtal/max_prediv) >= fcp_min)
be9bae10
OG		 2568 max_prediv++;
2569
2570 max_prediv--;
2571 min_prediv = max_prediv;
b4d6046e 2572 while ((xtal/min_prediv) <= fcp_max) {
be9bae10 2573 min_prediv--;
b4d6046e 2574 if (min_prediv == 1)
be9bae10
OG		 2575 break;
2576 }
2577 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2578
2579 min_prediv = 2;
2580
b4d6046e 2581 for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
be9bae10 2582 fcp = xtal / prediv;
b4d6046e
OG		 2583 if (fcp > fcp_min && fcp < fcp_max) {
2584 for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
be9bae10
OG		 2585 fdem = ((xtal/prediv) * loopdiv);
2586 fs = fdem / 4;
2587 /* test min/max system restrictions */
2588
b4d6046e 2589 if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
be9bae10
OG		 2590 spur = 0;
2591 /* test fs harmonics positions */
b4d6046e
OG		 2592 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
2593 if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
be9bae10
OG		 2594 spur = 1;
2595 break;
2596 }
2597 }
2598
b4d6046e 2599 if (!spur) {
be9bae10
OG		 2600 adc->pll_loopdiv = loopdiv;
2601 adc->pll_prediv = prediv;
b4d6046e
OG		 2602 adc->timf = 2396745143UL/fdem*(1 << 9);
2603 adc->timf += ((2396745143UL%fdem) << 9)/fdem;
be9bae10
OG		 2604 deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
2605 break;
2606 }
2607 }
2608 }
2609 }
2610 if (!spur)
2611 break;
2612 }
2613
2614
b4d6046e 2615 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
be9bae10 2616 return -EINVAL;
b4d6046e 2617 else
be9bae10
OG		 2618 return 0;
2619}
2620
14d24d14 2621static int dib7090_agc_startup(struct dvb_frontend *fe)
be9bae10
OG		 2622{
2623 struct dvb_usb_adapter *adap = fe->dvb->priv;
2624 struct dib0700_adapter_state *state = adap->priv;
2625 struct dibx000_bandwidth_config pll;
2626 u16 target;
5e9c85d9 2627 struct dibx090p_best_adc adc;
be9bae10
OG		 2628 int ret;
2629
14d24d14 2630 ret = state->set_param_save(fe);
be9bae10
OG		 2631 if (ret < 0)
2632 return ret;
2633
2634 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2635 dib0090_pwm_gain_reset(fe);
6724a2f4 2636 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
8abe4a0a 2637 state->dib7000p_ops.set_wbd_ref(fe, target);
be9bae10 2638
b4d6046e 2639 if (dib7090p_get_best_sampling(fe, &adc) == 0) {
be9bae10
OG		 2640 pll.pll_ratio = adc.pll_loopdiv;
2641 pll.pll_prediv = adc.pll_prediv;
2642
8abe4a0a
MCC		 2643 state->dib7000p_ops.update_pll(fe, &pll);
2644 state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
be9bae10
OG		 2645 }
2646 return 0;
2647}
2648
2e802861
OG		 2649static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
2650{
2651 deb_info("AGC restart callback: %d", restart);
2652 if (restart == 0) /* before AGC startup */
2653 dib0090_set_dc_servo(fe, 1);
2654 return 0;
2655}
2656
f45f513a 2657static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
6724a2f4 2658{
8abe4a0a
MCC		 2659 struct dvb_usb_adapter *adap = fe->dvb->priv;
2660 struct dib0700_adapter_state *state = adap->priv;
2661
f45f513a 2662 deb_info("update LNA: agc global=%i", agc_global);
6724a2f4 2663
f45f513a 2664 if (agc_global < 25000) {
8abe4a0a
MCC		 2665 state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
2666 state->dib7000p_ops.set_agc1_min(fe, 0);
6724a2f4 2667 } else {
8abe4a0a
MCC		 2668 state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
2669 state->dib7000p_ops.set_agc1_min(fe, 32768);
6724a2f4
OG		 2670 }
2671
2672 return 0;
2673}
2674
be9bae10 2675static struct dib0090_wbd_slope dib7090_wbd_table[] = {
b4d6046e
OG		 2676 { 380, 81, 850, 64, 540, 4},
2677 { 860, 51, 866, 21, 375, 4},
2678 {1700, 0, 250, 0, 100, 6},
2679 {2600, 0, 250, 0, 100, 6},
2680 { 0xFFFF, 0, 0, 0, 0, 0},
03245a5e
OG		 2681};
2682
a685dbbc 2683static struct dibx000_agc_config dib7090_agc_config[2] = {
be9bae10
OG		 2684 {
2685 .band_caps = BAND_UHF,
2686 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2687 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2688 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2689
b4d6046e
OG		 2690 .inv_gain = 687,
2691 .time_stabiliz = 10,
be9bae10 2692
b4d6046e
OG		 2693 .alpha_level = 0,
2694 .thlock = 118,
be9bae10 2695
b4d6046e
OG		 2696 .wbd_inv = 0,
2697 .wbd_ref = 1200,
2698 .wbd_sel = 3,
2699 .wbd_alpha = 5,
be9bae10 2700
b4d6046e 2701 .agc1_max = 65535,
59501bb7 2702 .agc1_min = 32768,
be9bae10 2703
b4d6046e
OG		 2704 .agc2_max = 65535,
2705 .agc2_min = 0,
be9bae10 2706
b4d6046e
OG		 2707 .agc1_pt1 = 0,
2708 .agc1_pt2 = 32,
2709 .agc1_pt3 = 114,
2710 .agc1_slope1 = 143,
2711 .agc1_slope2 = 144,
2712 .agc2_pt1 = 114,
2713 .agc2_pt2 = 227,
2714 .agc2_slope1 = 116,
2715 .agc2_slope2 = 117,
be9bae10 2716
b4d6046e
OG		 2717 .alpha_mant = 18,
2718 .alpha_exp = 0,
2719 .beta_mant = 20,
2720 .beta_exp = 59,
be9bae10 2721
b4d6046e 2722 .perform_agc_softsplit = 0,
be9bae10
OG		 2723 } , {
2724 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
2725 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2726 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2727 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2728
b4d6046e
OG		 2729 .inv_gain = 732,
2730 .time_stabiliz = 10,
be9bae10 2731
b4d6046e
OG		 2732 .alpha_level = 0,
2733 .thlock = 118,
be9bae10 2734
b4d6046e
OG		 2735 .wbd_inv = 0,
2736 .wbd_ref = 1200,
2737 .wbd_sel = 3,
2738 .wbd_alpha = 5,
be9bae10 2739
b4d6046e
OG		 2740 .agc1_max = 65535,
2741 .agc1_min = 0,
be9bae10 2742
b4d6046e
OG		 2743 .agc2_max = 65535,
2744 .agc2_min = 0,
be9bae10 2745
b4d6046e
OG		 2746 .agc1_pt1 = 0,
2747 .agc1_pt2 = 0,
2748 .agc1_pt3 = 98,
2749 .agc1_slope1 = 0,
2750 .agc1_slope2 = 167,
7f4d527f 2751 .agc2_pt1 = 98,
b4d6046e
OG		 2752 .agc2_pt2 = 255,
2753 .agc2_slope1 = 104,
2754 .agc2_slope2 = 0,
be9bae10 2755
b4d6046e
OG		 2756 .alpha_mant = 18,
2757 .alpha_exp = 0,
2758 .beta_mant = 20,
2759 .beta_exp = 59,
be9bae10 2760
b4d6046e 2761 .perform_agc_softsplit = 0,
be9bae10
OG		 2762 }
2763};
2764
2765static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
09628b2c
MCC		 2766 .internal = 60000,
2767 .sampling = 15000,
2768 .pll_prediv = 1,
2769 .pll_ratio = 5,
2770 .pll_range = 0,
2771 .pll_reset = 0,
2772 .pll_bypass = 0,
2773 .enable_refdiv = 0,
2774 .bypclk_div = 0,
2775 .IO_CLK_en_core = 1,
2776 .ADClkSrc = 1,
2777 .modulo = 2,
2778 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
2779 .ifreq = (0 << 25) | 0,
2780 .timf = 20452225,
2781 .xtal_hz = 15000000,
be9bae10
OG		 2782};
2783
2784static struct dib7000p_config nim7090_dib7000p_config = {
2785 .output_mpeg2_in_188_bytes = 1,
2786 .hostbus_diversity = 1,
2787 .tuner_is_baseband = 1,
59501bb7 2788 .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
be9bae10
OG		 2789
2790 .agc_config_count = 2,
2791 .agc = dib7090_agc_config,
2792
2793 .bw = &dib7090_clock_config_12_mhz,
2794
2795 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2796 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2797 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2798
2799 .pwm_freq_div = 0,
2800
2801 .agc_control = dib7090_agc_restart,
2802
2803 .spur_protect = 0,
2804 .disable_sample_and_hold = 0,
2805 .enable_current_mirror = 0,
2806 .diversity_delay = 0,
2807
2808 .output_mode = OUTMODE_MPEG2_FIFO,
2809 .enMpegOutput = 1,
2810};
2811
59501bb7
OG		 2812static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
2813{
8abe4a0a
MCC		 2814 struct dvb_usb_adapter *adap = fe->dvb->priv;
2815 struct dib0700_adapter_state *state = adap->priv;
2816
59501bb7
OG		 2817 deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
2818 if (agc_global < 25000) {
8abe4a0a
MCC		 2819 state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
2820 state->dib7000p_ops.set_agc1_min(fe, 0);
59501bb7 2821 } else {
8abe4a0a
MCC		 2822 state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
2823 state->dib7000p_ops.set_agc1_min(fe, 32768);
59501bb7
OG		 2824 }
2825
2826 return 0;
2827}
2828
be9bae10
OG		 2829static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
2830 {
2831 .output_mpeg2_in_188_bytes = 1,
2832 .hostbus_diversity = 1,
2833 .tuner_is_baseband = 1,
59501bb7 2834 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2835
2836 .agc_config_count = 2,
2837 .agc = dib7090_agc_config,
2838
2839 .bw = &dib7090_clock_config_12_mhz,
2840
2841 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2842 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2843 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2844
2845 .pwm_freq_div = 0,
2846
2847 .agc_control = dib7090_agc_restart,
2848
2849 .spur_protect = 0,
2850 .disable_sample_and_hold = 0,
2851 .enable_current_mirror = 0,
2852 .diversity_delay = 0,
2853
2854 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2855 .default_i2c_addr = 0x90,
2856 .enMpegOutput = 1,
b4d6046e 2857 }, {
be9bae10
OG		 2858 .output_mpeg2_in_188_bytes = 1,
2859 .hostbus_diversity = 1,
2860 .tuner_is_baseband = 1,
59501bb7 2861 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2862
2863 .agc_config_count = 2,
2864 .agc = dib7090_agc_config,
2865
2866 .bw = &dib7090_clock_config_12_mhz,
2867
2868 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2869 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2870 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2871
2872 .pwm_freq_div = 0,
2873
2874 .agc_control = dib7090_agc_restart,
2875
2876 .spur_protect = 0,
2877 .disable_sample_and_hold = 0,
2878 .enable_current_mirror = 0,
2879 .diversity_delay = 0,
2880
2881 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2882 .default_i2c_addr = 0x92,
2883 .enMpegOutput = 0,
2884 }
2885};
2886
8abe4a0a 2887static struct dib0090_config nim7090_dib0090_config = {
be9bae10
OG		 2888 .io.clock_khz = 12000,
2889 .io.pll_bypass = 0,
2890 .io.pll_range = 0,
2891 .io.pll_prediv = 3,
2892 .io.pll_loopdiv = 6,
2893 .io.adc_clock_ratio = 0,
2894 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2895
2896 .freq_offset_khz_uhf = 0,
2897 .freq_offset_khz_vhf = 0,
2898
be9bae10
OG		 2899 .clkouttobamse = 1,
2900 .analog_output = 0,
2901
2902 .wbd_vhf_offset = 0,
2903 .wbd_cband_offset = 0,
2904 .use_pwm_agc = 1,
2905 .clkoutdrive = 0,
2906
2907 .fref_clock_ratio = 0,
2908
2909 .wbd = dib7090_wbd_table,
2910
2911 .ls_cfg_pad_drv = 0,
2912 .data_tx_drv = 0,
2913 .low_if = NULL,
2914 .in_soc = 1,
2915};
2916
f45f513a 2917static struct dib7000p_config tfe7790p_dib7000p_config = {
b293f304
OG		 2918 .output_mpeg2_in_188_bytes = 1,
2919 .hostbus_diversity = 1,
2920 .tuner_is_baseband = 1,
f45f513a 2921 .update_lna = tfe7790p_update_lna,
b293f304
OG		 2922
2923 .agc_config_count = 2,
2924 .agc = dib7090_agc_config,
2925
2926 .bw = &dib7090_clock_config_12_mhz,
2927
2928 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2929 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2930 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2931
2932 .pwm_freq_div = 0,
2933
2934 .agc_control = dib7090_agc_restart,
2935
2936 .spur_protect = 0,
2937 .disable_sample_and_hold = 0,
2938 .enable_current_mirror = 0,
2939 .diversity_delay = 0,
2940
2941 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2942 .enMpegOutput = 1,
2943};
2944
8abe4a0a 2945static struct dib0090_config tfe7790p_dib0090_config = {
b293f304
OG		 2946 .io.clock_khz = 12000,
2947 .io.pll_bypass = 0,
2948 .io.pll_range = 0,
2949 .io.pll_prediv = 3,
2950 .io.pll_loopdiv = 6,
2951 .io.adc_clock_ratio = 0,
2952 .io.pll_int_loop_filt = 0,
b293f304
OG		 2953
2954 .freq_offset_khz_uhf = 0,
2955 .freq_offset_khz_vhf = 0,
2956
b293f304
OG		 2957 .clkouttobamse = 1,
2958 .analog_output = 0,
2959
2960 .wbd_vhf_offset = 0,
2961 .wbd_cband_offset = 0,
2962 .use_pwm_agc = 1,
2963 .clkoutdrive = 0,
2964
2965 .fref_clock_ratio = 0,
2966
f45f513a 2967 .wbd = dib7090_wbd_table,
b293f304
OG		 2968
2969 .ls_cfg_pad_drv = 0,
2970 .data_tx_drv = 0,
2971 .low_if = NULL,
2972 .in_soc = 1,
f45f513a
OG		 2973 .force_cband_input = 0,
2974 .is_dib7090e = 0,
b293f304
OG		 2975 .force_crystal_mode = 1,
2976};
2977
8abe4a0a 2978static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
be9bae10
OG		 2979 {
2980 .io.clock_khz = 12000,
2981 .io.pll_bypass = 0,
2982 .io.pll_range = 0,
2983 .io.pll_prediv = 3,
2984 .io.pll_loopdiv = 6,
2985 .io.adc_clock_ratio = 0,
2986 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2987
2988 .freq_offset_khz_uhf = 50,
2989 .freq_offset_khz_vhf = 70,
2990
be9bae10
OG		 2991 .clkouttobamse = 1,
2992 .analog_output = 0,
2993
2994 .wbd_vhf_offset = 0,
2995 .wbd_cband_offset = 0,
2996 .use_pwm_agc = 1,
2997 .clkoutdrive = 0,
2998
2999 .fref_clock_ratio = 0,
3000
3001 .wbd = dib7090_wbd_table,
3002
3003 .ls_cfg_pad_drv = 0,
3004 .data_tx_drv = 0,
3005 .low_if = NULL,
3006 .in_soc = 1,
b4d6046e 3007 }, {
be9bae10
OG		 3008 .io.clock_khz = 12000,
3009 .io.pll_bypass = 0,
3010 .io.pll_range = 0,
3011 .io.pll_prediv = 3,
3012 .io.pll_loopdiv = 6,
3013 .io.adc_clock_ratio = 0,
3014 .io.pll_int_loop_filt = 0,
be9bae10
OG		 3015
3016 .freq_offset_khz_uhf = -50,
3017 .freq_offset_khz_vhf = -70,
3018
be9bae10
OG		 3019 .clkouttobamse = 1,
3020 .analog_output = 0,
3021
3022 .wbd_vhf_offset = 0,
3023 .wbd_cband_offset = 0,
3024 .use_pwm_agc = 1,
3025 .clkoutdrive = 0,
3026
3027 .fref_clock_ratio = 0,
3028
3029 .wbd = dib7090_wbd_table,
3030
3031 .ls_cfg_pad_drv = 0,
3032 .data_tx_drv = 0,
3033 .low_if = NULL,
3034 .in_soc = 1,
3035 }
3036};
3037
3038static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
3039{
8abe4a0a
MCC		 3040 struct dib0700_adapter_state *state = adap->priv;
3041
3042 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3043 return -ENODEV;
3044
be9bae10 3045 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3046 msleep(20);
be9bae10
OG		 3047 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3048 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3049 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3050 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3051
b4d6046e 3052 msleep(20);
be9bae10 3053 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3054 msleep(20);
be9bae10 3055 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
03245a5e 3056
8abe4a0a
MCC		 3057 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
3058 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3059 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3060 return -ENODEV;
3061 }
8abe4a0a 3062 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
03245a5e 3063
77eed219 3064 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
03245a5e
OG		 3065}
3066
be9bae10 3067static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
03245a5e 3068{
be9bae10 3069 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3070 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3071
3072 nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep,
3073 nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep,
3074 nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3075
77eed219 3076 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
be9bae10 3077 return -ENODEV;
03245a5e 3078
8abe4a0a 3079 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
03245a5e 3080
77eed219
MK		 3081 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3082 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3083 return 0;
03245a5e
OG		 3084}
3085
be9bae10 3086static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
03245a5e 3087{
be9bae10 3088 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3089 struct dib0700_adapter_state *state = adap->priv;
3090
3091 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3092 return -ENODEV;
be9bae10
OG		 3093
3094 /* The TFE7090 requires the dib0700 to not be in master mode */
3095 st->disable_streaming_master_mode = 1;
3096
03245a5e 3097 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3098 msleep(20);
03245a5e
OG		 3099 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3100 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3101 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
03245a5e
OG		 3102 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3103
b4d6046e 3104 msleep(20);
03245a5e 3105 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3106 msleep(20);
03245a5e
OG		 3107 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3108
be9bae10 3109 /* initialize IC 0 */
8abe4a0a
MCC		 3110 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
3111 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3112 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3113 return -ENODEV;
3114 }
03245a5e 3115
be9bae10 3116 dib0700_set_i2c_speed(adap->dev, 340);
8abe4a0a 3117 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
77eed219 3118 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 3119 return -ENODEV;
3120
8abe4a0a 3121 state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
71682520 3122
be9bae10
OG		 3123 return 0;
3124}
3125
3126static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
3127{
3128 struct i2c_adapter *i2c;
8abe4a0a 3129 struct dib0700_adapter_state *state = adap->priv;
be9bae10 3130
77eed219 3131 if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
be9bae10
OG		 3132 err("the master dib7090 has to be initialized first");
3133 return -ENODEV; /* the master device has not been initialized */
3134 }
3135
8abe4a0a
MCC		 3136 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3137 return -ENODEV;
3138
3139 i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
3140 if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
3141 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3142 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3143 return -ENODEV;
3144 }
3145
8abe4a0a 3146 adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
be9bae10
OG		 3147 dib0700_set_i2c_speed(adap->dev, 200);
3148
77eed219 3149 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 3150}
3151
3152static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
3153{
3154 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3155 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3156
3157 tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
3158 tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
3159 tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3160
77eed219 3161 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
be9bae10
OG		 3162 return -ENODEV;
3163
8abe4a0a 3164 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3165
77eed219
MK		 3166 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3167 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10
OG		 3168 return 0;
3169}
3170
3171static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
3172{
3173 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3174 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3175
3176 tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
3177 tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
3178 tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3179
77eed219 3180 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
be9bae10
OG		 3181 return -ENODEV;
3182
8abe4a0a 3183 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3184
77eed219
MK		 3185 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3186 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3187 return 0;
03245a5e 3188}
ba3fe3a9 3189
f45f513a 3190static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
b293f304
OG		 3191{
3192 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3193 struct dib0700_adapter_state *state = adap->priv;
3194
3195 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3196 return -ENODEV;
b293f304 3197
f45f513a 3198 /* The TFE7790P requires the dib0700 to not be in master mode */
b293f304
OG		 3199 st->disable_streaming_master_mode = 1;
3200
3201 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3202 msleep(20);
3203 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3204 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3205 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3206 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3207 msleep(20);
3208 dib0700_ctrl_clock(adap->dev, 72, 1);
3209 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3210 msleep(20);
3211 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3212
8abe4a0a 3213 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
f45f513a 3214 1, 0x10, &tfe7790p_dib7000p_config) != 0) {
8abe4a0a 3215 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
b293f304 3216 __func__);
eb0c1994 3217 dvb_detach(state->dib7000p_ops.set_wbd_ref);
b293f304
OG		 3218 return -ENODEV;
3219 }
8abe4a0a 3220 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
f45f513a 3221 0x80, &tfe7790p_dib7000p_config);
b293f304
OG		 3222
3223 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
3224}
3225
f45f513a 3226static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
6724a2f4
OG		 3227{
3228 struct dib0700_adapter_state *st = adap->priv;
3229 struct i2c_adapter *tun_i2c =
8abe4a0a
MCC		 3230 st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3231
3232
3233 tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
3234 tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
3235 tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
6724a2f4
OG		 3236
3237 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
f45f513a 3238 &tfe7790p_dib0090_config) == NULL)
6724a2f4
OG		 3239 return -ENODEV;
3240
8abe4a0a 3241 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6724a2f4
OG		 3242
3243 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3244 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
3245 return 0;
3246}
3247
01373a5c
PB		 3248/* STK7070PD */
3249static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
3250 {
3251 .output_mpeg2_in_188_bytes = 1,
3252
3253 .agc_config_count = 1,
3254 .agc = &dib7070_agc_config,
3255 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3256 .tuner_is_baseband = 1,
3257 .spur_protect = 1,
01373a5c
PB		 3258
3259 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3260 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3261 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3262
3263 .hostbus_diversity = 1,
3264 }, {
3265 .output_mpeg2_in_188_bytes = 1,
3266
3267 .agc_config_count = 1,
3268 .agc = &dib7070_agc_config,
3269 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3270 .tuner_is_baseband = 1,
3271 .spur_protect = 1,
01373a5c
PB		 3272
3273 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3274 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3275 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3276
3277 .hostbus_diversity = 1,
3278 }
3279};
3280
52fd5b2e 3281static void stk7070pd_init(struct dvb_usb_device *dev)
01373a5c 3282{
52fd5b2e 3283 dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
01373a5c 3284 msleep(10);
52fd5b2e
JS		 3285 dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
3286 dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
3287 dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
3288 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
01373a5c 3289
52fd5b2e 3290 dib0700_ctrl_clock(dev, 72, 1);
01373a5c
PB		 3291
3292 msleep(10);
52fd5b2e
JS		 3293 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
3294}
3295
3296static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
3297{
8abe4a0a
MCC		 3298 struct dib0700_adapter_state *state = adap->priv;
3299
3300 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3301 return -ENODEV;
3302
52fd5b2e
JS		 3303 stk7070pd_init(adap->dev);
3304
01373a5c
PB		 3305 msleep(10);
3306 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3307
8abe4a0a 3308 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7 3309 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3310 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 3311 __func__);
eb0c1994 3312 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 3313 return -ENODEV;
3314 }
01373a5c 3315
8abe4a0a 3316 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
77eed219 3317 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3318}
3319
3320static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
3321{
8abe4a0a
MCC		 3322 struct dib0700_adapter_state *state = adap->priv;
3323
3324 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3325 return -ENODEV;
3326
3327 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
77eed219 3328 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3329}
3330
d43272a4 3331static int novatd_read_status_override(struct dvb_frontend *fe,
0df289a2 3332 enum fe_status *stat)
d43272a4
JS		 3333{
3334 struct dvb_usb_adapter *adap = fe->dvb->priv;
3335 struct dvb_usb_device *dev = adap->dev;
3336 struct dib0700_state *state = dev->priv;
3337 int ret;
3338
3339 ret = state->read_status(fe, stat);
3340
3341 if (!ret)
3342 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
3343 !!(*stat & FE_HAS_LOCK));
3344
3345 return ret;
3346}
3347
3348static int novatd_sleep_override(struct dvb_frontend* fe)
3349{
3350 struct dvb_usb_adapter *adap = fe->dvb->priv;
3351 struct dvb_usb_device *dev = adap->dev;
3352 struct dib0700_state *state = dev->priv;
3353
3354 /* turn off LED */
3355 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
3356
3357 return state->sleep(fe);
3358}
3359
cba862dc 3360/*
2b05b881
JS		 3361 * novatd_frontend_attach - Nova-TD specific attach
3362 *
3363 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
3364 * information purposes.
3365 */
3366static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
3367{
3368 struct dvb_usb_device *dev = adap->dev;
d43272a4 3369 struct dib0700_state *st = dev->priv;
8abe4a0a
MCC		 3370 struct dib0700_adapter_state *state = adap->priv;
3371
3372 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3373 return -ENODEV;
2b05b881
JS		 3374
3375 if (adap->id == 0) {
3376 stk7070pd_init(dev);
3377
3378 /* turn the power LED on, the other two off (just in case) */
3379 dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
3380 dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
3381 dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
3382
8abe4a0a 3383 if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
2b05b881 3384 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3385 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
2b05b881 3386 __func__);
eb0c1994 3387 dvb_detach(state->dib7000p_ops.set_wbd_ref);
2b05b881
JS		 3388 return -ENODEV;
3389 }
3390 }
3391
8abe4a0a 3392 adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
2b05b881
JS		 3393 adap->id == 0 ? 0x80 : 0x82,
3394 &stk7070pd_dib7000p_config[adap->id]);
d43272a4
JS		 3395
3396 if (adap->fe_adap[0].fe == NULL)
3397 return -ENODEV;
3398
3399 st->read_status = adap->fe_adap[0].fe->ops.read_status;
3400 adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
3401 st->sleep = adap->fe_adap[0].fe->ops.sleep;
3402 adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
3403
3404 return 0;
2b05b881
JS		 3405}
3406
cb22cb52
DH		 3407/* S5H1411 */
3408static struct s5h1411_config pinnacle_801e_config = {
3409 .output_mode = S5H1411_PARALLEL_OUTPUT,
3410 .gpio = S5H1411_GPIO_OFF,
3411 .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
3412 .qam_if = S5H1411_IF_44000,
3413 .vsb_if = S5H1411_IF_44000,
3414 .inversion = S5H1411_INVERSION_OFF,
3415 .status_mode = S5H1411_DEMODLOCKING
3416};
3417
3418/* Pinnacle PCTV HD Pro 801e GPIOs map:
3419 GPIO0 - currently unknown
3420 GPIO1 - xc5000 tuner reset
3421 GPIO2 - CX25843 sleep
3422 GPIO3 - currently unknown
3423 GPIO4 - currently unknown
3424 GPIO6 - currently unknown
3425 GPIO7 - currently unknown
3426 GPIO9 - currently unknown
3427 GPIO10 - CX25843 reset
3428 */
3429static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
3430{
3431 struct dib0700_state *st = adap->dev->priv;
3432
3433 /* Make use of the new i2c functions from FW 1.20 */
3434 st->fw_use_new_i2c_api = 1;
3435
3436 /* The s5h1411 requires the dib0700 to not be in master mode */
3437 st->disable_streaming_master_mode = 1;
3438
3439 /* All msleep values taken from Windows USB trace */
3440 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
3441 dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
3442 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3443 msleep(400);
3444 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3445 msleep(60);
3446 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3447 msleep(30);
3448 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3449 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3450 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3451 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3452 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
3453 msleep(30);
3454
3455 /* Put the CX25843 to sleep for now since we're in digital mode */
3456 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3457
3458 /* GPIOs are initialized, do the attach */
77eed219 3459 adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
cb22cb52 3460 &adap->dev->i2c_adap);
77eed219 3461 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
cb22cb52
DH		 3462}
3463
767f3b3b
MK		 3464static int dib0700_xc5000_tuner_callback(void *priv, int component,
3465 int command, int arg)
cb22cb52
DH		 3466{
3467 struct dvb_usb_adapter *adap = priv;
3468
79025a9e
DH		 3469 if (command == XC5000_TUNER_RESET) {
3470 /* Reset the tuner */
3471 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
f0f4633a 3472 msleep(10);
79025a9e 3473 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
f0f4633a 3474 msleep(10);
79025a9e
DH		 3475 } else {
3476 err("xc5000: unknown tuner callback command: %d\n", command);
3477 return -EINVAL;
3478 }
cb22cb52
DH		 3479
3480 return 0;
3481}
3482
3483static struct xc5000_config s5h1411_xc5000_tunerconfig = {
3484 .i2c_address = 0x64,
3485 .if_khz = 5380,
cb22cb52
DH		 3486};
3487
3488static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
3489{
79025a9e 3490 /* FIXME: generalize & move to common area */
77eed219 3491 adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
79025a9e 3492
77eed219 3493 return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
767f3b3b 3494 &s5h1411_xc5000_tunerconfig)
cb22cb52
DH		 3495 == NULL ? -ENODEV : 0;
3496}
3497
8d009a0c
DF		 3498static int dib0700_xc4000_tuner_callback(void *priv, int component,
3499 int command, int arg)
3500{
3501 struct dvb_usb_adapter *adap = priv;
8abe4a0a 3502 struct dib0700_adapter_state *state = adap->priv;
8d009a0c
DF		 3503
3504 if (command == XC4000_TUNER_RESET) {
3505 /* Reset the tuner */
8abe4a0a 3506 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
8d009a0c 3507 msleep(10);
8abe4a0a 3508 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
8d009a0c
DF		 3509 } else {
3510 err("xc4000: unknown tuner callback command: %d\n", command);
3511 return -EINVAL;
3512 }
3513
3514 return 0;
3515}
3516
8583fc83
DH		 3517static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
3518 .band_caps = BAND_UHF | BAND_VHF,
3519 .setup = 0x64,
3520 .inv_gain = 0x02c8,
3521 .time_stabiliz = 0x15,
3522 .alpha_level = 0x00,
3523 .thlock = 0x76,
3524 .wbd_inv = 0x01,
3525 .wbd_ref = 0x0b33,
3526 .wbd_sel = 0x00,
3527 .wbd_alpha = 0x02,
3528 .agc1_max = 0x00,
3529 .agc1_min = 0x00,
3530 .agc2_max = 0x9b26,
3531 .agc2_min = 0x26ca,
3532 .agc1_pt1 = 0x00,
3533 .agc1_pt2 = 0x00,
3534 .agc1_pt3 = 0x00,
3535 .agc1_slope1 = 0x00,
3536 .agc1_slope2 = 0x00,
3537 .agc2_pt1 = 0x00,
3538 .agc2_pt2 = 0x80,
3539 .agc2_slope1 = 0x1d,
3540 .agc2_slope2 = 0x1d,
2df12510 3541 .alpha_mant = 0x11,
8583fc83
DH		 3542 .alpha_exp = 0x1b,
3543 .beta_mant = 0x17,
3544 .beta_exp = 0x33,
3545 .perform_agc_softsplit = 0x00,
3546};
3547
f1c78d34 3548static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
09628b2c
MCC		 3549 .internal = 60000,
3550 .sampling = 30000,
3551 .pll_prediv = 1,
3552 .pll_ratio = 8,
3553 .pll_range = 3,
3554 .pll_reset = 1,
3555 .pll_bypass = 0,
3556 .enable_refdiv = 0,
3557 .bypclk_div = 0,
3558 .IO_CLK_en_core = 1,
3559 .ADClkSrc = 1,
3560 .modulo = 0,
3561 .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
3562 .ifreq = 39370534,
3563 .timf = 20452225,
3564 .xtal_hz = 30000000
f1c78d34
DH		 3565};
3566
01f16263
DH		 3567/* FIXME: none of these inputs are validated yet */
3568static struct dib7000p_config pctv_340e_config = {
62956ced 3569 .output_mpeg2_in_188_bytes = 1,
01f16263
DH		 3570
3571 .agc_config_count = 1,
8583fc83 3572 .agc = &stk7700p_7000p_xc4000_agc_config,
f1c78d34 3573 .bw = &stk7700p_xc4000_pll_config,
01f16263 3574
01f16263
DH		 3575 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
3576 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
3577 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
3578};
3579
3580/* PCTV 340e GPIOs map:
3581 dib0700:
3582 GPIO2 - CX25843 sleep
3583 GPIO3 - CS5340 reset
3584 GPIO5 - IRD
3585 GPIO6 - Power Supply
3586 GPIO8 - LNA (1=off 0=on)
3587 GPIO10 - CX25843 reset
3588 dib7000:
3589 GPIO8 - xc4000 reset
3590 */
3591static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
3592{
3593 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3594 struct dib0700_adapter_state *state = adap->priv;
3595
3596 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3597 return -ENODEV;
01f16263
DH		 3598
3599 /* Power Supply on */
3600 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3601 msleep(50);
3602 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3603 msleep(100); /* Allow power supply to settle before probing */
3604
3605 /* cx25843 reset */
3606 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3607 msleep(1); /* cx25843 datasheet say 350us required */
3608 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3609
3610 /* LNA off for now */
3611 dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
3612
3613 /* Put the CX25843 to sleep for now since we're in digital mode */
3614 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3615
3616 /* FIXME: not verified yet */
3617 dib0700_ctrl_clock(adap->dev, 72, 1);
3618
2750d9c3
DH		 3619 msleep(500);
3620
8abe4a0a 3621 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
01f16263 3622 /* Demodulator not found for some reason? */
eb0c1994 3623 dvb_detach(state->dib7000p_ops.set_wbd_ref);
01f16263
DH		 3624 return -ENODEV;
3625 }
3626
8abe4a0a 3627 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
01f16263
DH		 3628 &pctv_340e_config);
3629 st->is_dib7000pc = 1;
3630
77eed219 3631 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01f16263
DH		 3632}
3633
8583fc83 3634static struct xc4000_config dib7000p_xc4000_tunerconfig = {
8edeb6eb 3635 .i2c_address = 0x61,
3636 .default_pm = 1,
3637 .dvb_amplitude = 0,
3638 .set_smoothedcvbs = 0,
3639 .if_khz = 5400
8d009a0c
DF		 3640};
3641
3642static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
3643{
59d0c37b 3644 struct i2c_adapter *tun_i2c;
8abe4a0a 3645 struct dib0700_adapter_state *state = adap->priv;
59d0c37b
DH		 3646
3647 /* The xc4000 is not on the main i2c bus */
8abe4a0a 3648 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
59d0c37b
DH		 3649 DIBX000_I2C_INTERFACE_TUNER, 1);
3650 if (tun_i2c == NULL) {
941830c9 3651 printk(KERN_ERR "Could not reach tuner i2c bus\n");
59d0c37b
DH		 3652 return 0;
3653 }
3654
3655 /* Setup the reset callback */
77eed219 3656 adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
8d009a0c 3657
77eed219 3658 return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
8583fc83 3659 &dib7000p_xc4000_tunerconfig)
8d009a0c
DF		 3660 == NULL ? -ENODEV : 0;
3661}
3662
ce904bcb
MK		 3663static struct lgdt3305_config hcw_lgdt3305_config = {
3664 .i2c_addr = 0x0e,
3665 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
3666 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
3667 .tpvalid_polarity = LGDT3305_TP_VALID_LOW,
3668 .deny_i2c_rptr = 0,
3669 .spectral_inversion = 1,
3670 .qam_if_khz = 6000,
3671 .vsb_if_khz = 6000,
3672 .usref_8vsb = 0x0500,
3673};
3674
3675static struct mxl5007t_config hcw_mxl5007t_config = {
3676 .xtal_freq_hz = MxL_XTAL_25_MHZ,
3677 .if_freq_hz = MxL_IF_6_MHZ,
3678 .invert_if = 1,
3679};
3680
3681/* TIGER-ATSC map:
3682 GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
3683 GPIO1 - ANT_SEL (H: VPA, L: MCX)
3684 GPIO4 - SCL2
3685 GPIO6 - EN_TUNER
3686 GPIO7 - SDA2
3687 GPIO10 - DEM_RST
3688
3689 MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
3690 */
3691static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
3692{
3693 struct dib0700_state *st = adap->dev->priv;
3694
3695 /* Make use of the new i2c functions from FW 1.20 */
3696 st->fw_use_new_i2c_api = 1;
3697
3698 st->disable_streaming_master_mode = 1;
3699
3700 /* fe power enable */
3701 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3702 msleep(30);
3703 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3704 msleep(30);
3705
3706 /* demod reset */
3707 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3708 msleep(30);
3709 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3710 msleep(30);
3711 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3712 msleep(30);
3713
77eed219 3714 adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
ce904bcb
MK		 3715 &hcw_lgdt3305_config,
3716 &adap->dev->i2c_adap);
3717
77eed219 3718 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ce904bcb
MK		 3719}
3720
3721static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
3722{
77eed219 3723 return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
ce904bcb
MK		 3724 &adap->dev->i2c_adap, 0x60,
3725 &hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
3726}
3727
3728
01373a5c 3729/* DVB-USB and USB stuff follows */
b7f54910 3730struct usb_device_id dib0700_usb_id_table[] = {
01373a5c 3731/* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) },
6ca8f0b9
AC		 3732 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) },
3733 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) },
3734 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) },
3735 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) },
01373a5c 3736/* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) },
6ca8f0b9
AC		 3737 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) },
3738 { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) },
3739 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) },
3740 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) },
01373a5c 3741/* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) },
6ca8f0b9
AC		 3742 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) },
3743 { USB_DEVICE(USB_VID_TERRATEC,
3744 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) },
3745 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) },
3746 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) },
01373a5c 3747/* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) },
6ca8f0b9
AC		 3748 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) },
3749 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) },
3750 { USB_DEVICE(USB_VID_PINNACLE,
3751 USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) },
3752 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) },
fa3b877e 3753/* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) },
6ca8f0b9
AC		 3754 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U7000) },
3755 { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ARTEC_T14BR) },
3756 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000) },
3757 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3100) },
3758/* 25 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_3) },
3759 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_MYTV_T) },
3760 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_USB_XE) },
3761 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_EXPRESSCARD_320CX) },
3762 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV72E) },
3763/* 30 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73E) },
3764 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_EC372S) },
3765 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) },
dc88807e 3766 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) },
5da4e2c6 3767 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) },
af2a887c 3768/* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
9a0c04a1 3769 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) },
17a370bc 3770 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U8000) },
8751aaa6 3771 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700PH) },
5769743a 3772 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000H) },
cb22cb52 3773/* 40 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E) },
d2fc3bfc 3774 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E_SE) },
bb1b082e 3775 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_EXPRESS) },
db4b2d19
NF		 3776 { USB_DEVICE(USB_VID_TERRATEC,
3777 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2) },
0a6e1ed2 3778 { USB_DEVICE(USB_VID_SONY, USB_PID_SONY_PLAYTV) },
9abb6e6f 3779/* 45 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_PD378S) },
ce904bcb
MK		 3780 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC) },
3781 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC_B210) },
16ba1ee5 3782 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_MC770) },
919a5488 3783 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT) },
513846ec 3784/* 50 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_Dlx) },
f0f4ae76 3785 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_H) },
a9b8fe30
PB		 3786 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T3) },
3787 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T5) },
c53d83cc 3788 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D) },
74b76f21
OG		 3789/* 55 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D_2) },
3790 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73A) },
e414753c
PB		 3791 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV73ESE) },
3792 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV282E) },
d300bd69 3793 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) },
db48138f 3794/* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) },
ba3fe3a9
PB		 3795 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) },
3796 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) },
3bfb317f 3797 { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) },
8a378e85 3798 { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) },
20232c47 3799/* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) },
e414753c 3800 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) },
03245a5e 3801 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096GP) },
84e2f037 3802 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DIVERSITY) },
be9bae10
OG		 3803 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090M) },
3804/* 70 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM8096MD) },
3805 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090MD) },
3806 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM7090) },
3807 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) },
498e677c 3808 { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) },
d1402307 3809/* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) },
8d009a0c 3810 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) },
33fb1681 3811 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
f45f513a
OG		 3812 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790P) },
3813 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
3814/* 80 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_2) },
c859e6ef
MK		 3815 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E) },
3816 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E_SE) },
91be260f 3817 { USB_DEVICE(USB_VID_PCTV, USB_PID_DIBCOM_STK8096PVR) },
ec788795 3818 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096PVR) },
430ae126 3819 { USB_DEVICE(USB_VID_HAMA, USB_PID_HAMA_DVBT_HYBRID) },
6ca8f0b9 3820 { 0 } /* Terminating entry */
b7f54910
PB		 3821};
3822MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
3823
3824#define DIB0700_DEFAULT_DEVICE_PROPERTIES \
3825 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
3826 .usb_ctrl = DEVICE_SPECIFIC, \
bdc203e1 3827 .firmware = "dvb-usb-dib0700-1.20.fw", \
b7f54910 3828 .download_firmware = dib0700_download_firmware, \
6958effe 3829 .no_reconnect = 1, \
b7f54910 3830 .size_of_priv = sizeof(struct dib0700_state), \
6958effe
PB		 3831 .i2c_algo = &dib0700_i2c_algo, \
3832 .identify_state = dib0700_identify_state
b7f54910
PB		 3833
3834#define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
3835 .streaming_ctrl = dib0700_streaming_ctrl, \
3836 .stream = { \
3837 .type = USB_BULK, \
3838 .count = 4, \
3839 .endpoint = ep, \
3840 .u = { \
3841 .bulk = { \
3842 .buffersize = 39480, \
3843 } \
3844 } \
3845 }
3846
0fae1997
MCC		 3847#define DIB0700_NUM_FRONTENDS(n) \
3848 .num_frontends = n, \
3849 .size_of_priv = sizeof(struct dib0700_adapter_state)
3850
b7f54910
PB		 3851struct dvb_usb_device_properties dib0700_devices[] = {
3852 {
3853 DIB0700_DEFAULT_DEVICE_PROPERTIES,
3854
3855 .num_adapters = 1,
3856 .adapter = {
3857 {
0fae1997 3858 DIB0700_NUM_FRONTENDS(1),
77eed219 3859 .fe = {{
f8731f4d
OG		 3860 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3861 .pid_filter_count = 32,
e192a7cf
OG		 3862 .pid_filter = stk7700p_pid_filter,
3863 .pid_filter_ctrl = stk7700p_pid_filter_ctrl,
b7f54910
PB		 3864 .frontend_attach = stk7700p_frontend_attach,
3865 .tuner_attach = stk7700p_tuner_attach,
3866
3867 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3868 }},
b7f54910
PB		 3869 },
3870 },
3871
67053a40 3872 .num_device_descs = 8,
b7f54910
PB		 3873 .devices = {
3874 { "DiBcom STK7700P reference design",
49a1376c 3875 { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] },
b7f54910
PB		 3876 { NULL },
3877 },
3878 { "Hauppauge Nova-T Stick",
f9aeba45 3879 { &dib0700_usb_id_table[4], &dib0700_usb_id_table[9], NULL },
b7f54910
PB		 3880 { NULL },
3881 },
3882 { "AVerMedia AVerTV DVB-T Volar",
ced8feca 3883 { &dib0700_usb_id_table[5], &dib0700_usb_id_table[10] },
b7f54910
PB		 3884 { NULL },
3885 },
49a1376c 3886 { "Compro Videomate U500",
1f8ca4b3 3887 { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] },
49a1376c 3888 { NULL },
0ce215e1
HS		 3889 },
3890 { "Uniwill STK7700P based (Hama and others)",
3891 { &dib0700_usb_id_table[7], NULL },
3892 { NULL },
8637a875
MK		 3893 },
3894 { "Leadtek Winfast DTV Dongle (STK7700P based)",
1e13c8f0 3895 { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
8637a875 3896 { NULL },
fa3b877e
JS		 3897 },
3898 { "AVerMedia AVerTV DVB-T Express",
3899 { &dib0700_usb_id_table[20] },
3900 { NULL },
67053a40 3901 },
67053a40 3902 { "Gigabyte U7000",
3903 { &dib0700_usb_id_table[21], NULL },
3904 { NULL },
49a1376c 3905 }
b1139e35
DS		 3906 },
3907
72b39310 3908 .rc.core = {
f72a27b8 3909 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3910 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 3911 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 3912 .allowed_protos = RC_PROTO_BIT_RC5 |
3913 RC_PROTO_BIT_RC6_MCE |
3914 RC_PROTO_BIT_NEC,
d8b4b582 3915 .change_protocol = dib0700_change_protocol,
f72a27b8 3916 },
b7f54910
PB		 3917 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
3918
3919 .num_adapters = 2,
3920 .adapter = {
3921 {
0fae1997 3922 DIB0700_NUM_FRONTENDS(1),
77eed219 3923 .fe = {{
b7f54910
PB		 3924 .frontend_attach = bristol_frontend_attach,
3925 .tuner_attach = bristol_tuner_attach,
3926
3927 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3928 }},
b7f54910 3929 }, {
0fae1997 3930 DIB0700_NUM_FRONTENDS(1),
77eed219 3931 .fe = {{
b7f54910
PB		 3932 .frontend_attach = bristol_frontend_attach,
3933 .tuner_attach = bristol_tuner_attach,
3934
3935 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 3936 }},
b7f54910
PB		 3937 }
3938 },
3939
3940 .num_device_descs = 1,
3941 .devices = {
3942 { "Hauppauge Nova-T 500 Dual DVB-T",
49a1376c 3943 { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL },
b7f54910
PB		 3944 { NULL },
3945 },
82f3d559
JG		 3946 },
3947
72b39310 3948 .rc.core = {
f72a27b8 3949 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3950 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 3951 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 3952 .allowed_protos = RC_PROTO_BIT_RC5 |
3953 RC_PROTO_BIT_RC6_MCE |
3954 RC_PROTO_BIT_NEC,
d8b4b582 3955 .change_protocol = dib0700_change_protocol,
f72a27b8 3956 },
54d75eba
OD		 3957 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
3958
3959 .num_adapters = 2,
3960 .adapter = {
3961 {
0fae1997 3962 DIB0700_NUM_FRONTENDS(1),
77eed219 3963 .fe = {{
f8731f4d
OG		 3964 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3965 .pid_filter_count = 32,
3966 .pid_filter = stk70x0p_pid_filter,
3967 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 3968 .frontend_attach = stk7700d_frontend_attach,
3969 .tuner_attach = stk7700d_tuner_attach,
3970
3971 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3972 }},
54d75eba 3973 }, {
0fae1997 3974 DIB0700_NUM_FRONTENDS(1),
77eed219 3975 .fe = {{
f8731f4d
OG		 3976 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3977 .pid_filter_count = 32,
3978 .pid_filter = stk70x0p_pid_filter,
3979 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 3980 .frontend_attach = stk7700d_frontend_attach,
3981 .tuner_attach = stk7700d_tuner_attach,
3982
3983 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 3984 }},
54d75eba
OD		 3985 }
3986 },
3987
200e861c 3988 .num_device_descs = 5,
54d75eba
OD		 3989 .devices = {
3990 { "Pinnacle PCTV 2000e",
3991 { &dib0700_usb_id_table[11], NULL },
3992 { NULL },
3993 },
3994 { "Terratec Cinergy DT XS Diversity",
3995 { &dib0700_usb_id_table[12], NULL },
3996 { NULL },
3997 },
faebb914 3998 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
54d75eba
OD		 3999 { &dib0700_usb_id_table[13], NULL },
4000 { NULL },
4001 },
01373a5c 4002 { "DiBcom STK7700D reference design",
b6884a17
PB		 4003 { &dib0700_usb_id_table[14], NULL },
4004 { NULL },
bb1b082e 4005 },
200e861c
JW		 4006 { "YUAN High-Tech DiBcom STK7700D",
4007 { &dib0700_usb_id_table[55], NULL },
4008 { NULL },
4009 },
bb1b082e 4010
54d75eba 4011 },
82f3d559 4012
72b39310 4013 .rc.core = {
f72a27b8 4014 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4015 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4016 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4017 .allowed_protos = RC_PROTO_BIT_RC5 |
4018 RC_PROTO_BIT_RC6_MCE |
4019 RC_PROTO_BIT_NEC,
d8b4b582 4020 .change_protocol = dib0700_change_protocol,
f72a27b8 4021 },
132c3188
DG		 4022 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4023
4024 .num_adapters = 1,
4025 .adapter = {
4026 {
0fae1997 4027 DIB0700_NUM_FRONTENDS(1),
77eed219 4028 .fe = {{
f8731f4d
OG		 4029 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4030 .pid_filter_count = 32,
4031 .pid_filter = stk70x0p_pid_filter,
4032 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
132c3188
DG		 4033 .frontend_attach = stk7700P2_frontend_attach,
4034 .tuner_attach = stk7700d_tuner_attach,
4035
4036 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4037 }},
132c3188
DG		 4038 },
4039 },
4040
bb1b082e 4041 .num_device_descs = 3,
132c3188
DG		 4042 .devices = {
4043 { "ASUS My Cinema U3000 Mini DVBT Tuner",
4044 { &dib0700_usb_id_table[23], NULL },
4045 { NULL },
4046 },
6ca8f0b9
AC		 4047 { "Yuan EC372S",
4048 { &dib0700_usb_id_table[31], NULL },
4049 { NULL },
bb1b082e
YA		 4050 },
4051 { "Terratec Cinergy T Express",
4052 { &dib0700_usb_id_table[42], NULL },
4053 { NULL },
6ca8f0b9 4054 }
48aa7391
CR		 4055 },
4056
72b39310 4057 .rc.core = {
f72a27b8 4058 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4059 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4060 .module_name = "dib0700",
0ffd1ab3 4061 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4062 .allowed_protos = RC_PROTO_BIT_RC5 |
4063 RC_PROTO_BIT_RC6_MCE |
4064 RC_PROTO_BIT_NEC,
d8b4b582 4065 .change_protocol = dib0700_change_protocol,
f72a27b8 4066 },
01373a5c
PB		 4067 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4068
4069 .num_adapters = 1,
4070 .adapter = {
4071 {
0fae1997 4072 DIB0700_NUM_FRONTENDS(1),
77eed219 4073 .fe = {{
f8731f4d
OG		 4074 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4075 .pid_filter_count = 32,
4076 .pid_filter = stk70x0p_pid_filter,
4077 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
01373a5c
PB		 4078 .frontend_attach = stk7070p_frontend_attach,
4079 .tuner_attach = dib7070p_tuner_attach,
4080
4081 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4082 }},
01373a5c
PB		 4083 },
4084 },
4085
0bc9d39b 4086 .num_device_descs = 12,
01373a5c
PB		 4087 .devices = {
4088 { "DiBcom STK7070P reference design",
4089 { &dib0700_usb_id_table[15], NULL },
4090 { NULL },
4091 },
4092 { "Pinnacle PCTV DVB-T Flash Stick",
4093 { &dib0700_usb_id_table[16], NULL },
4094 { NULL },
4095 },
7999a816
YL		 4096 { "Artec T14BR DVB-T",
4097 { &dib0700_usb_id_table[22], NULL },
4098 { NULL },
132c3188
DG		 4099 },
4100 { "ASUS My Cinema U3100 Mini DVBT Tuner",
4101 { &dib0700_usb_id_table[24], NULL },
4102 { NULL },
4103 },
c7637b1a
TT		 4104 { "Hauppauge Nova-T Stick",
4105 { &dib0700_usb_id_table[25], NULL },
4106 { NULL },
4107 },
13b83b5d
DS		 4108 { "Hauppauge Nova-T MyTV.t",
4109 { &dib0700_usb_id_table[26], NULL },
4110 { NULL },
4111 },
6ca8f0b9
AC		 4112 { "Pinnacle PCTV 72e",
4113 { &dib0700_usb_id_table[29], NULL },
4114 { NULL },
4115 },
4116 { "Pinnacle PCTV 73e",
4117 { &dib0700_usb_id_table[30], NULL },
4118 { NULL },
4119 },
919a5488
KF		 4120 { "Elgato EyeTV DTT",
4121 { &dib0700_usb_id_table[49], NULL },
4122 { NULL },
4123 },
9abb6e6f
PT		 4124 { "Yuan PD378S",
4125 { &dib0700_usb_id_table[45], NULL },
4126 { NULL },
4127 },
513846ec
AS		 4128 { "Elgato EyeTV Dtt Dlx PD378S",
4129 { &dib0700_usb_id_table[50], NULL },
4130 { NULL },
4131 },
0bc9d39b 4132 { "Elgato EyeTV DTT rev. 2",
f45f513a 4133 { &dib0700_usb_id_table[80], NULL },
0bc9d39b
GG		 4134 { NULL },
4135 },
c7637b1a
TT		 4136 },
4137
72b39310 4138 .rc.core = {
f72a27b8 4139 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4140 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4141 .module_name = "dib0700",
0ffd1ab3 4142 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4143 .allowed_protos = RC_PROTO_BIT_RC5 |
4144 RC_PROTO_BIT_RC6_MCE |
4145 RC_PROTO_BIT_NEC,
d8b4b582 4146 .change_protocol = dib0700_change_protocol,
f72a27b8 4147 },
74b76f21
OG		 4148 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4149
4150 .num_adapters = 1,
4151 .adapter = {
4152 {
0fae1997 4153 DIB0700_NUM_FRONTENDS(1),
77eed219 4154 .fe = {{
648732fc
MCC		 4155 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4156 .pid_filter_count = 32,
4157 .pid_filter = stk70x0p_pid_filter,
4158 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
74b76f21
OG		 4159 .frontend_attach = stk7070p_frontend_attach,
4160 .tuner_attach = dib7070p_tuner_attach,
4161
4162 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4163 }},
74b76f21
OG		 4164 },
4165 },
4166
20232c47 4167 .num_device_descs = 3,
74b76f21
OG		 4168 .devices = {
4169 { "Pinnacle PCTV 73A",
4170 { &dib0700_usb_id_table[56], NULL },
4171 { NULL },
4172 },
4173 { "Pinnacle PCTV 73e SE",
20232c47 4174 { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL },
74b76f21
OG		 4175 { NULL },
4176 },
4177 { "Pinnacle PCTV 282e",
20232c47 4178 { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL },
74b76f21
OG		 4179 { NULL },
4180 },
4181 },
4182
72b39310 4183 .rc.core = {
f72a27b8 4184 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4185 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4186 .module_name = "dib0700",
0ffd1ab3 4187 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4188 .allowed_protos = RC_PROTO_BIT_RC5 |
4189 RC_PROTO_BIT_RC6_MCE |
4190 RC_PROTO_BIT_NEC,
d8b4b582 4191 .change_protocol = dib0700_change_protocol,
f72a27b8 4192 },
01373a5c
PB		 4193 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4194
4195 .num_adapters = 2,
4196 .adapter = {
4197 {
0fae1997 4198 DIB0700_NUM_FRONTENDS(1),
77eed219 4199 .fe = {{
f8731f4d
OG		 4200 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4201 .pid_filter_count = 32,
4202 .pid_filter = stk70x0p_pid_filter,
4203 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4204 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4205 .tuner_attach = dib7070p_tuner_attach,
4206
4207 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4208 }},
01373a5c 4209 }, {
0fae1997 4210 DIB0700_NUM_FRONTENDS(1),
77eed219 4211 .fe = {{
f8731f4d
OG		 4212 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4213 .pid_filter_count = 32,
4214 .pid_filter = stk70x0p_pid_filter,
4215 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4216 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4217 .tuner_attach = dib7070p_tuner_attach,
4218
4219 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4220 }},
01373a5c
PB		 4221 }
4222 },
4223
c859e6ef 4224 .num_device_descs = 3,
9b6ba57b
JS		 4225 .devices = {
4226 { "Hauppauge Nova-TD Stick (52009)",
4227 { &dib0700_usb_id_table[35], NULL },
4228 { NULL },
4229 },
c859e6ef
MK		 4230 { "PCTV 2002e",
4231 { &dib0700_usb_id_table[81], NULL },
4232 { NULL },
4233 },
4234 { "PCTV 2002e SE",
4235 { &dib0700_usb_id_table[82], NULL },
4236 { NULL },
4237 },
9b6ba57b
JS		 4238 },
4239
4240 .rc.core = {
4241 .rc_interval = DEFAULT_RC_INTERVAL,
4242 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4243 .module_name = "dib0700",
4244 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4245 .allowed_protos = RC_PROTO_BIT_RC5 |
4246 RC_PROTO_BIT_RC6_MCE |
4247 RC_PROTO_BIT_NEC,
9b6ba57b
JS		 4248 .change_protocol = dib0700_change_protocol,
4249 },
4250 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4251
4252 .num_adapters = 2,
4253 .adapter = {
4254 {
0fae1997 4255 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4256 .fe = {{
4257 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4258 .pid_filter_count = 32,
4259 .pid_filter = stk70x0p_pid_filter,
4260 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4261 .frontend_attach = stk7070pd_frontend_attach0,
4262 .tuner_attach = dib7070p_tuner_attach,
4263
4264 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4265 }},
9b6ba57b 4266 }, {
0fae1997 4267 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4268 .fe = {{
4269 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4270 .pid_filter_count = 32,
4271 .pid_filter = stk70x0p_pid_filter,
4272 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4273 .frontend_attach = stk7070pd_frontend_attach1,
4274 .tuner_attach = dib7070p_tuner_attach,
4275
4276 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4277 }},
9b6ba57b
JS		 4278 }
4279 },
4280
4281 .num_device_descs = 5,
01373a5c
PB		 4282 .devices = {
4283 { "DiBcom STK7070PD reference design",
4284 { &dib0700_usb_id_table[17], NULL },
4285 { NULL },
4286 },
4287 { "Pinnacle PCTV Dual DVB-T Diversity Stick",
4288 { &dib0700_usb_id_table[18], NULL },
4289 { NULL },
d01eb2dc 4290 },
9a0c04a1
MK		 4291 { "Hauppauge Nova-TD-500 (84xxx)",
4292 { &dib0700_usb_id_table[36], NULL },
4293 { NULL },
db4b2d19 4294 },
a9b8fe30
PB		 4295 { "Terratec Cinergy DT USB XS Diversity/ T5",
4296 { &dib0700_usb_id_table[43],
4297 &dib0700_usb_id_table[53], NULL},
db4b2d19 4298 { NULL },
0a6e1ed2 4299 },
4300 { "Sony PlayTV",
4301 { &dib0700_usb_id_table[44], NULL },
4302 { NULL },
84e2f037 4303 },
5af935cc
MCC		 4304 },
4305
4306 .rc.core = {
4307 .rc_interval = DEFAULT_RC_INTERVAL,
4308 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4309 .module_name = "dib0700",
0ffd1ab3 4310 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4311 .allowed_protos = RC_PROTO_BIT_RC5 |
4312 RC_PROTO_BIT_RC6_MCE |
4313 RC_PROTO_BIT_NEC,
d8b4b582 4314 .change_protocol = dib0700_change_protocol,
5af935cc
MCC		 4315 },
4316 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4317
4318 .num_adapters = 2,
4319 .adapter = {
4320 {
0fae1997 4321 DIB0700_NUM_FRONTENDS(1),
77eed219 4322 .fe = {{
5af935cc
MCC		 4323 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4324 .pid_filter_count = 32,
4325 .pid_filter = stk70x0p_pid_filter,
4326 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4327 .frontend_attach = stk7070pd_frontend_attach0,
4328 .tuner_attach = dib7070p_tuner_attach,
4329
4330 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4331 }},
5af935cc 4332 }, {
0fae1997 4333 DIB0700_NUM_FRONTENDS(1),
77eed219 4334 .fe = {{
5af935cc
MCC		 4335 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4336 .pid_filter_count = 32,
4337 .pid_filter = stk70x0p_pid_filter,
4338 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4339 .frontend_attach = stk7070pd_frontend_attach1,
4340 .tuner_attach = dib7070p_tuner_attach,
4341
4342 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4343 }},
5af935cc
MCC		 4344 }
4345 },
4346
4347 .num_device_descs = 1,
4348 .devices = {
84e2f037
MM		 4349 { "Elgato EyeTV Diversity",
4350 { &dib0700_usb_id_table[68], NULL },
4351 { NULL },
4352 },
c985a8dc 4353 },
f72a27b8 4354
72b39310 4355 .rc.core = {
f72a27b8 4356 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4357 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4358 .module_name = "dib0700",
0ffd1ab3 4359 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4360 .allowed_protos = RC_PROTO_BIT_RC5 |
4361 RC_PROTO_BIT_RC6_MCE |
4362 RC_PROTO_BIT_NEC,
d8b4b582 4363 .change_protocol = dib0700_change_protocol,
f72a27b8 4364 },
6ca8f0b9
AC		 4365 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4366
4367 .num_adapters = 1,
4368 .adapter = {
4369 {
0fae1997 4370 DIB0700_NUM_FRONTENDS(1),
77eed219 4371 .fe = {{
f8731f4d
OG		 4372 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4373 .pid_filter_count = 32,
4374 .pid_filter = stk70x0p_pid_filter,
4375 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
6ca8f0b9
AC		 4376 .frontend_attach = stk7700ph_frontend_attach,
4377 .tuner_attach = stk7700ph_tuner_attach,
4378
4379 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4380 }},
6ca8f0b9
AC		 4381 },
4382 },
4383
430ae126 4384 .num_device_descs = 10,
6ca8f0b9
AC		 4385 .devices = {
4386 { "Terratec Cinergy HT USB XE",
4387 { &dib0700_usb_id_table[27], NULL },
4388 { NULL },
4389 },
4390 { "Pinnacle Expresscard 320cx",
4391 { &dib0700_usb_id_table[28], NULL },
4392 { NULL },
4393 },
4394 { "Terratec Cinergy HT Express",
4395 { &dib0700_usb_id_table[32], NULL },
4396 { NULL },
4397 },
17a370bc
FT		 4398 { "Gigabyte U8000-RH",
4399 { &dib0700_usb_id_table[37], NULL },
4400 { NULL },
4401 },
8751aaa6
DON		 4402 { "YUAN High-Tech STK7700PH",
4403 { &dib0700_usb_id_table[38], NULL },
4404 { NULL },
4405 },
5769743a
AC		 4406 { "Asus My Cinema-U3000Hybrid",
4407 { &dib0700_usb_id_table[39], NULL },
4408 { NULL },
4409 },
16ba1ee5
XL		 4410 { "YUAN High-Tech MC770",
4411 { &dib0700_usb_id_table[48], NULL },
4412 { NULL },
4413 },
f0f4ae76 4414 { "Leadtek WinFast DTV Dongle H",
4415 { &dib0700_usb_id_table[51], NULL },
4416 { NULL },
4417 },
c53d83cc
PH		 4418 { "YUAN High-Tech STK7700D",
4419 { &dib0700_usb_id_table[54], NULL },
4420 { NULL },
4421 },
430ae126
PO		 4422 { "Hama DVB=T Hybrid USB Stick",
4423 { &dib0700_usb_id_table[85], NULL },
4424 { NULL },
4425 },
6ca8f0b9 4426 },
f72a27b8 4427
72b39310 4428 .rc.core = {
f72a27b8 4429 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4430 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4431 .module_name = "dib0700",
0ffd1ab3 4432 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4433 .allowed_protos = RC_PROTO_BIT_RC5 |
4434 RC_PROTO_BIT_RC6_MCE |
4435 RC_PROTO_BIT_NEC,
d8b4b582 4436 .change_protocol = dib0700_change_protocol,
f72a27b8 4437 },
cb22cb52
DH		 4438 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4439 .num_adapters = 1,
4440 .adapter = {
4441 {
0fae1997 4442 DIB0700_NUM_FRONTENDS(1),
77eed219 4443 .fe = {{
cb22cb52
DH		 4444 .frontend_attach = s5h1411_frontend_attach,
4445 .tuner_attach = xc5000_tuner_attach,
4446
4447 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4448 }},
cb22cb52
DH		 4449 },
4450 },
4451
d2fc3bfc 4452 .num_device_descs = 2,
cb22cb52
DH		 4453 .devices = {
4454 { "Pinnacle PCTV HD Pro USB Stick",
4455 { &dib0700_usb_id_table[40], NULL },
4456 { NULL },
4457 },
d2fc3bfc
DH		 4458 { "Pinnacle PCTV HD USB Stick",
4459 { &dib0700_usb_id_table[41], NULL },
4460 { NULL },
4461 },
cb22cb52 4462 },
72b39310
MCC		 4463
4464 .rc.core = {
f72a27b8 4465 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4466 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4467 .module_name = "dib0700",
0ffd1ab3 4468 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4469 .allowed_protos = RC_PROTO_BIT_RC5 |
4470 RC_PROTO_BIT_RC6_MCE |
4471 RC_PROTO_BIT_NEC,
d8b4b582 4472 .change_protocol = dib0700_change_protocol,
f72a27b8 4473 },
ce904bcb
MK		 4474 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4475 .num_adapters = 1,
4476 .adapter = {
4477 {
0fae1997 4478 DIB0700_NUM_FRONTENDS(1),
77eed219 4479 .fe = {{
ce904bcb
MK		 4480 .frontend_attach = lgdt3305_frontend_attach,
4481 .tuner_attach = mxl5007t_tuner_attach,
4482
4483 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4484 }},
ce904bcb
MK		 4485 },
4486 },
4487
4488 .num_device_descs = 2,
4489 .devices = {
4490 { "Hauppauge ATSC MiniCard (B200)",
4491 { &dib0700_usb_id_table[46], NULL },
4492 { NULL },
4493 },
4494 { "Hauppauge ATSC MiniCard (B210)",
4495 { &dib0700_usb_id_table[47], NULL },
4496 { NULL },
4497 },
4498 },
d300bd69
OG		 4499 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4500
4501 .num_adapters = 1,
4502 .adapter = {
4503 {
0fae1997 4504 DIB0700_NUM_FRONTENDS(1),
77eed219 4505 .fe = {{
f8731f4d
OG		 4506 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4507 .pid_filter_count = 32,
4508 .pid_filter = stk70x0p_pid_filter,
4509 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
90e12cec 4510 .frontend_attach = stk7770p_frontend_attach,
d300bd69
OG		 4511 .tuner_attach = dib7770p_tuner_attach,
4512
4513 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4514 }},
d300bd69
OG		 4515 },
4516 },
4517
d1402307 4518 .num_device_descs = 4,
d300bd69
OG		 4519 .devices = {
4520 { "DiBcom STK7770P reference design",
4521 { &dib0700_usb_id_table[59], NULL },
4522 { NULL },
4523 },
1e13c8f0
PB		 4524 { "Terratec Cinergy T USB XXS (HD)/ T3",
4525 { &dib0700_usb_id_table[33],
4526 &dib0700_usb_id_table[52],
4527 &dib0700_usb_id_table[60], NULL},
db48138f
PB		 4528 { NULL },
4529 },
498e677c
LMF		 4530 { "TechniSat AirStar TeleStick 2",
4531 { &dib0700_usb_id_table[74], NULL },
4532 { NULL },
4533 },
d1402307
SE		 4534 { "Medion CTX1921 DVB-T USB",
4535 { &dib0700_usb_id_table[75], NULL },
4536 { NULL },
4537 },
d300bd69 4538 },
72b39310
MCC		 4539
4540 .rc.core = {
f72a27b8 4541 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4542 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4543 .module_name = "dib0700",
0ffd1ab3 4544 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4545 .allowed_protos = RC_PROTO_BIT_RC5 |
4546 RC_PROTO_BIT_RC6_MCE |
4547 RC_PROTO_BIT_NEC,
d8b4b582 4548 .change_protocol = dib0700_change_protocol,
f72a27b8 4549 },
ba3fe3a9
PB		 4550 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4551 .num_adapters = 1,
4552 .adapter = {
4553 {
0fae1997 4554 DIB0700_NUM_FRONTENDS(1),
77eed219 4555 .fe = {{
f8731f4d
OG		 4556 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4557 .pid_filter_count = 32,
03245a5e
OG		 4558 .pid_filter = stk80xx_pid_filter,
4559 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4560 .frontend_attach = stk807x_frontend_attach,
4561 .tuner_attach = dib807x_tuner_attach,
4562
4563 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4564 }},
ba3fe3a9
PB		 4565 },
4566 },
4567
8a378e85 4568 .num_device_descs = 3,
ba3fe3a9
PB		 4569 .devices = {
4570 { "DiBcom STK807xP reference design",
4571 { &dib0700_usb_id_table[62], NULL },
4572 { NULL },
4573 },
aaeab30f
MCC		 4574 { "Prolink Pixelview SBTVD",
4575 { &dib0700_usb_id_table[63], NULL },
4576 { NULL },
4577 },
8a378e85
F		 4578 { "EvolutePC TVWay+",
4579 { &dib0700_usb_id_table[64], NULL },
4580 { NULL },
4581 },
ba3fe3a9
PB		 4582 },
4583
72b39310 4584 .rc.core = {
f72a27b8 4585 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4586 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4587 .module_name = "dib0700",
0ffd1ab3 4588 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4589 .allowed_protos = RC_PROTO_BIT_RC5 |
4590 RC_PROTO_BIT_RC6_MCE |
4591 RC_PROTO_BIT_NEC,
d8b4b582 4592 .change_protocol = dib0700_change_protocol,
f72a27b8 4593 },
ba3fe3a9
PB		 4594 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4595 .num_adapters = 2,
4596 .adapter = {
4597 {
0fae1997 4598 DIB0700_NUM_FRONTENDS(1),
77eed219 4599 .fe = {{
f8731f4d
OG		 4600 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4601 .pid_filter_count = 32,
03245a5e
OG		 4602 .pid_filter = stk80xx_pid_filter,
4603 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4604 .frontend_attach = stk807xpvr_frontend_attach0,
4605 .tuner_attach = dib807x_tuner_attach,
4606
4607 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4608 }},
ba3fe3a9
PB		 4609 },
4610 {
0fae1997 4611 DIB0700_NUM_FRONTENDS(1),
77eed219 4612 .fe = {{
f8731f4d
OG		 4613 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4614 .pid_filter_count = 32,
03245a5e
OG		 4615 .pid_filter = stk80xx_pid_filter,
4616 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4617 .frontend_attach = stk807xpvr_frontend_attach1,
4618 .tuner_attach = dib807x_tuner_attach,
4619
4620 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4621 }},
ba3fe3a9
PB		 4622 },
4623 },
4624
4625 .num_device_descs = 1,
4626 .devices = {
4627 { "DiBcom STK807xPVR reference design",
4628 { &dib0700_usb_id_table[61], NULL },
4629 { NULL },
4630 },
4631 },
4632
72b39310 4633 .rc.core = {
f72a27b8 4634 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4635 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4636 .module_name = "dib0700",
0ffd1ab3 4637 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4638 .allowed_protos = RC_PROTO_BIT_RC5 |
4639 RC_PROTO_BIT_RC6_MCE |
4640 RC_PROTO_BIT_NEC,
d8b4b582 4641 .change_protocol = dib0700_change_protocol,
f72a27b8 4642 },
03245a5e
OG		 4643 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4644 .num_adapters = 1,
4645 .adapter = {
4646 {
0fae1997 4647 DIB0700_NUM_FRONTENDS(1),
77eed219 4648 .fe = {{
03245a5e
OG		 4649 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4650 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4651 .pid_filter_count = 32,
4652 .pid_filter = stk80xx_pid_filter,
4653 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4654 .frontend_attach = stk809x_frontend_attach,
4655 .tuner_attach = dib809x_tuner_attach,
4656
4657 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4658 }},
03245a5e
OG		 4659 },
4660 },
4661
4662 .num_device_descs = 1,
4663 .devices = {
4664 { "DiBcom STK8096GP reference design",
4665 { &dib0700_usb_id_table[67], NULL },
4666 { NULL },
4667 },
4668 },
4669
be9bae10
OG		 4670 .rc.core = {
4671 .rc_interval = DEFAULT_RC_INTERVAL,
4672 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4673 .module_name = "dib0700",
4674 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4675 .allowed_protos = RC_PROTO_BIT_RC5 |
4676 RC_PROTO_BIT_RC6_MCE |
4677 RC_PROTO_BIT_NEC,
be9bae10
OG		 4678 .change_protocol = dib0700_change_protocol,
4679 },
4680 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4681 .num_adapters = 1,
4682 .adapter = {
4683 {
0fae1997 4684 DIB0700_NUM_FRONTENDS(1),
77eed219 4685 .fe = {{
be9bae10
OG		 4686 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4687 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4688 .pid_filter_count = 32,
4689 .pid_filter = dib90x0_pid_filter,
4690 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4691 .frontend_attach = stk9090m_frontend_attach,
4692 .tuner_attach = dib9090_tuner_attach,
4693
4694 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4695 }},
be9bae10
OG		 4696 },
4697 },
4698
4699 .num_device_descs = 1,
4700 .devices = {
4701 { "DiBcom STK9090M reference design",
4702 { &dib0700_usb_id_table[69], NULL },
4703 { NULL },
4704 },
4705 },
4706
4707 .rc.core = {
4708 .rc_interval = DEFAULT_RC_INTERVAL,
4709 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4710 .module_name = "dib0700",
4711 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4712 .allowed_protos = RC_PROTO_BIT_RC5 |
4713 RC_PROTO_BIT_RC6_MCE |
4714 RC_PROTO_BIT_NEC,
be9bae10
OG		 4715 .change_protocol = dib0700_change_protocol,
4716 },
4717 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4718 .num_adapters = 1,
4719 .adapter = {
4720 {
0fae1997 4721 DIB0700_NUM_FRONTENDS(1),
77eed219 4722 .fe = {{
be9bae10
OG		 4723 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4724 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4725 .pid_filter_count = 32,
4726 .pid_filter = stk80xx_pid_filter,
4727 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4728 .frontend_attach = nim8096md_frontend_attach,
4729 .tuner_attach = nim8096md_tuner_attach,
4730
4731 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4732 }},
be9bae10
OG		 4733 },
4734 },
4735
4736 .num_device_descs = 1,
4737 .devices = {
4738 { "DiBcom NIM8096MD reference design",
4739 { &dib0700_usb_id_table[70], NULL },
4740 { NULL },
4741 },
4742 },
4743
4744 .rc.core = {
4745 .rc_interval = DEFAULT_RC_INTERVAL,
4746 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4747 .module_name = "dib0700",
4748 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4749 .allowed_protos = RC_PROTO_BIT_RC5 |
4750 RC_PROTO_BIT_RC6_MCE |
4751 RC_PROTO_BIT_NEC,
be9bae10
OG		 4752 .change_protocol = dib0700_change_protocol,
4753 },
4754 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4755 .num_adapters = 1,
4756 .adapter = {
4757 {
0fae1997 4758 DIB0700_NUM_FRONTENDS(1),
77eed219 4759 .fe = {{
be9bae10
OG		 4760 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4761 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4762 .pid_filter_count = 32,
4763 .pid_filter = dib90x0_pid_filter,
4764 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4765 .frontend_attach = nim9090md_frontend_attach,
4766 .tuner_attach = nim9090md_tuner_attach,
4767
4768 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4769 }},
be9bae10
OG		 4770 },
4771 },
4772
4773 .num_device_descs = 1,
4774 .devices = {
4775 { "DiBcom NIM9090MD reference design",
4776 { &dib0700_usb_id_table[71], NULL },
4777 { NULL },
4778 },
4779 },
4780
4781 .rc.core = {
4782 .rc_interval = DEFAULT_RC_INTERVAL,
4783 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4784 .module_name = "dib0700",
4785 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4786 .allowed_protos = RC_PROTO_BIT_RC5 |
4787 RC_PROTO_BIT_RC6_MCE |
4788 RC_PROTO_BIT_NEC,
be9bae10
OG		 4789 .change_protocol = dib0700_change_protocol,
4790 },
4791 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4792 .num_adapters = 1,
4793 .adapter = {
4794 {
0fae1997 4795 DIB0700_NUM_FRONTENDS(1),
77eed219 4796 .fe = {{
be9bae10
OG		 4797 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4798 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4799 .pid_filter_count = 32,
4800 .pid_filter = stk70x0p_pid_filter,
4801 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4802 .frontend_attach = nim7090_frontend_attach,
4803 .tuner_attach = nim7090_tuner_attach,
4804
4805 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4806 }},
be9bae10
OG		 4807 },
4808 },
4809
4810 .num_device_descs = 1,
4811 .devices = {
4812 { "DiBcom NIM7090 reference design",
4813 { &dib0700_usb_id_table[72], NULL },
4814 { NULL },
4815 },
4816 },
4817
4818 .rc.core = {
4819 .rc_interval = DEFAULT_RC_INTERVAL,
4820 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4821 .module_name = "dib0700",
4822 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4823 .allowed_protos = RC_PROTO_BIT_RC5 |
4824 RC_PROTO_BIT_RC6_MCE |
4825 RC_PROTO_BIT_NEC,
be9bae10
OG		 4826 .change_protocol = dib0700_change_protocol,
4827 },
4828 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4829 .num_adapters = 2,
4830 .adapter = {
4831 {
0fae1997 4832 DIB0700_NUM_FRONTENDS(1),
77eed219 4833 .fe = {{
be9bae10
OG		 4834 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4835 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4836 .pid_filter_count = 32,
4837 .pid_filter = stk70x0p_pid_filter,
4838 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4839 .frontend_attach = tfe7090pvr_frontend0_attach,
4840 .tuner_attach = tfe7090pvr_tuner0_attach,
4841
4842 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4843 }},
be9bae10
OG		 4844 },
4845 {
0fae1997 4846 DIB0700_NUM_FRONTENDS(1),
77eed219 4847 .fe = {{
be9bae10
OG		 4848 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4849 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4850 .pid_filter_count = 32,
4851 .pid_filter = stk70x0p_pid_filter,
4852 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4853 .frontend_attach = tfe7090pvr_frontend1_attach,
4854 .tuner_attach = tfe7090pvr_tuner1_attach,
4855
4856 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4857 }},
be9bae10
OG		 4858 },
4859 },
4860
4861 .num_device_descs = 1,
4862 .devices = {
4863 { "DiBcom TFE7090PVR reference design",
4864 { &dib0700_usb_id_table[73], NULL },
4865 { NULL },
4866 },
4867 },
4868
8d009a0c
DF		 4869 .rc.core = {
4870 .rc_interval = DEFAULT_RC_INTERVAL,
4871 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4872 .module_name = "dib0700",
4873 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4874 .allowed_protos = RC_PROTO_BIT_RC5 |
4875 RC_PROTO_BIT_RC6_MCE |
4876 RC_PROTO_BIT_NEC,
8d009a0c
DF		 4877 .change_protocol = dib0700_change_protocol,
4878 },
4879 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4880 .num_adapters = 1,
4881 .adapter = {
4882 {
0fae1997 4883 DIB0700_NUM_FRONTENDS(1),
77eed219 4884 .fe = {{
01f16263 4885 .frontend_attach = pctv340e_frontend_attach,
8d009a0c
DF		 4886 .tuner_attach = xc4000_tuner_attach,
4887
4888 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4889 }},
8d009a0c
DF		 4890 },
4891 },
4892
33fb1681 4893 .num_device_descs = 2,
8d009a0c
DF		 4894 .devices = {
4895 { "Pinnacle PCTV 340e HD Pro USB Stick",
4896 { &dib0700_usb_id_table[76], NULL },
4897 { NULL },
4898 },
33fb1681
DH		 4899 { "Pinnacle PCTV Hybrid Stick Solo",
4900 { &dib0700_usb_id_table[77], NULL },
4901 { NULL },
4902 },
8d009a0c 4903 },
6724a2f4
OG		 4904 .rc.core = {
4905 .rc_interval = DEFAULT_RC_INTERVAL,
4906 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4907 .module_name = "dib0700",
4908 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4909 .allowed_protos = RC_PROTO_BIT_RC5 |
4910 RC_PROTO_BIT_RC6_MCE |
4911 RC_PROTO_BIT_NEC,
6724a2f4
OG		 4912 .change_protocol = dib0700_change_protocol,
4913 },
4914 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4915 .num_adapters = 1,
4916 .adapter = {
4917 {
0fae1997 4918 DIB0700_NUM_FRONTENDS(1),
6724a2f4
OG		 4919 .fe = {{
4920 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4921 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4922 .pid_filter_count = 32,
4923 .pid_filter = stk70x0p_pid_filter,
4924 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
f45f513a
OG		 4925 .frontend_attach = tfe7790p_frontend_attach,
4926 .tuner_attach = tfe7790p_tuner_attach,
b293f304
OG		 4927
4928 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4929 } },
b293f304
OG		 4930 },
4931 },
4932
4933 .num_device_descs = 1,
4934 .devices = {
f45f513a
OG		 4935 { "DiBcom TFE7790P reference design",
4936 { &dib0700_usb_id_table[78], NULL },
b293f304
OG		 4937 { NULL },
4938 },
4939 },
4940
88f3a358
OG		 4941 .rc.core = {
4942 .rc_interval = DEFAULT_RC_INTERVAL,
4943 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4944 .module_name = "dib0700",
4945 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4946 .allowed_protos = RC_PROTO_BIT_RC5 |
4947 RC_PROTO_BIT_RC6_MCE |
4948 RC_PROTO_BIT_NEC,
88f3a358
OG		 4949 .change_protocol = dib0700_change_protocol,
4950 },
4951 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4952 .num_adapters = 1,
4953 .adapter = {
4954 {
0fae1997 4955 DIB0700_NUM_FRONTENDS(1),
88f3a358
OG		 4956 .fe = {{
4957 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4958 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4959 .pid_filter_count = 32,
4960 .pid_filter = stk80xx_pid_filter,
4961 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4962 .frontend_attach = tfe8096p_frontend_attach,
4963 .tuner_attach = tfe8096p_tuner_attach,
4964
4965 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4966
4967 } },
88f3a358
OG		 4968 },
4969 },
4970
4971 .num_device_descs = 1,
4972 .devices = {
4973 { "DiBcom TFE8096P reference design",
f45f513a 4974 { &dib0700_usb_id_table[79], NULL },
88f3a358
OG		 4975 { NULL },
4976 },
4977 },
4978
72b39310 4979 .rc.core = {
f72a27b8 4980 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4981 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4982 .module_name = "dib0700",
0ffd1ab3 4983 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4984 .allowed_protos = RC_PROTO_BIT_RC5 |
4985 RC_PROTO_BIT_RC6_MCE |
4986 RC_PROTO_BIT_NEC,
d8b4b582 4987 .change_protocol = dib0700_change_protocol,
f72a27b8 4988 },
91be260f
NS		 4989 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4990 .num_adapters = 2,
4991 .adapter = {
4992 {
4993 .num_frontends = 1,
4994 .fe = {{
4995 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4996 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4997 .pid_filter_count = 32,
4998 .pid_filter = stk80xx_pid_filter,
4999 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5000 .frontend_attach = stk809x_frontend_attach,
5001 .tuner_attach = dib809x_tuner_attach,
5002
5003 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
5004 } },
5005 .size_of_priv =
5006 sizeof(struct dib0700_adapter_state),
5007 }, {
5008 .num_frontends = 1,
5009 .fe = { {
5010 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5011 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5012 .pid_filter_count = 32,
5013 .pid_filter = stk80xx_pid_filter,
5014 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5015 .frontend_attach = stk809x_frontend1_attach,
5016 .tuner_attach = dib809x_tuner_attach,
5017
5018 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
5019 } },
5020 .size_of_priv =
5021 sizeof(struct dib0700_adapter_state),
5022 },
5023 },
5024 .num_device_descs = 1,
5025 .devices = {
5026 { "DiBcom STK8096-PVR reference design",
ec788795
AT		 5027 { &dib0700_usb_id_table[83],
5028 &dib0700_usb_id_table[84], NULL},
91be260f
NS		 5029 { NULL },
5030 },
5031 },
5032
5033 .rc.core = {
5034 .rc_interval = DEFAULT_RC_INTERVAL,
5035 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5036 .module_name = "dib0700",
5037 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5038 .allowed_protos = RC_PROTO_BIT_RC5 |
5039 RC_PROTO_BIT_RC6_MCE |
5040 RC_PROTO_BIT_NEC,
91be260f
NS		 5041 .change_protocol = dib0700_change_protocol,
5042 },
01373a5c 5043 },
b7f54910
PB		 5044};
5045
5046int dib0700_device_count = ARRAY_SIZE(dib0700_devices);
Linux 6.x block layer and io_uring tree(s)