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media: use strscpy() instead of strlcpy()
[linux-2.6-block.git] / drivers / media / usb / dvb-usb / dib0700_devices.c
CommitLineData
b7f54910
PB		 1/* Linux driver for devices based on the DiBcom DiB0700 USB bridge
2 *
3 * This program is free software; you can redistribute it and/or modify it
4 * under the terms of the GNU General Public License as published by the Free
5 * Software Foundation, version 2.
6 *
ba3fe3a9 7 * Copyright (C) 2005-9 DiBcom, SA et al
b7f54910
PB		 8 */
9#include "dib0700.h"
10
11#include "dib3000mc.h"
91bb9be6 12#include "dib7000m.h"
a75763ff 13#include "dib7000p.h"
ba3fe3a9 14#include "dib8000.h"
be9bae10 15#include "dib9000.h"
b7f54910 16#include "mt2060.h"
54d75eba 17#include "mt2266.h"
6ca8f0b9 18#include "tuner-xc2028.h"
cb22cb52 19#include "xc5000.h"
8d009a0c 20#include "xc4000.h"
cb22cb52 21#include "s5h1411.h"
01373a5c 22#include "dib0070.h"
03245a5e 23#include "dib0090.h"
ce904bcb
MK		 24#include "lgdt3305.h"
25#include "mxl5007t.h"
c4d84547
OS		 26#include "mn88472.h"
27#include "tda18250.h"
28
b7f54910 29
7fb3fc0c
PB		 30static int force_lna_activation;
31module_param(force_lna_activation, int, 0644);
f319ed91 32MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), if applicable for the device (default: 0=automatic/off).");
7fb3fc0c 33
01373a5c 34struct dib0700_adapter_state {
14d24d14 35 int (*set_param_save) (struct dvb_frontend *);
be9bae10 36 const struct firmware *frontend_firmware;
8abe4a0a 37 struct dib7000p_ops dib7000p_ops;
d44913c1 38 struct dib8000_ops dib8000_ops;
01373a5c
PB		 39};
40
41/* Hauppauge Nova-T 500 (aka Bristol)
b7f54910
PB		 42 * has a LNA on GPIO0 which is enabled by setting 1 */
43static struct mt2060_config bristol_mt2060_config[2] = {
44 {
45 .i2c_address = 0x60,
303cbeaa 46 .clock_out = 3,
b7f54910
PB		 47 }, {
48 .i2c_address = 0x61,
49 }
50};
51
99afb989 52
b7f54910
PB		 53static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
54 .band_caps = BAND_VHF | BAND_UHF,
01b4bf31 55 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
b7f54910 56
6958effe
PB		 57 .agc1_max = 42598,
58 .agc1_min = 17694,
59 .agc2_max = 45875,
60 .agc2_min = 0,
b7f54910 61
6958effe
PB		 62 .agc1_pt1 = 0,
63 .agc1_pt2 = 59,
b7f54910 64
6958effe
PB		 65 .agc1_slope1 = 0,
66 .agc1_slope2 = 69,
b7f54910
PB		 67
68 .agc2_pt1 = 0,
6958effe 69 .agc2_pt2 = 59,
b7f54910 70
6958effe
PB		 71 .agc2_slope1 = 111,
72 .agc2_slope2 = 28,
b7f54910
PB		 73};
74
75static struct dib3000mc_config bristol_dib3000mc_config[2] = {
76 { .agc = &bristol_dib3000p_mt2060_agc_config,
77 .max_time = 0x196,
78 .ln_adc_level = 0x1cc7,
79 .output_mpeg2_in_188_bytes = 1,
80 },
81 { .agc = &bristol_dib3000p_mt2060_agc_config,
82 .max_time = 0x196,
83 .ln_adc_level = 0x1cc7,
84 .output_mpeg2_in_188_bytes = 1,
85 }
86};
87
88static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
89{
6958effe 90 struct dib0700_state *st = adap->dev->priv;
b7f54910
PB		 91 if (adap->id == 0) {
92 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
93 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
94 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
95 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
96
7fb3fc0c
PB		 97 if (force_lna_activation)
98 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
99 else
100 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
6958effe 101
b7f54910
PB		 102 if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
103 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
104 return -ENODEV;
105 }
106 }
6958effe 107 st->mt2060_if1[adap->id] = 1220;
77eed219 108 return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
6958effe 109 (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
b7f54910
PB		 110}
111
4a2b1083 112static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
c52344fd
OD		 113{
114 struct i2c_msg msg[2] = {
115 { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
116 { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
117 };
118 if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
119 return 0;
120}
121
b7f54910
PB		 122static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
123{
c52344fd 124 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
77eed219 125 struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
c52344fd
OD		 126 s8 a;
127 int if1=1220;
da5ee486
AV		 128 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
129 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
c52344fd
OD		 130 if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
131 }
9a9677af
MK		 132 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
133 &bristol_mt2060_config[adap->id], if1) == NULL ?
134 -ENODEV : 0;
b7f54910
PB		 135}
136
01373a5c 137/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
54d75eba 138
b6884a17
PB		 139/* MT226x */
140static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
141 {
9c783036 142 BAND_UHF,
b6884a17
PB		 143
144 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
145 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 146 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
147 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
148
149 1130,
150 21,
151
152 0,
153 118,
154
155 0,
156 3530,
157 1,
158 0,
159
160 65535,
161 33770,
162 65535,
163 23592,
164
165 0,
166 62,
167 255,
168 64,
169 64,
170 132,
171 192,
172 80,
173 80,
174
175 17,
176 27,
177 23,
178 51,
179
180 1,
b6884a17 181 }, {
9c783036 182 BAND_VHF | BAND_LBAND,
b6884a17
PB		 183
184 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
185 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 186 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
187 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
188
189 2372,
190 21,
191
192 0,
193 118,
194
195 0,
196 3530,
197 1,
198 0,
199
200 65535,
201 0,
202 65535,
203 23592,
204
205 0,
206 128,
207 128,
208 128,
209 0,
210 128,
211 253,
212 81,
213 0,
214
215 17,
216 27,
217 23,
218 51,
219
220 1,
b6884a17 221 }
54d75eba
OD		 222};
223
224static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
09628b2c
MCC		 225 .internal = 60000,
226 .sampling = 30000,
227 .pll_prediv = 1,
228 .pll_ratio = 8,
229 .pll_range = 3,
230 .pll_reset = 1,
231 .pll_bypass = 0,
232 .enable_refdiv = 0,
233 .bypclk_div = 0,
234 .IO_CLK_en_core = 1,
235 .ADClkSrc = 1,
236 .modulo = 2,
237 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
238 .ifreq = 0,
239 .timf = 20452225,
54d75eba
OD		 240};
241
242static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
243 { .output_mpeg2_in_188_bytes = 1,
244 .hostbus_diversity = 1,
245 .tuner_is_baseband = 1,
246
b6884a17
PB		 247 .agc_config_count = 2,
248 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 249 .bw = &stk7700d_mt2266_pll_config,
250
b6884a17
PB		 251 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
252 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
253 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 254 },
255 { .output_mpeg2_in_188_bytes = 1,
256 .hostbus_diversity = 1,
257 .tuner_is_baseband = 1,
258
b6884a17
PB		 259 .agc_config_count = 2,
260 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 261 .bw = &stk7700d_mt2266_pll_config,
262
b6884a17
PB		 263 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
264 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
265 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 266 }
267};
268
269static struct mt2266_config stk7700d_mt2266_config[2] = {
270 { .i2c_address = 0x60
271 },
272 { .i2c_address = 0x60
273 }
274};
275
132c3188
DG		 276static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
277{
8abe4a0a
MCC		 278 struct dib0700_adapter_state *state = adap->priv;
279
280 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
281 return -ENODEV;
282
132c3188
DG		 283 if (adap->id == 0) {
284 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
285 msleep(10);
286 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
287 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
288 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
289 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
290 msleep(10);
291 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
292 msleep(10);
8abe4a0a 293 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7
DH		 294 stk7700d_dib7000p_mt2266_config)
295 != 0) {
8abe4a0a 296 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 297 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 298 return -ENODEV;
299 }
132c3188
DG		 300 }
301
8abe4a0a 302 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 303 0x80 + (adap->id << 1),
304 &stk7700d_dib7000p_mt2266_config[adap->id]);
132c3188 305
77eed219 306 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
132c3188
DG		 307}
308
54d75eba
OD		 309static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
310{
8abe4a0a
MCC		 311 struct dib0700_adapter_state *state = adap->priv;
312
313 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
314 return -ENODEV;
315
54d75eba
OD		 316 if (adap->id == 0) {
317 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
318 msleep(10);
319 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
320 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
321 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
322 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
323 msleep(10);
324 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
325 msleep(10);
326 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
8abe4a0a 327 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7
DH		 328 stk7700d_dib7000p_mt2266_config)
329 != 0) {
8abe4a0a 330 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 331 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 332 return -ENODEV;
333 }
54d75eba
OD		 334 }
335
8abe4a0a 336 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 337 0x80 + (adap->id << 1),
338 &stk7700d_dib7000p_mt2266_config[adap->id]);
54d75eba 339
77eed219 340 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
54d75eba
OD		 341}
342
343static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
344{
345 struct i2c_adapter *tun_i2c;
8abe4a0a
MCC		 346 struct dib0700_adapter_state *state = adap->priv;
347
348 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
349 DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 350 return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
1ebcad77 351 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
54d75eba
OD		 352}
353
6ca8f0b9 354/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
b1721d0d 355static struct dibx000_agc_config xc3028_agc_config = {
09628b2c 356 .band_caps = BAND_VHF | BAND_UHF,
6ca8f0b9
AC		 357 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
358 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
359 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 360 .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
361 .inv_gain = 712,
362 .time_stabiliz = 21,
363 .alpha_level = 0,
364 .thlock = 118,
365 .wbd_inv = 0,
366 .wbd_ref = 2867,
367 .wbd_sel = 0,
368 .wbd_alpha = 2,
369 .agc1_max = 0,
370 .agc1_min = 0,
371 .agc2_max = 39718,
372 .agc2_min = 9930,
373 .agc1_pt1 = 0,
374 .agc1_pt2 = 0,
375 .agc1_pt3 = 0,
376 .agc1_slope1 = 0,
377 .agc1_slope2 = 0,
378 .agc2_pt1 = 0,
379 .agc2_pt2 = 128,
380 .agc2_slope1 = 29,
381 .agc2_slope2 = 29,
382 .alpha_mant = 17,
383 .alpha_exp = 27,
384 .beta_mant = 23,
385 .beta_exp = 51,
386 .perform_agc_softsplit = 1,
6ca8f0b9
AC		 387};
388
389/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
b1721d0d 390static struct dibx000_bandwidth_config xc3028_bw_config = {
09628b2c
MCC		 391 .internal = 60000,
392 .sampling = 30000,
393 .pll_prediv = 1,
394 .pll_ratio = 8,
395 .pll_range = 3,
396 .pll_reset = 1,
397 .pll_bypass = 0,
398 .enable_refdiv = 0,
399 .bypclk_div = 0,
400 .IO_CLK_en_core = 1,
401 .ADClkSrc = 1,
402 .modulo = 0,
403 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
404 .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
405 .timf = 20452225,
406 .xtal_hz = 30000000,
6ca8f0b9
AC		 407};
408
409static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
410 .output_mpeg2_in_188_bytes = 1,
411 .tuner_is_baseband = 1,
412
413 .agc_config_count = 1,
414 .agc = &xc3028_agc_config,
415 .bw = &xc3028_bw_config,
416
417 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
418 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
419 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
420};
421
d7cba043
MK		 422static int stk7700ph_xc3028_callback(void *ptr, int component,
423 int command, int arg)
6ca8f0b9
AC		 424{
425 struct dvb_usb_adapter *adap = ptr;
8abe4a0a 426 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9
AC		 427
428 switch (command) {
429 case XC2028_TUNER_RESET:
430 /* Send the tuner in then out of reset */
8abe4a0a
MCC		 431 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
432 msleep(10);
433 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6ca8f0b9
AC		 434 break;
435 case XC2028_RESET_CLK:
9893b905 436 case XC2028_I2C_FLUSH:
6ca8f0b9
AC		 437 break;
438 default:
439 err("%s: unknown command %d, arg %d\n", __func__,
440 command, arg);
441 return -EINVAL;
442 }
443 return 0;
444}
445
446static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
447 .fname = XC2028_DEFAULT_FIRMWARE,
448 .max_len = 64,
449 .demod = XC3028_FE_DIBCOM52,
450};
451
452static struct xc2028_config stk7700ph_xc3028_config = {
453 .i2c_addr = 0x61,
6ca8f0b9
AC		 454 .ctrl = &stk7700ph_xc3028_ctrl,
455};
456
457static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
458{
459 struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 460 struct dib0700_adapter_state *state = adap->priv;
461
462 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
463 return -ENODEV;
6ca8f0b9 464
da5ee486
AV		 465 if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
466 desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
8abe4a0a 467 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 468 else
8abe4a0a 469 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
6ca8f0b9
AC		 470 msleep(20);
471 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
472 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
473 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
474 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
475 msleep(10);
476 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
477 msleep(20);
478 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
479 msleep(10);
480
8abe4a0a 481 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 482 &stk7700ph_dib7700_xc3028_config) != 0) {
8abe4a0a 483 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 484 __func__);
eb0c1994 485 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 486 return -ENODEV;
487 }
6ca8f0b9 488
8abe4a0a 489 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9
AC		 490 &stk7700ph_dib7700_xc3028_config);
491
77eed219 492 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
6ca8f0b9
AC		 493}
494
495static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
496{
497 struct i2c_adapter *tun_i2c;
8abe4a0a 498 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9 499
8abe4a0a 500 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
6ca8f0b9
AC		 501 DIBX000_I2C_INTERFACE_TUNER, 1);
502
503 stk7700ph_xc3028_config.i2c_adap = tun_i2c;
d7cba043
MK		 504
505 /* FIXME: generalize & move to common area */
77eed219 506 adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
6ca8f0b9 507
77eed219 508 return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
6ca8f0b9
AC		 509 == NULL ? -ENODEV : 0;
510}
511
4b330bee 512#define DEFAULT_RC_INTERVAL 50
54d75eba 513
72b39310
MCC		 514/*
515 * This function is used only when firmware is < 1.20 version. Newer
516 * firmwares use bulk mode, with functions implemented at dib0700_core,
517 * at dib0700_rc_urb_completion()
518 */
519static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
54d75eba 520{
6d741bfe 521 enum rc_proto protocol;
120703f9 522 u32 scancode;
72b39310 523 u8 toggle;
54d75eba 524 int i;
54d75eba 525 struct dib0700_state *st = d->priv;
6a207100 526
6a207100
DH		 527 if (st->fw_version >= 0x10200) {
528 /* For 1.20 firmware , We need to keep the RC polling
529 callback so we can reuse the input device setup in
530 dvb-usb-remote.c. However, the actual work is being done
531 in the bulk URB completion handler. */
532 return 0;
533 }
534
bd1f976c
MCC		 535 st->buf[0] = REQUEST_POLL_RC;
536 st->buf[1] = 0;
537
538 i = dib0700_ctrl_rd(d, st->buf, 2, st->buf, 4);
72b39310 539 if (i <= 0) {
034d65ed 540 err("RC Query Failed");
bd1f976c 541 return -EIO;
54d75eba 542 }
58e6f95e
PB		 543
544 /* losing half of KEY_0 events from Philipps rc5 remotes.. */
bd1f976c
MCC		 545 if (st->buf[0] == 0 && st->buf[1] == 0
546 && st->buf[2] == 0 && st->buf[3] == 0)
72b39310 547 return 0;
58e6f95e 548
bd1f976c 549 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)st->buf[3 - 2],(int)st->buf[3 - 3],(int)st->buf[3 - 1],(int)st->buf[3]); */
58e6f95e 550
c4018fa2 551 dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
58e6f95e 552
0ffd1ab3 553 switch (d->props.rc.core.protocol) {
6d741bfe 554 case RC_PROTO_BIT_NEC:
58e6f95e 555 /* NEC protocol sends repeat code as 0 0 0 FF */
bd1f976c
MCC		 556 if ((st->buf[3 - 2] == 0x00) && (st->buf[3 - 3] == 0x00) &&
557 (st->buf[3] == 0xff)) {
120703f9
DH		 558 rc_repeat(d->rc_dev);
559 return 0;
58e6f95e 560 }
72b39310 561
6d741bfe 562 protocol = RC_PROTO_NEC;
bd1f976c 563 scancode = RC_SCANCODE_NEC(st->buf[3 - 2], st->buf[3 - 3]);
120703f9 564 toggle = 0;
58e6f95e 565 break;
120703f9 566
72b39310 567 default:
58e6f95e 568 /* RC-5 protocol changes toggle bit on new keypress */
6d741bfe 569 protocol = RC_PROTO_RC5;
bd1f976c
MCC		 570 scancode = RC_SCANCODE_RC5(st->buf[3 - 2], st->buf[3 - 3]);
571 toggle = st->buf[3 - 1];
58e6f95e
PB		 572 break;
573 }
120703f9
DH		 574
575 rc_keydown(d->rc_dev, protocol, scancode, toggle);
54d75eba
OD		 576 return 0;
577}
578
b7f54910 579/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
a75763ff 580static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
9c783036 581 BAND_UHF | BAND_VHF,
69ea31e7
PB		 582
583 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
584 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 585 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
586 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
587
588 712,
589 41,
590
591 0,
592 118,
593
594 0,
595 4095,
596 0,
597 0,
598
599 42598,
600 17694,
601 45875,
602 2621,
603 0,
604 76,
605 139,
606 52,
607 59,
608 107,
609 172,
610 57,
611 70,
612
613 21,
614 25,
615 28,
616 48,
617
618 1,
619 { 0,
620 107,
621 51800,
622 24700
69ea31e7
PB		 623 },
624};
625
a75763ff 626static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
09628b2c 627 .band_caps = BAND_UHF | BAND_VHF,
a75763ff
PB		 628 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
629 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 630 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
631 .inv_gain = 712,
632 .time_stabiliz = 41,
633 .alpha_level = 0,
634 .thlock = 118,
635 .wbd_inv = 0,
636 .wbd_ref = 4095,
637 .wbd_sel = 0,
638 .wbd_alpha = 0,
639 .agc1_max = 42598,
640 .agc1_min = 16384,
641 .agc2_max = 42598,
642 .agc2_min = 0,
643 .agc1_pt1 = 0,
644 .agc1_pt2 = 137,
645 .agc1_pt3 = 255,
646 .agc1_slope1 = 0,
647 .agc1_slope2 = 255,
648 .agc2_pt1 = 0,
649 .agc2_pt2 = 0,
650 .agc2_slope1 = 0,
651 .agc2_slope2 = 41,
652 .alpha_mant = 15,
653 .alpha_exp = 25,
654 .beta_mant = 28,
655 .beta_exp = 48,
656 .perform_agc_softsplit = 0,
a75763ff
PB		 657};
658
659static struct dibx000_bandwidth_config stk7700p_pll_config = {
09628b2c
MCC		 660 .internal = 60000,
661 .sampling = 30000,
662 .pll_prediv = 1,
663 .pll_ratio = 8,
664 .pll_range = 3,
665 .pll_reset = 1,
666 .pll_bypass = 0,
667 .enable_refdiv = 0,
668 .bypclk_div = 0,
669 .IO_CLK_en_core = 1,
670 .ADClkSrc = 1,
671 .modulo = 0,
672 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
673 .ifreq = 60258167,
674 .timf = 20452225,
675 .xtal_hz = 30000000,
69ea31e7
PB		 676};
677
678static struct dib7000m_config stk7700p_dib7000m_config = {
679 .dvbt_mode = 1,
680 .output_mpeg2_in_188_bytes = 1,
681 .quartz_direct = 1,
682
683 .agc_config_count = 1,
a75763ff
PB		 684 .agc = &stk7700p_7000m_mt2060_agc_config,
685 .bw = &stk7700p_pll_config,
686
687 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
688 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
689 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
690};
691
692static struct dib7000p_config stk7700p_dib7000p_config = {
693 .output_mpeg2_in_188_bytes = 1,
694
b6884a17 695 .agc_config_count = 1,
a75763ff
PB		 696 .agc = &stk7700p_7000p_mt2060_agc_config,
697 .bw = &stk7700p_pll_config,
69ea31e7
PB		 698
699 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
700 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
701 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
b7f54910
PB		 702};
703
704static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
705{
69ea31e7 706 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 707 struct dib0700_adapter_state *state = adap->priv;
708
709 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
710 return -ENODEV;
711
b7f54910 712 /* unless there is no real power management in DVB - we leave the device on GPIO6 */
a75763ff
PB		 713
714 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
715 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
716
69ea31e7 717 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
a75763ff
PB		 718 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
719
b7f54910 720 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
a75763ff
PB		 721 dib0700_ctrl_clock(adap->dev, 72, 1);
722 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
723
724 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
b7f54910 725
69ea31e7 726 st->mt2060_if1[0] = 1220;
a75763ff 727
8abe4a0a
MCC		 728 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
729 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
a75763ff 730 st->is_dib7000pc = 1;
8abe4a0a 731 } else {
8abe4a0a 732 memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
77eed219 733 adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
8abe4a0a 734 }
a75763ff 735
77eed219 736 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
b7f54910
PB		 737}
738
69ea31e7
PB		 739static struct mt2060_config stk7700p_mt2060_config = {
740 0x60
741};
742
b7f54910
PB		 743static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
744{
c52344fd 745 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
69ea31e7 746 struct dib0700_state *st = adap->dev->priv;
a75763ff 747 struct i2c_adapter *tun_i2c;
8abe4a0a 748 struct dib0700_adapter_state *state = adap->priv;
c52344fd
OD		 749 s8 a;
750 int if1=1220;
8abe4a0a 751
da5ee486
AV		 752 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
753 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
c52344fd
OD		 754 if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
755 }
a75763ff 756 if (st->is_dib7000pc)
8abe4a0a 757 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 758 else
77eed219 759 tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 760
77eed219 761 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
c52344fd 762 if1) == NULL ? -ENODEV : 0;
b7f54910
PB		 763}
764
01373a5c
PB		 765/* DIB7070 generic */
766static struct dibx000_agc_config dib7070_agc_config = {
09628b2c 767 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
01373a5c
PB		 768 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
769 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
09628b2c
MCC		 770 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
771 .inv_gain = 600,
772 .time_stabiliz = 10,
773 .alpha_level = 0,
774 .thlock = 118,
775 .wbd_inv = 0,
776 .wbd_ref = 3530,
777 .wbd_sel = 1,
778 .wbd_alpha = 5,
779 .agc1_max = 65535,
780 .agc1_min = 0,
781 .agc2_max = 65535,
782 .agc2_min = 0,
783 .agc1_pt1 = 0,
784 .agc1_pt2 = 40,
785 .agc1_pt3 = 183,
786 .agc1_slope1 = 206,
787 .agc1_slope2 = 255,
788 .agc2_pt1 = 72,
789 .agc2_pt2 = 152,
790 .agc2_slope1 = 88,
791 .agc2_slope2 = 90,
792 .alpha_mant = 17,
793 .alpha_exp = 27,
794 .beta_mant = 23,
795 .beta_exp = 51,
796 .perform_agc_softsplit = 0,
01373a5c
PB		 797};
798
799static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
800{
8abe4a0a
MCC		 801 struct dvb_usb_adapter *adap = fe->dvb->priv;
802 struct dib0700_adapter_state *state = adap->priv;
803
7e5ce651 804 deb_info("reset: %d", onoff);
8abe4a0a 805 return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
01373a5c
PB		 806}
807
808static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
809{
8abe4a0a
MCC		 810 struct dvb_usb_adapter *adap = fe->dvb->priv;
811 struct dib0700_adapter_state *state = adap->priv;
812
7e5ce651 813 deb_info("sleep: %d", onoff);
8abe4a0a 814 return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
01373a5c
PB		 815}
816
817static struct dib0070_config dib7070p_dib0070_config[2] = {
818 {
819 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
820 .reset = dib7070_tuner_reset,
821 .sleep = dib7070_tuner_sleep,
822 .clock_khz = 12000,
7e5ce651
PB		 823 .clock_pad_drive = 4,
824 .charge_pump = 2,
01373a5c
PB		 825 }, {
826 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
827 .reset = dib7070_tuner_reset,
828 .sleep = dib7070_tuner_sleep,
829 .clock_khz = 12000,
7e5ce651 830 .charge_pump = 2,
01373a5c
PB		 831 }
832};
833
d300bd69
OG		 834static struct dib0070_config dib7770p_dib0070_config = {
835 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
836 .reset = dib7070_tuner_reset,
837 .sleep = dib7070_tuner_sleep,
838 .clock_khz = 12000,
839 .clock_pad_drive = 0,
840 .flip_chip = 1,
eac1fe10 841 .charge_pump = 2,
d300bd69
OG		 842};
843
14d24d14 844static int dib7070_set_param_override(struct dvb_frontend *fe)
01373a5c 845{
47b163af 846 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
01373a5c
PB		 847 struct dvb_usb_adapter *adap = fe->dvb->priv;
848 struct dib0700_adapter_state *state = adap->priv;
849
850 u16 offset;
47b163af 851 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
01373a5c
PB		 852 switch (band) {
853 case BAND_VHF: offset = 950; break;
854 case BAND_UHF:
855 default: offset = 550; break;
856 }
857 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
8abe4a0a 858 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
14d24d14 859 return state->set_param_save(fe);
01373a5c
PB		 860}
861
14d24d14 862static int dib7770_set_param_override(struct dvb_frontend *fe)
d300bd69 863{
47b163af
MCC		 864 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
865 struct dvb_usb_adapter *adap = fe->dvb->priv;
866 struct dib0700_adapter_state *state = adap->priv;
d300bd69 867
316c46b8
MCC		 868 u16 offset;
869 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
870 switch (band) {
871 case BAND_VHF:
872 state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
873 offset = 850;
874 break;
875 case BAND_UHF:
876 default:
877 state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
878 offset = 250;
879 break;
880 }
881 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
882 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
883 return state->set_param_save(fe);
d300bd69
OG		 884}
885
886static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
887{
8abe4a0a
MCC		 888 struct dib0700_adapter_state *st = adap->priv;
889 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
d300bd69
OG		 890 DIBX000_I2C_INTERFACE_TUNER, 1);
891
8abe4a0a
MCC		 892 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
893 &dib7770p_dib0070_config) == NULL)
894 return -ENODEV;
d300bd69 895
8abe4a0a
MCC		 896 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
897 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
898 return 0;
d300bd69
OG		 899}
900
01373a5c
PB		 901static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
902{
903 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a 904 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
01373a5c
PB		 905
906 if (adap->id == 0) {
77eed219 907 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
01373a5c
PB		 908 return -ENODEV;
909 } else {
77eed219 910 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
01373a5c
PB		 911 return -ENODEV;
912 }
913
77eed219
MK		 914 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
915 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
01373a5c
PB		 916 return 0;
917}
918
e192a7cf
OG		 919static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
920 u16 pid, int onoff)
921{
8abe4a0a 922 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 923 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 924
e192a7cf 925 if (st->is_dib7000pc)
8abe4a0a 926 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
77eed219 927 return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
e192a7cf
OG		 928}
929
930static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
931{
932 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 933 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 934 if (st->is_dib7000pc)
8abe4a0a 935 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
77eed219 936 return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
e192a7cf
OG		 937}
938
f8731f4d
OG		 939static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
940{
8abe4a0a
MCC		 941 struct dib0700_adapter_state *state = adapter->priv;
942 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 943}
944
945static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
946{
8abe4a0a
MCC		 947 struct dib0700_adapter_state *state = adapter->priv;
948 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d
OG		 949}
950
01373a5c 951static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
09628b2c
MCC		 952 .internal = 60000,
953 .sampling = 15000,
954 .pll_prediv = 1,
955 .pll_ratio = 20,
956 .pll_range = 3,
957 .pll_reset = 1,
958 .pll_bypass = 0,
959 .enable_refdiv = 0,
960 .bypclk_div = 0,
961 .IO_CLK_en_core = 1,
962 .ADClkSrc = 1,
963 .modulo = 2,
964 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
965 .ifreq = (0 << 25) | 0,
966 .timf = 20452225,
967 .xtal_hz = 12000000,
01373a5c
PB		 968};
969
970static struct dib7000p_config dib7070p_dib7000p_config = {
971 .output_mpeg2_in_188_bytes = 1,
972
973 .agc_config_count = 1,
974 .agc = &dib7070_agc_config,
975 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 976 .tuner_is_baseband = 1,
977 .spur_protect = 1,
01373a5c
PB		 978
979 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
980 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
981 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
982
983 .hostbus_diversity = 1,
984};
985
986/* STK7070P */
987static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
988{
da5ee486 989 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 990 struct dib0700_adapter_state *state = adap->priv;
991
992 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
993 return -ENODEV;
994
da5ee486
AV		 995 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
996 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
997 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 998 else
da5ee486 999 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
01373a5c
PB		 1000 msleep(10);
1001 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1002 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1003 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1004 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1005
1006 dib0700_ctrl_clock(adap->dev, 72, 1);
1007
1008 msleep(10);
1009 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1010 msleep(10);
1011 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1012
8abe4a0a 1013 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 1014 &dib7070p_dib7000p_config) != 0) {
8abe4a0a 1015 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 1016 __func__);
eb0c1994 1017 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 1018 return -ENODEV;
1019 }
01373a5c 1020
8abe4a0a 1021 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9 1022 &dib7070p_dib7000p_config);
77eed219 1023 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 1024}
1025
90e12cec
OG		 1026/* STK7770P */
1027static struct dib7000p_config dib7770p_dib7000p_config = {
1028 .output_mpeg2_in_188_bytes = 1,
1029
1030 .agc_config_count = 1,
1031 .agc = &dib7070_agc_config,
1032 .bw = &dib7070_bw_config_12_mhz,
1033 .tuner_is_baseband = 1,
1034 .spur_protect = 1,
1035
1036 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
1037 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
1038 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1039
1040 .hostbus_diversity = 1,
1041 .enable_current_mirror = 1,
970d14c6 1042 .disable_sample_and_hold = 0,
90e12cec
OG		 1043};
1044
1045static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
1046{
1047 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 1048 struct dib0700_adapter_state *state = adap->priv;
1049
1050 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
1051 return -ENODEV;
1052
90e12cec
OG		 1053 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
1054 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
1055 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1056 else
1057 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1058 msleep(10);
1059 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1060 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1061 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1062 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1063
1064 dib0700_ctrl_clock(adap->dev, 72, 1);
1065
1066 msleep(10);
1067 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1068 msleep(10);
1069 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1070
8abe4a0a 1071 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
90e12cec 1072 &dib7770p_dib7000p_config) != 0) {
8abe4a0a 1073 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
90e12cec 1074 __func__);
eb0c1994 1075 dvb_detach(state->dib7000p_ops.set_wbd_ref);
90e12cec
OG		 1076 return -ENODEV;
1077 }
1078
8abe4a0a 1079 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
90e12cec 1080 &dib7770p_dib7000p_config);
77eed219 1081 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
90e12cec
OG		 1082}
1083
ba3fe3a9
PB		 1084/* DIB807x generic */
1085static struct dibx000_agc_config dib807x_agc_config[2] = {
1086 {
1087 BAND_VHF,
1088 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1089 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1090 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
1091 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1092 * P_agc_write=0 */
1093 (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
1094 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1095 (0 << 0), /* setup*/
1096
1097 600, /* inv_gain*/
1098 10, /* time_stabiliz*/
1099
1100 0, /* alpha_level*/
1101 118, /* thlock*/
1102
1103 0, /* wbd_inv*/
1104 3530, /* wbd_ref*/
1105 1, /* wbd_sel*/
1106 5, /* wbd_alpha*/
1107
1108 65535, /* agc1_max*/
1109 0, /* agc1_min*/
1110
1111 65535, /* agc2_max*/
1112 0, /* agc2_min*/
1113
1114 0, /* agc1_pt1*/
1115 40, /* agc1_pt2*/
1116 183, /* agc1_pt3*/
1117 206, /* agc1_slope1*/
1118 255, /* agc1_slope2*/
1119 72, /* agc2_pt1*/
1120 152, /* agc2_pt2*/
1121 88, /* agc2_slope1*/
1122 90, /* agc2_slope2*/
1123
1124 17, /* alpha_mant*/
1125 27, /* alpha_exp*/
1126 23, /* beta_mant*/
1127 51, /* beta_exp*/
1128
1129 0, /* perform_agc_softsplit*/
1130 }, {
1131 BAND_UHF,
1132 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1133 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1134 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1135 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1136 * P_agc_write=0 */
1137 (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
1138 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1139 (0 << 0), /* setup */
1140
1141 600, /* inv_gain*/
1142 10, /* time_stabiliz*/
1143
1144 0, /* alpha_level*/
1145 118, /* thlock*/
1146
1147 0, /* wbd_inv*/
1148 3530, /* wbd_ref*/
1149 1, /* wbd_sel*/
1150 5, /* wbd_alpha*/
1151
1152 65535, /* agc1_max*/
1153 0, /* agc1_min*/
1154
1155 65535, /* agc2_max*/
1156 0, /* agc2_min*/
1157
1158 0, /* agc1_pt1*/
1159 40, /* agc1_pt2*/
1160 183, /* agc1_pt3*/
1161 206, /* agc1_slope1*/
1162 255, /* agc1_slope2*/
1163 72, /* agc2_pt1*/
1164 152, /* agc2_pt2*/
1165 88, /* agc2_slope1*/
1166 90, /* agc2_slope2*/
1167
1168 17, /* alpha_mant*/
1169 27, /* alpha_exp*/
1170 23, /* beta_mant*/
1171 51, /* beta_exp*/
1172
1173 0, /* perform_agc_softsplit*/
1174 }
1175};
1176
1177static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
09628b2c
MCC		 1178 .internal = 60000,
1179 .sampling = 15000,
1180 .pll_prediv = 1,
1181 .pll_ratio = 20,
1182 .pll_range = 3,
1183 .pll_reset = 1,
1184 .pll_bypass = 0,
1185 .enable_refdiv = 0,
1186 .bypclk_div = 0,
1187 .IO_CLK_en_core = 1,
1188 .ADClkSrc = 1,
1189 .modulo = 2,
1190 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
1191 .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
1192 .timf = 18179755,
1193 .xtal_hz = 12000000,
ba3fe3a9
PB		 1194};
1195
1196static struct dib8000_config dib807x_dib8000_config[2] = {
1197 {
1198 .output_mpeg2_in_188_bytes = 1,
1199
1200 .agc_config_count = 2,
1201 .agc = dib807x_agc_config,
1202 .pll = &dib807x_bw_config_12_mhz,
1203 .tuner_is_baseband = 1,
1204
1205 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1206 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1207 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1208
1209 .hostbus_diversity = 1,
1210 .div_cfg = 1,
1211 .agc_control = &dib0070_ctrl_agc_filter,
1212 .output_mode = OUTMODE_MPEG2_FIFO,
1213 .drives = 0x2d98,
1214 }, {
1215 .output_mpeg2_in_188_bytes = 1,
1216
1217 .agc_config_count = 2,
1218 .agc = dib807x_agc_config,
1219 .pll = &dib807x_bw_config_12_mhz,
1220 .tuner_is_baseband = 1,
1221
1222 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1223 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1224 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1225
1226 .hostbus_diversity = 1,
1227 .agc_control = &dib0070_ctrl_agc_filter,
1228 .output_mode = OUTMODE_MPEG2_FIFO,
1229 .drives = 0x2d98,
1230 }
1231};
1232
03245a5e 1233static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1234{
d44913c1
MCC		 1235 struct dvb_usb_adapter *adap = fe->dvb->priv;
1236 struct dib0700_adapter_state *state = adap->priv;
1237
1238 return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
ba3fe3a9
PB		 1239}
1240
03245a5e 1241static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1242{
d44913c1
MCC		 1243 struct dvb_usb_adapter *adap = fe->dvb->priv;
1244 struct dib0700_adapter_state *state = adap->priv;
1245
1246 return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
ba3fe3a9
PB		 1247}
1248
1249static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
1250 { 240, 7},
1251 { 0xffff, 6},
1252};
1253
1254static struct dib0070_config dib807x_dib0070_config[2] = {
1255 {
1256 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1257 .reset = dib80xx_tuner_reset,
1258 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1259 .clock_khz = 12000,
1260 .clock_pad_drive = 4,
1261 .vga_filter = 1,
1262 .force_crystal_mode = 1,
1263 .enable_third_order_filter = 1,
1264 .charge_pump = 0,
1265 .wbd_gain = dib8070_wbd_gain_cfg,
1266 .osc_buffer_state = 0,
1267 .freq_offset_khz_uhf = -100,
1268 .freq_offset_khz_vhf = -100,
1269 }, {
1270 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1271 .reset = dib80xx_tuner_reset,
1272 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1273 .clock_khz = 12000,
1274 .clock_pad_drive = 2,
1275 .vga_filter = 1,
1276 .force_crystal_mode = 1,
1277 .enable_third_order_filter = 1,
1278 .charge_pump = 0,
1279 .wbd_gain = dib8070_wbd_gain_cfg,
1280 .osc_buffer_state = 0,
1281 .freq_offset_khz_uhf = -25,
1282 .freq_offset_khz_vhf = -25,
1283 }
1284};
1285
14d24d14 1286static int dib807x_set_param_override(struct dvb_frontend *fe)
ba3fe3a9 1287{
47b163af 1288 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
ba3fe3a9
PB		 1289 struct dvb_usb_adapter *adap = fe->dvb->priv;
1290 struct dib0700_adapter_state *state = adap->priv;
1291
1292 u16 offset = dib0070_wbd_offset(fe);
47b163af 1293 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
ba3fe3a9
PB		 1294 switch (band) {
1295 case BAND_VHF:
1296 offset += 750;
1297 break;
1298 case BAND_UHF: /* fall-thru wanted */
1299 default:
1300 offset += 250; break;
1301 }
1302 deb_info("WBD for DiB8000: %d\n", offset);
d44913c1 1303 state->dib8000_ops.set_wbd_ref(fe, offset);
ba3fe3a9 1304
14d24d14 1305 return state->set_param_save(fe);
ba3fe3a9
PB		 1306}
1307
1308static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
1309{
1310 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1311 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
ba3fe3a9
PB		 1312 DIBX000_I2C_INTERFACE_TUNER, 1);
1313
1314 if (adap->id == 0) {
77eed219 1315 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1316 &dib807x_dib0070_config[0]) == NULL)
1317 return -ENODEV;
1318 } else {
77eed219 1319 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1320 &dib807x_dib0070_config[1]) == NULL)
1321 return -ENODEV;
1322 }
1323
77eed219
MK		 1324 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1325 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
ba3fe3a9
PB		 1326 return 0;
1327}
1328
9c783036
OG		 1329static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
1330 u16 pid, int onoff)
f8731f4d 1331{
d44913c1
MCC		 1332 struct dib0700_adapter_state *state = adapter->priv;
1333
1334 return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 1335}
1336
9c783036 1337static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
be9bae10 1338 int onoff)
f8731f4d 1339{
d44913c1
MCC		 1340 struct dib0700_adapter_state *state = adapter->priv;
1341
1342 return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d 1343}
ba3fe3a9
PB		 1344
1345/* STK807x */
1346static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
1347{
d44913c1
MCC		 1348 struct dib0700_adapter_state *state = adap->priv;
1349
1350 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1351 return -ENODEV;
1352
ba3fe3a9
PB		 1353 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1354 msleep(10);
1355 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1356 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1357 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1358
1359 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1360
1361 dib0700_ctrl_clock(adap->dev, 72, 1);
1362
1363 msleep(10);
1364 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1365 msleep(10);
1366 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1367
d44913c1 1368 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
0c32dbd7 1369 0x80, 0);
ba3fe3a9 1370
d44913c1 1371 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1372 &dib807x_dib8000_config[0]);
1373
77eed219 1374 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1375}
1376
1377/* STK807xPVR */
1378static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
1379{
d44913c1
MCC		 1380 struct dib0700_adapter_state *state = adap->priv;
1381
1382 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1383 return -ENODEV;
1384
ba3fe3a9
PB		 1385 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1386 msleep(30);
1387 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1388 msleep(500);
1389 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1390 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1391 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1392
1393 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1394
1395 dib0700_ctrl_clock(adap->dev, 72, 1);
1396
1397 msleep(10);
1398 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1399 msleep(10);
1400 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1401
1402 /* initialize IC 0 */
d44913c1 1403 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
ba3fe3a9 1404
d44913c1 1405 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1406 &dib807x_dib8000_config[0]);
1407
77eed219 1408 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1409}
1410
1411static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
1412{
d44913c1
MCC		 1413 struct dib0700_adapter_state *state = adap->priv;
1414
1415 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1416 return -ENODEV;
1417
ba3fe3a9 1418 /* initialize IC 1 */
d44913c1 1419 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
ba3fe3a9 1420
d44913c1 1421 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
ba3fe3a9
PB		 1422 &dib807x_dib8000_config[1]);
1423
77eed219 1424 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1425}
1426
03245a5e 1427/* STK8096GP */
a685dbbc 1428static struct dibx000_agc_config dib8090_agc_config[2] = {
be9bae10 1429 {
40d1a7c3 1430 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
9c783036 1431 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1432 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1433 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1434 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1435 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1436
40d1a7c3
MCC		 1437 .inv_gain = 787,
1438 .time_stabiliz = 10,
9c783036 1439
40d1a7c3
MCC		 1440 .alpha_level = 0,
1441 .thlock = 118,
9c783036 1442
40d1a7c3
MCC		 1443 .wbd_inv = 0,
1444 .wbd_ref = 3530,
1445 .wbd_sel = 1,
1446 .wbd_alpha = 5,
9c783036 1447
40d1a7c3
MCC		 1448 .agc1_max = 65535,
1449 .agc1_min = 0,
9c783036 1450
40d1a7c3
MCC		 1451 .agc2_max = 65535,
1452 .agc2_min = 0,
9c783036 1453
40d1a7c3
MCC		 1454 .agc1_pt1 = 0,
1455 .agc1_pt2 = 32,
1456 .agc1_pt3 = 114,
1457 .agc1_slope1 = 143,
1458 .agc1_slope2 = 144,
1459 .agc2_pt1 = 114,
1460 .agc2_pt2 = 227,
1461 .agc2_slope1 = 116,
1462 .agc2_slope2 = 117,
1463
1464 .alpha_mant = 28,
1465 .alpha_exp = 26,
1466 .beta_mant = 31,
1467 .beta_exp = 51,
1468
1469 .perform_agc_softsplit = 0,
be9bae10
OG		 1470 },
1471 {
40d1a7c3 1472 .band_caps = BAND_CBAND,
9c783036 1473 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1474 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1475 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1476 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1477 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1478
40d1a7c3
MCC		 1479 .inv_gain = 787,
1480 .time_stabiliz = 10,
9c783036 1481
40d1a7c3
MCC		 1482 .alpha_level = 0,
1483 .thlock = 118,
9c783036 1484
40d1a7c3
MCC		 1485 .wbd_inv = 0,
1486 .wbd_ref = 3530,
1487 .wbd_sel = 1,
1488 .wbd_alpha = 5,
9c783036 1489
40d1a7c3
MCC		 1490 .agc1_max = 0,
1491 .agc1_min = 0,
9c783036 1492
40d1a7c3
MCC		 1493 .agc2_max = 65535,
1494 .agc2_min = 0,
9c783036 1495
40d1a7c3
MCC		 1496 .agc1_pt1 = 0,
1497 .agc1_pt2 = 32,
1498 .agc1_pt3 = 114,
1499 .agc1_slope1 = 143,
1500 .agc1_slope2 = 144,
1501 .agc2_pt1 = 114,
1502 .agc2_pt2 = 227,
1503 .agc2_slope1 = 116,
1504 .agc2_slope2 = 117,
1505
1506 .alpha_mant = 28,
1507 .alpha_exp = 26,
1508 .beta_mant = 31,
1509 .beta_exp = 51,
1510
1511 .perform_agc_softsplit = 0,
be9bae10 1512 }
03245a5e
OG		 1513};
1514
1515static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
40d1a7c3
MCC		 1516 .internal = 54000,
1517 .sampling = 13500,
1518
1519 .pll_prediv = 1,
1520 .pll_ratio = 18,
1521 .pll_range = 3,
1522 .pll_reset = 1,
1523 .pll_bypass = 0,
1524
1525 .enable_refdiv = 0,
1526 .bypclk_div = 0,
1527 .IO_CLK_en_core = 1,
1528 .ADClkSrc = 1,
1529 .modulo = 2,
1530
1531 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
1532
1533 .ifreq = (0 << 25) | 0,
1534 .timf = 20199727,
1535
1536 .xtal_hz = 12000000,
03245a5e
OG		 1537};
1538
1539static int dib8090_get_adc_power(struct dvb_frontend *fe)
1540{
d44913c1
MCC		 1541 struct dvb_usb_adapter *adap = fe->dvb->priv;
1542 struct dib0700_adapter_state *state = adap->priv;
1543
1544 return state->dib8000_ops.get_adc_power(fe, 1);
be9bae10
OG		 1545}
1546
5e9c85d9
OG		 1547static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
1548{
1549 deb_info("AGC control callback: %i\n", restart);
1550 dib0090_dcc_freq(fe, restart);
1551
1552 if (restart == 0) /* before AGC startup */
1553 dib0090_set_dc_servo(fe, 1);
1554}
1555
be9bae10
OG		 1556static struct dib8000_config dib809x_dib8000_config[2] = {
1557 {
1558 .output_mpeg2_in_188_bytes = 1,
1559
1560 .agc_config_count = 2,
1561 .agc = dib8090_agc_config,
5e9c85d9 1562 .agc_control = dib8090_agc_control,
be9bae10
OG		 1563 .pll = &dib8090_pll_config_12mhz,
1564 .tuner_is_baseband = 1,
1565
1566 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1567 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1568 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1569
1570 .hostbus_diversity = 1,
1571 .div_cfg = 0x31,
1572 .output_mode = OUTMODE_MPEG2_FIFO,
1573 .drives = 0x2d98,
1574 .diversity_delay = 48,
1575 .refclksel = 3,
b4d6046e 1576 }, {
be9bae10
OG		 1577 .output_mpeg2_in_188_bytes = 1,
1578
1579 .agc_config_count = 2,
1580 .agc = dib8090_agc_config,
5e9c85d9 1581 .agc_control = dib8090_agc_control,
be9bae10
OG		 1582 .pll = &dib8090_pll_config_12mhz,
1583 .tuner_is_baseband = 1,
1584
1585 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1586 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1587 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1588
1589 .hostbus_diversity = 1,
1590 .div_cfg = 0x31,
1591 .output_mode = OUTMODE_DIVERSITY,
1592 .drives = 0x2d08,
1593 .diversity_delay = 1,
1594 .refclksel = 3,
1595 }
1596};
1597
1598static struct dib0090_wbd_slope dib8090_wbd_table[] = {
1599 /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
1600 { 120, 0, 500, 0, 500, 4 }, /* CBAND */
1601 { 170, 0, 450, 0, 450, 4 }, /* CBAND */
1602 { 380, 48, 373, 28, 259, 6 }, /* VHF */
1603 { 860, 34, 700, 36, 616, 6 }, /* high UHF */
1604 { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
1605};
1606
1607static struct dib0090_config dib809x_dib0090_config = {
1608 .io.pll_bypass = 1,
1609 .io.pll_range = 1,
1610 .io.pll_prediv = 1,
1611 .io.pll_loopdiv = 20,
1612 .io.adc_clock_ratio = 8,
1613 .io.pll_int_loop_filt = 0,
1614 .io.clock_khz = 12000,
1615 .reset = dib80xx_tuner_reset,
1616 .sleep = dib80xx_tuner_sleep,
1617 .clkouttobamse = 1,
1618 .analog_output = 1,
1619 .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
1620 .use_pwm_agc = 1,
1621 .clkoutdrive = 1,
1622 .get_adc_power = dib8090_get_adc_power,
1623 .freq_offset_khz_uhf = -63,
1624 .freq_offset_khz_vhf = -143,
1625 .wbd = dib8090_wbd_table,
1626 .fref_clock_ratio = 6,
1627};
1628
5e9c85d9
OG		 1629static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
1630{
1631 u8 optimal_pll_ratio = 20;
1632 u32 freq_adc, ratio, rest, max = 0;
1633 u8 pll_ratio;
1634
1635 for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
1636 freq_adc = 12 * pll_ratio * (1 << 8) / 16;
1637 ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
1638 rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
1639
1640 if (rest > freq_adc / 2)
1641 rest = freq_adc - rest;
1642 deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
1643 if ((rest > max) && (rest > 717)) {
1644 optimal_pll_ratio = pll_ratio;
1645 max = rest;
1646 }
1647 }
1648 deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
1649
1650 return optimal_pll_ratio;
1651}
1652
14d24d14 1653static int dib8096_set_param_override(struct dvb_frontend *fe)
be9bae10
OG		 1654{
1655 struct dvb_usb_adapter *adap = fe->dvb->priv;
1656 struct dib0700_adapter_state *state = adap->priv;
5e9c85d9
OG		 1657 u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
1658 u16 target, ltgain, rf_gain_limit;
1659 u32 timf;
be9bae10
OG		 1660 int ret = 0;
1661 enum frontend_tune_state tune_state = CT_SHUTDOWN;
5e9c85d9
OG		 1662
1663 switch (band) {
1664 default:
1665 deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
06eeefe8 1666 /* fall through */
5e9c85d9 1667 case BAND_VHF:
d44913c1 1668 state->dib8000_ops.set_gpio(fe, 3, 0, 1);
5e9c85d9
OG		 1669 break;
1670 case BAND_UHF:
d44913c1 1671 state->dib8000_ops.set_gpio(fe, 3, 0, 0);
5e9c85d9
OG		 1672 break;
1673 }
be9bae10 1674
14d24d14 1675 ret = state->set_param_save(fe);
be9bae10
OG		 1676 if (ret < 0)
1677 return ret;
1678
5e9c85d9
OG		 1679 if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
1680 deb_info("only 6MHz bandwidth is supported\n");
1681 return -EINVAL;
1682 }
1683
cba862dc 1684 /* Update PLL if needed ratio */
d44913c1 1685 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
5e9c85d9 1686
cba862dc 1687 /* Get optimize PLL ratio to remove spurious */
5e9c85d9
OG		 1688 pll_ratio = dib8090_compute_pll_parameters(fe);
1689 if (pll_ratio == 17)
1690 timf = 21387946;
1691 else if (pll_ratio == 18)
1692 timf = 20199727;
1693 else if (pll_ratio == 19)
1694 timf = 19136583;
1695 else
1696 timf = 18179756;
be9bae10 1697
cba862dc 1698 /* Update ratio */
d44913c1 1699 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
5e9c85d9 1700
d44913c1 1701 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
5e9c85d9
OG		 1702
1703 if (band != BAND_CBAND) {
1704 /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
1705 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
d44913c1 1706 state->dib8000_ops.set_wbd_ref(fe, target);
5e9c85d9 1707 }
be9bae10
OG		 1708
1709 if (band == BAND_CBAND) {
b4d6046e
OG		 1710 deb_info("tuning in CBAND - soft-AGC startup\n");
1711 dib0090_set_tune_state(fe, CT_AGC_START);
5e9c85d9 1712
b4d6046e
OG		 1713 do {
1714 ret = dib0090_gain_control(fe);
1715 msleep(ret);
1716 tune_state = dib0090_get_tune_state(fe);
1717 if (tune_state == CT_AGC_STEP_0)
d44913c1 1718 state->dib8000_ops.set_gpio(fe, 6, 0, 1);
b4d6046e
OG		 1719 else if (tune_state == CT_AGC_STEP_1) {
1720 dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
5e9c85d9 1721 if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
d44913c1 1722 state->dib8000_ops.set_gpio(fe, 6, 0, 0);
b4d6046e
OG		 1723 }
1724 } while (tune_state < CT_AGC_STOP);
5e9c85d9
OG		 1725
1726 deb_info("switching to PWM AGC\n");
b4d6046e 1727 dib0090_pwm_gain_reset(fe);
d44913c1
MCC		 1728 state->dib8000_ops.pwm_agc_reset(fe);
1729 state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
be9bae10 1730 } else {
5e9c85d9 1731 /* for everything else than CBAND we are using standard AGC */
b4d6046e
OG		 1732 deb_info("not tuning in CBAND - standard AGC startup\n");
1733 dib0090_pwm_gain_reset(fe);
be9bae10
OG		 1734 }
1735
1736 return 0;
1737}
1738
1739static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
1740{
1741 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1742 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10 1743
91be260f
NS		 1744 if (adap->id == 0) {
1745 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
1746 return -ENODEV;
1747 } else {
b094e64f 1748 /* FIXME: check if it is fe_adap[1] */
91be260f
NS		 1749 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
1750 return -ENODEV;
1751 }
be9bae10 1752
77eed219
MK		 1753 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1754 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1755 return 0;
1756}
1757
1758static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
1759{
d44913c1
MCC		 1760 struct dib0700_adapter_state *state = adap->priv;
1761
1762 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1763 return -ENODEV;
1764
be9bae10
OG		 1765 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1766 msleep(10);
1767 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1768 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1769 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1770
1771 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1772
1773 dib0700_ctrl_clock(adap->dev, 72, 1);
1774
1775 msleep(10);
1776 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1777 msleep(10);
1778 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1779
d44913c1 1780 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
be9bae10 1781
d44913c1 1782 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
be9bae10 1783
77eed219 1784 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 1785}
1786
91be260f
NS		 1787static int stk809x_frontend1_attach(struct dvb_usb_adapter *adap)
1788{
1789 struct dib0700_adapter_state *state = adap->priv;
1790
1791 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1792 return -ENODEV;
1793
1794 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x82, 0);
1795
1796 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1797
1798 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
1799}
1800
be9bae10
OG		 1801static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
1802{
1803 struct dib0700_adapter_state *st = adap->priv;
1804 struct i2c_adapter *tun_i2c;
d44913c1 1805 struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10
OG		 1806
1807 if (fe_slave) {
d44913c1 1808 tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10
OG		 1809 if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
1810 return -ENODEV;
77eed219 1811 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
be9bae10
OG		 1812 fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
1813 }
d44913c1 1814 tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 1815 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
be9bae10
OG		 1816 return -ENODEV;
1817
77eed219
MK		 1818 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1819 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1820
1821 return 0;
1822}
1823
1824static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
1825{
1826 struct dvb_frontend *fe_slave;
d44913c1
MCC		 1827 struct dib0700_adapter_state *state = adap->priv;
1828
1829 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1830 return -ENODEV;
be9bae10
OG		 1831
1832 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
b4d6046e 1833 msleep(20);
be9bae10
OG		 1834 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1835 msleep(1000);
1836 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1837 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1838 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1839
1840 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1841
1842 dib0700_ctrl_clock(adap->dev, 72, 1);
1843
b4d6046e 1844 msleep(20);
be9bae10 1845 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 1846 msleep(20);
be9bae10
OG		 1847 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1848
d44913c1 1849 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
be9bae10 1850
d44913c1 1851 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
77eed219 1852 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 1853 return -ENODEV;
1854
d44913c1
MCC		 1855 /* Needed to increment refcount */
1856 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1857 return -ENODEV;
1858
1859 fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1860 state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 1861
1862 return fe_slave == NULL ? -ENODEV : 0;
1863}
1864
88f3a358
OG		 1865/* TFE8096P */
1866static struct dibx000_agc_config dib8096p_agc_config[2] = {
1867 {
1868 .band_caps = BAND_UHF,
1869 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1870 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1871 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1872 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1873 P_agc_write=0 */
1874 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1875 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1876 | (0 << 4) | (5 << 1) | (0 << 0),
1877
1878 .inv_gain = 684,
1879 .time_stabiliz = 10,
1880
1881 .alpha_level = 0,
1882 .thlock = 118,
1883
1884 .wbd_inv = 0,
1885 .wbd_ref = 1200,
1886 .wbd_sel = 3,
1887 .wbd_alpha = 5,
1888
1889 .agc1_max = 65535,
1890 .agc1_min = 0,
1891
1892 .agc2_max = 32767,
1893 .agc2_min = 0,
1894
1895 .agc1_pt1 = 0,
1896 .agc1_pt2 = 0,
1897 .agc1_pt3 = 105,
1898 .agc1_slope1 = 0,
1899 .agc1_slope2 = 156,
1900 .agc2_pt1 = 105,
1901 .agc2_pt2 = 255,
1902 .agc2_slope1 = 54,
1903 .agc2_slope2 = 0,
1904
1905 .alpha_mant = 28,
1906 .alpha_exp = 26,
1907 .beta_mant = 31,
1908 .beta_exp = 51,
1909
1910 .perform_agc_softsplit = 0,
1911 } , {
1912 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
1913 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1914 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1915 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1916 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1917 P_agc_write=0 */
1918 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1919 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1920 | (0 << 4) | (5 << 1) | (0 << 0),
1921
1922 .inv_gain = 732,
1923 .time_stabiliz = 10,
1924
1925 .alpha_level = 0,
1926 .thlock = 118,
1927
1928 .wbd_inv = 0,
1929 .wbd_ref = 1200,
1930 .wbd_sel = 3,
1931 .wbd_alpha = 5,
1932
1933 .agc1_max = 65535,
1934 .agc1_min = 0,
1935
1936 .agc2_max = 32767,
1937 .agc2_min = 0,
1938
1939 .agc1_pt1 = 0,
1940 .agc1_pt2 = 0,
1941 .agc1_pt3 = 98,
1942 .agc1_slope1 = 0,
1943 .agc1_slope2 = 167,
1944 .agc2_pt1 = 98,
1945 .agc2_pt2 = 255,
1946 .agc2_slope1 = 52,
1947 .agc2_slope2 = 0,
1948
1949 .alpha_mant = 28,
1950 .alpha_exp = 26,
1951 .beta_mant = 31,
1952 .beta_exp = 51,
1953
1954 .perform_agc_softsplit = 0,
1955 }
1956};
1957
1958static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
09628b2c
MCC		 1959 .internal = 108000,
1960 .sampling = 13500,
1961 .pll_prediv = 1,
1962 .pll_ratio = 9,
1963 .pll_range = 1,
1964 .pll_reset = 0,
1965 .pll_bypass = 0,
1966 .enable_refdiv = 0,
1967 .bypclk_div = 0,
1968 .IO_CLK_en_core = 0,
1969 .ADClkSrc = 0,
1970 .modulo = 2,
1971 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1972 .ifreq = (0 << 25) | 0,
1973 .timf = 20199729,
1974 .xtal_hz = 12000000,
88f3a358
OG		 1975};
1976
1977static struct dib8000_config tfe8096p_dib8000_config = {
1978 .output_mpeg2_in_188_bytes = 1,
1979 .hostbus_diversity = 1,
1980 .update_lna = NULL,
1981
1982 .agc_config_count = 2,
1983 .agc = dib8096p_agc_config,
1984 .pll = &dib8096p_clock_config_12_mhz,
1985
1986 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1987 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1988 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1989
1990 .agc_control = NULL,
1991 .diversity_delay = 48,
1992 .output_mode = OUTMODE_MPEG2_FIFO,
1993 .enMpegOutput = 1,
1994};
1995
1996static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
1997 { 380, 81, 850, 64, 540, 4},
1998 { 860, 51, 866, 21, 375, 4},
1999 {1700, 0, 250, 0, 100, 6},
2000 {2600, 0, 250, 0, 100, 6},
2001 { 0xFFFF, 0, 0, 0, 0, 0},
2002};
2003
d44913c1 2004static struct dib0090_config tfe8096p_dib0090_config = {
88f3a358
OG		 2005 .io.clock_khz = 12000,
2006 .io.pll_bypass = 0,
2007 .io.pll_range = 0,
2008 .io.pll_prediv = 3,
2009 .io.pll_loopdiv = 6,
2010 .io.adc_clock_ratio = 0,
2011 .io.pll_int_loop_filt = 0,
88f3a358
OG		 2012
2013 .freq_offset_khz_uhf = -143,
2014 .freq_offset_khz_vhf = -143,
2015
2016 .get_adc_power = dib8090_get_adc_power,
2017
2018 .clkouttobamse = 1,
2019 .analog_output = 0,
2020
2021 .wbd_vhf_offset = 0,
2022 .wbd_cband_offset = 0,
2023 .use_pwm_agc = 1,
2024 .clkoutdrive = 0,
2025
2026 .fref_clock_ratio = 1,
2027
88f3a358
OG		 2028 .ls_cfg_pad_drv = 0,
2029 .data_tx_drv = 0,
2030 .low_if = NULL,
2031 .in_soc = 1,
2032 .force_cband_input = 0,
2033};
2034
2035struct dibx090p_adc {
2036 u32 freq; /* RF freq MHz */
2037 u32 timf; /* New Timf */
2038 u32 pll_loopdiv; /* New prediv */
2039 u32 pll_prediv; /* New loopdiv */
2040};
2041
5e9c85d9
OG		 2042struct dibx090p_best_adc {
2043 u32 timf;
2044 u32 pll_loopdiv;
2045 u32 pll_prediv;
88f3a358
OG		 2046};
2047
5e9c85d9
OG		 2048static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
2049{
2050 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2051 u16 xtal = 12000;
2052 u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
2053 u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
2054 u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
2055 u32 fdem_min = 66000;
2056 u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
2057 u32 harmonic_id = 0;
2058
2059 adc->timf = 0;
2060 adc->pll_loopdiv = loopdiv;
2061 adc->pll_prediv = prediv;
2062
2063 deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
2064
2065 /* Find Min and Max prediv */
2066 while ((xtal / max_prediv) >= fcp_min)
2067 max_prediv++;
2068
2069 max_prediv--;
2070 min_prediv = max_prediv;
2071 while ((xtal / min_prediv) <= fcp_max) {
2072 min_prediv--;
2073 if (min_prediv == 1)
2074 break;
2075 }
2076 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2077
2078 min_prediv = 1;
2079
2080 for (prediv = min_prediv; prediv < max_prediv; prediv++) {
2081 fcp = xtal / prediv;
2082 if (fcp > fcp_min && fcp < fcp_max) {
2083 for (loopdiv = 1; loopdiv < 64; loopdiv++) {
2084 fmem = ((xtal/prediv) * loopdiv);
2085 fdem = fmem / 2;
2086 fs = fdem / 4;
2087
2088 /* test min/max system restrictions */
2089 if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
2090 spur = 0;
2091 /* test fs harmonics positions */
2092 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
2093 if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
2094 spur = 1;
2095 break;
2096 }
2097 }
2098
2099 if (!spur) {
2100 adc->pll_loopdiv = loopdiv;
2101 adc->pll_prediv = prediv;
2102 adc->timf = (4260880253U / fdem) * (1 << 8);
2103 adc->timf += ((4260880253U % fdem) << 8) / fdem;
2104
2105 deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
2106 break;
2107 }
2108 }
2109 }
2110 }
2111 if (!spur)
2112 break;
2113 }
2114
2115 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
2116 return -EINVAL;
2117 return 0;
2118}
2119
14d24d14 2120static int dib8096p_agc_startup(struct dvb_frontend *fe)
88f3a358
OG		 2121{
2122 struct dvb_usb_adapter *adap = fe->dvb->priv;
2123 struct dib0700_adapter_state *state = adap->priv;
2124 struct dibx000_bandwidth_config pll;
5e9c85d9 2125 struct dibx090p_best_adc adc;
88f3a358 2126 u16 target;
5e9c85d9 2127 int ret;
88f3a358 2128
14d24d14 2129 ret = state->set_param_save(fe);
88f3a358
OG		 2130 if (ret < 0)
2131 return ret;
2132 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2133
2134 dib0090_pwm_gain_reset(fe);
2135 /* dib0090_get_wbd_target is returning any possible
2136 temperature compensated wbd-target */
2137 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
d44913c1 2138 state->dib8000_ops.set_wbd_ref(fe, target);
88f3a358 2139
5e9c85d9
OG		 2140 if (dib8096p_get_best_sampling(fe, &adc) == 0) {
2141 pll.pll_ratio = adc.pll_loopdiv;
2142 pll.pll_prediv = adc.pll_prediv;
88f3a358 2143
5e9c85d9 2144 dib0700_set_i2c_speed(adap->dev, 200);
d44913c1
MCC		 2145 state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
2146 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
5e9c85d9 2147 dib0700_set_i2c_speed(adap->dev, 1000);
88f3a358
OG		 2148 }
2149 return 0;
2150}
2151
2152static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
2153{
5e9c85d9
OG		 2154 struct dib0700_state *st = adap->dev->priv;
2155 u32 fw_version;
d44913c1
MCC		 2156 struct dib0700_adapter_state *state = adap->priv;
2157
2158 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
2159 return -ENODEV;
5e9c85d9
OG		 2160
2161 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2162 if (fw_version >= 0x10200)
2163 st->fw_use_new_i2c_api = 1;
2164
88f3a358
OG		 2165 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
2166 msleep(20);
2167 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2168 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2169 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2170
2171 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2172
2173 dib0700_ctrl_clock(adap->dev, 72, 1);
2174
2175 msleep(20);
2176 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
2177 msleep(20);
2178 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2179
d44913c1 2180 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
88f3a358 2181
d44913c1
MCC		 2182 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
2183 0x80, &tfe8096p_dib8000_config);
88f3a358
OG		 2184
2185 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
2186}
2187
2188static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
2189{
2190 struct dib0700_adapter_state *st = adap->priv;
d44913c1
MCC		 2191 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
2192
2193 tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
2194 tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
2195 tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
88f3a358
OG		 2196
2197 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
2198 &tfe8096p_dib0090_config) == NULL)
2199 return -ENODEV;
2200
d44913c1 2201 st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
88f3a358
OG		 2202
2203 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
2204 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
2205 return 0;
2206}
2207
be9bae10
OG		 2208/* STK9090M */
2209static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
2210{
77eed219 2211 return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
be9bae10
OG		 2212}
2213
2214static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
2215{
77eed219 2216 return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
be9bae10
OG		 2217}
2218
2219static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
2220{
2221 return dib9000_set_gpio(fe, 5, 0, !onoff);
2222}
2223
2224static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
2225{
2226 return dib9000_set_gpio(fe, 0, 0, onoff);
2227}
2228
2229static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
2230{
2231 u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
2232 u8 rb[2];
2233 struct i2c_msg msg[2] = {
b4d6046e
OG		 2234 {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
2235 {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
be9bae10
OG		 2236 };
2237 u8 index_data;
2238
2239 dibx000_i2c_set_speed(i2c, 250);
2240
2241 if (i2c_transfer(i2c, msg, 2) != 2)
2242 return -EIO;
2243
2244 switch (rb[0] << 8 | rb[1]) {
b4d6046e 2245 case 0:
be9bae10
OG		 2246 deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
2247 return -EIO;
b4d6046e 2248 case 1:
be9bae10
OG		 2249 deb_info("Found DiB0170 rev2");
2250 break;
b4d6046e 2251 case 2:
be9bae10
OG		 2252 deb_info("Found DiB0190 rev2");
2253 break;
b4d6046e 2254 default:
be9bae10
OG		 2255 deb_info("DiB01x0 not found");
2256 return -EIO;
b4d6046e 2257 }
be9bae10
OG		 2258
2259 for (index_data = 0; index_data < len; index_data += 2) {
2260 wb[2] = (data[index_data + 1] >> 8) & 0xff;
2261 wb[3] = (data[index_data + 1]) & 0xff;
2262
2263 if (data[index_data] == 0) {
2264 wb[0] = (data[index_data] >> 8) & 0xff;
2265 wb[1] = (data[index_data]) & 0xff;
2266 msg[0].len = 2;
2267 if (i2c_transfer(i2c, msg, 2) != 2)
2268 return -EIO;
2269 wb[2] |= rb[0];
2270 wb[3] |= rb[1] & ~(3 << 4);
2271 }
2272
b4d6046e
OG		 2273 wb[0] = (data[index_data] >> 8)&0xff;
2274 wb[1] = (data[index_data])&0xff;
be9bae10
OG		 2275 msg[0].len = 4;
2276 if (i2c_transfer(i2c, &msg[0], 1) != 1)
2277 return -EIO;
2278 }
2279 return 0;
2280}
2281
2282static struct dib9000_config stk9090m_config = {
2283 .output_mpeg2_in_188_bytes = 1,
2284 .output_mode = OUTMODE_MPEG2_FIFO,
2285 .vcxo_timer = 279620,
2286 .timing_frequency = 20452225,
2287 .demod_clock_khz = 60000,
2288 .xtal_clock_khz = 30000,
2289 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2290 .subband = {
2291 2,
2292 {
2293 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
2294 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
2295 { 0 },
2296 },
2297 },
2298 .gpio_function = {
2299 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2300 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2301 },
2302};
2303
2304static struct dib9000_config nim9090md_config[2] = {
2305 {
2306 .output_mpeg2_in_188_bytes = 1,
2307 .output_mode = OUTMODE_MPEG2_FIFO,
2308 .vcxo_timer = 279620,
2309 .timing_frequency = 20452225,
2310 .demod_clock_khz = 60000,
2311 .xtal_clock_khz = 30000,
2312 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2313 }, {
2314 .output_mpeg2_in_188_bytes = 1,
2315 .output_mode = OUTMODE_DIVERSITY,
2316 .vcxo_timer = 279620,
2317 .timing_frequency = 20452225,
2318 .demod_clock_khz = 60000,
2319 .xtal_clock_khz = 30000,
2320 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2321 .subband = {
2322 2,
2323 {
2324 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
2325 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
2326 { 0 },
2327 },
2328 },
2329 .gpio_function = {
2330 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2331 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2332 },
2333 }
2334};
2335
2336static struct dib0090_config dib9090_dib0090_config = {
2337 .io.pll_bypass = 0,
2338 .io.pll_range = 1,
2339 .io.pll_prediv = 1,
2340 .io.pll_loopdiv = 8,
2341 .io.adc_clock_ratio = 8,
2342 .io.pll_int_loop_filt = 0,
2343 .io.clock_khz = 30000,
2344 .reset = dib90x0_tuner_reset,
2345 .sleep = dib90x0_tuner_sleep,
2346 .clkouttobamse = 0,
2347 .analog_output = 0,
2348 .use_pwm_agc = 0,
2349 .clkoutdrive = 0,
2350 .freq_offset_khz_uhf = 0,
2351 .freq_offset_khz_vhf = 0,
2352};
2353
2354static struct dib0090_config nim9090md_dib0090_config[2] = {
2355 {
2356 .io.pll_bypass = 0,
2357 .io.pll_range = 1,
2358 .io.pll_prediv = 1,
2359 .io.pll_loopdiv = 8,
2360 .io.adc_clock_ratio = 8,
2361 .io.pll_int_loop_filt = 0,
2362 .io.clock_khz = 30000,
2363 .reset = dib90x0_tuner_reset,
2364 .sleep = dib90x0_tuner_sleep,
2365 .clkouttobamse = 1,
2366 .analog_output = 0,
2367 .use_pwm_agc = 0,
2368 .clkoutdrive = 0,
2369 .freq_offset_khz_uhf = 0,
2370 .freq_offset_khz_vhf = 0,
b4d6046e 2371 }, {
be9bae10
OG		 2372 .io.pll_bypass = 0,
2373 .io.pll_range = 1,
2374 .io.pll_prediv = 1,
2375 .io.pll_loopdiv = 8,
2376 .io.adc_clock_ratio = 8,
2377 .io.pll_int_loop_filt = 0,
2378 .io.clock_khz = 30000,
2379 .reset = dib90x0_tuner_reset,
2380 .sleep = dib90x0_tuner_sleep,
2381 .clkouttobamse = 0,
2382 .analog_output = 0,
2383 .use_pwm_agc = 0,
2384 .clkoutdrive = 0,
2385 .freq_offset_khz_uhf = 0,
2386 .freq_offset_khz_vhf = 0,
2387 }
2388};
2389
2390
2391static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
2392{
2393 struct dib0700_adapter_state *state = adap->priv;
2394 struct dib0700_state *st = adap->dev->priv;
2395 u32 fw_version;
2396
2397 /* Make use of the new i2c functions from FW 1.20 */
2398 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2399 if (fw_version >= 0x10200)
2400 st->fw_use_new_i2c_api = 1;
2401 dib0700_set_i2c_speed(adap->dev, 340);
2402
2403 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2404 msleep(20);
be9bae10
OG		 2405 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2406 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2407 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2408 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2409
2410 dib0700_ctrl_clock(adap->dev, 72, 1);
2411
b4d6046e 2412 msleep(20);
be9bae10 2413 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2414 msleep(20);
be9bae10
OG		 2415 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2416
2417 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
2418
2419 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2420 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2421 return -ENODEV;
2422 } else {
5b5e0928 2423 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2424 }
2425 stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
2426 stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
2427
77eed219 2428 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
be9bae10 2429
77eed219 2430 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 2431}
2432
2433static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
2434{
2435 struct dib0700_adapter_state *state = adap->priv;
77eed219 2436 struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2437 u16 data_dib190[10] = {
2438 1, 0x1374,
2439 2, 0x01a2,
2440 7, 0x0020,
2441 0, 0x00ef,
2442 8, 0x0486,
2443 };
2444
77eed219 2445 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
be9bae10 2446 return -ENODEV;
77eed219 2447 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2448 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
2449 return -ENODEV;
d1190024 2450 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2451 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10 2452 return -ENODEV;
b4d6046e 2453 release_firmware(state->frontend_firmware);
be9bae10
OG		 2454 return 0;
2455}
2456
2457static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
2458{
2459 struct dib0700_adapter_state *state = adap->priv;
2460 struct dib0700_state *st = adap->dev->priv;
2461 struct i2c_adapter *i2c;
2462 struct dvb_frontend *fe_slave;
2463 u32 fw_version;
2464
2465 /* Make use of the new i2c functions from FW 1.20 */
2466 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2467 if (fw_version >= 0x10200)
2468 st->fw_use_new_i2c_api = 1;
2469 dib0700_set_i2c_speed(adap->dev, 340);
2470
2471 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2472 msleep(20);
be9bae10
OG		 2473 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2474 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2475 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2476 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2477
2478 dib0700_ctrl_clock(adap->dev, 72, 1);
2479
b4d6046e 2480 msleep(20);
be9bae10 2481 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2482 msleep(20);
be9bae10
OG		 2483 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2484
2485 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2486 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2487 return -EIO;
2488 } else {
5b5e0928 2489 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2490 }
2491 nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
2492 nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
2493 nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
2494 nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
2495
2496 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
77eed219 2497 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
be9bae10 2498
77eed219 2499 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 2500 return -ENODEV;
2501
77eed219 2502 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
be9bae10
OG		 2503 dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
2504
2505 fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
77eed219 2506 dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 2507
2508 return fe_slave == NULL ? -ENODEV : 0;
03245a5e
OG		 2509}
2510
be9bae10
OG		 2511static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
2512{
2513 struct dib0700_adapter_state *state = adap->priv;
2514 struct i2c_adapter *i2c;
2515 struct dvb_frontend *fe_slave;
2516 u16 data_dib190[10] = {
2517 1, 0x5374,
2518 2, 0x01ae,
2519 7, 0x0020,
2520 0, 0x00ef,
2521 8, 0x0406,
2522 };
77eed219
MK		 2523 i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
2524 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
be9bae10 2525 return -ENODEV;
77eed219 2526 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2527 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
2528 return -ENODEV;
d1190024
OG		 2529
2530 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2531 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10
OG		 2532 return -ENODEV;
2533
77eed219 2534 fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10 2535 if (fe_slave != NULL) {
77eed219 2536 i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2537 dib9000_set_i2c_adapter(fe_slave, i2c);
2538
2539 i2c = dib9000_get_tuner_interface(fe_slave);
2540 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
2541 return -ENODEV;
77eed219 2542 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
d1190024 2543 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
be9bae10
OG		 2544 if (dib9000_firmware_post_pll_init(fe_slave) < 0)
2545 return -ENODEV;
2546 }
b4d6046e 2547 release_firmware(state->frontend_firmware);
be9bae10
OG		 2548
2549 return 0;
2550}
2551
2552/* NIM7090 */
5e9c85d9 2553static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
be9bae10
OG		 2554{
2555 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2556
2557 u16 xtal = 12000;
2558 u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
2559 u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
2560 u32 fdem_max = 76000;
2561 u32 fdem_min = 69500;
2562 u32 fcp = 0, fs = 0, fdem = 0;
2563 u32 harmonic_id = 0;
2564
2565 adc->pll_loopdiv = loopdiv;
2566 adc->pll_prediv = prediv;
2567 adc->timf = 0;
2568
2569 deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
2570
2571 /* Find Min and Max prediv */
b4d6046e 2572 while ((xtal/max_prediv) >= fcp_min)
be9bae10
OG		 2573 max_prediv++;
2574
2575 max_prediv--;
2576 min_prediv = max_prediv;
b4d6046e 2577 while ((xtal/min_prediv) <= fcp_max) {
be9bae10 2578 min_prediv--;
b4d6046e 2579 if (min_prediv == 1)
be9bae10
OG		 2580 break;
2581 }
2582 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2583
2584 min_prediv = 2;
2585
b4d6046e 2586 for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
be9bae10 2587 fcp = xtal / prediv;
b4d6046e
OG		 2588 if (fcp > fcp_min && fcp < fcp_max) {
2589 for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
be9bae10
OG		 2590 fdem = ((xtal/prediv) * loopdiv);
2591 fs = fdem / 4;
2592 /* test min/max system restrictions */
2593
b4d6046e 2594 if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
be9bae10
OG		 2595 spur = 0;
2596 /* test fs harmonics positions */
b4d6046e
OG		 2597 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
2598 if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
be9bae10
OG		 2599 spur = 1;
2600 break;
2601 }
2602 }
2603
b4d6046e 2604 if (!spur) {
be9bae10
OG		 2605 adc->pll_loopdiv = loopdiv;
2606 adc->pll_prediv = prediv;
b4d6046e
OG		 2607 adc->timf = 2396745143UL/fdem*(1 << 9);
2608 adc->timf += ((2396745143UL%fdem) << 9)/fdem;
be9bae10
OG		 2609 deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
2610 break;
2611 }
2612 }
2613 }
2614 }
2615 if (!spur)
2616 break;
2617 }
2618
2619
b4d6046e 2620 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
be9bae10 2621 return -EINVAL;
b4d6046e 2622 else
be9bae10
OG		 2623 return 0;
2624}
2625
14d24d14 2626static int dib7090_agc_startup(struct dvb_frontend *fe)
be9bae10
OG		 2627{
2628 struct dvb_usb_adapter *adap = fe->dvb->priv;
2629 struct dib0700_adapter_state *state = adap->priv;
2630 struct dibx000_bandwidth_config pll;
2631 u16 target;
5e9c85d9 2632 struct dibx090p_best_adc adc;
be9bae10
OG		 2633 int ret;
2634
14d24d14 2635 ret = state->set_param_save(fe);
be9bae10
OG		 2636 if (ret < 0)
2637 return ret;
2638
2639 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2640 dib0090_pwm_gain_reset(fe);
6724a2f4 2641 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
8abe4a0a 2642 state->dib7000p_ops.set_wbd_ref(fe, target);
be9bae10 2643
b4d6046e 2644 if (dib7090p_get_best_sampling(fe, &adc) == 0) {
be9bae10
OG		 2645 pll.pll_ratio = adc.pll_loopdiv;
2646 pll.pll_prediv = adc.pll_prediv;
2647
8abe4a0a
MCC		 2648 state->dib7000p_ops.update_pll(fe, &pll);
2649 state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
be9bae10
OG		 2650 }
2651 return 0;
2652}
2653
2e802861
OG		 2654static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
2655{
2656 deb_info("AGC restart callback: %d", restart);
2657 if (restart == 0) /* before AGC startup */
2658 dib0090_set_dc_servo(fe, 1);
2659 return 0;
2660}
2661
f45f513a 2662static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
6724a2f4 2663{
8abe4a0a
MCC		 2664 struct dvb_usb_adapter *adap = fe->dvb->priv;
2665 struct dib0700_adapter_state *state = adap->priv;
2666
f45f513a 2667 deb_info("update LNA: agc global=%i", agc_global);
6724a2f4 2668
f45f513a 2669 if (agc_global < 25000) {
8abe4a0a
MCC		 2670 state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
2671 state->dib7000p_ops.set_agc1_min(fe, 0);
6724a2f4 2672 } else {
8abe4a0a
MCC		 2673 state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
2674 state->dib7000p_ops.set_agc1_min(fe, 32768);
6724a2f4
OG		 2675 }
2676
2677 return 0;
2678}
2679
be9bae10 2680static struct dib0090_wbd_slope dib7090_wbd_table[] = {
b4d6046e
OG		 2681 { 380, 81, 850, 64, 540, 4},
2682 { 860, 51, 866, 21, 375, 4},
2683 {1700, 0, 250, 0, 100, 6},
2684 {2600, 0, 250, 0, 100, 6},
2685 { 0xFFFF, 0, 0, 0, 0, 0},
03245a5e
OG		 2686};
2687
a685dbbc 2688static struct dibx000_agc_config dib7090_agc_config[2] = {
be9bae10
OG		 2689 {
2690 .band_caps = BAND_UHF,
2691 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2692 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2693 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2694
b4d6046e
OG		 2695 .inv_gain = 687,
2696 .time_stabiliz = 10,
be9bae10 2697
b4d6046e
OG		 2698 .alpha_level = 0,
2699 .thlock = 118,
be9bae10 2700
b4d6046e
OG		 2701 .wbd_inv = 0,
2702 .wbd_ref = 1200,
2703 .wbd_sel = 3,
2704 .wbd_alpha = 5,
be9bae10 2705
b4d6046e 2706 .agc1_max = 65535,
59501bb7 2707 .agc1_min = 32768,
be9bae10 2708
b4d6046e
OG		 2709 .agc2_max = 65535,
2710 .agc2_min = 0,
be9bae10 2711
b4d6046e
OG		 2712 .agc1_pt1 = 0,
2713 .agc1_pt2 = 32,
2714 .agc1_pt3 = 114,
2715 .agc1_slope1 = 143,
2716 .agc1_slope2 = 144,
2717 .agc2_pt1 = 114,
2718 .agc2_pt2 = 227,
2719 .agc2_slope1 = 116,
2720 .agc2_slope2 = 117,
be9bae10 2721
b4d6046e
OG		 2722 .alpha_mant = 18,
2723 .alpha_exp = 0,
2724 .beta_mant = 20,
2725 .beta_exp = 59,
be9bae10 2726
b4d6046e 2727 .perform_agc_softsplit = 0,
be9bae10
OG		 2728 } , {
2729 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
2730 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2731 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2732 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2733
b4d6046e
OG		 2734 .inv_gain = 732,
2735 .time_stabiliz = 10,
be9bae10 2736
b4d6046e
OG		 2737 .alpha_level = 0,
2738 .thlock = 118,
be9bae10 2739
b4d6046e
OG		 2740 .wbd_inv = 0,
2741 .wbd_ref = 1200,
2742 .wbd_sel = 3,
2743 .wbd_alpha = 5,
be9bae10 2744
b4d6046e
OG		 2745 .agc1_max = 65535,
2746 .agc1_min = 0,
be9bae10 2747
b4d6046e
OG		 2748 .agc2_max = 65535,
2749 .agc2_min = 0,
be9bae10 2750
b4d6046e
OG		 2751 .agc1_pt1 = 0,
2752 .agc1_pt2 = 0,
2753 .agc1_pt3 = 98,
2754 .agc1_slope1 = 0,
2755 .agc1_slope2 = 167,
7f4d527f 2756 .agc2_pt1 = 98,
b4d6046e
OG		 2757 .agc2_pt2 = 255,
2758 .agc2_slope1 = 104,
2759 .agc2_slope2 = 0,
be9bae10 2760
b4d6046e
OG		 2761 .alpha_mant = 18,
2762 .alpha_exp = 0,
2763 .beta_mant = 20,
2764 .beta_exp = 59,
be9bae10 2765
b4d6046e 2766 .perform_agc_softsplit = 0,
be9bae10
OG		 2767 }
2768};
2769
2770static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
09628b2c
MCC		 2771 .internal = 60000,
2772 .sampling = 15000,
2773 .pll_prediv = 1,
2774 .pll_ratio = 5,
2775 .pll_range = 0,
2776 .pll_reset = 0,
2777 .pll_bypass = 0,
2778 .enable_refdiv = 0,
2779 .bypclk_div = 0,
2780 .IO_CLK_en_core = 1,
2781 .ADClkSrc = 1,
2782 .modulo = 2,
2783 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
2784 .ifreq = (0 << 25) | 0,
2785 .timf = 20452225,
2786 .xtal_hz = 15000000,
be9bae10
OG		 2787};
2788
2789static struct dib7000p_config nim7090_dib7000p_config = {
2790 .output_mpeg2_in_188_bytes = 1,
2791 .hostbus_diversity = 1,
2792 .tuner_is_baseband = 1,
59501bb7 2793 .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
be9bae10
OG		 2794
2795 .agc_config_count = 2,
2796 .agc = dib7090_agc_config,
2797
2798 .bw = &dib7090_clock_config_12_mhz,
2799
2800 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2801 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2802 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2803
2804 .pwm_freq_div = 0,
2805
2806 .agc_control = dib7090_agc_restart,
2807
2808 .spur_protect = 0,
2809 .disable_sample_and_hold = 0,
2810 .enable_current_mirror = 0,
2811 .diversity_delay = 0,
2812
2813 .output_mode = OUTMODE_MPEG2_FIFO,
2814 .enMpegOutput = 1,
2815};
2816
59501bb7
OG		 2817static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
2818{
8abe4a0a
MCC		 2819 struct dvb_usb_adapter *adap = fe->dvb->priv;
2820 struct dib0700_adapter_state *state = adap->priv;
2821
59501bb7
OG		 2822 deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
2823 if (agc_global < 25000) {
8abe4a0a
MCC		 2824 state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
2825 state->dib7000p_ops.set_agc1_min(fe, 0);
59501bb7 2826 } else {
8abe4a0a
MCC		 2827 state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
2828 state->dib7000p_ops.set_agc1_min(fe, 32768);
59501bb7
OG		 2829 }
2830
2831 return 0;
2832}
2833
be9bae10
OG		 2834static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
2835 {
2836 .output_mpeg2_in_188_bytes = 1,
2837 .hostbus_diversity = 1,
2838 .tuner_is_baseband = 1,
59501bb7 2839 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2840
2841 .agc_config_count = 2,
2842 .agc = dib7090_agc_config,
2843
2844 .bw = &dib7090_clock_config_12_mhz,
2845
2846 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2847 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2848 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2849
2850 .pwm_freq_div = 0,
2851
2852 .agc_control = dib7090_agc_restart,
2853
2854 .spur_protect = 0,
2855 .disable_sample_and_hold = 0,
2856 .enable_current_mirror = 0,
2857 .diversity_delay = 0,
2858
2859 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2860 .default_i2c_addr = 0x90,
2861 .enMpegOutput = 1,
b4d6046e 2862 }, {
be9bae10
OG		 2863 .output_mpeg2_in_188_bytes = 1,
2864 .hostbus_diversity = 1,
2865 .tuner_is_baseband = 1,
59501bb7 2866 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2867
2868 .agc_config_count = 2,
2869 .agc = dib7090_agc_config,
2870
2871 .bw = &dib7090_clock_config_12_mhz,
2872
2873 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2874 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2875 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2876
2877 .pwm_freq_div = 0,
2878
2879 .agc_control = dib7090_agc_restart,
2880
2881 .spur_protect = 0,
2882 .disable_sample_and_hold = 0,
2883 .enable_current_mirror = 0,
2884 .diversity_delay = 0,
2885
2886 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2887 .default_i2c_addr = 0x92,
2888 .enMpegOutput = 0,
2889 }
2890};
2891
8abe4a0a 2892static struct dib0090_config nim7090_dib0090_config = {
be9bae10
OG		 2893 .io.clock_khz = 12000,
2894 .io.pll_bypass = 0,
2895 .io.pll_range = 0,
2896 .io.pll_prediv = 3,
2897 .io.pll_loopdiv = 6,
2898 .io.adc_clock_ratio = 0,
2899 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2900
2901 .freq_offset_khz_uhf = 0,
2902 .freq_offset_khz_vhf = 0,
2903
be9bae10
OG		 2904 .clkouttobamse = 1,
2905 .analog_output = 0,
2906
2907 .wbd_vhf_offset = 0,
2908 .wbd_cband_offset = 0,
2909 .use_pwm_agc = 1,
2910 .clkoutdrive = 0,
2911
2912 .fref_clock_ratio = 0,
2913
2914 .wbd = dib7090_wbd_table,
2915
2916 .ls_cfg_pad_drv = 0,
2917 .data_tx_drv = 0,
2918 .low_if = NULL,
2919 .in_soc = 1,
2920};
2921
f45f513a 2922static struct dib7000p_config tfe7790p_dib7000p_config = {
b293f304
OG		 2923 .output_mpeg2_in_188_bytes = 1,
2924 .hostbus_diversity = 1,
2925 .tuner_is_baseband = 1,
f45f513a 2926 .update_lna = tfe7790p_update_lna,
b293f304
OG		 2927
2928 .agc_config_count = 2,
2929 .agc = dib7090_agc_config,
2930
2931 .bw = &dib7090_clock_config_12_mhz,
2932
2933 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2934 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2935 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2936
2937 .pwm_freq_div = 0,
2938
2939 .agc_control = dib7090_agc_restart,
2940
2941 .spur_protect = 0,
2942 .disable_sample_and_hold = 0,
2943 .enable_current_mirror = 0,
2944 .diversity_delay = 0,
2945
2946 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2947 .enMpegOutput = 1,
2948};
2949
8abe4a0a 2950static struct dib0090_config tfe7790p_dib0090_config = {
b293f304
OG		 2951 .io.clock_khz = 12000,
2952 .io.pll_bypass = 0,
2953 .io.pll_range = 0,
2954 .io.pll_prediv = 3,
2955 .io.pll_loopdiv = 6,
2956 .io.adc_clock_ratio = 0,
2957 .io.pll_int_loop_filt = 0,
b293f304
OG		 2958
2959 .freq_offset_khz_uhf = 0,
2960 .freq_offset_khz_vhf = 0,
2961
b293f304
OG		 2962 .clkouttobamse = 1,
2963 .analog_output = 0,
2964
2965 .wbd_vhf_offset = 0,
2966 .wbd_cband_offset = 0,
2967 .use_pwm_agc = 1,
2968 .clkoutdrive = 0,
2969
2970 .fref_clock_ratio = 0,
2971
f45f513a 2972 .wbd = dib7090_wbd_table,
b293f304
OG		 2973
2974 .ls_cfg_pad_drv = 0,
2975 .data_tx_drv = 0,
2976 .low_if = NULL,
2977 .in_soc = 1,
f45f513a
OG		 2978 .force_cband_input = 0,
2979 .is_dib7090e = 0,
b293f304
OG		 2980 .force_crystal_mode = 1,
2981};
2982
8abe4a0a 2983static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
be9bae10
OG		 2984 {
2985 .io.clock_khz = 12000,
2986 .io.pll_bypass = 0,
2987 .io.pll_range = 0,
2988 .io.pll_prediv = 3,
2989 .io.pll_loopdiv = 6,
2990 .io.adc_clock_ratio = 0,
2991 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2992
2993 .freq_offset_khz_uhf = 50,
2994 .freq_offset_khz_vhf = 70,
2995
be9bae10
OG		 2996 .clkouttobamse = 1,
2997 .analog_output = 0,
2998
2999 .wbd_vhf_offset = 0,
3000 .wbd_cband_offset = 0,
3001 .use_pwm_agc = 1,
3002 .clkoutdrive = 0,
3003
3004 .fref_clock_ratio = 0,
3005
3006 .wbd = dib7090_wbd_table,
3007
3008 .ls_cfg_pad_drv = 0,
3009 .data_tx_drv = 0,
3010 .low_if = NULL,
3011 .in_soc = 1,
b4d6046e 3012 }, {
be9bae10
OG		 3013 .io.clock_khz = 12000,
3014 .io.pll_bypass = 0,
3015 .io.pll_range = 0,
3016 .io.pll_prediv = 3,
3017 .io.pll_loopdiv = 6,
3018 .io.adc_clock_ratio = 0,
3019 .io.pll_int_loop_filt = 0,
be9bae10
OG		 3020
3021 .freq_offset_khz_uhf = -50,
3022 .freq_offset_khz_vhf = -70,
3023
be9bae10
OG		 3024 .clkouttobamse = 1,
3025 .analog_output = 0,
3026
3027 .wbd_vhf_offset = 0,
3028 .wbd_cband_offset = 0,
3029 .use_pwm_agc = 1,
3030 .clkoutdrive = 0,
3031
3032 .fref_clock_ratio = 0,
3033
3034 .wbd = dib7090_wbd_table,
3035
3036 .ls_cfg_pad_drv = 0,
3037 .data_tx_drv = 0,
3038 .low_if = NULL,
3039 .in_soc = 1,
3040 }
3041};
3042
3043static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
3044{
8abe4a0a
MCC		 3045 struct dib0700_adapter_state *state = adap->priv;
3046
3047 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3048 return -ENODEV;
3049
be9bae10 3050 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3051 msleep(20);
be9bae10
OG		 3052 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3053 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3054 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3055 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3056
b4d6046e 3057 msleep(20);
be9bae10 3058 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3059 msleep(20);
be9bae10 3060 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
03245a5e 3061
8abe4a0a
MCC		 3062 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
3063 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3064 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3065 return -ENODEV;
3066 }
8abe4a0a 3067 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
03245a5e 3068
77eed219 3069 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
03245a5e
OG		 3070}
3071
be9bae10 3072static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
03245a5e 3073{
be9bae10 3074 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3075 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3076
3077 nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep,
3078 nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep,
3079 nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3080
77eed219 3081 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
be9bae10 3082 return -ENODEV;
03245a5e 3083
8abe4a0a 3084 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
03245a5e 3085
77eed219
MK		 3086 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3087 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3088 return 0;
03245a5e
OG		 3089}
3090
be9bae10 3091static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
03245a5e 3092{
be9bae10 3093 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3094 struct dib0700_adapter_state *state = adap->priv;
3095
3096 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3097 return -ENODEV;
be9bae10
OG		 3098
3099 /* The TFE7090 requires the dib0700 to not be in master mode */
3100 st->disable_streaming_master_mode = 1;
3101
03245a5e 3102 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3103 msleep(20);
03245a5e
OG		 3104 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3105 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3106 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
03245a5e
OG		 3107 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3108
b4d6046e 3109 msleep(20);
03245a5e 3110 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3111 msleep(20);
03245a5e
OG		 3112 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3113
be9bae10 3114 /* initialize IC 0 */
8abe4a0a
MCC		 3115 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
3116 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3117 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3118 return -ENODEV;
3119 }
03245a5e 3120
be9bae10 3121 dib0700_set_i2c_speed(adap->dev, 340);
8abe4a0a 3122 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
77eed219 3123 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 3124 return -ENODEV;
3125
8abe4a0a 3126 state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
71682520 3127
be9bae10
OG		 3128 return 0;
3129}
3130
3131static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
3132{
3133 struct i2c_adapter *i2c;
8abe4a0a 3134 struct dib0700_adapter_state *state = adap->priv;
be9bae10 3135
77eed219 3136 if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
be9bae10
OG		 3137 err("the master dib7090 has to be initialized first");
3138 return -ENODEV; /* the master device has not been initialized */
3139 }
3140
8abe4a0a
MCC		 3141 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3142 return -ENODEV;
3143
3144 i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
3145 if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
3146 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3147 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3148 return -ENODEV;
3149 }
3150
8abe4a0a 3151 adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
be9bae10
OG		 3152 dib0700_set_i2c_speed(adap->dev, 200);
3153
77eed219 3154 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 3155}
3156
3157static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
3158{
3159 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3160 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3161
3162 tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
3163 tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
3164 tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3165
77eed219 3166 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
be9bae10
OG		 3167 return -ENODEV;
3168
8abe4a0a 3169 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3170
77eed219
MK		 3171 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3172 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10
OG		 3173 return 0;
3174}
3175
3176static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
3177{
3178 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3179 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3180
3181 tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
3182 tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
3183 tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3184
77eed219 3185 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
be9bae10
OG		 3186 return -ENODEV;
3187
8abe4a0a 3188 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3189
77eed219
MK		 3190 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3191 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3192 return 0;
03245a5e 3193}
ba3fe3a9 3194
f45f513a 3195static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
b293f304
OG		 3196{
3197 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3198 struct dib0700_adapter_state *state = adap->priv;
3199
3200 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3201 return -ENODEV;
b293f304 3202
f45f513a 3203 /* The TFE7790P requires the dib0700 to not be in master mode */
b293f304
OG		 3204 st->disable_streaming_master_mode = 1;
3205
3206 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3207 msleep(20);
3208 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3209 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3210 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3211 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3212 msleep(20);
3213 dib0700_ctrl_clock(adap->dev, 72, 1);
3214 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3215 msleep(20);
3216 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3217
8abe4a0a 3218 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
f45f513a 3219 1, 0x10, &tfe7790p_dib7000p_config) != 0) {
8abe4a0a 3220 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
b293f304 3221 __func__);
eb0c1994 3222 dvb_detach(state->dib7000p_ops.set_wbd_ref);
b293f304
OG		 3223 return -ENODEV;
3224 }
8abe4a0a 3225 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
f45f513a 3226 0x80, &tfe7790p_dib7000p_config);
b293f304
OG		 3227
3228 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
3229}
3230
f45f513a 3231static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
6724a2f4
OG		 3232{
3233 struct dib0700_adapter_state *st = adap->priv;
3234 struct i2c_adapter *tun_i2c =
8abe4a0a
MCC		 3235 st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3236
3237
3238 tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
3239 tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
3240 tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
6724a2f4
OG		 3241
3242 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
f45f513a 3243 &tfe7790p_dib0090_config) == NULL)
6724a2f4
OG		 3244 return -ENODEV;
3245
8abe4a0a 3246 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6724a2f4
OG		 3247
3248 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3249 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
3250 return 0;
3251}
3252
01373a5c
PB		 3253/* STK7070PD */
3254static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
3255 {
3256 .output_mpeg2_in_188_bytes = 1,
3257
3258 .agc_config_count = 1,
3259 .agc = &dib7070_agc_config,
3260 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3261 .tuner_is_baseband = 1,
3262 .spur_protect = 1,
01373a5c
PB		 3263
3264 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3265 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3266 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3267
3268 .hostbus_diversity = 1,
3269 }, {
3270 .output_mpeg2_in_188_bytes = 1,
3271
3272 .agc_config_count = 1,
3273 .agc = &dib7070_agc_config,
3274 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3275 .tuner_is_baseband = 1,
3276 .spur_protect = 1,
01373a5c
PB		 3277
3278 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3279 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3280 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3281
3282 .hostbus_diversity = 1,
3283 }
3284};
3285
52fd5b2e 3286static void stk7070pd_init(struct dvb_usb_device *dev)
01373a5c 3287{
52fd5b2e 3288 dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
01373a5c 3289 msleep(10);
52fd5b2e
JS		 3290 dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
3291 dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
3292 dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
3293 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
01373a5c 3294
52fd5b2e 3295 dib0700_ctrl_clock(dev, 72, 1);
01373a5c
PB		 3296
3297 msleep(10);
52fd5b2e
JS		 3298 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
3299}
3300
3301static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
3302{
8abe4a0a
MCC		 3303 struct dib0700_adapter_state *state = adap->priv;
3304
3305 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3306 return -ENODEV;
3307
52fd5b2e
JS		 3308 stk7070pd_init(adap->dev);
3309
01373a5c
PB		 3310 msleep(10);
3311 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3312
8abe4a0a 3313 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7 3314 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3315 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 3316 __func__);
eb0c1994 3317 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 3318 return -ENODEV;
3319 }
01373a5c 3320
8abe4a0a 3321 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
77eed219 3322 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3323}
3324
3325static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
3326{
8abe4a0a
MCC		 3327 struct dib0700_adapter_state *state = adap->priv;
3328
3329 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3330 return -ENODEV;
3331
3332 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
77eed219 3333 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3334}
3335
d43272a4 3336static int novatd_read_status_override(struct dvb_frontend *fe,
0df289a2 3337 enum fe_status *stat)
d43272a4
JS		 3338{
3339 struct dvb_usb_adapter *adap = fe->dvb->priv;
3340 struct dvb_usb_device *dev = adap->dev;
3341 struct dib0700_state *state = dev->priv;
3342 int ret;
3343
3344 ret = state->read_status(fe, stat);
3345
3346 if (!ret)
3347 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
3348 !!(*stat & FE_HAS_LOCK));
3349
3350 return ret;
3351}
3352
3353static int novatd_sleep_override(struct dvb_frontend* fe)
3354{
3355 struct dvb_usb_adapter *adap = fe->dvb->priv;
3356 struct dvb_usb_device *dev = adap->dev;
3357 struct dib0700_state *state = dev->priv;
3358
3359 /* turn off LED */
3360 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
3361
3362 return state->sleep(fe);
3363}
3364
cba862dc 3365/*
2b05b881
JS		 3366 * novatd_frontend_attach - Nova-TD specific attach
3367 *
3368 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
3369 * information purposes.
3370 */
3371static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
3372{
3373 struct dvb_usb_device *dev = adap->dev;
d43272a4 3374 struct dib0700_state *st = dev->priv;
8abe4a0a
MCC		 3375 struct dib0700_adapter_state *state = adap->priv;
3376
3377 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3378 return -ENODEV;
2b05b881
JS		 3379
3380 if (adap->id == 0) {
3381 stk7070pd_init(dev);
3382
3383 /* turn the power LED on, the other two off (just in case) */
3384 dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
3385 dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
3386 dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
3387
8abe4a0a 3388 if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
2b05b881 3389 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3390 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
2b05b881 3391 __func__);
eb0c1994 3392 dvb_detach(state->dib7000p_ops.set_wbd_ref);
2b05b881
JS		 3393 return -ENODEV;
3394 }
3395 }
3396
8abe4a0a 3397 adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
2b05b881
JS		 3398 adap->id == 0 ? 0x80 : 0x82,
3399 &stk7070pd_dib7000p_config[adap->id]);
d43272a4
JS		 3400
3401 if (adap->fe_adap[0].fe == NULL)
3402 return -ENODEV;
3403
3404 st->read_status = adap->fe_adap[0].fe->ops.read_status;
3405 adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
3406 st->sleep = adap->fe_adap[0].fe->ops.sleep;
3407 adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
3408
3409 return 0;
2b05b881
JS		 3410}
3411
cb22cb52
DH		 3412/* S5H1411 */
3413static struct s5h1411_config pinnacle_801e_config = {
3414 .output_mode = S5H1411_PARALLEL_OUTPUT,
3415 .gpio = S5H1411_GPIO_OFF,
ad05ff09 3416 .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK,
cb22cb52
DH		 3417 .qam_if = S5H1411_IF_44000,
3418 .vsb_if = S5H1411_IF_44000,
3419 .inversion = S5H1411_INVERSION_OFF,
3420 .status_mode = S5H1411_DEMODLOCKING
3421};
3422
3423/* Pinnacle PCTV HD Pro 801e GPIOs map:
3424 GPIO0 - currently unknown
3425 GPIO1 - xc5000 tuner reset
3426 GPIO2 - CX25843 sleep
3427 GPIO3 - currently unknown
3428 GPIO4 - currently unknown
3429 GPIO6 - currently unknown
3430 GPIO7 - currently unknown
3431 GPIO9 - currently unknown
3432 GPIO10 - CX25843 reset
3433 */
3434static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
3435{
3436 struct dib0700_state *st = adap->dev->priv;
3437
3438 /* Make use of the new i2c functions from FW 1.20 */
3439 st->fw_use_new_i2c_api = 1;
3440
3441 /* The s5h1411 requires the dib0700 to not be in master mode */
3442 st->disable_streaming_master_mode = 1;
3443
3444 /* All msleep values taken from Windows USB trace */
3445 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
3446 dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
3447 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3448 msleep(400);
3449 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3450 msleep(60);
3451 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3452 msleep(30);
3453 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3454 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3455 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3456 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3457 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
3458 msleep(30);
3459
3460 /* Put the CX25843 to sleep for now since we're in digital mode */
3461 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3462
3463 /* GPIOs are initialized, do the attach */
77eed219 3464 adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
cb22cb52 3465 &adap->dev->i2c_adap);
77eed219 3466 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
cb22cb52
DH		 3467}
3468
767f3b3b
MK		 3469static int dib0700_xc5000_tuner_callback(void *priv, int component,
3470 int command, int arg)
cb22cb52
DH		 3471{
3472 struct dvb_usb_adapter *adap = priv;
3473
79025a9e
DH		 3474 if (command == XC5000_TUNER_RESET) {
3475 /* Reset the tuner */
3476 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
f0f4633a 3477 msleep(10);
79025a9e 3478 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
f0f4633a 3479 msleep(10);
79025a9e
DH		 3480 } else {
3481 err("xc5000: unknown tuner callback command: %d\n", command);
3482 return -EINVAL;
3483 }
cb22cb52
DH		 3484
3485 return 0;
3486}
3487
3488static struct xc5000_config s5h1411_xc5000_tunerconfig = {
3489 .i2c_address = 0x64,
3490 .if_khz = 5380,
cb22cb52
DH		 3491};
3492
3493static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
3494{
79025a9e 3495 /* FIXME: generalize & move to common area */
77eed219 3496 adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
79025a9e 3497
77eed219 3498 return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
767f3b3b 3499 &s5h1411_xc5000_tunerconfig)
cb22cb52
DH		 3500 == NULL ? -ENODEV : 0;
3501}
3502
8d009a0c
DF		 3503static int dib0700_xc4000_tuner_callback(void *priv, int component,
3504 int command, int arg)
3505{
3506 struct dvb_usb_adapter *adap = priv;
8abe4a0a 3507 struct dib0700_adapter_state *state = adap->priv;
8d009a0c
DF		 3508
3509 if (command == XC4000_TUNER_RESET) {
3510 /* Reset the tuner */
8abe4a0a 3511 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
8d009a0c 3512 msleep(10);
8abe4a0a 3513 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
8d009a0c
DF		 3514 } else {
3515 err("xc4000: unknown tuner callback command: %d\n", command);
3516 return -EINVAL;
3517 }
3518
3519 return 0;
3520}
3521
8583fc83
DH		 3522static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
3523 .band_caps = BAND_UHF | BAND_VHF,
3524 .setup = 0x64,
3525 .inv_gain = 0x02c8,
3526 .time_stabiliz = 0x15,
3527 .alpha_level = 0x00,
3528 .thlock = 0x76,
3529 .wbd_inv = 0x01,
3530 .wbd_ref = 0x0b33,
3531 .wbd_sel = 0x00,
3532 .wbd_alpha = 0x02,
3533 .agc1_max = 0x00,
3534 .agc1_min = 0x00,
3535 .agc2_max = 0x9b26,
3536 .agc2_min = 0x26ca,
3537 .agc1_pt1 = 0x00,
3538 .agc1_pt2 = 0x00,
3539 .agc1_pt3 = 0x00,
3540 .agc1_slope1 = 0x00,
3541 .agc1_slope2 = 0x00,
3542 .agc2_pt1 = 0x00,
3543 .agc2_pt2 = 0x80,
3544 .agc2_slope1 = 0x1d,
3545 .agc2_slope2 = 0x1d,
2df12510 3546 .alpha_mant = 0x11,
8583fc83
DH		 3547 .alpha_exp = 0x1b,
3548 .beta_mant = 0x17,
3549 .beta_exp = 0x33,
3550 .perform_agc_softsplit = 0x00,
3551};
3552
f1c78d34 3553static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
09628b2c
MCC		 3554 .internal = 60000,
3555 .sampling = 30000,
3556 .pll_prediv = 1,
3557 .pll_ratio = 8,
3558 .pll_range = 3,
3559 .pll_reset = 1,
3560 .pll_bypass = 0,
3561 .enable_refdiv = 0,
3562 .bypclk_div = 0,
3563 .IO_CLK_en_core = 1,
3564 .ADClkSrc = 1,
3565 .modulo = 0,
3566 .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
3567 .ifreq = 39370534,
3568 .timf = 20452225,
3569 .xtal_hz = 30000000
f1c78d34
DH		 3570};
3571
01f16263
DH		 3572/* FIXME: none of these inputs are validated yet */
3573static struct dib7000p_config pctv_340e_config = {
62956ced 3574 .output_mpeg2_in_188_bytes = 1,
01f16263
DH		 3575
3576 .agc_config_count = 1,
8583fc83 3577 .agc = &stk7700p_7000p_xc4000_agc_config,
f1c78d34 3578 .bw = &stk7700p_xc4000_pll_config,
01f16263 3579
01f16263
DH		 3580 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
3581 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
3582 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
3583};
3584
3585/* PCTV 340e GPIOs map:
3586 dib0700:
3587 GPIO2 - CX25843 sleep
3588 GPIO3 - CS5340 reset
3589 GPIO5 - IRD
3590 GPIO6 - Power Supply
3591 GPIO8 - LNA (1=off 0=on)
3592 GPIO10 - CX25843 reset
3593 dib7000:
3594 GPIO8 - xc4000 reset
3595 */
3596static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
3597{
3598 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3599 struct dib0700_adapter_state *state = adap->priv;
3600
3601 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3602 return -ENODEV;
01f16263
DH		 3603
3604 /* Power Supply on */
3605 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3606 msleep(50);
3607 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3608 msleep(100); /* Allow power supply to settle before probing */
3609
3610 /* cx25843 reset */
3611 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3612 msleep(1); /* cx25843 datasheet say 350us required */
3613 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3614
3615 /* LNA off for now */
3616 dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
3617
3618 /* Put the CX25843 to sleep for now since we're in digital mode */
3619 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3620
3621 /* FIXME: not verified yet */
3622 dib0700_ctrl_clock(adap->dev, 72, 1);
3623
2750d9c3
DH		 3624 msleep(500);
3625
8abe4a0a 3626 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
01f16263 3627 /* Demodulator not found for some reason? */
eb0c1994 3628 dvb_detach(state->dib7000p_ops.set_wbd_ref);
01f16263
DH		 3629 return -ENODEV;
3630 }
3631
8abe4a0a 3632 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
01f16263
DH		 3633 &pctv_340e_config);
3634 st->is_dib7000pc = 1;
3635
77eed219 3636 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01f16263
DH		 3637}
3638
8583fc83 3639static struct xc4000_config dib7000p_xc4000_tunerconfig = {
8edeb6eb 3640 .i2c_address = 0x61,
3641 .default_pm = 1,
3642 .dvb_amplitude = 0,
3643 .set_smoothedcvbs = 0,
3644 .if_khz = 5400
8d009a0c
DF		 3645};
3646
3647static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
3648{
59d0c37b 3649 struct i2c_adapter *tun_i2c;
8abe4a0a 3650 struct dib0700_adapter_state *state = adap->priv;
59d0c37b
DH		 3651
3652 /* The xc4000 is not on the main i2c bus */
8abe4a0a 3653 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
59d0c37b
DH		 3654 DIBX000_I2C_INTERFACE_TUNER, 1);
3655 if (tun_i2c == NULL) {
941830c9 3656 printk(KERN_ERR "Could not reach tuner i2c bus\n");
59d0c37b
DH		 3657 return 0;
3658 }
3659
3660 /* Setup the reset callback */
77eed219 3661 adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
8d009a0c 3662
77eed219 3663 return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
8583fc83 3664 &dib7000p_xc4000_tunerconfig)
8d009a0c
DF		 3665 == NULL ? -ENODEV : 0;
3666}
3667
ce904bcb
MK		 3668static struct lgdt3305_config hcw_lgdt3305_config = {
3669 .i2c_addr = 0x0e,
3670 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
3671 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
3672 .tpvalid_polarity = LGDT3305_TP_VALID_LOW,
3673 .deny_i2c_rptr = 0,
3674 .spectral_inversion = 1,
3675 .qam_if_khz = 6000,
3676 .vsb_if_khz = 6000,
3677 .usref_8vsb = 0x0500,
3678};
3679
3680static struct mxl5007t_config hcw_mxl5007t_config = {
3681 .xtal_freq_hz = MxL_XTAL_25_MHZ,
3682 .if_freq_hz = MxL_IF_6_MHZ,
3683 .invert_if = 1,
3684};
3685
3686/* TIGER-ATSC map:
3687 GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
3688 GPIO1 - ANT_SEL (H: VPA, L: MCX)
3689 GPIO4 - SCL2
3690 GPIO6 - EN_TUNER
3691 GPIO7 - SDA2
3692 GPIO10 - DEM_RST
3693
3694 MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
3695 */
3696static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
3697{
3698 struct dib0700_state *st = adap->dev->priv;
3699
3700 /* Make use of the new i2c functions from FW 1.20 */
3701 st->fw_use_new_i2c_api = 1;
3702
3703 st->disable_streaming_master_mode = 1;
3704
3705 /* fe power enable */
3706 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3707 msleep(30);
3708 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3709 msleep(30);
3710
3711 /* demod reset */
3712 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3713 msleep(30);
3714 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3715 msleep(30);
3716 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3717 msleep(30);
3718
77eed219 3719 adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
ce904bcb
MK		 3720 &hcw_lgdt3305_config,
3721 &adap->dev->i2c_adap);
3722
77eed219 3723 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ce904bcb
MK		 3724}
3725
3726static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
3727{
77eed219 3728 return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
ce904bcb
MK		 3729 &adap->dev->i2c_adap, 0x60,
3730 &hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
3731}
3732
c4d84547
OS		 3733static int xbox_one_attach(struct dvb_usb_adapter *adap)
3734{
3735 struct dib0700_state *st = adap->dev->priv;
3736 struct i2c_client *client_demod, *client_tuner;
3737 struct dvb_usb_device *d = adap->dev;
3738 struct mn88472_config mn88472_config = { };
3739 struct tda18250_config tda18250_config;
3740 struct i2c_board_info info;
3741
3742 st->fw_use_new_i2c_api = 1;
3743 st->disable_streaming_master_mode = 1;
3744
3745 /* fe power enable */
3746 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3747 msleep(30);
3748 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3749 msleep(30);
3750
3751 /* demod reset */
3752 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3753 msleep(30);
3754 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3755 msleep(30);
3756 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3757 msleep(30);
3758
3759 /* attach demod */
3760 mn88472_config.fe = &adap->fe_adap[0].fe;
3761 mn88472_config.i2c_wr_max = 22;
3762 mn88472_config.xtal = 20500000;
3763 mn88472_config.ts_mode = PARALLEL_TS_MODE;
3764 mn88472_config.ts_clock = FIXED_TS_CLOCK;
3765 memset(&info, 0, sizeof(struct i2c_board_info));
c0decac1 3766 strscpy(info.type, "mn88472", I2C_NAME_SIZE);
c4d84547
OS		 3767 info.addr = 0x18;
3768 info.platform_data = &mn88472_config;
3769 request_module(info.type);
3770 client_demod = i2c_new_device(&d->i2c_adap, &info);
3771 if (client_demod == NULL || client_demod->dev.driver == NULL)
3772 goto fail_demod_device;
3773 if (!try_module_get(client_demod->dev.driver->owner))
3774 goto fail_demod_module;
3775
3776 st->i2c_client_demod = client_demod;
3777
3778 adap->fe_adap[0].fe = mn88472_config.get_dvb_frontend(client_demod);
3779
3780 /* attach tuner */
3781 memset(&tda18250_config, 0, sizeof(tda18250_config));
3782 tda18250_config.if_dvbt_6 = 3950;
3783 tda18250_config.if_dvbt_7 = 4450;
3784 tda18250_config.if_dvbt_8 = 4950;
3785 tda18250_config.if_dvbc_6 = 4950;
3786 tda18250_config.if_dvbc_8 = 4950;
3787 tda18250_config.if_atsc = 4079;
3788 tda18250_config.loopthrough = true;
3789 tda18250_config.xtal_freq = TDA18250_XTAL_FREQ_27MHZ;
3790 tda18250_config.fe = adap->fe_adap[0].fe;
3791
3792 memset(&info, 0, sizeof(struct i2c_board_info));
c0decac1 3793 strscpy(info.type, "tda18250", I2C_NAME_SIZE);
c4d84547
OS		 3794 info.addr = 0x60;
3795 info.platform_data = &tda18250_config;
3796
3797 request_module(info.type);
3798 client_tuner = i2c_new_device(&adap->dev->i2c_adap, &info);
3799 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
3800 goto fail_tuner_device;
3801 if (!try_module_get(client_tuner->dev.driver->owner))
3802 goto fail_tuner_module;
3803
3804 st->i2c_client_tuner = client_tuner;
3805 return 0;
3806
3807fail_tuner_module:
3808 i2c_unregister_device(client_tuner);
3809fail_tuner_device:
3810 module_put(client_demod->dev.driver->owner);
3811fail_demod_module:
3812 i2c_unregister_device(client_demod);
3813fail_demod_device:
3814 return -ENODEV;
3815}
3816
ce904bcb 3817
01373a5c 3818/* DVB-USB and USB stuff follows */
b7f54910 3819struct usb_device_id dib0700_usb_id_table[] = {
01373a5c 3820/* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) },
6ca8f0b9
AC		 3821 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) },
3822 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) },
3823 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) },
3824 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) },
01373a5c 3825/* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) },
6ca8f0b9
AC		 3826 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) },
3827 { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) },
3828 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) },
3829 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) },
01373a5c 3830/* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) },
6ca8f0b9
AC		 3831 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) },
3832 { USB_DEVICE(USB_VID_TERRATEC,
3833 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) },
3834 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) },
3835 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) },
01373a5c 3836/* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) },
6ca8f0b9
AC		 3837 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) },
3838 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) },
3839 { USB_DEVICE(USB_VID_PINNACLE,
3840 USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) },
3841 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) },
fa3b877e 3842/* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) },
6ca8f0b9
AC		 3843 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U7000) },
3844 { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ARTEC_T14BR) },
3845 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000) },
3846 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3100) },
3847/* 25 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_3) },
3848 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_MYTV_T) },
3849 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_USB_XE) },
3850 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_EXPRESSCARD_320CX) },
3851 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV72E) },
3852/* 30 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73E) },
3853 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_EC372S) },
3854 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) },
dc88807e 3855 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) },
5da4e2c6 3856 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) },
af2a887c 3857/* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
9a0c04a1 3858 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) },
17a370bc 3859 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U8000) },
8751aaa6 3860 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700PH) },
5769743a 3861 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000H) },
cb22cb52 3862/* 40 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E) },
d2fc3bfc 3863 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E_SE) },
bb1b082e 3864 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_EXPRESS) },
db4b2d19
NF		 3865 { USB_DEVICE(USB_VID_TERRATEC,
3866 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2) },
0a6e1ed2 3867 { USB_DEVICE(USB_VID_SONY, USB_PID_SONY_PLAYTV) },
9abb6e6f 3868/* 45 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_PD378S) },
ce904bcb
MK		 3869 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC) },
3870 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC_B210) },
16ba1ee5 3871 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_MC770) },
919a5488 3872 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT) },
513846ec 3873/* 50 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_Dlx) },
f0f4ae76 3874 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_H) },
a9b8fe30
PB		 3875 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T3) },
3876 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T5) },
c53d83cc 3877 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D) },
74b76f21
OG		 3878/* 55 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D_2) },
3879 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73A) },
e414753c
PB		 3880 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV73ESE) },
3881 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV282E) },
d300bd69 3882 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) },
db48138f 3883/* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) },
ba3fe3a9
PB		 3884 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) },
3885 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) },
3bfb317f 3886 { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) },
8a378e85 3887 { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) },
20232c47 3888/* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) },
e414753c 3889 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) },
03245a5e 3890 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096GP) },
84e2f037 3891 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DIVERSITY) },
be9bae10
OG		 3892 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090M) },
3893/* 70 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM8096MD) },
3894 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090MD) },
3895 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM7090) },
3896 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) },
498e677c 3897 { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) },
d1402307 3898/* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) },
8d009a0c 3899 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) },
33fb1681 3900 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
f45f513a
OG		 3901 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790P) },
3902 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
3903/* 80 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_2) },
c859e6ef
MK		 3904 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E) },
3905 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E_SE) },
91be260f 3906 { USB_DEVICE(USB_VID_PCTV, USB_PID_DIBCOM_STK8096PVR) },
ec788795 3907 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096PVR) },
c4d84547
OS		 3908/* 85 */{ USB_DEVICE(USB_VID_HAMA, USB_PID_HAMA_DVBT_HYBRID) },
3909 { USB_DEVICE(USB_VID_MICROSOFT, USB_PID_XBOX_ONE_TUNER) },
6ca8f0b9 3910 { 0 } /* Terminating entry */
b7f54910
PB		 3911};
3912MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
3913
3914#define DIB0700_DEFAULT_DEVICE_PROPERTIES \
3915 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
3916 .usb_ctrl = DEVICE_SPECIFIC, \
bdc203e1 3917 .firmware = "dvb-usb-dib0700-1.20.fw", \
b7f54910 3918 .download_firmware = dib0700_download_firmware, \
6958effe 3919 .no_reconnect = 1, \
b7f54910 3920 .size_of_priv = sizeof(struct dib0700_state), \
6958effe
PB		 3921 .i2c_algo = &dib0700_i2c_algo, \
3922 .identify_state = dib0700_identify_state
b7f54910
PB		 3923
3924#define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
3925 .streaming_ctrl = dib0700_streaming_ctrl, \
3926 .stream = { \
3927 .type = USB_BULK, \
3928 .count = 4, \
3929 .endpoint = ep, \
3930 .u = { \
3931 .bulk = { \
3932 .buffersize = 39480, \
3933 } \
3934 } \
3935 }
3936
0fae1997
MCC		 3937#define DIB0700_NUM_FRONTENDS(n) \
3938 .num_frontends = n, \
3939 .size_of_priv = sizeof(struct dib0700_adapter_state)
3940
b7f54910
PB		 3941struct dvb_usb_device_properties dib0700_devices[] = {
3942 {
3943 DIB0700_DEFAULT_DEVICE_PROPERTIES,
3944
3945 .num_adapters = 1,
3946 .adapter = {
3947 {
0fae1997 3948 DIB0700_NUM_FRONTENDS(1),
77eed219 3949 .fe = {{
f8731f4d
OG		 3950 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3951 .pid_filter_count = 32,
e192a7cf
OG		 3952 .pid_filter = stk7700p_pid_filter,
3953 .pid_filter_ctrl = stk7700p_pid_filter_ctrl,
b7f54910
PB		 3954 .frontend_attach = stk7700p_frontend_attach,
3955 .tuner_attach = stk7700p_tuner_attach,
3956
3957 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3958 }},
b7f54910
PB		 3959 },
3960 },
3961
67053a40 3962 .num_device_descs = 8,
b7f54910
PB		 3963 .devices = {
3964 { "DiBcom STK7700P reference design",
49a1376c 3965 { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] },
b7f54910
PB		 3966 { NULL },
3967 },
3968 { "Hauppauge Nova-T Stick",
f9aeba45 3969 { &dib0700_usb_id_table[4], &dib0700_usb_id_table[9], NULL },
b7f54910
PB		 3970 { NULL },
3971 },
3972 { "AVerMedia AVerTV DVB-T Volar",
ced8feca 3973 { &dib0700_usb_id_table[5], &dib0700_usb_id_table[10] },
b7f54910
PB		 3974 { NULL },
3975 },
49a1376c 3976 { "Compro Videomate U500",
1f8ca4b3 3977 { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] },
49a1376c 3978 { NULL },
0ce215e1
HS		 3979 },
3980 { "Uniwill STK7700P based (Hama and others)",
3981 { &dib0700_usb_id_table[7], NULL },
3982 { NULL },
8637a875
MK		 3983 },
3984 { "Leadtek Winfast DTV Dongle (STK7700P based)",
1e13c8f0 3985 { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
8637a875 3986 { NULL },
fa3b877e
JS		 3987 },
3988 { "AVerMedia AVerTV DVB-T Express",
3989 { &dib0700_usb_id_table[20] },
3990 { NULL },
67053a40 3991 },
67053a40 3992 { "Gigabyte U7000",
3993 { &dib0700_usb_id_table[21], NULL },
3994 { NULL },
49a1376c 3995 }
b1139e35
DS		 3996 },
3997
72b39310 3998 .rc.core = {
f72a27b8 3999 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4000 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4001 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4002 .allowed_protos = RC_PROTO_BIT_RC5 |
4003 RC_PROTO_BIT_RC6_MCE |
4004 RC_PROTO_BIT_NEC,
d8b4b582 4005 .change_protocol = dib0700_change_protocol,
f72a27b8 4006 },
b7f54910
PB		 4007 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4008
4009 .num_adapters = 2,
4010 .adapter = {
4011 {
0fae1997 4012 DIB0700_NUM_FRONTENDS(1),
77eed219 4013 .fe = {{
b7f54910
PB		 4014 .frontend_attach = bristol_frontend_attach,
4015 .tuner_attach = bristol_tuner_attach,
4016
4017 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4018 }},
b7f54910 4019 }, {
0fae1997 4020 DIB0700_NUM_FRONTENDS(1),
77eed219 4021 .fe = {{
b7f54910
PB		 4022 .frontend_attach = bristol_frontend_attach,
4023 .tuner_attach = bristol_tuner_attach,
4024
4025 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4026 }},
b7f54910
PB		 4027 }
4028 },
4029
4030 .num_device_descs = 1,
4031 .devices = {
4032 { "Hauppauge Nova-T 500 Dual DVB-T",
49a1376c 4033 { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL },
b7f54910
PB		 4034 { NULL },
4035 },
82f3d559
JG		 4036 },
4037
72b39310 4038 .rc.core = {
f72a27b8 4039 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4040 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4041 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4042 .allowed_protos = RC_PROTO_BIT_RC5 |
4043 RC_PROTO_BIT_RC6_MCE |
4044 RC_PROTO_BIT_NEC,
d8b4b582 4045 .change_protocol = dib0700_change_protocol,
f72a27b8 4046 },
54d75eba
OD		 4047 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4048
4049 .num_adapters = 2,
4050 .adapter = {
4051 {
0fae1997 4052 DIB0700_NUM_FRONTENDS(1),
77eed219 4053 .fe = {{
f8731f4d
OG		 4054 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4055 .pid_filter_count = 32,
4056 .pid_filter = stk70x0p_pid_filter,
4057 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 4058 .frontend_attach = stk7700d_frontend_attach,
4059 .tuner_attach = stk7700d_tuner_attach,
4060
4061 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4062 }},
54d75eba 4063 }, {
0fae1997 4064 DIB0700_NUM_FRONTENDS(1),
77eed219 4065 .fe = {{
f8731f4d
OG		 4066 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4067 .pid_filter_count = 32,
4068 .pid_filter = stk70x0p_pid_filter,
4069 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 4070 .frontend_attach = stk7700d_frontend_attach,
4071 .tuner_attach = stk7700d_tuner_attach,
4072
4073 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4074 }},
54d75eba
OD		 4075 }
4076 },
4077
200e861c 4078 .num_device_descs = 5,
54d75eba
OD		 4079 .devices = {
4080 { "Pinnacle PCTV 2000e",
4081 { &dib0700_usb_id_table[11], NULL },
4082 { NULL },
4083 },
4084 { "Terratec Cinergy DT XS Diversity",
4085 { &dib0700_usb_id_table[12], NULL },
4086 { NULL },
4087 },
faebb914 4088 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
54d75eba
OD		 4089 { &dib0700_usb_id_table[13], NULL },
4090 { NULL },
4091 },
01373a5c 4092 { "DiBcom STK7700D reference design",
b6884a17
PB		 4093 { &dib0700_usb_id_table[14], NULL },
4094 { NULL },
bb1b082e 4095 },
200e861c
JW		 4096 { "YUAN High-Tech DiBcom STK7700D",
4097 { &dib0700_usb_id_table[55], NULL },
4098 { NULL },
4099 },
bb1b082e 4100
54d75eba 4101 },
82f3d559 4102
72b39310 4103 .rc.core = {
f72a27b8 4104 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4105 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4106 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4107 .allowed_protos = RC_PROTO_BIT_RC5 |
4108 RC_PROTO_BIT_RC6_MCE |
4109 RC_PROTO_BIT_NEC,
d8b4b582 4110 .change_protocol = dib0700_change_protocol,
f72a27b8 4111 },
132c3188
DG		 4112 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4113
4114 .num_adapters = 1,
4115 .adapter = {
4116 {
0fae1997 4117 DIB0700_NUM_FRONTENDS(1),
77eed219 4118 .fe = {{
f8731f4d
OG		 4119 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4120 .pid_filter_count = 32,
4121 .pid_filter = stk70x0p_pid_filter,
4122 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
132c3188
DG		 4123 .frontend_attach = stk7700P2_frontend_attach,
4124 .tuner_attach = stk7700d_tuner_attach,
4125
4126 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4127 }},
132c3188
DG		 4128 },
4129 },
4130
bb1b082e 4131 .num_device_descs = 3,
132c3188
DG		 4132 .devices = {
4133 { "ASUS My Cinema U3000 Mini DVBT Tuner",
4134 { &dib0700_usb_id_table[23], NULL },
4135 { NULL },
4136 },
6ca8f0b9
AC		 4137 { "Yuan EC372S",
4138 { &dib0700_usb_id_table[31], NULL },
4139 { NULL },
bb1b082e
YA		 4140 },
4141 { "Terratec Cinergy T Express",
4142 { &dib0700_usb_id_table[42], NULL },
4143 { NULL },
6ca8f0b9 4144 }
48aa7391
CR		 4145 },
4146
72b39310 4147 .rc.core = {
f72a27b8 4148 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4149 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4150 .module_name = "dib0700",
0ffd1ab3 4151 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4152 .allowed_protos = RC_PROTO_BIT_RC5 |
4153 RC_PROTO_BIT_RC6_MCE |
4154 RC_PROTO_BIT_NEC,
d8b4b582 4155 .change_protocol = dib0700_change_protocol,
f72a27b8 4156 },
01373a5c
PB		 4157 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4158
4159 .num_adapters = 1,
4160 .adapter = {
4161 {
0fae1997 4162 DIB0700_NUM_FRONTENDS(1),
77eed219 4163 .fe = {{
f8731f4d
OG		 4164 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4165 .pid_filter_count = 32,
4166 .pid_filter = stk70x0p_pid_filter,
4167 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
01373a5c
PB		 4168 .frontend_attach = stk7070p_frontend_attach,
4169 .tuner_attach = dib7070p_tuner_attach,
4170
4171 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4172 }},
01373a5c
PB		 4173 },
4174 },
4175
0bc9d39b 4176 .num_device_descs = 12,
01373a5c
PB		 4177 .devices = {
4178 { "DiBcom STK7070P reference design",
4179 { &dib0700_usb_id_table[15], NULL },
4180 { NULL },
4181 },
4182 { "Pinnacle PCTV DVB-T Flash Stick",
4183 { &dib0700_usb_id_table[16], NULL },
4184 { NULL },
4185 },
7999a816
YL		 4186 { "Artec T14BR DVB-T",
4187 { &dib0700_usb_id_table[22], NULL },
4188 { NULL },
132c3188
DG		 4189 },
4190 { "ASUS My Cinema U3100 Mini DVBT Tuner",
4191 { &dib0700_usb_id_table[24], NULL },
4192 { NULL },
4193 },
c7637b1a
TT		 4194 { "Hauppauge Nova-T Stick",
4195 { &dib0700_usb_id_table[25], NULL },
4196 { NULL },
4197 },
13b83b5d
DS		 4198 { "Hauppauge Nova-T MyTV.t",
4199 { &dib0700_usb_id_table[26], NULL },
4200 { NULL },
4201 },
6ca8f0b9
AC		 4202 { "Pinnacle PCTV 72e",
4203 { &dib0700_usb_id_table[29], NULL },
4204 { NULL },
4205 },
4206 { "Pinnacle PCTV 73e",
4207 { &dib0700_usb_id_table[30], NULL },
4208 { NULL },
4209 },
919a5488
KF		 4210 { "Elgato EyeTV DTT",
4211 { &dib0700_usb_id_table[49], NULL },
4212 { NULL },
4213 },
9abb6e6f
PT		 4214 { "Yuan PD378S",
4215 { &dib0700_usb_id_table[45], NULL },
4216 { NULL },
4217 },
513846ec
AS		 4218 { "Elgato EyeTV Dtt Dlx PD378S",
4219 { &dib0700_usb_id_table[50], NULL },
4220 { NULL },
4221 },
0bc9d39b 4222 { "Elgato EyeTV DTT rev. 2",
f45f513a 4223 { &dib0700_usb_id_table[80], NULL },
0bc9d39b
GG		 4224 { NULL },
4225 },
c7637b1a
TT		 4226 },
4227
72b39310 4228 .rc.core = {
f72a27b8 4229 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4230 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4231 .module_name = "dib0700",
0ffd1ab3 4232 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4233 .allowed_protos = RC_PROTO_BIT_RC5 |
4234 RC_PROTO_BIT_RC6_MCE |
4235 RC_PROTO_BIT_NEC,
d8b4b582 4236 .change_protocol = dib0700_change_protocol,
f72a27b8 4237 },
74b76f21
OG		 4238 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4239
4240 .num_adapters = 1,
4241 .adapter = {
4242 {
0fae1997 4243 DIB0700_NUM_FRONTENDS(1),
77eed219 4244 .fe = {{
648732fc
MCC		 4245 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4246 .pid_filter_count = 32,
4247 .pid_filter = stk70x0p_pid_filter,
4248 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
74b76f21
OG		 4249 .frontend_attach = stk7070p_frontend_attach,
4250 .tuner_attach = dib7070p_tuner_attach,
4251
4252 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4253 }},
74b76f21
OG		 4254 },
4255 },
4256
20232c47 4257 .num_device_descs = 3,
74b76f21
OG		 4258 .devices = {
4259 { "Pinnacle PCTV 73A",
4260 { &dib0700_usb_id_table[56], NULL },
4261 { NULL },
4262 },
4263 { "Pinnacle PCTV 73e SE",
20232c47 4264 { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL },
74b76f21
OG		 4265 { NULL },
4266 },
4267 { "Pinnacle PCTV 282e",
20232c47 4268 { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL },
74b76f21
OG		 4269 { NULL },
4270 },
4271 },
4272
72b39310 4273 .rc.core = {
f72a27b8 4274 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4275 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4276 .module_name = "dib0700",
0ffd1ab3 4277 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4278 .allowed_protos = RC_PROTO_BIT_RC5 |
4279 RC_PROTO_BIT_RC6_MCE |
4280 RC_PROTO_BIT_NEC,
d8b4b582 4281 .change_protocol = dib0700_change_protocol,
f72a27b8 4282 },
01373a5c
PB		 4283 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4284
4285 .num_adapters = 2,
4286 .adapter = {
4287 {
0fae1997 4288 DIB0700_NUM_FRONTENDS(1),
77eed219 4289 .fe = {{
f8731f4d
OG		 4290 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4291 .pid_filter_count = 32,
4292 .pid_filter = stk70x0p_pid_filter,
4293 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4294 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4295 .tuner_attach = dib7070p_tuner_attach,
4296
4297 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4298 }},
01373a5c 4299 }, {
0fae1997 4300 DIB0700_NUM_FRONTENDS(1),
77eed219 4301 .fe = {{
f8731f4d
OG		 4302 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4303 .pid_filter_count = 32,
4304 .pid_filter = stk70x0p_pid_filter,
4305 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4306 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4307 .tuner_attach = dib7070p_tuner_attach,
4308
4309 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4310 }},
01373a5c
PB		 4311 }
4312 },
4313
c859e6ef 4314 .num_device_descs = 3,
9b6ba57b
JS		 4315 .devices = {
4316 { "Hauppauge Nova-TD Stick (52009)",
4317 { &dib0700_usb_id_table[35], NULL },
4318 { NULL },
4319 },
c859e6ef
MK		 4320 { "PCTV 2002e",
4321 { &dib0700_usb_id_table[81], NULL },
4322 { NULL },
4323 },
4324 { "PCTV 2002e SE",
4325 { &dib0700_usb_id_table[82], NULL },
4326 { NULL },
4327 },
9b6ba57b
JS		 4328 },
4329
4330 .rc.core = {
4331 .rc_interval = DEFAULT_RC_INTERVAL,
4332 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4333 .module_name = "dib0700",
4334 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4335 .allowed_protos = RC_PROTO_BIT_RC5 |
4336 RC_PROTO_BIT_RC6_MCE |
4337 RC_PROTO_BIT_NEC,
9b6ba57b
JS		 4338 .change_protocol = dib0700_change_protocol,
4339 },
4340 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4341
4342 .num_adapters = 2,
4343 .adapter = {
4344 {
0fae1997 4345 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4346 .fe = {{
4347 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4348 .pid_filter_count = 32,
4349 .pid_filter = stk70x0p_pid_filter,
4350 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4351 .frontend_attach = stk7070pd_frontend_attach0,
4352 .tuner_attach = dib7070p_tuner_attach,
4353
4354 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4355 }},
9b6ba57b 4356 }, {
0fae1997 4357 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4358 .fe = {{
4359 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4360 .pid_filter_count = 32,
4361 .pid_filter = stk70x0p_pid_filter,
4362 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4363 .frontend_attach = stk7070pd_frontend_attach1,
4364 .tuner_attach = dib7070p_tuner_attach,
4365
4366 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4367 }},
9b6ba57b
JS		 4368 }
4369 },
4370
4371 .num_device_descs = 5,
01373a5c
PB		 4372 .devices = {
4373 { "DiBcom STK7070PD reference design",
4374 { &dib0700_usb_id_table[17], NULL },
4375 { NULL },
4376 },
4377 { "Pinnacle PCTV Dual DVB-T Diversity Stick",
4378 { &dib0700_usb_id_table[18], NULL },
4379 { NULL },
d01eb2dc 4380 },
9a0c04a1
MK		 4381 { "Hauppauge Nova-TD-500 (84xxx)",
4382 { &dib0700_usb_id_table[36], NULL },
4383 { NULL },
db4b2d19 4384 },
a9b8fe30
PB		 4385 { "Terratec Cinergy DT USB XS Diversity/ T5",
4386 { &dib0700_usb_id_table[43],
4387 &dib0700_usb_id_table[53], NULL},
db4b2d19 4388 { NULL },
0a6e1ed2 4389 },
4390 { "Sony PlayTV",
4391 { &dib0700_usb_id_table[44], NULL },
4392 { NULL },
84e2f037 4393 },
5af935cc
MCC		 4394 },
4395
4396 .rc.core = {
4397 .rc_interval = DEFAULT_RC_INTERVAL,
4398 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4399 .module_name = "dib0700",
0ffd1ab3 4400 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4401 .allowed_protos = RC_PROTO_BIT_RC5 |
4402 RC_PROTO_BIT_RC6_MCE |
4403 RC_PROTO_BIT_NEC,
d8b4b582 4404 .change_protocol = dib0700_change_protocol,
5af935cc
MCC		 4405 },
4406 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4407
4408 .num_adapters = 2,
4409 .adapter = {
4410 {
0fae1997 4411 DIB0700_NUM_FRONTENDS(1),
77eed219 4412 .fe = {{
5af935cc
MCC		 4413 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4414 .pid_filter_count = 32,
4415 .pid_filter = stk70x0p_pid_filter,
4416 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4417 .frontend_attach = stk7070pd_frontend_attach0,
4418 .tuner_attach = dib7070p_tuner_attach,
4419
4420 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4421 }},
5af935cc 4422 }, {
0fae1997 4423 DIB0700_NUM_FRONTENDS(1),
77eed219 4424 .fe = {{
5af935cc
MCC		 4425 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4426 .pid_filter_count = 32,
4427 .pid_filter = stk70x0p_pid_filter,
4428 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4429 .frontend_attach = stk7070pd_frontend_attach1,
4430 .tuner_attach = dib7070p_tuner_attach,
4431
4432 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4433 }},
5af935cc
MCC		 4434 }
4435 },
4436
4437 .num_device_descs = 1,
4438 .devices = {
84e2f037
MM		 4439 { "Elgato EyeTV Diversity",
4440 { &dib0700_usb_id_table[68], NULL },
4441 { NULL },
4442 },
c985a8dc 4443 },
f72a27b8 4444
72b39310 4445 .rc.core = {
f72a27b8 4446 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4447 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4448 .module_name = "dib0700",
0ffd1ab3 4449 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4450 .allowed_protos = RC_PROTO_BIT_RC5 |
4451 RC_PROTO_BIT_RC6_MCE |
4452 RC_PROTO_BIT_NEC,
d8b4b582 4453 .change_protocol = dib0700_change_protocol,
f72a27b8 4454 },
6ca8f0b9
AC		 4455 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4456
4457 .num_adapters = 1,
4458 .adapter = {
4459 {
0fae1997 4460 DIB0700_NUM_FRONTENDS(1),
77eed219 4461 .fe = {{
f8731f4d
OG		 4462 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4463 .pid_filter_count = 32,
4464 .pid_filter = stk70x0p_pid_filter,
4465 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
6ca8f0b9
AC		 4466 .frontend_attach = stk7700ph_frontend_attach,
4467 .tuner_attach = stk7700ph_tuner_attach,
4468
4469 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4470 }},
6ca8f0b9
AC		 4471 },
4472 },
4473
430ae126 4474 .num_device_descs = 10,
6ca8f0b9
AC		 4475 .devices = {
4476 { "Terratec Cinergy HT USB XE",
4477 { &dib0700_usb_id_table[27], NULL },
4478 { NULL },
4479 },
4480 { "Pinnacle Expresscard 320cx",
4481 { &dib0700_usb_id_table[28], NULL },
4482 { NULL },
4483 },
4484 { "Terratec Cinergy HT Express",
4485 { &dib0700_usb_id_table[32], NULL },
4486 { NULL },
4487 },
17a370bc
FT		 4488 { "Gigabyte U8000-RH",
4489 { &dib0700_usb_id_table[37], NULL },
4490 { NULL },
4491 },
8751aaa6
DON		 4492 { "YUAN High-Tech STK7700PH",
4493 { &dib0700_usb_id_table[38], NULL },
4494 { NULL },
4495 },
5769743a
AC		 4496 { "Asus My Cinema-U3000Hybrid",
4497 { &dib0700_usb_id_table[39], NULL },
4498 { NULL },
4499 },
16ba1ee5
XL		 4500 { "YUAN High-Tech MC770",
4501 { &dib0700_usb_id_table[48], NULL },
4502 { NULL },
4503 },
f0f4ae76 4504 { "Leadtek WinFast DTV Dongle H",
4505 { &dib0700_usb_id_table[51], NULL },
4506 { NULL },
4507 },
c53d83cc
PH		 4508 { "YUAN High-Tech STK7700D",
4509 { &dib0700_usb_id_table[54], NULL },
4510 { NULL },
4511 },
430ae126
PO		 4512 { "Hama DVB=T Hybrid USB Stick",
4513 { &dib0700_usb_id_table[85], NULL },
4514 { NULL },
4515 },
6ca8f0b9 4516 },
f72a27b8 4517
72b39310 4518 .rc.core = {
f72a27b8 4519 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4520 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4521 .module_name = "dib0700",
0ffd1ab3 4522 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4523 .allowed_protos = RC_PROTO_BIT_RC5 |
4524 RC_PROTO_BIT_RC6_MCE |
4525 RC_PROTO_BIT_NEC,
d8b4b582 4526 .change_protocol = dib0700_change_protocol,
f72a27b8 4527 },
cb22cb52
DH		 4528 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4529 .num_adapters = 1,
4530 .adapter = {
4531 {
0fae1997 4532 DIB0700_NUM_FRONTENDS(1),
77eed219 4533 .fe = {{
cb22cb52
DH		 4534 .frontend_attach = s5h1411_frontend_attach,
4535 .tuner_attach = xc5000_tuner_attach,
4536
4537 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4538 }},
cb22cb52
DH		 4539 },
4540 },
4541
d2fc3bfc 4542 .num_device_descs = 2,
cb22cb52
DH		 4543 .devices = {
4544 { "Pinnacle PCTV HD Pro USB Stick",
4545 { &dib0700_usb_id_table[40], NULL },
4546 { NULL },
4547 },
d2fc3bfc
DH		 4548 { "Pinnacle PCTV HD USB Stick",
4549 { &dib0700_usb_id_table[41], NULL },
4550 { NULL },
4551 },
cb22cb52 4552 },
72b39310
MCC		 4553
4554 .rc.core = {
f72a27b8 4555 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4556 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4557 .module_name = "dib0700",
0ffd1ab3 4558 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4559 .allowed_protos = RC_PROTO_BIT_RC5 |
4560 RC_PROTO_BIT_RC6_MCE |
4561 RC_PROTO_BIT_NEC,
d8b4b582 4562 .change_protocol = dib0700_change_protocol,
f72a27b8 4563 },
ce904bcb
MK		 4564 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4565 .num_adapters = 1,
4566 .adapter = {
4567 {
0fae1997 4568 DIB0700_NUM_FRONTENDS(1),
77eed219 4569 .fe = {{
ce904bcb
MK		 4570 .frontend_attach = lgdt3305_frontend_attach,
4571 .tuner_attach = mxl5007t_tuner_attach,
4572
4573 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4574 }},
ce904bcb
MK		 4575 },
4576 },
4577
4578 .num_device_descs = 2,
4579 .devices = {
4580 { "Hauppauge ATSC MiniCard (B200)",
4581 { &dib0700_usb_id_table[46], NULL },
4582 { NULL },
4583 },
4584 { "Hauppauge ATSC MiniCard (B210)",
4585 { &dib0700_usb_id_table[47], NULL },
4586 { NULL },
4587 },
4588 },
d300bd69
OG		 4589 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4590
4591 .num_adapters = 1,
4592 .adapter = {
4593 {
0fae1997 4594 DIB0700_NUM_FRONTENDS(1),
77eed219 4595 .fe = {{
f8731f4d
OG		 4596 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4597 .pid_filter_count = 32,
4598 .pid_filter = stk70x0p_pid_filter,
4599 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
90e12cec 4600 .frontend_attach = stk7770p_frontend_attach,
d300bd69
OG		 4601 .tuner_attach = dib7770p_tuner_attach,
4602
4603 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4604 }},
d300bd69
OG		 4605 },
4606 },
4607
d1402307 4608 .num_device_descs = 4,
d300bd69
OG		 4609 .devices = {
4610 { "DiBcom STK7770P reference design",
4611 { &dib0700_usb_id_table[59], NULL },
4612 { NULL },
4613 },
1e13c8f0
PB		 4614 { "Terratec Cinergy T USB XXS (HD)/ T3",
4615 { &dib0700_usb_id_table[33],
4616 &dib0700_usb_id_table[52],
4617 &dib0700_usb_id_table[60], NULL},
db48138f
PB		 4618 { NULL },
4619 },
498e677c
LMF		 4620 { "TechniSat AirStar TeleStick 2",
4621 { &dib0700_usb_id_table[74], NULL },
4622 { NULL },
4623 },
d1402307
SE		 4624 { "Medion CTX1921 DVB-T USB",
4625 { &dib0700_usb_id_table[75], NULL },
4626 { NULL },
4627 },
d300bd69 4628 },
72b39310
MCC		 4629
4630 .rc.core = {
f72a27b8 4631 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4632 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4633 .module_name = "dib0700",
0ffd1ab3 4634 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4635 .allowed_protos = RC_PROTO_BIT_RC5 |
4636 RC_PROTO_BIT_RC6_MCE |
4637 RC_PROTO_BIT_NEC,
d8b4b582 4638 .change_protocol = dib0700_change_protocol,
f72a27b8 4639 },
ba3fe3a9
PB		 4640 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4641 .num_adapters = 1,
4642 .adapter = {
4643 {
0fae1997 4644 DIB0700_NUM_FRONTENDS(1),
77eed219 4645 .fe = {{
f8731f4d
OG		 4646 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4647 .pid_filter_count = 32,
03245a5e
OG		 4648 .pid_filter = stk80xx_pid_filter,
4649 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4650 .frontend_attach = stk807x_frontend_attach,
4651 .tuner_attach = dib807x_tuner_attach,
4652
4653 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4654 }},
ba3fe3a9
PB		 4655 },
4656 },
4657
8a378e85 4658 .num_device_descs = 3,
ba3fe3a9
PB		 4659 .devices = {
4660 { "DiBcom STK807xP reference design",
4661 { &dib0700_usb_id_table[62], NULL },
4662 { NULL },
4663 },
aaeab30f
MCC		 4664 { "Prolink Pixelview SBTVD",
4665 { &dib0700_usb_id_table[63], NULL },
4666 { NULL },
4667 },
8a378e85
F		 4668 { "EvolutePC TVWay+",
4669 { &dib0700_usb_id_table[64], NULL },
4670 { NULL },
4671 },
ba3fe3a9
PB		 4672 },
4673
72b39310 4674 .rc.core = {
f72a27b8 4675 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4676 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4677 .module_name = "dib0700",
0ffd1ab3 4678 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4679 .allowed_protos = RC_PROTO_BIT_RC5 |
4680 RC_PROTO_BIT_RC6_MCE |
4681 RC_PROTO_BIT_NEC,
d8b4b582 4682 .change_protocol = dib0700_change_protocol,
f72a27b8 4683 },
ba3fe3a9
PB		 4684 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4685 .num_adapters = 2,
4686 .adapter = {
4687 {
0fae1997 4688 DIB0700_NUM_FRONTENDS(1),
77eed219 4689 .fe = {{
f8731f4d
OG		 4690 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4691 .pid_filter_count = 32,
03245a5e
OG		 4692 .pid_filter = stk80xx_pid_filter,
4693 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4694 .frontend_attach = stk807xpvr_frontend_attach0,
4695 .tuner_attach = dib807x_tuner_attach,
4696
4697 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4698 }},
ba3fe3a9
PB		 4699 },
4700 {
0fae1997 4701 DIB0700_NUM_FRONTENDS(1),
77eed219 4702 .fe = {{
f8731f4d
OG		 4703 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4704 .pid_filter_count = 32,
03245a5e
OG		 4705 .pid_filter = stk80xx_pid_filter,
4706 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4707 .frontend_attach = stk807xpvr_frontend_attach1,
4708 .tuner_attach = dib807x_tuner_attach,
4709
4710 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4711 }},
ba3fe3a9
PB		 4712 },
4713 },
4714
4715 .num_device_descs = 1,
4716 .devices = {
4717 { "DiBcom STK807xPVR reference design",
4718 { &dib0700_usb_id_table[61], NULL },
4719 { NULL },
4720 },
4721 },
4722
72b39310 4723 .rc.core = {
f72a27b8 4724 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4725 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4726 .module_name = "dib0700",
0ffd1ab3 4727 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4728 .allowed_protos = RC_PROTO_BIT_RC5 |
4729 RC_PROTO_BIT_RC6_MCE |
4730 RC_PROTO_BIT_NEC,
d8b4b582 4731 .change_protocol = dib0700_change_protocol,
f72a27b8 4732 },
03245a5e
OG		 4733 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4734 .num_adapters = 1,
4735 .adapter = {
4736 {
0fae1997 4737 DIB0700_NUM_FRONTENDS(1),
77eed219 4738 .fe = {{
03245a5e
OG		 4739 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4740 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4741 .pid_filter_count = 32,
4742 .pid_filter = stk80xx_pid_filter,
4743 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4744 .frontend_attach = stk809x_frontend_attach,
4745 .tuner_attach = dib809x_tuner_attach,
4746
4747 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4748 }},
03245a5e
OG		 4749 },
4750 },
4751
4752 .num_device_descs = 1,
4753 .devices = {
4754 { "DiBcom STK8096GP reference design",
4755 { &dib0700_usb_id_table[67], NULL },
4756 { NULL },
4757 },
4758 },
4759
be9bae10
OG		 4760 .rc.core = {
4761 .rc_interval = DEFAULT_RC_INTERVAL,
4762 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4763 .module_name = "dib0700",
4764 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4765 .allowed_protos = RC_PROTO_BIT_RC5 |
4766 RC_PROTO_BIT_RC6_MCE |
4767 RC_PROTO_BIT_NEC,
be9bae10
OG		 4768 .change_protocol = dib0700_change_protocol,
4769 },
4770 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4771 .num_adapters = 1,
4772 .adapter = {
4773 {
0fae1997 4774 DIB0700_NUM_FRONTENDS(1),
77eed219 4775 .fe = {{
be9bae10
OG		 4776 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4777 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4778 .pid_filter_count = 32,
4779 .pid_filter = dib90x0_pid_filter,
4780 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4781 .frontend_attach = stk9090m_frontend_attach,
4782 .tuner_attach = dib9090_tuner_attach,
4783
4784 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4785 }},
be9bae10
OG		 4786 },
4787 },
4788
4789 .num_device_descs = 1,
4790 .devices = {
4791 { "DiBcom STK9090M reference design",
4792 { &dib0700_usb_id_table[69], NULL },
4793 { NULL },
4794 },
4795 },
4796
4797 .rc.core = {
4798 .rc_interval = DEFAULT_RC_INTERVAL,
4799 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4800 .module_name = "dib0700",
4801 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4802 .allowed_protos = RC_PROTO_BIT_RC5 |
4803 RC_PROTO_BIT_RC6_MCE |
4804 RC_PROTO_BIT_NEC,
be9bae10
OG		 4805 .change_protocol = dib0700_change_protocol,
4806 },
4807 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4808 .num_adapters = 1,
4809 .adapter = {
4810 {
0fae1997 4811 DIB0700_NUM_FRONTENDS(1),
77eed219 4812 .fe = {{
be9bae10
OG		 4813 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4814 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4815 .pid_filter_count = 32,
4816 .pid_filter = stk80xx_pid_filter,
4817 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4818 .frontend_attach = nim8096md_frontend_attach,
4819 .tuner_attach = nim8096md_tuner_attach,
4820
4821 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4822 }},
be9bae10
OG		 4823 },
4824 },
4825
4826 .num_device_descs = 1,
4827 .devices = {
4828 { "DiBcom NIM8096MD reference design",
4829 { &dib0700_usb_id_table[70], NULL },
4830 { NULL },
4831 },
4832 },
4833
4834 .rc.core = {
4835 .rc_interval = DEFAULT_RC_INTERVAL,
4836 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4837 .module_name = "dib0700",
4838 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4839 .allowed_protos = RC_PROTO_BIT_RC5 |
4840 RC_PROTO_BIT_RC6_MCE |
4841 RC_PROTO_BIT_NEC,
be9bae10
OG		 4842 .change_protocol = dib0700_change_protocol,
4843 },
4844 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4845 .num_adapters = 1,
4846 .adapter = {
4847 {
0fae1997 4848 DIB0700_NUM_FRONTENDS(1),
77eed219 4849 .fe = {{
be9bae10
OG		 4850 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4851 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4852 .pid_filter_count = 32,
4853 .pid_filter = dib90x0_pid_filter,
4854 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4855 .frontend_attach = nim9090md_frontend_attach,
4856 .tuner_attach = nim9090md_tuner_attach,
4857
4858 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4859 }},
be9bae10
OG		 4860 },
4861 },
4862
4863 .num_device_descs = 1,
4864 .devices = {
4865 { "DiBcom NIM9090MD reference design",
4866 { &dib0700_usb_id_table[71], NULL },
4867 { NULL },
4868 },
4869 },
4870
4871 .rc.core = {
4872 .rc_interval = DEFAULT_RC_INTERVAL,
4873 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4874 .module_name = "dib0700",
4875 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4876 .allowed_protos = RC_PROTO_BIT_RC5 |
4877 RC_PROTO_BIT_RC6_MCE |
4878 RC_PROTO_BIT_NEC,
be9bae10
OG		 4879 .change_protocol = dib0700_change_protocol,
4880 },
4881 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4882 .num_adapters = 1,
4883 .adapter = {
4884 {
0fae1997 4885 DIB0700_NUM_FRONTENDS(1),
77eed219 4886 .fe = {{
be9bae10
OG		 4887 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4888 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4889 .pid_filter_count = 32,
4890 .pid_filter = stk70x0p_pid_filter,
4891 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4892 .frontend_attach = nim7090_frontend_attach,
4893 .tuner_attach = nim7090_tuner_attach,
4894
4895 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4896 }},
be9bae10
OG		 4897 },
4898 },
4899
4900 .num_device_descs = 1,
4901 .devices = {
4902 { "DiBcom NIM7090 reference design",
4903 { &dib0700_usb_id_table[72], NULL },
4904 { NULL },
4905 },
4906 },
4907
4908 .rc.core = {
4909 .rc_interval = DEFAULT_RC_INTERVAL,
4910 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4911 .module_name = "dib0700",
4912 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4913 .allowed_protos = RC_PROTO_BIT_RC5 |
4914 RC_PROTO_BIT_RC6_MCE |
4915 RC_PROTO_BIT_NEC,
be9bae10
OG		 4916 .change_protocol = dib0700_change_protocol,
4917 },
4918 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4919 .num_adapters = 2,
4920 .adapter = {
4921 {
0fae1997 4922 DIB0700_NUM_FRONTENDS(1),
77eed219 4923 .fe = {{
be9bae10
OG		 4924 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4925 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4926 .pid_filter_count = 32,
4927 .pid_filter = stk70x0p_pid_filter,
4928 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4929 .frontend_attach = tfe7090pvr_frontend0_attach,
4930 .tuner_attach = tfe7090pvr_tuner0_attach,
4931
4932 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4933 }},
be9bae10
OG		 4934 },
4935 {
0fae1997 4936 DIB0700_NUM_FRONTENDS(1),
77eed219 4937 .fe = {{
be9bae10
OG		 4938 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4939 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4940 .pid_filter_count = 32,
4941 .pid_filter = stk70x0p_pid_filter,
4942 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4943 .frontend_attach = tfe7090pvr_frontend1_attach,
4944 .tuner_attach = tfe7090pvr_tuner1_attach,
4945
4946 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4947 }},
be9bae10
OG		 4948 },
4949 },
4950
4951 .num_device_descs = 1,
4952 .devices = {
4953 { "DiBcom TFE7090PVR reference design",
4954 { &dib0700_usb_id_table[73], NULL },
4955 { NULL },
4956 },
4957 },
4958
8d009a0c
DF		 4959 .rc.core = {
4960 .rc_interval = DEFAULT_RC_INTERVAL,
4961 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4962 .module_name = "dib0700",
4963 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4964 .allowed_protos = RC_PROTO_BIT_RC5 |
4965 RC_PROTO_BIT_RC6_MCE |
4966 RC_PROTO_BIT_NEC,
8d009a0c
DF		 4967 .change_protocol = dib0700_change_protocol,
4968 },
4969 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4970 .num_adapters = 1,
4971 .adapter = {
4972 {
0fae1997 4973 DIB0700_NUM_FRONTENDS(1),
77eed219 4974 .fe = {{
01f16263 4975 .frontend_attach = pctv340e_frontend_attach,
8d009a0c
DF		 4976 .tuner_attach = xc4000_tuner_attach,
4977
4978 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4979 }},
8d009a0c
DF		 4980 },
4981 },
4982
33fb1681 4983 .num_device_descs = 2,
8d009a0c
DF		 4984 .devices = {
4985 { "Pinnacle PCTV 340e HD Pro USB Stick",
4986 { &dib0700_usb_id_table[76], NULL },
4987 { NULL },
4988 },
33fb1681
DH		 4989 { "Pinnacle PCTV Hybrid Stick Solo",
4990 { &dib0700_usb_id_table[77], NULL },
4991 { NULL },
4992 },
8d009a0c 4993 },
6724a2f4
OG		 4994 .rc.core = {
4995 .rc_interval = DEFAULT_RC_INTERVAL,
4996 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4997 .module_name = "dib0700",
4998 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4999 .allowed_protos = RC_PROTO_BIT_RC5 |
5000 RC_PROTO_BIT_RC6_MCE |
5001 RC_PROTO_BIT_NEC,
6724a2f4
OG		 5002 .change_protocol = dib0700_change_protocol,
5003 },
5004 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5005 .num_adapters = 1,
5006 .adapter = {
5007 {
0fae1997 5008 DIB0700_NUM_FRONTENDS(1),
6724a2f4
OG		 5009 .fe = {{
5010 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5011 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5012 .pid_filter_count = 32,
5013 .pid_filter = stk70x0p_pid_filter,
5014 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
f45f513a
OG		 5015 .frontend_attach = tfe7790p_frontend_attach,
5016 .tuner_attach = tfe7790p_tuner_attach,
b293f304
OG		 5017
5018 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
5019 } },
b293f304
OG		 5020 },
5021 },
5022
5023 .num_device_descs = 1,
5024 .devices = {
f45f513a
OG		 5025 { "DiBcom TFE7790P reference design",
5026 { &dib0700_usb_id_table[78], NULL },
b293f304
OG		 5027 { NULL },
5028 },
5029 },
5030
88f3a358
OG		 5031 .rc.core = {
5032 .rc_interval = DEFAULT_RC_INTERVAL,
5033 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5034 .module_name = "dib0700",
5035 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5036 .allowed_protos = RC_PROTO_BIT_RC5 |
5037 RC_PROTO_BIT_RC6_MCE |
5038 RC_PROTO_BIT_NEC,
88f3a358
OG		 5039 .change_protocol = dib0700_change_protocol,
5040 },
5041 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5042 .num_adapters = 1,
5043 .adapter = {
5044 {
0fae1997 5045 DIB0700_NUM_FRONTENDS(1),
88f3a358
OG		 5046 .fe = {{
5047 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5048 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5049 .pid_filter_count = 32,
5050 .pid_filter = stk80xx_pid_filter,
5051 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5052 .frontend_attach = tfe8096p_frontend_attach,
5053 .tuner_attach = tfe8096p_tuner_attach,
5054
5055 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
5056
5057 } },
88f3a358
OG		 5058 },
5059 },
5060
5061 .num_device_descs = 1,
5062 .devices = {
5063 { "DiBcom TFE8096P reference design",
f45f513a 5064 { &dib0700_usb_id_table[79], NULL },
88f3a358
OG		 5065 { NULL },
5066 },
5067 },
5068
72b39310 5069 .rc.core = {
f72a27b8 5070 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 5071 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 5072 .module_name = "dib0700",
0ffd1ab3 5073 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5074 .allowed_protos = RC_PROTO_BIT_RC5 |
5075 RC_PROTO_BIT_RC6_MCE |
5076 RC_PROTO_BIT_NEC,
d8b4b582 5077 .change_protocol = dib0700_change_protocol,
f72a27b8 5078 },
91be260f
NS		 5079 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5080 .num_adapters = 2,
5081 .adapter = {
5082 {
5083 .num_frontends = 1,
5084 .fe = {{
5085 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5086 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5087 .pid_filter_count = 32,
5088 .pid_filter = stk80xx_pid_filter,
5089 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5090 .frontend_attach = stk809x_frontend_attach,
5091 .tuner_attach = dib809x_tuner_attach,
5092
5093 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
5094 } },
5095 .size_of_priv =
5096 sizeof(struct dib0700_adapter_state),
5097 }, {
5098 .num_frontends = 1,
5099 .fe = { {
5100 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5101 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5102 .pid_filter_count = 32,
5103 .pid_filter = stk80xx_pid_filter,
5104 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5105 .frontend_attach = stk809x_frontend1_attach,
5106 .tuner_attach = dib809x_tuner_attach,
5107
5108 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
5109 } },
5110 .size_of_priv =
5111 sizeof(struct dib0700_adapter_state),
5112 },
5113 },
5114 .num_device_descs = 1,
5115 .devices = {
5116 { "DiBcom STK8096-PVR reference design",
ec788795
AT		 5117 { &dib0700_usb_id_table[83],
5118 &dib0700_usb_id_table[84], NULL},
91be260f
NS		 5119 { NULL },
5120 },
5121 },
5122
5123 .rc.core = {
5124 .rc_interval = DEFAULT_RC_INTERVAL,
5125 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5126 .module_name = "dib0700",
5127 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5128 .allowed_protos = RC_PROTO_BIT_RC5 |
5129 RC_PROTO_BIT_RC6_MCE |
5130 RC_PROTO_BIT_NEC,
91be260f
NS		 5131 .change_protocol = dib0700_change_protocol,
5132 },
c4d84547
OS		 5133 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5134 .num_adapters = 1,
5135 .adapter = {
5136 {
5137 DIB0700_NUM_FRONTENDS(1),
5138 .fe = {{
5139 .frontend_attach = xbox_one_attach,
5140
5141 DIB0700_DEFAULT_STREAMING_CONFIG(0x82),
5142 } },
5143 },
5144 },
5145 .num_device_descs = 1,
5146 .devices = {
5147 { "Microsoft Xbox One Digital TV Tuner",
5148 { &dib0700_usb_id_table[86], NULL },
5149 { NULL },
5150 },
5151 },
01373a5c 5152 },
b7f54910
PB		 5153};
5154
5155int dib0700_device_count = ARRAY_SIZE(dib0700_devices);
Linux 6.x block layer and io_uring tree(s)