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media: dvb-usb: dib0700_devices: Add missing release_firmware()
[linux-2.6-block.git] / drivers / media / usb / dvb-usb / dib0700_devices.c
CommitLineData
a10e763b 1// SPDX-License-Identifier: GPL-2.0-only
b7f54910 2/* Linux driver for devices based on the DiBcom DiB0700 USB bridge
b7f54910 3 *
ba3fe3a9 4 * Copyright (C) 2005-9 DiBcom, SA et al
b7f54910
PB		 5 */
6#include "dib0700.h"
7
8#include "dib3000mc.h"
91bb9be6 9#include "dib7000m.h"
a75763ff 10#include "dib7000p.h"
ba3fe3a9 11#include "dib8000.h"
be9bae10 12#include "dib9000.h"
b7f54910 13#include "mt2060.h"
54d75eba 14#include "mt2266.h"
d76231e4 15#include "xc2028.h"
cb22cb52 16#include "xc5000.h"
8d009a0c 17#include "xc4000.h"
cb22cb52 18#include "s5h1411.h"
01373a5c 19#include "dib0070.h"
03245a5e 20#include "dib0090.h"
ce904bcb
MK		 21#include "lgdt3305.h"
22#include "mxl5007t.h"
c4d84547
OS		 23#include "mn88472.h"
24#include "tda18250.h"
25
b7f54910 26
7fb3fc0c
PB		 27static int force_lna_activation;
28module_param(force_lna_activation, int, 0644);
6bca5de9 29MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifier(s) (LNA), if applicable for the device (default: 0=automatic/off).");
7fb3fc0c 30
01373a5c 31struct dib0700_adapter_state {
14d24d14 32 int (*set_param_save) (struct dvb_frontend *);
be9bae10 33 const struct firmware *frontend_firmware;
8abe4a0a 34 struct dib7000p_ops dib7000p_ops;
d44913c1 35 struct dib8000_ops dib8000_ops;
01373a5c
PB		 36};
37
38/* Hauppauge Nova-T 500 (aka Bristol)
b7f54910
PB		 39 * has a LNA on GPIO0 which is enabled by setting 1 */
40static struct mt2060_config bristol_mt2060_config[2] = {
41 {
42 .i2c_address = 0x60,
303cbeaa 43 .clock_out = 3,
b7f54910
PB		 44 }, {
45 .i2c_address = 0x61,
46 }
47};
48
99afb989 49
b7f54910
PB		 50static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
51 .band_caps = BAND_VHF | BAND_UHF,
01b4bf31 52 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
b7f54910 53
6958effe
PB		 54 .agc1_max = 42598,
55 .agc1_min = 17694,
56 .agc2_max = 45875,
57 .agc2_min = 0,
b7f54910 58
6958effe
PB		 59 .agc1_pt1 = 0,
60 .agc1_pt2 = 59,
b7f54910 61
6958effe
PB		 62 .agc1_slope1 = 0,
63 .agc1_slope2 = 69,
b7f54910
PB		 64
65 .agc2_pt1 = 0,
6958effe 66 .agc2_pt2 = 59,
b7f54910 67
6958effe
PB		 68 .agc2_slope1 = 111,
69 .agc2_slope2 = 28,
b7f54910
PB		 70};
71
72static struct dib3000mc_config bristol_dib3000mc_config[2] = {
73 { .agc = &bristol_dib3000p_mt2060_agc_config,
74 .max_time = 0x196,
75 .ln_adc_level = 0x1cc7,
76 .output_mpeg2_in_188_bytes = 1,
77 },
78 { .agc = &bristol_dib3000p_mt2060_agc_config,
79 .max_time = 0x196,
80 .ln_adc_level = 0x1cc7,
81 .output_mpeg2_in_188_bytes = 1,
82 }
83};
84
85static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
86{
6958effe 87 struct dib0700_state *st = adap->dev->priv;
b7f54910
PB		 88 if (adap->id == 0) {
89 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
90 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
91 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
92 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
93
7fb3fc0c
PB		 94 if (force_lna_activation)
95 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
96 else
97 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
6958effe 98
b7f54910
PB		 99 if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
100 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
101 return -ENODEV;
102 }
103 }
6958effe 104 st->mt2060_if1[adap->id] = 1220;
77eed219 105 return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
6958effe 106 (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
b7f54910
PB		 107}
108
4a2b1083 109static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
c52344fd
OD		 110{
111 struct i2c_msg msg[2] = {
112 { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
113 { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
114 };
115 if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
116 return 0;
117}
118
b7f54910
PB		 119static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
120{
c52344fd 121 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
77eed219 122 struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
c52344fd
OD		 123 s8 a;
124 int if1=1220;
da5ee486
AV		 125 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
126 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
c52344fd
OD		 127 if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
128 }
9a9677af
MK		 129 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
130 &bristol_mt2060_config[adap->id], if1) == NULL ?
131 -ENODEV : 0;
b7f54910
PB		 132}
133
01373a5c 134/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
54d75eba 135
b6884a17
PB		 136/* MT226x */
137static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
138 {
9c783036 139 BAND_UHF,
b6884a17
PB		 140
141 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
142 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 143 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
144 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
145
146 1130,
147 21,
148
149 0,
150 118,
151
152 0,
153 3530,
154 1,
155 0,
156
157 65535,
158 33770,
159 65535,
160 23592,
161
162 0,
163 62,
164 255,
165 64,
166 64,
167 132,
168 192,
169 80,
170 80,
171
172 17,
173 27,
174 23,
175 51,
176
177 1,
b6884a17 178 }, {
9c783036 179 BAND_VHF | BAND_LBAND,
b6884a17
PB		 180
181 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
182 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 183 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
184 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
185
186 2372,
187 21,
188
189 0,
190 118,
191
192 0,
193 3530,
194 1,
195 0,
196
197 65535,
198 0,
199 65535,
200 23592,
201
202 0,
203 128,
204 128,
205 128,
206 0,
207 128,
208 253,
209 81,
210 0,
211
212 17,
213 27,
214 23,
215 51,
216
217 1,
b6884a17 218 }
54d75eba
OD		 219};
220
221static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
09628b2c
MCC		 222 .internal = 60000,
223 .sampling = 30000,
224 .pll_prediv = 1,
225 .pll_ratio = 8,
226 .pll_range = 3,
227 .pll_reset = 1,
228 .pll_bypass = 0,
229 .enable_refdiv = 0,
230 .bypclk_div = 0,
231 .IO_CLK_en_core = 1,
232 .ADClkSrc = 1,
233 .modulo = 2,
234 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
235 .ifreq = 0,
236 .timf = 20452225,
54d75eba
OD		 237};
238
239static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
240 { .output_mpeg2_in_188_bytes = 1,
241 .hostbus_diversity = 1,
242 .tuner_is_baseband = 1,
243
b6884a17
PB		 244 .agc_config_count = 2,
245 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 246 .bw = &stk7700d_mt2266_pll_config,
247
b6884a17
PB		 248 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
249 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
250 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 251 },
252 { .output_mpeg2_in_188_bytes = 1,
253 .hostbus_diversity = 1,
254 .tuner_is_baseband = 1,
255
b6884a17
PB		 256 .agc_config_count = 2,
257 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 258 .bw = &stk7700d_mt2266_pll_config,
259
b6884a17
PB		 260 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
261 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
262 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 263 }
264};
265
266static struct mt2266_config stk7700d_mt2266_config[2] = {
267 { .i2c_address = 0x60
268 },
269 { .i2c_address = 0x60
270 }
271};
272
132c3188
DG		 273static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
274{
8abe4a0a
MCC		 275 struct dib0700_adapter_state *state = adap->priv;
276
277 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
278 return -ENODEV;
279
132c3188
DG		 280 if (adap->id == 0) {
281 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
282 msleep(10);
283 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
284 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
285 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
286 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
287 msleep(10);
288 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
289 msleep(10);
8abe4a0a 290 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7
DH		 291 stk7700d_dib7000p_mt2266_config)
292 != 0) {
8abe4a0a 293 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 294 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 295 return -ENODEV;
296 }
132c3188
DG		 297 }
298
8abe4a0a 299 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 300 0x80 + (adap->id << 1),
301 &stk7700d_dib7000p_mt2266_config[adap->id]);
132c3188 302
77eed219 303 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
132c3188
DG		 304}
305
54d75eba
OD		 306static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
307{
8abe4a0a
MCC		 308 struct dib0700_adapter_state *state = adap->priv;
309
310 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
311 return -ENODEV;
312
54d75eba
OD		 313 if (adap->id == 0) {
314 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
315 msleep(10);
316 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
317 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
318 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
319 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
320 msleep(10);
321 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
322 msleep(10);
323 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
8abe4a0a 324 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7
DH		 325 stk7700d_dib7000p_mt2266_config)
326 != 0) {
8abe4a0a 327 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 328 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 329 return -ENODEV;
330 }
54d75eba
OD		 331 }
332
8abe4a0a 333 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 334 0x80 + (adap->id << 1),
335 &stk7700d_dib7000p_mt2266_config[adap->id]);
54d75eba 336
77eed219 337 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
54d75eba
OD		 338}
339
340static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
341{
342 struct i2c_adapter *tun_i2c;
8abe4a0a
MCC		 343 struct dib0700_adapter_state *state = adap->priv;
344
345 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
346 DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 347 return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
1ebcad77 348 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
54d75eba
OD		 349}
350
6ca8f0b9 351/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
b1721d0d 352static struct dibx000_agc_config xc3028_agc_config = {
09628b2c 353 .band_caps = BAND_VHF | BAND_UHF,
6ca8f0b9
AC		 354 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
355 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
356 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 357 .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
358 .inv_gain = 712,
359 .time_stabiliz = 21,
360 .alpha_level = 0,
361 .thlock = 118,
362 .wbd_inv = 0,
363 .wbd_ref = 2867,
364 .wbd_sel = 0,
365 .wbd_alpha = 2,
366 .agc1_max = 0,
367 .agc1_min = 0,
368 .agc2_max = 39718,
369 .agc2_min = 9930,
370 .agc1_pt1 = 0,
371 .agc1_pt2 = 0,
372 .agc1_pt3 = 0,
373 .agc1_slope1 = 0,
374 .agc1_slope2 = 0,
375 .agc2_pt1 = 0,
376 .agc2_pt2 = 128,
377 .agc2_slope1 = 29,
378 .agc2_slope2 = 29,
379 .alpha_mant = 17,
380 .alpha_exp = 27,
381 .beta_mant = 23,
382 .beta_exp = 51,
383 .perform_agc_softsplit = 1,
6ca8f0b9
AC		 384};
385
386/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
b1721d0d 387static struct dibx000_bandwidth_config xc3028_bw_config = {
09628b2c
MCC		 388 .internal = 60000,
389 .sampling = 30000,
390 .pll_prediv = 1,
391 .pll_ratio = 8,
392 .pll_range = 3,
393 .pll_reset = 1,
394 .pll_bypass = 0,
395 .enable_refdiv = 0,
396 .bypclk_div = 0,
397 .IO_CLK_en_core = 1,
398 .ADClkSrc = 1,
399 .modulo = 0,
400 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
401 .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
402 .timf = 20452225,
403 .xtal_hz = 30000000,
6ca8f0b9
AC		 404};
405
406static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
407 .output_mpeg2_in_188_bytes = 1,
408 .tuner_is_baseband = 1,
409
410 .agc_config_count = 1,
411 .agc = &xc3028_agc_config,
412 .bw = &xc3028_bw_config,
413
414 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
415 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
416 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
417};
418
d7cba043
MK		 419static int stk7700ph_xc3028_callback(void *ptr, int component,
420 int command, int arg)
6ca8f0b9
AC		 421{
422 struct dvb_usb_adapter *adap = ptr;
8abe4a0a 423 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9
AC		 424
425 switch (command) {
426 case XC2028_TUNER_RESET:
427 /* Send the tuner in then out of reset */
8abe4a0a
MCC		 428 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
429 msleep(10);
430 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6ca8f0b9
AC		 431 break;
432 case XC2028_RESET_CLK:
9893b905 433 case XC2028_I2C_FLUSH:
6ca8f0b9
AC		 434 break;
435 default:
436 err("%s: unknown command %d, arg %d\n", __func__,
437 command, arg);
438 return -EINVAL;
439 }
440 return 0;
441}
442
443static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
444 .fname = XC2028_DEFAULT_FIRMWARE,
445 .max_len = 64,
446 .demod = XC3028_FE_DIBCOM52,
447};
448
449static struct xc2028_config stk7700ph_xc3028_config = {
450 .i2c_addr = 0x61,
6ca8f0b9
AC		 451 .ctrl = &stk7700ph_xc3028_ctrl,
452};
453
454static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
455{
456 struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 457 struct dib0700_adapter_state *state = adap->priv;
458
459 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
460 return -ENODEV;
6ca8f0b9 461
da5ee486
AV		 462 if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
463 desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
8abe4a0a 464 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 465 else
8abe4a0a 466 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
6ca8f0b9
AC		 467 msleep(20);
468 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
469 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
470 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
471 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
472 msleep(10);
473 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
474 msleep(20);
475 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
476 msleep(10);
477
8abe4a0a 478 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 479 &stk7700ph_dib7700_xc3028_config) != 0) {
8abe4a0a 480 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 481 __func__);
eb0c1994 482 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 483 return -ENODEV;
484 }
6ca8f0b9 485
8abe4a0a 486 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9
AC		 487 &stk7700ph_dib7700_xc3028_config);
488
77eed219 489 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
6ca8f0b9
AC		 490}
491
492static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
493{
494 struct i2c_adapter *tun_i2c;
8abe4a0a 495 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9 496
8abe4a0a 497 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
6ca8f0b9
AC		 498 DIBX000_I2C_INTERFACE_TUNER, 1);
499
500 stk7700ph_xc3028_config.i2c_adap = tun_i2c;
d7cba043
MK		 501
502 /* FIXME: generalize & move to common area */
77eed219 503 adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
6ca8f0b9 504
77eed219 505 return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
6ca8f0b9
AC		 506 == NULL ? -ENODEV : 0;
507}
508
4b330bee 509#define DEFAULT_RC_INTERVAL 50
54d75eba 510
72b39310
MCC		 511/*
512 * This function is used only when firmware is < 1.20 version. Newer
513 * firmwares use bulk mode, with functions implemented at dib0700_core,
514 * at dib0700_rc_urb_completion()
515 */
516static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
54d75eba 517{
6d741bfe 518 enum rc_proto protocol;
120703f9 519 u32 scancode;
72b39310 520 u8 toggle;
54d75eba 521 int i;
54d75eba 522 struct dib0700_state *st = d->priv;
6a207100 523
6a207100
DH		 524 if (st->fw_version >= 0x10200) {
525 /* For 1.20 firmware , We need to keep the RC polling
526 callback so we can reuse the input device setup in
527 dvb-usb-remote.c. However, the actual work is being done
528 in the bulk URB completion handler. */
529 return 0;
530 }
531
bd1f976c
MCC		 532 st->buf[0] = REQUEST_POLL_RC;
533 st->buf[1] = 0;
534
535 i = dib0700_ctrl_rd(d, st->buf, 2, st->buf, 4);
72b39310 536 if (i <= 0) {
034d65ed 537 err("RC Query Failed");
bd1f976c 538 return -EIO;
54d75eba 539 }
58e6f95e
PB		 540
541 /* losing half of KEY_0 events from Philipps rc5 remotes.. */
bd1f976c
MCC		 542 if (st->buf[0] == 0 && st->buf[1] == 0
543 && st->buf[2] == 0 && st->buf[3] == 0)
72b39310 544 return 0;
58e6f95e 545
bd1f976c 546 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)st->buf[3 - 2],(int)st->buf[3 - 3],(int)st->buf[3 - 1],(int)st->buf[3]); */
58e6f95e 547
c4018fa2 548 dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
58e6f95e 549
0ffd1ab3 550 switch (d->props.rc.core.protocol) {
6d741bfe 551 case RC_PROTO_BIT_NEC:
58e6f95e 552 /* NEC protocol sends repeat code as 0 0 0 FF */
bd1f976c
MCC		 553 if ((st->buf[3 - 2] == 0x00) && (st->buf[3 - 3] == 0x00) &&
554 (st->buf[3] == 0xff)) {
120703f9
DH		 555 rc_repeat(d->rc_dev);
556 return 0;
58e6f95e 557 }
72b39310 558
6d741bfe 559 protocol = RC_PROTO_NEC;
bd1f976c 560 scancode = RC_SCANCODE_NEC(st->buf[3 - 2], st->buf[3 - 3]);
120703f9 561 toggle = 0;
58e6f95e 562 break;
120703f9 563
72b39310 564 default:
58e6f95e 565 /* RC-5 protocol changes toggle bit on new keypress */
6d741bfe 566 protocol = RC_PROTO_RC5;
bd1f976c
MCC		 567 scancode = RC_SCANCODE_RC5(st->buf[3 - 2], st->buf[3 - 3]);
568 toggle = st->buf[3 - 1];
58e6f95e
PB		 569 break;
570 }
120703f9
DH		 571
572 rc_keydown(d->rc_dev, protocol, scancode, toggle);
54d75eba
OD		 573 return 0;
574}
575
b7f54910 576/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
a75763ff 577static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
9c783036 578 BAND_UHF | BAND_VHF,
69ea31e7
PB		 579
580 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
581 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 582 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
583 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
584
585 712,
586 41,
587
588 0,
589 118,
590
591 0,
592 4095,
593 0,
594 0,
595
596 42598,
597 17694,
598 45875,
599 2621,
600 0,
601 76,
602 139,
603 52,
604 59,
605 107,
606 172,
607 57,
608 70,
609
610 21,
611 25,
612 28,
613 48,
614
615 1,
616 { 0,
617 107,
618 51800,
619 24700
69ea31e7
PB		 620 },
621};
622
a75763ff 623static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
09628b2c 624 .band_caps = BAND_UHF | BAND_VHF,
a75763ff
PB		 625 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
626 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 627 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
628 .inv_gain = 712,
629 .time_stabiliz = 41,
630 .alpha_level = 0,
631 .thlock = 118,
632 .wbd_inv = 0,
633 .wbd_ref = 4095,
634 .wbd_sel = 0,
635 .wbd_alpha = 0,
636 .agc1_max = 42598,
637 .agc1_min = 16384,
638 .agc2_max = 42598,
639 .agc2_min = 0,
640 .agc1_pt1 = 0,
641 .agc1_pt2 = 137,
642 .agc1_pt3 = 255,
643 .agc1_slope1 = 0,
644 .agc1_slope2 = 255,
645 .agc2_pt1 = 0,
646 .agc2_pt2 = 0,
647 .agc2_slope1 = 0,
648 .agc2_slope2 = 41,
649 .alpha_mant = 15,
650 .alpha_exp = 25,
651 .beta_mant = 28,
652 .beta_exp = 48,
653 .perform_agc_softsplit = 0,
a75763ff
PB		 654};
655
656static struct dibx000_bandwidth_config stk7700p_pll_config = {
09628b2c
MCC		 657 .internal = 60000,
658 .sampling = 30000,
659 .pll_prediv = 1,
660 .pll_ratio = 8,
661 .pll_range = 3,
662 .pll_reset = 1,
663 .pll_bypass = 0,
664 .enable_refdiv = 0,
665 .bypclk_div = 0,
666 .IO_CLK_en_core = 1,
667 .ADClkSrc = 1,
668 .modulo = 0,
669 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
670 .ifreq = 60258167,
671 .timf = 20452225,
672 .xtal_hz = 30000000,
69ea31e7
PB		 673};
674
675static struct dib7000m_config stk7700p_dib7000m_config = {
676 .dvbt_mode = 1,
677 .output_mpeg2_in_188_bytes = 1,
678 .quartz_direct = 1,
679
680 .agc_config_count = 1,
a75763ff
PB		 681 .agc = &stk7700p_7000m_mt2060_agc_config,
682 .bw = &stk7700p_pll_config,
683
684 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
685 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
686 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
687};
688
689static struct dib7000p_config stk7700p_dib7000p_config = {
690 .output_mpeg2_in_188_bytes = 1,
691
b6884a17 692 .agc_config_count = 1,
a75763ff
PB		 693 .agc = &stk7700p_7000p_mt2060_agc_config,
694 .bw = &stk7700p_pll_config,
69ea31e7
PB		 695
696 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
697 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
698 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
b7f54910
PB		 699};
700
701static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
702{
69ea31e7 703 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 704 struct dib0700_adapter_state *state = adap->priv;
705
706 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
707 return -ENODEV;
708
b7f54910 709 /* unless there is no real power management in DVB - we leave the device on GPIO6 */
a75763ff
PB		 710
711 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
712 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
713
69ea31e7 714 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
a75763ff
PB		 715 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
716
b7f54910 717 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
a75763ff
PB		 718 dib0700_ctrl_clock(adap->dev, 72, 1);
719 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
720
721 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
b7f54910 722
69ea31e7 723 st->mt2060_if1[0] = 1220;
a75763ff 724
8abe4a0a
MCC		 725 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
726 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
a75763ff 727 st->is_dib7000pc = 1;
8abe4a0a 728 } else {
8abe4a0a 729 memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
77eed219 730 adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
8abe4a0a 731 }
a75763ff 732
77eed219 733 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
b7f54910
PB		 734}
735
69ea31e7
PB		 736static struct mt2060_config stk7700p_mt2060_config = {
737 0x60
738};
739
b7f54910
PB		 740static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
741{
c52344fd 742 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
69ea31e7 743 struct dib0700_state *st = adap->dev->priv;
a75763ff 744 struct i2c_adapter *tun_i2c;
8abe4a0a 745 struct dib0700_adapter_state *state = adap->priv;
c52344fd
OD		 746 s8 a;
747 int if1=1220;
8abe4a0a 748
da5ee486
AV		 749 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
750 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
c52344fd
OD		 751 if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
752 }
a75763ff 753 if (st->is_dib7000pc)
8abe4a0a 754 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 755 else
77eed219 756 tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 757
77eed219 758 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
c52344fd 759 if1) == NULL ? -ENODEV : 0;
b7f54910
PB		 760}
761
01373a5c
PB		 762/* DIB7070 generic */
763static struct dibx000_agc_config dib7070_agc_config = {
09628b2c 764 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
01373a5c
PB		 765 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
766 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
09628b2c
MCC		 767 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
768 .inv_gain = 600,
769 .time_stabiliz = 10,
770 .alpha_level = 0,
771 .thlock = 118,
772 .wbd_inv = 0,
773 .wbd_ref = 3530,
774 .wbd_sel = 1,
775 .wbd_alpha = 5,
776 .agc1_max = 65535,
777 .agc1_min = 0,
778 .agc2_max = 65535,
779 .agc2_min = 0,
780 .agc1_pt1 = 0,
781 .agc1_pt2 = 40,
782 .agc1_pt3 = 183,
783 .agc1_slope1 = 206,
784 .agc1_slope2 = 255,
785 .agc2_pt1 = 72,
786 .agc2_pt2 = 152,
787 .agc2_slope1 = 88,
788 .agc2_slope2 = 90,
789 .alpha_mant = 17,
790 .alpha_exp = 27,
791 .beta_mant = 23,
792 .beta_exp = 51,
793 .perform_agc_softsplit = 0,
01373a5c
PB		 794};
795
796static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
797{
8abe4a0a
MCC		 798 struct dvb_usb_adapter *adap = fe->dvb->priv;
799 struct dib0700_adapter_state *state = adap->priv;
800
7e5ce651 801 deb_info("reset: %d", onoff);
8abe4a0a 802 return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
01373a5c
PB		 803}
804
805static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
806{
8abe4a0a
MCC		 807 struct dvb_usb_adapter *adap = fe->dvb->priv;
808 struct dib0700_adapter_state *state = adap->priv;
809
7e5ce651 810 deb_info("sleep: %d", onoff);
8abe4a0a 811 return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
01373a5c
PB		 812}
813
814static struct dib0070_config dib7070p_dib0070_config[2] = {
815 {
816 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
817 .reset = dib7070_tuner_reset,
818 .sleep = dib7070_tuner_sleep,
819 .clock_khz = 12000,
7e5ce651
PB		 820 .clock_pad_drive = 4,
821 .charge_pump = 2,
01373a5c
PB		 822 }, {
823 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
824 .reset = dib7070_tuner_reset,
825 .sleep = dib7070_tuner_sleep,
826 .clock_khz = 12000,
7e5ce651 827 .charge_pump = 2,
01373a5c
PB		 828 }
829};
830
d300bd69
OG		 831static struct dib0070_config dib7770p_dib0070_config = {
832 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
833 .reset = dib7070_tuner_reset,
834 .sleep = dib7070_tuner_sleep,
835 .clock_khz = 12000,
836 .clock_pad_drive = 0,
837 .flip_chip = 1,
eac1fe10 838 .charge_pump = 2,
d300bd69
OG		 839};
840
14d24d14 841static int dib7070_set_param_override(struct dvb_frontend *fe)
01373a5c 842{
47b163af 843 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
01373a5c
PB		 844 struct dvb_usb_adapter *adap = fe->dvb->priv;
845 struct dib0700_adapter_state *state = adap->priv;
846
847 u16 offset;
47b163af 848 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
01373a5c
PB		 849 switch (band) {
850 case BAND_VHF: offset = 950; break;
851 case BAND_UHF:
852 default: offset = 550; break;
853 }
854 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
8abe4a0a 855 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
14d24d14 856 return state->set_param_save(fe);
01373a5c
PB		 857}
858
14d24d14 859static int dib7770_set_param_override(struct dvb_frontend *fe)
d300bd69 860{
47b163af
MCC		 861 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
862 struct dvb_usb_adapter *adap = fe->dvb->priv;
863 struct dib0700_adapter_state *state = adap->priv;
d300bd69 864
316c46b8
MCC		 865 u16 offset;
866 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
867 switch (band) {
868 case BAND_VHF:
869 state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
870 offset = 850;
871 break;
872 case BAND_UHF:
873 default:
874 state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
875 offset = 250;
876 break;
877 }
878 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
879 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
880 return state->set_param_save(fe);
d300bd69
OG		 881}
882
883static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
884{
8abe4a0a
MCC		 885 struct dib0700_adapter_state *st = adap->priv;
886 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
d300bd69
OG		 887 DIBX000_I2C_INTERFACE_TUNER, 1);
888
8abe4a0a
MCC		 889 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
890 &dib7770p_dib0070_config) == NULL)
891 return -ENODEV;
d300bd69 892
8abe4a0a
MCC		 893 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
894 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
895 return 0;
d300bd69
OG		 896}
897
01373a5c
PB		 898static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
899{
900 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a 901 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
01373a5c
PB		 902
903 if (adap->id == 0) {
77eed219 904 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
01373a5c
PB		 905 return -ENODEV;
906 } else {
77eed219 907 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
01373a5c
PB		 908 return -ENODEV;
909 }
910
77eed219
MK		 911 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
912 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
01373a5c
PB		 913 return 0;
914}
915
e192a7cf
OG		 916static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
917 u16 pid, int onoff)
918{
8abe4a0a 919 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 920 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 921
e192a7cf 922 if (st->is_dib7000pc)
8abe4a0a 923 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
77eed219 924 return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
e192a7cf
OG		 925}
926
927static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
928{
929 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 930 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 931 if (st->is_dib7000pc)
8abe4a0a 932 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
77eed219 933 return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
e192a7cf
OG		 934}
935
f8731f4d
OG		 936static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
937{
8abe4a0a
MCC		 938 struct dib0700_adapter_state *state = adapter->priv;
939 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 940}
941
942static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
943{
8abe4a0a
MCC		 944 struct dib0700_adapter_state *state = adapter->priv;
945 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d
OG		 946}
947
01373a5c 948static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
09628b2c
MCC		 949 .internal = 60000,
950 .sampling = 15000,
951 .pll_prediv = 1,
952 .pll_ratio = 20,
953 .pll_range = 3,
954 .pll_reset = 1,
955 .pll_bypass = 0,
956 .enable_refdiv = 0,
957 .bypclk_div = 0,
958 .IO_CLK_en_core = 1,
959 .ADClkSrc = 1,
960 .modulo = 2,
961 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
962 .ifreq = (0 << 25) | 0,
963 .timf = 20452225,
964 .xtal_hz = 12000000,
01373a5c
PB		 965};
966
967static struct dib7000p_config dib7070p_dib7000p_config = {
968 .output_mpeg2_in_188_bytes = 1,
969
970 .agc_config_count = 1,
971 .agc = &dib7070_agc_config,
972 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 973 .tuner_is_baseband = 1,
974 .spur_protect = 1,
01373a5c
PB		 975
976 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
977 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
978 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
979
980 .hostbus_diversity = 1,
981};
982
983/* STK7070P */
984static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
985{
da5ee486 986 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 987 struct dib0700_adapter_state *state = adap->priv;
988
989 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
990 return -ENODEV;
991
da5ee486
AV		 992 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
993 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
994 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 995 else
da5ee486 996 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
01373a5c
PB		 997 msleep(10);
998 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
999 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1000 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1001 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1002
1003 dib0700_ctrl_clock(adap->dev, 72, 1);
1004
1005 msleep(10);
1006 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1007 msleep(10);
1008 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1009
8abe4a0a 1010 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 1011 &dib7070p_dib7000p_config) != 0) {
8abe4a0a 1012 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 1013 __func__);
eb0c1994 1014 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 1015 return -ENODEV;
1016 }
01373a5c 1017
8abe4a0a 1018 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9 1019 &dib7070p_dib7000p_config);
77eed219 1020 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 1021}
1022
90e12cec
OG		 1023/* STK7770P */
1024static struct dib7000p_config dib7770p_dib7000p_config = {
1025 .output_mpeg2_in_188_bytes = 1,
1026
1027 .agc_config_count = 1,
1028 .agc = &dib7070_agc_config,
1029 .bw = &dib7070_bw_config_12_mhz,
1030 .tuner_is_baseband = 1,
1031 .spur_protect = 1,
1032
1033 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
1034 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
1035 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1036
1037 .hostbus_diversity = 1,
1038 .enable_current_mirror = 1,
970d14c6 1039 .disable_sample_and_hold = 0,
90e12cec
OG		 1040};
1041
1042static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
1043{
1044 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 1045 struct dib0700_adapter_state *state = adap->priv;
1046
1047 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
1048 return -ENODEV;
1049
90e12cec
OG		 1050 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
1051 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
1052 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1053 else
1054 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1055 msleep(10);
1056 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1057 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1058 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1059 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1060
1061 dib0700_ctrl_clock(adap->dev, 72, 1);
1062
1063 msleep(10);
1064 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1065 msleep(10);
1066 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1067
8abe4a0a 1068 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
90e12cec 1069 &dib7770p_dib7000p_config) != 0) {
8abe4a0a 1070 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
90e12cec 1071 __func__);
eb0c1994 1072 dvb_detach(state->dib7000p_ops.set_wbd_ref);
90e12cec
OG		 1073 return -ENODEV;
1074 }
1075
8abe4a0a 1076 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
90e12cec 1077 &dib7770p_dib7000p_config);
77eed219 1078 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
90e12cec
OG		 1079}
1080
ba3fe3a9
PB		 1081/* DIB807x generic */
1082static struct dibx000_agc_config dib807x_agc_config[2] = {
1083 {
1084 BAND_VHF,
1085 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1086 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1087 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
1088 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1089 * P_agc_write=0 */
1090 (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
1091 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1092 (0 << 0), /* setup*/
1093
1094 600, /* inv_gain*/
1095 10, /* time_stabiliz*/
1096
1097 0, /* alpha_level*/
1098 118, /* thlock*/
1099
1100 0, /* wbd_inv*/
1101 3530, /* wbd_ref*/
1102 1, /* wbd_sel*/
1103 5, /* wbd_alpha*/
1104
1105 65535, /* agc1_max*/
1106 0, /* agc1_min*/
1107
1108 65535, /* agc2_max*/
1109 0, /* agc2_min*/
1110
1111 0, /* agc1_pt1*/
1112 40, /* agc1_pt2*/
1113 183, /* agc1_pt3*/
1114 206, /* agc1_slope1*/
1115 255, /* agc1_slope2*/
1116 72, /* agc2_pt1*/
1117 152, /* agc2_pt2*/
1118 88, /* agc2_slope1*/
1119 90, /* agc2_slope2*/
1120
1121 17, /* alpha_mant*/
1122 27, /* alpha_exp*/
1123 23, /* beta_mant*/
1124 51, /* beta_exp*/
1125
1126 0, /* perform_agc_softsplit*/
1127 }, {
1128 BAND_UHF,
1129 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1130 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1131 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1132 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1133 * P_agc_write=0 */
1134 (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
1135 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1136 (0 << 0), /* setup */
1137
1138 600, /* inv_gain*/
1139 10, /* time_stabiliz*/
1140
1141 0, /* alpha_level*/
1142 118, /* thlock*/
1143
1144 0, /* wbd_inv*/
1145 3530, /* wbd_ref*/
1146 1, /* wbd_sel*/
1147 5, /* wbd_alpha*/
1148
1149 65535, /* agc1_max*/
1150 0, /* agc1_min*/
1151
1152 65535, /* agc2_max*/
1153 0, /* agc2_min*/
1154
1155 0, /* agc1_pt1*/
1156 40, /* agc1_pt2*/
1157 183, /* agc1_pt3*/
1158 206, /* agc1_slope1*/
1159 255, /* agc1_slope2*/
1160 72, /* agc2_pt1*/
1161 152, /* agc2_pt2*/
1162 88, /* agc2_slope1*/
1163 90, /* agc2_slope2*/
1164
1165 17, /* alpha_mant*/
1166 27, /* alpha_exp*/
1167 23, /* beta_mant*/
1168 51, /* beta_exp*/
1169
1170 0, /* perform_agc_softsplit*/
1171 }
1172};
1173
1174static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
09628b2c
MCC		 1175 .internal = 60000,
1176 .sampling = 15000,
1177 .pll_prediv = 1,
1178 .pll_ratio = 20,
1179 .pll_range = 3,
1180 .pll_reset = 1,
1181 .pll_bypass = 0,
1182 .enable_refdiv = 0,
1183 .bypclk_div = 0,
1184 .IO_CLK_en_core = 1,
1185 .ADClkSrc = 1,
1186 .modulo = 2,
1187 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
1188 .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
1189 .timf = 18179755,
1190 .xtal_hz = 12000000,
ba3fe3a9
PB		 1191};
1192
1193static struct dib8000_config dib807x_dib8000_config[2] = {
1194 {
1195 .output_mpeg2_in_188_bytes = 1,
1196
1197 .agc_config_count = 2,
1198 .agc = dib807x_agc_config,
1199 .pll = &dib807x_bw_config_12_mhz,
1200 .tuner_is_baseband = 1,
1201
1202 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1203 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1204 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1205
1206 .hostbus_diversity = 1,
1207 .div_cfg = 1,
1208 .agc_control = &dib0070_ctrl_agc_filter,
1209 .output_mode = OUTMODE_MPEG2_FIFO,
1210 .drives = 0x2d98,
1211 }, {
1212 .output_mpeg2_in_188_bytes = 1,
1213
1214 .agc_config_count = 2,
1215 .agc = dib807x_agc_config,
1216 .pll = &dib807x_bw_config_12_mhz,
1217 .tuner_is_baseband = 1,
1218
1219 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1220 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1221 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1222
1223 .hostbus_diversity = 1,
1224 .agc_control = &dib0070_ctrl_agc_filter,
1225 .output_mode = OUTMODE_MPEG2_FIFO,
1226 .drives = 0x2d98,
1227 }
1228};
1229
03245a5e 1230static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1231{
d44913c1
MCC		 1232 struct dvb_usb_adapter *adap = fe->dvb->priv;
1233 struct dib0700_adapter_state *state = adap->priv;
1234
1235 return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
ba3fe3a9
PB		 1236}
1237
03245a5e 1238static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1239{
d44913c1
MCC		 1240 struct dvb_usb_adapter *adap = fe->dvb->priv;
1241 struct dib0700_adapter_state *state = adap->priv;
1242
1243 return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
ba3fe3a9
PB		 1244}
1245
1246static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
1247 { 240, 7},
1248 { 0xffff, 6},
1249};
1250
1251static struct dib0070_config dib807x_dib0070_config[2] = {
1252 {
1253 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1254 .reset = dib80xx_tuner_reset,
1255 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1256 .clock_khz = 12000,
1257 .clock_pad_drive = 4,
1258 .vga_filter = 1,
1259 .force_crystal_mode = 1,
1260 .enable_third_order_filter = 1,
1261 .charge_pump = 0,
1262 .wbd_gain = dib8070_wbd_gain_cfg,
1263 .osc_buffer_state = 0,
1264 .freq_offset_khz_uhf = -100,
1265 .freq_offset_khz_vhf = -100,
1266 }, {
1267 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1268 .reset = dib80xx_tuner_reset,
1269 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1270 .clock_khz = 12000,
1271 .clock_pad_drive = 2,
1272 .vga_filter = 1,
1273 .force_crystal_mode = 1,
1274 .enable_third_order_filter = 1,
1275 .charge_pump = 0,
1276 .wbd_gain = dib8070_wbd_gain_cfg,
1277 .osc_buffer_state = 0,
1278 .freq_offset_khz_uhf = -25,
1279 .freq_offset_khz_vhf = -25,
1280 }
1281};
1282
14d24d14 1283static int dib807x_set_param_override(struct dvb_frontend *fe)
ba3fe3a9 1284{
47b163af 1285 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
ba3fe3a9
PB		 1286 struct dvb_usb_adapter *adap = fe->dvb->priv;
1287 struct dib0700_adapter_state *state = adap->priv;
1288
1289 u16 offset = dib0070_wbd_offset(fe);
47b163af 1290 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
ba3fe3a9
PB		 1291 switch (band) {
1292 case BAND_VHF:
1293 offset += 750;
1294 break;
1295 case BAND_UHF: /* fall-thru wanted */
1296 default:
1297 offset += 250; break;
1298 }
1299 deb_info("WBD for DiB8000: %d\n", offset);
d44913c1 1300 state->dib8000_ops.set_wbd_ref(fe, offset);
ba3fe3a9 1301
14d24d14 1302 return state->set_param_save(fe);
ba3fe3a9
PB		 1303}
1304
1305static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
1306{
1307 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1308 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
ba3fe3a9
PB		 1309 DIBX000_I2C_INTERFACE_TUNER, 1);
1310
1311 if (adap->id == 0) {
77eed219 1312 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1313 &dib807x_dib0070_config[0]) == NULL)
1314 return -ENODEV;
1315 } else {
77eed219 1316 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1317 &dib807x_dib0070_config[1]) == NULL)
1318 return -ENODEV;
1319 }
1320
77eed219
MK		 1321 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1322 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
ba3fe3a9
PB		 1323 return 0;
1324}
1325
9c783036
OG		 1326static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
1327 u16 pid, int onoff)
f8731f4d 1328{
d44913c1
MCC		 1329 struct dib0700_adapter_state *state = adapter->priv;
1330
1331 return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 1332}
1333
9c783036 1334static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
be9bae10 1335 int onoff)
f8731f4d 1336{
d44913c1
MCC		 1337 struct dib0700_adapter_state *state = adapter->priv;
1338
1339 return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d 1340}
ba3fe3a9
PB		 1341
1342/* STK807x */
1343static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
1344{
d44913c1
MCC		 1345 struct dib0700_adapter_state *state = adap->priv;
1346
1347 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1348 return -ENODEV;
1349
ba3fe3a9
PB		 1350 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1351 msleep(10);
1352 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1353 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1354 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1355
1356 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1357
1358 dib0700_ctrl_clock(adap->dev, 72, 1);
1359
1360 msleep(10);
1361 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1362 msleep(10);
1363 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1364
d44913c1 1365 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
0c32dbd7 1366 0x80, 0);
ba3fe3a9 1367
d44913c1 1368 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1369 &dib807x_dib8000_config[0]);
1370
77eed219 1371 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1372}
1373
1374/* STK807xPVR */
1375static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
1376{
d44913c1
MCC		 1377 struct dib0700_adapter_state *state = adap->priv;
1378
1379 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1380 return -ENODEV;
1381
ba3fe3a9
PB		 1382 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1383 msleep(30);
1384 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1385 msleep(500);
1386 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1387 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1388 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1389
1390 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1391
1392 dib0700_ctrl_clock(adap->dev, 72, 1);
1393
1394 msleep(10);
1395 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1396 msleep(10);
1397 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1398
1399 /* initialize IC 0 */
d44913c1 1400 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
ba3fe3a9 1401
d44913c1 1402 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1403 &dib807x_dib8000_config[0]);
1404
77eed219 1405 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1406}
1407
1408static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
1409{
d44913c1
MCC		 1410 struct dib0700_adapter_state *state = adap->priv;
1411
1412 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1413 return -ENODEV;
1414
ba3fe3a9 1415 /* initialize IC 1 */
d44913c1 1416 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
ba3fe3a9 1417
d44913c1 1418 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
ba3fe3a9
PB		 1419 &dib807x_dib8000_config[1]);
1420
77eed219 1421 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1422}
1423
03245a5e 1424/* STK8096GP */
a685dbbc 1425static struct dibx000_agc_config dib8090_agc_config[2] = {
be9bae10 1426 {
40d1a7c3 1427 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
9c783036 1428 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1429 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1430 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1431 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1432 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1433
40d1a7c3
MCC		 1434 .inv_gain = 787,
1435 .time_stabiliz = 10,
9c783036 1436
40d1a7c3
MCC		 1437 .alpha_level = 0,
1438 .thlock = 118,
9c783036 1439
40d1a7c3
MCC		 1440 .wbd_inv = 0,
1441 .wbd_ref = 3530,
1442 .wbd_sel = 1,
1443 .wbd_alpha = 5,
9c783036 1444
40d1a7c3
MCC		 1445 .agc1_max = 65535,
1446 .agc1_min = 0,
9c783036 1447
40d1a7c3
MCC		 1448 .agc2_max = 65535,
1449 .agc2_min = 0,
9c783036 1450
40d1a7c3
MCC		 1451 .agc1_pt1 = 0,
1452 .agc1_pt2 = 32,
1453 .agc1_pt3 = 114,
1454 .agc1_slope1 = 143,
1455 .agc1_slope2 = 144,
1456 .agc2_pt1 = 114,
1457 .agc2_pt2 = 227,
1458 .agc2_slope1 = 116,
1459 .agc2_slope2 = 117,
1460
1461 .alpha_mant = 28,
1462 .alpha_exp = 26,
1463 .beta_mant = 31,
1464 .beta_exp = 51,
1465
1466 .perform_agc_softsplit = 0,
be9bae10
OG		 1467 },
1468 {
40d1a7c3 1469 .band_caps = BAND_CBAND,
9c783036 1470 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1471 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1472 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1473 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1474 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1475
40d1a7c3
MCC		 1476 .inv_gain = 787,
1477 .time_stabiliz = 10,
9c783036 1478
40d1a7c3
MCC		 1479 .alpha_level = 0,
1480 .thlock = 118,
9c783036 1481
40d1a7c3
MCC		 1482 .wbd_inv = 0,
1483 .wbd_ref = 3530,
1484 .wbd_sel = 1,
1485 .wbd_alpha = 5,
9c783036 1486
40d1a7c3
MCC		 1487 .agc1_max = 0,
1488 .agc1_min = 0,
9c783036 1489
40d1a7c3
MCC		 1490 .agc2_max = 65535,
1491 .agc2_min = 0,
9c783036 1492
40d1a7c3
MCC		 1493 .agc1_pt1 = 0,
1494 .agc1_pt2 = 32,
1495 .agc1_pt3 = 114,
1496 .agc1_slope1 = 143,
1497 .agc1_slope2 = 144,
1498 .agc2_pt1 = 114,
1499 .agc2_pt2 = 227,
1500 .agc2_slope1 = 116,
1501 .agc2_slope2 = 117,
1502
1503 .alpha_mant = 28,
1504 .alpha_exp = 26,
1505 .beta_mant = 31,
1506 .beta_exp = 51,
1507
1508 .perform_agc_softsplit = 0,
be9bae10 1509 }
03245a5e
OG		 1510};
1511
1512static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
40d1a7c3
MCC		 1513 .internal = 54000,
1514 .sampling = 13500,
1515
1516 .pll_prediv = 1,
1517 .pll_ratio = 18,
1518 .pll_range = 3,
1519 .pll_reset = 1,
1520 .pll_bypass = 0,
1521
1522 .enable_refdiv = 0,
1523 .bypclk_div = 0,
1524 .IO_CLK_en_core = 1,
1525 .ADClkSrc = 1,
1526 .modulo = 2,
1527
1528 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
1529
1530 .ifreq = (0 << 25) | 0,
1531 .timf = 20199727,
1532
1533 .xtal_hz = 12000000,
03245a5e
OG		 1534};
1535
1536static int dib8090_get_adc_power(struct dvb_frontend *fe)
1537{
d44913c1
MCC		 1538 struct dvb_usb_adapter *adap = fe->dvb->priv;
1539 struct dib0700_adapter_state *state = adap->priv;
1540
1541 return state->dib8000_ops.get_adc_power(fe, 1);
be9bae10
OG		 1542}
1543
5e9c85d9
OG		 1544static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
1545{
1546 deb_info("AGC control callback: %i\n", restart);
1547 dib0090_dcc_freq(fe, restart);
1548
1549 if (restart == 0) /* before AGC startup */
1550 dib0090_set_dc_servo(fe, 1);
1551}
1552
be9bae10
OG		 1553static struct dib8000_config dib809x_dib8000_config[2] = {
1554 {
1555 .output_mpeg2_in_188_bytes = 1,
1556
1557 .agc_config_count = 2,
1558 .agc = dib8090_agc_config,
5e9c85d9 1559 .agc_control = dib8090_agc_control,
be9bae10
OG		 1560 .pll = &dib8090_pll_config_12mhz,
1561 .tuner_is_baseband = 1,
1562
1563 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1564 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1565 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1566
1567 .hostbus_diversity = 1,
1568 .div_cfg = 0x31,
1569 .output_mode = OUTMODE_MPEG2_FIFO,
1570 .drives = 0x2d98,
1571 .diversity_delay = 48,
1572 .refclksel = 3,
b4d6046e 1573 }, {
be9bae10
OG		 1574 .output_mpeg2_in_188_bytes = 1,
1575
1576 .agc_config_count = 2,
1577 .agc = dib8090_agc_config,
5e9c85d9 1578 .agc_control = dib8090_agc_control,
be9bae10
OG		 1579 .pll = &dib8090_pll_config_12mhz,
1580 .tuner_is_baseband = 1,
1581
1582 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1583 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1584 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1585
1586 .hostbus_diversity = 1,
1587 .div_cfg = 0x31,
1588 .output_mode = OUTMODE_DIVERSITY,
1589 .drives = 0x2d08,
1590 .diversity_delay = 1,
1591 .refclksel = 3,
1592 }
1593};
1594
1595static struct dib0090_wbd_slope dib8090_wbd_table[] = {
1596 /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
1597 { 120, 0, 500, 0, 500, 4 }, /* CBAND */
1598 { 170, 0, 450, 0, 450, 4 }, /* CBAND */
1599 { 380, 48, 373, 28, 259, 6 }, /* VHF */
1600 { 860, 34, 700, 36, 616, 6 }, /* high UHF */
1601 { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
1602};
1603
1604static struct dib0090_config dib809x_dib0090_config = {
1605 .io.pll_bypass = 1,
1606 .io.pll_range = 1,
1607 .io.pll_prediv = 1,
1608 .io.pll_loopdiv = 20,
1609 .io.adc_clock_ratio = 8,
1610 .io.pll_int_loop_filt = 0,
1611 .io.clock_khz = 12000,
1612 .reset = dib80xx_tuner_reset,
1613 .sleep = dib80xx_tuner_sleep,
1614 .clkouttobamse = 1,
1615 .analog_output = 1,
1616 .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
1617 .use_pwm_agc = 1,
1618 .clkoutdrive = 1,
1619 .get_adc_power = dib8090_get_adc_power,
1620 .freq_offset_khz_uhf = -63,
1621 .freq_offset_khz_vhf = -143,
1622 .wbd = dib8090_wbd_table,
1623 .fref_clock_ratio = 6,
1624};
1625
5e9c85d9
OG		 1626static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
1627{
1628 u8 optimal_pll_ratio = 20;
1629 u32 freq_adc, ratio, rest, max = 0;
1630 u8 pll_ratio;
1631
1632 for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
1633 freq_adc = 12 * pll_ratio * (1 << 8) / 16;
1634 ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
1635 rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
1636
1637 if (rest > freq_adc / 2)
1638 rest = freq_adc - rest;
1639 deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
1640 if ((rest > max) && (rest > 717)) {
1641 optimal_pll_ratio = pll_ratio;
1642 max = rest;
1643 }
1644 }
1645 deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
1646
1647 return optimal_pll_ratio;
1648}
1649
14d24d14 1650static int dib8096_set_param_override(struct dvb_frontend *fe)
be9bae10
OG		 1651{
1652 struct dvb_usb_adapter *adap = fe->dvb->priv;
1653 struct dib0700_adapter_state *state = adap->priv;
5e9c85d9
OG		 1654 u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
1655 u16 target, ltgain, rf_gain_limit;
1656 u32 timf;
be9bae10
OG		 1657 int ret = 0;
1658 enum frontend_tune_state tune_state = CT_SHUTDOWN;
5e9c85d9
OG		 1659
1660 switch (band) {
1661 default:
0cc4a0c4 1662 deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
df561f66 1663 fallthrough;
5e9c85d9 1664 case BAND_VHF:
0cc4a0c4
GS		 1665 state->dib8000_ops.set_gpio(fe, 3, 0, 1);
1666 break;
5e9c85d9 1667 case BAND_UHF:
0cc4a0c4
GS		 1668 state->dib8000_ops.set_gpio(fe, 3, 0, 0);
1669 break;
5e9c85d9 1670 }
be9bae10 1671
14d24d14 1672 ret = state->set_param_save(fe);
be9bae10
OG		 1673 if (ret < 0)
1674 return ret;
1675
5e9c85d9
OG		 1676 if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
1677 deb_info("only 6MHz bandwidth is supported\n");
1678 return -EINVAL;
1679 }
1680
cba862dc 1681 /* Update PLL if needed ratio */
d44913c1 1682 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
5e9c85d9 1683
cba862dc 1684 /* Get optimize PLL ratio to remove spurious */
5e9c85d9
OG		 1685 pll_ratio = dib8090_compute_pll_parameters(fe);
1686 if (pll_ratio == 17)
1687 timf = 21387946;
1688 else if (pll_ratio == 18)
1689 timf = 20199727;
1690 else if (pll_ratio == 19)
1691 timf = 19136583;
1692 else
1693 timf = 18179756;
be9bae10 1694
cba862dc 1695 /* Update ratio */
d44913c1 1696 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
5e9c85d9 1697
d44913c1 1698 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
5e9c85d9
OG		 1699
1700 if (band != BAND_CBAND) {
1701 /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
1702 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
d44913c1 1703 state->dib8000_ops.set_wbd_ref(fe, target);
5e9c85d9 1704 }
be9bae10
OG		 1705
1706 if (band == BAND_CBAND) {
b4d6046e
OG		 1707 deb_info("tuning in CBAND - soft-AGC startup\n");
1708 dib0090_set_tune_state(fe, CT_AGC_START);
5e9c85d9 1709
b4d6046e
OG		 1710 do {
1711 ret = dib0090_gain_control(fe);
1712 msleep(ret);
1713 tune_state = dib0090_get_tune_state(fe);
1714 if (tune_state == CT_AGC_STEP_0)
d44913c1 1715 state->dib8000_ops.set_gpio(fe, 6, 0, 1);
b4d6046e
OG		 1716 else if (tune_state == CT_AGC_STEP_1) {
1717 dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
5e9c85d9 1718 if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
d44913c1 1719 state->dib8000_ops.set_gpio(fe, 6, 0, 0);
b4d6046e
OG		 1720 }
1721 } while (tune_state < CT_AGC_STOP);
5e9c85d9
OG		 1722
1723 deb_info("switching to PWM AGC\n");
b4d6046e 1724 dib0090_pwm_gain_reset(fe);
d44913c1
MCC		 1725 state->dib8000_ops.pwm_agc_reset(fe);
1726 state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
be9bae10 1727 } else {
5e9c85d9 1728 /* for everything else than CBAND we are using standard AGC */
b4d6046e
OG		 1729 deb_info("not tuning in CBAND - standard AGC startup\n");
1730 dib0090_pwm_gain_reset(fe);
be9bae10
OG		 1731 }
1732
1733 return 0;
1734}
1735
1736static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
1737{
1738 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1739 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10 1740
e1f8807a
DA		 1741 /* FIXME: if adap->id != 0, check if it is fe_adap[1] */
1742 if (!dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config))
1743 return -ENODEV;
be9bae10 1744
77eed219
MK		 1745 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1746 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1747 return 0;
1748}
1749
1750static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
1751{
d44913c1
MCC		 1752 struct dib0700_adapter_state *state = adap->priv;
1753
1754 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1755 return -ENODEV;
1756
be9bae10
OG		 1757 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1758 msleep(10);
1759 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1760 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1761 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1762
1763 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1764
1765 dib0700_ctrl_clock(adap->dev, 72, 1);
1766
1767 msleep(10);
1768 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1769 msleep(10);
1770 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1771
d44913c1 1772 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
be9bae10 1773
d44913c1 1774 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
be9bae10 1775
77eed219 1776 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 1777}
1778
91be260f
NS		 1779static int stk809x_frontend1_attach(struct dvb_usb_adapter *adap)
1780{
1781 struct dib0700_adapter_state *state = adap->priv;
1782
1783 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1784 return -ENODEV;
1785
1786 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x82, 0);
1787
1788 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1789
1790 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
1791}
1792
be9bae10
OG		 1793static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
1794{
1795 struct dib0700_adapter_state *st = adap->priv;
1796 struct i2c_adapter *tun_i2c;
d44913c1 1797 struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10
OG		 1798
1799 if (fe_slave) {
d44913c1 1800 tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10
OG		 1801 if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
1802 return -ENODEV;
77eed219 1803 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
be9bae10
OG		 1804 fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
1805 }
d44913c1 1806 tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 1807 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
be9bae10
OG		 1808 return -ENODEV;
1809
77eed219
MK		 1810 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1811 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1812
1813 return 0;
1814}
1815
1816static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
1817{
1818 struct dvb_frontend *fe_slave;
d44913c1
MCC		 1819 struct dib0700_adapter_state *state = adap->priv;
1820
1821 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1822 return -ENODEV;
be9bae10
OG		 1823
1824 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
b4d6046e 1825 msleep(20);
be9bae10
OG		 1826 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1827 msleep(1000);
1828 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1829 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1830 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1831
1832 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1833
1834 dib0700_ctrl_clock(adap->dev, 72, 1);
1835
b4d6046e 1836 msleep(20);
be9bae10 1837 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 1838 msleep(20);
be9bae10
OG		 1839 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1840
d44913c1 1841 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
be9bae10 1842
d44913c1 1843 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
77eed219 1844 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 1845 return -ENODEV;
1846
d44913c1
MCC		 1847 /* Needed to increment refcount */
1848 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1849 return -ENODEV;
1850
1851 fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1852 state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 1853
1854 return fe_slave == NULL ? -ENODEV : 0;
1855}
1856
88f3a358
OG		 1857/* TFE8096P */
1858static struct dibx000_agc_config dib8096p_agc_config[2] = {
1859 {
1860 .band_caps = BAND_UHF,
1861 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1862 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1863 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1864 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1865 P_agc_write=0 */
1866 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1867 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1868 | (0 << 4) | (5 << 1) | (0 << 0),
1869
1870 .inv_gain = 684,
1871 .time_stabiliz = 10,
1872
1873 .alpha_level = 0,
1874 .thlock = 118,
1875
1876 .wbd_inv = 0,
1877 .wbd_ref = 1200,
1878 .wbd_sel = 3,
1879 .wbd_alpha = 5,
1880
1881 .agc1_max = 65535,
1882 .agc1_min = 0,
1883
1884 .agc2_max = 32767,
1885 .agc2_min = 0,
1886
1887 .agc1_pt1 = 0,
1888 .agc1_pt2 = 0,
1889 .agc1_pt3 = 105,
1890 .agc1_slope1 = 0,
1891 .agc1_slope2 = 156,
1892 .agc2_pt1 = 105,
1893 .agc2_pt2 = 255,
1894 .agc2_slope1 = 54,
1895 .agc2_slope2 = 0,
1896
1897 .alpha_mant = 28,
1898 .alpha_exp = 26,
1899 .beta_mant = 31,
1900 .beta_exp = 51,
1901
1902 .perform_agc_softsplit = 0,
1903 } , {
1904 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
1905 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1906 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1907 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1908 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1909 P_agc_write=0 */
1910 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1911 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1912 | (0 << 4) | (5 << 1) | (0 << 0),
1913
1914 .inv_gain = 732,
1915 .time_stabiliz = 10,
1916
1917 .alpha_level = 0,
1918 .thlock = 118,
1919
1920 .wbd_inv = 0,
1921 .wbd_ref = 1200,
1922 .wbd_sel = 3,
1923 .wbd_alpha = 5,
1924
1925 .agc1_max = 65535,
1926 .agc1_min = 0,
1927
1928 .agc2_max = 32767,
1929 .agc2_min = 0,
1930
1931 .agc1_pt1 = 0,
1932 .agc1_pt2 = 0,
1933 .agc1_pt3 = 98,
1934 .agc1_slope1 = 0,
1935 .agc1_slope2 = 167,
1936 .agc2_pt1 = 98,
1937 .agc2_pt2 = 255,
1938 .agc2_slope1 = 52,
1939 .agc2_slope2 = 0,
1940
1941 .alpha_mant = 28,
1942 .alpha_exp = 26,
1943 .beta_mant = 31,
1944 .beta_exp = 51,
1945
1946 .perform_agc_softsplit = 0,
1947 }
1948};
1949
1950static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
09628b2c
MCC		 1951 .internal = 108000,
1952 .sampling = 13500,
1953 .pll_prediv = 1,
1954 .pll_ratio = 9,
1955 .pll_range = 1,
1956 .pll_reset = 0,
1957 .pll_bypass = 0,
1958 .enable_refdiv = 0,
1959 .bypclk_div = 0,
1960 .IO_CLK_en_core = 0,
1961 .ADClkSrc = 0,
1962 .modulo = 2,
1963 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1964 .ifreq = (0 << 25) | 0,
1965 .timf = 20199729,
1966 .xtal_hz = 12000000,
88f3a358
OG		 1967};
1968
1969static struct dib8000_config tfe8096p_dib8000_config = {
1970 .output_mpeg2_in_188_bytes = 1,
1971 .hostbus_diversity = 1,
1972 .update_lna = NULL,
1973
1974 .agc_config_count = 2,
1975 .agc = dib8096p_agc_config,
1976 .pll = &dib8096p_clock_config_12_mhz,
1977
1978 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1979 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1980 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1981
1982 .agc_control = NULL,
1983 .diversity_delay = 48,
1984 .output_mode = OUTMODE_MPEG2_FIFO,
1985 .enMpegOutput = 1,
1986};
1987
1988static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
1989 { 380, 81, 850, 64, 540, 4},
1990 { 860, 51, 866, 21, 375, 4},
1991 {1700, 0, 250, 0, 100, 6},
1992 {2600, 0, 250, 0, 100, 6},
1993 { 0xFFFF, 0, 0, 0, 0, 0},
1994};
1995
d44913c1 1996static struct dib0090_config tfe8096p_dib0090_config = {
88f3a358
OG		 1997 .io.clock_khz = 12000,
1998 .io.pll_bypass = 0,
1999 .io.pll_range = 0,
2000 .io.pll_prediv = 3,
2001 .io.pll_loopdiv = 6,
2002 .io.adc_clock_ratio = 0,
2003 .io.pll_int_loop_filt = 0,
88f3a358
OG		 2004
2005 .freq_offset_khz_uhf = -143,
2006 .freq_offset_khz_vhf = -143,
2007
2008 .get_adc_power = dib8090_get_adc_power,
2009
2010 .clkouttobamse = 1,
2011 .analog_output = 0,
2012
2013 .wbd_vhf_offset = 0,
2014 .wbd_cband_offset = 0,
2015 .use_pwm_agc = 1,
2016 .clkoutdrive = 0,
2017
2018 .fref_clock_ratio = 1,
2019
88f3a358
OG		 2020 .ls_cfg_pad_drv = 0,
2021 .data_tx_drv = 0,
2022 .low_if = NULL,
2023 .in_soc = 1,
2024 .force_cband_input = 0,
2025};
2026
5e9c85d9
OG		 2027struct dibx090p_best_adc {
2028 u32 timf;
2029 u32 pll_loopdiv;
2030 u32 pll_prediv;
88f3a358
OG		 2031};
2032
5e9c85d9
OG		 2033static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
2034{
2035 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2036 u16 xtal = 12000;
2037 u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
2038 u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
2039 u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
2040 u32 fdem_min = 66000;
2041 u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
2042 u32 harmonic_id = 0;
2043
2044 adc->timf = 0;
2045 adc->pll_loopdiv = loopdiv;
2046 adc->pll_prediv = prediv;
2047
2048 deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
2049
2050 /* Find Min and Max prediv */
2051 while ((xtal / max_prediv) >= fcp_min)
2052 max_prediv++;
2053
2054 max_prediv--;
2055 min_prediv = max_prediv;
2056 while ((xtal / min_prediv) <= fcp_max) {
2057 min_prediv--;
2058 if (min_prediv == 1)
2059 break;
2060 }
2061 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2062
2063 min_prediv = 1;
2064
2065 for (prediv = min_prediv; prediv < max_prediv; prediv++) {
2066 fcp = xtal / prediv;
2067 if (fcp > fcp_min && fcp < fcp_max) {
2068 for (loopdiv = 1; loopdiv < 64; loopdiv++) {
2069 fmem = ((xtal/prediv) * loopdiv);
2070 fdem = fmem / 2;
2071 fs = fdem / 4;
2072
2073 /* test min/max system restrictions */
2074 if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
2075 spur = 0;
2076 /* test fs harmonics positions */
2077 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
2078 if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
2079 spur = 1;
2080 break;
2081 }
2082 }
2083
2084 if (!spur) {
2085 adc->pll_loopdiv = loopdiv;
2086 adc->pll_prediv = prediv;
2087 adc->timf = (4260880253U / fdem) * (1 << 8);
2088 adc->timf += ((4260880253U % fdem) << 8) / fdem;
2089
2090 deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
2091 break;
2092 }
2093 }
2094 }
2095 }
2096 if (!spur)
2097 break;
2098 }
2099
2100 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
2101 return -EINVAL;
2102 return 0;
2103}
2104
14d24d14 2105static int dib8096p_agc_startup(struct dvb_frontend *fe)
88f3a358
OG		 2106{
2107 struct dvb_usb_adapter *adap = fe->dvb->priv;
2108 struct dib0700_adapter_state *state = adap->priv;
2109 struct dibx000_bandwidth_config pll;
5e9c85d9 2110 struct dibx090p_best_adc adc;
88f3a358 2111 u16 target;
5e9c85d9 2112 int ret;
88f3a358 2113
14d24d14 2114 ret = state->set_param_save(fe);
88f3a358
OG		 2115 if (ret < 0)
2116 return ret;
2117 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2118
2119 dib0090_pwm_gain_reset(fe);
2120 /* dib0090_get_wbd_target is returning any possible
2121 temperature compensated wbd-target */
2122 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
d44913c1 2123 state->dib8000_ops.set_wbd_ref(fe, target);
88f3a358 2124
5e9c85d9
OG		 2125 if (dib8096p_get_best_sampling(fe, &adc) == 0) {
2126 pll.pll_ratio = adc.pll_loopdiv;
2127 pll.pll_prediv = adc.pll_prediv;
88f3a358 2128
5e9c85d9 2129 dib0700_set_i2c_speed(adap->dev, 200);
d44913c1
MCC		 2130 state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
2131 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
5e9c85d9 2132 dib0700_set_i2c_speed(adap->dev, 1000);
88f3a358
OG		 2133 }
2134 return 0;
2135}
2136
2137static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
2138{
5e9c85d9
OG		 2139 struct dib0700_state *st = adap->dev->priv;
2140 u32 fw_version;
d44913c1
MCC		 2141 struct dib0700_adapter_state *state = adap->priv;
2142
2143 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
2144 return -ENODEV;
5e9c85d9
OG		 2145
2146 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2147 if (fw_version >= 0x10200)
2148 st->fw_use_new_i2c_api = 1;
2149
88f3a358
OG		 2150 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
2151 msleep(20);
2152 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2153 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2154 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2155
2156 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2157
2158 dib0700_ctrl_clock(adap->dev, 72, 1);
2159
2160 msleep(20);
2161 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
2162 msleep(20);
2163 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2164
d44913c1 2165 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
88f3a358 2166
d44913c1
MCC		 2167 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
2168 0x80, &tfe8096p_dib8000_config);
88f3a358
OG		 2169
2170 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
2171}
2172
2173static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
2174{
2175 struct dib0700_adapter_state *st = adap->priv;
d44913c1
MCC		 2176 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
2177
2178 tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
2179 tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
2180 tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
88f3a358
OG		 2181
2182 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
2183 &tfe8096p_dib0090_config) == NULL)
2184 return -ENODEV;
2185
d44913c1 2186 st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
88f3a358
OG		 2187
2188 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
2189 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
2190 return 0;
2191}
2192
be9bae10
OG		 2193/* STK9090M */
2194static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
2195{
77eed219 2196 return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
be9bae10
OG		 2197}
2198
2199static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
2200{
77eed219 2201 return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
be9bae10
OG		 2202}
2203
2204static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
2205{
2206 return dib9000_set_gpio(fe, 5, 0, !onoff);
2207}
2208
2209static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
2210{
2211 return dib9000_set_gpio(fe, 0, 0, onoff);
2212}
2213
2214static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
2215{
2216 u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
2217 u8 rb[2];
2218 struct i2c_msg msg[2] = {
b4d6046e
OG		 2219 {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
2220 {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
be9bae10
OG		 2221 };
2222 u8 index_data;
2223
2224 dibx000_i2c_set_speed(i2c, 250);
2225
2226 if (i2c_transfer(i2c, msg, 2) != 2)
2227 return -EIO;
2228
2229 switch (rb[0] << 8 | rb[1]) {
b4d6046e 2230 case 0:
be9bae10
OG		 2231 deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
2232 return -EIO;
b4d6046e 2233 case 1:
be9bae10
OG		 2234 deb_info("Found DiB0170 rev2");
2235 break;
b4d6046e 2236 case 2:
be9bae10
OG		 2237 deb_info("Found DiB0190 rev2");
2238 break;
b4d6046e 2239 default:
be9bae10
OG		 2240 deb_info("DiB01x0 not found");
2241 return -EIO;
b4d6046e 2242 }
be9bae10
OG		 2243
2244 for (index_data = 0; index_data < len; index_data += 2) {
2245 wb[2] = (data[index_data + 1] >> 8) & 0xff;
2246 wb[3] = (data[index_data + 1]) & 0xff;
2247
2248 if (data[index_data] == 0) {
2249 wb[0] = (data[index_data] >> 8) & 0xff;
2250 wb[1] = (data[index_data]) & 0xff;
2251 msg[0].len = 2;
2252 if (i2c_transfer(i2c, msg, 2) != 2)
2253 return -EIO;
2254 wb[2] |= rb[0];
2255 wb[3] |= rb[1] & ~(3 << 4);
2256 }
2257
b4d6046e
OG		 2258 wb[0] = (data[index_data] >> 8)&0xff;
2259 wb[1] = (data[index_data])&0xff;
be9bae10
OG		 2260 msg[0].len = 4;
2261 if (i2c_transfer(i2c, &msg[0], 1) != 1)
2262 return -EIO;
2263 }
2264 return 0;
2265}
2266
2267static struct dib9000_config stk9090m_config = {
2268 .output_mpeg2_in_188_bytes = 1,
2269 .output_mode = OUTMODE_MPEG2_FIFO,
2270 .vcxo_timer = 279620,
2271 .timing_frequency = 20452225,
2272 .demod_clock_khz = 60000,
2273 .xtal_clock_khz = 30000,
2274 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2275 .subband = {
2276 2,
2277 {
2278 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
2279 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
2280 { 0 },
2281 },
2282 },
2283 .gpio_function = {
2284 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2285 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2286 },
2287};
2288
2289static struct dib9000_config nim9090md_config[2] = {
2290 {
2291 .output_mpeg2_in_188_bytes = 1,
2292 .output_mode = OUTMODE_MPEG2_FIFO,
2293 .vcxo_timer = 279620,
2294 .timing_frequency = 20452225,
2295 .demod_clock_khz = 60000,
2296 .xtal_clock_khz = 30000,
2297 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2298 }, {
2299 .output_mpeg2_in_188_bytes = 1,
2300 .output_mode = OUTMODE_DIVERSITY,
2301 .vcxo_timer = 279620,
2302 .timing_frequency = 20452225,
2303 .demod_clock_khz = 60000,
2304 .xtal_clock_khz = 30000,
2305 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2306 .subband = {
2307 2,
2308 {
2309 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
2310 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
2311 { 0 },
2312 },
2313 },
2314 .gpio_function = {
2315 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2316 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2317 },
2318 }
2319};
2320
2321static struct dib0090_config dib9090_dib0090_config = {
2322 .io.pll_bypass = 0,
2323 .io.pll_range = 1,
2324 .io.pll_prediv = 1,
2325 .io.pll_loopdiv = 8,
2326 .io.adc_clock_ratio = 8,
2327 .io.pll_int_loop_filt = 0,
2328 .io.clock_khz = 30000,
2329 .reset = dib90x0_tuner_reset,
2330 .sleep = dib90x0_tuner_sleep,
2331 .clkouttobamse = 0,
2332 .analog_output = 0,
2333 .use_pwm_agc = 0,
2334 .clkoutdrive = 0,
2335 .freq_offset_khz_uhf = 0,
2336 .freq_offset_khz_vhf = 0,
2337};
2338
2339static struct dib0090_config nim9090md_dib0090_config[2] = {
2340 {
2341 .io.pll_bypass = 0,
2342 .io.pll_range = 1,
2343 .io.pll_prediv = 1,
2344 .io.pll_loopdiv = 8,
2345 .io.adc_clock_ratio = 8,
2346 .io.pll_int_loop_filt = 0,
2347 .io.clock_khz = 30000,
2348 .reset = dib90x0_tuner_reset,
2349 .sleep = dib90x0_tuner_sleep,
2350 .clkouttobamse = 1,
2351 .analog_output = 0,
2352 .use_pwm_agc = 0,
2353 .clkoutdrive = 0,
2354 .freq_offset_khz_uhf = 0,
2355 .freq_offset_khz_vhf = 0,
b4d6046e 2356 }, {
be9bae10
OG		 2357 .io.pll_bypass = 0,
2358 .io.pll_range = 1,
2359 .io.pll_prediv = 1,
2360 .io.pll_loopdiv = 8,
2361 .io.adc_clock_ratio = 8,
2362 .io.pll_int_loop_filt = 0,
2363 .io.clock_khz = 30000,
2364 .reset = dib90x0_tuner_reset,
2365 .sleep = dib90x0_tuner_sleep,
2366 .clkouttobamse = 0,
2367 .analog_output = 0,
2368 .use_pwm_agc = 0,
2369 .clkoutdrive = 0,
2370 .freq_offset_khz_uhf = 0,
2371 .freq_offset_khz_vhf = 0,
2372 }
2373};
2374
2375
2376static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
2377{
2378 struct dib0700_adapter_state *state = adap->priv;
2379 struct dib0700_state *st = adap->dev->priv;
2380 u32 fw_version;
2381
2382 /* Make use of the new i2c functions from FW 1.20 */
2383 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2384 if (fw_version >= 0x10200)
2385 st->fw_use_new_i2c_api = 1;
2386 dib0700_set_i2c_speed(adap->dev, 340);
2387
2388 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2389 msleep(20);
be9bae10
OG		 2390 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2391 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2392 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2393 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2394
2395 dib0700_ctrl_clock(adap->dev, 72, 1);
2396
b4d6046e 2397 msleep(20);
be9bae10 2398 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2399 msleep(20);
be9bae10
OG		 2400 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2401
2402 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
2403
2404 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2405 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2406 return -ENODEV;
2407 } else {
5b5e0928 2408 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2409 }
2410 stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
2411 stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
2412
77eed219 2413 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
be9bae10 2414
4b267c23
RR		 2415 if (!adap->fe_adap[0].fe) {
2416 release_firmware(state->frontend_firmware);
2417 return -ENODEV;
2418 }
2419
2420 return 0;
be9bae10
OG		 2421}
2422
2423static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
2424{
2425 struct dib0700_adapter_state *state = adap->priv;
77eed219 2426 struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2427 u16 data_dib190[10] = {
2428 1, 0x1374,
2429 2, 0x01a2,
2430 7, 0x0020,
2431 0, 0x00ef,
2432 8, 0x0486,
2433 };
2434
765bb861
AB		 2435 if (!IS_ENABLED(CONFIG_DVB_DIB9000))
2436 return -ENODEV;
77eed219 2437 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
be9bae10 2438 return -ENODEV;
77eed219 2439 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
765bb861
AB		 2440 if (!i2c)
2441 return -ENODEV;
be9bae10
OG		 2442 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
2443 return -ENODEV;
d1190024 2444 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2445 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10 2446 return -ENODEV;
b4d6046e 2447 release_firmware(state->frontend_firmware);
be9bae10
OG		 2448 return 0;
2449}
2450
2451static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
2452{
2453 struct dib0700_adapter_state *state = adap->priv;
2454 struct dib0700_state *st = adap->dev->priv;
2455 struct i2c_adapter *i2c;
2456 struct dvb_frontend *fe_slave;
2457 u32 fw_version;
2458
2459 /* Make use of the new i2c functions from FW 1.20 */
2460 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2461 if (fw_version >= 0x10200)
2462 st->fw_use_new_i2c_api = 1;
2463 dib0700_set_i2c_speed(adap->dev, 340);
2464
2465 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2466 msleep(20);
be9bae10
OG		 2467 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2468 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2469 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2470 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2471
2472 dib0700_ctrl_clock(adap->dev, 72, 1);
2473
b4d6046e 2474 msleep(20);
be9bae10 2475 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2476 msleep(20);
be9bae10
OG		 2477 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2478
2479 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2480 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2481 return -EIO;
2482 } else {
5b5e0928 2483 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2484 }
2485 nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
2486 nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
2487 nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
2488 nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
2489
2490 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
77eed219 2491 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
be9bae10 2492
4b267c23
RR		 2493 if (!adap->fe_adap[0].fe) {
2494 release_firmware(state->frontend_firmware);
be9bae10 2495 return -ENODEV;
4b267c23 2496 }
be9bae10 2497
77eed219 2498 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
be9bae10
OG		 2499 dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
2500
2501 fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
77eed219 2502 dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10 2503
4b267c23
RR		 2504 if (!fe_slave) {
2505 release_firmware(state->frontend_firmware);
2506 return -ENODEV;
2507 }
2508
2509 return 0;
03245a5e
OG		 2510}
2511
be9bae10
OG		 2512static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
2513{
2514 struct dib0700_adapter_state *state = adap->priv;
2515 struct i2c_adapter *i2c;
2516 struct dvb_frontend *fe_slave;
2517 u16 data_dib190[10] = {
2518 1, 0x5374,
2519 2, 0x01ae,
2520 7, 0x0020,
2521 0, 0x00ef,
2522 8, 0x0406,
2523 };
765bb861
AB		 2524 if (!IS_ENABLED(CONFIG_DVB_DIB9000))
2525 return -ENODEV;
77eed219
MK		 2526 i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
2527 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
be9bae10 2528 return -ENODEV;
77eed219 2529 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
765bb861
AB		 2530 if (!i2c)
2531 return -ENODEV;
be9bae10
OG		 2532 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
2533 return -ENODEV;
d1190024
OG		 2534
2535 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2536 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10
OG		 2537 return -ENODEV;
2538
77eed219 2539 fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10 2540 if (fe_slave != NULL) {
77eed219 2541 i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2542 dib9000_set_i2c_adapter(fe_slave, i2c);
2543
2544 i2c = dib9000_get_tuner_interface(fe_slave);
2545 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
2546 return -ENODEV;
77eed219 2547 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
d1190024 2548 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
be9bae10
OG		 2549 if (dib9000_firmware_post_pll_init(fe_slave) < 0)
2550 return -ENODEV;
2551 }
b4d6046e 2552 release_firmware(state->frontend_firmware);
be9bae10
OG		 2553
2554 return 0;
2555}
2556
2557/* NIM7090 */
5e9c85d9 2558static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
be9bae10
OG		 2559{
2560 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2561
2562 u16 xtal = 12000;
2563 u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
2564 u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
2565 u32 fdem_max = 76000;
2566 u32 fdem_min = 69500;
2567 u32 fcp = 0, fs = 0, fdem = 0;
2568 u32 harmonic_id = 0;
2569
2570 adc->pll_loopdiv = loopdiv;
2571 adc->pll_prediv = prediv;
2572 adc->timf = 0;
2573
2574 deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
2575
2576 /* Find Min and Max prediv */
b4d6046e 2577 while ((xtal/max_prediv) >= fcp_min)
be9bae10
OG		 2578 max_prediv++;
2579
2580 max_prediv--;
2581 min_prediv = max_prediv;
b4d6046e 2582 while ((xtal/min_prediv) <= fcp_max) {
be9bae10 2583 min_prediv--;
b4d6046e 2584 if (min_prediv == 1)
be9bae10
OG		 2585 break;
2586 }
2587 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2588
2589 min_prediv = 2;
2590
b4d6046e 2591 for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
be9bae10 2592 fcp = xtal / prediv;
b4d6046e
OG		 2593 if (fcp > fcp_min && fcp < fcp_max) {
2594 for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
be9bae10
OG		 2595 fdem = ((xtal/prediv) * loopdiv);
2596 fs = fdem / 4;
2597 /* test min/max system restrictions */
2598
b4d6046e 2599 if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
be9bae10
OG		 2600 spur = 0;
2601 /* test fs harmonics positions */
b4d6046e
OG		 2602 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
2603 if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
be9bae10
OG		 2604 spur = 1;
2605 break;
2606 }
2607 }
2608
b4d6046e 2609 if (!spur) {
be9bae10
OG		 2610 adc->pll_loopdiv = loopdiv;
2611 adc->pll_prediv = prediv;
b4d6046e
OG		 2612 adc->timf = 2396745143UL/fdem*(1 << 9);
2613 adc->timf += ((2396745143UL%fdem) << 9)/fdem;
be9bae10
OG		 2614 deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
2615 break;
2616 }
2617 }
2618 }
2619 }
2620 if (!spur)
2621 break;
2622 }
2623
2624
b4d6046e 2625 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
be9bae10 2626 return -EINVAL;
b4d6046e 2627 else
be9bae10
OG		 2628 return 0;
2629}
2630
14d24d14 2631static int dib7090_agc_startup(struct dvb_frontend *fe)
be9bae10
OG		 2632{
2633 struct dvb_usb_adapter *adap = fe->dvb->priv;
2634 struct dib0700_adapter_state *state = adap->priv;
2635 struct dibx000_bandwidth_config pll;
2636 u16 target;
5e9c85d9 2637 struct dibx090p_best_adc adc;
be9bae10
OG		 2638 int ret;
2639
14d24d14 2640 ret = state->set_param_save(fe);
be9bae10
OG		 2641 if (ret < 0)
2642 return ret;
2643
2644 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2645 dib0090_pwm_gain_reset(fe);
6724a2f4 2646 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
8abe4a0a 2647 state->dib7000p_ops.set_wbd_ref(fe, target);
be9bae10 2648
b4d6046e 2649 if (dib7090p_get_best_sampling(fe, &adc) == 0) {
be9bae10
OG		 2650 pll.pll_ratio = adc.pll_loopdiv;
2651 pll.pll_prediv = adc.pll_prediv;
2652
8abe4a0a
MCC		 2653 state->dib7000p_ops.update_pll(fe, &pll);
2654 state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
be9bae10
OG		 2655 }
2656 return 0;
2657}
2658
2e802861
OG		 2659static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
2660{
2661 deb_info("AGC restart callback: %d", restart);
2662 if (restart == 0) /* before AGC startup */
2663 dib0090_set_dc_servo(fe, 1);
2664 return 0;
2665}
2666
f45f513a 2667static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
6724a2f4 2668{
8abe4a0a
MCC		 2669 struct dvb_usb_adapter *adap = fe->dvb->priv;
2670 struct dib0700_adapter_state *state = adap->priv;
2671
f45f513a 2672 deb_info("update LNA: agc global=%i", agc_global);
6724a2f4 2673
f45f513a 2674 if (agc_global < 25000) {
8abe4a0a
MCC		 2675 state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
2676 state->dib7000p_ops.set_agc1_min(fe, 0);
6724a2f4 2677 } else {
8abe4a0a
MCC		 2678 state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
2679 state->dib7000p_ops.set_agc1_min(fe, 32768);
6724a2f4
OG		 2680 }
2681
2682 return 0;
2683}
2684
be9bae10 2685static struct dib0090_wbd_slope dib7090_wbd_table[] = {
b4d6046e
OG		 2686 { 380, 81, 850, 64, 540, 4},
2687 { 860, 51, 866, 21, 375, 4},
2688 {1700, 0, 250, 0, 100, 6},
2689 {2600, 0, 250, 0, 100, 6},
2690 { 0xFFFF, 0, 0, 0, 0, 0},
03245a5e
OG		 2691};
2692
a685dbbc 2693static struct dibx000_agc_config dib7090_agc_config[2] = {
be9bae10
OG		 2694 {
2695 .band_caps = BAND_UHF,
2696 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2697 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2698 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2699
b4d6046e
OG		 2700 .inv_gain = 687,
2701 .time_stabiliz = 10,
be9bae10 2702
b4d6046e
OG		 2703 .alpha_level = 0,
2704 .thlock = 118,
be9bae10 2705
b4d6046e
OG		 2706 .wbd_inv = 0,
2707 .wbd_ref = 1200,
2708 .wbd_sel = 3,
2709 .wbd_alpha = 5,
be9bae10 2710
b4d6046e 2711 .agc1_max = 65535,
59501bb7 2712 .agc1_min = 32768,
be9bae10 2713
b4d6046e
OG		 2714 .agc2_max = 65535,
2715 .agc2_min = 0,
be9bae10 2716
b4d6046e
OG		 2717 .agc1_pt1 = 0,
2718 .agc1_pt2 = 32,
2719 .agc1_pt3 = 114,
2720 .agc1_slope1 = 143,
2721 .agc1_slope2 = 144,
2722 .agc2_pt1 = 114,
2723 .agc2_pt2 = 227,
2724 .agc2_slope1 = 116,
2725 .agc2_slope2 = 117,
be9bae10 2726
b4d6046e
OG		 2727 .alpha_mant = 18,
2728 .alpha_exp = 0,
2729 .beta_mant = 20,
2730 .beta_exp = 59,
be9bae10 2731
b4d6046e 2732 .perform_agc_softsplit = 0,
be9bae10
OG		 2733 } , {
2734 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
2735 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2736 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2737 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2738
b4d6046e
OG		 2739 .inv_gain = 732,
2740 .time_stabiliz = 10,
be9bae10 2741
b4d6046e
OG		 2742 .alpha_level = 0,
2743 .thlock = 118,
be9bae10 2744
b4d6046e
OG		 2745 .wbd_inv = 0,
2746 .wbd_ref = 1200,
2747 .wbd_sel = 3,
2748 .wbd_alpha = 5,
be9bae10 2749
b4d6046e
OG		 2750 .agc1_max = 65535,
2751 .agc1_min = 0,
be9bae10 2752
b4d6046e
OG		 2753 .agc2_max = 65535,
2754 .agc2_min = 0,
be9bae10 2755
b4d6046e
OG		 2756 .agc1_pt1 = 0,
2757 .agc1_pt2 = 0,
2758 .agc1_pt3 = 98,
2759 .agc1_slope1 = 0,
2760 .agc1_slope2 = 167,
7f4d527f 2761 .agc2_pt1 = 98,
b4d6046e
OG		 2762 .agc2_pt2 = 255,
2763 .agc2_slope1 = 104,
2764 .agc2_slope2 = 0,
be9bae10 2765
b4d6046e
OG		 2766 .alpha_mant = 18,
2767 .alpha_exp = 0,
2768 .beta_mant = 20,
2769 .beta_exp = 59,
be9bae10 2770
b4d6046e 2771 .perform_agc_softsplit = 0,
be9bae10
OG		 2772 }
2773};
2774
2775static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
09628b2c
MCC		 2776 .internal = 60000,
2777 .sampling = 15000,
2778 .pll_prediv = 1,
2779 .pll_ratio = 5,
2780 .pll_range = 0,
2781 .pll_reset = 0,
2782 .pll_bypass = 0,
2783 .enable_refdiv = 0,
2784 .bypclk_div = 0,
2785 .IO_CLK_en_core = 1,
2786 .ADClkSrc = 1,
2787 .modulo = 2,
2788 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
2789 .ifreq = (0 << 25) | 0,
2790 .timf = 20452225,
2791 .xtal_hz = 15000000,
be9bae10
OG		 2792};
2793
2794static struct dib7000p_config nim7090_dib7000p_config = {
2795 .output_mpeg2_in_188_bytes = 1,
2796 .hostbus_diversity = 1,
2797 .tuner_is_baseband = 1,
59501bb7 2798 .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
be9bae10
OG		 2799
2800 .agc_config_count = 2,
2801 .agc = dib7090_agc_config,
2802
2803 .bw = &dib7090_clock_config_12_mhz,
2804
2805 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2806 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2807 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2808
2809 .pwm_freq_div = 0,
2810
2811 .agc_control = dib7090_agc_restart,
2812
2813 .spur_protect = 0,
2814 .disable_sample_and_hold = 0,
2815 .enable_current_mirror = 0,
2816 .diversity_delay = 0,
2817
2818 .output_mode = OUTMODE_MPEG2_FIFO,
2819 .enMpegOutput = 1,
2820};
2821
59501bb7
OG		 2822static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
2823{
8abe4a0a
MCC		 2824 struct dvb_usb_adapter *adap = fe->dvb->priv;
2825 struct dib0700_adapter_state *state = adap->priv;
2826
59501bb7
OG		 2827 deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
2828 if (agc_global < 25000) {
8abe4a0a
MCC		 2829 state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
2830 state->dib7000p_ops.set_agc1_min(fe, 0);
59501bb7 2831 } else {
8abe4a0a
MCC		 2832 state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
2833 state->dib7000p_ops.set_agc1_min(fe, 32768);
59501bb7
OG		 2834 }
2835
2836 return 0;
2837}
2838
be9bae10
OG		 2839static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
2840 {
2841 .output_mpeg2_in_188_bytes = 1,
2842 .hostbus_diversity = 1,
2843 .tuner_is_baseband = 1,
59501bb7 2844 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2845
2846 .agc_config_count = 2,
2847 .agc = dib7090_agc_config,
2848
2849 .bw = &dib7090_clock_config_12_mhz,
2850
2851 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2852 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2853 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2854
2855 .pwm_freq_div = 0,
2856
2857 .agc_control = dib7090_agc_restart,
2858
2859 .spur_protect = 0,
2860 .disable_sample_and_hold = 0,
2861 .enable_current_mirror = 0,
2862 .diversity_delay = 0,
2863
2864 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2865 .default_i2c_addr = 0x90,
2866 .enMpegOutput = 1,
b4d6046e 2867 }, {
be9bae10
OG		 2868 .output_mpeg2_in_188_bytes = 1,
2869 .hostbus_diversity = 1,
2870 .tuner_is_baseband = 1,
59501bb7 2871 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2872
2873 .agc_config_count = 2,
2874 .agc = dib7090_agc_config,
2875
2876 .bw = &dib7090_clock_config_12_mhz,
2877
2878 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2879 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2880 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2881
2882 .pwm_freq_div = 0,
2883
2884 .agc_control = dib7090_agc_restart,
2885
2886 .spur_protect = 0,
2887 .disable_sample_and_hold = 0,
2888 .enable_current_mirror = 0,
2889 .diversity_delay = 0,
2890
2891 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2892 .default_i2c_addr = 0x92,
2893 .enMpegOutput = 0,
2894 }
2895};
2896
8abe4a0a 2897static struct dib0090_config nim7090_dib0090_config = {
be9bae10
OG		 2898 .io.clock_khz = 12000,
2899 .io.pll_bypass = 0,
2900 .io.pll_range = 0,
2901 .io.pll_prediv = 3,
2902 .io.pll_loopdiv = 6,
2903 .io.adc_clock_ratio = 0,
2904 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2905
2906 .freq_offset_khz_uhf = 0,
2907 .freq_offset_khz_vhf = 0,
2908
be9bae10
OG		 2909 .clkouttobamse = 1,
2910 .analog_output = 0,
2911
2912 .wbd_vhf_offset = 0,
2913 .wbd_cband_offset = 0,
2914 .use_pwm_agc = 1,
2915 .clkoutdrive = 0,
2916
2917 .fref_clock_ratio = 0,
2918
2919 .wbd = dib7090_wbd_table,
2920
2921 .ls_cfg_pad_drv = 0,
2922 .data_tx_drv = 0,
2923 .low_if = NULL,
2924 .in_soc = 1,
2925};
2926
f45f513a 2927static struct dib7000p_config tfe7790p_dib7000p_config = {
b293f304
OG		 2928 .output_mpeg2_in_188_bytes = 1,
2929 .hostbus_diversity = 1,
2930 .tuner_is_baseband = 1,
f45f513a 2931 .update_lna = tfe7790p_update_lna,
b293f304
OG		 2932
2933 .agc_config_count = 2,
2934 .agc = dib7090_agc_config,
2935
2936 .bw = &dib7090_clock_config_12_mhz,
2937
2938 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2939 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2940 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2941
2942 .pwm_freq_div = 0,
2943
2944 .agc_control = dib7090_agc_restart,
2945
2946 .spur_protect = 0,
2947 .disable_sample_and_hold = 0,
2948 .enable_current_mirror = 0,
2949 .diversity_delay = 0,
2950
2951 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2952 .enMpegOutput = 1,
2953};
2954
8abe4a0a 2955static struct dib0090_config tfe7790p_dib0090_config = {
b293f304
OG		 2956 .io.clock_khz = 12000,
2957 .io.pll_bypass = 0,
2958 .io.pll_range = 0,
2959 .io.pll_prediv = 3,
2960 .io.pll_loopdiv = 6,
2961 .io.adc_clock_ratio = 0,
2962 .io.pll_int_loop_filt = 0,
b293f304
OG		 2963
2964 .freq_offset_khz_uhf = 0,
2965 .freq_offset_khz_vhf = 0,
2966
b293f304
OG		 2967 .clkouttobamse = 1,
2968 .analog_output = 0,
2969
2970 .wbd_vhf_offset = 0,
2971 .wbd_cband_offset = 0,
2972 .use_pwm_agc = 1,
2973 .clkoutdrive = 0,
2974
2975 .fref_clock_ratio = 0,
2976
f45f513a 2977 .wbd = dib7090_wbd_table,
b293f304
OG		 2978
2979 .ls_cfg_pad_drv = 0,
2980 .data_tx_drv = 0,
2981 .low_if = NULL,
2982 .in_soc = 1,
f45f513a
OG		 2983 .force_cband_input = 0,
2984 .is_dib7090e = 0,
b293f304
OG		 2985 .force_crystal_mode = 1,
2986};
2987
8abe4a0a 2988static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
be9bae10
OG		 2989 {
2990 .io.clock_khz = 12000,
2991 .io.pll_bypass = 0,
2992 .io.pll_range = 0,
2993 .io.pll_prediv = 3,
2994 .io.pll_loopdiv = 6,
2995 .io.adc_clock_ratio = 0,
2996 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2997
2998 .freq_offset_khz_uhf = 50,
2999 .freq_offset_khz_vhf = 70,
3000
be9bae10
OG		 3001 .clkouttobamse = 1,
3002 .analog_output = 0,
3003
3004 .wbd_vhf_offset = 0,
3005 .wbd_cband_offset = 0,
3006 .use_pwm_agc = 1,
3007 .clkoutdrive = 0,
3008
3009 .fref_clock_ratio = 0,
3010
3011 .wbd = dib7090_wbd_table,
3012
3013 .ls_cfg_pad_drv = 0,
3014 .data_tx_drv = 0,
3015 .low_if = NULL,
3016 .in_soc = 1,
b4d6046e 3017 }, {
be9bae10
OG		 3018 .io.clock_khz = 12000,
3019 .io.pll_bypass = 0,
3020 .io.pll_range = 0,
3021 .io.pll_prediv = 3,
3022 .io.pll_loopdiv = 6,
3023 .io.adc_clock_ratio = 0,
3024 .io.pll_int_loop_filt = 0,
be9bae10
OG		 3025
3026 .freq_offset_khz_uhf = -50,
3027 .freq_offset_khz_vhf = -70,
3028
be9bae10
OG		 3029 .clkouttobamse = 1,
3030 .analog_output = 0,
3031
3032 .wbd_vhf_offset = 0,
3033 .wbd_cband_offset = 0,
3034 .use_pwm_agc = 1,
3035 .clkoutdrive = 0,
3036
3037 .fref_clock_ratio = 0,
3038
3039 .wbd = dib7090_wbd_table,
3040
3041 .ls_cfg_pad_drv = 0,
3042 .data_tx_drv = 0,
3043 .low_if = NULL,
3044 .in_soc = 1,
3045 }
3046};
3047
3048static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
3049{
8abe4a0a
MCC		 3050 struct dib0700_adapter_state *state = adap->priv;
3051
3052 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3053 return -ENODEV;
3054
be9bae10 3055 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3056 msleep(20);
be9bae10
OG		 3057 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3058 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3059 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3060 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3061
b4d6046e 3062 msleep(20);
be9bae10 3063 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3064 msleep(20);
be9bae10 3065 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
03245a5e 3066
8abe4a0a
MCC		 3067 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
3068 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3069 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3070 return -ENODEV;
3071 }
8abe4a0a 3072 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
03245a5e 3073
77eed219 3074 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
03245a5e
OG		 3075}
3076
be9bae10 3077static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
03245a5e 3078{
be9bae10 3079 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3080 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3081
7214f42c
JL		 3082 nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
3083 nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
8abe4a0a 3084 nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3085
77eed219 3086 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
be9bae10 3087 return -ENODEV;
03245a5e 3088
8abe4a0a 3089 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
03245a5e 3090
77eed219
MK		 3091 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3092 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3093 return 0;
03245a5e
OG		 3094}
3095
be9bae10 3096static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
03245a5e 3097{
be9bae10 3098 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3099 struct dib0700_adapter_state *state = adap->priv;
3100
3101 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3102 return -ENODEV;
be9bae10
OG		 3103
3104 /* The TFE7090 requires the dib0700 to not be in master mode */
3105 st->disable_streaming_master_mode = 1;
3106
03245a5e 3107 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3108 msleep(20);
03245a5e
OG		 3109 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3110 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3111 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
03245a5e
OG		 3112 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3113
b4d6046e 3114 msleep(20);
03245a5e 3115 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3116 msleep(20);
03245a5e
OG		 3117 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3118
be9bae10 3119 /* initialize IC 0 */
8abe4a0a
MCC		 3120 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
3121 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3122 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3123 return -ENODEV;
3124 }
03245a5e 3125
be9bae10 3126 dib0700_set_i2c_speed(adap->dev, 340);
8abe4a0a 3127 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
77eed219 3128 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 3129 return -ENODEV;
3130
8abe4a0a 3131 state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
71682520 3132
be9bae10
OG		 3133 return 0;
3134}
3135
3136static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
3137{
3138 struct i2c_adapter *i2c;
8abe4a0a 3139 struct dib0700_adapter_state *state = adap->priv;
be9bae10 3140
77eed219 3141 if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
be9bae10
OG		 3142 err("the master dib7090 has to be initialized first");
3143 return -ENODEV; /* the master device has not been initialized */
3144 }
3145
8abe4a0a
MCC		 3146 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3147 return -ENODEV;
3148
3149 i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
3150 if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
3151 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3152 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3153 return -ENODEV;
3154 }
3155
8abe4a0a 3156 adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
be9bae10
OG		 3157 dib0700_set_i2c_speed(adap->dev, 200);
3158
77eed219 3159 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 3160}
3161
3162static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
3163{
3164 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3165 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3166
3167 tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
3168 tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
3169 tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3170
77eed219 3171 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
be9bae10
OG		 3172 return -ENODEV;
3173
8abe4a0a 3174 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3175
77eed219
MK		 3176 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3177 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10
OG		 3178 return 0;
3179}
3180
3181static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
3182{
3183 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3184 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3185
3186 tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
3187 tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
3188 tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3189
77eed219 3190 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
be9bae10
OG		 3191 return -ENODEV;
3192
8abe4a0a 3193 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3194
77eed219
MK		 3195 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3196 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3197 return 0;
03245a5e 3198}
ba3fe3a9 3199
f45f513a 3200static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
b293f304
OG		 3201{
3202 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3203 struct dib0700_adapter_state *state = adap->priv;
3204
3205 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3206 return -ENODEV;
b293f304 3207
f45f513a 3208 /* The TFE7790P requires the dib0700 to not be in master mode */
b293f304
OG		 3209 st->disable_streaming_master_mode = 1;
3210
3211 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3212 msleep(20);
3213 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3214 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3215 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3216 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3217 msleep(20);
3218 dib0700_ctrl_clock(adap->dev, 72, 1);
3219 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3220 msleep(20);
3221 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3222
8abe4a0a 3223 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
f45f513a 3224 1, 0x10, &tfe7790p_dib7000p_config) != 0) {
8abe4a0a 3225 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
b293f304 3226 __func__);
eb0c1994 3227 dvb_detach(state->dib7000p_ops.set_wbd_ref);
b293f304
OG		 3228 return -ENODEV;
3229 }
8abe4a0a 3230 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
f45f513a 3231 0x80, &tfe7790p_dib7000p_config);
b293f304
OG		 3232
3233 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
3234}
3235
f45f513a 3236static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
6724a2f4
OG		 3237{
3238 struct dib0700_adapter_state *st = adap->priv;
3239 struct i2c_adapter *tun_i2c =
8abe4a0a
MCC		 3240 st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3241
3242
3243 tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
3244 tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
3245 tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
6724a2f4
OG		 3246
3247 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
f45f513a 3248 &tfe7790p_dib0090_config) == NULL)
6724a2f4
OG		 3249 return -ENODEV;
3250
8abe4a0a 3251 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6724a2f4
OG		 3252
3253 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3254 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
3255 return 0;
3256}
3257
01373a5c
PB		 3258/* STK7070PD */
3259static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
3260 {
3261 .output_mpeg2_in_188_bytes = 1,
3262
3263 .agc_config_count = 1,
3264 .agc = &dib7070_agc_config,
3265 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3266 .tuner_is_baseband = 1,
3267 .spur_protect = 1,
01373a5c
PB		 3268
3269 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3270 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3271 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3272
3273 .hostbus_diversity = 1,
3274 }, {
3275 .output_mpeg2_in_188_bytes = 1,
3276
3277 .agc_config_count = 1,
3278 .agc = &dib7070_agc_config,
3279 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3280 .tuner_is_baseband = 1,
3281 .spur_protect = 1,
01373a5c
PB		 3282
3283 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3284 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3285 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3286
3287 .hostbus_diversity = 1,
3288 }
3289};
3290
52fd5b2e 3291static void stk7070pd_init(struct dvb_usb_device *dev)
01373a5c 3292{
52fd5b2e 3293 dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
01373a5c 3294 msleep(10);
52fd5b2e
JS		 3295 dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
3296 dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
3297 dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
3298 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
01373a5c 3299
52fd5b2e 3300 dib0700_ctrl_clock(dev, 72, 1);
01373a5c
PB		 3301
3302 msleep(10);
52fd5b2e
JS		 3303 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
3304}
3305
3306static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
3307{
8abe4a0a
MCC		 3308 struct dib0700_adapter_state *state = adap->priv;
3309
3310 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3311 return -ENODEV;
3312
52fd5b2e
JS		 3313 stk7070pd_init(adap->dev);
3314
01373a5c
PB		 3315 msleep(10);
3316 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3317
8abe4a0a 3318 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7 3319 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3320 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 3321 __func__);
eb0c1994 3322 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 3323 return -ENODEV;
3324 }
01373a5c 3325
8abe4a0a 3326 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
77eed219 3327 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3328}
3329
3330static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
3331{
8abe4a0a
MCC		 3332 struct dib0700_adapter_state *state = adap->priv;
3333
3334 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3335 return -ENODEV;
3336
3337 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
77eed219 3338 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3339}
3340
d43272a4 3341static int novatd_read_status_override(struct dvb_frontend *fe,
0df289a2 3342 enum fe_status *stat)
d43272a4
JS		 3343{
3344 struct dvb_usb_adapter *adap = fe->dvb->priv;
3345 struct dvb_usb_device *dev = adap->dev;
3346 struct dib0700_state *state = dev->priv;
3347 int ret;
3348
3349 ret = state->read_status(fe, stat);
3350
3351 if (!ret)
3352 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
3353 !!(*stat & FE_HAS_LOCK));
3354
3355 return ret;
3356}
3357
3358static int novatd_sleep_override(struct dvb_frontend* fe)
3359{
3360 struct dvb_usb_adapter *adap = fe->dvb->priv;
3361 struct dvb_usb_device *dev = adap->dev;
3362 struct dib0700_state *state = dev->priv;
3363
3364 /* turn off LED */
3365 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
3366
3367 return state->sleep(fe);
3368}
3369
cba862dc 3370/*
2b05b881
JS		 3371 * novatd_frontend_attach - Nova-TD specific attach
3372 *
3373 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
3374 * information purposes.
3375 */
3376static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
3377{
3378 struct dvb_usb_device *dev = adap->dev;
d43272a4 3379 struct dib0700_state *st = dev->priv;
8abe4a0a
MCC		 3380 struct dib0700_adapter_state *state = adap->priv;
3381
3382 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3383 return -ENODEV;
2b05b881
JS		 3384
3385 if (adap->id == 0) {
3386 stk7070pd_init(dev);
3387
3388 /* turn the power LED on, the other two off (just in case) */
3389 dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
3390 dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
3391 dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
3392
8abe4a0a 3393 if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
2b05b881 3394 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3395 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
2b05b881 3396 __func__);
eb0c1994 3397 dvb_detach(state->dib7000p_ops.set_wbd_ref);
2b05b881
JS		 3398 return -ENODEV;
3399 }
3400 }
3401
8abe4a0a 3402 adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
2b05b881
JS		 3403 adap->id == 0 ? 0x80 : 0x82,
3404 &stk7070pd_dib7000p_config[adap->id]);
d43272a4
JS		 3405
3406 if (adap->fe_adap[0].fe == NULL)
3407 return -ENODEV;
3408
3409 st->read_status = adap->fe_adap[0].fe->ops.read_status;
3410 adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
3411 st->sleep = adap->fe_adap[0].fe->ops.sleep;
3412 adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
3413
3414 return 0;
2b05b881
JS		 3415}
3416
cb22cb52
DH		 3417/* S5H1411 */
3418static struct s5h1411_config pinnacle_801e_config = {
3419 .output_mode = S5H1411_PARALLEL_OUTPUT,
3420 .gpio = S5H1411_GPIO_OFF,
ad05ff09 3421 .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK,
cb22cb52
DH		 3422 .qam_if = S5H1411_IF_44000,
3423 .vsb_if = S5H1411_IF_44000,
3424 .inversion = S5H1411_INVERSION_OFF,
3425 .status_mode = S5H1411_DEMODLOCKING
3426};
3427
3428/* Pinnacle PCTV HD Pro 801e GPIOs map:
3429 GPIO0 - currently unknown
3430 GPIO1 - xc5000 tuner reset
3431 GPIO2 - CX25843 sleep
3432 GPIO3 - currently unknown
3433 GPIO4 - currently unknown
3434 GPIO6 - currently unknown
3435 GPIO7 - currently unknown
3436 GPIO9 - currently unknown
3437 GPIO10 - CX25843 reset
3438 */
3439static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
3440{
3441 struct dib0700_state *st = adap->dev->priv;
3442
3443 /* Make use of the new i2c functions from FW 1.20 */
3444 st->fw_use_new_i2c_api = 1;
3445
3446 /* The s5h1411 requires the dib0700 to not be in master mode */
3447 st->disable_streaming_master_mode = 1;
3448
3449 /* All msleep values taken from Windows USB trace */
3450 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
3451 dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
3452 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3453 msleep(400);
3454 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3455 msleep(60);
3456 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3457 msleep(30);
3458 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3459 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3460 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3461 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3462 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
3463 msleep(30);
3464
3465 /* Put the CX25843 to sleep for now since we're in digital mode */
3466 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3467
3468 /* GPIOs are initialized, do the attach */
77eed219 3469 adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
cb22cb52 3470 &adap->dev->i2c_adap);
77eed219 3471 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
cb22cb52
DH		 3472}
3473
767f3b3b
MK		 3474static int dib0700_xc5000_tuner_callback(void *priv, int component,
3475 int command, int arg)
cb22cb52
DH		 3476{
3477 struct dvb_usb_adapter *adap = priv;
3478
79025a9e
DH		 3479 if (command == XC5000_TUNER_RESET) {
3480 /* Reset the tuner */
3481 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
f0f4633a 3482 msleep(10);
79025a9e 3483 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
f0f4633a 3484 msleep(10);
79025a9e
DH		 3485 } else {
3486 err("xc5000: unknown tuner callback command: %d\n", command);
3487 return -EINVAL;
3488 }
cb22cb52
DH		 3489
3490 return 0;
3491}
3492
3493static struct xc5000_config s5h1411_xc5000_tunerconfig = {
3494 .i2c_address = 0x64,
3495 .if_khz = 5380,
cb22cb52
DH		 3496};
3497
3498static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
3499{
79025a9e 3500 /* FIXME: generalize & move to common area */
77eed219 3501 adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
79025a9e 3502
77eed219 3503 return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
767f3b3b 3504 &s5h1411_xc5000_tunerconfig)
cb22cb52
DH		 3505 == NULL ? -ENODEV : 0;
3506}
3507
8d009a0c
DF		 3508static int dib0700_xc4000_tuner_callback(void *priv, int component,
3509 int command, int arg)
3510{
3511 struct dvb_usb_adapter *adap = priv;
8abe4a0a 3512 struct dib0700_adapter_state *state = adap->priv;
8d009a0c
DF		 3513
3514 if (command == XC4000_TUNER_RESET) {
3515 /* Reset the tuner */
8abe4a0a 3516 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
8d009a0c 3517 msleep(10);
8abe4a0a 3518 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
8d009a0c
DF		 3519 } else {
3520 err("xc4000: unknown tuner callback command: %d\n", command);
3521 return -EINVAL;
3522 }
3523
3524 return 0;
3525}
3526
8583fc83
DH		 3527static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
3528 .band_caps = BAND_UHF | BAND_VHF,
3529 .setup = 0x64,
3530 .inv_gain = 0x02c8,
3531 .time_stabiliz = 0x15,
3532 .alpha_level = 0x00,
3533 .thlock = 0x76,
3534 .wbd_inv = 0x01,
3535 .wbd_ref = 0x0b33,
3536 .wbd_sel = 0x00,
3537 .wbd_alpha = 0x02,
3538 .agc1_max = 0x00,
3539 .agc1_min = 0x00,
3540 .agc2_max = 0x9b26,
3541 .agc2_min = 0x26ca,
3542 .agc1_pt1 = 0x00,
3543 .agc1_pt2 = 0x00,
3544 .agc1_pt3 = 0x00,
3545 .agc1_slope1 = 0x00,
3546 .agc1_slope2 = 0x00,
3547 .agc2_pt1 = 0x00,
3548 .agc2_pt2 = 0x80,
3549 .agc2_slope1 = 0x1d,
3550 .agc2_slope2 = 0x1d,
2df12510 3551 .alpha_mant = 0x11,
8583fc83
DH		 3552 .alpha_exp = 0x1b,
3553 .beta_mant = 0x17,
3554 .beta_exp = 0x33,
3555 .perform_agc_softsplit = 0x00,
3556};
3557
f1c78d34 3558static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
09628b2c
MCC		 3559 .internal = 60000,
3560 .sampling = 30000,
3561 .pll_prediv = 1,
3562 .pll_ratio = 8,
3563 .pll_range = 3,
3564 .pll_reset = 1,
3565 .pll_bypass = 0,
3566 .enable_refdiv = 0,
3567 .bypclk_div = 0,
3568 .IO_CLK_en_core = 1,
3569 .ADClkSrc = 1,
3570 .modulo = 0,
3571 .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
3572 .ifreq = 39370534,
3573 .timf = 20452225,
3574 .xtal_hz = 30000000
f1c78d34
DH		 3575};
3576
01f16263
DH		 3577/* FIXME: none of these inputs are validated yet */
3578static struct dib7000p_config pctv_340e_config = {
62956ced 3579 .output_mpeg2_in_188_bytes = 1,
01f16263
DH		 3580
3581 .agc_config_count = 1,
8583fc83 3582 .agc = &stk7700p_7000p_xc4000_agc_config,
f1c78d34 3583 .bw = &stk7700p_xc4000_pll_config,
01f16263 3584
01f16263
DH		 3585 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
3586 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
3587 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
3588};
3589
3590/* PCTV 340e GPIOs map:
3591 dib0700:
3592 GPIO2 - CX25843 sleep
3593 GPIO3 - CS5340 reset
3594 GPIO5 - IRD
3595 GPIO6 - Power Supply
3596 GPIO8 - LNA (1=off 0=on)
3597 GPIO10 - CX25843 reset
3598 dib7000:
3599 GPIO8 - xc4000 reset
3600 */
3601static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
3602{
3603 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3604 struct dib0700_adapter_state *state = adap->priv;
3605
3606 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3607 return -ENODEV;
01f16263
DH		 3608
3609 /* Power Supply on */
3610 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3611 msleep(50);
3612 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3613 msleep(100); /* Allow power supply to settle before probing */
3614
3615 /* cx25843 reset */
3616 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3617 msleep(1); /* cx25843 datasheet say 350us required */
3618 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3619
3620 /* LNA off for now */
3621 dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
3622
3623 /* Put the CX25843 to sleep for now since we're in digital mode */
3624 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3625
3626 /* FIXME: not verified yet */
3627 dib0700_ctrl_clock(adap->dev, 72, 1);
3628
2750d9c3
DH		 3629 msleep(500);
3630
8abe4a0a 3631 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
01f16263 3632 /* Demodulator not found for some reason? */
eb0c1994 3633 dvb_detach(state->dib7000p_ops.set_wbd_ref);
01f16263
DH		 3634 return -ENODEV;
3635 }
3636
8abe4a0a 3637 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
01f16263
DH		 3638 &pctv_340e_config);
3639 st->is_dib7000pc = 1;
3640
77eed219 3641 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01f16263
DH		 3642}
3643
8583fc83 3644static struct xc4000_config dib7000p_xc4000_tunerconfig = {
8edeb6eb 3645 .i2c_address = 0x61,
3646 .default_pm = 1,
3647 .dvb_amplitude = 0,
3648 .set_smoothedcvbs = 0,
3649 .if_khz = 5400
8d009a0c
DF		 3650};
3651
3652static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
3653{
59d0c37b 3654 struct i2c_adapter *tun_i2c;
8abe4a0a 3655 struct dib0700_adapter_state *state = adap->priv;
59d0c37b
DH		 3656
3657 /* The xc4000 is not on the main i2c bus */
8abe4a0a 3658 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
59d0c37b
DH		 3659 DIBX000_I2C_INTERFACE_TUNER, 1);
3660 if (tun_i2c == NULL) {
941830c9 3661 printk(KERN_ERR "Could not reach tuner i2c bus\n");
59d0c37b
DH		 3662 return 0;
3663 }
3664
3665 /* Setup the reset callback */
77eed219 3666 adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
8d009a0c 3667
77eed219 3668 return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
8583fc83 3669 &dib7000p_xc4000_tunerconfig)
8d009a0c
DF		 3670 == NULL ? -ENODEV : 0;
3671}
3672
ce904bcb
MK		 3673static struct lgdt3305_config hcw_lgdt3305_config = {
3674 .i2c_addr = 0x0e,
3675 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
3676 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
3677 .tpvalid_polarity = LGDT3305_TP_VALID_LOW,
3678 .deny_i2c_rptr = 0,
3679 .spectral_inversion = 1,
3680 .qam_if_khz = 6000,
3681 .vsb_if_khz = 6000,
3682 .usref_8vsb = 0x0500,
3683};
3684
3685static struct mxl5007t_config hcw_mxl5007t_config = {
3686 .xtal_freq_hz = MxL_XTAL_25_MHZ,
3687 .if_freq_hz = MxL_IF_6_MHZ,
3688 .invert_if = 1,
3689};
3690
3691/* TIGER-ATSC map:
3692 GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
3693 GPIO1 - ANT_SEL (H: VPA, L: MCX)
3694 GPIO4 - SCL2
3695 GPIO6 - EN_TUNER
3696 GPIO7 - SDA2
3697 GPIO10 - DEM_RST
3698
3699 MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
3700 */
3701static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
3702{
3703 struct dib0700_state *st = adap->dev->priv;
3704
3705 /* Make use of the new i2c functions from FW 1.20 */
3706 st->fw_use_new_i2c_api = 1;
3707
3708 st->disable_streaming_master_mode = 1;
3709
3710 /* fe power enable */
3711 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3712 msleep(30);
3713 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3714 msleep(30);
3715
3716 /* demod reset */
3717 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3718 msleep(30);
3719 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3720 msleep(30);
3721 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3722 msleep(30);
3723
77eed219 3724 adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
ce904bcb
MK		 3725 &hcw_lgdt3305_config,
3726 &adap->dev->i2c_adap);
3727
77eed219 3728 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ce904bcb
MK		 3729}
3730
3731static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
3732{
77eed219 3733 return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
ce904bcb
MK		 3734 &adap->dev->i2c_adap, 0x60,
3735 &hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
3736}
3737
c4d84547
OS		 3738static int xbox_one_attach(struct dvb_usb_adapter *adap)
3739{
3740 struct dib0700_state *st = adap->dev->priv;
3741 struct i2c_client *client_demod, *client_tuner;
3742 struct dvb_usb_device *d = adap->dev;
3743 struct mn88472_config mn88472_config = { };
3744 struct tda18250_config tda18250_config;
3745 struct i2c_board_info info;
3746
3747 st->fw_use_new_i2c_api = 1;
3748 st->disable_streaming_master_mode = 1;
3749
3750 /* fe power enable */
3751 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3752 msleep(30);
3753 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3754 msleep(30);
3755
3756 /* demod reset */
3757 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3758 msleep(30);
3759 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3760 msleep(30);
3761 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3762 msleep(30);
3763
3764 /* attach demod */
3765 mn88472_config.fe = &adap->fe_adap[0].fe;
3766 mn88472_config.i2c_wr_max = 22;
3767 mn88472_config.xtal = 20500000;
3768 mn88472_config.ts_mode = PARALLEL_TS_MODE;
3769 mn88472_config.ts_clock = FIXED_TS_CLOCK;
3770 memset(&info, 0, sizeof(struct i2c_board_info));
c0decac1 3771 strscpy(info.type, "mn88472", I2C_NAME_SIZE);
c4d84547
OS		 3772 info.addr = 0x18;
3773 info.platform_data = &mn88472_config;
3774 request_module(info.type);
6e040e6f
WS		 3775 client_demod = i2c_new_client_device(&d->i2c_adap, &info);
3776 if (!i2c_client_has_driver(client_demod))
c4d84547
OS		 3777 goto fail_demod_device;
3778 if (!try_module_get(client_demod->dev.driver->owner))
3779 goto fail_demod_module;
3780
3781 st->i2c_client_demod = client_demod;
3782
3783 adap->fe_adap[0].fe = mn88472_config.get_dvb_frontend(client_demod);
3784
3785 /* attach tuner */
3786 memset(&tda18250_config, 0, sizeof(tda18250_config));
3787 tda18250_config.if_dvbt_6 = 3950;
3788 tda18250_config.if_dvbt_7 = 4450;
3789 tda18250_config.if_dvbt_8 = 4950;
3790 tda18250_config.if_dvbc_6 = 4950;
3791 tda18250_config.if_dvbc_8 = 4950;
3792 tda18250_config.if_atsc = 4079;
3793 tda18250_config.loopthrough = true;
3794 tda18250_config.xtal_freq = TDA18250_XTAL_FREQ_27MHZ;
3795 tda18250_config.fe = adap->fe_adap[0].fe;
3796
3797 memset(&info, 0, sizeof(struct i2c_board_info));
c0decac1 3798 strscpy(info.type, "tda18250", I2C_NAME_SIZE);
c4d84547
OS		 3799 info.addr = 0x60;
3800 info.platform_data = &tda18250_config;
3801
3802 request_module(info.type);
6e040e6f
WS		 3803 client_tuner = i2c_new_client_device(&adap->dev->i2c_adap, &info);
3804 if (!i2c_client_has_driver(client_tuner))
c4d84547
OS		 3805 goto fail_tuner_device;
3806 if (!try_module_get(client_tuner->dev.driver->owner))
3807 goto fail_tuner_module;
3808
3809 st->i2c_client_tuner = client_tuner;
3810 return 0;
3811
3812fail_tuner_module:
3813 i2c_unregister_device(client_tuner);
3814fail_tuner_device:
3815 module_put(client_demod->dev.driver->owner);
3816fail_demod_module:
3817 i2c_unregister_device(client_demod);
3818fail_demod_device:
3819 return -ENODEV;
3820}
3821
ce904bcb 3822
01373a5c 3823/* DVB-USB and USB stuff follows */
3d59142a
MCC		 3824enum {
3825 DIBCOM_STK7700P,
3826 DIBCOM_STK7700P_PC,
3827 HAUPPAUGE_NOVA_T_500,
3828 HAUPPAUGE_NOVA_T_500_2,
3829 HAUPPAUGE_NOVA_T_STICK,
3830 AVERMEDIA_VOLAR,
3831 COMPRO_VIDEOMATE_U500,
3832 UNIWILL_STK7700P,
3833 LEADTEK_WINFAST_DTV_DONGLE_STK7700P,
3834 HAUPPAUGE_NOVA_T_STICK_2,
3835 AVERMEDIA_VOLAR_2,
3836 PINNACLE_PCTV2000E,
3837 TERRATEC_CINERGY_DT_XS_DIVERSITY,
3838 HAUPPAUGE_NOVA_TD_STICK,
3839 DIBCOM_STK7700D,
3840 DIBCOM_STK7070P,
3841 PINNACLE_PCTV_DVB_T_FLASH,
3842 DIBCOM_STK7070PD,
3843 PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T,
3844 COMPRO_VIDEOMATE_U500_PC,
3845 AVERMEDIA_EXPRESS,
3846 GIGABYTE_U7000,
3847 ULTIMA_ARTEC_T14BR,
3848 ASUS_U3000,
3849 ASUS_U3100,
3850 HAUPPAUGE_NOVA_T_STICK_3,
3851 HAUPPAUGE_MYTV_T,
3852 TERRATEC_CINERGY_HT_USB_XE,
3853 PINNACLE_EXPRESSCARD_320CX,
3854 PINNACLE_PCTV72E,
3855 PINNACLE_PCTV73E,
3856 YUAN_EC372S,
3857 TERRATEC_CINERGY_HT_EXPRESS,
3858 TERRATEC_CINERGY_T_XXS,
3859 LEADTEK_WINFAST_DTV_DONGLE_STK7700P_2,
3860 HAUPPAUGE_NOVA_TD_STICK_52009,
3861 HAUPPAUGE_NOVA_T_500_3,
3862 GIGABYTE_U8000,
3863 YUAN_STK7700PH,
3864 ASUS_U3000H,
3865 PINNACLE_PCTV801E,
3866 PINNACLE_PCTV801E_SE,
3867 TERRATEC_CINERGY_T_EXPRESS,
3868 TERRATEC_CINERGY_DT_XS_DIVERSITY_2,
3869 SONY_PLAYTV,
3870 YUAN_PD378S,
3871 HAUPPAUGE_TIGER_ATSC,
3872 HAUPPAUGE_TIGER_ATSC_B210,
3873 YUAN_MC770,
3874 ELGATO_EYETV_DTT,
3875 ELGATO_EYETV_DTT_Dlx,
3876 LEADTEK_WINFAST_DTV_DONGLE_H,
3877 TERRATEC_T3,
3878 TERRATEC_T5,
3879 YUAN_STK7700D,
3880 YUAN_STK7700D_2,
3881 PINNACLE_PCTV73A,
3882 PCTV_PINNACLE_PCTV73ESE,
3883 PCTV_PINNACLE_PCTV282E,
3884 DIBCOM_STK7770P,
3885 TERRATEC_CINERGY_T_XXS_2,
3886 DIBCOM_STK807XPVR,
3887 DIBCOM_STK807XP,
3888 PIXELVIEW_SBTVD,
3889 EVOLUTEPC_TVWAY_PLUS,
3890 PINNACLE_PCTV73ESE,
3891 PINNACLE_PCTV282E,
3892 DIBCOM_STK8096GP,
3893 ELGATO_EYETV_DIVERSITY,
3894 DIBCOM_NIM9090M,
3895 DIBCOM_NIM8096MD,
3896 DIBCOM_NIM9090MD,
3897 DIBCOM_NIM7090,
3898 DIBCOM_TFE7090PVR,
3899 TECHNISAT_AIRSTAR_TELESTICK_2,
3900 MEDION_CREATIX_CTX1921,
3901 PINNACLE_PCTV340E,
3902 PINNACLE_PCTV340E_SE,
3903 DIBCOM_TFE7790P,
3904 DIBCOM_TFE8096P,
3905 ELGATO_EYETV_DTT_2,
3906 PCTV_2002E,
3907 PCTV_2002E_SE,
3908 PCTV_DIBCOM_STK8096PVR,
3909 DIBCOM_STK8096PVR,
3910 HAMA_DVBT_HYBRID,
3911 MICROSOFT_XBOX_ONE_TUNER,
3912};
3913
b7f54910 3914struct usb_device_id dib0700_usb_id_table[] = {
3d59142a
MCC		 3915 DVB_USB_DEV(DIBCOM, DIBCOM_STK7700P),
3916 DVB_USB_DEV(DIBCOM, DIBCOM_STK7700P_PC),
3917 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_500),
3918 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_500_2),
3919 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_STICK),
3920 DVB_USB_DEV(AVERMEDIA, AVERMEDIA_VOLAR),
3921 DVB_USB_DEV(COMPRO, COMPRO_VIDEOMATE_U500),
3922 DVB_USB_DEV(UNIWILL, UNIWILL_STK7700P),
3923 DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_STK7700P),
3924 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_STICK_2),
3925 DVB_USB_DEV(AVERMEDIA, AVERMEDIA_VOLAR_2),
3926 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV2000E),
3927 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_DT_XS_DIVERSITY),
3928 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_TD_STICK),
3929 DVB_USB_DEV(DIBCOM, DIBCOM_STK7700D),
3930 DVB_USB_DEV(DIBCOM, DIBCOM_STK7070P),
3931 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV_DVB_T_FLASH),
3932 DVB_USB_DEV(DIBCOM, DIBCOM_STK7070PD),
3933 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T),
3934 DVB_USB_DEV(COMPRO, COMPRO_VIDEOMATE_U500_PC),
3935 DVB_USB_DEV(AVERMEDIA, AVERMEDIA_EXPRESS),
3936 DVB_USB_DEV(GIGABYTE, GIGABYTE_U7000),
3937 DVB_USB_DEV(ULTIMA_ELECTRONIC, ULTIMA_ARTEC_T14BR),
3938 DVB_USB_DEV(ASUS, ASUS_U3000),
3939 DVB_USB_DEV(ASUS, ASUS_U3100),
3940 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_STICK_3),
3941 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_MYTV_T),
3942 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_HT_USB_XE),
3943 DVB_USB_DEV(PINNACLE, PINNACLE_EXPRESSCARD_320CX),
3944 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV72E),
3945 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV73E),
3946 DVB_USB_DEV(YUAN, YUAN_EC372S),
3947 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_HT_EXPRESS),
3948 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T_XXS),
3949 DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_STK7700P_2),
3950 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_TD_STICK_52009),
3951 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_NOVA_T_500_3),
3952 DVB_USB_DEV(GIGABYTE, GIGABYTE_U8000),
3953 DVB_USB_DEV(YUAN, YUAN_STK7700PH),
3954 DVB_USB_DEV(ASUS, ASUS_U3000H),
3955 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV801E),
3956 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV801E_SE),
3957 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T_EXPRESS),
3958 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_DT_XS_DIVERSITY_2),
3959 DVB_USB_DEV(SONY, SONY_PLAYTV),
3960 DVB_USB_DEV(YUAN, YUAN_PD378S),
3961 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_TIGER_ATSC),
3962 DVB_USB_DEV(HAUPPAUGE, HAUPPAUGE_TIGER_ATSC_B210),
3963 DVB_USB_DEV(YUAN, YUAN_MC770),
3964 DVB_USB_DEV(ELGATO, ELGATO_EYETV_DTT),
3965 DVB_USB_DEV(ELGATO, ELGATO_EYETV_DTT_Dlx),
3966 DVB_USB_DEV(LEADTEK, LEADTEK_WINFAST_DTV_DONGLE_H),
3967 DVB_USB_DEV(TERRATEC, TERRATEC_T3),
3968 DVB_USB_DEV(TERRATEC, TERRATEC_T5),
3969 DVB_USB_DEV(YUAN, YUAN_STK7700D),
3970 DVB_USB_DEV(YUAN, YUAN_STK7700D_2),
3971 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV73A),
3972 DVB_USB_DEV(PCTV, PCTV_PINNACLE_PCTV73ESE),
3973 DVB_USB_DEV(PCTV, PCTV_PINNACLE_PCTV282E),
3974 DVB_USB_DEV(DIBCOM, DIBCOM_STK7770P),
3975 DVB_USB_DEV(TERRATEC, TERRATEC_CINERGY_T_XXS_2),
3976 DVB_USB_DEV(DIBCOM, DIBCOM_STK807XPVR),
3977 DVB_USB_DEV(DIBCOM, DIBCOM_STK807XP),
3978 DVB_USB_DEV_VER(PIXELVIEW, PIXELVIEW_SBTVD, 0x000, 0x3f00),
3979 DVB_USB_DEV(EVOLUTEPC, EVOLUTEPC_TVWAY_PLUS),
3980 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV73ESE),
3981 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV282E),
3982 DVB_USB_DEV(DIBCOM, DIBCOM_STK8096GP),
3983 DVB_USB_DEV(ELGATO, ELGATO_EYETV_DIVERSITY),
3984 DVB_USB_DEV(DIBCOM, DIBCOM_NIM9090M),
3985 DVB_USB_DEV(DIBCOM, DIBCOM_NIM8096MD),
3986 DVB_USB_DEV(DIBCOM, DIBCOM_NIM9090MD),
3987 DVB_USB_DEV(DIBCOM, DIBCOM_NIM7090),
3988 DVB_USB_DEV(DIBCOM, DIBCOM_TFE7090PVR),
3989 DVB_USB_DEV(TECHNISAT, TECHNISAT_AIRSTAR_TELESTICK_2),
3990 DVB_USB_DEV(MEDION, MEDION_CREATIX_CTX1921),
3991 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV340E),
3992 DVB_USB_DEV(PINNACLE, PINNACLE_PCTV340E_SE),
3993 DVB_USB_DEV(DIBCOM, DIBCOM_TFE7790P),
3994 DVB_USB_DEV(DIBCOM, DIBCOM_TFE8096P),
3995 DVB_USB_DEV(ELGATO, ELGATO_EYETV_DTT_2),
3996 DVB_USB_DEV(PCTV, PCTV_2002E),
3997 DVB_USB_DEV(PCTV, PCTV_2002E_SE),
3998 DVB_USB_DEV(PCTV, PCTV_DIBCOM_STK8096PVR),
3999 DVB_USB_DEV(DIBCOM, DIBCOM_STK8096PVR),
4000 DVB_USB_DEV(HAMA, HAMA_DVBT_HYBRID),
4001 DVB_USB_DEV(MICROSOFT, MICROSOFT_XBOX_ONE_TUNER),
4002 { }
b7f54910 4003};
3d59142a 4004
b7f54910
PB		 4005MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
4006
4007#define DIB0700_DEFAULT_DEVICE_PROPERTIES \
4008 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
4009 .usb_ctrl = DEVICE_SPECIFIC, \
bdc203e1 4010 .firmware = "dvb-usb-dib0700-1.20.fw", \
b7f54910 4011 .download_firmware = dib0700_download_firmware, \
6958effe 4012 .no_reconnect = 1, \
b7f54910 4013 .size_of_priv = sizeof(struct dib0700_state), \
6958effe
PB		 4014 .i2c_algo = &dib0700_i2c_algo, \
4015 .identify_state = dib0700_identify_state
b7f54910
PB		 4016
4017#define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
4018 .streaming_ctrl = dib0700_streaming_ctrl, \
4019 .stream = { \
4020 .type = USB_BULK, \
4021 .count = 4, \
4022 .endpoint = ep, \
4023 .u = { \
4024 .bulk = { \
4025 .buffersize = 39480, \
4026 } \
4027 } \
4028 }
4029
0fae1997
MCC		 4030#define DIB0700_NUM_FRONTENDS(n) \
4031 .num_frontends = n, \
4032 .size_of_priv = sizeof(struct dib0700_adapter_state)
4033
b7f54910
PB		 4034struct dvb_usb_device_properties dib0700_devices[] = {
4035 {
4036 DIB0700_DEFAULT_DEVICE_PROPERTIES,
4037
4038 .num_adapters = 1,
4039 .adapter = {
4040 {
0fae1997 4041 DIB0700_NUM_FRONTENDS(1),
77eed219 4042 .fe = {{
f8731f4d
OG		 4043 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4044 .pid_filter_count = 32,
e192a7cf
OG		 4045 .pid_filter = stk7700p_pid_filter,
4046 .pid_filter_ctrl = stk7700p_pid_filter_ctrl,
b7f54910
PB		 4047 .frontend_attach = stk7700p_frontend_attach,
4048 .tuner_attach = stk7700p_tuner_attach,
4049
4050 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4051 }},
b7f54910
PB		 4052 },
4053 },
4054
67053a40 4055 .num_device_descs = 8,
b7f54910
PB		 4056 .devices = {
4057 { "DiBcom STK7700P reference design",
3d59142a 4058 { &dib0700_usb_id_table[DIBCOM_STK7700P], &dib0700_usb_id_table[DIBCOM_STK7700P_PC] },
b7f54910
PB		 4059 { NULL },
4060 },
4061 { "Hauppauge Nova-T Stick",
3d59142a 4062 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_STICK], &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_STICK_2], NULL },
b7f54910
PB		 4063 { NULL },
4064 },
4065 { "AVerMedia AVerTV DVB-T Volar",
3d59142a 4066 { &dib0700_usb_id_table[AVERMEDIA_VOLAR], &dib0700_usb_id_table[AVERMEDIA_VOLAR_2] },
b7f54910
PB		 4067 { NULL },
4068 },
49a1376c 4069 { "Compro Videomate U500",
3d59142a 4070 { &dib0700_usb_id_table[COMPRO_VIDEOMATE_U500], &dib0700_usb_id_table[COMPRO_VIDEOMATE_U500_PC] },
49a1376c 4071 { NULL },
0ce215e1
HS		 4072 },
4073 { "Uniwill STK7700P based (Hama and others)",
3d59142a 4074 { &dib0700_usb_id_table[UNIWILL_STK7700P], NULL },
0ce215e1 4075 { NULL },
8637a875
MK		 4076 },
4077 { "Leadtek Winfast DTV Dongle (STK7700P based)",
3d59142a 4078 { &dib0700_usb_id_table[LEADTEK_WINFAST_DTV_DONGLE_STK7700P], &dib0700_usb_id_table[LEADTEK_WINFAST_DTV_DONGLE_STK7700P_2] },
8637a875 4079 { NULL },
fa3b877e
JS		 4080 },
4081 { "AVerMedia AVerTV DVB-T Express",
3d59142a 4082 { &dib0700_usb_id_table[AVERMEDIA_EXPRESS] },
fa3b877e 4083 { NULL },
67053a40 4084 },
67053a40 4085 { "Gigabyte U7000",
3d59142a 4086 { &dib0700_usb_id_table[GIGABYTE_U7000], NULL },
67053a40 4087 { NULL },
49a1376c 4088 }
b1139e35
DS		 4089 },
4090
72b39310 4091 .rc.core = {
f72a27b8 4092 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4093 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4094 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4095 .allowed_protos = RC_PROTO_BIT_RC5 |
4096 RC_PROTO_BIT_RC6_MCE |
4097 RC_PROTO_BIT_NEC,
d8b4b582 4098 .change_protocol = dib0700_change_protocol,
f72a27b8 4099 },
b7f54910
PB		 4100 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4101
4102 .num_adapters = 2,
4103 .adapter = {
4104 {
0fae1997 4105 DIB0700_NUM_FRONTENDS(1),
77eed219 4106 .fe = {{
b7f54910
PB		 4107 .frontend_attach = bristol_frontend_attach,
4108 .tuner_attach = bristol_tuner_attach,
4109
4110 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4111 }},
b7f54910 4112 }, {
0fae1997 4113 DIB0700_NUM_FRONTENDS(1),
77eed219 4114 .fe = {{
b7f54910
PB		 4115 .frontend_attach = bristol_frontend_attach,
4116 .tuner_attach = bristol_tuner_attach,
4117
4118 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4119 }},
b7f54910
PB		 4120 }
4121 },
4122
4123 .num_device_descs = 1,
4124 .devices = {
4125 { "Hauppauge Nova-T 500 Dual DVB-T",
3d59142a 4126 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_500], &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_500_2], NULL },
b7f54910
PB		 4127 { NULL },
4128 },
82f3d559
JG		 4129 },
4130
72b39310 4131 .rc.core = {
f72a27b8 4132 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4133 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4134 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4135 .allowed_protos = RC_PROTO_BIT_RC5 |
4136 RC_PROTO_BIT_RC6_MCE |
4137 RC_PROTO_BIT_NEC,
d8b4b582 4138 .change_protocol = dib0700_change_protocol,
f72a27b8 4139 },
54d75eba
OD		 4140 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4141
4142 .num_adapters = 2,
4143 .adapter = {
4144 {
0fae1997 4145 DIB0700_NUM_FRONTENDS(1),
77eed219 4146 .fe = {{
f8731f4d
OG		 4147 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4148 .pid_filter_count = 32,
4149 .pid_filter = stk70x0p_pid_filter,
4150 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 4151 .frontend_attach = stk7700d_frontend_attach,
4152 .tuner_attach = stk7700d_tuner_attach,
4153
4154 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4155 }},
54d75eba 4156 }, {
0fae1997 4157 DIB0700_NUM_FRONTENDS(1),
77eed219 4158 .fe = {{
f8731f4d
OG		 4159 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4160 .pid_filter_count = 32,
4161 .pid_filter = stk70x0p_pid_filter,
4162 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 4163 .frontend_attach = stk7700d_frontend_attach,
4164 .tuner_attach = stk7700d_tuner_attach,
4165
4166 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4167 }},
54d75eba
OD		 4168 }
4169 },
4170
200e861c 4171 .num_device_descs = 5,
54d75eba
OD		 4172 .devices = {
4173 { "Pinnacle PCTV 2000e",
3d59142a 4174 { &dib0700_usb_id_table[PINNACLE_PCTV2000E], NULL },
54d75eba
OD		 4175 { NULL },
4176 },
4177 { "Terratec Cinergy DT XS Diversity",
3d59142a 4178 { &dib0700_usb_id_table[TERRATEC_CINERGY_DT_XS_DIVERSITY], NULL },
54d75eba
OD		 4179 { NULL },
4180 },
faebb914 4181 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
3d59142a 4182 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_TD_STICK], NULL },
54d75eba
OD		 4183 { NULL },
4184 },
01373a5c 4185 { "DiBcom STK7700D reference design",
3d59142a 4186 { &dib0700_usb_id_table[DIBCOM_STK7700D], NULL },
b6884a17 4187 { NULL },
bb1b082e 4188 },
200e861c 4189 { "YUAN High-Tech DiBcom STK7700D",
3d59142a 4190 { &dib0700_usb_id_table[YUAN_STK7700D_2], NULL },
200e861c
JW		 4191 { NULL },
4192 },
bb1b082e 4193
54d75eba 4194 },
82f3d559 4195
72b39310 4196 .rc.core = {
f72a27b8 4197 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4198 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4199 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4200 .allowed_protos = RC_PROTO_BIT_RC5 |
4201 RC_PROTO_BIT_RC6_MCE |
4202 RC_PROTO_BIT_NEC,
d8b4b582 4203 .change_protocol = dib0700_change_protocol,
f72a27b8 4204 },
132c3188
DG		 4205 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4206
4207 .num_adapters = 1,
4208 .adapter = {
4209 {
0fae1997 4210 DIB0700_NUM_FRONTENDS(1),
77eed219 4211 .fe = {{
f8731f4d
OG		 4212 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4213 .pid_filter_count = 32,
4214 .pid_filter = stk70x0p_pid_filter,
4215 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
132c3188
DG		 4216 .frontend_attach = stk7700P2_frontend_attach,
4217 .tuner_attach = stk7700d_tuner_attach,
4218
4219 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4220 }},
132c3188
DG		 4221 },
4222 },
4223
bb1b082e 4224 .num_device_descs = 3,
132c3188
DG		 4225 .devices = {
4226 { "ASUS My Cinema U3000 Mini DVBT Tuner",
3d59142a 4227 { &dib0700_usb_id_table[ASUS_U3000], NULL },
132c3188
DG		 4228 { NULL },
4229 },
6ca8f0b9 4230 { "Yuan EC372S",
3d59142a 4231 { &dib0700_usb_id_table[YUAN_EC372S], NULL },
6ca8f0b9 4232 { NULL },
bb1b082e
YA		 4233 },
4234 { "Terratec Cinergy T Express",
3d59142a 4235 { &dib0700_usb_id_table[TERRATEC_CINERGY_T_EXPRESS], NULL },
bb1b082e 4236 { NULL },
6ca8f0b9 4237 }
48aa7391
CR		 4238 },
4239
72b39310 4240 .rc.core = {
f72a27b8 4241 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4242 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4243 .module_name = "dib0700",
0ffd1ab3 4244 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4245 .allowed_protos = RC_PROTO_BIT_RC5 |
4246 RC_PROTO_BIT_RC6_MCE |
4247 RC_PROTO_BIT_NEC,
d8b4b582 4248 .change_protocol = dib0700_change_protocol,
f72a27b8 4249 },
01373a5c
PB		 4250 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4251
4252 .num_adapters = 1,
4253 .adapter = {
4254 {
0fae1997 4255 DIB0700_NUM_FRONTENDS(1),
77eed219 4256 .fe = {{
f8731f4d
OG		 4257 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4258 .pid_filter_count = 32,
4259 .pid_filter = stk70x0p_pid_filter,
4260 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
01373a5c
PB		 4261 .frontend_attach = stk7070p_frontend_attach,
4262 .tuner_attach = dib7070p_tuner_attach,
4263
4264 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4265 }},
01373a5c
PB		 4266 },
4267 },
4268
0bc9d39b 4269 .num_device_descs = 12,
01373a5c
PB		 4270 .devices = {
4271 { "DiBcom STK7070P reference design",
3d59142a 4272 { &dib0700_usb_id_table[DIBCOM_STK7070P], NULL },
01373a5c
PB		 4273 { NULL },
4274 },
4275 { "Pinnacle PCTV DVB-T Flash Stick",
3d59142a 4276 { &dib0700_usb_id_table[PINNACLE_PCTV_DVB_T_FLASH], NULL },
01373a5c
PB		 4277 { NULL },
4278 },
7999a816 4279 { "Artec T14BR DVB-T",
3d59142a 4280 { &dib0700_usb_id_table[ULTIMA_ARTEC_T14BR], NULL },
7999a816 4281 { NULL },
132c3188
DG		 4282 },
4283 { "ASUS My Cinema U3100 Mini DVBT Tuner",
3d59142a 4284 { &dib0700_usb_id_table[ASUS_U3100], NULL },
132c3188
DG		 4285 { NULL },
4286 },
c7637b1a 4287 { "Hauppauge Nova-T Stick",
3d59142a 4288 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_STICK_3], NULL },
c7637b1a
TT		 4289 { NULL },
4290 },
13b83b5d 4291 { "Hauppauge Nova-T MyTV.t",
3d59142a 4292 { &dib0700_usb_id_table[HAUPPAUGE_MYTV_T], NULL },
13b83b5d
DS		 4293 { NULL },
4294 },
6ca8f0b9 4295 { "Pinnacle PCTV 72e",
3d59142a 4296 { &dib0700_usb_id_table[PINNACLE_PCTV72E], NULL },
6ca8f0b9
AC		 4297 { NULL },
4298 },
4299 { "Pinnacle PCTV 73e",
3d59142a 4300 { &dib0700_usb_id_table[PINNACLE_PCTV73E], NULL },
6ca8f0b9
AC		 4301 { NULL },
4302 },
919a5488 4303 { "Elgato EyeTV DTT",
3d59142a 4304 { &dib0700_usb_id_table[ELGATO_EYETV_DTT], NULL },
919a5488
KF		 4305 { NULL },
4306 },
9abb6e6f 4307 { "Yuan PD378S",
3d59142a 4308 { &dib0700_usb_id_table[YUAN_PD378S], NULL },
9abb6e6f
PT		 4309 { NULL },
4310 },
513846ec 4311 { "Elgato EyeTV Dtt Dlx PD378S",
3d59142a 4312 { &dib0700_usb_id_table[ELGATO_EYETV_DTT_Dlx], NULL },
513846ec
AS		 4313 { NULL },
4314 },
0bc9d39b 4315 { "Elgato EyeTV DTT rev. 2",
3d59142a 4316 { &dib0700_usb_id_table[ELGATO_EYETV_DTT_2], NULL },
0bc9d39b
GG		 4317 { NULL },
4318 },
c7637b1a
TT		 4319 },
4320
72b39310 4321 .rc.core = {
f72a27b8 4322 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4323 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4324 .module_name = "dib0700",
0ffd1ab3 4325 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4326 .allowed_protos = RC_PROTO_BIT_RC5 |
4327 RC_PROTO_BIT_RC6_MCE |
4328 RC_PROTO_BIT_NEC,
d8b4b582 4329 .change_protocol = dib0700_change_protocol,
f72a27b8 4330 },
74b76f21
OG		 4331 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4332
4333 .num_adapters = 1,
4334 .adapter = {
4335 {
0fae1997 4336 DIB0700_NUM_FRONTENDS(1),
77eed219 4337 .fe = {{
648732fc
MCC		 4338 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4339 .pid_filter_count = 32,
4340 .pid_filter = stk70x0p_pid_filter,
4341 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
74b76f21
OG		 4342 .frontend_attach = stk7070p_frontend_attach,
4343 .tuner_attach = dib7070p_tuner_attach,
4344
4345 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4346 }},
74b76f21
OG		 4347 },
4348 },
4349
20232c47 4350 .num_device_descs = 3,
74b76f21
OG		 4351 .devices = {
4352 { "Pinnacle PCTV 73A",
3d59142a 4353 { &dib0700_usb_id_table[PINNACLE_PCTV73A], NULL },
74b76f21
OG		 4354 { NULL },
4355 },
4356 { "Pinnacle PCTV 73e SE",
3d59142a 4357 { &dib0700_usb_id_table[PCTV_PINNACLE_PCTV73ESE], &dib0700_usb_id_table[PINNACLE_PCTV73ESE], NULL },
74b76f21
OG		 4358 { NULL },
4359 },
4360 { "Pinnacle PCTV 282e",
3d59142a 4361 { &dib0700_usb_id_table[PCTV_PINNACLE_PCTV282E], &dib0700_usb_id_table[PINNACLE_PCTV282E], NULL },
74b76f21
OG		 4362 { NULL },
4363 },
4364 },
4365
72b39310 4366 .rc.core = {
f72a27b8 4367 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4368 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4369 .module_name = "dib0700",
0ffd1ab3 4370 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4371 .allowed_protos = RC_PROTO_BIT_RC5 |
4372 RC_PROTO_BIT_RC6_MCE |
4373 RC_PROTO_BIT_NEC,
d8b4b582 4374 .change_protocol = dib0700_change_protocol,
f72a27b8 4375 },
01373a5c
PB		 4376 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4377
4378 .num_adapters = 2,
4379 .adapter = {
4380 {
0fae1997 4381 DIB0700_NUM_FRONTENDS(1),
77eed219 4382 .fe = {{
f8731f4d
OG		 4383 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4384 .pid_filter_count = 32,
4385 .pid_filter = stk70x0p_pid_filter,
4386 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4387 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4388 .tuner_attach = dib7070p_tuner_attach,
4389
4390 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4391 }},
01373a5c 4392 }, {
0fae1997 4393 DIB0700_NUM_FRONTENDS(1),
77eed219 4394 .fe = {{
f8731f4d
OG		 4395 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4396 .pid_filter_count = 32,
4397 .pid_filter = stk70x0p_pid_filter,
4398 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4399 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4400 .tuner_attach = dib7070p_tuner_attach,
4401
4402 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4403 }},
01373a5c
PB		 4404 }
4405 },
4406
c859e6ef 4407 .num_device_descs = 3,
9b6ba57b
JS		 4408 .devices = {
4409 { "Hauppauge Nova-TD Stick (52009)",
3d59142a 4410 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_TD_STICK_52009], NULL },
9b6ba57b
JS		 4411 { NULL },
4412 },
c859e6ef 4413 { "PCTV 2002e",
3d59142a 4414 { &dib0700_usb_id_table[PCTV_2002E], NULL },
c859e6ef
MK		 4415 { NULL },
4416 },
4417 { "PCTV 2002e SE",
3d59142a 4418 { &dib0700_usb_id_table[PCTV_2002E_SE], NULL },
c859e6ef
MK		 4419 { NULL },
4420 },
9b6ba57b
JS		 4421 },
4422
4423 .rc.core = {
4424 .rc_interval = DEFAULT_RC_INTERVAL,
4425 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4426 .module_name = "dib0700",
4427 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4428 .allowed_protos = RC_PROTO_BIT_RC5 |
4429 RC_PROTO_BIT_RC6_MCE |
4430 RC_PROTO_BIT_NEC,
9b6ba57b
JS		 4431 .change_protocol = dib0700_change_protocol,
4432 },
4433 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4434
4435 .num_adapters = 2,
4436 .adapter = {
4437 {
0fae1997 4438 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4439 .fe = {{
4440 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4441 .pid_filter_count = 32,
4442 .pid_filter = stk70x0p_pid_filter,
4443 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4444 .frontend_attach = stk7070pd_frontend_attach0,
4445 .tuner_attach = dib7070p_tuner_attach,
4446
4447 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4448 }},
9b6ba57b 4449 }, {
0fae1997 4450 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4451 .fe = {{
4452 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4453 .pid_filter_count = 32,
4454 .pid_filter = stk70x0p_pid_filter,
4455 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4456 .frontend_attach = stk7070pd_frontend_attach1,
4457 .tuner_attach = dib7070p_tuner_attach,
4458
4459 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4460 }},
9b6ba57b
JS		 4461 }
4462 },
4463
4464 .num_device_descs = 5,
01373a5c
PB		 4465 .devices = {
4466 { "DiBcom STK7070PD reference design",
3d59142a 4467 { &dib0700_usb_id_table[DIBCOM_STK7070PD], NULL },
01373a5c
PB		 4468 { NULL },
4469 },
4470 { "Pinnacle PCTV Dual DVB-T Diversity Stick",
3d59142a 4471 { &dib0700_usb_id_table[PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T], NULL },
01373a5c 4472 { NULL },
d01eb2dc 4473 },
9a0c04a1 4474 { "Hauppauge Nova-TD-500 (84xxx)",
3d59142a 4475 { &dib0700_usb_id_table[HAUPPAUGE_NOVA_T_500_3], NULL },
9a0c04a1 4476 { NULL },
db4b2d19 4477 },
a9b8fe30 4478 { "Terratec Cinergy DT USB XS Diversity/ T5",
3d59142a
MCC		 4479 { &dib0700_usb_id_table[TERRATEC_CINERGY_DT_XS_DIVERSITY_2],
4480 &dib0700_usb_id_table[TERRATEC_T5], NULL},
db4b2d19 4481 { NULL },
0a6e1ed2 4482 },
4483 { "Sony PlayTV",
3d59142a 4484 { &dib0700_usb_id_table[SONY_PLAYTV], NULL },
0a6e1ed2 4485 { NULL },
84e2f037 4486 },
5af935cc
MCC		 4487 },
4488
4489 .rc.core = {
4490 .rc_interval = DEFAULT_RC_INTERVAL,
4491 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4492 .module_name = "dib0700",
0ffd1ab3 4493 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4494 .allowed_protos = RC_PROTO_BIT_RC5 |
4495 RC_PROTO_BIT_RC6_MCE |
4496 RC_PROTO_BIT_NEC,
d8b4b582 4497 .change_protocol = dib0700_change_protocol,
5af935cc
MCC		 4498 },
4499 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4500
4501 .num_adapters = 2,
4502 .adapter = {
4503 {
0fae1997 4504 DIB0700_NUM_FRONTENDS(1),
77eed219 4505 .fe = {{
5af935cc
MCC		 4506 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4507 .pid_filter_count = 32,
4508 .pid_filter = stk70x0p_pid_filter,
4509 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4510 .frontend_attach = stk7070pd_frontend_attach0,
4511 .tuner_attach = dib7070p_tuner_attach,
4512
4513 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4514 }},
5af935cc 4515 }, {
0fae1997 4516 DIB0700_NUM_FRONTENDS(1),
77eed219 4517 .fe = {{
5af935cc
MCC		 4518 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4519 .pid_filter_count = 32,
4520 .pid_filter = stk70x0p_pid_filter,
4521 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4522 .frontend_attach = stk7070pd_frontend_attach1,
4523 .tuner_attach = dib7070p_tuner_attach,
4524
4525 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4526 }},
5af935cc
MCC		 4527 }
4528 },
4529
4530 .num_device_descs = 1,
4531 .devices = {
84e2f037 4532 { "Elgato EyeTV Diversity",
3d59142a 4533 { &dib0700_usb_id_table[ELGATO_EYETV_DIVERSITY], NULL },
84e2f037
MM		 4534 { NULL },
4535 },
c985a8dc 4536 },
f72a27b8 4537
72b39310 4538 .rc.core = {
f72a27b8 4539 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4540 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4541 .module_name = "dib0700",
0ffd1ab3 4542 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4543 .allowed_protos = RC_PROTO_BIT_RC5 |
4544 RC_PROTO_BIT_RC6_MCE |
4545 RC_PROTO_BIT_NEC,
d8b4b582 4546 .change_protocol = dib0700_change_protocol,
f72a27b8 4547 },
6ca8f0b9
AC		 4548 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4549
4550 .num_adapters = 1,
4551 .adapter = {
4552 {
0fae1997 4553 DIB0700_NUM_FRONTENDS(1),
77eed219 4554 .fe = {{
f8731f4d
OG		 4555 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4556 .pid_filter_count = 32,
4557 .pid_filter = stk70x0p_pid_filter,
4558 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
6ca8f0b9
AC		 4559 .frontend_attach = stk7700ph_frontend_attach,
4560 .tuner_attach = stk7700ph_tuner_attach,
4561
4562 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4563 }},
6ca8f0b9
AC		 4564 },
4565 },
4566
430ae126 4567 .num_device_descs = 10,
6ca8f0b9
AC		 4568 .devices = {
4569 { "Terratec Cinergy HT USB XE",
3d59142a 4570 { &dib0700_usb_id_table[TERRATEC_CINERGY_HT_USB_XE], NULL },
6ca8f0b9
AC		 4571 { NULL },
4572 },
4573 { "Pinnacle Expresscard 320cx",
3d59142a 4574 { &dib0700_usb_id_table[PINNACLE_EXPRESSCARD_320CX], NULL },
6ca8f0b9
AC		 4575 { NULL },
4576 },
4577 { "Terratec Cinergy HT Express",
3d59142a 4578 { &dib0700_usb_id_table[TERRATEC_CINERGY_HT_EXPRESS], NULL },
6ca8f0b9
AC		 4579 { NULL },
4580 },
17a370bc 4581 { "Gigabyte U8000-RH",
3d59142a 4582 { &dib0700_usb_id_table[GIGABYTE_U8000], NULL },
17a370bc
FT		 4583 { NULL },
4584 },
8751aaa6 4585 { "YUAN High-Tech STK7700PH",
3d59142a 4586 { &dib0700_usb_id_table[YUAN_STK7700PH], NULL },
8751aaa6
DON		 4587 { NULL },
4588 },
5769743a 4589 { "Asus My Cinema-U3000Hybrid",
3d59142a 4590 { &dib0700_usb_id_table[ASUS_U3000H], NULL },
5769743a
AC		 4591 { NULL },
4592 },
16ba1ee5 4593 { "YUAN High-Tech MC770",
3d59142a 4594 { &dib0700_usb_id_table[YUAN_MC770], NULL },
16ba1ee5
XL		 4595 { NULL },
4596 },
f0f4ae76 4597 { "Leadtek WinFast DTV Dongle H",
3d59142a 4598 { &dib0700_usb_id_table[LEADTEK_WINFAST_DTV_DONGLE_H], NULL },
f0f4ae76 4599 { NULL },
4600 },
c53d83cc 4601 { "YUAN High-Tech STK7700D",
3d59142a 4602 { &dib0700_usb_id_table[YUAN_STK7700D], NULL },
c53d83cc
PH		 4603 { NULL },
4604 },
430ae126 4605 { "Hama DVB=T Hybrid USB Stick",
3d59142a 4606 { &dib0700_usb_id_table[HAMA_DVBT_HYBRID], NULL },
430ae126
PO		 4607 { NULL },
4608 },
6ca8f0b9 4609 },
f72a27b8 4610
72b39310 4611 .rc.core = {
f72a27b8 4612 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4613 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4614 .module_name = "dib0700",
0ffd1ab3 4615 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4616 .allowed_protos = RC_PROTO_BIT_RC5 |
4617 RC_PROTO_BIT_RC6_MCE |
4618 RC_PROTO_BIT_NEC,
d8b4b582 4619 .change_protocol = dib0700_change_protocol,
f72a27b8 4620 },
cb22cb52
DH		 4621 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4622 .num_adapters = 1,
4623 .adapter = {
4624 {
0fae1997 4625 DIB0700_NUM_FRONTENDS(1),
77eed219 4626 .fe = {{
cb22cb52
DH		 4627 .frontend_attach = s5h1411_frontend_attach,
4628 .tuner_attach = xc5000_tuner_attach,
4629
4630 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4631 }},
cb22cb52
DH		 4632 },
4633 },
4634
d2fc3bfc 4635 .num_device_descs = 2,
cb22cb52
DH		 4636 .devices = {
4637 { "Pinnacle PCTV HD Pro USB Stick",
3d59142a 4638 { &dib0700_usb_id_table[PINNACLE_PCTV801E], NULL },
cb22cb52
DH		 4639 { NULL },
4640 },
d2fc3bfc 4641 { "Pinnacle PCTV HD USB Stick",
3d59142a 4642 { &dib0700_usb_id_table[PINNACLE_PCTV801E_SE], NULL },
d2fc3bfc
DH		 4643 { NULL },
4644 },
cb22cb52 4645 },
72b39310
MCC		 4646
4647 .rc.core = {
f72a27b8 4648 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4649 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4650 .module_name = "dib0700",
0ffd1ab3 4651 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4652 .allowed_protos = RC_PROTO_BIT_RC5 |
4653 RC_PROTO_BIT_RC6_MCE |
4654 RC_PROTO_BIT_NEC,
d8b4b582 4655 .change_protocol = dib0700_change_protocol,
f72a27b8 4656 },
ce904bcb
MK		 4657 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4658 .num_adapters = 1,
4659 .adapter = {
4660 {
0fae1997 4661 DIB0700_NUM_FRONTENDS(1),
77eed219 4662 .fe = {{
ce904bcb
MK		 4663 .frontend_attach = lgdt3305_frontend_attach,
4664 .tuner_attach = mxl5007t_tuner_attach,
4665
4666 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4667 }},
ce904bcb
MK		 4668 },
4669 },
4670
4671 .num_device_descs = 2,
4672 .devices = {
4673 { "Hauppauge ATSC MiniCard (B200)",
3d59142a 4674 { &dib0700_usb_id_table[HAUPPAUGE_TIGER_ATSC], NULL },
ce904bcb
MK		 4675 { NULL },
4676 },
4677 { "Hauppauge ATSC MiniCard (B210)",
3d59142a 4678 { &dib0700_usb_id_table[HAUPPAUGE_TIGER_ATSC_B210], NULL },
ce904bcb
MK		 4679 { NULL },
4680 },
4681 },
d300bd69
OG		 4682 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4683
4684 .num_adapters = 1,
4685 .adapter = {
4686 {
0fae1997 4687 DIB0700_NUM_FRONTENDS(1),
77eed219 4688 .fe = {{
f8731f4d
OG		 4689 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4690 .pid_filter_count = 32,
4691 .pid_filter = stk70x0p_pid_filter,
4692 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
90e12cec 4693 .frontend_attach = stk7770p_frontend_attach,
d300bd69
OG		 4694 .tuner_attach = dib7770p_tuner_attach,
4695
4696 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4697 }},
d300bd69
OG		 4698 },
4699 },
4700
d1402307 4701 .num_device_descs = 4,
d300bd69
OG		 4702 .devices = {
4703 { "DiBcom STK7770P reference design",
3d59142a 4704 { &dib0700_usb_id_table[DIBCOM_STK7770P], NULL },
d300bd69
OG		 4705 { NULL },
4706 },
1e13c8f0 4707 { "Terratec Cinergy T USB XXS (HD)/ T3",
3d59142a
MCC		 4708 { &dib0700_usb_id_table[TERRATEC_CINERGY_T_XXS],
4709 &dib0700_usb_id_table[TERRATEC_T3],
4710 &dib0700_usb_id_table[TERRATEC_CINERGY_T_XXS_2], NULL},
db48138f
PB		 4711 { NULL },
4712 },
498e677c 4713 { "TechniSat AirStar TeleStick 2",
3d59142a 4714 { &dib0700_usb_id_table[TECHNISAT_AIRSTAR_TELESTICK_2], NULL },
498e677c
LMF		 4715 { NULL },
4716 },
d1402307 4717 { "Medion CTX1921 DVB-T USB",
3d59142a 4718 { &dib0700_usb_id_table[MEDION_CREATIX_CTX1921], NULL },
d1402307
SE		 4719 { NULL },
4720 },
d300bd69 4721 },
72b39310
MCC		 4722
4723 .rc.core = {
f72a27b8 4724 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4725 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4726 .module_name = "dib0700",
0ffd1ab3 4727 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4728 .allowed_protos = RC_PROTO_BIT_RC5 |
4729 RC_PROTO_BIT_RC6_MCE |
4730 RC_PROTO_BIT_NEC,
d8b4b582 4731 .change_protocol = dib0700_change_protocol,
f72a27b8 4732 },
ba3fe3a9
PB		 4733 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4734 .num_adapters = 1,
4735 .adapter = {
4736 {
0fae1997 4737 DIB0700_NUM_FRONTENDS(1),
77eed219 4738 .fe = {{
f8731f4d
OG		 4739 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4740 .pid_filter_count = 32,
03245a5e
OG		 4741 .pid_filter = stk80xx_pid_filter,
4742 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4743 .frontend_attach = stk807x_frontend_attach,
4744 .tuner_attach = dib807x_tuner_attach,
4745
4746 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4747 }},
ba3fe3a9
PB		 4748 },
4749 },
4750
8a378e85 4751 .num_device_descs = 3,
ba3fe3a9
PB		 4752 .devices = {
4753 { "DiBcom STK807xP reference design",
3d59142a 4754 { &dib0700_usb_id_table[DIBCOM_STK807XP], NULL },
ba3fe3a9
PB		 4755 { NULL },
4756 },
aaeab30f 4757 { "Prolink Pixelview SBTVD",
3d59142a 4758 { &dib0700_usb_id_table[PIXELVIEW_SBTVD], NULL },
aaeab30f
MCC		 4759 { NULL },
4760 },
8a378e85 4761 { "EvolutePC TVWay+",
3d59142a 4762 { &dib0700_usb_id_table[EVOLUTEPC_TVWAY_PLUS], NULL },
8a378e85
F		 4763 { NULL },
4764 },
ba3fe3a9
PB		 4765 },
4766
72b39310 4767 .rc.core = {
f72a27b8 4768 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4769 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4770 .module_name = "dib0700",
0ffd1ab3 4771 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4772 .allowed_protos = RC_PROTO_BIT_RC5 |
4773 RC_PROTO_BIT_RC6_MCE |
4774 RC_PROTO_BIT_NEC,
d8b4b582 4775 .change_protocol = dib0700_change_protocol,
f72a27b8 4776 },
ba3fe3a9
PB		 4777 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4778 .num_adapters = 2,
4779 .adapter = {
4780 {
0fae1997 4781 DIB0700_NUM_FRONTENDS(1),
77eed219 4782 .fe = {{
f8731f4d
OG		 4783 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4784 .pid_filter_count = 32,
03245a5e
OG		 4785 .pid_filter = stk80xx_pid_filter,
4786 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4787 .frontend_attach = stk807xpvr_frontend_attach0,
4788 .tuner_attach = dib807x_tuner_attach,
4789
4790 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4791 }},
ba3fe3a9
PB		 4792 },
4793 {
0fae1997 4794 DIB0700_NUM_FRONTENDS(1),
77eed219 4795 .fe = {{
f8731f4d
OG		 4796 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4797 .pid_filter_count = 32,
03245a5e
OG		 4798 .pid_filter = stk80xx_pid_filter,
4799 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4800 .frontend_attach = stk807xpvr_frontend_attach1,
4801 .tuner_attach = dib807x_tuner_attach,
4802
4803 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4804 }},
ba3fe3a9
PB		 4805 },
4806 },
4807
4808 .num_device_descs = 1,
4809 .devices = {
4810 { "DiBcom STK807xPVR reference design",
3d59142a 4811 { &dib0700_usb_id_table[DIBCOM_STK807XPVR], NULL },
ba3fe3a9
PB		 4812 { NULL },
4813 },
4814 },
4815
72b39310 4816 .rc.core = {
f72a27b8 4817 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4818 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4819 .module_name = "dib0700",
0ffd1ab3 4820 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4821 .allowed_protos = RC_PROTO_BIT_RC5 |
4822 RC_PROTO_BIT_RC6_MCE |
4823 RC_PROTO_BIT_NEC,
d8b4b582 4824 .change_protocol = dib0700_change_protocol,
f72a27b8 4825 },
03245a5e
OG		 4826 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4827 .num_adapters = 1,
4828 .adapter = {
4829 {
0fae1997 4830 DIB0700_NUM_FRONTENDS(1),
77eed219 4831 .fe = {{
03245a5e
OG		 4832 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4833 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4834 .pid_filter_count = 32,
4835 .pid_filter = stk80xx_pid_filter,
4836 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4837 .frontend_attach = stk809x_frontend_attach,
4838 .tuner_attach = dib809x_tuner_attach,
4839
4840 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4841 }},
03245a5e
OG		 4842 },
4843 },
4844
4845 .num_device_descs = 1,
4846 .devices = {
4847 { "DiBcom STK8096GP reference design",
3d59142a 4848 { &dib0700_usb_id_table[DIBCOM_STK8096GP], NULL },
03245a5e
OG		 4849 { NULL },
4850 },
4851 },
4852
be9bae10
OG		 4853 .rc.core = {
4854 .rc_interval = DEFAULT_RC_INTERVAL,
4855 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4856 .module_name = "dib0700",
4857 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4858 .allowed_protos = RC_PROTO_BIT_RC5 |
4859 RC_PROTO_BIT_RC6_MCE |
4860 RC_PROTO_BIT_NEC,
be9bae10
OG		 4861 .change_protocol = dib0700_change_protocol,
4862 },
4863 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4864 .num_adapters = 1,
4865 .adapter = {
4866 {
0fae1997 4867 DIB0700_NUM_FRONTENDS(1),
77eed219 4868 .fe = {{
be9bae10
OG		 4869 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4870 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4871 .pid_filter_count = 32,
4872 .pid_filter = dib90x0_pid_filter,
4873 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4874 .frontend_attach = stk9090m_frontend_attach,
4875 .tuner_attach = dib9090_tuner_attach,
4876
4877 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4878 }},
be9bae10
OG		 4879 },
4880 },
4881
4882 .num_device_descs = 1,
4883 .devices = {
4884 { "DiBcom STK9090M reference design",
3d59142a 4885 { &dib0700_usb_id_table[DIBCOM_NIM9090M], NULL },
be9bae10
OG		 4886 { NULL },
4887 },
4888 },
4889
4890 .rc.core = {
4891 .rc_interval = DEFAULT_RC_INTERVAL,
4892 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4893 .module_name = "dib0700",
4894 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4895 .allowed_protos = RC_PROTO_BIT_RC5 |
4896 RC_PROTO_BIT_RC6_MCE |
4897 RC_PROTO_BIT_NEC,
be9bae10
OG		 4898 .change_protocol = dib0700_change_protocol,
4899 },
4900 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4901 .num_adapters = 1,
4902 .adapter = {
4903 {
0fae1997 4904 DIB0700_NUM_FRONTENDS(1),
77eed219 4905 .fe = {{
be9bae10
OG		 4906 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4907 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4908 .pid_filter_count = 32,
4909 .pid_filter = stk80xx_pid_filter,
4910 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4911 .frontend_attach = nim8096md_frontend_attach,
4912 .tuner_attach = nim8096md_tuner_attach,
4913
4914 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4915 }},
be9bae10
OG		 4916 },
4917 },
4918
4919 .num_device_descs = 1,
4920 .devices = {
4921 { "DiBcom NIM8096MD reference design",
3d59142a 4922 { &dib0700_usb_id_table[DIBCOM_NIM8096MD], NULL },
be9bae10
OG		 4923 { NULL },
4924 },
4925 },
4926
4927 .rc.core = {
4928 .rc_interval = DEFAULT_RC_INTERVAL,
4929 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4930 .module_name = "dib0700",
4931 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4932 .allowed_protos = RC_PROTO_BIT_RC5 |
4933 RC_PROTO_BIT_RC6_MCE |
4934 RC_PROTO_BIT_NEC,
be9bae10
OG		 4935 .change_protocol = dib0700_change_protocol,
4936 },
4937 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4938 .num_adapters = 1,
4939 .adapter = {
4940 {
0fae1997 4941 DIB0700_NUM_FRONTENDS(1),
77eed219 4942 .fe = {{
be9bae10
OG		 4943 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4944 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4945 .pid_filter_count = 32,
4946 .pid_filter = dib90x0_pid_filter,
4947 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4948 .frontend_attach = nim9090md_frontend_attach,
4949 .tuner_attach = nim9090md_tuner_attach,
4950
4951 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4952 }},
be9bae10
OG		 4953 },
4954 },
4955
4956 .num_device_descs = 1,
4957 .devices = {
4958 { "DiBcom NIM9090MD reference design",
3d59142a 4959 { &dib0700_usb_id_table[DIBCOM_NIM9090MD], NULL },
be9bae10
OG		 4960 { NULL },
4961 },
4962 },
4963
4964 .rc.core = {
4965 .rc_interval = DEFAULT_RC_INTERVAL,
4966 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4967 .module_name = "dib0700",
4968 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4969 .allowed_protos = RC_PROTO_BIT_RC5 |
4970 RC_PROTO_BIT_RC6_MCE |
4971 RC_PROTO_BIT_NEC,
be9bae10
OG		 4972 .change_protocol = dib0700_change_protocol,
4973 },
4974 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4975 .num_adapters = 1,
4976 .adapter = {
4977 {
0fae1997 4978 DIB0700_NUM_FRONTENDS(1),
77eed219 4979 .fe = {{
be9bae10
OG		 4980 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4981 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4982 .pid_filter_count = 32,
4983 .pid_filter = stk70x0p_pid_filter,
4984 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4985 .frontend_attach = nim7090_frontend_attach,
4986 .tuner_attach = nim7090_tuner_attach,
4987
4988 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4989 }},
be9bae10
OG		 4990 },
4991 },
4992
4993 .num_device_descs = 1,
4994 .devices = {
4995 { "DiBcom NIM7090 reference design",
3d59142a 4996 { &dib0700_usb_id_table[DIBCOM_NIM7090], NULL },
be9bae10
OG		 4997 { NULL },
4998 },
4999 },
5000
5001 .rc.core = {
5002 .rc_interval = DEFAULT_RC_INTERVAL,
5003 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5004 .module_name = "dib0700",
5005 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5006 .allowed_protos = RC_PROTO_BIT_RC5 |
5007 RC_PROTO_BIT_RC6_MCE |
5008 RC_PROTO_BIT_NEC,
be9bae10
OG		 5009 .change_protocol = dib0700_change_protocol,
5010 },
5011 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5012 .num_adapters = 2,
5013 .adapter = {
5014 {
0fae1997 5015 DIB0700_NUM_FRONTENDS(1),
77eed219 5016 .fe = {{
be9bae10
OG		 5017 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5018 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5019 .pid_filter_count = 32,
5020 .pid_filter = stk70x0p_pid_filter,
5021 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
5022 .frontend_attach = tfe7090pvr_frontend0_attach,
5023 .tuner_attach = tfe7090pvr_tuner0_attach,
5024
5025 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 5026 }},
be9bae10
OG		 5027 },
5028 {
0fae1997 5029 DIB0700_NUM_FRONTENDS(1),
77eed219 5030 .fe = {{
be9bae10
OG		 5031 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5032 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5033 .pid_filter_count = 32,
5034 .pid_filter = stk70x0p_pid_filter,
5035 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
5036 .frontend_attach = tfe7090pvr_frontend1_attach,
5037 .tuner_attach = tfe7090pvr_tuner1_attach,
5038
5039 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 5040 }},
be9bae10
OG		 5041 },
5042 },
5043
5044 .num_device_descs = 1,
5045 .devices = {
5046 { "DiBcom TFE7090PVR reference design",
3d59142a 5047 { &dib0700_usb_id_table[DIBCOM_TFE7090PVR], NULL },
be9bae10
OG		 5048 { NULL },
5049 },
5050 },
5051
8d009a0c
DF		 5052 .rc.core = {
5053 .rc_interval = DEFAULT_RC_INTERVAL,
5054 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5055 .module_name = "dib0700",
5056 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5057 .allowed_protos = RC_PROTO_BIT_RC5 |
5058 RC_PROTO_BIT_RC6_MCE |
5059 RC_PROTO_BIT_NEC,
8d009a0c
DF		 5060 .change_protocol = dib0700_change_protocol,
5061 },
5062 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5063 .num_adapters = 1,
5064 .adapter = {
5065 {
0fae1997 5066 DIB0700_NUM_FRONTENDS(1),
77eed219 5067 .fe = {{
01f16263 5068 .frontend_attach = pctv340e_frontend_attach,
8d009a0c
DF		 5069 .tuner_attach = xc4000_tuner_attach,
5070
5071 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 5072 }},
8d009a0c
DF		 5073 },
5074 },
5075
33fb1681 5076 .num_device_descs = 2,
8d009a0c
DF		 5077 .devices = {
5078 { "Pinnacle PCTV 340e HD Pro USB Stick",
3d59142a 5079 { &dib0700_usb_id_table[PINNACLE_PCTV340E], NULL },
8d009a0c
DF		 5080 { NULL },
5081 },
33fb1681 5082 { "Pinnacle PCTV Hybrid Stick Solo",
3d59142a 5083 { &dib0700_usb_id_table[PINNACLE_PCTV340E_SE], NULL },
33fb1681
DH		 5084 { NULL },
5085 },
8d009a0c 5086 },
6724a2f4
OG		 5087 .rc.core = {
5088 .rc_interval = DEFAULT_RC_INTERVAL,
5089 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5090 .module_name = "dib0700",
5091 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5092 .allowed_protos = RC_PROTO_BIT_RC5 |
5093 RC_PROTO_BIT_RC6_MCE |
5094 RC_PROTO_BIT_NEC,
6724a2f4
OG		 5095 .change_protocol = dib0700_change_protocol,
5096 },
5097 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5098 .num_adapters = 1,
5099 .adapter = {
5100 {
0fae1997 5101 DIB0700_NUM_FRONTENDS(1),
6724a2f4
OG		 5102 .fe = {{
5103 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5104 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5105 .pid_filter_count = 32,
5106 .pid_filter = stk70x0p_pid_filter,
5107 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
f45f513a
OG		 5108 .frontend_attach = tfe7790p_frontend_attach,
5109 .tuner_attach = tfe7790p_tuner_attach,
b293f304
OG		 5110
5111 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
5112 } },
b293f304
OG		 5113 },
5114 },
5115
5116 .num_device_descs = 1,
5117 .devices = {
f45f513a 5118 { "DiBcom TFE7790P reference design",
3d59142a 5119 { &dib0700_usb_id_table[DIBCOM_TFE7790P], NULL },
b293f304
OG		 5120 { NULL },
5121 },
5122 },
5123
88f3a358
OG		 5124 .rc.core = {
5125 .rc_interval = DEFAULT_RC_INTERVAL,
5126 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5127 .module_name = "dib0700",
5128 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5129 .allowed_protos = RC_PROTO_BIT_RC5 |
5130 RC_PROTO_BIT_RC6_MCE |
5131 RC_PROTO_BIT_NEC,
88f3a358
OG		 5132 .change_protocol = dib0700_change_protocol,
5133 },
5134 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5135 .num_adapters = 1,
5136 .adapter = {
5137 {
0fae1997 5138 DIB0700_NUM_FRONTENDS(1),
88f3a358
OG		 5139 .fe = {{
5140 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5141 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5142 .pid_filter_count = 32,
5143 .pid_filter = stk80xx_pid_filter,
5144 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5145 .frontend_attach = tfe8096p_frontend_attach,
5146 .tuner_attach = tfe8096p_tuner_attach,
5147
5148 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
5149
5150 } },
88f3a358
OG		 5151 },
5152 },
5153
5154 .num_device_descs = 1,
5155 .devices = {
5156 { "DiBcom TFE8096P reference design",
3d59142a 5157 { &dib0700_usb_id_table[DIBCOM_TFE8096P], NULL },
88f3a358
OG		 5158 { NULL },
5159 },
5160 },
5161
72b39310 5162 .rc.core = {
f72a27b8 5163 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 5164 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 5165 .module_name = "dib0700",
0ffd1ab3 5166 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5167 .allowed_protos = RC_PROTO_BIT_RC5 |
5168 RC_PROTO_BIT_RC6_MCE |
5169 RC_PROTO_BIT_NEC,
d8b4b582 5170 .change_protocol = dib0700_change_protocol,
f72a27b8 5171 },
91be260f
NS		 5172 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5173 .num_adapters = 2,
5174 .adapter = {
5175 {
5176 .num_frontends = 1,
5177 .fe = {{
5178 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5179 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5180 .pid_filter_count = 32,
5181 .pid_filter = stk80xx_pid_filter,
5182 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5183 .frontend_attach = stk809x_frontend_attach,
5184 .tuner_attach = dib809x_tuner_attach,
5185
5186 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
5187 } },
5188 .size_of_priv =
5189 sizeof(struct dib0700_adapter_state),
5190 }, {
5191 .num_frontends = 1,
5192 .fe = { {
5193 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5194 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5195 .pid_filter_count = 32,
5196 .pid_filter = stk80xx_pid_filter,
5197 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5198 .frontend_attach = stk809x_frontend1_attach,
5199 .tuner_attach = dib809x_tuner_attach,
5200
5201 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
5202 } },
5203 .size_of_priv =
5204 sizeof(struct dib0700_adapter_state),
5205 },
5206 },
5207 .num_device_descs = 1,
5208 .devices = {
5209 { "DiBcom STK8096-PVR reference design",
3d59142a
MCC		 5210 { &dib0700_usb_id_table[PCTV_DIBCOM_STK8096PVR],
5211 &dib0700_usb_id_table[DIBCOM_STK8096PVR], NULL},
91be260f
NS		 5212 { NULL },
5213 },
5214 },
5215
5216 .rc.core = {
5217 .rc_interval = DEFAULT_RC_INTERVAL,
5218 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5219 .module_name = "dib0700",
5220 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5221 .allowed_protos = RC_PROTO_BIT_RC5 |
5222 RC_PROTO_BIT_RC6_MCE |
5223 RC_PROTO_BIT_NEC,
91be260f
NS		 5224 .change_protocol = dib0700_change_protocol,
5225 },
c4d84547
OS		 5226 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5227 .num_adapters = 1,
5228 .adapter = {
5229 {
5230 DIB0700_NUM_FRONTENDS(1),
5231 .fe = {{
5232 .frontend_attach = xbox_one_attach,
5233
5234 DIB0700_DEFAULT_STREAMING_CONFIG(0x82),
5235 } },
5236 },
5237 },
5238 .num_device_descs = 1,
5239 .devices = {
5240 { "Microsoft Xbox One Digital TV Tuner",
3d59142a 5241 { &dib0700_usb_id_table[MICROSOFT_XBOX_ONE_TUNER], NULL },
c4d84547
OS		 5242 { NULL },
5243 },
5244 },
01373a5c 5245 },
b7f54910
PB		 5246};
5247
5248int dib0700_device_count = ARRAY_SIZE(dib0700_devices);
Linux 6.x block layer and io_uring tree(s)