Commit | Line | Data |
---|---|---|
74ba9207 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
e0d3bafd | 2 | /* |
b9255176 SD |
3 | cx231xx-core.c - driver for Conexant Cx23100/101/102 |
4 | USB video capture devices | |
e0d3bafd SD |
5 | |
6 | Copyright (C) 2008 <srinivasa.deevi at conexant dot com> | |
b9255176 | 7 | Based on em28xx driver |
e0d3bafd | 8 | |
e0d3bafd SD |
9 | */ |
10 | ||
589dadf2 | 11 | #include "cx231xx.h" |
e0d3bafd SD |
12 | #include <linux/init.h> |
13 | #include <linux/list.h> | |
14 | #include <linux/module.h> | |
5a0e3ad6 | 15 | #include <linux/slab.h> |
e0d3bafd SD |
16 | #include <linux/vmalloc.h> |
17 | #include <media/v4l2-common.h> | |
64fbf444 | 18 | #include <media/tuner.h> |
e0d3bafd | 19 | |
e0d3bafd SD |
20 | #include "cx231xx-reg.h" |
21 | ||
22 | /* #define ENABLE_DEBUG_ISOC_FRAMES */ | |
23 | ||
24 | static unsigned int core_debug; | |
84b5dbf3 MCC |
25 | module_param(core_debug, int, 0644); |
26 | MODULE_PARM_DESC(core_debug, "enable debug messages [core]"); | |
e0d3bafd SD |
27 | |
28 | #define cx231xx_coredbg(fmt, arg...) do {\ | |
29 | if (core_debug) \ | |
30 | printk(KERN_INFO "%s %s :"fmt, \ | |
31 | dev->name, __func__ , ##arg); } while (0) | |
32 | ||
33 | static unsigned int reg_debug; | |
84b5dbf3 MCC |
34 | module_param(reg_debug, int, 0644); |
35 | MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]"); | |
e0d3bafd | 36 | |
e0d3bafd SD |
37 | static int alt = CX231XX_PINOUT; |
38 | module_param(alt, int, 0644); | |
39 | MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint"); | |
40 | ||
e0d3bafd SD |
41 | #define cx231xx_isocdbg(fmt, arg...) do {\ |
42 | if (core_debug) \ | |
43 | printk(KERN_INFO "%s %s :"fmt, \ | |
44 | dev->name, __func__ , ##arg); } while (0) | |
45 | ||
b9255176 | 46 | /***************************************************************** |
6e6a8b5a | 47 | * Device control list functions * |
b9255176 | 48 | ******************************************************************/ |
e0d3bafd | 49 | |
64fbf444 | 50 | LIST_HEAD(cx231xx_devlist); |
e0d3bafd SD |
51 | static DEFINE_MUTEX(cx231xx_devlist_mutex); |
52 | ||
e0d3bafd SD |
53 | /* |
54 | * cx231xx_realease_resources() | |
55 | * unregisters the v4l2,i2c and usb devices | |
56 | * called when the device gets disconected or at module unload | |
57 | */ | |
58 | void cx231xx_remove_from_devlist(struct cx231xx *dev) | |
59 | { | |
64fbf444 PB |
60 | if (dev == NULL) |
61 | return; | |
62 | if (dev->udev == NULL) | |
63 | return; | |
64 | ||
65 | if (atomic_read(&dev->devlist_count) > 0) { | |
66 | mutex_lock(&cx231xx_devlist_mutex); | |
67 | list_del(&dev->devlist); | |
68 | atomic_dec(&dev->devlist_count); | |
69 | mutex_unlock(&cx231xx_devlist_mutex); | |
70 | } | |
e0d3bafd SD |
71 | }; |
72 | ||
73 | void cx231xx_add_into_devlist(struct cx231xx *dev) | |
74 | { | |
75 | mutex_lock(&cx231xx_devlist_mutex); | |
76 | list_add_tail(&dev->devlist, &cx231xx_devlist); | |
64fbf444 | 77 | atomic_inc(&dev->devlist_count); |
e0d3bafd SD |
78 | mutex_unlock(&cx231xx_devlist_mutex); |
79 | }; | |
80 | ||
e0d3bafd | 81 | static LIST_HEAD(cx231xx_extension_devlist); |
e0d3bafd SD |
82 | |
83 | int cx231xx_register_extension(struct cx231xx_ops *ops) | |
84 | { | |
85 | struct cx231xx *dev = NULL; | |
86 | ||
87 | mutex_lock(&cx231xx_devlist_mutex); | |
e0d3bafd | 88 | list_add_tail(&ops->next, &cx231xx_extension_devlist); |
fb1817e4 | 89 | list_for_each_entry(dev, &cx231xx_devlist, devlist) { |
a9fac6b1 | 90 | ops->init(dev); |
336fea92 | 91 | dev_info(dev->dev, "%s initialized\n", ops->name); |
fb1817e4 | 92 | } |
e0d3bafd SD |
93 | mutex_unlock(&cx231xx_devlist_mutex); |
94 | return 0; | |
95 | } | |
96 | EXPORT_SYMBOL(cx231xx_register_extension); | |
97 | ||
98 | void cx231xx_unregister_extension(struct cx231xx_ops *ops) | |
99 | { | |
100 | struct cx231xx *dev = NULL; | |
101 | ||
102 | mutex_lock(&cx231xx_devlist_mutex); | |
fb1817e4 | 103 | list_for_each_entry(dev, &cx231xx_devlist, devlist) { |
a9fac6b1 | 104 | ops->fini(dev); |
336fea92 | 105 | dev_info(dev->dev, "%s removed\n", ops->name); |
fb1817e4 | 106 | } |
e0d3bafd | 107 | |
e0d3bafd | 108 | list_del(&ops->next); |
e0d3bafd SD |
109 | mutex_unlock(&cx231xx_devlist_mutex); |
110 | } | |
84b5dbf3 | 111 | EXPORT_SYMBOL(cx231xx_unregister_extension); |
e0d3bafd SD |
112 | |
113 | void cx231xx_init_extension(struct cx231xx *dev) | |
114 | { | |
115 | struct cx231xx_ops *ops = NULL; | |
116 | ||
761f6cf6 | 117 | mutex_lock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
118 | if (!list_empty(&cx231xx_extension_devlist)) { |
119 | list_for_each_entry(ops, &cx231xx_extension_devlist, next) { | |
120 | if (ops->init) | |
121 | ops->init(dev); | |
122 | } | |
123 | } | |
761f6cf6 | 124 | mutex_unlock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
125 | } |
126 | ||
127 | void cx231xx_close_extension(struct cx231xx *dev) | |
128 | { | |
129 | struct cx231xx_ops *ops = NULL; | |
130 | ||
761f6cf6 | 131 | mutex_lock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
132 | if (!list_empty(&cx231xx_extension_devlist)) { |
133 | list_for_each_entry(ops, &cx231xx_extension_devlist, next) { | |
134 | if (ops->fini) | |
135 | ops->fini(dev); | |
136 | } | |
137 | } | |
761f6cf6 | 138 | mutex_unlock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
139 | } |
140 | ||
b9255176 SD |
141 | /**************************************************************** |
142 | * U S B related functions * | |
143 | *****************************************************************/ | |
e0d3bafd | 144 | int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, |
84b5dbf3 | 145 | struct cx231xx_i2c_xfer_data *req_data) |
e0d3bafd | 146 | { |
84b5dbf3 MCC |
147 | int status = 0; |
148 | struct cx231xx *dev = i2c_bus->dev; | |
b9255176 | 149 | struct VENDOR_REQUEST_IN ven_req; |
84b5dbf3 MCC |
150 | |
151 | u8 saddr_len = 0; | |
152 | u8 _i2c_period = 0; | |
153 | u8 _i2c_nostop = 0; | |
154 | u8 _i2c_reserve = 0; | |
155 | ||
7528cd27 MCC |
156 | if (dev->state & DEV_DISCONNECTED) |
157 | return -ENODEV; | |
158 | ||
84b5dbf3 MCC |
159 | /* Get the I2C period, nostop and reserve parameters */ |
160 | _i2c_period = i2c_bus->i2c_period; | |
161 | _i2c_nostop = i2c_bus->i2c_nostop; | |
162 | _i2c_reserve = i2c_bus->i2c_reserve; | |
163 | ||
164 | saddr_len = req_data->saddr_len; | |
165 | ||
166 | /* Set wValue */ | |
9713883b NMG |
167 | ven_req.wValue = (req_data->dev_addr << 9 | _i2c_period << 4 | |
168 | saddr_len << 2 | _i2c_nostop << 1 | I2C_SYNC | | |
169 | _i2c_reserve << 6); | |
84b5dbf3 MCC |
170 | |
171 | /* set channel number */ | |
b9255176 SD |
172 | if (req_data->direction & I2C_M_RD) { |
173 | /* channel number, for read,spec required channel_num +4 */ | |
174 | ven_req.bRequest = i2c_bus->nr + 4; | |
175 | } else | |
84b5dbf3 MCC |
176 | ven_req.bRequest = i2c_bus->nr; /* channel number, */ |
177 | ||
178 | /* set index value */ | |
179 | switch (saddr_len) { | |
180 | case 0: | |
181 | ven_req.wIndex = 0; /* need check */ | |
182 | break; | |
183 | case 1: | |
184 | ven_req.wIndex = (req_data->saddr_dat & 0xff); | |
185 | break; | |
186 | case 2: | |
187 | ven_req.wIndex = req_data->saddr_dat; | |
188 | break; | |
189 | } | |
190 | ||
191 | /* set wLength value */ | |
192 | ven_req.wLength = req_data->buf_size; | |
193 | ||
194 | /* set bData value */ | |
195 | ven_req.bData = 0; | |
196 | ||
197 | /* set the direction */ | |
198 | if (req_data->direction) { | |
199 | ven_req.direction = USB_DIR_IN; | |
200 | memset(req_data->p_buffer, 0x00, ven_req.wLength); | |
201 | } else | |
202 | ven_req.direction = USB_DIR_OUT; | |
203 | ||
204 | /* set the buffer for read / write */ | |
205 | ven_req.pBuff = req_data->p_buffer; | |
206 | ||
207 | ||
208 | /* call common vendor command request */ | |
209 | status = cx231xx_send_vendor_cmd(dev, &ven_req); | |
77e97ba2 | 210 | if (status < 0 && !dev->i2c_scan_running) { |
336fea92 | 211 | dev_err(dev->dev, "%s: failed with status -%d\n", |
ed0e3729 | 212 | __func__, status); |
84b5dbf3 MCC |
213 | } |
214 | ||
215 | return status; | |
e0d3bafd | 216 | } |
e0d3bafd | 217 | EXPORT_SYMBOL_GPL(cx231xx_send_usb_command); |
b9255176 | 218 | |
24c80b65 MCC |
219 | /* |
220 | * Sends/Receives URB control messages, assuring to use a kalloced buffer | |
221 | * for all operations (dev->urb_buf), to avoid using stacked buffers, as | |
222 | * they aren't safe for usage with USB, due to DMA restrictions. | |
223 | * Also implements the debug code for control URB's. | |
224 | */ | |
225 | static int __usb_control_msg(struct cx231xx *dev, unsigned int pipe, | |
226 | __u8 request, __u8 requesttype, __u16 value, __u16 index, | |
227 | void *data, __u16 size, int timeout) | |
228 | { | |
229 | int rc, i; | |
230 | ||
231 | if (reg_debug) { | |
ba1da97e | 232 | printk(KERN_DEBUG "%s: (pipe 0x%08x): %s: %02x %02x %02x %02x %02x %02x %02x %02x ", |
24c80b65 MCC |
233 | dev->name, |
234 | pipe, | |
235 | (requesttype & USB_DIR_IN) ? "IN" : "OUT", | |
236 | requesttype, | |
237 | request, | |
238 | value & 0xff, value >> 8, | |
239 | index & 0xff, index >> 8, | |
240 | size & 0xff, size >> 8); | |
241 | if (!(requesttype & USB_DIR_IN)) { | |
242 | printk(KERN_CONT ">>>"); | |
243 | for (i = 0; i < size; i++) | |
244 | printk(KERN_CONT " %02x", | |
245 | ((unsigned char *)data)[i]); | |
246 | } | |
247 | } | |
248 | ||
249 | /* Do the real call to usb_control_msg */ | |
250 | mutex_lock(&dev->ctrl_urb_lock); | |
251 | if (!(requesttype & USB_DIR_IN) && size) | |
252 | memcpy(dev->urb_buf, data, size); | |
253 | rc = usb_control_msg(dev->udev, pipe, request, requesttype, value, | |
254 | index, dev->urb_buf, size, timeout); | |
255 | if ((requesttype & USB_DIR_IN) && size) | |
256 | memcpy(data, dev->urb_buf, size); | |
257 | mutex_unlock(&dev->ctrl_urb_lock); | |
258 | ||
259 | if (reg_debug) { | |
260 | if (unlikely(rc < 0)) { | |
261 | printk(KERN_CONT "FAILED!\n"); | |
262 | return rc; | |
263 | } | |
264 | ||
265 | if ((requesttype & USB_DIR_IN)) { | |
266 | printk(KERN_CONT "<<<"); | |
267 | for (i = 0; i < size; i++) | |
268 | printk(KERN_CONT " %02x", | |
269 | ((unsigned char *)data)[i]); | |
270 | } | |
271 | printk(KERN_CONT "\n"); | |
272 | } | |
273 | ||
274 | return rc; | |
275 | } | |
276 | ||
277 | ||
e0d3bafd SD |
278 | /* |
279 | * cx231xx_read_ctrl_reg() | |
280 | * reads data from the usb device specifying bRequest and wValue | |
281 | */ | |
282 | int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 283 | char *buf, int len) |
e0d3bafd | 284 | { |
84b5dbf3 | 285 | u8 val = 0; |
e0d3bafd SD |
286 | int ret; |
287 | int pipe = usb_rcvctrlpipe(dev->udev, 0); | |
288 | ||
289 | if (dev->state & DEV_DISCONNECTED) | |
290 | return -ENODEV; | |
291 | ||
292 | if (len > URB_MAX_CTRL_SIZE) | |
293 | return -EINVAL; | |
294 | ||
84b5dbf3 MCC |
295 | switch (len) { |
296 | case 1: | |
297 | val = ENABLE_ONE_BYTE; | |
298 | break; | |
299 | case 2: | |
300 | val = ENABLE_TWE_BYTE; | |
301 | break; | |
302 | case 3: | |
303 | val = ENABLE_THREE_BYTE; | |
304 | break; | |
305 | case 4: | |
306 | val = ENABLE_FOUR_BYTE; | |
307 | break; | |
308 | default: | |
309 | val = 0xFF; /* invalid option */ | |
310 | } | |
311 | ||
312 | if (val == 0xFF) | |
313 | return -EINVAL; | |
e0d3bafd | 314 | |
24c80b65 | 315 | ret = __usb_control_msg(dev, pipe, req, |
e0d3bafd | 316 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
24c80b65 | 317 | val, reg, buf, len, HZ); |
e0d3bafd SD |
318 | return ret; |
319 | } | |
320 | ||
b9255176 SD |
321 | int cx231xx_send_vendor_cmd(struct cx231xx *dev, |
322 | struct VENDOR_REQUEST_IN *ven_req) | |
e0d3bafd | 323 | { |
84b5dbf3 | 324 | int ret; |
e0d3bafd | 325 | int pipe = 0; |
64fbf444 PB |
326 | int unsend_size = 0; |
327 | u8 *pdata; | |
e0d3bafd SD |
328 | |
329 | if (dev->state & DEV_DISCONNECTED) | |
330 | return -ENODEV; | |
331 | ||
332 | if ((ven_req->wLength > URB_MAX_CTRL_SIZE)) | |
333 | return -EINVAL; | |
334 | ||
84b5dbf3 MCC |
335 | if (ven_req->direction) |
336 | pipe = usb_rcvctrlpipe(dev->udev, 0); | |
337 | else | |
338 | pipe = usb_sndctrlpipe(dev->udev, 0); | |
e0d3bafd | 339 | |
24c80b65 MCC |
340 | /* |
341 | * If the cx23102 read more than 4 bytes with i2c bus, | |
342 | * need chop to 4 byte per request | |
343 | */ | |
64fbf444 PB |
344 | if ((ven_req->wLength > 4) && ((ven_req->bRequest == 0x4) || |
345 | (ven_req->bRequest == 0x5) || | |
6c5da803 OK |
346 | (ven_req->bRequest == 0x6) || |
347 | ||
348 | /* Internal Master 3 Bus can send | |
349 | * and receive only 4 bytes per time | |
350 | */ | |
351 | (ven_req->bRequest == 0x2))) { | |
64fbf444 PB |
352 | unsend_size = 0; |
353 | pdata = ven_req->pBuff; | |
354 | ||
355 | ||
356 | unsend_size = ven_req->wLength; | |
357 | ||
24c80b65 | 358 | /* the first package */ |
64fbf444 PB |
359 | ven_req->wValue = ven_req->wValue & 0xFFFB; |
360 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x2; | |
24c80b65 MCC |
361 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
362 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 PB |
363 | ven_req->wValue, ven_req->wIndex, pdata, |
364 | 0x0004, HZ); | |
365 | unsend_size = unsend_size - 4; | |
64fbf444 | 366 | |
24c80b65 | 367 | /* the middle package */ |
64fbf444 PB |
368 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x42; |
369 | while (unsend_size - 4 > 0) { | |
370 | pdata = pdata + 4; | |
24c80b65 | 371 | ret = __usb_control_msg(dev, pipe, |
64fbf444 | 372 | ven_req->bRequest, |
24c80b65 | 373 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
64fbf444 PB |
374 | ven_req->wValue, ven_req->wIndex, pdata, |
375 | 0x0004, HZ); | |
64fbf444 PB |
376 | unsend_size = unsend_size - 4; |
377 | } | |
378 | ||
24c80b65 | 379 | /* the last package */ |
64fbf444 PB |
380 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x40; |
381 | pdata = pdata + 4; | |
24c80b65 MCC |
382 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
383 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 PB |
384 | ven_req->wValue, ven_req->wIndex, pdata, |
385 | unsend_size, HZ); | |
64fbf444 | 386 | } else { |
24c80b65 MCC |
387 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
388 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 | 389 | ven_req->wValue, ven_req->wIndex, |
24c80b65 | 390 | ven_req->pBuff, ven_req->wLength, HZ); |
64fbf444 | 391 | } |
e0d3bafd SD |
392 | |
393 | return ret; | |
394 | } | |
395 | ||
396 | /* | |
397 | * cx231xx_write_ctrl_reg() | |
398 | * sends data to the usb device, specifying bRequest | |
399 | */ | |
400 | int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf, | |
84b5dbf3 | 401 | int len) |
e0d3bafd | 402 | { |
84b5dbf3 | 403 | u8 val = 0; |
e0d3bafd SD |
404 | int ret; |
405 | int pipe = usb_sndctrlpipe(dev->udev, 0); | |
406 | ||
407 | if (dev->state & DEV_DISCONNECTED) | |
408 | return -ENODEV; | |
409 | ||
410 | if ((len < 1) || (len > URB_MAX_CTRL_SIZE)) | |
411 | return -EINVAL; | |
412 | ||
84b5dbf3 MCC |
413 | switch (len) { |
414 | case 1: | |
415 | val = ENABLE_ONE_BYTE; | |
416 | break; | |
417 | case 2: | |
418 | val = ENABLE_TWE_BYTE; | |
419 | break; | |
420 | case 3: | |
421 | val = ENABLE_THREE_BYTE; | |
422 | break; | |
423 | case 4: | |
424 | val = ENABLE_FOUR_BYTE; | |
425 | break; | |
426 | default: | |
427 | val = 0xFF; /* invalid option */ | |
428 | } | |
429 | ||
430 | if (val == 0xFF) | |
431 | return -EINVAL; | |
e0d3bafd SD |
432 | |
433 | if (reg_debug) { | |
434 | int byte; | |
435 | ||
ba1da97e | 436 | cx231xx_isocdbg("(pipe 0x%08x): OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>", |
b9255176 SD |
437 | pipe, |
438 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
439 | req, 0, val, reg & 0xff, | |
440 | reg >> 8, len & 0xff, len >> 8); | |
e0d3bafd SD |
441 | |
442 | for (byte = 0; byte < len; byte++) | |
443 | cx231xx_isocdbg(" %02x", (unsigned char)buf[byte]); | |
444 | cx231xx_isocdbg("\n"); | |
445 | } | |
446 | ||
24c80b65 | 447 | ret = __usb_control_msg(dev, pipe, req, |
e0d3bafd | 448 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
24c80b65 | 449 | val, reg, buf, len, HZ); |
e0d3bafd SD |
450 | |
451 | return ret; | |
452 | } | |
453 | ||
b9255176 SD |
454 | /**************************************************************** |
455 | * USB Alternate Setting functions * | |
456 | *****************************************************************/ | |
e0d3bafd SD |
457 | |
458 | int cx231xx_set_video_alternate(struct cx231xx *dev) | |
459 | { | |
460 | int errCode, prev_alt = dev->video_mode.alt; | |
461 | unsigned int min_pkt_size = dev->width * 2 + 4; | |
84b5dbf3 | 462 | u32 usb_interface_index = 0; |
e0d3bafd SD |
463 | |
464 | /* When image size is bigger than a certain value, | |
465 | the frame size should be increased, otherwise, only | |
466 | green screen will be received. | |
467 | */ | |
468 | if (dev->width * 2 * dev->height > 720 * 240 * 2) | |
469 | min_pkt_size *= 2; | |
470 | ||
84b5dbf3 MCC |
471 | if (dev->width > 360) { |
472 | /* resolutions: 720,704,640 */ | |
473 | dev->video_mode.alt = 3; | |
474 | } else if (dev->width > 180) { | |
475 | /* resolutions: 360,352,320,240 */ | |
476 | dev->video_mode.alt = 2; | |
477 | } else if (dev->width > 0) { | |
478 | /* resolutions: 180,176,160,128,88 */ | |
479 | dev->video_mode.alt = 1; | |
480 | } else { | |
481 | /* Change to alt0 BULK to release USB bandwidth */ | |
482 | dev->video_mode.alt = 0; | |
483 | } | |
484 | ||
64fbf444 PB |
485 | if (dev->USE_ISO == 0) |
486 | dev->video_mode.alt = 0; | |
487 | ||
d5a1754d | 488 | cx231xx_coredbg("dev->video_mode.alt= %d\n", dev->video_mode.alt); |
64fbf444 | 489 | |
84b5dbf3 MCC |
490 | /* Get the correct video interface Index */ |
491 | usb_interface_index = | |
492 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
493 | video_index + 1; | |
e0d3bafd SD |
494 | |
495 | if (dev->video_mode.alt != prev_alt) { | |
496 | cx231xx_coredbg("minimum isoc packet size: %u (alt=%d)\n", | |
497 | min_pkt_size, dev->video_mode.alt); | |
64fbf444 PB |
498 | |
499 | if (dev->video_mode.alt_max_pkt_size != NULL) | |
500 | dev->video_mode.max_pkt_size = | |
501 | dev->video_mode.alt_max_pkt_size[dev->video_mode.alt]; | |
e0d3bafd | 502 | cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n", |
84b5dbf3 MCC |
503 | dev->video_mode.alt, |
504 | dev->video_mode.max_pkt_size); | |
84b5dbf3 MCC |
505 | errCode = |
506 | usb_set_interface(dev->udev, usb_interface_index, | |
507 | dev->video_mode.alt); | |
e0d3bafd | 508 | if (errCode < 0) { |
336fea92 | 509 | dev_err(dev->dev, |
b7085c08 | 510 | "cannot change alt number to %d (error=%i)\n", |
ed0e3729 | 511 | dev->video_mode.alt, errCode); |
e0d3bafd SD |
512 | return errCode; |
513 | } | |
514 | } | |
515 | return 0; | |
516 | } | |
517 | ||
518 | int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt) | |
519 | { | |
84b5dbf3 MCC |
520 | int status = 0; |
521 | u32 usb_interface_index = 0; | |
522 | u32 max_pkt_size = 0; | |
523 | ||
524 | switch (index) { | |
525 | case INDEX_TS1: | |
526 | usb_interface_index = | |
527 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
528 | ts1_index + 1; | |
64fbf444 | 529 | dev->ts1_mode.alt = alt; |
84b5dbf3 MCC |
530 | if (dev->ts1_mode.alt_max_pkt_size != NULL) |
531 | max_pkt_size = dev->ts1_mode.max_pkt_size = | |
532 | dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt]; | |
533 | break; | |
534 | case INDEX_TS2: | |
535 | usb_interface_index = | |
536 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
537 | ts2_index + 1; | |
538 | break; | |
539 | case INDEX_AUDIO: | |
540 | usb_interface_index = | |
541 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
542 | audio_index + 1; | |
543 | dev->adev.alt = alt; | |
544 | if (dev->adev.alt_max_pkt_size != NULL) | |
545 | max_pkt_size = dev->adev.max_pkt_size = | |
546 | dev->adev.alt_max_pkt_size[dev->adev.alt]; | |
547 | break; | |
548 | case INDEX_VIDEO: | |
549 | usb_interface_index = | |
550 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
551 | video_index + 1; | |
552 | dev->video_mode.alt = alt; | |
553 | if (dev->video_mode.alt_max_pkt_size != NULL) | |
554 | max_pkt_size = dev->video_mode.max_pkt_size = | |
555 | dev->video_mode.alt_max_pkt_size[dev->video_mode. | |
556 | alt]; | |
557 | break; | |
558 | case INDEX_VANC: | |
2f861387 MCC |
559 | if (dev->board.no_alt_vanc) |
560 | return 0; | |
84b5dbf3 MCC |
561 | usb_interface_index = |
562 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
563 | vanc_index + 1; | |
564 | dev->vbi_mode.alt = alt; | |
565 | if (dev->vbi_mode.alt_max_pkt_size != NULL) | |
566 | max_pkt_size = dev->vbi_mode.max_pkt_size = | |
567 | dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt]; | |
568 | break; | |
569 | case INDEX_HANC: | |
570 | usb_interface_index = | |
571 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
572 | hanc_index + 1; | |
573 | dev->sliced_cc_mode.alt = alt; | |
574 | if (dev->sliced_cc_mode.alt_max_pkt_size != NULL) | |
575 | max_pkt_size = dev->sliced_cc_mode.max_pkt_size = | |
576 | dev->sliced_cc_mode.alt_max_pkt_size[dev-> | |
577 | sliced_cc_mode. | |
578 | alt]; | |
579 | break; | |
580 | default: | |
581 | break; | |
582 | } | |
583 | ||
584 | if (alt > 0 && max_pkt_size == 0) { | |
336fea92 | 585 | dev_err(dev->dev, |
b7085c08 | 586 | "can't change interface %d alt no. to %d: Max. Pkt size = 0\n", |
ed0e3729 | 587 | usb_interface_index, alt); |
64fbf444 PB |
588 | /*To workaround error number=-71 on EP0 for videograbber, |
589 | need add following codes.*/ | |
2f861387 | 590 | if (dev->board.no_alt_vanc) |
64fbf444 | 591 | return -1; |
84b5dbf3 MCC |
592 | } |
593 | ||
ba1da97e MCC |
594 | cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u,Interface = %d\n", |
595 | alt, max_pkt_size, | |
d5a1754d | 596 | usb_interface_index); |
84b5dbf3 MCC |
597 | |
598 | if (usb_interface_index > 0) { | |
599 | status = usb_set_interface(dev->udev, usb_interface_index, alt); | |
e0d3bafd | 600 | if (status < 0) { |
336fea92 | 601 | dev_err(dev->dev, |
b7085c08 | 602 | "can't change interface %d alt no. to %d (err=%i)\n", |
ed0e3729 | 603 | usb_interface_index, alt, status); |
e0d3bafd SD |
604 | return status; |
605 | } | |
84b5dbf3 | 606 | } |
e0d3bafd | 607 | |
84b5dbf3 | 608 | return status; |
e0d3bafd SD |
609 | } |
610 | EXPORT_SYMBOL_GPL(cx231xx_set_alt_setting); | |
611 | ||
612 | int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio) | |
613 | { | |
614 | int rc = 0; | |
615 | ||
616 | if (!gpio) | |
617 | return rc; | |
618 | ||
619 | /* Send GPIO reset sequences specified at board entry */ | |
620 | while (gpio->sleep >= 0) { | |
84b5dbf3 MCC |
621 | rc = cx231xx_set_gpio_value(dev, gpio->bit, gpio->val); |
622 | if (rc < 0) | |
623 | return rc; | |
e0d3bafd SD |
624 | |
625 | if (gpio->sleep > 0) | |
626 | msleep(gpio->sleep); | |
627 | ||
628 | gpio++; | |
629 | } | |
630 | return rc; | |
631 | } | |
632 | ||
64fbf444 PB |
633 | int cx231xx_demod_reset(struct cx231xx *dev) |
634 | { | |
635 | ||
636 | u8 status = 0; | |
637 | u8 value[4] = { 0, 0, 0, 0 }; | |
638 | ||
639 | status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, | |
640 | value, 4); | |
64fbf444 | 641 | |
d5a1754d DH |
642 | cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, |
643 | value[0], value[1], value[2], value[3]); | |
644 | ||
645 | cx231xx_coredbg("Enter cx231xx_demod_reset()\n"); | |
646 | ||
69626853 MCC |
647 | value[1] = (u8) 0x3; |
648 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
649 | PWR_CTL_EN, value, 4); | |
650 | msleep(10); | |
651 | ||
652 | value[1] = (u8) 0x0; | |
653 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
654 | PWR_CTL_EN, value, 4); | |
655 | msleep(10); | |
656 | ||
657 | value[1] = (u8) 0x3; | |
658 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
659 | PWR_CTL_EN, value, 4); | |
660 | msleep(10); | |
64fbf444 PB |
661 | |
662 | status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, | |
663 | value, 4); | |
d5a1754d DH |
664 | |
665 | cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, | |
666 | value[0], value[1], value[2], value[3]); | |
64fbf444 PB |
667 | |
668 | return status; | |
669 | } | |
670 | EXPORT_SYMBOL_GPL(cx231xx_demod_reset); | |
671 | int is_fw_load(struct cx231xx *dev) | |
672 | { | |
673 | return cx231xx_check_fw(dev); | |
674 | } | |
675 | EXPORT_SYMBOL_GPL(is_fw_load); | |
676 | ||
e0d3bafd SD |
677 | int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode) |
678 | { | |
64fbf444 PB |
679 | int errCode = 0; |
680 | ||
e0d3bafd SD |
681 | if (dev->mode == set_mode) |
682 | return 0; | |
683 | ||
684 | if (set_mode == CX231XX_SUSPEND) { | |
84b5dbf3 | 685 | /* Set the chip in power saving mode */ |
e0d3bafd SD |
686 | dev->mode = set_mode; |
687 | } | |
688 | ||
689 | /* Resource is locked */ | |
690 | if (dev->mode != CX231XX_SUSPEND) | |
691 | return -EINVAL; | |
692 | ||
693 | dev->mode = set_mode; | |
694 | ||
64fbf444 PB |
695 | if (dev->mode == CX231XX_DIGITAL_MODE)/* Set Digital power mode */ { |
696 | /* set AGC mode to Digital */ | |
697 | switch (dev->model) { | |
698 | case CX231XX_BOARD_CNXT_CARRAERA: | |
699 | case CX231XX_BOARD_CNXT_RDE_250: | |
700 | case CX231XX_BOARD_CNXT_SHELBY: | |
701 | case CX231XX_BOARD_CNXT_RDU_250: | |
702 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); | |
703 | break; | |
704 | case CX231XX_BOARD_CNXT_RDE_253S: | |
705 | case CX231XX_BOARD_CNXT_RDU_253S: | |
24b923f0 | 706 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
b88ba619 DH |
707 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); |
708 | break; | |
1a50fdde | 709 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 710 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
b88ba619 DH |
711 | errCode = cx231xx_set_power_mode(dev, |
712 | POLARIS_AVMODE_DIGITAL); | |
64fbf444 PB |
713 | break; |
714 | default: | |
715 | break; | |
716 | } | |
717 | } else/* Set Analog Power mode */ { | |
718 | /* set AGC mode to Analog */ | |
719 | switch (dev->model) { | |
720 | case CX231XX_BOARD_CNXT_CARRAERA: | |
721 | case CX231XX_BOARD_CNXT_RDE_250: | |
722 | case CX231XX_BOARD_CNXT_SHELBY: | |
723 | case CX231XX_BOARD_CNXT_RDU_250: | |
724 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); | |
725 | break; | |
726 | case CX231XX_BOARD_CNXT_RDE_253S: | |
727 | case CX231XX_BOARD_CNXT_RDU_253S: | |
1a50fdde | 728 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 729 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
9417bc6d | 730 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
de8ae0d5 PM |
731 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: |
732 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | |
24b923f0 | 733 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
64fbf444 PB |
734 | break; |
735 | default: | |
736 | break; | |
737 | } | |
738 | } | |
b9255176 | 739 | |
dc4af782 MCC |
740 | if (errCode < 0) { |
741 | dev_err(dev->dev, "Failed to set devmode to %s: error: %i", | |
742 | dev->mode == CX231XX_DIGITAL_MODE ? "digital" : "analog", | |
743 | errCode); | |
744 | return errCode; | |
745 | } | |
746 | ||
747 | return 0; | |
e0d3bafd SD |
748 | } |
749 | EXPORT_SYMBOL_GPL(cx231xx_set_mode); | |
750 | ||
64fbf444 PB |
751 | int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size) |
752 | { | |
753 | int errCode = 0; | |
20e01b26 DC |
754 | int actlen = -1; |
755 | int ret = -ENOMEM; | |
64fbf444 PB |
756 | u32 *buffer; |
757 | ||
da983503 | 758 | buffer = kzalloc(4096, GFP_KERNEL); |
ed0e3729 | 759 | if (buffer == NULL) |
64fbf444 | 760 | return -ENOMEM; |
64fbf444 PB |
761 | memcpy(&buffer[0], firmware, 4096); |
762 | ||
763 | ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 5), | |
da983503 | 764 | buffer, 4096, &actlen, 2000); |
64fbf444 PB |
765 | |
766 | if (ret) | |
336fea92 | 767 | dev_err(dev->dev, |
b7085c08 MCC |
768 | "bulk message failed: %d (%d/%d)", ret, |
769 | size, actlen); | |
64fbf444 PB |
770 | else { |
771 | errCode = actlen != size ? -1 : 0; | |
772 | } | |
da983503 HV |
773 | kfree(buffer); |
774 | return errCode; | |
64fbf444 PB |
775 | } |
776 | ||
b9255176 SD |
777 | /***************************************************************** |
778 | * URB Streaming functions * | |
779 | ******************************************************************/ | |
e0d3bafd SD |
780 | |
781 | /* | |
782 | * IRQ callback, called by URB callback | |
783 | */ | |
64fbf444 | 784 | static void cx231xx_isoc_irq_callback(struct urb *urb) |
e0d3bafd | 785 | { |
84b5dbf3 MCC |
786 | struct cx231xx_dmaqueue *dma_q = urb->context; |
787 | struct cx231xx_video_mode *vmode = | |
788 | container_of(dma_q, struct cx231xx_video_mode, vidq); | |
789 | struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); | |
aa53bf0b | 790 | unsigned long flags; |
da983503 | 791 | int i; |
e0d3bafd | 792 | |
84b5dbf3 MCC |
793 | switch (urb->status) { |
794 | case 0: /* success */ | |
795 | case -ETIMEDOUT: /* NAK */ | |
796 | break; | |
797 | case -ECONNRESET: /* kill */ | |
798 | case -ENOENT: | |
799 | case -ESHUTDOWN: | |
800 | return; | |
801 | default: /* error */ | |
69b17abf | 802 | cx231xx_isocdbg("urb completion error %d.\n", urb->status); |
84b5dbf3 | 803 | break; |
e0d3bafd SD |
804 | } |
805 | ||
806 | /* Copy data from URB */ | |
aa53bf0b | 807 | spin_lock_irqsave(&dev->video_mode.slock, flags); |
da983503 | 808 | dev->video_mode.isoc_ctl.isoc_copy(dev, urb); |
aa53bf0b | 809 | spin_unlock_irqrestore(&dev->video_mode.slock, flags); |
e0d3bafd SD |
810 | |
811 | /* Reset urb buffers */ | |
812 | for (i = 0; i < urb->number_of_packets; i++) { | |
813 | urb->iso_frame_desc[i].status = 0; | |
814 | urb->iso_frame_desc[i].actual_length = 0; | |
815 | } | |
e0d3bafd SD |
816 | |
817 | urb->status = usb_submit_urb(urb, GFP_ATOMIC); | |
818 | if (urb->status) { | |
819 | cx231xx_isocdbg("urb resubmit failed (error=%i)\n", | |
84b5dbf3 | 820 | urb->status); |
e0d3bafd SD |
821 | } |
822 | } | |
64fbf444 PB |
823 | /***************************************************************** |
824 | * URB Streaming functions * | |
825 | ******************************************************************/ | |
826 | ||
827 | /* | |
828 | * IRQ callback, called by URB callback | |
829 | */ | |
830 | static void cx231xx_bulk_irq_callback(struct urb *urb) | |
831 | { | |
832 | struct cx231xx_dmaqueue *dma_q = urb->context; | |
833 | struct cx231xx_video_mode *vmode = | |
834 | container_of(dma_q, struct cx231xx_video_mode, vidq); | |
835 | struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); | |
aa53bf0b | 836 | unsigned long flags; |
64fbf444 PB |
837 | |
838 | switch (urb->status) { | |
839 | case 0: /* success */ | |
840 | case -ETIMEDOUT: /* NAK */ | |
841 | break; | |
842 | case -ECONNRESET: /* kill */ | |
843 | case -ENOENT: | |
844 | case -ESHUTDOWN: | |
845 | return; | |
69b17abf TH |
846 | case -EPIPE: /* stall */ |
847 | cx231xx_isocdbg("urb completion error - device is stalled.\n"); | |
848 | return; | |
64fbf444 | 849 | default: /* error */ |
69b17abf | 850 | cx231xx_isocdbg("urb completion error %d.\n", urb->status); |
64fbf444 PB |
851 | break; |
852 | } | |
853 | ||
854 | /* Copy data from URB */ | |
aa53bf0b | 855 | spin_lock_irqsave(&dev->video_mode.slock, flags); |
da983503 | 856 | dev->video_mode.bulk_ctl.bulk_copy(dev, urb); |
aa53bf0b | 857 | spin_unlock_irqrestore(&dev->video_mode.slock, flags); |
e0d3bafd | 858 | |
64fbf444 | 859 | /* Reset urb buffers */ |
64fbf444 PB |
860 | urb->status = usb_submit_urb(urb, GFP_ATOMIC); |
861 | if (urb->status) { | |
862 | cx231xx_isocdbg("urb resubmit failed (error=%i)\n", | |
863 | urb->status); | |
864 | } | |
865 | } | |
e0d3bafd SD |
866 | /* |
867 | * Stop and Deallocate URBs | |
868 | */ | |
869 | void cx231xx_uninit_isoc(struct cx231xx *dev) | |
870 | { | |
64fbf444 | 871 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; |
e0d3bafd SD |
872 | struct urb *urb; |
873 | int i; | |
69b17abf | 874 | bool broken_pipe = false; |
e0d3bafd SD |
875 | |
876 | cx231xx_isocdbg("cx231xx: called cx231xx_uninit_isoc\n"); | |
877 | ||
878 | dev->video_mode.isoc_ctl.nfields = -1; | |
879 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
880 | urb = dev->video_mode.isoc_ctl.urb[i]; | |
881 | if (urb) { | |
84b5dbf3 MCC |
882 | if (!irqs_disabled()) |
883 | usb_kill_urb(urb); | |
884 | else | |
885 | usb_unlink_urb(urb); | |
e0d3bafd SD |
886 | |
887 | if (dev->video_mode.isoc_ctl.transfer_buffer[i]) { | |
997ea58e DM |
888 | usb_free_coherent(dev->udev, |
889 | urb->transfer_buffer_length, | |
890 | dev->video_mode.isoc_ctl. | |
891 | transfer_buffer[i], | |
892 | urb->transfer_dma); | |
e0d3bafd | 893 | } |
69b17abf TH |
894 | if (urb->status == -EPIPE) { |
895 | broken_pipe = true; | |
896 | } | |
e0d3bafd SD |
897 | usb_free_urb(urb); |
898 | dev->video_mode.isoc_ctl.urb[i] = NULL; | |
899 | } | |
900 | dev->video_mode.isoc_ctl.transfer_buffer[i] = NULL; | |
901 | } | |
902 | ||
69b17abf TH |
903 | if (broken_pipe) { |
904 | cx231xx_isocdbg("Reset endpoint to recover broken pipe."); | |
905 | usb_reset_endpoint(dev->udev, dev->video_mode.end_point_addr); | |
906 | } | |
e0d3bafd SD |
907 | kfree(dev->video_mode.isoc_ctl.urb); |
908 | kfree(dev->video_mode.isoc_ctl.transfer_buffer); | |
64fbf444 | 909 | kfree(dma_q->p_left_data); |
e0d3bafd SD |
910 | |
911 | dev->video_mode.isoc_ctl.urb = NULL; | |
912 | dev->video_mode.isoc_ctl.transfer_buffer = NULL; | |
913 | dev->video_mode.isoc_ctl.num_bufs = 0; | |
64fbf444 PB |
914 | dma_q->p_left_data = NULL; |
915 | ||
916 | if (dev->mode_tv == 0) | |
917 | cx231xx_capture_start(dev, 0, Raw_Video); | |
918 | else | |
919 | cx231xx_capture_start(dev, 0, TS1_serial_mode); | |
920 | ||
e0d3bafd | 921 | |
e0d3bafd SD |
922 | } |
923 | EXPORT_SYMBOL_GPL(cx231xx_uninit_isoc); | |
924 | ||
64fbf444 PB |
925 | /* |
926 | * Stop and Deallocate URBs | |
927 | */ | |
928 | void cx231xx_uninit_bulk(struct cx231xx *dev) | |
929 | { | |
ce3556bd | 930 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; |
64fbf444 PB |
931 | struct urb *urb; |
932 | int i; | |
69b17abf | 933 | bool broken_pipe = false; |
64fbf444 PB |
934 | |
935 | cx231xx_isocdbg("cx231xx: called cx231xx_uninit_bulk\n"); | |
936 | ||
937 | dev->video_mode.bulk_ctl.nfields = -1; | |
938 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
939 | urb = dev->video_mode.bulk_ctl.urb[i]; | |
940 | if (urb) { | |
941 | if (!irqs_disabled()) | |
942 | usb_kill_urb(urb); | |
943 | else | |
944 | usb_unlink_urb(urb); | |
945 | ||
946 | if (dev->video_mode.bulk_ctl.transfer_buffer[i]) { | |
947 | usb_free_coherent(dev->udev, | |
948 | urb->transfer_buffer_length, | |
ce3556bd | 949 | dev->video_mode.bulk_ctl. |
64fbf444 PB |
950 | transfer_buffer[i], |
951 | urb->transfer_dma); | |
952 | } | |
69b17abf TH |
953 | if (urb->status == -EPIPE) { |
954 | broken_pipe = true; | |
955 | } | |
64fbf444 PB |
956 | usb_free_urb(urb); |
957 | dev->video_mode.bulk_ctl.urb[i] = NULL; | |
958 | } | |
959 | dev->video_mode.bulk_ctl.transfer_buffer[i] = NULL; | |
960 | } | |
961 | ||
69b17abf TH |
962 | if (broken_pipe) { |
963 | cx231xx_isocdbg("Reset endpoint to recover broken pipe."); | |
964 | usb_reset_endpoint(dev->udev, dev->video_mode.end_point_addr); | |
965 | } | |
64fbf444 PB |
966 | kfree(dev->video_mode.bulk_ctl.urb); |
967 | kfree(dev->video_mode.bulk_ctl.transfer_buffer); | |
ce3556bd | 968 | kfree(dma_q->p_left_data); |
64fbf444 PB |
969 | |
970 | dev->video_mode.bulk_ctl.urb = NULL; | |
971 | dev->video_mode.bulk_ctl.transfer_buffer = NULL; | |
972 | dev->video_mode.bulk_ctl.num_bufs = 0; | |
ce3556bd | 973 | dma_q->p_left_data = NULL; |
64fbf444 PB |
974 | |
975 | if (dev->mode_tv == 0) | |
976 | cx231xx_capture_start(dev, 0, Raw_Video); | |
977 | else | |
978 | cx231xx_capture_start(dev, 0, TS1_serial_mode); | |
979 | ||
980 | ||
981 | } | |
982 | EXPORT_SYMBOL_GPL(cx231xx_uninit_bulk); | |
983 | ||
e0d3bafd SD |
984 | /* |
985 | * Allocate URBs and start IRQ | |
986 | */ | |
987 | int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, | |
84b5dbf3 | 988 | int num_bufs, int max_pkt_size, |
b9255176 | 989 | int (*isoc_copy) (struct cx231xx *dev, struct urb *urb)) |
e0d3bafd SD |
990 | { |
991 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; | |
992 | int i; | |
993 | int sb_size, pipe; | |
994 | struct urb *urb; | |
995 | int j, k; | |
996 | int rc; | |
997 | ||
e0d3bafd SD |
998 | /* De-allocates all pending stuff */ |
999 | cx231xx_uninit_isoc(dev); | |
1000 | ||
64fbf444 | 1001 | dma_q->p_left_data = kzalloc(4096, GFP_KERNEL); |
ed0e3729 | 1002 | if (dma_q->p_left_data == NULL) |
64fbf444 | 1003 | return -ENOMEM; |
64fbf444 | 1004 | |
e0d3bafd SD |
1005 | dev->video_mode.isoc_ctl.isoc_copy = isoc_copy; |
1006 | dev->video_mode.isoc_ctl.num_bufs = num_bufs; | |
84b5dbf3 MCC |
1007 | dma_q->pos = 0; |
1008 | dma_q->is_partial_line = 0; | |
1009 | dma_q->last_sav = 0; | |
1010 | dma_q->current_field = -1; | |
1011 | dma_q->field1_done = 0; | |
1012 | dma_q->lines_per_field = dev->height / 2; | |
1013 | dma_q->bytes_left_in_line = dev->width << 1; | |
1014 | dma_q->lines_completed = 0; | |
64fbf444 PB |
1015 | dma_q->mpeg_buffer_done = 0; |
1016 | dma_q->left_data_count = 0; | |
1017 | dma_q->mpeg_buffer_completed = 0; | |
1018 | dma_q->add_ps_package_head = CX231XX_NEED_ADD_PS_PACKAGE_HEAD; | |
1019 | dma_q->ps_head[0] = 0x00; | |
1020 | dma_q->ps_head[1] = 0x00; | |
1021 | dma_q->ps_head[2] = 0x01; | |
1022 | dma_q->ps_head[3] = 0xBA; | |
84b5dbf3 MCC |
1023 | for (i = 0; i < 8; i++) |
1024 | dma_q->partial_buf[i] = 0; | |
1025 | ||
1026 | dev->video_mode.isoc_ctl.urb = | |
6396bb22 | 1027 | kcalloc(num_bufs, sizeof(void *), GFP_KERNEL); |
e0d3bafd | 1028 | if (!dev->video_mode.isoc_ctl.urb) { |
336fea92 | 1029 | dev_err(dev->dev, |
b7085c08 | 1030 | "cannot alloc memory for usb buffers\n"); |
e0d3bafd SD |
1031 | return -ENOMEM; |
1032 | } | |
1033 | ||
84b5dbf3 | 1034 | dev->video_mode.isoc_ctl.transfer_buffer = |
6396bb22 | 1035 | kcalloc(num_bufs, sizeof(void *), GFP_KERNEL); |
e0d3bafd | 1036 | if (!dev->video_mode.isoc_ctl.transfer_buffer) { |
336fea92 | 1037 | dev_err(dev->dev, |
b7085c08 | 1038 | "cannot allocate memory for usbtransfer\n"); |
e0d3bafd SD |
1039 | kfree(dev->video_mode.isoc_ctl.urb); |
1040 | return -ENOMEM; | |
1041 | } | |
1042 | ||
1043 | dev->video_mode.isoc_ctl.max_pkt_size = max_pkt_size; | |
1044 | dev->video_mode.isoc_ctl.buf = NULL; | |
1045 | ||
1046 | sb_size = max_packets * dev->video_mode.isoc_ctl.max_pkt_size; | |
1047 | ||
64fbf444 PB |
1048 | if (dev->mode_tv == 1) |
1049 | dev->video_mode.end_point_addr = 0x81; | |
1050 | else | |
1051 | dev->video_mode.end_point_addr = 0x84; | |
1052 | ||
1053 | ||
e0d3bafd SD |
1054 | /* allocate urbs and transfer buffers */ |
1055 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
1056 | urb = usb_alloc_urb(max_packets, GFP_KERNEL); | |
1057 | if (!urb) { | |
e0d3bafd SD |
1058 | cx231xx_uninit_isoc(dev); |
1059 | return -ENOMEM; | |
1060 | } | |
1061 | dev->video_mode.isoc_ctl.urb[i] = urb; | |
1062 | ||
84b5dbf3 | 1063 | dev->video_mode.isoc_ctl.transfer_buffer[i] = |
997ea58e DM |
1064 | usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, |
1065 | &urb->transfer_dma); | |
e0d3bafd | 1066 | if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) { |
336fea92 | 1067 | dev_err(dev->dev, |
b7085c08 | 1068 | "unable to allocate %i bytes for transfer buffer %i%s\n", |
ed0e3729 MCC |
1069 | sb_size, i, |
1070 | in_interrupt() ? " while in int" : ""); | |
e0d3bafd SD |
1071 | cx231xx_uninit_isoc(dev); |
1072 | return -ENOMEM; | |
1073 | } | |
1074 | memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size); | |
1075 | ||
84b5dbf3 MCC |
1076 | pipe = |
1077 | usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr); | |
e0d3bafd SD |
1078 | |
1079 | usb_fill_int_urb(urb, dev->udev, pipe, | |
84b5dbf3 | 1080 | dev->video_mode.isoc_ctl.transfer_buffer[i], |
64fbf444 | 1081 | sb_size, cx231xx_isoc_irq_callback, dma_q, 1); |
e0d3bafd SD |
1082 | |
1083 | urb->number_of_packets = max_packets; | |
7a6f6c29 | 1084 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; |
e0d3bafd SD |
1085 | |
1086 | k = 0; | |
1087 | for (j = 0; j < max_packets; j++) { | |
1088 | urb->iso_frame_desc[j].offset = k; | |
1089 | urb->iso_frame_desc[j].length = | |
84b5dbf3 | 1090 | dev->video_mode.isoc_ctl.max_pkt_size; |
e0d3bafd SD |
1091 | k += dev->video_mode.isoc_ctl.max_pkt_size; |
1092 | } | |
1093 | } | |
1094 | ||
1095 | init_waitqueue_head(&dma_q->wq); | |
1096 | ||
e0d3bafd SD |
1097 | /* submit urbs and enables IRQ */ |
1098 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
84b5dbf3 MCC |
1099 | rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i], |
1100 | GFP_ATOMIC); | |
e0d3bafd | 1101 | if (rc) { |
336fea92 | 1102 | dev_err(dev->dev, |
b7085c08 | 1103 | "submit of urb %i failed (error=%i)\n", i, |
ed0e3729 | 1104 | rc); |
e0d3bafd SD |
1105 | cx231xx_uninit_isoc(dev); |
1106 | return rc; | |
1107 | } | |
1108 | } | |
1109 | ||
64fbf444 PB |
1110 | if (dev->mode_tv == 0) |
1111 | cx231xx_capture_start(dev, 1, Raw_Video); | |
1112 | else | |
1113 | cx231xx_capture_start(dev, 1, TS1_serial_mode); | |
e0d3bafd SD |
1114 | |
1115 | return 0; | |
1116 | } | |
1117 | EXPORT_SYMBOL_GPL(cx231xx_init_isoc); | |
1118 | ||
64fbf444 PB |
1119 | /* |
1120 | * Allocate URBs and start IRQ | |
1121 | */ | |
1122 | int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, | |
1123 | int num_bufs, int max_pkt_size, | |
1124 | int (*bulk_copy) (struct cx231xx *dev, struct urb *urb)) | |
1125 | { | |
1126 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; | |
1127 | int i; | |
1128 | int sb_size, pipe; | |
1129 | struct urb *urb; | |
1130 | int rc; | |
1131 | ||
1132 | dev->video_input = dev->video_input > 2 ? 2 : dev->video_input; | |
1133 | ||
d5a1754d DH |
1134 | cx231xx_coredbg("Setting Video mux to %d\n", dev->video_input); |
1135 | ||
64fbf444 PB |
1136 | video_mux(dev, dev->video_input); |
1137 | ||
1138 | /* De-allocates all pending stuff */ | |
1139 | cx231xx_uninit_bulk(dev); | |
1140 | ||
1141 | dev->video_mode.bulk_ctl.bulk_copy = bulk_copy; | |
1142 | dev->video_mode.bulk_ctl.num_bufs = num_bufs; | |
1143 | dma_q->pos = 0; | |
1144 | dma_q->is_partial_line = 0; | |
1145 | dma_q->last_sav = 0; | |
1146 | dma_q->current_field = -1; | |
1147 | dma_q->field1_done = 0; | |
1148 | dma_q->lines_per_field = dev->height / 2; | |
1149 | dma_q->bytes_left_in_line = dev->width << 1; | |
1150 | dma_q->lines_completed = 0; | |
1151 | dma_q->mpeg_buffer_done = 0; | |
1152 | dma_q->left_data_count = 0; | |
1153 | dma_q->mpeg_buffer_completed = 0; | |
1154 | dma_q->ps_head[0] = 0x00; | |
1155 | dma_q->ps_head[1] = 0x00; | |
1156 | dma_q->ps_head[2] = 0x01; | |
1157 | dma_q->ps_head[3] = 0xBA; | |
1158 | for (i = 0; i < 8; i++) | |
1159 | dma_q->partial_buf[i] = 0; | |
1160 | ||
1161 | dev->video_mode.bulk_ctl.urb = | |
6396bb22 | 1162 | kcalloc(num_bufs, sizeof(void *), GFP_KERNEL); |
64fbf444 | 1163 | if (!dev->video_mode.bulk_ctl.urb) { |
336fea92 | 1164 | dev_err(dev->dev, |
b7085c08 | 1165 | "cannot alloc memory for usb buffers\n"); |
64fbf444 PB |
1166 | return -ENOMEM; |
1167 | } | |
1168 | ||
1169 | dev->video_mode.bulk_ctl.transfer_buffer = | |
6396bb22 | 1170 | kcalloc(num_bufs, sizeof(void *), GFP_KERNEL); |
64fbf444 | 1171 | if (!dev->video_mode.bulk_ctl.transfer_buffer) { |
336fea92 | 1172 | dev_err(dev->dev, |
b7085c08 | 1173 | "cannot allocate memory for usbtransfer\n"); |
64fbf444 PB |
1174 | kfree(dev->video_mode.bulk_ctl.urb); |
1175 | return -ENOMEM; | |
1176 | } | |
1177 | ||
1178 | dev->video_mode.bulk_ctl.max_pkt_size = max_pkt_size; | |
1179 | dev->video_mode.bulk_ctl.buf = NULL; | |
1180 | ||
1181 | sb_size = max_packets * dev->video_mode.bulk_ctl.max_pkt_size; | |
1182 | ||
1183 | if (dev->mode_tv == 1) | |
1184 | dev->video_mode.end_point_addr = 0x81; | |
1185 | else | |
1186 | dev->video_mode.end_point_addr = 0x84; | |
1187 | ||
1188 | ||
1189 | /* allocate urbs and transfer buffers */ | |
1190 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
1191 | urb = usb_alloc_urb(0, GFP_KERNEL); | |
1192 | if (!urb) { | |
64fbf444 PB |
1193 | cx231xx_uninit_bulk(dev); |
1194 | return -ENOMEM; | |
1195 | } | |
1196 | dev->video_mode.bulk_ctl.urb[i] = urb; | |
7a6f6c29 | 1197 | urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; |
64fbf444 PB |
1198 | |
1199 | dev->video_mode.bulk_ctl.transfer_buffer[i] = | |
1200 | usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, | |
1201 | &urb->transfer_dma); | |
1202 | if (!dev->video_mode.bulk_ctl.transfer_buffer[i]) { | |
336fea92 | 1203 | dev_err(dev->dev, |
b7085c08 | 1204 | "unable to allocate %i bytes for transfer buffer %i%s\n", |
ed0e3729 MCC |
1205 | sb_size, i, |
1206 | in_interrupt() ? " while in int" : ""); | |
64fbf444 PB |
1207 | cx231xx_uninit_bulk(dev); |
1208 | return -ENOMEM; | |
1209 | } | |
1210 | memset(dev->video_mode.bulk_ctl.transfer_buffer[i], 0, sb_size); | |
1211 | ||
1212 | pipe = usb_rcvbulkpipe(dev->udev, | |
1213 | dev->video_mode.end_point_addr); | |
1214 | usb_fill_bulk_urb(urb, dev->udev, pipe, | |
1215 | dev->video_mode.bulk_ctl.transfer_buffer[i], | |
1216 | sb_size, cx231xx_bulk_irq_callback, dma_q); | |
1217 | } | |
1218 | ||
ce3556bd TH |
1219 | /* clear halt */ |
1220 | rc = usb_clear_halt(dev->udev, dev->video_mode.bulk_ctl.urb[0]->pipe); | |
1221 | if (rc < 0) { | |
1222 | dev_err(dev->dev, | |
1223 | "failed to clear USB bulk endpoint stall/halt condition (error=%i)\n", | |
1224 | rc); | |
1225 | cx231xx_uninit_bulk(dev); | |
1226 | return rc; | |
1227 | } | |
1228 | ||
64fbf444 PB |
1229 | init_waitqueue_head(&dma_q->wq); |
1230 | ||
1231 | /* submit urbs and enables IRQ */ | |
1232 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
1233 | rc = usb_submit_urb(dev->video_mode.bulk_ctl.urb[i], | |
1234 | GFP_ATOMIC); | |
1235 | if (rc) { | |
336fea92 | 1236 | dev_err(dev->dev, |
b7085c08 | 1237 | "submit of urb %i failed (error=%i)\n", i, rc); |
64fbf444 PB |
1238 | cx231xx_uninit_bulk(dev); |
1239 | return rc; | |
1240 | } | |
1241 | } | |
1242 | ||
1243 | if (dev->mode_tv == 0) | |
1244 | cx231xx_capture_start(dev, 1, Raw_Video); | |
1245 | else | |
1246 | cx231xx_capture_start(dev, 1, TS1_serial_mode); | |
1247 | ||
1248 | return 0; | |
1249 | } | |
1250 | EXPORT_SYMBOL_GPL(cx231xx_init_bulk); | |
1251 | void cx231xx_stop_TS1(struct cx231xx *dev) | |
1252 | { | |
64fbf444 PB |
1253 | u8 val[4] = { 0, 0, 0, 0 }; |
1254 | ||
da983503 HV |
1255 | val[0] = 0x00; |
1256 | val[1] = 0x03; | |
1257 | val[2] = 0x00; | |
1258 | val[3] = 0x00; | |
1259 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1260 | TS_MODE_REG, val, 4); | |
1261 | ||
1262 | val[0] = 0x00; | |
1263 | val[1] = 0x70; | |
1264 | val[2] = 0x04; | |
1265 | val[3] = 0x00; | |
1266 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1267 | TS1_CFG_REG, val, 4); | |
64fbf444 PB |
1268 | } |
1269 | /* EXPORT_SYMBOL_GPL(cx231xx_stop_TS1); */ | |
1270 | void cx231xx_start_TS1(struct cx231xx *dev) | |
1271 | { | |
64fbf444 PB |
1272 | u8 val[4] = { 0, 0, 0, 0 }; |
1273 | ||
da983503 HV |
1274 | val[0] = 0x03; |
1275 | val[1] = 0x03; | |
1276 | val[2] = 0x00; | |
1277 | val[3] = 0x00; | |
1278 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1279 | TS_MODE_REG, val, 4); | |
1280 | ||
1281 | val[0] = 0x04; | |
1282 | val[1] = 0xA3; | |
1283 | val[2] = 0x3B; | |
1284 | val[3] = 0x00; | |
1285 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1286 | TS1_CFG_REG, val, 4); | |
64fbf444 PB |
1287 | } |
1288 | /* EXPORT_SYMBOL_GPL(cx231xx_start_TS1); */ | |
b9255176 SD |
1289 | /***************************************************************** |
1290 | * Device Init/UnInit functions * | |
1291 | ******************************************************************/ | |
e0d3bafd SD |
1292 | int cx231xx_dev_init(struct cx231xx *dev) |
1293 | { | |
84b5dbf3 | 1294 | int errCode = 0; |
e0d3bafd | 1295 | |
84b5dbf3 | 1296 | /* Initialize I2C bus */ |
e0d3bafd SD |
1297 | |
1298 | /* External Master 1 Bus */ | |
1299 | dev->i2c_bus[0].nr = 0; | |
1300 | dev->i2c_bus[0].dev = dev; | |
1a50fdde | 1301 | dev->i2c_bus[0].i2c_period = I2C_SPEED_100K; /* 100 KHz */ |
84b5dbf3 MCC |
1302 | dev->i2c_bus[0].i2c_nostop = 0; |
1303 | dev->i2c_bus[0].i2c_reserve = 0; | |
8e2803ff | 1304 | dev->i2c_bus[0].i2c_rc = -ENODEV; |
e0d3bafd SD |
1305 | |
1306 | /* External Master 2 Bus */ | |
1307 | dev->i2c_bus[1].nr = 1; | |
1308 | dev->i2c_bus[1].dev = dev; | |
1a50fdde | 1309 | dev->i2c_bus[1].i2c_period = I2C_SPEED_100K; /* 100 KHz */ |
84b5dbf3 MCC |
1310 | dev->i2c_bus[1].i2c_nostop = 0; |
1311 | dev->i2c_bus[1].i2c_reserve = 0; | |
8e2803ff | 1312 | dev->i2c_bus[1].i2c_rc = -ENODEV; |
e0d3bafd SD |
1313 | |
1314 | /* Internal Master 3 Bus */ | |
1315 | dev->i2c_bus[2].nr = 2; | |
1316 | dev->i2c_bus[2].dev = dev; | |
9ab66912 | 1317 | dev->i2c_bus[2].i2c_period = I2C_SPEED_100K; /* 100kHz */ |
84b5dbf3 MCC |
1318 | dev->i2c_bus[2].i2c_nostop = 0; |
1319 | dev->i2c_bus[2].i2c_reserve = 0; | |
8e2803ff | 1320 | dev->i2c_bus[2].i2c_rc = -ENODEV; |
e0d3bafd | 1321 | |
84b5dbf3 | 1322 | /* register I2C buses */ |
461af077 MCC |
1323 | errCode = cx231xx_i2c_register(&dev->i2c_bus[0]); |
1324 | if (errCode < 0) | |
1325 | return errCode; | |
1326 | errCode = cx231xx_i2c_register(&dev->i2c_bus[1]); | |
1327 | if (errCode < 0) | |
1328 | return errCode; | |
1329 | errCode = cx231xx_i2c_register(&dev->i2c_bus[2]); | |
1330 | if (errCode < 0) | |
1331 | return errCode; | |
e0d3bafd | 1332 | |
05e0dfd0 | 1333 | errCode = cx231xx_i2c_mux_create(dev); |
461af077 MCC |
1334 | if (errCode < 0) { |
1335 | dev_err(dev->dev, | |
1336 | "%s: Failed to create I2C mux\n", __func__); | |
1337 | return errCode; | |
1338 | } | |
1339 | errCode = cx231xx_i2c_mux_register(dev, 0); | |
1340 | if (errCode < 0) | |
1341 | return errCode; | |
1342 | ||
1343 | errCode = cx231xx_i2c_mux_register(dev, 1); | |
05e0dfd0 PR |
1344 | if (errCode < 0) |
1345 | return errCode; | |
15c212dd | 1346 | |
e4de03f2 MS |
1347 | /* scan the real bus segments in the order of physical port numbers */ |
1348 | cx231xx_do_i2c_scan(dev, I2C_0); | |
1349 | cx231xx_do_i2c_scan(dev, I2C_1_MUX_1); | |
1350 | cx231xx_do_i2c_scan(dev, I2C_2); | |
1351 | cx231xx_do_i2c_scan(dev, I2C_1_MUX_3); | |
1352 | ||
84b5dbf3 | 1353 | /* init hardware */ |
b9255176 | 1354 | /* Note : with out calling set power mode function, |
ecc67d10 | 1355 | afe can not be set up correctly */ |
2f861387 | 1356 | if (dev->board.external_av) { |
64fbf444 PB |
1357 | errCode = cx231xx_set_power_mode(dev, |
1358 | POLARIS_AVMODE_ENXTERNAL_AV); | |
1359 | if (errCode < 0) { | |
336fea92 | 1360 | dev_err(dev->dev, |
b7085c08 | 1361 | "%s: Failed to set Power - errCode [%d]!\n", |
ed0e3729 | 1362 | __func__, errCode); |
64fbf444 PB |
1363 | return errCode; |
1364 | } | |
1365 | } else { | |
1366 | errCode = cx231xx_set_power_mode(dev, | |
1367 | POLARIS_AVMODE_ANALOGT_TV); | |
1368 | if (errCode < 0) { | |
336fea92 | 1369 | dev_err(dev->dev, |
b7085c08 | 1370 | "%s: Failed to set Power - errCode [%d]!\n", |
ed0e3729 | 1371 | __func__, errCode); |
64fbf444 PB |
1372 | return errCode; |
1373 | } | |
e0d3bafd SD |
1374 | } |
1375 | ||
2f861387 MCC |
1376 | /* reset the Tuner, if it is a Xceive tuner */ |
1377 | if ((dev->board.tuner_type == TUNER_XC5000) || | |
1378 | (dev->board.tuner_type == TUNER_XC2028)) | |
64fbf444 PB |
1379 | cx231xx_gpio_set(dev, dev->board.tuner_gpio); |
1380 | ||
84b5dbf3 | 1381 | /* initialize Colibri block */ |
ecc67d10 | 1382 | errCode = cx231xx_afe_init_super_block(dev, 0x23c); |
e0d3bafd | 1383 | if (errCode < 0) { |
336fea92 | 1384 | dev_err(dev->dev, |
b7085c08 | 1385 | "%s: cx231xx_afe init super block - errCode [%d]!\n", |
ed0e3729 | 1386 | __func__, errCode); |
e0d3bafd SD |
1387 | return errCode; |
1388 | } | |
ecc67d10 | 1389 | errCode = cx231xx_afe_init_channels(dev); |
84b5dbf3 | 1390 | if (errCode < 0) { |
336fea92 | 1391 | dev_err(dev->dev, |
b7085c08 | 1392 | "%s: cx231xx_afe init channels - errCode [%d]!\n", |
ed0e3729 | 1393 | __func__, errCode); |
e0d3bafd SD |
1394 | return errCode; |
1395 | } | |
1396 | ||
84b5dbf3 MCC |
1397 | /* Set DIF in By pass mode */ |
1398 | errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); | |
1399 | if (errCode < 0) { | |
336fea92 | 1400 | dev_err(dev->dev, |
b7085c08 | 1401 | "%s: cx231xx_dif set to By pass mode - errCode [%d]!\n", |
ed0e3729 | 1402 | __func__, errCode); |
e0d3bafd SD |
1403 | return errCode; |
1404 | } | |
1405 | ||
ecc67d10 SD |
1406 | /* I2S block related functions */ |
1407 | errCode = cx231xx_i2s_blk_initialize(dev); | |
84b5dbf3 | 1408 | if (errCode < 0) { |
336fea92 | 1409 | dev_err(dev->dev, |
b7085c08 | 1410 | "%s: cx231xx_i2s block initialize - errCode [%d]!\n", |
ed0e3729 | 1411 | __func__, errCode); |
e0d3bafd SD |
1412 | return errCode; |
1413 | } | |
1414 | ||
84b5dbf3 MCC |
1415 | /* init control pins */ |
1416 | errCode = cx231xx_init_ctrl_pin_status(dev); | |
1417 | if (errCode < 0) { | |
336fea92 | 1418 | dev_err(dev->dev, |
b7085c08 | 1419 | "%s: cx231xx_init ctrl pins - errCode [%d]!\n", |
ed0e3729 | 1420 | __func__, errCode); |
e0d3bafd SD |
1421 | return errCode; |
1422 | } | |
1423 | ||
84b5dbf3 | 1424 | /* set AGC mode to Analog */ |
64fbf444 PB |
1425 | switch (dev->model) { |
1426 | case CX231XX_BOARD_CNXT_CARRAERA: | |
1427 | case CX231XX_BOARD_CNXT_RDE_250: | |
1428 | case CX231XX_BOARD_CNXT_SHELBY: | |
1429 | case CX231XX_BOARD_CNXT_RDU_250: | |
84b5dbf3 | 1430 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); |
64fbf444 PB |
1431 | break; |
1432 | case CX231XX_BOARD_CNXT_RDE_253S: | |
1433 | case CX231XX_BOARD_CNXT_RDU_253S: | |
1a50fdde | 1434 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 1435 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
9417bc6d | 1436 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
de8ae0d5 PM |
1437 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: |
1438 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | |
64fbf444 PB |
1439 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
1440 | break; | |
1441 | default: | |
1442 | break; | |
1443 | } | |
84b5dbf3 | 1444 | if (errCode < 0) { |
336fea92 | 1445 | dev_err(dev->dev, |
b7085c08 | 1446 | "%s: cx231xx_AGC mode to Analog - errCode [%d]!\n", |
ed0e3729 | 1447 | __func__, errCode); |
e0d3bafd SD |
1448 | return errCode; |
1449 | } | |
1450 | ||
84b5dbf3 MCC |
1451 | /* set all alternate settings to zero initially */ |
1452 | cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0); | |
1453 | cx231xx_set_alt_setting(dev, INDEX_VANC, 0); | |
1454 | cx231xx_set_alt_setting(dev, INDEX_HANC, 0); | |
1455 | if (dev->board.has_dvb) | |
1456 | cx231xx_set_alt_setting(dev, INDEX_TS1, 0); | |
e0d3bafd | 1457 | |
660acd54 | 1458 | errCode = 0; |
e0d3bafd SD |
1459 | return errCode; |
1460 | } | |
1461 | EXPORT_SYMBOL_GPL(cx231xx_dev_init); | |
1462 | ||
1463 | void cx231xx_dev_uninit(struct cx231xx *dev) | |
1464 | { | |
84b5dbf3 | 1465 | /* Un Initialize I2C bus */ |
05e0dfd0 | 1466 | cx231xx_i2c_mux_unregister(dev); |
e0d3bafd SD |
1467 | cx231xx_i2c_unregister(&dev->i2c_bus[2]); |
1468 | cx231xx_i2c_unregister(&dev->i2c_bus[1]); | |
1469 | cx231xx_i2c_unregister(&dev->i2c_bus[0]); | |
1470 | } | |
84b5dbf3 | 1471 | EXPORT_SYMBOL_GPL(cx231xx_dev_uninit); |
e0d3bafd | 1472 | |
b9255176 SD |
1473 | /***************************************************************** |
1474 | * G P I O related functions * | |
1475 | ******************************************************************/ | |
64fbf444 | 1476 | int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, |
84b5dbf3 | 1477 | u8 len, u8 request, u8 direction) |
e0d3bafd | 1478 | { |
84b5dbf3 | 1479 | int status = 0; |
b9255176 | 1480 | struct VENDOR_REQUEST_IN ven_req; |
84b5dbf3 MCC |
1481 | |
1482 | /* Set wValue */ | |
1483 | ven_req.wValue = (u16) (gpio_bit >> 16 & 0xffff); | |
1484 | ||
1485 | /* set request */ | |
1486 | if (!request) { | |
1487 | if (direction) | |
7adc7998 | 1488 | ven_req.bRequest = VRT_GET_GPIO; /* 0x9 gpio */ |
84b5dbf3 | 1489 | else |
7adc7998 | 1490 | ven_req.bRequest = VRT_SET_GPIO; /* 0x8 gpio */ |
84b5dbf3 MCC |
1491 | } else { |
1492 | if (direction) | |
7adc7998 | 1493 | ven_req.bRequest = VRT_GET_GPIE; /* 0xb gpie */ |
84b5dbf3 | 1494 | else |
7adc7998 | 1495 | ven_req.bRequest = VRT_SET_GPIE; /* 0xa gpie */ |
84b5dbf3 | 1496 | } |
e0d3bafd | 1497 | |
84b5dbf3 MCC |
1498 | /* set index value */ |
1499 | ven_req.wIndex = (u16) (gpio_bit & 0xffff); | |
e0d3bafd | 1500 | |
84b5dbf3 MCC |
1501 | /* set wLength value */ |
1502 | ven_req.wLength = len; | |
e0d3bafd | 1503 | |
84b5dbf3 MCC |
1504 | /* set bData value */ |
1505 | ven_req.bData = 0; | |
e0d3bafd | 1506 | |
84b5dbf3 MCC |
1507 | /* set the buffer for read / write */ |
1508 | ven_req.pBuff = gpio_val; | |
1509 | ||
1510 | /* set the direction */ | |
1511 | if (direction) { | |
1512 | ven_req.direction = USB_DIR_IN; | |
1513 | memset(ven_req.pBuff, 0x00, ven_req.wLength); | |
1514 | } else | |
1515 | ven_req.direction = USB_DIR_OUT; | |
1516 | ||
1517 | ||
1518 | /* call common vendor command request */ | |
1519 | status = cx231xx_send_vendor_cmd(dev, &ven_req); | |
1520 | if (status < 0) { | |
336fea92 | 1521 | dev_err(dev->dev, "%s: failed with status -%d\n", |
ed0e3729 | 1522 | __func__, status); |
84b5dbf3 | 1523 | } |
e0d3bafd | 1524 | |
84b5dbf3 | 1525 | return status; |
e0d3bafd | 1526 | } |
e0d3bafd SD |
1527 | EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd); |
1528 | ||
b9255176 SD |
1529 | /***************************************************************** |
1530 | * C O N T R O L - Register R E A D / W R I T E functions * | |
1531 | *****************************************************************/ | |
e0d3bafd SD |
1532 | int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode) |
1533 | { | |
84b5dbf3 MCC |
1534 | u8 value[4] = { 0x0, 0x0, 0x0, 0x0 }; |
1535 | u32 tmp = 0; | |
1536 | int status = 0; | |
e0d3bafd | 1537 | |
84b5dbf3 MCC |
1538 | status = |
1539 | cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, address, value, 4); | |
1540 | if (status < 0) | |
1541 | return status; | |
e0d3bafd | 1542 | |
3f9280a8 | 1543 | tmp = le32_to_cpu(*((__le32 *) value)); |
84b5dbf3 | 1544 | tmp |= mode; |
e0d3bafd | 1545 | |
84b5dbf3 MCC |
1546 | value[0] = (u8) tmp; |
1547 | value[1] = (u8) (tmp >> 8); | |
1548 | value[2] = (u8) (tmp >> 16); | |
1549 | value[3] = (u8) (tmp >> 24); | |
e0d3bafd | 1550 | |
84b5dbf3 MCC |
1551 | status = |
1552 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, address, value, 4); | |
e0d3bafd | 1553 | |
84b5dbf3 | 1554 | return status; |
e0d3bafd SD |
1555 | } |
1556 | ||
b9255176 SD |
1557 | /***************************************************************** |
1558 | * I 2 C Internal C O N T R O L functions * | |
1559 | *****************************************************************/ | |
64fbf444 PB |
1560 | int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
1561 | u8 saddr_len, u32 *data, u8 data_len, int master) | |
1562 | { | |
1563 | int status = 0; | |
1564 | struct cx231xx_i2c_xfer_data req_data; | |
1565 | u8 value[64] = "0"; | |
1566 | ||
1567 | if (saddr_len == 0) | |
1568 | saddr = 0; | |
fe041646 | 1569 | else if (saddr_len == 1) |
64fbf444 PB |
1570 | saddr &= 0xff; |
1571 | ||
1572 | /* prepare xfer_data struct */ | |
1573 | req_data.dev_addr = dev_addr >> 1; | |
1574 | req_data.direction = I2C_M_RD; | |
1575 | req_data.saddr_len = saddr_len; | |
1576 | req_data.saddr_dat = saddr; | |
1577 | req_data.buf_size = data_len; | |
1578 | req_data.p_buffer = (u8 *) value; | |
1579 | ||
1580 | /* usb send command */ | |
1581 | if (master == 0) | |
1582 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], | |
1583 | &req_data); | |
1584 | else if (master == 1) | |
1585 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], | |
1586 | &req_data); | |
1587 | else if (master == 2) | |
1588 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], | |
1589 | &req_data); | |
1590 | ||
1591 | if (status >= 0) { | |
1592 | /* Copy the data read back to main buffer */ | |
1593 | if (data_len == 1) | |
1594 | *data = value[0]; | |
1595 | else if (data_len == 4) | |
1596 | *data = | |
1597 | value[0] | value[1] << 8 | value[2] << 16 | value[3] | |
1598 | << 24; | |
1599 | else if (data_len > 4) | |
1600 | *data = value[saddr]; | |
1601 | } | |
1602 | ||
1603 | return status; | |
1604 | } | |
1605 | ||
1606 | int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
1607 | u8 saddr_len, u32 data, u8 data_len, int master) | |
1608 | { | |
1609 | int status = 0; | |
1610 | u8 value[4] = { 0, 0, 0, 0 }; | |
1611 | struct cx231xx_i2c_xfer_data req_data; | |
1612 | ||
1613 | value[0] = (u8) data; | |
1614 | value[1] = (u8) (data >> 8); | |
1615 | value[2] = (u8) (data >> 16); | |
1616 | value[3] = (u8) (data >> 24); | |
1617 | ||
1618 | if (saddr_len == 0) | |
1619 | saddr = 0; | |
fe041646 | 1620 | else if (saddr_len == 1) |
64fbf444 PB |
1621 | saddr &= 0xff; |
1622 | ||
1623 | /* prepare xfer_data struct */ | |
1624 | req_data.dev_addr = dev_addr >> 1; | |
1625 | req_data.direction = 0; | |
1626 | req_data.saddr_len = saddr_len; | |
1627 | req_data.saddr_dat = saddr; | |
1628 | req_data.buf_size = data_len; | |
1629 | req_data.p_buffer = value; | |
1630 | ||
1631 | /* usb send command */ | |
1632 | if (master == 0) | |
1633 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], | |
1634 | &req_data); | |
1635 | else if (master == 1) | |
1636 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], | |
1637 | &req_data); | |
1638 | else if (master == 2) | |
1639 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], | |
1640 | &req_data); | |
1641 | ||
1642 | return status; | |
1643 | } | |
1644 | ||
e0d3bafd | 1645 | int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
b9255176 | 1646 | u8 saddr_len, u32 *data, u8 data_len) |
e0d3bafd | 1647 | { |
84b5dbf3 MCC |
1648 | int status = 0; |
1649 | struct cx231xx_i2c_xfer_data req_data; | |
1650 | u8 value[4] = { 0, 0, 0, 0 }; | |
1651 | ||
1652 | if (saddr_len == 0) | |
1653 | saddr = 0; | |
fe041646 | 1654 | else if (saddr_len == 1) |
84b5dbf3 MCC |
1655 | saddr &= 0xff; |
1656 | ||
1657 | /* prepare xfer_data struct */ | |
1658 | req_data.dev_addr = dev_addr >> 1; | |
1659 | req_data.direction = I2C_M_RD; | |
1660 | req_data.saddr_len = saddr_len; | |
1661 | req_data.saddr_dat = saddr; | |
1662 | req_data.buf_size = data_len; | |
1663 | req_data.p_buffer = (u8 *) value; | |
1664 | ||
1665 | /* usb send command */ | |
1666 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); | |
1667 | ||
1668 | if (status >= 0) { | |
1669 | /* Copy the data read back to main buffer */ | |
1670 | if (data_len == 1) | |
1671 | *data = value[0]; | |
1672 | else | |
1673 | *data = | |
1674 | value[0] | value[1] << 8 | value[2] << 16 | value[3] | |
1675 | << 24; | |
1676 | } | |
1677 | ||
1678 | return status; | |
e0d3bafd SD |
1679 | } |
1680 | ||
1681 | int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
84b5dbf3 | 1682 | u8 saddr_len, u32 data, u8 data_len) |
e0d3bafd | 1683 | { |
84b5dbf3 MCC |
1684 | int status = 0; |
1685 | u8 value[4] = { 0, 0, 0, 0 }; | |
1686 | struct cx231xx_i2c_xfer_data req_data; | |
1687 | ||
1688 | value[0] = (u8) data; | |
1689 | value[1] = (u8) (data >> 8); | |
1690 | value[2] = (u8) (data >> 16); | |
1691 | value[3] = (u8) (data >> 24); | |
1692 | ||
1693 | if (saddr_len == 0) | |
1694 | saddr = 0; | |
fe041646 | 1695 | else if (saddr_len == 1) |
84b5dbf3 MCC |
1696 | saddr &= 0xff; |
1697 | ||
1698 | /* prepare xfer_data struct */ | |
1699 | req_data.dev_addr = dev_addr >> 1; | |
1700 | req_data.direction = 0; | |
1701 | req_data.saddr_len = saddr_len; | |
1702 | req_data.saddr_dat = saddr; | |
1703 | req_data.buf_size = data_len; | |
1704 | req_data.p_buffer = value; | |
1705 | ||
1706 | /* usb send command */ | |
1707 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); | |
1708 | ||
1709 | return status; | |
e0d3bafd SD |
1710 | } |
1711 | ||
84b5dbf3 MCC |
1712 | int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, |
1713 | u16 register_address, u8 bit_start, u8 bit_end, | |
1714 | u32 value) | |
e0d3bafd | 1715 | { |
84b5dbf3 MCC |
1716 | int status = 0; |
1717 | u32 tmp; | |
1718 | u32 mask = 0; | |
1719 | int i; | |
1720 | ||
b9255176 | 1721 | if (bit_start > (size - 1) || bit_end > (size - 1)) |
84b5dbf3 | 1722 | return -1; |
e0d3bafd | 1723 | |
84b5dbf3 MCC |
1724 | if (size == 8) { |
1725 | status = | |
1726 | cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, | |
1727 | &tmp, 1); | |
1728 | } else { | |
1729 | status = | |
1730 | cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, | |
1731 | &tmp, 4); | |
1732 | } | |
e0d3bafd | 1733 | |
b9255176 | 1734 | if (status < 0) |
84b5dbf3 | 1735 | return status; |
84b5dbf3 MCC |
1736 | |
1737 | mask = 1 << bit_end; | |
b9255176 | 1738 | for (i = bit_end; i > bit_start && i > 0; i--) |
84b5dbf3 | 1739 | mask = mask + (1 << (i - 1)); |
84b5dbf3 MCC |
1740 | |
1741 | value <<= bit_start; | |
1742 | ||
1743 | if (size == 8) { | |
1744 | tmp &= ~mask; | |
1745 | tmp |= value; | |
1746 | tmp &= 0xff; | |
1747 | status = | |
1748 | cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, | |
1749 | tmp, 1); | |
1750 | } else { | |
1751 | tmp &= ~mask; | |
1752 | tmp |= value; | |
1753 | status = | |
1754 | cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, | |
1755 | tmp, 4); | |
1756 | } | |
1757 | ||
1758 | return status; | |
1759 | } | |
e0d3bafd SD |
1760 | |
1761 | int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, | |
84b5dbf3 | 1762 | u16 saddr, u32 mask, u32 value) |
e0d3bafd | 1763 | { |
84b5dbf3 MCC |
1764 | u32 temp; |
1765 | int status = 0; | |
e0d3bafd | 1766 | |
84b5dbf3 | 1767 | status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4); |
e0d3bafd | 1768 | |
84b5dbf3 MCC |
1769 | if (status < 0) |
1770 | return status; | |
e0d3bafd | 1771 | |
84b5dbf3 MCC |
1772 | temp &= ~mask; |
1773 | temp |= value; | |
e0d3bafd | 1774 | |
84b5dbf3 | 1775 | status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4); |
e0d3bafd | 1776 | |
84b5dbf3 | 1777 | return status; |
e0d3bafd SD |
1778 | } |
1779 | ||
1780 | u32 cx231xx_set_field(u32 field_mask, u32 data) | |
1781 | { | |
84b5dbf3 | 1782 | u32 temp; |
e0d3bafd | 1783 | |
b9255176 | 1784 | for (temp = field_mask; (temp & 1) == 0; temp >>= 1) |
84b5dbf3 | 1785 | data <<= 1; |
e0d3bafd | 1786 | |
84b5dbf3 | 1787 | return data; |
e0d3bafd | 1788 | } |