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[linux-block.git] / drivers / media / tuners / xc5000.c
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c942fddf 1// SPDX-License-Identifier: GPL-2.0-or-later
aacb9d31
ST		 2/*
3 * Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
4 *
5 * Copyright (c) 2007 Xceive Corporation
6d897616 6 * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
e80858e8 7 * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com>
aacb9d31
ST		 8 */
9
10#include <linux/module.h>
11#include <linux/moduleparam.h>
4917019d 12#include <linux/videodev2.h>
aacb9d31 13#include <linux/delay.h>
f7a27ff1 14#include <linux/workqueue.h>
aacb9d31
ST		 15#include <linux/dvb/frontend.h>
16#include <linux/i2c.h>
17
fada1935 18#include <media/dvb_frontend.h>
aacb9d31
ST		 19
20#include "xc5000.h"
89fd2854 21#include "tuner-i2c.h"
aacb9d31
ST		 22
23static int debug;
24module_param(debug, int, 0644);
25MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
26
b6bd5eb8
DH		 27static int no_poweroff;
28module_param(no_poweroff, int, 0644);
29MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
30 "\t\t1 keep device energized and with tuner ready all the times.\n"
31 "\t\tFaster, but consumes more power and keeps the device hotter");
32
89fd2854
MK		 33static DEFINE_MUTEX(xc5000_list_mutex);
34static LIST_HEAD(hybrid_tuner_instance_list);
35
8f3cd530 36#define dprintk(level, fmt, arg...) if (debug >= level) \
aacb9d31
ST		 37 printk(KERN_INFO "%s: " fmt, "xc5000", ## arg)
38
ffb41234 39struct xc5000_priv {
89fd2854
MK		 40 struct tuner_i2c_props i2c_props;
41 struct list_head hybrid_tuner_instance_list;
ffb41234 42
2a6003c2 43 u32 if_khz;
409328a4 44 u16 xtal_khz;
a3eec916 45 u32 freq_hz, freq_offset;
ffb41234
MK		 46 u32 bandwidth;
47 u8 video_standard;
16435202 48 unsigned int mode;
ffb41234 49 u8 rf_mode;
496e9057 50 u8 radio_input;
52e269b1 51 u16 output_amp;
76efb0ba 52
6fab81df 53 int chip_id;
de49bc6e 54 u16 pll_register_no;
22d5c6f5
DH		 55 u8 init_status_supported;
56 u8 fw_checksum_supported;
f7a27ff1
MCC		 57
58 struct dvb_frontend *fe;
59 struct delayed_work timer_sleep;
5264a522
SK		 60
61 const struct firmware *firmware;
ffb41234
MK		 62};
63
aacb9d31 64/* Misc Defines */
724dcbfa 65#define MAX_TV_STANDARD 24
aacb9d31
ST		 66#define XC_MAX_I2C_WRITE_LENGTH 64
67
f7a27ff1
MCC		 68/* Time to suspend after the .sleep callback is called */
69#define XC5000_SLEEP_TIME 5000 /* ms */
70
aacb9d31
ST		 71/* Signal Types */
72#define XC_RF_MODE_AIR 0
73#define XC_RF_MODE_CABLE 1
74
27c685a4
ST		 75/* Product id */
76#define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000
5015c27b 77#define XC_PRODUCT_ID_FW_LOADED 0x1388
27c685a4 78
aacb9d31
ST		 79/* Registers */
80#define XREG_INIT 0x00
81#define XREG_VIDEO_MODE 0x01
82#define XREG_AUDIO_MODE 0x02
83#define XREG_RF_FREQ 0x03
84#define XREG_D_CODE 0x04
85#define XREG_IF_OUT 0x05
86#define XREG_SEEK_MODE 0x07
7f05b530 87#define XREG_POWER_DOWN 0x0A /* Obsolete */
724dcbfa
DB		 88/* Set the output amplitude - SIF for analog, DTVP/DTVN for digital */
89#define XREG_OUTPUT_AMP 0x0B
aacb9d31
ST		 90#define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */
91#define XREG_SMOOTHEDCVBS 0x0E
92#define XREG_XTALFREQ 0x0F
81c4dfe7 93#define XREG_FINERFREQ 0x10
aacb9d31
ST		 94#define XREG_DDIMODE 0x11
95
96#define XREG_ADC_ENV 0x00
97#define XREG_QUALITY 0x01
98#define XREG_FRAME_LINES 0x02
99#define XREG_HSYNC_FREQ 0x03
100#define XREG_LOCK 0x04
101#define XREG_FREQ_ERROR 0x05
102#define XREG_SNR 0x06
103#define XREG_VERSION 0x07
104#define XREG_PRODUCT_ID 0x08
105#define XREG_BUSY 0x09
bae7b7d7 106#define XREG_BUILD 0x0D
7c287f18 107#define XREG_TOTALGAIN 0x0F
22d5c6f5
DH		 108#define XREG_FW_CHECKSUM 0x12
109#define XREG_INIT_STATUS 0x13
aacb9d31
ST		 110
111/*
112 Basic firmware description. This will remain with
113 the driver for documentation purposes.
114
115 This represents an I2C firmware file encoded as a
116 string of unsigned char. Format is as follows:
117
118 char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB
119 char[1 ]=len0_LSB -> length of first write transaction
120 char[2 ]=data0 -> first byte to be sent
121 char[3 ]=data1
122 char[4 ]=data2
123 char[ ]=...
124 char[M ]=dataN -> last byte to be sent
125 char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB
126 char[M+2]=len1_LSB -> length of second write transaction
127 char[M+3]=data0
128 char[M+4]=data1
129 ...
130 etc.
131
132 The [len] value should be interpreted as follows:
133
134 len= len_MSB _ len_LSB
135 len=1111_1111_1111_1111 : End of I2C_SEQUENCE
136 len=0000_0000_0000_0000 : Reset command: Do hardware reset
137 len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767)
138 len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms
139
140 For the RESET and WAIT commands, the two following bytes will contain
141 immediately the length of the following transaction.
142
143*/
8f3cd530 144struct XC_TV_STANDARD {
303ddd92
MCC		 145 char *name;
146 u16 audio_mode;
147 u16 video_mode;
8f3cd530 148};
aacb9d31
ST		 149
150/* Tuner standards */
27c685a4
ST		 151#define MN_NTSC_PAL_BTSC 0
152#define MN_NTSC_PAL_A2 1
153#define MN_NTSC_PAL_EIAJ 2
303ddd92 154#define MN_NTSC_PAL_MONO 3
27c685a4
ST		 155#define BG_PAL_A2 4
156#define BG_PAL_NICAM 5
157#define BG_PAL_MONO 6
158#define I_PAL_NICAM 7
159#define I_PAL_NICAM_MONO 8
160#define DK_PAL_A2 9
161#define DK_PAL_NICAM 10
162#define DK_PAL_MONO 11
163#define DK_SECAM_A2DK1 12
5015c27b
MCC		 164#define DK_SECAM_A2LDK3 13
165#define DK_SECAM_A2MONO 14
27c685a4
ST		 166#define L_SECAM_NICAM 15
167#define LC_SECAM_NICAM 16
168#define DTV6 17
169#define DTV8 18
170#define DTV7_8 19
171#define DTV7 20
5015c27b
MCC		 172#define FM_RADIO_INPUT2 21
173#define FM_RADIO_INPUT1 22
303ddd92 174#define FM_RADIO_INPUT1_MONO 23
aacb9d31 175
303ddd92 176static struct XC_TV_STANDARD xc5000_standard[MAX_TV_STANDARD] = {
aacb9d31
ST		 177 {"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020},
178 {"M/N-NTSC/PAL-A2", 0x0600, 0x8020},
179 {"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020},
180 {"M/N-NTSC/PAL-Mono", 0x0478, 0x8020},
181 {"B/G-PAL-A2", 0x0A00, 0x8049},
182 {"B/G-PAL-NICAM", 0x0C04, 0x8049},
183 {"B/G-PAL-MONO", 0x0878, 0x8059},
184 {"I-PAL-NICAM", 0x1080, 0x8009},
185 {"I-PAL-NICAM-MONO", 0x0E78, 0x8009},
186 {"D/K-PAL-A2", 0x1600, 0x8009},
187 {"D/K-PAL-NICAM", 0x0E80, 0x8009},
188 {"D/K-PAL-MONO", 0x1478, 0x8009},
189 {"D/K-SECAM-A2 DK1", 0x1200, 0x8009},
8f3cd530 190 {"D/K-SECAM-A2 L/DK3", 0x0E00, 0x8009},
aacb9d31
ST		 191 {"D/K-SECAM-A2 MONO", 0x1478, 0x8009},
192 {"L-SECAM-NICAM", 0x8E82, 0x0009},
193 {"L'-SECAM-NICAM", 0x8E82, 0x4009},
194 {"DTV6", 0x00C0, 0x8002},
195 {"DTV8", 0x00C0, 0x800B},
196 {"DTV7/8", 0x00C0, 0x801B},
197 {"DTV7", 0x00C0, 0x8007},
198 {"FM Radio-INPUT2", 0x9802, 0x9002},
724dcbfa
DB		 199 {"FM Radio-INPUT1", 0x0208, 0x9002},
200 {"FM Radio-INPUT1_MONO", 0x0278, 0x9002}
aacb9d31
ST		 201};
202
ddea427f
MK		 203
204struct xc5000_fw_cfg {
205 char *name;
206 u16 size;
de49bc6e 207 u16 pll_reg;
22d5c6f5
DH		 208 u8 init_status_supported;
209 u8 fw_checksum_supported;
ddea427f
MK		 210};
211
3422f2a6 212#define XC5000A_FIRMWARE "dvb-fe-xc5000-1.6.114.fw"
a3db60bc 213static const struct xc5000_fw_cfg xc5000a_1_6_114 = {
3422f2a6 214 .name = XC5000A_FIRMWARE,
76efb0ba 215 .size = 12401,
de49bc6e 216 .pll_reg = 0x806c,
76efb0ba
MK		 217};
218
3de5bffd 219#define XC5000C_FIRMWARE "dvb-fe-xc5000c-4.1.30.7.fw"
7d3d0d8d 220static const struct xc5000_fw_cfg xc5000c_41_024_5 = {
3422f2a6 221 .name = XC5000C_FIRMWARE,
7d3d0d8d 222 .size = 16497,
de49bc6e 223 .pll_reg = 0x13,
22d5c6f5
DH		 224 .init_status_supported = 1,
225 .fw_checksum_supported = 1,
d8398805
MK		 226};
227
a3db60bc 228static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id)
ddea427f 229{
6fab81df 230 switch (chip_id) {
ddea427f 231 default:
6fab81df 232 case XC5000A:
ddea427f 233 return &xc5000a_1_6_114;
6fab81df 234 case XC5000C:
7d3d0d8d 235 return &xc5000c_41_024_5;
ddea427f
MK		 236 }
237}
238
de49bc6e 239static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force);
91bd625e 240static int xc5000_is_firmware_loaded(struct dvb_frontend *fe);
bdd33563 241static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val);
303ddd92 242static int xc5000_tuner_reset(struct dvb_frontend *fe);
aacb9d31 243
e12671cf 244static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
aacb9d31 245{
d7800d4e
DH		 246 struct i2c_msg msg = { .addr = priv->i2c_props.addr,
247 .flags = 0, .buf = buf, .len = len };
248
249 if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
250 printk(KERN_ERR "xc5000: I2C write failed (len=%i)\n", len);
859ae7f0 251 return -EREMOTEIO;
d7800d4e 252 }
859ae7f0 253 return 0;
aacb9d31
ST		 254}
255
1cdffda7 256#if 0
bdd33563
DH		 257/* This routine is never used because the only time we read data from the
258 i2c bus is when we read registers, and we want that to be an atomic i2c
259 transaction in case we are on a multi-master bus */
e12671cf 260static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
aacb9d31 261{
bdd33563
DH		 262 struct i2c_msg msg = { .addr = priv->i2c_props.addr,
263 .flags = I2C_M_RD, .buf = buf, .len = len };
264
265 if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
266 printk(KERN_ERR "xc5000 I2C read failed (len=%i)\n", len);
267 return -EREMOTEIO;
268 }
269 return 0;
aacb9d31 270}
1cdffda7 271#endif
aacb9d31 272
4743319f
DB		 273static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val)
274{
275 u8 buf[2] = { reg >> 8, reg & 0xff };
276 u8 bval[2] = { 0, 0 };
277 struct i2c_msg msg[2] = {
278 { .addr = priv->i2c_props.addr,
279 .flags = 0, .buf = &buf[0], .len = 2 },
280 { .addr = priv->i2c_props.addr,
281 .flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
282 };
283
284 if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
285 printk(KERN_WARNING "xc5000: I2C read failed\n");
286 return -EREMOTEIO;
287 }
288
289 *val = (bval[0] << 8) | bval[1];
859ae7f0 290 return 0;
4743319f
DB		 291}
292
303ddd92 293static int xc5000_tuner_reset(struct dvb_frontend *fe)
aacb9d31
ST		 294{
295 struct xc5000_priv *priv = fe->tuner_priv;
296 int ret;
297
271ddbf7 298 dprintk(1, "%s()\n", __func__);
aacb9d31 299
d7cba043
MK		 300 if (fe->callback) {
301 ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
30650961
MK		 302 fe->dvb->priv :
303 priv->i2c_props.adap->algo_data,
d7cba043 304 DVB_FRONTEND_COMPONENT_TUNER,
30650961 305 XC5000_TUNER_RESET, 0);
91bd625e 306 if (ret) {
aacb9d31 307 printk(KERN_ERR "xc5000: reset failed\n");
859ae7f0 308 return ret;
91bd625e
DH		 309 }
310 } else {
27c685a4 311 printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n");
859ae7f0 312 return -EINVAL;
91bd625e 313 }
859ae7f0 314 return 0;
aacb9d31
ST		 315}
316
303ddd92 317static int xc_write_reg(struct xc5000_priv *priv, u16 reg_addr, u16 i2c_data)
aacb9d31 318{
e12671cf 319 u8 buf[4];
303ddd92 320 int watch_dog_timer = 100;
aacb9d31
ST		 321 int result;
322
303ddd92
MCC		 323 buf[0] = (reg_addr >> 8) & 0xFF;
324 buf[1] = reg_addr & 0xFF;
325 buf[2] = (i2c_data >> 8) & 0xFF;
326 buf[3] = i2c_data & 0xFF;
aacb9d31 327 result = xc_send_i2c_data(priv, buf, 4);
859ae7f0 328 if (result == 0) {
aacb9d31 329 /* wait for busy flag to clear */
303ddd92 330 while ((watch_dog_timer > 0) && (result == 0)) {
1cdffda7 331 result = xc5000_readreg(priv, XREG_BUSY, (u16 *)buf);
859ae7f0 332 if (result == 0) {
4743319f
DB		 333 if ((buf[0] == 0) && (buf[1] == 0)) {
334 /* busy flag cleared */
aacb9d31 335 break;
4743319f 336 } else {
e5bf4a11 337 msleep(5); /* wait 5 ms */
303ddd92 338 watch_dog_timer--;
aacb9d31
ST		 339 }
340 }
341 }
342 }
303ddd92 343 if (watch_dog_timer <= 0)
859ae7f0 344 result = -EREMOTEIO;
aacb9d31
ST		 345
346 return result;
347}
348
c63e87e9 349static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence)
aacb9d31
ST		 350{
351 struct xc5000_priv *priv = fe->tuner_priv;
352
353 int i, nbytes_to_send, result;
354 unsigned int len, pos, index;
e12671cf 355 u8 buf[XC_MAX_I2C_WRITE_LENGTH];
aacb9d31 356
8f3cd530
ST		 357 index = 0;
358 while ((i2c_sequence[index] != 0xFF) ||
359 (i2c_sequence[index + 1] != 0xFF)) {
360 len = i2c_sequence[index] * 256 + i2c_sequence[index+1];
e12671cf 361 if (len == 0x0000) {
aacb9d31 362 /* RESET command */
303ddd92 363 result = xc5000_tuner_reset(fe);
aacb9d31 364 index += 2;
859ae7f0 365 if (result != 0)
aacb9d31
ST		 366 return result;
367 } else if (len & 0x8000) {
368 /* WAIT command */
e5bf4a11 369 msleep(len & 0x7FFF);
aacb9d31
ST		 370 index += 2;
371 } else {
372 /* Send i2c data whilst ensuring individual transactions
373 * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes.
374 */
375 index += 2;
376 buf[0] = i2c_sequence[index];
377 buf[1] = i2c_sequence[index + 1];
378 pos = 2;
379 while (pos < len) {
8f3cd530
ST		 380 if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2)
381 nbytes_to_send =
382 XC_MAX_I2C_WRITE_LENGTH;
383 else
aacb9d31 384 nbytes_to_send = (len - pos + 2);
8f3cd530
ST		 385 for (i = 2; i < nbytes_to_send; i++) {
386 buf[i] = i2c_sequence[index + pos +
387 i - 2];
aacb9d31 388 }
8f3cd530
ST		 389 result = xc_send_i2c_data(priv, buf,
390 nbytes_to_send);
aacb9d31 391
859ae7f0 392 if (result != 0)
aacb9d31
ST		 393 return result;
394
395 pos += nbytes_to_send - 2;
396 }
397 index += len;
398 }
399 }
859ae7f0 400 return 0;
aacb9d31
ST		 401}
402
e12671cf 403static int xc_initialize(struct xc5000_priv *priv)
aacb9d31 404{
271ddbf7 405 dprintk(1, "%s()\n", __func__);
aacb9d31
ST		 406 return xc_write_reg(priv, XREG_INIT, 0);
407}
408
303ddd92
MCC		 409static int xc_set_tv_standard(struct xc5000_priv *priv,
410 u16 video_mode, u16 audio_mode, u8 radio_mode)
aacb9d31
ST		 411{
412 int ret;
303ddd92
MCC		 413 dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode);
414 if (radio_mode) {
01ae7286
DB		 415 dprintk(1, "%s() Standard = %s\n",
416 __func__,
303ddd92 417 xc5000_standard[radio_mode].name);
01ae7286
DB		 418 } else {
419 dprintk(1, "%s() Standard = %s\n",
420 __func__,
303ddd92 421 xc5000_standard[priv->video_standard].name);
01ae7286 422 }
aacb9d31 423
303ddd92 424 ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode);
859ae7f0 425 if (ret == 0)
303ddd92 426 ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode);
aacb9d31
ST		 427
428 return ret;
429}
430
303ddd92 431static int xc_set_signal_source(struct xc5000_priv *priv, u16 rf_mode)
aacb9d31 432{
271ddbf7 433 dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode,
aacb9d31
ST		 434 rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE");
435
8f3cd530 436 if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) {
aacb9d31
ST		 437 rf_mode = XC_RF_MODE_CABLE;
438 printk(KERN_ERR
439 "%s(), Invalid mode, defaulting to CABLE",
271ddbf7 440 __func__);
aacb9d31
ST		 441 }
442 return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);
443}
444
e12671cf 445static const struct dvb_tuner_ops xc5000_tuner_ops;
aacb9d31 446
303ddd92 447static int xc_set_rf_frequency(struct xc5000_priv *priv, u32 freq_hz)
e12671cf
ST		 448{
449 u16 freq_code;
aacb9d31 450
271ddbf7 451 dprintk(1, "%s(%u)\n", __func__, freq_hz);
aacb9d31 452
a3f90c75
MCC		 453 if ((freq_hz > xc5000_tuner_ops.info.frequency_max_hz) ||
454 (freq_hz < xc5000_tuner_ops.info.frequency_min_hz))
859ae7f0 455 return -EINVAL;
aacb9d31 456
e12671cf
ST		 457 freq_code = (u16)(freq_hz / 15625);
458
81c4dfe7
DH		 459 /* Starting in firmware version 1.1.44, Xceive recommends using the
460 FINERFREQ for all normal tuning (the doc indicates reg 0x03 should
461 only be used for fast scanning for channel lock) */
462 return xc_write_reg(priv, XREG_FINERFREQ, freq_code);
aacb9d31
ST		 463}
464
aacb9d31 465
e12671cf
ST		 466static int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz)
467{
468 u32 freq_code = (freq_khz * 1024)/1000;
469 dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n",
271ddbf7 470 __func__, freq_khz, freq_code);
aacb9d31 471
e12671cf 472 return xc_write_reg(priv, XREG_IF_OUT, freq_code);
aacb9d31
ST		 473}
474
aacb9d31 475
303ddd92 476static int xc_get_adc_envelope(struct xc5000_priv *priv, u16 *adc_envelope)
aacb9d31 477{
bdd33563 478 return xc5000_readreg(priv, XREG_ADC_ENV, adc_envelope);
aacb9d31
ST		 479}
480
e12671cf 481static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz)
aacb9d31
ST		 482{
483 int result;
303ddd92 484 u16 reg_data;
aacb9d31
ST		 485 u32 tmp;
486
303ddd92 487 result = xc5000_readreg(priv, XREG_FREQ_ERROR, &reg_data);
859ae7f0 488 if (result != 0)
aacb9d31
ST		 489 return result;
490
303ddd92 491 tmp = (u32)reg_data;
e12671cf 492 (*freq_error_hz) = (tmp * 15625) / 1000;
aacb9d31
ST		 493 return result;
494}
495
e12671cf 496static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status)
aacb9d31 497{
bdd33563 498 return xc5000_readreg(priv, XREG_LOCK, lock_status);
aacb9d31
ST		 499}
500
e12671cf
ST		 501static int xc_get_version(struct xc5000_priv *priv,
502 u8 *hw_majorversion, u8 *hw_minorversion,
503 u8 *fw_majorversion, u8 *fw_minorversion)
aacb9d31 504{
e12671cf 505 u16 data;
aacb9d31
ST		 506 int result;
507
bdd33563 508 result = xc5000_readreg(priv, XREG_VERSION, &data);
859ae7f0 509 if (result != 0)
aacb9d31
ST		 510 return result;
511
e12671cf
ST		 512 (*hw_majorversion) = (data >> 12) & 0x0F;
513 (*hw_minorversion) = (data >> 8) & 0x0F;
514 (*fw_majorversion) = (data >> 4) & 0x0F;
515 (*fw_minorversion) = data & 0x0F;
aacb9d31
ST		 516
517 return 0;
518}
519
bae7b7d7
DH		 520static int xc_get_buildversion(struct xc5000_priv *priv, u16 *buildrev)
521{
522 return xc5000_readreg(priv, XREG_BUILD, buildrev);
523}
524
e12671cf 525static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz)
aacb9d31 526{
303ddd92 527 u16 reg_data;
aacb9d31
ST		 528 int result;
529
303ddd92 530 result = xc5000_readreg(priv, XREG_HSYNC_FREQ, &reg_data);
859ae7f0 531 if (result != 0)
aacb9d31
ST		 532 return result;
533
303ddd92 534 (*hsync_freq_hz) = ((reg_data & 0x0fff) * 763)/100;
aacb9d31
ST		 535 return result;
536}
537
e12671cf 538static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines)
aacb9d31 539{
bdd33563 540 return xc5000_readreg(priv, XREG_FRAME_LINES, frame_lines);
aacb9d31
ST		 541}
542
e12671cf 543static int xc_get_quality(struct xc5000_priv *priv, u16 *quality)
aacb9d31 544{
bdd33563 545 return xc5000_readreg(priv, XREG_QUALITY, quality);
aacb9d31
ST		 546}
547
7c287f18
DH		 548static int xc_get_analogsnr(struct xc5000_priv *priv, u16 *snr)
549{
550 return xc5000_readreg(priv, XREG_SNR, snr);
551}
552
553static int xc_get_totalgain(struct xc5000_priv *priv, u16 *totalgain)
554{
555 return xc5000_readreg(priv, XREG_TOTALGAIN, totalgain);
556}
557
a78baacf
DH		 558#define XC_TUNE_ANALOG 0
559#define XC_TUNE_DIGITAL 1
560static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode)
aacb9d31 561{
271ddbf7 562 dprintk(1, "%s(%u)\n", __func__, freq_hz);
aacb9d31 563
303ddd92 564 if (xc_set_rf_frequency(priv, freq_hz) != 0)
d9928a11 565 return -EREMOTEIO;
aacb9d31 566
d9928a11 567 return 0;
aacb9d31
ST		 568}
569
7d3d0d8d
MK		 570static int xc_set_xtal(struct dvb_frontend *fe)
571{
572 struct xc5000_priv *priv = fe->tuner_priv;
859ae7f0 573 int ret = 0;
7d3d0d8d
MK		 574
575 switch (priv->chip_id) {
576 default:
577 case XC5000A:
578 /* 32.000 MHz xtal is default */
579 break;
580 case XC5000C:
581 switch (priv->xtal_khz) {
582 default:
583 case 32000:
584 /* 32.000 MHz xtal is default */
585 break;
586 case 31875:
587 /* 31.875 MHz xtal configuration */
588 ret = xc_write_reg(priv, 0x000f, 0x8081);
589 break;
590 }
591 break;
592 }
593 return ret;
594}
aacb9d31 595
8604f355
MCC		 596static int xc5000_fwupload(struct dvb_frontend *fe,
597 const struct xc5000_fw_cfg *desired_fw,
598 const struct firmware *fw)
aacb9d31
ST		 599{
600 struct xc5000_priv *priv = fe->tuner_priv;
aacb9d31
ST		 601 int ret;
602
e12671cf 603 /* request the firmware, this will block and timeout */
8604f355 604 dprintk(1, "waiting for firmware upload (%s)...\n",
6fab81df 605 desired_fw->name);
e12671cf 606
8604f355
MCC		 607 priv->pll_register_no = desired_fw->pll_reg;
608 priv->init_status_supported = desired_fw->init_status_supported;
609 priv->fw_checksum_supported = desired_fw->fw_checksum_supported;
aacb9d31 610
aacb9d31 611
8604f355
MCC		 612 dprintk(1, "firmware uploading...\n");
613 ret = xc_load_i2c_sequence(fe, fw->data);
614 if (!ret) {
615 ret = xc_set_xtal(fe);
616 dprintk(1, "Firmware upload complete...\n");
617 } else
618 printk(KERN_ERR "xc5000: firmware upload failed...\n");
619
aacb9d31
ST		 620 return ret;
621}
622
e12671cf 623static void xc_debug_dump(struct xc5000_priv *priv)
aacb9d31 624{
e12671cf
ST		 625 u16 adc_envelope;
626 u32 freq_error_hz = 0;
627 u16 lock_status;
628 u32 hsync_freq_hz = 0;
629 u16 frame_lines;
630 u16 quality;
7c287f18
DH		 631 u16 snr;
632 u16 totalgain;
e12671cf
ST		 633 u8 hw_majorversion = 0, hw_minorversion = 0;
634 u8 fw_majorversion = 0, fw_minorversion = 0;
bae7b7d7 635 u16 fw_buildversion = 0;
de49bc6e 636 u16 regval;
aacb9d31
ST		 637
638 /* Wait for stats to stabilize.
639 * Frame Lines needs two frame times after initial lock
640 * before it is valid.
641 */
e5bf4a11 642 msleep(100);
aacb9d31 643
303ddd92 644 xc_get_adc_envelope(priv, &adc_envelope);
e12671cf 645 dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope);
aacb9d31 646
e12671cf
ST		 647 xc_get_frequency_error(priv, &freq_error_hz);
648 dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz);
aacb9d31 649
e12671cf
ST		 650 xc_get_lock_status(priv, &lock_status);
651 dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n",
aacb9d31
ST		 652 lock_status);
653
654 xc_get_version(priv, &hw_majorversion, &hw_minorversion,
e12671cf 655 &fw_majorversion, &fw_minorversion);
bae7b7d7 656 xc_get_buildversion(priv, &fw_buildversion);
ca60a45d 657 dprintk(1, "*** HW: V%d.%d, FW: V %d.%d.%d\n",
aacb9d31 658 hw_majorversion, hw_minorversion,
bae7b7d7 659 fw_majorversion, fw_minorversion, fw_buildversion);
aacb9d31 660
e12671cf
ST		 661 xc_get_hsync_freq(priv, &hsync_freq_hz);
662 dprintk(1, "*** Horizontal sync frequency = %d Hz\n", hsync_freq_hz);
aacb9d31 663
e12671cf
ST		 664 xc_get_frame_lines(priv, &frame_lines);
665 dprintk(1, "*** Frame lines = %d\n", frame_lines);
aacb9d31 666
e12671cf 667 xc_get_quality(priv, &quality);
1aa9c487 668 dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality & 0x07);
7c287f18
DH		 669
670 xc_get_analogsnr(priv, &snr);
671 dprintk(1, "*** Unweighted analog SNR = %d dB\n", snr & 0x3f);
672
673 xc_get_totalgain(priv, &totalgain);
674 dprintk(1, "*** Total gain = %d.%d dB\n", totalgain / 256,
675 (totalgain % 256) * 100 / 256);
de49bc6e
DH		 676
677 if (priv->pll_register_no) {
7621b8c4
MCC		 678 if (!xc5000_readreg(priv, priv->pll_register_no, &regval))
679 dprintk(1, "*** PLL lock status = 0x%04x\n", regval);
de49bc6e 680 }
aacb9d31
ST		 681}
682
16435202
MCC		 683static int xc5000_tune_digital(struct dvb_frontend *fe)
684{
685 struct xc5000_priv *priv = fe->tuner_priv;
686 int ret;
687 u32 bw = fe->dtv_property_cache.bandwidth_hz;
688
689 ret = xc_set_signal_source(priv, priv->rf_mode);
690 if (ret != 0) {
691 printk(KERN_ERR
692 "xc5000: xc_set_signal_source(%d) failed\n",
693 priv->rf_mode);
694 return -EREMOTEIO;
695 }
696
697 ret = xc_set_tv_standard(priv,
698 xc5000_standard[priv->video_standard].video_mode,
699 xc5000_standard[priv->video_standard].audio_mode, 0);
700 if (ret != 0) {
701 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
702 return -EREMOTEIO;
703 }
704
705 ret = xc_set_IF_frequency(priv, priv->if_khz);
706 if (ret != 0) {
707 printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n",
708 priv->if_khz);
709 return -EIO;
710 }
711
52e269b1
RV		 712 dprintk(1, "%s() setting OUTPUT_AMP to 0x%x\n",
713 __func__, priv->output_amp);
714 xc_write_reg(priv, XREG_OUTPUT_AMP, priv->output_amp);
16435202
MCC		 715
716 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL);
717
718 if (debug)
719 xc_debug_dump(priv);
720
721 priv->bandwidth = bw;
722
723 return 0;
724}
725
59b94f3e 726static int xc5000_set_digital_params(struct dvb_frontend *fe)
aacb9d31 727{
16435202 728 int b;
aacb9d31 729 struct xc5000_priv *priv = fe->tuner_priv;
fd66c45d
MCC		 730 u32 bw = fe->dtv_property_cache.bandwidth_hz;
731 u32 freq = fe->dtv_property_cache.frequency;
732 u32 delsys = fe->dtv_property_cache.delivery_system;
aacb9d31 733
859ae7f0 734 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
fc7a74ba
DH		 735 dprintk(1, "Unable to load firmware and init tuner\n");
736 return -EINVAL;
760c466c 737 }
8e4c6797 738
fd66c45d 739 dprintk(1, "%s() frequency=%d (Hz)\n", __func__, freq);
aacb9d31 740
fd66c45d
MCC		 741 switch (delsys) {
742 case SYS_ATSC:
743 dprintk(1, "%s() VSB modulation\n", __func__);
744 priv->rf_mode = XC_RF_MODE_AIR;
a3eec916 745 priv->freq_offset = 1750000;
fd66c45d
MCC		 746 priv->video_standard = DTV6;
747 break;
748 case SYS_DVBC_ANNEX_B:
749 dprintk(1, "%s() QAM modulation\n", __func__);
750 priv->rf_mode = XC_RF_MODE_CABLE;
a3eec916 751 priv->freq_offset = 1750000;
fd66c45d
MCC		 752 priv->video_standard = DTV6;
753 break;
5cf73ce1
MCC		 754 case SYS_ISDBT:
755 /* All ISDB-T are currently for 6 MHz bw */
756 if (!bw)
757 bw = 6000000;
758 /* fall to OFDM handling */
df561f66 759 fallthrough;
5cf73ce1 760 case SYS_DMBTH:
fd66c45d
MCC		 761 case SYS_DVBT:
762 case SYS_DVBT2:
6c99080d 763 dprintk(1, "%s() OFDM\n", __func__);
fd66c45d
MCC		 764 switch (bw) {
765 case 6000000:
6c99080d 766 priv->video_standard = DTV6;
a3eec916 767 priv->freq_offset = 1750000;
6c99080d 768 break;
fd66c45d 769 case 7000000:
0433cd28 770 priv->video_standard = DTV7;
a3eec916 771 priv->freq_offset = 2250000;
0433cd28 772 break;
fd66c45d 773 case 8000000:
6c99080d 774 priv->video_standard = DTV8;
a3eec916 775 priv->freq_offset = 2750000;
6c99080d
DW		 776 break;
777 default:
778 printk(KERN_ERR "xc5000 bandwidth not set!\n");
779 return -EINVAL;
780 }
aacb9d31 781 priv->rf_mode = XC_RF_MODE_AIR;
cf1364b1 782 break;
fd66c45d
MCC		 783 case SYS_DVBC_ANNEX_A:
784 case SYS_DVBC_ANNEX_C:
785 dprintk(1, "%s() QAM modulation\n", __func__);
786 priv->rf_mode = XC_RF_MODE_CABLE;
787 if (bw <= 6000000) {
fd66c45d 788 priv->video_standard = DTV6;
a3eec916 789 priv->freq_offset = 1750000;
fd66c45d
MCC		 790 b = 6;
791 } else if (bw <= 7000000) {
fd66c45d 792 priv->video_standard = DTV7;
a3eec916 793 priv->freq_offset = 2250000;
fd66c45d
MCC		 794 b = 7;
795 } else {
fd66c45d 796 priv->video_standard = DTV7_8;
a3eec916 797 priv->freq_offset = 2750000;
fd66c45d 798 b = 8;
e80edce1 799 }
fd66c45d
MCC		 800 dprintk(1, "%s() Bandwidth %dMHz (%d)\n", __func__,
801 b, bw);
802 break;
803 default:
804 printk(KERN_ERR "xc5000: delivery system is not supported!\n");
aacb9d31
ST		 805 return -EINVAL;
806 }
807
a3eec916 808 priv->freq_hz = freq - priv->freq_offset;
16435202 809 priv->mode = V4L2_TUNER_DIGITAL_TV;
a3eec916 810
fd66c45d
MCC		 811 dprintk(1, "%s() frequency=%d (compensated to %d)\n",
812 __func__, freq, priv->freq_hz);
aacb9d31 813
16435202 814 return xc5000_tune_digital(fe);
aacb9d31
ST		 815}
816
e470d817
ST		 817static int xc5000_is_firmware_loaded(struct dvb_frontend *fe)
818{
819 struct xc5000_priv *priv = fe->tuner_priv;
820 int ret;
821 u16 id;
822
823 ret = xc5000_readreg(priv, XREG_PRODUCT_ID, &id);
7621b8c4 824 if (!ret) {
e470d817 825 if (id == XC_PRODUCT_ID_FW_NOT_LOADED)
859ae7f0 826 ret = -ENOENT;
e470d817 827 else
859ae7f0 828 ret = 0;
7621b8c4
MCC		 829 dprintk(1, "%s() returns id = 0x%x\n", __func__, id);
830 } else {
831 dprintk(1, "%s() returns error %d\n", __func__, ret);
e470d817
ST		 832 }
833
e470d817
ST		 834 return ret;
835}
836
c3d6676b
MCC		 837static void xc5000_config_tv(struct dvb_frontend *fe,
838 struct analog_parameters *params)
27c685a4
ST		 839{
840 struct xc5000_priv *priv = fe->tuner_priv;
27c685a4 841
27c685a4 842 dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
271ddbf7 843 __func__, params->frequency);
27c685a4 844
1fab14ed
MCC		 845 /* Fix me: it could be air. */
846 priv->rf_mode = params->mode;
847 if (params->mode > XC_RF_MODE_CABLE)
848 priv->rf_mode = XC_RF_MODE_CABLE;
27c685a4
ST		 849
850 /* params->frequency is in units of 62.5khz */
851 priv->freq_hz = params->frequency * 62500;
852
853 /* FIX ME: Some video standards may have several possible audio
854 standards. We simply default to one of them here.
855 */
8f3cd530 856 if (params->std & V4L2_STD_MN) {
27c685a4
ST		 857 /* default to BTSC audio standard */
858 priv->video_standard = MN_NTSC_PAL_BTSC;
c3d6676b 859 return;
27c685a4
ST		 860 }
861
8f3cd530 862 if (params->std & V4L2_STD_PAL_BG) {
27c685a4
ST		 863 /* default to NICAM audio standard */
864 priv->video_standard = BG_PAL_NICAM;
c3d6676b 865 return;
27c685a4
ST		 866 }
867
8f3cd530 868 if (params->std & V4L2_STD_PAL_I) {
27c685a4
ST		 869 /* default to NICAM audio standard */
870 priv->video_standard = I_PAL_NICAM;
c3d6676b 871 return;
27c685a4
ST		 872 }
873
8f3cd530 874 if (params->std & V4L2_STD_PAL_DK) {
27c685a4
ST		 875 /* default to NICAM audio standard */
876 priv->video_standard = DK_PAL_NICAM;
c3d6676b 877 return;
27c685a4
ST		 878 }
879
8f3cd530 880 if (params->std & V4L2_STD_SECAM_DK) {
27c685a4
ST		 881 /* default to A2 DK1 audio standard */
882 priv->video_standard = DK_SECAM_A2DK1;
c3d6676b 883 return;
27c685a4
ST		 884 }
885
8f3cd530 886 if (params->std & V4L2_STD_SECAM_L) {
27c685a4 887 priv->video_standard = L_SECAM_NICAM;
c3d6676b 888 return;
27c685a4
ST		 889 }
890
8f3cd530 891 if (params->std & V4L2_STD_SECAM_LC) {
27c685a4 892 priv->video_standard = LC_SECAM_NICAM;
c3d6676b 893 return;
27c685a4 894 }
c3d6676b
MCC		 895}
896
897static int xc5000_set_tv_freq(struct dvb_frontend *fe)
898{
899 struct xc5000_priv *priv = fe->tuner_priv;
900 u16 pll_lock_status;
901 int ret;
27c685a4
ST		 902
903tune_channel:
303ddd92 904 ret = xc_set_signal_source(priv, priv->rf_mode);
859ae7f0 905 if (ret != 0) {
8f3cd530 906 printk(KERN_ERR
303ddd92 907 "xc5000: xc_set_signal_source(%d) failed\n",
27c685a4
ST		 908 priv->rf_mode);
909 return -EREMOTEIO;
910 }
911
303ddd92
MCC		 912 ret = xc_set_tv_standard(priv,
913 xc5000_standard[priv->video_standard].video_mode,
914 xc5000_standard[priv->video_standard].audio_mode, 0);
859ae7f0 915 if (ret != 0) {
303ddd92 916 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
27c685a4
ST		 917 return -EREMOTEIO;
918 }
919
724dcbfa
DB		 920 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
921
a78baacf 922 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
27c685a4
ST		 923
924 if (debug)
925 xc_debug_dump(priv);
926
de49bc6e
DH		 927 if (priv->pll_register_no != 0) {
928 msleep(20);
7621b8c4
MCC		 929 ret = xc5000_readreg(priv, priv->pll_register_no,
930 &pll_lock_status);
931 if (ret)
932 return ret;
de49bc6e
DH		 933 if (pll_lock_status > 63) {
934 /* PLL is unlocked, force reload of the firmware */
935 dprintk(1, "xc5000: PLL not locked (0x%x). Reloading...\n",
936 pll_lock_status);
859ae7f0 937 if (xc_load_fw_and_init_tuner(fe, 1) != 0) {
de49bc6e
DH		 938 printk(KERN_ERR "xc5000: Unable to reload fw\n");
939 return -EREMOTEIO;
940 }
941 goto tune_channel;
942 }
943 }
944
27c685a4
ST		 945 return 0;
946}
947
c3d6676b
MCC		 948static int xc5000_config_radio(struct dvb_frontend *fe,
949 struct analog_parameters *params)
950
d7009cdc
BILDB		 951{
952 struct xc5000_priv *priv = fe->tuner_priv;
d7009cdc
BILDB		 953
954 dprintk(1, "%s() frequency=%d (in units of khz)\n",
955 __func__, params->frequency);
956
496e9057
DH		 957 if (priv->radio_input == XC5000_RADIO_NOT_CONFIGURED) {
958 dprintk(1, "%s() radio input not configured\n", __func__);
959 return -EINVAL;
960 }
961
c3d6676b
MCC		 962 priv->freq_hz = params->frequency * 125 / 2;
963 priv->rf_mode = XC_RF_MODE_AIR;
964
965 return 0;
966}
967
968static int xc5000_set_radio_freq(struct dvb_frontend *fe)
969{
970 struct xc5000_priv *priv = fe->tuner_priv;
971 int ret;
972 u8 radio_input;
973
496e9057 974 if (priv->radio_input == XC5000_RADIO_FM1)
303ddd92 975 radio_input = FM_RADIO_INPUT1;
496e9057 976 else if (priv->radio_input == XC5000_RADIO_FM2)
303ddd92 977 radio_input = FM_RADIO_INPUT2;
724dcbfa 978 else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
303ddd92 979 radio_input = FM_RADIO_INPUT1_MONO;
496e9057
DH		 980 else {
981 dprintk(1, "%s() unknown radio input %d\n", __func__,
982 priv->radio_input);
983 return -EINVAL;
984 }
985
303ddd92
MCC		 986 ret = xc_set_tv_standard(priv, xc5000_standard[radio_input].video_mode,
987 xc5000_standard[radio_input].audio_mode, radio_input);
d7009cdc 988
859ae7f0 989 if (ret != 0) {
303ddd92 990 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
d7009cdc
BILDB		 991 return -EREMOTEIO;
992 }
993
303ddd92 994 ret = xc_set_signal_source(priv, priv->rf_mode);
859ae7f0 995 if (ret != 0) {
d7009cdc 996 printk(KERN_ERR
303ddd92 997 "xc5000: xc_set_signal_source(%d) failed\n",
d7009cdc
BILDB		 998 priv->rf_mode);
999 return -EREMOTEIO;
1000 }
1001
724dcbfa
DB		 1002 if ((priv->radio_input == XC5000_RADIO_FM1) ||
1003 (priv->radio_input == XC5000_RADIO_FM2))
1004 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
1005 else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
1006 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x06);
1007
d7009cdc
BILDB		 1008 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
1009
1010 return 0;
1011}
1012
59b94f3e 1013static int xc5000_set_params(struct dvb_frontend *fe)
c3d6676b
MCC		 1014{
1015 struct xc5000_priv *priv = fe->tuner_priv;
1016
5275a3b6
MCC		 1017 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
1018 dprintk(1, "Unable to load firmware and init tuner\n");
1019 return -EINVAL;
1020 }
1021
c3d6676b
MCC		 1022 switch (priv->mode) {
1023 case V4L2_TUNER_RADIO:
1024 return xc5000_set_radio_freq(fe);
1025 case V4L2_TUNER_ANALOG_TV:
1026 return xc5000_set_tv_freq(fe);
1027 case V4L2_TUNER_DIGITAL_TV:
1028 return xc5000_tune_digital(fe);
1029 }
1030
1031 return 0;
1032}
1033
d7009cdc
BILDB		 1034static int xc5000_set_analog_params(struct dvb_frontend *fe,
1035 struct analog_parameters *params)
1036{
1037 struct xc5000_priv *priv = fe->tuner_priv;
c3d6676b 1038 int ret;
d7009cdc
BILDB		 1039
1040 if (priv->i2c_props.adap == NULL)
1041 return -EINVAL;
1042
d7009cdc
BILDB		 1043 switch (params->mode) {
1044 case V4L2_TUNER_RADIO:
c3d6676b
MCC		 1045 ret = xc5000_config_radio(fe, params);
1046 if (ret)
1047 return ret;
d7009cdc
BILDB		 1048 break;
1049 case V4L2_TUNER_ANALOG_TV:
c3d6676b
MCC		 1050 xc5000_config_tv(fe, params);
1051 break;
1052 default:
d7009cdc
BILDB		 1053 break;
1054 }
c3d6676b 1055 priv->mode = params->mode;
d7009cdc 1056
59b94f3e 1057 return xc5000_set_params(fe);
d7009cdc
BILDB		 1058}
1059
aacb9d31
ST		 1060static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq)
1061{
1062 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1063 dprintk(1, "%s()\n", __func__);
a3eec916 1064 *freq = priv->freq_hz + priv->freq_offset;
aacb9d31
ST		 1065 return 0;
1066}
1067
35621030
MCC		 1068static int xc5000_get_if_frequency(struct dvb_frontend *fe, u32 *freq)
1069{
1070 struct xc5000_priv *priv = fe->tuner_priv;
1071 dprintk(1, "%s()\n", __func__);
1072 *freq = priv->if_khz * 1000;
1073 return 0;
1074}
1075
aacb9d31
ST		 1076static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
1077{
1078 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1079 dprintk(1, "%s()\n", __func__);
27c685a4 1080
aacb9d31
ST		 1081 *bw = priv->bandwidth;
1082 return 0;
1083}
1084
1085static int xc5000_get_status(struct dvb_frontend *fe, u32 *status)
1086{
1087 struct xc5000_priv *priv = fe->tuner_priv;
e12671cf 1088 u16 lock_status = 0;
aacb9d31
ST		 1089
1090 xc_get_lock_status(priv, &lock_status);
1091
271ddbf7 1092 dprintk(1, "%s() lock_status = 0x%08x\n", __func__, lock_status);
aacb9d31
ST		 1093
1094 *status = lock_status;
1095
1096 return 0;
1097}
1098
de49bc6e 1099static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force)
aacb9d31
ST		 1100{
1101 struct xc5000_priv *priv = fe->tuner_priv;
8604f355
MCC		 1102 const struct xc5000_fw_cfg *desired_fw = xc5000_assign_firmware(priv->chip_id);
1103 const struct firmware *fw;
2621c0b3 1104 int ret, i;
de49bc6e 1105 u16 pll_lock_status;
22d5c6f5 1106 u16 fw_ck;
de49bc6e 1107
f7a27ff1
MCC		 1108 cancel_delayed_work(&priv->timer_sleep);
1109
2621c0b3
MCC		 1110 if (!force && xc5000_is_firmware_loaded(fe) == 0)
1111 return 0;
aacb9d31 1112
5264a522
SK		 1113 if (!priv->firmware) {
1114 ret = request_firmware(&fw, desired_fw->name,
1115 priv->i2c_props.adap->dev.parent);
1116 if (ret) {
1117 pr_err("xc5000: Upload failed. rc %d\n", ret);
1118 return ret;
1119 }
5b5e0928 1120 dprintk(1, "firmware read %zu bytes.\n", fw->size);
8604f355 1121
5264a522
SK		 1122 if (fw->size != desired_fw->size) {
1123 pr_err("xc5000: Firmware file with incorrect size\n");
1124 release_firmware(fw);
1125 return -EINVAL;
1126 }
1127 priv->firmware = fw;
1128 } else
1129 fw = priv->firmware;
8604f355 1130
2621c0b3
MCC		 1131 /* Try up to 5 times to load firmware */
1132 for (i = 0; i < 5; i++) {
ee67674a
MCC		 1133 if (i)
1134 printk(KERN_CONT " - retrying to upload firmware.\n");
1135
8604f355 1136 ret = xc5000_fwupload(fe, desired_fw, fw);
859ae7f0 1137 if (ret != 0)
8604f355 1138 goto err;
aacb9d31 1139
de49bc6e
DH		 1140 msleep(20);
1141
22d5c6f5 1142 if (priv->fw_checksum_supported) {
2621c0b3 1143 if (xc5000_readreg(priv, XREG_FW_CHECKSUM, &fw_ck)) {
ee67674a
MCC		 1144 printk(KERN_ERR
1145 "xc5000: FW checksum reading failed.");
2621c0b3 1146 continue;
22d5c6f5
DH		 1147 }
1148
2621c0b3 1149 if (!fw_ck) {
ee67674a
MCC		 1150 printk(KERN_ERR
1151 "xc5000: FW checksum failed = 0x%04x.",
1152 fw_ck);
2621c0b3 1153 continue;
22d5c6f5
DH		 1154 }
1155 }
1156
fc7a74ba 1157 /* Start the tuner self-calibration process */
2621c0b3
MCC		 1158 ret = xc_initialize(priv);
1159 if (ret) {
26c7e7bc 1160 printk(KERN_ERR "xc5000: Can't request self-calibration.");
2621c0b3
MCC		 1161 continue;
1162 }
de49bc6e 1163
fc7a74ba
DH		 1164 /* Wait for calibration to complete.
1165 * We could continue but XC5000 will clock stretch subsequent
1166 * I2C transactions until calibration is complete. This way we
1167 * don't have to rely on clock stretching working.
1168 */
e5bf4a11 1169 msleep(100);
aacb9d31 1170
22d5c6f5 1171 if (priv->init_status_supported) {
2621c0b3 1172 if (xc5000_readreg(priv, XREG_INIT_STATUS, &fw_ck)) {
ee67674a
MCC		 1173 printk(KERN_ERR
1174 "xc5000: FW failed reading init status.");
2621c0b3 1175 continue;
22d5c6f5
DH		 1176 }
1177
2621c0b3 1178 if (!fw_ck) {
ee67674a
MCC		 1179 printk(KERN_ERR
1180 "xc5000: FW init status failed = 0x%04x.",
1181 fw_ck);
2621c0b3 1182 continue;
22d5c6f5
DH		 1183 }
1184 }
1185
de49bc6e 1186 if (priv->pll_register_no) {
7621b8c4
MCC		 1187 ret = xc5000_readreg(priv, priv->pll_register_no,
1188 &pll_lock_status);
1189 if (ret)
1190 continue;
de49bc6e
DH		 1191 if (pll_lock_status > 63) {
1192 /* PLL is unlocked, force reload of the firmware */
ee67674a
MCC		 1193 printk(KERN_ERR
1194 "xc5000: PLL not running after fwload.");
2621c0b3 1195 continue;
de49bc6e
DH		 1196 }
1197 }
1198
fc7a74ba 1199 /* Default to "CABLE" mode */
2621c0b3 1200 ret = xc_write_reg(priv, XREG_SIGNALSOURCE, XC_RF_MODE_CABLE);
ee67674a
MCC		 1201 if (!ret)
1202 break;
1203 printk(KERN_ERR "xc5000: can't set to cable mode.");
fc7a74ba 1204 }
aacb9d31 1205
8604f355 1206err:
ee67674a
MCC		 1207 if (!ret)
1208 printk(KERN_INFO "xc5000: Firmware %s loaded and running.\n",
1209 desired_fw->name);
1210 else
1211 printk(KERN_CONT " - too many retries. Giving up\n");
1212
aacb9d31
ST		 1213 return ret;
1214}
1215
f7a27ff1 1216static void xc5000_do_timer_sleep(struct work_struct *timer_sleep)
e12671cf 1217{
f7a27ff1
MCC		 1218 struct xc5000_priv *priv =container_of(timer_sleep, struct xc5000_priv,
1219 timer_sleep.work);
1220 struct dvb_frontend *fe = priv->fe;
27c685a4
ST		 1221 int ret;
1222
271ddbf7 1223 dprintk(1, "%s()\n", __func__);
e12671cf 1224
7f05b530
DH		 1225 /* According to Xceive technical support, the "powerdown" register
1226 was removed in newer versions of the firmware. The "supported"
1227 way to sleep the tuner is to pull the reset pin low for 10ms */
303ddd92 1228 ret = xc5000_tuner_reset(fe);
f7a27ff1 1229 if (ret != 0)
27c685a4
ST		 1230 printk(KERN_ERR
1231 "xc5000: %s() unable to shutdown tuner\n",
271ddbf7 1232 __func__);
f7a27ff1
MCC		 1233}
1234
1235static int xc5000_sleep(struct dvb_frontend *fe)
1236{
1237 struct xc5000_priv *priv = fe->tuner_priv;
1238
1239 dprintk(1, "%s()\n", __func__);
1240
1241 /* Avoid firmware reload on slow devices */
1242 if (no_poweroff)
859ae7f0 1243 return 0;
f7a27ff1
MCC		 1244
1245 schedule_delayed_work(&priv->timer_sleep,
1246 msecs_to_jiffies(XC5000_SLEEP_TIME));
1247
1248 return 0;
e12671cf
ST		 1249}
1250
91a5307c
MCC		 1251static int xc5000_suspend(struct dvb_frontend *fe)
1252{
1253 struct xc5000_priv *priv = fe->tuner_priv;
1254 int ret;
1255
1256 dprintk(1, "%s()\n", __func__);
1257
1258 cancel_delayed_work(&priv->timer_sleep);
1259
1260 ret = xc5000_tuner_reset(fe);
1261 if (ret != 0)
1262 printk(KERN_ERR
1263 "xc5000: %s() unable to shutdown tuner\n",
1264 __func__);
1265
1266 return 0;
1267}
1268
27ccd694
SK		 1269static int xc5000_resume(struct dvb_frontend *fe)
1270{
1271 struct xc5000_priv *priv = fe->tuner_priv;
1272
1273 dprintk(1, "%s()\n", __func__);
1274
1275 /* suspended before firmware is loaded.
1276 Avoid firmware load in resume path. */
1277 if (!priv->firmware)
1278 return 0;
1279
1280 return xc5000_set_params(fe);
1281}
1282
aacb9d31
ST		 1283static int xc5000_init(struct dvb_frontend *fe)
1284{
1285 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1286 dprintk(1, "%s()\n", __func__);
aacb9d31 1287
859ae7f0 1288 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
e12671cf
ST		 1289 printk(KERN_ERR "xc5000: Unable to initialise tuner\n");
1290 return -EREMOTEIO;
1291 }
1292
1293 if (debug)
1294 xc_debug_dump(priv);
aacb9d31
ST		 1295
1296 return 0;
1297}
1298
194ced7a 1299static void xc5000_release(struct dvb_frontend *fe)
aacb9d31 1300{
89fd2854
MK		 1301 struct xc5000_priv *priv = fe->tuner_priv;
1302
271ddbf7 1303 dprintk(1, "%s()\n", __func__);
89fd2854
MK		 1304
1305 mutex_lock(&xc5000_list_mutex);
1306
f7a27ff1
MCC		 1307 if (priv) {
1308 cancel_delayed_work(&priv->timer_sleep);
856260a5
DH		 1309 if (priv->firmware) {
1310 release_firmware(priv->firmware);
1311 priv->firmware = NULL;
1312 }
4961a532 1313 hybrid_tuner_release_state(priv);
f7a27ff1 1314 }
89fd2854
MK		 1315
1316 mutex_unlock(&xc5000_list_mutex);
1317
aacb9d31 1318 fe->tuner_priv = NULL;
aacb9d31
ST		 1319}
1320
724dcbfa
DB		 1321static int xc5000_set_config(struct dvb_frontend *fe, void *priv_cfg)
1322{
1323 struct xc5000_priv *priv = fe->tuner_priv;
1324 struct xc5000_config *p = priv_cfg;
1325
1326 dprintk(1, "%s()\n", __func__);
1327
1328 if (p->if_khz)
1329 priv->if_khz = p->if_khz;
1330
1331 if (p->radio_input)
1332 priv->radio_input = p->radio_input;
1333
52e269b1
RV		 1334 if (p->output_amp)
1335 priv->output_amp = p->output_amp;
1336
724dcbfa
DB		 1337 return 0;
1338}
1339
1340
aacb9d31
ST		 1341static const struct dvb_tuner_ops xc5000_tuner_ops = {
1342 .info = {
a3f90c75
MCC		 1343 .name = "Xceive XC5000",
1344 .frequency_min_hz = 1 * MHz,
1345 .frequency_max_hz = 1023 * MHz,
1346 .frequency_step_hz = 50 * kHz,
aacb9d31
ST		 1347 },
1348
27c685a4
ST		 1349 .release = xc5000_release,
1350 .init = xc5000_init,
1351 .sleep = xc5000_sleep,
91a5307c 1352 .suspend = xc5000_suspend,
27ccd694 1353 .resume = xc5000_resume,
aacb9d31 1354
724dcbfa 1355 .set_config = xc5000_set_config,
59b94f3e 1356 .set_params = xc5000_set_digital_params,
27c685a4
ST		 1357 .set_analog_params = xc5000_set_analog_params,
1358 .get_frequency = xc5000_get_frequency,
35621030 1359 .get_if_frequency = xc5000_get_if_frequency,
27c685a4
ST		 1360 .get_bandwidth = xc5000_get_bandwidth,
1361 .get_status = xc5000_get_status
aacb9d31
ST		 1362};
1363
48723543
MK		 1364struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe,
1365 struct i2c_adapter *i2c,
2e4e98e7 1366 const struct xc5000_config *cfg)
aacb9d31
ST		 1367{
1368 struct xc5000_priv *priv = NULL;
89fd2854 1369 int instance;
aacb9d31
ST		 1370 u16 id = 0;
1371
89fd2854
MK		 1372 dprintk(1, "%s(%d-%04x)\n", __func__,
1373 i2c ? i2c_adapter_id(i2c) : -1,
1374 cfg ? cfg->i2c_address : -1);
aacb9d31 1375
89fd2854 1376 mutex_lock(&xc5000_list_mutex);
aacb9d31 1377
89fd2854
MK		 1378 instance = hybrid_tuner_request_state(struct xc5000_priv, priv,
1379 hybrid_tuner_instance_list,
1380 i2c, cfg->i2c_address, "xc5000");
1381 switch (instance) {
1382 case 0:
1383 goto fail;
89fd2854
MK		 1384 case 1:
1385 /* new tuner instance */
c6f56e7d 1386 priv->bandwidth = 6000000;
89fd2854 1387 fe->tuner_priv = priv;
f7a27ff1
MCC		 1388 priv->fe = fe;
1389 INIT_DELAYED_WORK(&priv->timer_sleep, xc5000_do_timer_sleep);
89fd2854
MK		 1390 break;
1391 default:
1392 /* existing tuner instance */
1393 fe->tuner_priv = priv;
1394 break;
1395 }
aacb9d31 1396
ea227863
DH		 1397 if (priv->if_khz == 0) {
1398 /* If the IF hasn't been set yet, use the value provided by
1399 the caller (occurs in hybrid devices where the analog
1400 call to xc5000_attach occurs before the digital side) */
1401 priv->if_khz = cfg->if_khz;
1402 }
1403
7d3d0d8d
MK		 1404 if (priv->xtal_khz == 0)
1405 priv->xtal_khz = cfg->xtal_khz;
1406
496e9057
DH		 1407 if (priv->radio_input == 0)
1408 priv->radio_input = cfg->radio_input;
1409
6fab81df 1410 /* don't override chip id if it's already been set
76efb0ba 1411 unless explicitly specified */
6fab81df
MK		 1412 if ((priv->chip_id == 0) || (cfg->chip_id))
1413 /* use default chip id if none specified, set to 0 so
1414 it can be overridden if this is a hybrid driver */
1415 priv->chip_id = (cfg->chip_id) ? cfg->chip_id : 0;
76efb0ba 1416
52e269b1
RV		 1417 /* don't override output_amp if it's already been set
1418 unless explicitly specified */
1419 if ((priv->output_amp == 0) || (cfg->output_amp))
1420 /* use default output_amp value if none specified */
1421 priv->output_amp = (cfg->output_amp) ? cfg->output_amp : 0x8a;
1422
27c685a4
ST		 1423 /* Check if firmware has been loaded. It is possible that another
1424 instance of the driver has loaded the firmware.
1425 */
859ae7f0 1426 if (xc5000_readreg(priv, XREG_PRODUCT_ID, &id) != 0)
89fd2854 1427 goto fail;
aacb9d31 1428
8f3cd530 1429 switch (id) {
27c685a4
ST		 1430 case XC_PRODUCT_ID_FW_LOADED:
1431 printk(KERN_INFO
1432 "xc5000: Successfully identified at address 0x%02x\n",
1433 cfg->i2c_address);
1434 printk(KERN_INFO
1435 "xc5000: Firmware has been loaded previously\n");
27c685a4
ST		 1436 break;
1437 case XC_PRODUCT_ID_FW_NOT_LOADED:
1438 printk(KERN_INFO
1439 "xc5000: Successfully identified at address 0x%02x\n",
1440 cfg->i2c_address);
1441 printk(KERN_INFO
1442 "xc5000: Firmware has not been loaded previously\n");
27c685a4
ST		 1443 break;
1444 default:
aacb9d31
ST		 1445 printk(KERN_ERR
1446 "xc5000: Device not found at addr 0x%02x (0x%x)\n",
1447 cfg->i2c_address, id);
89fd2854 1448 goto fail;
aacb9d31
ST		 1449 }
1450
89fd2854
MK		 1451 mutex_unlock(&xc5000_list_mutex);
1452
aacb9d31
ST		 1453 memcpy(&fe->ops.tuner_ops, &xc5000_tuner_ops,
1454 sizeof(struct dvb_tuner_ops));
1455
aacb9d31 1456 return fe;
89fd2854
MK		 1457fail:
1458 mutex_unlock(&xc5000_list_mutex);
1459
1460 xc5000_release(fe);
1461 return NULL;
aacb9d31
ST		 1462}
1463EXPORT_SYMBOL(xc5000_attach);
1464
1465MODULE_AUTHOR("Steven Toth");
e12671cf 1466MODULE_DESCRIPTION("Xceive xc5000 silicon tuner driver");
aacb9d31 1467MODULE_LICENSE("GPL");
3422f2a6
TG		 1468MODULE_FIRMWARE(XC5000A_FIRMWARE);
1469MODULE_FIRMWARE(XC5000C_FIRMWARE);
Linux 6.x block layer and io_uring tree(s)