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Merge branch 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / drivers / media / tuners / xc5000.c
CommitLineData
aacb9d31
ST		 1/*
2 * Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2007 Xceive Corporation
6d897616 5 * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
e80858e8 6 * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com>
aacb9d31
ST		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 *
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/module.h>
25#include <linux/moduleparam.h>
4917019d 26#include <linux/videodev2.h>
aacb9d31 27#include <linux/delay.h>
f7a27ff1 28#include <linux/workqueue.h>
aacb9d31
ST		 29#include <linux/dvb/frontend.h>
30#include <linux/i2c.h>
31
32#include "dvb_frontend.h"
33
34#include "xc5000.h"
89fd2854 35#include "tuner-i2c.h"
aacb9d31
ST		 36
37static int debug;
38module_param(debug, int, 0644);
39MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
40
b6bd5eb8
DH		 41static int no_poweroff;
42module_param(no_poweroff, int, 0644);
43MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
44 "\t\t1 keep device energized and with tuner ready all the times.\n"
45 "\t\tFaster, but consumes more power and keeps the device hotter");
46
89fd2854
MK		 47static DEFINE_MUTEX(xc5000_list_mutex);
48static LIST_HEAD(hybrid_tuner_instance_list);
49
8f3cd530 50#define dprintk(level, fmt, arg...) if (debug >= level) \
aacb9d31
ST		 51 printk(KERN_INFO "%s: " fmt, "xc5000", ## arg)
52
ffb41234 53struct xc5000_priv {
89fd2854
MK		 54 struct tuner_i2c_props i2c_props;
55 struct list_head hybrid_tuner_instance_list;
ffb41234 56
2a6003c2 57 u32 if_khz;
409328a4 58 u16 xtal_khz;
a3eec916 59 u32 freq_hz, freq_offset;
ffb41234
MK		 60 u32 bandwidth;
61 u8 video_standard;
16435202 62 unsigned int mode;
ffb41234 63 u8 rf_mode;
496e9057 64 u8 radio_input;
52e269b1 65 u16 output_amp;
76efb0ba 66
6fab81df 67 int chip_id;
de49bc6e 68 u16 pll_register_no;
22d5c6f5
DH		 69 u8 init_status_supported;
70 u8 fw_checksum_supported;
f7a27ff1
MCC		 71
72 struct dvb_frontend *fe;
73 struct delayed_work timer_sleep;
5264a522
SK		 74
75 const struct firmware *firmware;
ffb41234
MK		 76};
77
aacb9d31 78/* Misc Defines */
724dcbfa 79#define MAX_TV_STANDARD 24
aacb9d31
ST		 80#define XC_MAX_I2C_WRITE_LENGTH 64
81
f7a27ff1
MCC		 82/* Time to suspend after the .sleep callback is called */
83#define XC5000_SLEEP_TIME 5000 /* ms */
84
aacb9d31
ST		 85/* Signal Types */
86#define XC_RF_MODE_AIR 0
87#define XC_RF_MODE_CABLE 1
88
27c685a4
ST		 89/* Product id */
90#define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000
5015c27b 91#define XC_PRODUCT_ID_FW_LOADED 0x1388
27c685a4 92
aacb9d31
ST		 93/* Registers */
94#define XREG_INIT 0x00
95#define XREG_VIDEO_MODE 0x01
96#define XREG_AUDIO_MODE 0x02
97#define XREG_RF_FREQ 0x03
98#define XREG_D_CODE 0x04
99#define XREG_IF_OUT 0x05
100#define XREG_SEEK_MODE 0x07
7f05b530 101#define XREG_POWER_DOWN 0x0A /* Obsolete */
724dcbfa
DB		 102/* Set the output amplitude - SIF for analog, DTVP/DTVN for digital */
103#define XREG_OUTPUT_AMP 0x0B
aacb9d31
ST		 104#define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */
105#define XREG_SMOOTHEDCVBS 0x0E
106#define XREG_XTALFREQ 0x0F
81c4dfe7 107#define XREG_FINERFREQ 0x10
aacb9d31
ST		 108#define XREG_DDIMODE 0x11
109
110#define XREG_ADC_ENV 0x00
111#define XREG_QUALITY 0x01
112#define XREG_FRAME_LINES 0x02
113#define XREG_HSYNC_FREQ 0x03
114#define XREG_LOCK 0x04
115#define XREG_FREQ_ERROR 0x05
116#define XREG_SNR 0x06
117#define XREG_VERSION 0x07
118#define XREG_PRODUCT_ID 0x08
119#define XREG_BUSY 0x09
bae7b7d7 120#define XREG_BUILD 0x0D
7c287f18 121#define XREG_TOTALGAIN 0x0F
22d5c6f5
DH		 122#define XREG_FW_CHECKSUM 0x12
123#define XREG_INIT_STATUS 0x13
aacb9d31
ST		 124
125/*
126 Basic firmware description. This will remain with
127 the driver for documentation purposes.
128
129 This represents an I2C firmware file encoded as a
130 string of unsigned char. Format is as follows:
131
132 char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB
133 char[1 ]=len0_LSB -> length of first write transaction
134 char[2 ]=data0 -> first byte to be sent
135 char[3 ]=data1
136 char[4 ]=data2
137 char[ ]=...
138 char[M ]=dataN -> last byte to be sent
139 char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB
140 char[M+2]=len1_LSB -> length of second write transaction
141 char[M+3]=data0
142 char[M+4]=data1
143 ...
144 etc.
145
146 The [len] value should be interpreted as follows:
147
148 len= len_MSB _ len_LSB
149 len=1111_1111_1111_1111 : End of I2C_SEQUENCE
150 len=0000_0000_0000_0000 : Reset command: Do hardware reset
151 len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767)
152 len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms
153
154 For the RESET and WAIT commands, the two following bytes will contain
155 immediately the length of the following transaction.
156
157*/
8f3cd530 158struct XC_TV_STANDARD {
303ddd92
MCC		 159 char *name;
160 u16 audio_mode;
161 u16 video_mode;
8f3cd530 162};
aacb9d31
ST		 163
164/* Tuner standards */
27c685a4
ST		 165#define MN_NTSC_PAL_BTSC 0
166#define MN_NTSC_PAL_A2 1
167#define MN_NTSC_PAL_EIAJ 2
303ddd92 168#define MN_NTSC_PAL_MONO 3
27c685a4
ST		 169#define BG_PAL_A2 4
170#define BG_PAL_NICAM 5
171#define BG_PAL_MONO 6
172#define I_PAL_NICAM 7
173#define I_PAL_NICAM_MONO 8
174#define DK_PAL_A2 9
175#define DK_PAL_NICAM 10
176#define DK_PAL_MONO 11
177#define DK_SECAM_A2DK1 12
5015c27b
MCC		 178#define DK_SECAM_A2LDK3 13
179#define DK_SECAM_A2MONO 14
27c685a4
ST		 180#define L_SECAM_NICAM 15
181#define LC_SECAM_NICAM 16
182#define DTV6 17
183#define DTV8 18
184#define DTV7_8 19
185#define DTV7 20
5015c27b
MCC		 186#define FM_RADIO_INPUT2 21
187#define FM_RADIO_INPUT1 22
303ddd92 188#define FM_RADIO_INPUT1_MONO 23
aacb9d31 189
303ddd92 190static struct XC_TV_STANDARD xc5000_standard[MAX_TV_STANDARD] = {
aacb9d31
ST		 191 {"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020},
192 {"M/N-NTSC/PAL-A2", 0x0600, 0x8020},
193 {"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020},
194 {"M/N-NTSC/PAL-Mono", 0x0478, 0x8020},
195 {"B/G-PAL-A2", 0x0A00, 0x8049},
196 {"B/G-PAL-NICAM", 0x0C04, 0x8049},
197 {"B/G-PAL-MONO", 0x0878, 0x8059},
198 {"I-PAL-NICAM", 0x1080, 0x8009},
199 {"I-PAL-NICAM-MONO", 0x0E78, 0x8009},
200 {"D/K-PAL-A2", 0x1600, 0x8009},
201 {"D/K-PAL-NICAM", 0x0E80, 0x8009},
202 {"D/K-PAL-MONO", 0x1478, 0x8009},
203 {"D/K-SECAM-A2 DK1", 0x1200, 0x8009},
8f3cd530 204 {"D/K-SECAM-A2 L/DK3", 0x0E00, 0x8009},
aacb9d31
ST		 205 {"D/K-SECAM-A2 MONO", 0x1478, 0x8009},
206 {"L-SECAM-NICAM", 0x8E82, 0x0009},
207 {"L'-SECAM-NICAM", 0x8E82, 0x4009},
208 {"DTV6", 0x00C0, 0x8002},
209 {"DTV8", 0x00C0, 0x800B},
210 {"DTV7/8", 0x00C0, 0x801B},
211 {"DTV7", 0x00C0, 0x8007},
212 {"FM Radio-INPUT2", 0x9802, 0x9002},
724dcbfa
DB		 213 {"FM Radio-INPUT1", 0x0208, 0x9002},
214 {"FM Radio-INPUT1_MONO", 0x0278, 0x9002}
aacb9d31
ST		 215};
216
ddea427f
MK		 217
218struct xc5000_fw_cfg {
219 char *name;
220 u16 size;
de49bc6e 221 u16 pll_reg;
22d5c6f5
DH		 222 u8 init_status_supported;
223 u8 fw_checksum_supported;
ddea427f
MK		 224};
225
3422f2a6 226#define XC5000A_FIRMWARE "dvb-fe-xc5000-1.6.114.fw"
a3db60bc 227static const struct xc5000_fw_cfg xc5000a_1_6_114 = {
3422f2a6 228 .name = XC5000A_FIRMWARE,
76efb0ba 229 .size = 12401,
de49bc6e 230 .pll_reg = 0x806c,
76efb0ba
MK		 231};
232
3de5bffd 233#define XC5000C_FIRMWARE "dvb-fe-xc5000c-4.1.30.7.fw"
7d3d0d8d 234static const struct xc5000_fw_cfg xc5000c_41_024_5 = {
3422f2a6 235 .name = XC5000C_FIRMWARE,
7d3d0d8d 236 .size = 16497,
de49bc6e 237 .pll_reg = 0x13,
22d5c6f5
DH		 238 .init_status_supported = 1,
239 .fw_checksum_supported = 1,
d8398805
MK		 240};
241
a3db60bc 242static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id)
ddea427f 243{
6fab81df 244 switch (chip_id) {
ddea427f 245 default:
6fab81df 246 case XC5000A:
ddea427f 247 return &xc5000a_1_6_114;
6fab81df 248 case XC5000C:
7d3d0d8d 249 return &xc5000c_41_024_5;
ddea427f
MK		 250 }
251}
252
de49bc6e 253static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force);
91bd625e 254static int xc5000_is_firmware_loaded(struct dvb_frontend *fe);
bdd33563 255static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val);
303ddd92 256static int xc5000_tuner_reset(struct dvb_frontend *fe);
aacb9d31 257
e12671cf 258static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
aacb9d31 259{
d7800d4e
DH		 260 struct i2c_msg msg = { .addr = priv->i2c_props.addr,
261 .flags = 0, .buf = buf, .len = len };
262
263 if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
264 printk(KERN_ERR "xc5000: I2C write failed (len=%i)\n", len);
859ae7f0 265 return -EREMOTEIO;
d7800d4e 266 }
859ae7f0 267 return 0;
aacb9d31
ST		 268}
269
1cdffda7 270#if 0
bdd33563
DH		 271/* This routine is never used because the only time we read data from the
272 i2c bus is when we read registers, and we want that to be an atomic i2c
273 transaction in case we are on a multi-master bus */
e12671cf 274static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
aacb9d31 275{
bdd33563
DH		 276 struct i2c_msg msg = { .addr = priv->i2c_props.addr,
277 .flags = I2C_M_RD, .buf = buf, .len = len };
278
279 if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
280 printk(KERN_ERR "xc5000 I2C read failed (len=%i)\n", len);
281 return -EREMOTEIO;
282 }
283 return 0;
aacb9d31 284}
1cdffda7 285#endif
aacb9d31 286
4743319f
DB		 287static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val)
288{
289 u8 buf[2] = { reg >> 8, reg & 0xff };
290 u8 bval[2] = { 0, 0 };
291 struct i2c_msg msg[2] = {
292 { .addr = priv->i2c_props.addr,
293 .flags = 0, .buf = &buf[0], .len = 2 },
294 { .addr = priv->i2c_props.addr,
295 .flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
296 };
297
298 if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
299 printk(KERN_WARNING "xc5000: I2C read failed\n");
300 return -EREMOTEIO;
301 }
302
303 *val = (bval[0] << 8) | bval[1];
859ae7f0 304 return 0;
4743319f
DB		 305}
306
303ddd92 307static int xc5000_tuner_reset(struct dvb_frontend *fe)
aacb9d31
ST		 308{
309 struct xc5000_priv *priv = fe->tuner_priv;
310 int ret;
311
271ddbf7 312 dprintk(1, "%s()\n", __func__);
aacb9d31 313
d7cba043
MK		 314 if (fe->callback) {
315 ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
30650961
MK		 316 fe->dvb->priv :
317 priv->i2c_props.adap->algo_data,
d7cba043 318 DVB_FRONTEND_COMPONENT_TUNER,
30650961 319 XC5000_TUNER_RESET, 0);
91bd625e 320 if (ret) {
aacb9d31 321 printk(KERN_ERR "xc5000: reset failed\n");
859ae7f0 322 return ret;
91bd625e
DH		 323 }
324 } else {
27c685a4 325 printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n");
859ae7f0 326 return -EINVAL;
91bd625e 327 }
859ae7f0 328 return 0;
aacb9d31
ST		 329}
330
303ddd92 331static int xc_write_reg(struct xc5000_priv *priv, u16 reg_addr, u16 i2c_data)
aacb9d31 332{
e12671cf 333 u8 buf[4];
303ddd92 334 int watch_dog_timer = 100;
aacb9d31
ST		 335 int result;
336
303ddd92
MCC		 337 buf[0] = (reg_addr >> 8) & 0xFF;
338 buf[1] = reg_addr & 0xFF;
339 buf[2] = (i2c_data >> 8) & 0xFF;
340 buf[3] = i2c_data & 0xFF;
aacb9d31 341 result = xc_send_i2c_data(priv, buf, 4);
859ae7f0 342 if (result == 0) {
aacb9d31 343 /* wait for busy flag to clear */
303ddd92 344 while ((watch_dog_timer > 0) && (result == 0)) {
1cdffda7 345 result = xc5000_readreg(priv, XREG_BUSY, (u16 *)buf);
859ae7f0 346 if (result == 0) {
4743319f
DB		 347 if ((buf[0] == 0) && (buf[1] == 0)) {
348 /* busy flag cleared */
aacb9d31 349 break;
4743319f 350 } else {
e5bf4a11 351 msleep(5); /* wait 5 ms */
303ddd92 352 watch_dog_timer--;
aacb9d31
ST		 353 }
354 }
355 }
356 }
303ddd92 357 if (watch_dog_timer <= 0)
859ae7f0 358 result = -EREMOTEIO;
aacb9d31
ST		 359
360 return result;
361}
362
c63e87e9 363static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence)
aacb9d31
ST		 364{
365 struct xc5000_priv *priv = fe->tuner_priv;
366
367 int i, nbytes_to_send, result;
368 unsigned int len, pos, index;
e12671cf 369 u8 buf[XC_MAX_I2C_WRITE_LENGTH];
aacb9d31 370
8f3cd530
ST		 371 index = 0;
372 while ((i2c_sequence[index] != 0xFF) ||
373 (i2c_sequence[index + 1] != 0xFF)) {
374 len = i2c_sequence[index] * 256 + i2c_sequence[index+1];
e12671cf 375 if (len == 0x0000) {
aacb9d31 376 /* RESET command */
303ddd92 377 result = xc5000_tuner_reset(fe);
aacb9d31 378 index += 2;
859ae7f0 379 if (result != 0)
aacb9d31
ST		 380 return result;
381 } else if (len & 0x8000) {
382 /* WAIT command */
e5bf4a11 383 msleep(len & 0x7FFF);
aacb9d31
ST		 384 index += 2;
385 } else {
386 /* Send i2c data whilst ensuring individual transactions
387 * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes.
388 */
389 index += 2;
390 buf[0] = i2c_sequence[index];
391 buf[1] = i2c_sequence[index + 1];
392 pos = 2;
393 while (pos < len) {
8f3cd530
ST		 394 if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2)
395 nbytes_to_send =
396 XC_MAX_I2C_WRITE_LENGTH;
397 else
aacb9d31 398 nbytes_to_send = (len - pos + 2);
8f3cd530
ST		 399 for (i = 2; i < nbytes_to_send; i++) {
400 buf[i] = i2c_sequence[index + pos +
401 i - 2];
aacb9d31 402 }
8f3cd530
ST		 403 result = xc_send_i2c_data(priv, buf,
404 nbytes_to_send);
aacb9d31 405
859ae7f0 406 if (result != 0)
aacb9d31
ST		 407 return result;
408
409 pos += nbytes_to_send - 2;
410 }
411 index += len;
412 }
413 }
859ae7f0 414 return 0;
aacb9d31
ST		 415}
416
e12671cf 417static int xc_initialize(struct xc5000_priv *priv)
aacb9d31 418{
271ddbf7 419 dprintk(1, "%s()\n", __func__);
aacb9d31
ST		 420 return xc_write_reg(priv, XREG_INIT, 0);
421}
422
303ddd92
MCC		 423static int xc_set_tv_standard(struct xc5000_priv *priv,
424 u16 video_mode, u16 audio_mode, u8 radio_mode)
aacb9d31
ST		 425{
426 int ret;
303ddd92
MCC		 427 dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode);
428 if (radio_mode) {
01ae7286
DB		 429 dprintk(1, "%s() Standard = %s\n",
430 __func__,
303ddd92 431 xc5000_standard[radio_mode].name);
01ae7286
DB		 432 } else {
433 dprintk(1, "%s() Standard = %s\n",
434 __func__,
303ddd92 435 xc5000_standard[priv->video_standard].name);
01ae7286 436 }
aacb9d31 437
303ddd92 438 ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode);
859ae7f0 439 if (ret == 0)
303ddd92 440 ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode);
aacb9d31
ST		 441
442 return ret;
443}
444
303ddd92 445static int xc_set_signal_source(struct xc5000_priv *priv, u16 rf_mode)
aacb9d31 446{
271ddbf7 447 dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode,
aacb9d31
ST		 448 rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE");
449
8f3cd530 450 if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) {
aacb9d31
ST		 451 rf_mode = XC_RF_MODE_CABLE;
452 printk(KERN_ERR
453 "%s(), Invalid mode, defaulting to CABLE",
271ddbf7 454 __func__);
aacb9d31
ST		 455 }
456 return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);
457}
458
e12671cf 459static const struct dvb_tuner_ops xc5000_tuner_ops;
aacb9d31 460
303ddd92 461static int xc_set_rf_frequency(struct xc5000_priv *priv, u32 freq_hz)
e12671cf
ST		 462{
463 u16 freq_code;
aacb9d31 464
271ddbf7 465 dprintk(1, "%s(%u)\n", __func__, freq_hz);
aacb9d31 466
e12671cf
ST		 467 if ((freq_hz > xc5000_tuner_ops.info.frequency_max) ||
468 (freq_hz < xc5000_tuner_ops.info.frequency_min))
859ae7f0 469 return -EINVAL;
aacb9d31 470
e12671cf
ST		 471 freq_code = (u16)(freq_hz / 15625);
472
81c4dfe7
DH		 473 /* Starting in firmware version 1.1.44, Xceive recommends using the
474 FINERFREQ for all normal tuning (the doc indicates reg 0x03 should
475 only be used for fast scanning for channel lock) */
476 return xc_write_reg(priv, XREG_FINERFREQ, freq_code);
aacb9d31
ST		 477}
478
aacb9d31 479
e12671cf
ST		 480static int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz)
481{
482 u32 freq_code = (freq_khz * 1024)/1000;
483 dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n",
271ddbf7 484 __func__, freq_khz, freq_code);
aacb9d31 485
e12671cf 486 return xc_write_reg(priv, XREG_IF_OUT, freq_code);
aacb9d31
ST		 487}
488
aacb9d31 489
303ddd92 490static int xc_get_adc_envelope(struct xc5000_priv *priv, u16 *adc_envelope)
aacb9d31 491{
bdd33563 492 return xc5000_readreg(priv, XREG_ADC_ENV, adc_envelope);
aacb9d31
ST		 493}
494
e12671cf 495static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz)
aacb9d31
ST		 496{
497 int result;
303ddd92 498 u16 reg_data;
aacb9d31
ST		 499 u32 tmp;
500
303ddd92 501 result = xc5000_readreg(priv, XREG_FREQ_ERROR, &reg_data);
859ae7f0 502 if (result != 0)
aacb9d31
ST		 503 return result;
504
303ddd92 505 tmp = (u32)reg_data;
e12671cf 506 (*freq_error_hz) = (tmp * 15625) / 1000;
aacb9d31
ST		 507 return result;
508}
509
e12671cf 510static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status)
aacb9d31 511{
bdd33563 512 return xc5000_readreg(priv, XREG_LOCK, lock_status);
aacb9d31
ST		 513}
514
e12671cf
ST		 515static int xc_get_version(struct xc5000_priv *priv,
516 u8 *hw_majorversion, u8 *hw_minorversion,
517 u8 *fw_majorversion, u8 *fw_minorversion)
aacb9d31 518{
e12671cf 519 u16 data;
aacb9d31
ST		 520 int result;
521
bdd33563 522 result = xc5000_readreg(priv, XREG_VERSION, &data);
859ae7f0 523 if (result != 0)
aacb9d31
ST		 524 return result;
525
e12671cf
ST		 526 (*hw_majorversion) = (data >> 12) & 0x0F;
527 (*hw_minorversion) = (data >> 8) & 0x0F;
528 (*fw_majorversion) = (data >> 4) & 0x0F;
529 (*fw_minorversion) = data & 0x0F;
aacb9d31
ST		 530
531 return 0;
532}
533
bae7b7d7
DH		 534static int xc_get_buildversion(struct xc5000_priv *priv, u16 *buildrev)
535{
536 return xc5000_readreg(priv, XREG_BUILD, buildrev);
537}
538
e12671cf 539static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz)
aacb9d31 540{
303ddd92 541 u16 reg_data;
aacb9d31
ST		 542 int result;
543
303ddd92 544 result = xc5000_readreg(priv, XREG_HSYNC_FREQ, &reg_data);
859ae7f0 545 if (result != 0)
aacb9d31
ST		 546 return result;
547
303ddd92 548 (*hsync_freq_hz) = ((reg_data & 0x0fff) * 763)/100;
aacb9d31
ST		 549 return result;
550}
551
e12671cf 552static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines)
aacb9d31 553{
bdd33563 554 return xc5000_readreg(priv, XREG_FRAME_LINES, frame_lines);
aacb9d31
ST		 555}
556
e12671cf 557static int xc_get_quality(struct xc5000_priv *priv, u16 *quality)
aacb9d31 558{
bdd33563 559 return xc5000_readreg(priv, XREG_QUALITY, quality);
aacb9d31
ST		 560}
561
7c287f18
DH		 562static int xc_get_analogsnr(struct xc5000_priv *priv, u16 *snr)
563{
564 return xc5000_readreg(priv, XREG_SNR, snr);
565}
566
567static int xc_get_totalgain(struct xc5000_priv *priv, u16 *totalgain)
568{
569 return xc5000_readreg(priv, XREG_TOTALGAIN, totalgain);
570}
571
303ddd92 572static u16 wait_for_lock(struct xc5000_priv *priv)
aacb9d31 573{
303ddd92
MCC		 574 u16 lock_state = 0;
575 int watch_dog_count = 40;
e12671cf 576
303ddd92
MCC		 577 while ((lock_state == 0) && (watch_dog_count > 0)) {
578 xc_get_lock_status(priv, &lock_state);
579 if (lock_state != 1) {
e5bf4a11 580 msleep(5);
303ddd92 581 watch_dog_count--;
aacb9d31
ST		 582 }
583 }
303ddd92 584 return lock_state;
aacb9d31
ST		 585}
586
a78baacf
DH		 587#define XC_TUNE_ANALOG 0
588#define XC_TUNE_DIGITAL 1
589static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode)
aacb9d31
ST		 590{
591 int found = 0;
592
271ddbf7 593 dprintk(1, "%s(%u)\n", __func__, freq_hz);
aacb9d31 594
303ddd92 595 if (xc_set_rf_frequency(priv, freq_hz) != 0)
aacb9d31
ST		 596 return 0;
597
a78baacf 598 if (mode == XC_TUNE_ANALOG) {
303ddd92 599 if (wait_for_lock(priv) == 1)
a78baacf
DH		 600 found = 1;
601 }
aacb9d31
ST		 602
603 return found;
604}
605
7d3d0d8d
MK		 606static int xc_set_xtal(struct dvb_frontend *fe)
607{
608 struct xc5000_priv *priv = fe->tuner_priv;
859ae7f0 609 int ret = 0;
7d3d0d8d
MK		 610
611 switch (priv->chip_id) {
612 default:
613 case XC5000A:
614 /* 32.000 MHz xtal is default */
615 break;
616 case XC5000C:
617 switch (priv->xtal_khz) {
618 default:
619 case 32000:
620 /* 32.000 MHz xtal is default */
621 break;
622 case 31875:
623 /* 31.875 MHz xtal configuration */
624 ret = xc_write_reg(priv, 0x000f, 0x8081);
625 break;
626 }
627 break;
628 }
629 return ret;
630}
aacb9d31 631
8604f355
MCC		 632static int xc5000_fwupload(struct dvb_frontend *fe,
633 const struct xc5000_fw_cfg *desired_fw,
634 const struct firmware *fw)
aacb9d31
ST		 635{
636 struct xc5000_priv *priv = fe->tuner_priv;
aacb9d31
ST		 637 int ret;
638
e12671cf 639 /* request the firmware, this will block and timeout */
8604f355 640 dprintk(1, "waiting for firmware upload (%s)...\n",
6fab81df 641 desired_fw->name);
e12671cf 642
8604f355
MCC		 643 priv->pll_register_no = desired_fw->pll_reg;
644 priv->init_status_supported = desired_fw->init_status_supported;
645 priv->fw_checksum_supported = desired_fw->fw_checksum_supported;
aacb9d31 646
aacb9d31 647
8604f355
MCC		 648 dprintk(1, "firmware uploading...\n");
649 ret = xc_load_i2c_sequence(fe, fw->data);
650 if (!ret) {
651 ret = xc_set_xtal(fe);
652 dprintk(1, "Firmware upload complete...\n");
653 } else
654 printk(KERN_ERR "xc5000: firmware upload failed...\n");
655
aacb9d31
ST		 656 return ret;
657}
658
e12671cf 659static void xc_debug_dump(struct xc5000_priv *priv)
aacb9d31 660{
e12671cf
ST		 661 u16 adc_envelope;
662 u32 freq_error_hz = 0;
663 u16 lock_status;
664 u32 hsync_freq_hz = 0;
665 u16 frame_lines;
666 u16 quality;
7c287f18
DH		 667 u16 snr;
668 u16 totalgain;
e12671cf
ST		 669 u8 hw_majorversion = 0, hw_minorversion = 0;
670 u8 fw_majorversion = 0, fw_minorversion = 0;
bae7b7d7 671 u16 fw_buildversion = 0;
de49bc6e 672 u16 regval;
aacb9d31
ST		 673
674 /* Wait for stats to stabilize.
675 * Frame Lines needs two frame times after initial lock
676 * before it is valid.
677 */
e5bf4a11 678 msleep(100);
aacb9d31 679
303ddd92 680 xc_get_adc_envelope(priv, &adc_envelope);
e12671cf 681 dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope);
aacb9d31 682
e12671cf
ST		 683 xc_get_frequency_error(priv, &freq_error_hz);
684 dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz);
aacb9d31 685
e12671cf
ST		 686 xc_get_lock_status(priv, &lock_status);
687 dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n",
aacb9d31
ST		 688 lock_status);
689
690 xc_get_version(priv, &hw_majorversion, &hw_minorversion,
e12671cf 691 &fw_majorversion, &fw_minorversion);
bae7b7d7 692 xc_get_buildversion(priv, &fw_buildversion);
ca60a45d 693 dprintk(1, "*** HW: V%d.%d, FW: V %d.%d.%d\n",
aacb9d31 694 hw_majorversion, hw_minorversion,
bae7b7d7 695 fw_majorversion, fw_minorversion, fw_buildversion);
aacb9d31 696
e12671cf
ST		 697 xc_get_hsync_freq(priv, &hsync_freq_hz);
698 dprintk(1, "*** Horizontal sync frequency = %d Hz\n", hsync_freq_hz);
aacb9d31 699
e12671cf
ST		 700 xc_get_frame_lines(priv, &frame_lines);
701 dprintk(1, "*** Frame lines = %d\n", frame_lines);
aacb9d31 702
e12671cf 703 xc_get_quality(priv, &quality);
1aa9c487 704 dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality & 0x07);
7c287f18
DH		 705
706 xc_get_analogsnr(priv, &snr);
707 dprintk(1, "*** Unweighted analog SNR = %d dB\n", snr & 0x3f);
708
709 xc_get_totalgain(priv, &totalgain);
710 dprintk(1, "*** Total gain = %d.%d dB\n", totalgain / 256,
711 (totalgain % 256) * 100 / 256);
de49bc6e
DH		 712
713 if (priv->pll_register_no) {
714 xc5000_readreg(priv, priv->pll_register_no, &regval);
715 dprintk(1, "*** PLL lock status = 0x%04x\n", regval);
716 }
aacb9d31
ST		 717}
718
16435202
MCC		 719static int xc5000_tune_digital(struct dvb_frontend *fe)
720{
721 struct xc5000_priv *priv = fe->tuner_priv;
722 int ret;
723 u32 bw = fe->dtv_property_cache.bandwidth_hz;
724
725 ret = xc_set_signal_source(priv, priv->rf_mode);
726 if (ret != 0) {
727 printk(KERN_ERR
728 "xc5000: xc_set_signal_source(%d) failed\n",
729 priv->rf_mode);
730 return -EREMOTEIO;
731 }
732
733 ret = xc_set_tv_standard(priv,
734 xc5000_standard[priv->video_standard].video_mode,
735 xc5000_standard[priv->video_standard].audio_mode, 0);
736 if (ret != 0) {
737 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
738 return -EREMOTEIO;
739 }
740
741 ret = xc_set_IF_frequency(priv, priv->if_khz);
742 if (ret != 0) {
743 printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n",
744 priv->if_khz);
745 return -EIO;
746 }
747
52e269b1
RV		 748 dprintk(1, "%s() setting OUTPUT_AMP to 0x%x\n",
749 __func__, priv->output_amp);
750 xc_write_reg(priv, XREG_OUTPUT_AMP, priv->output_amp);
16435202
MCC		 751
752 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL);
753
754 if (debug)
755 xc_debug_dump(priv);
756
757 priv->bandwidth = bw;
758
759 return 0;
760}
761
59b94f3e 762static int xc5000_set_digital_params(struct dvb_frontend *fe)
aacb9d31 763{
16435202 764 int b;
aacb9d31 765 struct xc5000_priv *priv = fe->tuner_priv;
fd66c45d
MCC		 766 u32 bw = fe->dtv_property_cache.bandwidth_hz;
767 u32 freq = fe->dtv_property_cache.frequency;
768 u32 delsys = fe->dtv_property_cache.delivery_system;
aacb9d31 769
859ae7f0 770 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
fc7a74ba
DH		 771 dprintk(1, "Unable to load firmware and init tuner\n");
772 return -EINVAL;
760c466c 773 }
8e4c6797 774
fd66c45d 775 dprintk(1, "%s() frequency=%d (Hz)\n", __func__, freq);
aacb9d31 776
fd66c45d
MCC		 777 switch (delsys) {
778 case SYS_ATSC:
779 dprintk(1, "%s() VSB modulation\n", __func__);
780 priv->rf_mode = XC_RF_MODE_AIR;
a3eec916 781 priv->freq_offset = 1750000;
fd66c45d
MCC		 782 priv->video_standard = DTV6;
783 break;
784 case SYS_DVBC_ANNEX_B:
785 dprintk(1, "%s() QAM modulation\n", __func__);
786 priv->rf_mode = XC_RF_MODE_CABLE;
a3eec916 787 priv->freq_offset = 1750000;
fd66c45d
MCC		 788 priv->video_standard = DTV6;
789 break;
5cf73ce1
MCC		 790 case SYS_ISDBT:
791 /* All ISDB-T are currently for 6 MHz bw */
792 if (!bw)
793 bw = 6000000;
794 /* fall to OFDM handling */
795 case SYS_DMBTH:
fd66c45d
MCC		 796 case SYS_DVBT:
797 case SYS_DVBT2:
6c99080d 798 dprintk(1, "%s() OFDM\n", __func__);
fd66c45d
MCC		 799 switch (bw) {
800 case 6000000:
6c99080d 801 priv->video_standard = DTV6;
a3eec916 802 priv->freq_offset = 1750000;
6c99080d 803 break;
fd66c45d 804 case 7000000:
0433cd28 805 priv->video_standard = DTV7;
a3eec916 806 priv->freq_offset = 2250000;
0433cd28 807 break;
fd66c45d 808 case 8000000:
6c99080d 809 priv->video_standard = DTV8;
a3eec916 810 priv->freq_offset = 2750000;
6c99080d
DW		 811 break;
812 default:
813 printk(KERN_ERR "xc5000 bandwidth not set!\n");
814 return -EINVAL;
815 }
aacb9d31 816 priv->rf_mode = XC_RF_MODE_AIR;
cf1364b1 817 break;
fd66c45d
MCC		 818 case SYS_DVBC_ANNEX_A:
819 case SYS_DVBC_ANNEX_C:
820 dprintk(1, "%s() QAM modulation\n", __func__);
821 priv->rf_mode = XC_RF_MODE_CABLE;
822 if (bw <= 6000000) {
fd66c45d 823 priv->video_standard = DTV6;
a3eec916 824 priv->freq_offset = 1750000;
fd66c45d
MCC		 825 b = 6;
826 } else if (bw <= 7000000) {
fd66c45d 827 priv->video_standard = DTV7;
a3eec916 828 priv->freq_offset = 2250000;
fd66c45d
MCC		 829 b = 7;
830 } else {
fd66c45d 831 priv->video_standard = DTV7_8;
a3eec916 832 priv->freq_offset = 2750000;
fd66c45d 833 b = 8;
e80edce1 834 }
fd66c45d
MCC		 835 dprintk(1, "%s() Bandwidth %dMHz (%d)\n", __func__,
836 b, bw);
837 break;
838 default:
839 printk(KERN_ERR "xc5000: delivery system is not supported!\n");
aacb9d31
ST		 840 return -EINVAL;
841 }
842
a3eec916 843 priv->freq_hz = freq - priv->freq_offset;
16435202 844 priv->mode = V4L2_TUNER_DIGITAL_TV;
a3eec916 845
fd66c45d
MCC		 846 dprintk(1, "%s() frequency=%d (compensated to %d)\n",
847 __func__, freq, priv->freq_hz);
aacb9d31 848
16435202 849 return xc5000_tune_digital(fe);
aacb9d31
ST		 850}
851
e470d817
ST		 852static int xc5000_is_firmware_loaded(struct dvb_frontend *fe)
853{
854 struct xc5000_priv *priv = fe->tuner_priv;
855 int ret;
856 u16 id;
857
858 ret = xc5000_readreg(priv, XREG_PRODUCT_ID, &id);
859ae7f0 859 if (ret == 0) {
e470d817 860 if (id == XC_PRODUCT_ID_FW_NOT_LOADED)
859ae7f0 861 ret = -ENOENT;
e470d817 862 else
859ae7f0 863 ret = 0;
e470d817
ST		 864 }
865
866 dprintk(1, "%s() returns %s id = 0x%x\n", __func__,
859ae7f0 867 ret == 0 ? "True" : "False", id);
e470d817
ST		 868 return ret;
869}
870
c3d6676b
MCC		 871static void xc5000_config_tv(struct dvb_frontend *fe,
872 struct analog_parameters *params)
27c685a4
ST		 873{
874 struct xc5000_priv *priv = fe->tuner_priv;
27c685a4 875
27c685a4 876 dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
271ddbf7 877 __func__, params->frequency);
27c685a4 878
1fab14ed
MCC		 879 /* Fix me: it could be air. */
880 priv->rf_mode = params->mode;
881 if (params->mode > XC_RF_MODE_CABLE)
882 priv->rf_mode = XC_RF_MODE_CABLE;
27c685a4
ST		 883
884 /* params->frequency is in units of 62.5khz */
885 priv->freq_hz = params->frequency * 62500;
886
887 /* FIX ME: Some video standards may have several possible audio
888 standards. We simply default to one of them here.
889 */
8f3cd530 890 if (params->std & V4L2_STD_MN) {
27c685a4
ST		 891 /* default to BTSC audio standard */
892 priv->video_standard = MN_NTSC_PAL_BTSC;
c3d6676b 893 return;
27c685a4
ST		 894 }
895
8f3cd530 896 if (params->std & V4L2_STD_PAL_BG) {
27c685a4
ST		 897 /* default to NICAM audio standard */
898 priv->video_standard = BG_PAL_NICAM;
c3d6676b 899 return;
27c685a4
ST		 900 }
901
8f3cd530 902 if (params->std & V4L2_STD_PAL_I) {
27c685a4
ST		 903 /* default to NICAM audio standard */
904 priv->video_standard = I_PAL_NICAM;
c3d6676b 905 return;
27c685a4
ST		 906 }
907
8f3cd530 908 if (params->std & V4L2_STD_PAL_DK) {
27c685a4
ST		 909 /* default to NICAM audio standard */
910 priv->video_standard = DK_PAL_NICAM;
c3d6676b 911 return;
27c685a4
ST		 912 }
913
8f3cd530 914 if (params->std & V4L2_STD_SECAM_DK) {
27c685a4
ST		 915 /* default to A2 DK1 audio standard */
916 priv->video_standard = DK_SECAM_A2DK1;
c3d6676b 917 return;
27c685a4
ST		 918 }
919
8f3cd530 920 if (params->std & V4L2_STD_SECAM_L) {
27c685a4 921 priv->video_standard = L_SECAM_NICAM;
c3d6676b 922 return;
27c685a4
ST		 923 }
924
8f3cd530 925 if (params->std & V4L2_STD_SECAM_LC) {
27c685a4 926 priv->video_standard = LC_SECAM_NICAM;
c3d6676b 927 return;
27c685a4 928 }
c3d6676b
MCC		 929}
930
931static int xc5000_set_tv_freq(struct dvb_frontend *fe)
932{
933 struct xc5000_priv *priv = fe->tuner_priv;
934 u16 pll_lock_status;
935 int ret;
27c685a4
ST		 936
937tune_channel:
303ddd92 938 ret = xc_set_signal_source(priv, priv->rf_mode);
859ae7f0 939 if (ret != 0) {
8f3cd530 940 printk(KERN_ERR
303ddd92 941 "xc5000: xc_set_signal_source(%d) failed\n",
27c685a4
ST		 942 priv->rf_mode);
943 return -EREMOTEIO;
944 }
945
303ddd92
MCC		 946 ret = xc_set_tv_standard(priv,
947 xc5000_standard[priv->video_standard].video_mode,
948 xc5000_standard[priv->video_standard].audio_mode, 0);
859ae7f0 949 if (ret != 0) {
303ddd92 950 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
27c685a4
ST		 951 return -EREMOTEIO;
952 }
953
724dcbfa
DB		 954 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
955
a78baacf 956 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
27c685a4
ST		 957
958 if (debug)
959 xc_debug_dump(priv);
960
de49bc6e
DH		 961 if (priv->pll_register_no != 0) {
962 msleep(20);
963 xc5000_readreg(priv, priv->pll_register_no, &pll_lock_status);
964 if (pll_lock_status > 63) {
965 /* PLL is unlocked, force reload of the firmware */
966 dprintk(1, "xc5000: PLL not locked (0x%x). Reloading...\n",
967 pll_lock_status);
859ae7f0 968 if (xc_load_fw_and_init_tuner(fe, 1) != 0) {
de49bc6e
DH		 969 printk(KERN_ERR "xc5000: Unable to reload fw\n");
970 return -EREMOTEIO;
971 }
972 goto tune_channel;
973 }
974 }
975
27c685a4
ST		 976 return 0;
977}
978
c3d6676b
MCC		 979static int xc5000_config_radio(struct dvb_frontend *fe,
980 struct analog_parameters *params)
981
d7009cdc
BILDB		 982{
983 struct xc5000_priv *priv = fe->tuner_priv;
d7009cdc
BILDB		 984
985 dprintk(1, "%s() frequency=%d (in units of khz)\n",
986 __func__, params->frequency);
987
496e9057
DH		 988 if (priv->radio_input == XC5000_RADIO_NOT_CONFIGURED) {
989 dprintk(1, "%s() radio input not configured\n", __func__);
990 return -EINVAL;
991 }
992
c3d6676b
MCC		 993 priv->freq_hz = params->frequency * 125 / 2;
994 priv->rf_mode = XC_RF_MODE_AIR;
995
996 return 0;
997}
998
999static int xc5000_set_radio_freq(struct dvb_frontend *fe)
1000{
1001 struct xc5000_priv *priv = fe->tuner_priv;
1002 int ret;
1003 u8 radio_input;
1004
496e9057 1005 if (priv->radio_input == XC5000_RADIO_FM1)
303ddd92 1006 radio_input = FM_RADIO_INPUT1;
496e9057 1007 else if (priv->radio_input == XC5000_RADIO_FM2)
303ddd92 1008 radio_input = FM_RADIO_INPUT2;
724dcbfa 1009 else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
303ddd92 1010 radio_input = FM_RADIO_INPUT1_MONO;
496e9057
DH		 1011 else {
1012 dprintk(1, "%s() unknown radio input %d\n", __func__,
1013 priv->radio_input);
1014 return -EINVAL;
1015 }
1016
303ddd92
MCC		 1017 ret = xc_set_tv_standard(priv, xc5000_standard[radio_input].video_mode,
1018 xc5000_standard[radio_input].audio_mode, radio_input);
d7009cdc 1019
859ae7f0 1020 if (ret != 0) {
303ddd92 1021 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
d7009cdc
BILDB		 1022 return -EREMOTEIO;
1023 }
1024
303ddd92 1025 ret = xc_set_signal_source(priv, priv->rf_mode);
859ae7f0 1026 if (ret != 0) {
d7009cdc 1027 printk(KERN_ERR
303ddd92 1028 "xc5000: xc_set_signal_source(%d) failed\n",
d7009cdc
BILDB		 1029 priv->rf_mode);
1030 return -EREMOTEIO;
1031 }
1032
724dcbfa
DB		 1033 if ((priv->radio_input == XC5000_RADIO_FM1) ||
1034 (priv->radio_input == XC5000_RADIO_FM2))
1035 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
1036 else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
1037 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x06);
1038
d7009cdc
BILDB		 1039 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
1040
1041 return 0;
1042}
1043
59b94f3e 1044static int xc5000_set_params(struct dvb_frontend *fe)
c3d6676b
MCC		 1045{
1046 struct xc5000_priv *priv = fe->tuner_priv;
1047
5275a3b6
MCC		 1048 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
1049 dprintk(1, "Unable to load firmware and init tuner\n");
1050 return -EINVAL;
1051 }
1052
c3d6676b
MCC		 1053 switch (priv->mode) {
1054 case V4L2_TUNER_RADIO:
1055 return xc5000_set_radio_freq(fe);
1056 case V4L2_TUNER_ANALOG_TV:
1057 return xc5000_set_tv_freq(fe);
1058 case V4L2_TUNER_DIGITAL_TV:
1059 return xc5000_tune_digital(fe);
1060 }
1061
1062 return 0;
1063}
1064
d7009cdc
BILDB		 1065static int xc5000_set_analog_params(struct dvb_frontend *fe,
1066 struct analog_parameters *params)
1067{
1068 struct xc5000_priv *priv = fe->tuner_priv;
c3d6676b 1069 int ret;
d7009cdc
BILDB		 1070
1071 if (priv->i2c_props.adap == NULL)
1072 return -EINVAL;
1073
d7009cdc
BILDB		 1074 switch (params->mode) {
1075 case V4L2_TUNER_RADIO:
c3d6676b
MCC		 1076 ret = xc5000_config_radio(fe, params);
1077 if (ret)
1078 return ret;
d7009cdc
BILDB		 1079 break;
1080 case V4L2_TUNER_ANALOG_TV:
c3d6676b
MCC		 1081 xc5000_config_tv(fe, params);
1082 break;
1083 default:
d7009cdc
BILDB		 1084 break;
1085 }
c3d6676b 1086 priv->mode = params->mode;
d7009cdc 1087
59b94f3e 1088 return xc5000_set_params(fe);
d7009cdc
BILDB		 1089}
1090
aacb9d31
ST		 1091static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq)
1092{
1093 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1094 dprintk(1, "%s()\n", __func__);
a3eec916 1095 *freq = priv->freq_hz + priv->freq_offset;
aacb9d31
ST		 1096 return 0;
1097}
1098
35621030
MCC		 1099static int xc5000_get_if_frequency(struct dvb_frontend *fe, u32 *freq)
1100{
1101 struct xc5000_priv *priv = fe->tuner_priv;
1102 dprintk(1, "%s()\n", __func__);
1103 *freq = priv->if_khz * 1000;
1104 return 0;
1105}
1106
aacb9d31
ST		 1107static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
1108{
1109 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1110 dprintk(1, "%s()\n", __func__);
27c685a4 1111
aacb9d31
ST		 1112 *bw = priv->bandwidth;
1113 return 0;
1114}
1115
1116static int xc5000_get_status(struct dvb_frontend *fe, u32 *status)
1117{
1118 struct xc5000_priv *priv = fe->tuner_priv;
e12671cf 1119 u16 lock_status = 0;
aacb9d31
ST		 1120
1121 xc_get_lock_status(priv, &lock_status);
1122
271ddbf7 1123 dprintk(1, "%s() lock_status = 0x%08x\n", __func__, lock_status);
aacb9d31
ST		 1124
1125 *status = lock_status;
1126
1127 return 0;
1128}
1129
de49bc6e 1130static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force)
aacb9d31
ST		 1131{
1132 struct xc5000_priv *priv = fe->tuner_priv;
8604f355
MCC		 1133 const struct xc5000_fw_cfg *desired_fw = xc5000_assign_firmware(priv->chip_id);
1134 const struct firmware *fw;
2621c0b3 1135 int ret, i;
de49bc6e 1136 u16 pll_lock_status;
22d5c6f5 1137 u16 fw_ck;
de49bc6e 1138
f7a27ff1
MCC		 1139 cancel_delayed_work(&priv->timer_sleep);
1140
2621c0b3
MCC		 1141 if (!force && xc5000_is_firmware_loaded(fe) == 0)
1142 return 0;
aacb9d31 1143
5264a522
SK		 1144 if (!priv->firmware) {
1145 ret = request_firmware(&fw, desired_fw->name,
1146 priv->i2c_props.adap->dev.parent);
1147 if (ret) {
1148 pr_err("xc5000: Upload failed. rc %d\n", ret);
1149 return ret;
1150 }
1151 dprintk(1, "firmware read %Zu bytes.\n", fw->size);
8604f355 1152
5264a522
SK		 1153 if (fw->size != desired_fw->size) {
1154 pr_err("xc5000: Firmware file with incorrect size\n");
1155 release_firmware(fw);
1156 return -EINVAL;
1157 }
1158 priv->firmware = fw;
1159 } else
1160 fw = priv->firmware;
8604f355 1161
2621c0b3
MCC		 1162 /* Try up to 5 times to load firmware */
1163 for (i = 0; i < 5; i++) {
ee67674a
MCC		 1164 if (i)
1165 printk(KERN_CONT " - retrying to upload firmware.\n");
1166
8604f355 1167 ret = xc5000_fwupload(fe, desired_fw, fw);
859ae7f0 1168 if (ret != 0)
8604f355 1169 goto err;
aacb9d31 1170
de49bc6e
DH		 1171 msleep(20);
1172
22d5c6f5 1173 if (priv->fw_checksum_supported) {
2621c0b3 1174 if (xc5000_readreg(priv, XREG_FW_CHECKSUM, &fw_ck)) {
ee67674a
MCC		 1175 printk(KERN_ERR
1176 "xc5000: FW checksum reading failed.");
2621c0b3 1177 continue;
22d5c6f5
DH		 1178 }
1179
2621c0b3 1180 if (!fw_ck) {
ee67674a
MCC		 1181 printk(KERN_ERR
1182 "xc5000: FW checksum failed = 0x%04x.",
1183 fw_ck);
2621c0b3 1184 continue;
22d5c6f5
DH		 1185 }
1186 }
1187
fc7a74ba 1188 /* Start the tuner self-calibration process */
2621c0b3
MCC		 1189 ret = xc_initialize(priv);
1190 if (ret) {
ee67674a
MCC		 1191 printk(KERN_ERR
1192 "xc5000: Can't request Self-callibration.");
2621c0b3
MCC		 1193 continue;
1194 }
de49bc6e 1195
fc7a74ba
DH		 1196 /* Wait for calibration to complete.
1197 * We could continue but XC5000 will clock stretch subsequent
1198 * I2C transactions until calibration is complete. This way we
1199 * don't have to rely on clock stretching working.
1200 */
e5bf4a11 1201 msleep(100);
aacb9d31 1202
22d5c6f5 1203 if (priv->init_status_supported) {
2621c0b3 1204 if (xc5000_readreg(priv, XREG_INIT_STATUS, &fw_ck)) {
ee67674a
MCC		 1205 printk(KERN_ERR
1206 "xc5000: FW failed reading init status.");
2621c0b3 1207 continue;
22d5c6f5
DH		 1208 }
1209
2621c0b3 1210 if (!fw_ck) {
ee67674a
MCC		 1211 printk(KERN_ERR
1212 "xc5000: FW init status failed = 0x%04x.",
1213 fw_ck);
2621c0b3 1214 continue;
22d5c6f5
DH		 1215 }
1216 }
1217
de49bc6e
DH		 1218 if (priv->pll_register_no) {
1219 xc5000_readreg(priv, priv->pll_register_no,
1220 &pll_lock_status);
1221 if (pll_lock_status > 63) {
1222 /* PLL is unlocked, force reload of the firmware */
ee67674a
MCC		 1223 printk(KERN_ERR
1224 "xc5000: PLL not running after fwload.");
2621c0b3 1225 continue;
de49bc6e
DH		 1226 }
1227 }
1228
fc7a74ba 1229 /* Default to "CABLE" mode */
2621c0b3 1230 ret = xc_write_reg(priv, XREG_SIGNALSOURCE, XC_RF_MODE_CABLE);
ee67674a
MCC		 1231 if (!ret)
1232 break;
1233 printk(KERN_ERR "xc5000: can't set to cable mode.");
fc7a74ba 1234 }
aacb9d31 1235
8604f355 1236err:
ee67674a
MCC		 1237 if (!ret)
1238 printk(KERN_INFO "xc5000: Firmware %s loaded and running.\n",
1239 desired_fw->name);
1240 else
1241 printk(KERN_CONT " - too many retries. Giving up\n");
1242
aacb9d31
ST		 1243 return ret;
1244}
1245
f7a27ff1 1246static void xc5000_do_timer_sleep(struct work_struct *timer_sleep)
e12671cf 1247{
f7a27ff1
MCC		 1248 struct xc5000_priv *priv =container_of(timer_sleep, struct xc5000_priv,
1249 timer_sleep.work);
1250 struct dvb_frontend *fe = priv->fe;
27c685a4
ST		 1251 int ret;
1252
271ddbf7 1253 dprintk(1, "%s()\n", __func__);
e12671cf 1254
7f05b530
DH		 1255 /* According to Xceive technical support, the "powerdown" register
1256 was removed in newer versions of the firmware. The "supported"
1257 way to sleep the tuner is to pull the reset pin low for 10ms */
303ddd92 1258 ret = xc5000_tuner_reset(fe);
f7a27ff1 1259 if (ret != 0)
27c685a4
ST		 1260 printk(KERN_ERR
1261 "xc5000: %s() unable to shutdown tuner\n",
271ddbf7 1262 __func__);
f7a27ff1
MCC		 1263}
1264
1265static int xc5000_sleep(struct dvb_frontend *fe)
1266{
1267 struct xc5000_priv *priv = fe->tuner_priv;
1268
1269 dprintk(1, "%s()\n", __func__);
1270
1271 /* Avoid firmware reload on slow devices */
1272 if (no_poweroff)
859ae7f0 1273 return 0;
f7a27ff1
MCC		 1274
1275 schedule_delayed_work(&priv->timer_sleep,
1276 msecs_to_jiffies(XC5000_SLEEP_TIME));
1277
1278 return 0;
e12671cf
ST		 1279}
1280
91a5307c
MCC		 1281static int xc5000_suspend(struct dvb_frontend *fe)
1282{
1283 struct xc5000_priv *priv = fe->tuner_priv;
1284 int ret;
1285
1286 dprintk(1, "%s()\n", __func__);
1287
1288 cancel_delayed_work(&priv->timer_sleep);
1289
1290 ret = xc5000_tuner_reset(fe);
1291 if (ret != 0)
1292 printk(KERN_ERR
1293 "xc5000: %s() unable to shutdown tuner\n",
1294 __func__);
1295
1296 return 0;
1297}
1298
27ccd694
SK		 1299static int xc5000_resume(struct dvb_frontend *fe)
1300{
1301 struct xc5000_priv *priv = fe->tuner_priv;
1302
1303 dprintk(1, "%s()\n", __func__);
1304
1305 /* suspended before firmware is loaded.
1306 Avoid firmware load in resume path. */
1307 if (!priv->firmware)
1308 return 0;
1309
1310 return xc5000_set_params(fe);
1311}
1312
aacb9d31
ST		 1313static int xc5000_init(struct dvb_frontend *fe)
1314{
1315 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1316 dprintk(1, "%s()\n", __func__);
aacb9d31 1317
859ae7f0 1318 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
e12671cf
ST		 1319 printk(KERN_ERR "xc5000: Unable to initialise tuner\n");
1320 return -EREMOTEIO;
1321 }
1322
1323 if (debug)
1324 xc_debug_dump(priv);
aacb9d31
ST		 1325
1326 return 0;
1327}
1328
1329static int xc5000_release(struct dvb_frontend *fe)
1330{
89fd2854
MK		 1331 struct xc5000_priv *priv = fe->tuner_priv;
1332
271ddbf7 1333 dprintk(1, "%s()\n", __func__);
89fd2854
MK		 1334
1335 mutex_lock(&xc5000_list_mutex);
1336
f7a27ff1
MCC		 1337 if (priv) {
1338 cancel_delayed_work(&priv->timer_sleep);
856260a5
DH		 1339 if (priv->firmware) {
1340 release_firmware(priv->firmware);
1341 priv->firmware = NULL;
1342 }
4961a532 1343 hybrid_tuner_release_state(priv);
f7a27ff1 1344 }
89fd2854
MK		 1345
1346 mutex_unlock(&xc5000_list_mutex);
1347
aacb9d31 1348 fe->tuner_priv = NULL;
89fd2854 1349
aacb9d31
ST		 1350 return 0;
1351}
1352
724dcbfa
DB		 1353static int xc5000_set_config(struct dvb_frontend *fe, void *priv_cfg)
1354{
1355 struct xc5000_priv *priv = fe->tuner_priv;
1356 struct xc5000_config *p = priv_cfg;
1357
1358 dprintk(1, "%s()\n", __func__);
1359
1360 if (p->if_khz)
1361 priv->if_khz = p->if_khz;
1362
1363 if (p->radio_input)
1364 priv->radio_input = p->radio_input;
1365
52e269b1
RV		 1366 if (p->output_amp)
1367 priv->output_amp = p->output_amp;
1368
724dcbfa
DB		 1369 return 0;
1370}
1371
1372
aacb9d31
ST		 1373static const struct dvb_tuner_ops xc5000_tuner_ops = {
1374 .info = {
1375 .name = "Xceive XC5000",
1376 .frequency_min = 1000000,
1377 .frequency_max = 1023000000,
1378 .frequency_step = 50000,
1379 },
1380
27c685a4
ST		 1381 .release = xc5000_release,
1382 .init = xc5000_init,
1383 .sleep = xc5000_sleep,
91a5307c 1384 .suspend = xc5000_suspend,
27ccd694 1385 .resume = xc5000_resume,
aacb9d31 1386
724dcbfa 1387 .set_config = xc5000_set_config,
59b94f3e 1388 .set_params = xc5000_set_digital_params,
27c685a4
ST		 1389 .set_analog_params = xc5000_set_analog_params,
1390 .get_frequency = xc5000_get_frequency,
35621030 1391 .get_if_frequency = xc5000_get_if_frequency,
27c685a4
ST		 1392 .get_bandwidth = xc5000_get_bandwidth,
1393 .get_status = xc5000_get_status
aacb9d31
ST		 1394};
1395
48723543
MK		 1396struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe,
1397 struct i2c_adapter *i2c,
2e4e98e7 1398 const struct xc5000_config *cfg)
aacb9d31
ST		 1399{
1400 struct xc5000_priv *priv = NULL;
89fd2854 1401 int instance;
aacb9d31
ST		 1402 u16 id = 0;
1403
89fd2854
MK		 1404 dprintk(1, "%s(%d-%04x)\n", __func__,
1405 i2c ? i2c_adapter_id(i2c) : -1,
1406 cfg ? cfg->i2c_address : -1);
aacb9d31 1407
89fd2854 1408 mutex_lock(&xc5000_list_mutex);
aacb9d31 1409
89fd2854
MK		 1410 instance = hybrid_tuner_request_state(struct xc5000_priv, priv,
1411 hybrid_tuner_instance_list,
1412 i2c, cfg->i2c_address, "xc5000");
1413 switch (instance) {
1414 case 0:
1415 goto fail;
89fd2854
MK		 1416 case 1:
1417 /* new tuner instance */
c6f56e7d 1418 priv->bandwidth = 6000000;
89fd2854 1419 fe->tuner_priv = priv;
f7a27ff1
MCC		 1420 priv->fe = fe;
1421 INIT_DELAYED_WORK(&priv->timer_sleep, xc5000_do_timer_sleep);
89fd2854
MK		 1422 break;
1423 default:
1424 /* existing tuner instance */
1425 fe->tuner_priv = priv;
1426 break;
1427 }
aacb9d31 1428
ea227863
DH		 1429 if (priv->if_khz == 0) {
1430 /* If the IF hasn't been set yet, use the value provided by
1431 the caller (occurs in hybrid devices where the analog
1432 call to xc5000_attach occurs before the digital side) */
1433 priv->if_khz = cfg->if_khz;
1434 }
1435
7d3d0d8d
MK		 1436 if (priv->xtal_khz == 0)
1437 priv->xtal_khz = cfg->xtal_khz;
1438
496e9057
DH		 1439 if (priv->radio_input == 0)
1440 priv->radio_input = cfg->radio_input;
1441
6fab81df 1442 /* don't override chip id if it's already been set
76efb0ba 1443 unless explicitly specified */
6fab81df
MK		 1444 if ((priv->chip_id == 0) || (cfg->chip_id))
1445 /* use default chip id if none specified, set to 0 so
1446 it can be overridden if this is a hybrid driver */
1447 priv->chip_id = (cfg->chip_id) ? cfg->chip_id : 0;
76efb0ba 1448
52e269b1
RV		 1449 /* don't override output_amp if it's already been set
1450 unless explicitly specified */
1451 if ((priv->output_amp == 0) || (cfg->output_amp))
1452 /* use default output_amp value if none specified */
1453 priv->output_amp = (cfg->output_amp) ? cfg->output_amp : 0x8a;
1454
27c685a4
ST		 1455 /* Check if firmware has been loaded. It is possible that another
1456 instance of the driver has loaded the firmware.
1457 */
859ae7f0 1458 if (xc5000_readreg(priv, XREG_PRODUCT_ID, &id) != 0)
89fd2854 1459 goto fail;
aacb9d31 1460
8f3cd530 1461 switch (id) {
27c685a4
ST		 1462 case XC_PRODUCT_ID_FW_LOADED:
1463 printk(KERN_INFO
1464 "xc5000: Successfully identified at address 0x%02x\n",
1465 cfg->i2c_address);
1466 printk(KERN_INFO
1467 "xc5000: Firmware has been loaded previously\n");
27c685a4
ST		 1468 break;
1469 case XC_PRODUCT_ID_FW_NOT_LOADED:
1470 printk(KERN_INFO
1471 "xc5000: Successfully identified at address 0x%02x\n",
1472 cfg->i2c_address);
1473 printk(KERN_INFO
1474 "xc5000: Firmware has not been loaded previously\n");
27c685a4
ST		 1475 break;
1476 default:
aacb9d31
ST		 1477 printk(KERN_ERR
1478 "xc5000: Device not found at addr 0x%02x (0x%x)\n",
1479 cfg->i2c_address, id);
89fd2854 1480 goto fail;
aacb9d31
ST		 1481 }
1482
89fd2854
MK		 1483 mutex_unlock(&xc5000_list_mutex);
1484
aacb9d31
ST		 1485 memcpy(&fe->ops.tuner_ops, &xc5000_tuner_ops,
1486 sizeof(struct dvb_tuner_ops));
1487
aacb9d31 1488 return fe;
89fd2854
MK		 1489fail:
1490 mutex_unlock(&xc5000_list_mutex);
1491
1492 xc5000_release(fe);
1493 return NULL;
aacb9d31
ST		 1494}
1495EXPORT_SYMBOL(xc5000_attach);
1496
1497MODULE_AUTHOR("Steven Toth");
e12671cf 1498MODULE_DESCRIPTION("Xceive xc5000 silicon tuner driver");
aacb9d31 1499MODULE_LICENSE("GPL");
3422f2a6
TG		 1500MODULE_FIRMWARE(XC5000A_FIRMWARE);
1501MODULE_FIRMWARE(XC5000C_FIRMWARE);
Linux 6.x block layer and io_uring tree(s)