media: move dvb kAPI headers to include/media
[linux-2.6-block.git] / drivers / media / tuners / tuner-xc2028.c
CommitLineData
0c20e8ca
MCC
1// SPDX-License-Identifier: GPL-2.0
2// tuner-xc2028
3//
4// Copyright (c) 2007-2008 Mauro Carvalho Chehab (mchehab@infradead.org)
5//
6// Copyright (c) 2007 Michel Ludwig (michel.ludwig@gmail.com)
7// - frontend interface
6cb45879
MCC
8
9#include <linux/i2c.h>
10#include <asm/div64.h>
11#include <linux/firmware.h>
ab0b9fc6 12#include <linux/videodev2.h>
6cb45879 13#include <linux/delay.h>
701672eb 14#include <media/tuner.h>
3b20532c 15#include <linux/mutex.h>
5a0e3ad6 16#include <linux/slab.h>
84a9f336 17#include <asm/unaligned.h>
215b95ba 18#include "tuner-i2c.h"
6cb45879 19#include "tuner-xc2028.h"
de3fe21b 20#include "tuner-xc2028-types.h"
6cb45879 21
701672eb 22#include <linux/dvb/frontend.h>
fada1935 23#include <media/dvb_frontend.h>
701672eb 24
56ac0337
MCC
25/* Max transfer size done by I2C transfer functions */
26#define MAX_XFER_SIZE 80
27
304bce41
MS
28/* Registers (Write-only) */
29#define XREG_INIT 0x00
30#define XREG_RF_FREQ 0x02
31#define XREG_POWER_DOWN 0x08
32
33/* Registers (Read-only) */
34#define XREG_FREQ_ERROR 0x01
35#define XREG_LOCK 0x02
36#define XREG_VERSION 0x04
37#define XREG_PRODUCT_ID 0x08
38#define XREG_HSYNC_FREQ 0x10
39#define XREG_FRAME_LINES 0x20
40#define XREG_SNR 0x40
41
42#define XREG_ADC_ENV 0x0100
ef8c1888 43
83fb340b
MCC
44static int debug;
45module_param(debug, int, 0644);
46MODULE_PARM_DESC(debug, "enable verbose debug messages");
47
74a89b2a
MCC
48static int no_poweroff;
49module_param(no_poweroff, int, 0644);
4900877b 50MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
74a89b2a
MCC
51 "1 keep device energized and with tuner ready all the times.\n"
52 " Faster, but consumes more power and keeps the device hotter\n");
53
a82200fb
MCC
54static char audio_std[8];
55module_param_string(audio_std, audio_std, sizeof(audio_std), 0);
56MODULE_PARM_DESC(audio_std,
2af3eb64 57 "Audio standard. XC3028 audio decoder explicitly needs to know what audio\n"
a82200fb
MCC
58 "standard is needed for some video standards with audio A2 or NICAM.\n"
59 "The valid values are:\n"
60 "A2\n"
61 "A2/A\n"
62 "A2/B\n"
63 "NICAM\n"
64 "NICAM/A\n"
65 "NICAM/B\n");
66
4327b77e 67static char firmware_name[30];
5c913c05 68module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
2af3eb64
MCC
69MODULE_PARM_DESC(firmware_name,
70 "Firmware file name. Allows overriding the default firmware name\n");
5c913c05 71
c663d035 72static LIST_HEAD(hybrid_tuner_instance_list);
aa501be9
CP
73static DEFINE_MUTEX(xc2028_list_mutex);
74
de3fe21b
MCC
75/* struct for storing firmware table */
76struct firmware_description {
77 unsigned int type;
78 v4l2_std_id id;
66c2d53d 79 __u16 int_freq;
de3fe21b
MCC
80 unsigned char *ptr;
81 unsigned int size;
82};
6cb45879 83
e0f0b37a
CP
84struct firmware_properties {
85 unsigned int type;
86 v4l2_std_id id;
87 v4l2_std_id std_req;
66c2d53d 88 __u16 int_freq;
e0f0b37a
CP
89 unsigned int scode_table;
90 int scode_nr;
91};
92
61a96113
MCC
93enum xc2028_state {
94 XC2028_NO_FIRMWARE = 0,
95 XC2028_WAITING_FIRMWARE,
96 XC2028_ACTIVE,
97 XC2028_SLEEP,
98 XC2028_NODEV,
99};
100
6cb45879 101struct xc2028_data {
c663d035 102 struct list_head hybrid_tuner_instance_list;
215b95ba 103 struct tuner_i2c_props i2c_props;
de3fe21b
MCC
104 __u32 frequency;
105
61a96113
MCC
106 enum xc2028_state state;
107 const char *fname;
108
de3fe21b
MCC
109 struct firmware_description *firm;
110 int firm_size;
06fd82dc 111 __u16 firm_version;
de3fe21b 112
8bf799a6
CP
113 __u16 hwmodel;
114 __u16 hwvers;
115
de3fe21b 116 struct xc2028_ctrl ctrl;
215b95ba 117
e0f0b37a 118 struct firmware_properties cur_fw;
215b95ba
MCC
119
120 struct mutex lock;
6cb45879
MCC
121};
122
47cc5b78
CP
123#define i2c_send(priv, buf, size) ({ \
124 int _rc; \
125 _rc = tuner_i2c_xfer_send(&priv->i2c_props, buf, size); \
126 if (size != _rc) \
127 tuner_info("i2c output error: rc = %d (should be %d)\n",\
128 _rc, (int)size); \
70ca3c4b
DH
129 if (priv->ctrl.msleep) \
130 msleep(priv->ctrl.msleep); \
47cc5b78
CP
131 _rc; \
132})
133
7d58d111
CP
134#define i2c_send_recv(priv, obuf, osize, ibuf, isize) ({ \
135 int _rc; \
136 _rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, obuf, osize, \
137 ibuf, isize); \
138 if (isize != _rc) \
139 tuner_err("i2c input error: rc = %d (should be %d)\n", \
140 _rc, (int)isize); \
70ca3c4b
DH
141 if (priv->ctrl.msleep) \
142 msleep(priv->ctrl.msleep); \
7d58d111
CP
143 _rc; \
144})
145
47cc5b78 146#define send_seq(priv, data...) ({ \
215b95ba 147 static u8 _val[] = data; \
47cc5b78 148 int _rc; \
6cb45879 149 if (sizeof(_val) != \
47cc5b78 150 (_rc = tuner_i2c_xfer_send(&priv->i2c_props, \
215b95ba 151 _val, sizeof(_val)))) { \
47cc5b78 152 tuner_err("Error on line %d: %d\n", __LINE__, _rc); \
70ca3c4b 153 } else if (priv->ctrl.msleep) \
e5cc2bf4 154 msleep(priv->ctrl.msleep); \
47cc5b78
CP
155 _rc; \
156})
6cb45879 157
83244025 158static int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val)
6cb45879 159{
b873e1a3 160 unsigned char buf[2];
7d58d111 161 unsigned char ibuf[2];
215b95ba 162
7e28adb2 163 tuner_dbg("%s %04x called\n", __func__, reg);
6cb45879 164
7d58d111 165 buf[0] = reg >> 8;
80b52208 166 buf[1] = (unsigned char) reg;
6cb45879 167
7d58d111
CP
168 if (i2c_send_recv(priv, buf, 2, ibuf, 2) != 2)
169 return -EIO;
6cb45879 170
7d58d111
CP
171 *val = (ibuf[1]) | (ibuf[0] << 8);
172 return 0;
6cb45879
MCC
173}
174
e0262688 175#define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0)
29bec0bf 176static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq)
43efe702 177{
c56019fc 178 if (type & BASE)
15c8ffc4 179 printk(KERN_CONT "BASE ");
c56019fc 180 if (type & INIT1)
15c8ffc4 181 printk(KERN_CONT "INIT1 ");
c56019fc 182 if (type & F8MHZ)
15c8ffc4 183 printk(KERN_CONT "F8MHZ ");
c56019fc 184 if (type & MTS)
15c8ffc4 185 printk(KERN_CONT "MTS ");
c56019fc 186 if (type & D2620)
15c8ffc4 187 printk(KERN_CONT "D2620 ");
c56019fc 188 if (type & D2633)
15c8ffc4 189 printk(KERN_CONT "D2633 ");
c56019fc 190 if (type & DTV6)
15c8ffc4 191 printk(KERN_CONT "DTV6 ");
c56019fc 192 if (type & QAM)
15c8ffc4 193 printk(KERN_CONT "QAM ");
c56019fc 194 if (type & DTV7)
15c8ffc4 195 printk(KERN_CONT "DTV7 ");
c56019fc 196 if (type & DTV78)
15c8ffc4 197 printk(KERN_CONT "DTV78 ");
c56019fc 198 if (type & DTV8)
15c8ffc4 199 printk(KERN_CONT "DTV8 ");
c56019fc 200 if (type & FM)
15c8ffc4 201 printk(KERN_CONT "FM ");
c56019fc 202 if (type & INPUT1)
15c8ffc4 203 printk(KERN_CONT "INPUT1 ");
c56019fc 204 if (type & LCD)
15c8ffc4 205 printk(KERN_CONT "LCD ");
c56019fc 206 if (type & NOGD)
15c8ffc4 207 printk(KERN_CONT "NOGD ");
c56019fc 208 if (type & MONO)
15c8ffc4 209 printk(KERN_CONT "MONO ");
c56019fc 210 if (type & ATSC)
15c8ffc4 211 printk(KERN_CONT "ATSC ");
c56019fc 212 if (type & IF)
15c8ffc4 213 printk(KERN_CONT "IF ");
c56019fc 214 if (type & LG60)
15c8ffc4 215 printk(KERN_CONT "LG60 ");
c56019fc 216 if (type & ATI638)
15c8ffc4 217 printk(KERN_CONT "ATI638 ");
c56019fc 218 if (type & OREN538)
15c8ffc4 219 printk(KERN_CONT "OREN538 ");
c56019fc 220 if (type & OREN36)
15c8ffc4 221 printk(KERN_CONT "OREN36 ");
c56019fc 222 if (type & TOYOTA388)
15c8ffc4 223 printk(KERN_CONT "TOYOTA388 ");
c56019fc 224 if (type & TOYOTA794)
15c8ffc4 225 printk(KERN_CONT "TOYOTA794 ");
c56019fc 226 if (type & DIBCOM52)
15c8ffc4 227 printk(KERN_CONT "DIBCOM52 ");
c56019fc 228 if (type & ZARLINK456)
15c8ffc4 229 printk(KERN_CONT "ZARLINK456 ");
c56019fc 230 if (type & CHINA)
15c8ffc4 231 printk(KERN_CONT "CHINA ");
c56019fc 232 if (type & F6MHZ)
15c8ffc4 233 printk(KERN_CONT "F6MHZ ");
c56019fc 234 if (type & INPUT2)
15c8ffc4 235 printk(KERN_CONT "INPUT2 ");
c56019fc 236 if (type & SCODE)
15c8ffc4 237 printk(KERN_CONT "SCODE ");
c56019fc 238 if (type & HAS_IF)
15c8ffc4 239 printk(KERN_CONT "HAS_IF_%d ", int_freq);
43efe702
MCC
240}
241
ef8c1888 242static v4l2_std_id parse_audio_std_option(void)
a82200fb 243{
e155d908 244 if (strcasecmp(audio_std, "A2") == 0)
a82200fb 245 return V4L2_STD_A2;
e155d908 246 if (strcasecmp(audio_std, "A2/A") == 0)
a82200fb 247 return V4L2_STD_A2_A;
e155d908 248 if (strcasecmp(audio_std, "A2/B") == 0)
a82200fb 249 return V4L2_STD_A2_B;
e155d908 250 if (strcasecmp(audio_std, "NICAM") == 0)
a82200fb 251 return V4L2_STD_NICAM;
e155d908 252 if (strcasecmp(audio_std, "NICAM/A") == 0)
a82200fb 253 return V4L2_STD_NICAM_A;
e155d908 254 if (strcasecmp(audio_std, "NICAM/B") == 0)
a82200fb
MCC
255 return V4L2_STD_NICAM_B;
256
257 return 0;
258}
259
61a96113
MCC
260static int check_device_status(struct xc2028_data *priv)
261{
262 switch (priv->state) {
263 case XC2028_NO_FIRMWARE:
264 case XC2028_WAITING_FIRMWARE:
265 return -EAGAIN;
266 case XC2028_ACTIVE:
2276bf70 267 return 1;
61a96113
MCC
268 case XC2028_SLEEP:
269 return 0;
270 case XC2028_NODEV:
271 return -ENODEV;
272 }
273 return 0;
274}
275
ab0b9fc6 276static void free_firmware(struct xc2028_data *priv)
6cb45879 277{
de3fe21b 278 int i;
92b75ab0 279 tuner_dbg("%s called\n", __func__);
de3fe21b 280
22a1e778
TI
281 /* free allocated f/w string */
282 if (priv->fname != firmware_name)
283 kfree(priv->fname);
284 priv->fname = NULL;
285
286 priv->state = XC2028_NO_FIRMWARE;
287 memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
288
de3fe21b
MCC
289 if (!priv->firm)
290 return;
291
ab0b9fc6
MCC
292 for (i = 0; i < priv->firm_size; i++)
293 kfree(priv->firm[i].ptr);
294
de3fe21b
MCC
295 kfree(priv->firm);
296
ab0b9fc6 297 priv->firm = NULL;
06fd82dc 298 priv->firm_size = 0;
de3fe21b
MCC
299}
300
61a96113
MCC
301static int load_all_firmwares(struct dvb_frontend *fe,
302 const struct firmware *fw)
de3fe21b
MCC
303{
304 struct xc2028_data *priv = fe->tuner_priv;
c63e87e9 305 const unsigned char *p, *endp;
ab0b9fc6
MCC
306 int rc = 0;
307 int n, n_array;
de3fe21b 308 char name[33];
6cb45879 309
7e28adb2 310 tuner_dbg("%s called\n", __func__);
215b95ba 311
ab0b9fc6
MCC
312 p = fw->data;
313 endp = p + fw->size;
6cb45879 314
06fd82dc
CP
315 if (fw->size < sizeof(name) - 1 + 2 + 2) {
316 tuner_err("Error: firmware file %s has invalid size!\n",
61a96113 317 priv->fname);
06fd82dc 318 goto corrupt;
6cb45879 319 }
de3fe21b 320
ab0b9fc6
MCC
321 memcpy(name, p, sizeof(name) - 1);
322 name[sizeof(name) - 1] = 0;
323 p += sizeof(name) - 1;
de3fe21b 324
84a9f336 325 priv->firm_version = get_unaligned_le16(p);
de3fe21b
MCC
326 p += 2;
327
84a9f336 328 n_array = get_unaligned_le16(p);
de3fe21b
MCC
329 p += 2;
330
06fd82dc 331 tuner_info("Loading %d firmware images from %s, type: %s, ver %d.%d\n",
61a96113 332 n_array, priv->fname, name,
06fd82dc 333 priv->firm_version >> 8, priv->firm_version & 0xff);
de3fe21b 334
1b7acf0c 335 priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL);
06fd82dc
CP
336 if (priv->firm == NULL) {
337 tuner_err("Not enough memory to load firmware file.\n");
ab0b9fc6 338 rc = -ENOMEM;
06fd82dc 339 goto err;
6cb45879 340 }
de3fe21b 341 priv->firm_size = n_array;
06fd82dc 342
ab0b9fc6
MCC
343 n = -1;
344 while (p < endp) {
de3fe21b
MCC
345 __u32 type, size;
346 v4l2_std_id id;
66c2d53d 347 __u16 int_freq = 0;
de3fe21b
MCC
348
349 n++;
350 if (n >= n_array) {
2af3eb64 351 tuner_err("More firmware images in file than were expected!\n");
de3fe21b
MCC
352 goto corrupt;
353 }
354
355 /* Checks if there's enough bytes to read */
84a9f336
AV
356 if (endp - p < sizeof(type) + sizeof(id) + sizeof(size))
357 goto header;
de3fe21b 358
84a9f336 359 type = get_unaligned_le32(p);
de3fe21b
MCC
360 p += sizeof(type);
361
84a9f336 362 id = get_unaligned_le64(p);
de3fe21b
MCC
363 p += sizeof(id);
364
66c2d53d 365 if (type & HAS_IF) {
84a9f336 366 int_freq = get_unaligned_le16(p);
66c2d53d 367 p += sizeof(int_freq);
84a9f336
AV
368 if (endp - p < sizeof(size))
369 goto header;
66c2d53d
MCC
370 }
371
84a9f336 372 size = get_unaligned_le32(p);
de3fe21b
MCC
373 p += sizeof(size);
374
84a9f336 375 if (!size || size > endp - p) {
83fb340b 376 tuner_err("Firmware type ");
43efe702 377 dump_firm_type(type);
15c8ffc4
MCC
378 printk(KERN_CONT
379 "(%x), id %llx is corrupted (size=%d, expected %d)\n",
91240dd9 380 type, (unsigned long long)id,
ef8c1888 381 (unsigned)(endp - p), size);
de3fe21b
MCC
382 goto corrupt;
383 }
384
ab0b9fc6 385 priv->firm[n].ptr = kzalloc(size, GFP_KERNEL);
06fd82dc
CP
386 if (priv->firm[n].ptr == NULL) {
387 tuner_err("Not enough memory to load firmware file.\n");
ab0b9fc6 388 rc = -ENOMEM;
de3fe21b
MCC
389 goto err;
390 }
06fd82dc
CP
391 tuner_dbg("Reading firmware type ");
392 if (debug) {
e0262688 393 dump_firm_type_and_int_freq(type, int_freq);
15c8ffc4 394 printk(KERN_CONT "(%x), id %llx, size=%d.\n",
e0262688 395 type, (unsigned long long)id, size);
06fd82dc 396 }
de3fe21b
MCC
397
398 memcpy(priv->firm[n].ptr, p, size);
399 priv->firm[n].type = type;
400 priv->firm[n].id = id;
401 priv->firm[n].size = size;
66c2d53d 402 priv->firm[n].int_freq = int_freq;
de3fe21b
MCC
403
404 p += size;
405 }
406
ab0b9fc6 407 if (n + 1 != priv->firm_size) {
83fb340b 408 tuner_err("Firmware file is incomplete!\n");
de3fe21b
MCC
409 goto corrupt;
410 }
411
412 goto done;
413
84a9f336
AV
414header:
415 tuner_err("Firmware header is incomplete!\n");
de3fe21b 416corrupt:
ab0b9fc6 417 rc = -EINVAL;
83fb340b 418 tuner_err("Error: firmware file is corrupted!\n");
de3fe21b
MCC
419
420err:
06fd82dc 421 tuner_info("Releasing partially loaded firmware file.\n");
de3fe21b
MCC
422 free_firmware(priv);
423
424done:
06fd82dc
CP
425 if (rc == 0)
426 tuner_dbg("Firmware files loaded.\n");
61a96113
MCC
427 else
428 priv->state = XC2028_NODEV;
de3fe21b
MCC
429
430 return rc;
431}
432
f380e1d2
MCC
433static int seek_firmware(struct dvb_frontend *fe, unsigned int type,
434 v4l2_std_id *id)
de3fe21b
MCC
435{
436 struct xc2028_data *priv = fe->tuner_priv;
b1535293 437 int i, best_i = -1, best_nr_matches = 0;
33e53161 438 unsigned int type_mask = 0;
de3fe21b 439
7e28adb2 440 tuner_dbg("%s called, want type=", __func__);
b1535293
CP
441 if (debug) {
442 dump_firm_type(type);
15c8ffc4
MCC
443 printk(KERN_CONT "(%x), id %016llx.\n",
444 type, (unsigned long long)*id);
b1535293 445 }
de3fe21b
MCC
446
447 if (!priv->firm) {
83fb340b 448 tuner_err("Error! firmware not loaded\n");
de3fe21b
MCC
449 return -EINVAL;
450 }
451
f380e1d2 452 if (((type & ~SCODE) == 0) && (*id == 0))
ab0b9fc6 453 *id = V4L2_STD_PAL;
de3fe21b 454
e0f0b37a 455 if (type & BASE)
33e53161 456 type_mask = BASE_TYPES;
ef207fed 457 else if (type & SCODE) {
e0f0b37a 458 type &= SCODE_TYPES;
33e53161 459 type_mask = SCODE_TYPES & ~HAS_IF;
ef207fed 460 } else if (type & DTV_TYPES)
33e53161 461 type_mask = DTV_TYPES;
11a9eff9 462 else if (type & STD_SPECIFIC_TYPES)
33e53161
MCC
463 type_mask = STD_SPECIFIC_TYPES;
464
465 type &= type_mask;
466
8367fe24 467 if (!(type & SCODE))
33e53161 468 type_mask = ~0;
e0f0b37a 469
de3fe21b 470 /* Seek for exact match */
ab0b9fc6 471 for (i = 0; i < priv->firm_size; i++) {
33e53161 472 if ((type == (priv->firm[i].type & type_mask)) &&
ef207fed 473 (*id == priv->firm[i].id))
de3fe21b
MCC
474 goto found;
475 }
476
477 /* Seek for generic video standard match */
ab0b9fc6 478 for (i = 0; i < priv->firm_size; i++) {
b1535293
CP
479 v4l2_std_id match_mask;
480 int nr_matches;
481
33e53161 482 if (type != (priv->firm[i].type & type_mask))
b1535293
CP
483 continue;
484
485 match_mask = *id & priv->firm[i].id;
486 if (!match_mask)
487 continue;
488
489 if ((*id & match_mask) == *id)
490 goto found; /* Supports all the requested standards */
491
492 nr_matches = hweight64(match_mask);
493 if (nr_matches > best_nr_matches) {
494 best_nr_matches = nr_matches;
495 best_i = i;
496 }
497 }
498
499 if (best_nr_matches > 0) {
2af3eb64
MCC
500 tuner_dbg("Selecting best matching firmware (%d bits) for type=",
501 best_nr_matches);
b1535293 502 dump_firm_type(type);
15c8ffc4
MCC
503 printk(KERN_CONT
504 "(%x), id %016llx:\n", type, (unsigned long long)*id);
b1535293
CP
505 i = best_i;
506 goto found;
de3fe21b
MCC
507 }
508
509 /*FIXME: Would make sense to seek for type "hint" match ? */
510
b1535293 511 i = -ENOENT;
f380e1d2 512 goto ret;
de3fe21b
MCC
513
514found:
515 *id = priv->firm[i].id;
de3fe21b 516
f380e1d2 517ret:
b1535293 518 tuner_dbg("%s firmware for type=", (i < 0) ? "Can't find" : "Found");
83fb340b
MCC
519 if (debug) {
520 dump_firm_type(type);
15c8ffc4
MCC
521 printk(KERN_CONT "(%x), id %016llx.\n",
522 type, (unsigned long long)*id);
83fb340b 523 }
f380e1d2
MCC
524 return i;
525}
526
d7cba043
MK
527static inline int do_tuner_callback(struct dvb_frontend *fe, int cmd, int arg)
528{
529 struct xc2028_data *priv = fe->tuner_priv;
530
531 /* analog side (tuner-core) uses i2c_adap->algo_data.
532 * digital side is not guaranteed to have algo_data defined.
533 *
534 * digital side will always have fe->dvb defined.
535 * analog side (tuner-core) doesn't (yet) define fe->dvb.
536 */
537
538 return (!fe->callback) ? -EINVAL :
539 fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
540 fe->dvb->priv : priv->i2c_props.adap->algo_data,
541 DVB_FRONTEND_COMPONENT_TUNER, cmd, arg);
542}
543
f380e1d2
MCC
544static int load_firmware(struct dvb_frontend *fe, unsigned int type,
545 v4l2_std_id *id)
546{
547 struct xc2028_data *priv = fe->tuner_priv;
548 int pos, rc;
56ac0337
MCC
549 unsigned char *p, *endp, buf[MAX_XFER_SIZE];
550
551 if (priv->ctrl.max_len > sizeof(buf))
552 priv->ctrl.max_len = sizeof(buf);
f380e1d2 553
7e28adb2 554 tuner_dbg("%s called\n", __func__);
f380e1d2
MCC
555
556 pos = seek_firmware(fe, type, id);
557 if (pos < 0)
558 return pos;
559
83fb340b 560 tuner_info("Loading firmware for type=");
b1535293 561 dump_firm_type(priv->firm[pos].type);
15c8ffc4
MCC
562 printk(KERN_CONT "(%x), id %016llx.\n",
563 priv->firm[pos].type, (unsigned long long)*id);
83fb340b 564
f380e1d2 565 p = priv->firm[pos].ptr;
f380e1d2 566 endp = p + priv->firm[pos].size;
6cb45879 567
ab0b9fc6 568 while (p < endp) {
de3fe21b
MCC
569 __u16 size;
570
571 /* Checks if there's enough bytes to read */
ab0b9fc6 572 if (p + sizeof(size) > endp) {
83fb340b 573 tuner_err("Firmware chunk size is wrong\n");
de3fe21b
MCC
574 return -EINVAL;
575 }
576
84eeb0b4 577 size = le16_to_cpu(*(__le16 *) p);
de3fe21b
MCC
578 p += sizeof(size);
579
580 if (size == 0xffff)
581 return 0;
582
583 if (!size) {
6cb45879 584 /* Special callback command received */
d7cba043 585 rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0);
ab0b9fc6 586 if (rc < 0) {
83fb340b 587 tuner_err("Error at RESET code %d\n",
ab0b9fc6 588 (*p) & 0x7f);
de3fe21b 589 return -EINVAL;
6cb45879 590 }
6cb45879
MCC
591 continue;
592 }
5403bbae
ML
593 if (size >= 0xff00) {
594 switch (size) {
595 case 0xff00:
d7cba043 596 rc = do_tuner_callback(fe, XC2028_RESET_CLK, 0);
5403bbae
ML
597 if (rc < 0) {
598 tuner_err("Error at RESET code %d\n",
599 (*p) & 0x7f);
600 return -EINVAL;
601 }
b32f9fb9 602 break;
5403bbae
ML
603 default:
604 tuner_info("Invalid RESET code %d\n",
605 size & 0x7f);
606 return -EINVAL;
607
608 }
2d4c0ac6 609 continue;
5403bbae 610 }
de3fe21b
MCC
611
612 /* Checks for a sleep command */
613 if (size & 0x8000) {
ab0b9fc6 614 msleep(size & 0x7fff);
de3fe21b 615 continue;
6cb45879
MCC
616 }
617
de3fe21b 618 if ((size + p > endp)) {
83fb340b 619 tuner_err("missing bytes: need %d, have %d\n",
ab0b9fc6 620 size, (int)(endp - p));
de3fe21b
MCC
621 return -EINVAL;
622 }
6cb45879 623
de3fe21b 624 buf[0] = *p;
6cb45879 625 p++;
de3fe21b 626 size--;
6cb45879 627
de3fe21b 628 /* Sends message chunks */
ab0b9fc6 629 while (size > 0) {
0a196b6f
CP
630 int len = (size < priv->ctrl.max_len - 1) ?
631 size : priv->ctrl.max_len - 1;
6cb45879 632
ab0b9fc6 633 memcpy(buf + 1, p, len);
6cb45879 634
47cc5b78 635 rc = i2c_send(priv, buf, len + 1);
ab0b9fc6 636 if (rc < 0) {
83fb340b 637 tuner_err("%d returned from send\n", rc);
de3fe21b
MCC
638 return -EINVAL;
639 }
640
641 p += len;
642 size -= len;
643 }
4d37ece7
TR
644
645 /* silently fail if the frontend doesn't support I2C flush */
646 rc = do_tuner_callback(fe, XC2028_I2C_FLUSH, 0);
647 if ((rc < 0) && (rc != -EINVAL)) {
648 tuner_err("error executing flush: %d\n", rc);
649 return rc;
650 }
de3fe21b 651 }
43efe702 652 return 0;
6cb45879
MCC
653}
654
f380e1d2 655static int load_scode(struct dvb_frontend *fe, unsigned int type,
66c2d53d 656 v4l2_std_id *id, __u16 int_freq, int scode)
f380e1d2
MCC
657{
658 struct xc2028_data *priv = fe->tuner_priv;
659 int pos, rc;
660 unsigned char *p;
661
7e28adb2 662 tuner_dbg("%s called\n", __func__);
f380e1d2 663
66c2d53d
MCC
664 if (!int_freq) {
665 pos = seek_firmware(fe, type, id);
666 if (pos < 0)
667 return pos;
668 } else {
669 for (pos = 0; pos < priv->firm_size; pos++) {
670 if ((priv->firm[pos].int_freq == int_freq) &&
9ca01e78 671 (priv->firm[pos].type & HAS_IF))
66c2d53d
MCC
672 break;
673 }
674 if (pos == priv->firm_size)
675 return -ENOENT;
676 }
f380e1d2
MCC
677
678 p = priv->firm[pos].ptr;
679
9ca01e78 680 if (priv->firm[pos].type & HAS_IF) {
66c2d53d
MCC
681 if (priv->firm[pos].size != 12 * 16 || scode >= 16)
682 return -EINVAL;
683 p += 12 * scode;
684 } else {
685 /* 16 SCODE entries per file; each SCODE entry is 12 bytes and
686 * has a 2-byte size header in the firmware format. */
687 if (priv->firm[pos].size != 14 * 16 || scode >= 16 ||
84eeb0b4 688 le16_to_cpu(*(__le16 *)(p + 14 * scode)) != 12)
66c2d53d
MCC
689 return -EINVAL;
690 p += 14 * scode + 2;
691 }
f380e1d2 692
d7b22c5c 693 tuner_info("Loading SCODE for type=");
e0262688
CP
694 dump_firm_type_and_int_freq(priv->firm[pos].type,
695 priv->firm[pos].int_freq);
15c8ffc4 696 printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type,
d7b22c5c
CP
697 (unsigned long long)*id);
698
06fd82dc 699 if (priv->firm_version < 0x0202)
47cc5b78
CP
700 rc = send_seq(priv, {0x20, 0x00, 0x00, 0x00});
701 else
702 rc = send_seq(priv, {0xa0, 0x00, 0x00, 0x00});
703 if (rc < 0)
704 return -EIO;
f380e1d2 705
66c2d53d 706 rc = i2c_send(priv, p, 12);
47cc5b78
CP
707 if (rc < 0)
708 return -EIO;
f380e1d2 709
47cc5b78
CP
710 rc = send_seq(priv, {0x00, 0x8c});
711 if (rc < 0)
712 return -EIO;
f380e1d2
MCC
713
714 return 0;
715}
716
ebf044f4
MCC
717static int xc2028_sleep(struct dvb_frontend *fe);
718
00deff1a 719static int check_firmware(struct dvb_frontend *fe, unsigned int type,
66c2d53d 720 v4l2_std_id std, __u16 int_freq)
6cb45879 721{
00deff1a 722 struct xc2028_data *priv = fe->tuner_priv;
e0f0b37a 723 struct firmware_properties new_fw;
61a96113 724 int rc, retry_count = 0;
00deff1a
MCC
725 u16 version, hwmodel;
726 v4l2_std_id std0;
6cb45879 727
7e28adb2 728 tuner_dbg("%s called\n", __func__);
6cb45879 729
61a96113
MCC
730 rc = check_device_status(priv);
731 if (rc < 0)
732 return rc;
de3fe21b 733
0f6dac18 734 if (priv->ctrl.mts && !(type & FM))
e0f0b37a 735 type |= MTS;
6cb45879 736
8bf799a6 737retry:
e0f0b37a
CP
738 new_fw.type = type;
739 new_fw.id = std;
740 new_fw.std_req = std;
741 new_fw.scode_table = SCODE | priv->ctrl.scode_table;
742 new_fw.scode_nr = 0;
66c2d53d 743 new_fw.int_freq = int_freq;
e0f0b37a
CP
744
745 tuner_dbg("checking firmware, user requested type=");
746 if (debug) {
747 dump_firm_type(new_fw.type);
15c8ffc4 748 printk(KERN_CONT "(%x), id %016llx, ", new_fw.type,
e0f0b37a 749 (unsigned long long)new_fw.std_req);
e0262688 750 if (!int_freq) {
15c8ffc4 751 printk(KERN_CONT "scode_tbl ");
e0262688 752 dump_firm_type(priv->ctrl.scode_table);
15c8ffc4 753 printk(KERN_CONT "(%x), ", priv->ctrl.scode_table);
e0262688 754 } else
15c8ffc4
MCC
755 printk(KERN_CONT "int_freq %d, ", new_fw.int_freq);
756 printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr);
e0f0b37a
CP
757 }
758
61a96113
MCC
759 /*
760 * No need to reload base firmware if it matches and if the tuner
761 * is not at sleep mode
762 */
3a495ed7 763 if ((priv->state == XC2028_ACTIVE) &&
61a96113
MCC
764 (((BASE | new_fw.type) & BASE_TYPES) ==
765 (priv->cur_fw.type & BASE_TYPES))) {
e0f0b37a
CP
766 tuner_dbg("BASE firmware not changed.\n");
767 goto skip_base;
768 }
769
770 /* Updating BASE - forget about all currently loaded firmware */
771 memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
772
773 /* Reset is needed before loading firmware */
d7cba043 774 rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0);
e0f0b37a
CP
775 if (rc < 0)
776 goto fail;
777
47bd5bc6
CP
778 /* BASE firmwares are all std0 */
779 std0 = 0;
780 rc = load_firmware(fe, BASE | new_fw.type, &std0);
e0f0b37a
CP
781 if (rc < 0) {
782 tuner_err("Error %d while loading base firmware\n",
783 rc);
784 goto fail;
785 }
5403bbae 786
de3fe21b 787 /* Load INIT1, if needed */
83fb340b 788 tuner_dbg("Load init1 firmware, if exists\n");
de3fe21b 789
47bd5bc6 790 rc = load_firmware(fe, BASE | INIT1 | new_fw.type, &std0);
1ad0b796
CP
791 if (rc == -ENOENT)
792 rc = load_firmware(fe, (BASE | INIT1 | new_fw.type) & ~F8MHZ,
793 &std0);
e0f0b37a
CP
794 if (rc < 0 && rc != -ENOENT) {
795 tuner_err("Error %d while loading init1 firmware\n",
796 rc);
797 goto fail;
798 }
de3fe21b 799
e0f0b37a
CP
800skip_base:
801 /*
802 * No need to reload standard specific firmware if base firmware
803 * was not reloaded and requested video standards have not changed.
de3fe21b 804 */
e0f0b37a
CP
805 if (priv->cur_fw.type == (BASE | new_fw.type) &&
806 priv->cur_fw.std_req == std) {
83fb340b 807 tuner_dbg("Std-specific firmware already loaded.\n");
e0f0b37a 808 goto skip_std_specific;
2e4160ca 809 }
6cb45879 810
e0f0b37a
CP
811 /* Reloading std-specific firmware forces a SCODE update */
812 priv->cur_fw.scode_table = 0;
813
e0f0b37a 814 rc = load_firmware(fe, new_fw.type, &new_fw.id);
cca83798
MCC
815 if (rc == -ENOENT)
816 rc = load_firmware(fe, new_fw.type & ~F8MHZ, &new_fw.id);
817
ab0b9fc6 818 if (rc < 0)
e0f0b37a
CP
819 goto fail;
820
821skip_std_specific:
822 if (priv->cur_fw.scode_table == new_fw.scode_table &&
823 priv->cur_fw.scode_nr == new_fw.scode_nr) {
824 tuner_dbg("SCODE firmware already loaded.\n");
825 goto check_device;
826 }
6cb45879 827
40ae91a7
MCC
828 if (new_fw.type & FM)
829 goto check_device;
830
f380e1d2 831 /* Load SCODE firmware, if exists */
e0f0b37a 832 tuner_dbg("Trying to load scode %d\n", new_fw.scode_nr);
f380e1d2 833
66c2d53d
MCC
834 rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id,
835 new_fw.int_freq, new_fw.scode_nr);
43efe702 836
e0f0b37a 837check_device:
8bf799a6
CP
838 if (xc2028_get_reg(priv, 0x0004, &version) < 0 ||
839 xc2028_get_reg(priv, 0x0008, &hwmodel) < 0) {
840 tuner_err("Unable to read tuner registers.\n");
841 goto fail;
842 }
80b52208 843
2af3eb64 844 tuner_dbg("Device is Xceive %d version %d.%d, firmware version %d.%d\n",
b37f2d6a
DH
845 hwmodel, (version & 0xf000) >> 12, (version & 0xf00) >> 8,
846 (version & 0xf0) >> 4, version & 0xf);
6cb45879 847
0fb84ce0
MCC
848
849 if (priv->ctrl.read_not_reliable)
850 goto read_not_reliable;
851
8bf799a6
CP
852 /* Check firmware version against what we downloaded. */
853 if (priv->firm_version != ((version & 0xf0) << 4 | (version & 0x0f))) {
2d5024a9
MCC
854 if (!priv->ctrl.read_not_reliable) {
855 tuner_err("Incorrect readback of firmware version.\n");
856 goto fail;
857 } else {
2af3eb64 858 tuner_err("Returned an incorrect version. However, read is not reliable enough. Ignoring it.\n");
2d5024a9
MCC
859 hwmodel = 3028;
860 }
8bf799a6
CP
861 }
862
863 /* Check that the tuner hardware model remains consistent over time. */
864 if (priv->hwmodel == 0 && (hwmodel == 2028 || hwmodel == 3028)) {
865 priv->hwmodel = hwmodel;
866 priv->hwvers = version & 0xff00;
867 } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel ||
868 priv->hwvers != (version & 0xff00)) {
2af3eb64 869 tuner_err("Read invalid device hardware information - tuner hung?\n");
8bf799a6
CP
870 goto fail;
871 }
872
0fb84ce0 873read_not_reliable:
03c42001 874 priv->cur_fw = new_fw;
e0f0b37a
CP
875
876 /*
877 * By setting BASE in cur_fw.type only after successfully loading all
878 * firmwares, we can:
879 * 1. Identify that BASE firmware with type=0 has been loaded;
880 * 2. Tell whether BASE firmware was just changed the next time through.
881 */
882 priv->cur_fw.type |= BASE;
61a96113 883 priv->state = XC2028_ACTIVE;
6cb45879
MCC
884
885 return 0;
e0f0b37a
CP
886
887fail:
22a1e778 888 free_firmware(priv);
61a96113 889
b8bc77db 890 if (retry_count < 8) {
8bf799a6 891 msleep(50);
b8bc77db 892 retry_count++;
8bf799a6
CP
893 tuner_dbg("Retrying firmware load\n");
894 goto retry;
895 }
896
ebf044f4
MCC
897 /* Firmware didn't load. Put the device to sleep */
898 xc2028_sleep(fe);
899
e0f0b37a
CP
900 if (rc == -ENOENT)
901 rc = -EINVAL;
902 return rc;
6cb45879
MCC
903}
904
215b95ba 905static int xc2028_signal(struct dvb_frontend *fe, u16 *strength)
6cb45879 906{
215b95ba 907 struct xc2028_data *priv = fe->tuner_priv;
7d58d111 908 u16 frq_lock, signal = 0;
90acb85f 909 int rc, i;
3b20532c 910
7e28adb2 911 tuner_dbg("%s called\n", __func__);
6cb45879 912
61a96113
MCC
913 rc = check_device_status(priv);
914 if (rc < 0)
915 return rc;
916
2276bf70
MCC
917 /* If the device is sleeping, no channel is tuned */
918 if (!rc) {
919 *strength = 0;
920 return 0;
921 }
922
215b95ba 923 mutex_lock(&priv->lock);
6cb45879 924
80b52208 925 /* Sync Lock Indicator */
90acb85f
MCC
926 for (i = 0; i < 3; i++) {
927 rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock);
928 if (rc < 0)
929 goto ret;
930
931 if (frq_lock)
932 break;
933 msleep(6);
934 }
6cb45879 935
1d432a3d 936 /* Frequency didn't lock */
90acb85f
MCC
937 if (frq_lock == 2)
938 goto ret;
6cb45879 939
80b52208 940 /* Get SNR of the video signal */
304bce41 941 rc = xc2028_get_reg(priv, XREG_SNR, &signal);
7d58d111 942 if (rc < 0)
b0166ab3
MCC
943 goto ret;
944
90acb85f
MCC
945 /* Signal level is 3 bits only */
946
947 signal = ((1 << 12) - 1) | ((signal & 0x07) << 12);
3b20532c
MCC
948
949ret:
215b95ba
MCC
950 mutex_unlock(&priv->lock);
951
952 *strength = signal;
6cb45879 953
b0166ab3
MCC
954 tuner_dbg("signal strength is %d\n", signal);
955
7d58d111 956 return rc;
6cb45879
MCC
957}
958
1d432a3d
MCC
959static int xc2028_get_afc(struct dvb_frontend *fe, s32 *afc)
960{
961 struct xc2028_data *priv = fe->tuner_priv;
962 int i, rc;
963 u16 frq_lock = 0;
964 s16 afc_reg = 0;
965
966 rc = check_device_status(priv);
967 if (rc < 0)
968 return rc;
969
2276bf70
MCC
970 /* If the device is sleeping, no channel is tuned */
971 if (!rc) {
972 *afc = 0;
973 return 0;
974 }
975
1d432a3d
MCC
976 mutex_lock(&priv->lock);
977
978 /* Sync Lock Indicator */
979 for (i = 0; i < 3; i++) {
980 rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock);
981 if (rc < 0)
982 goto ret;
983
984 if (frq_lock)
985 break;
986 msleep(6);
987 }
988
989 /* Frequency didn't lock */
990 if (frq_lock == 2)
991 goto ret;
992
993 /* Get AFC */
994 rc = xc2028_get_reg(priv, XREG_FREQ_ERROR, &afc_reg);
995 if (rc < 0)
f088ccd6 996 goto ret;
1d432a3d
MCC
997
998 *afc = afc_reg * 15625; /* Hz */
999
1000 tuner_dbg("AFC is %d Hz\n", *afc);
1001
1002ret:
1003 mutex_unlock(&priv->lock);
1004
1005 return rc;
1006}
1007
6cb45879
MCC
1008#define DIV 15625
1009
00deff1a 1010static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */,
aa40d194 1011 enum v4l2_tuner_type new_type,
66c2d53d
MCC
1012 unsigned int type,
1013 v4l2_std_id std,
1014 u16 int_freq)
6cb45879 1015{
215b95ba 1016 struct xc2028_data *priv = fe->tuner_priv;
ab0b9fc6 1017 int rc = -EINVAL;
2ce4b3aa 1018 unsigned char buf[4];
ab0b9fc6 1019 u32 div, offset = 0;
6cb45879 1020
7e28adb2 1021 tuner_dbg("%s called\n", __func__);
215b95ba 1022
de3fe21b
MCC
1023 mutex_lock(&priv->lock);
1024
2ce4b3aa 1025 tuner_dbg("should set frequency %d kHz\n", freq / 1000);
6cb45879 1026
66c2d53d 1027 if (check_firmware(fe, type, std, int_freq) < 0)
3b20532c 1028 goto ret;
2e4160ca 1029
2800ae9c
MCC
1030 /* On some cases xc2028 can disable video output, if
1031 * very weak signals are received. By sending a soft
1032 * reset, this is re-enabled. So, it is better to always
1033 * send a soft reset before changing channels, to be sure
1034 * that xc2028 will be in a safe state.
1035 * Maybe this might also be needed for DTV.
1036 */
fd34cb08
MCC
1037 switch (new_type) {
1038 case V4L2_TUNER_ANALOG_TV:
2800ae9c 1039 rc = send_seq(priv, {0x00, 0x00});
0a863975 1040
fd34cb08
MCC
1041 /* Analog mode requires offset = 0 */
1042 break;
1043 case V4L2_TUNER_RADIO:
1044 /* Radio mode requires offset = 0 */
1045 break;
1046 case V4L2_TUNER_DIGITAL_TV:
7f2199c0
MCC
1047 /*
1048 * Digital modes require an offset to adjust to the
1049 * proper frequency. The offset depends on what
1050 * firmware version is used.
1051 */
1052
1053 /*
1054 * Adjust to the center frequency. This is calculated by the
1055 * formula: offset = 1.25MHz - BW/2
1056 * For DTV 7/8, the firmware uses BW = 8000, so it needs a
1057 * further adjustment to get the frequency center on VHF
1058 */
98ab8550
GG
1059
1060 /*
1061 * The firmware DTV78 used to work fine in UHF band (8 MHz
1062 * bandwidth) but not at all in VHF band (7 MHz bandwidth).
1063 * The real problem was connected to the formula used to
1064 * calculate the center frequency offset in VHF band.
1065 * In fact, removing the 500KHz adjustment fixed the problem.
1066 * This is coherent to what was implemented for the DTV7
1067 * firmware.
1068 * In the end, now the center frequency is the same for all 3
1069 * firmwares (DTV7, DTV8, DTV78) and doesn't depend on channel
1070 * bandwidth.
1071 */
1072
0a863975
MCC
1073 if (priv->cur_fw.type & DTV6)
1074 offset = 1750000;
98ab8550 1075 else /* DTV7 or DTV8 or DTV78 */
0a863975
MCC
1076 offset = 2750000;
1077
897b8422 1078 /*
7f2199c0
MCC
1079 * xc3028 additional "magic"
1080 * Depending on the firmware version, it needs some adjustments
1081 * to properly centralize the frequency. This seems to be
1082 * needed to compensate the SCODE table adjustments made by
1083 * newer firmwares
897b8422 1084 */
7f2199c0 1085
7f2199c0
MCC
1086 /*
1087 * The proper adjustment would be to do it at s-code table.
1088 * However, this didn't work, as reported by
1089 * Robert Lowery <rglowery@exemail.com.au>
1090 */
1091
98ab8550 1092#if 0
7f2199c0
MCC
1093 /*
1094 * Still need tests for XC3028L (firmware 3.2 or upper)
1095 * So, for now, let's just comment the per-firmware
1096 * version of this change. Reports with xc3028l working
5a13e40b 1097 * with and without the lines below are welcome
7f2199c0
MCC
1098 */
1099
1100 if (priv->firm_version < 0x0302) {
1101 if (priv->cur_fw.type & DTV7)
1102 offset += 500000;
1103 } else {
1104 if (priv->cur_fw.type & DTV7)
1105 offset -= 300000;
1106 else if (type != ATSC) /* DVB @6MHz, DTV 8 and DTV 7/8 */
1107 offset += 200000;
1108 }
1109#endif
c6f977ec 1110 break;
96a5b3a8
AP
1111 default:
1112 tuner_err("Unsupported tuner type %d.\n", new_type);
1113 break;
a44f1c43 1114 }
2e4160ca 1115
ab0b9fc6 1116 div = (freq - offset + DIV / 2) / DIV;
2e4160ca 1117
6cb45879 1118 /* CMD= Set frequency */
06fd82dc 1119 if (priv->firm_version < 0x0202)
304bce41 1120 rc = send_seq(priv, {0x00, XREG_RF_FREQ, 0x00, 0x00});
47cc5b78 1121 else
304bce41 1122 rc = send_seq(priv, {0x80, XREG_RF_FREQ, 0x00, 0x00});
47cc5b78
CP
1123 if (rc < 0)
1124 goto ret;
de3fe21b 1125
1fe87369
MCC
1126 /* Return code shouldn't be checked.
1127 The reset CLK is needed only with tm6000.
1128 Driver should work fine even if this fails.
1129 */
70ca3c4b
DH
1130 if (priv->ctrl.msleep)
1131 msleep(priv->ctrl.msleep);
d7cba043 1132 do_tuner_callback(fe, XC2028_RESET_CLK, 1);
6cb45879
MCC
1133
1134 msleep(10);
701672eb 1135
ab0b9fc6
MCC
1136 buf[0] = 0xff & (div >> 24);
1137 buf[1] = 0xff & (div >> 16);
1138 buf[2] = 0xff & (div >> 8);
1139 buf[3] = 0xff & (div);
6cb45879 1140
47cc5b78 1141 rc = i2c_send(priv, buf, sizeof(buf));
ab0b9fc6 1142 if (rc < 0)
3b20532c 1143 goto ret;
6cb45879
MCC
1144 msleep(100);
1145
ab0b9fc6 1146 priv->frequency = freq;
215b95ba 1147
c6480ccc 1148 tuner_dbg("divisor= %*ph (freq=%d.%03d)\n", 4, buf,
2ce4b3aa 1149 freq / 1000000, (freq % 1000000) / 1000);
3b20532c 1150
ab0b9fc6 1151 rc = 0;
6cb45879 1152
215b95ba
MCC
1153ret:
1154 mutex_unlock(&priv->lock);
6cb45879 1155
215b95ba 1156 return rc;
701672eb
ML
1157}
1158
00deff1a 1159static int xc2028_set_analog_freq(struct dvb_frontend *fe,
ab0b9fc6 1160 struct analog_parameters *p)
6cb45879 1161{
215b95ba 1162 struct xc2028_data *priv = fe->tuner_priv;
00deff1a
MCC
1163 unsigned int type=0;
1164
7e28adb2 1165 tuner_dbg("%s called\n", __func__);
c71d4bc5 1166
d74cb25e
MCC
1167 if (p->mode == V4L2_TUNER_RADIO) {
1168 type |= FM;
1169 if (priv->ctrl.input1)
1170 type |= INPUT1;
1171 return generic_set_freq(fe, (625l * p->frequency) / 10,
437f5fa3 1172 V4L2_TUNER_RADIO, type, 0, 0);
d74cb25e
MCC
1173 }
1174
a5e9fe14
MCC
1175 /* if std is not defined, choose one */
1176 if (!p->std)
1177 p->std = V4L2_STD_MN;
1178
1179 /* PAL/M, PAL/N, PAL/Nc and NTSC variants should use 6MHz firmware */
00deff1a
MCC
1180 if (!(p->std & V4L2_STD_MN))
1181 type |= F8MHZ;
6cb45879 1182
00deff1a
MCC
1183 /* Add audio hack to std mask */
1184 p->std |= parse_audio_std_option();
6cb45879 1185
00deff1a 1186 return generic_set_freq(fe, 62500l * p->frequency,
437f5fa3 1187 V4L2_TUNER_ANALOG_TV, type, p->std, 0);
215b95ba 1188}
6cb45879 1189
14d24d14 1190static int xc2028_set_params(struct dvb_frontend *fe)
6cb45879 1191{
506cd714
MCC
1192 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1193 u32 delsys = c->delivery_system;
1194 u32 bw = c->bandwidth_hz;
215b95ba 1195 struct xc2028_data *priv = fe->tuner_priv;
61a96113
MCC
1196 int rc;
1197 unsigned int type = 0;
ad35ce9e 1198 u16 demod = 0;
6cb45879 1199
7e28adb2 1200 tuner_dbg("%s called\n", __func__);
701672eb 1201
61a96113
MCC
1202 rc = check_device_status(priv);
1203 if (rc < 0)
1204 return rc;
1205
506cd714
MCC
1206 switch (delsys) {
1207 case SYS_DVBT:
1208 case SYS_DVBT2:
a1014d70
MCC
1209 /*
1210 * The only countries with 6MHz seem to be Taiwan/Uruguay.
1211 * Both seem to require QAM firmware for OFDM decoding
1212 * Tested in Taiwan by Terry Wu <terrywu2009@gmail.com>
1213 */
506cd714 1214 if (bw <= 6000000)
a1014d70 1215 type |= QAM;
00deff1a 1216
0975fc68
MCC
1217 switch (priv->ctrl.type) {
1218 case XC2028_D2633:
1219 type |= D2633;
1220 break;
1221 case XC2028_D2620:
1222 type |= D2620;
1223 break;
1224 case XC2028_AUTO:
1225 default:
1226 /* Zarlink seems to need D2633 */
1227 if (priv->ctrl.demod == XC3028_FE_ZARLINK456)
1228 type |= D2633;
1229 else
1230 type |= D2620;
1231 }
506cd714
MCC
1232 break;
1233 case SYS_ATSC:
1234 /* The only ATSC firmware (at least on v2.7) is D2633 */
1235 type |= ATSC | D2633;
1236 break;
1237 /* DVB-S and pure QAM (FE_QAM) are not supported */
1238 default:
1239 return -EINVAL;
1240 }
1241
1242 if (bw <= 6000000) {
1243 type |= DTV6;
1244 priv->ctrl.vhfbw7 = 0;
1245 priv->ctrl.uhfbw8 = 0;
1246 } else if (bw <= 7000000) {
1247 if (c->frequency < 470000000)
1248 priv->ctrl.vhfbw7 = 1;
1249 else
1250 priv->ctrl.uhfbw8 = 0;
1251 type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7;
1252 type |= F8MHZ;
1253 } else {
1254 if (c->frequency < 470000000)
1255 priv->ctrl.vhfbw7 = 0;
1256 else
1257 priv->ctrl.uhfbw8 = 1;
1258 type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8;
1259 type |= F8MHZ;
0975fc68
MCC
1260 }
1261
66c2d53d 1262 /* All S-code tables need a 200kHz shift */
6e707b4c 1263 if (priv->ctrl.demod) {
7d350284
MCC
1264 demod = priv->ctrl.demod;
1265
7f2199c0
MCC
1266 /*
1267 * Newer firmwares require a 200 kHz offset only for ATSC
1268 */
1269 if (type == ATSC || priv->firm_version < 0x0302)
7d350284 1270 demod += 200;
6e707b4c
AW
1271 /*
1272 * The DTV7 S-code table needs a 700 kHz shift.
6e707b4c
AW
1273 *
1274 * DTV7 is only used in Australia. Germany or Italy may also
1275 * use this firmware after initialization, but a tune to a UHF
1276 * channel should then cause DTV78 to be used.
7f2199c0
MCC
1277 *
1278 * Unfortunately, on real-field tests, the s-code offset
1279 * didn't work as expected, as reported by
1280 * Robert Lowery <rglowery@exemail.com.au>
6e707b4c 1281 */
6e707b4c 1282 }
b542dfdc 1283
506cd714 1284 return generic_set_freq(fe, c->frequency,
437f5fa3 1285 V4L2_TUNER_DIGITAL_TV, type, 0, demod);
6cb45879 1286}
701672eb 1287
74a89b2a
MCC
1288static int xc2028_sleep(struct dvb_frontend *fe)
1289{
1290 struct xc2028_data *priv = fe->tuner_priv;
61a96113
MCC
1291 int rc;
1292
1293 rc = check_device_status(priv);
1294 if (rc < 0)
1295 return rc;
74a89b2a 1296
2276bf70
MCC
1297 /* Device is already in sleep mode */
1298 if (!rc)
10f201af 1299 return 0;
74a89b2a 1300
2276bf70
MCC
1301 /* Avoid firmware reload on slow devices or if PM disabled */
1302 if (no_poweroff || priv->ctrl.disable_power_mgmt)
ebf044f4
MCC
1303 return 0;
1304
74a89b2a 1305 tuner_dbg("Putting xc2028/3028 into poweroff mode.\n");
e278e746
MCC
1306 if (debug > 1) {
1307 tuner_dbg("Printing sleep stack trace:\n");
1308 dump_stack();
1309 }
74a89b2a
MCC
1310
1311 mutex_lock(&priv->lock);
1312
1313 if (priv->firm_version < 0x0202)
304bce41 1314 rc = send_seq(priv, {0x00, XREG_POWER_DOWN, 0x00, 0x00});
74a89b2a 1315 else
304bce41 1316 rc = send_seq(priv, {0x80, XREG_POWER_DOWN, 0x00, 0x00});
74a89b2a 1317
ebf044f4
MCC
1318 if (rc >= 0)
1319 priv->state = XC2028_SLEEP;
74a89b2a
MCC
1320
1321 mutex_unlock(&priv->lock);
1322
1323 return rc;
1324}
45819c38 1325
194ced7a 1326static void xc2028_dvb_release(struct dvb_frontend *fe)
701672eb 1327{
215b95ba
MCC
1328 struct xc2028_data *priv = fe->tuner_priv;
1329
7e28adb2 1330 tuner_dbg("%s called\n", __func__);
701672eb 1331
aa501be9
CP
1332 mutex_lock(&xc2028_list_mutex);
1333
c663d035 1334 /* only perform final cleanup if this is the last instance */
22a1e778 1335 if (hybrid_tuner_report_instance_count(priv) == 1)
de3fe21b 1336 free_firmware(priv);
701672eb 1337
c663d035
MK
1338 if (priv)
1339 hybrid_tuner_release_state(priv);
1340
aa501be9
CP
1341 mutex_unlock(&xc2028_list_mutex);
1342
c663d035 1343 fe->tuner_priv = NULL;
701672eb
ML
1344}
1345
215b95ba 1346static int xc2028_get_frequency(struct dvb_frontend *fe, u32 *frequency)
701672eb 1347{
215b95ba 1348 struct xc2028_data *priv = fe->tuner_priv;
61a96113 1349 int rc;
701672eb 1350
7e28adb2 1351 tuner_dbg("%s called\n", __func__);
701672eb 1352
61a96113
MCC
1353 rc = check_device_status(priv);
1354 if (rc < 0)
1355 return rc;
1356
215b95ba 1357 *frequency = priv->frequency;
701672eb
ML
1358
1359 return 0;
1360}
1361
61a96113
MCC
1362static void load_firmware_cb(const struct firmware *fw,
1363 void *context)
1364{
1365 struct dvb_frontend *fe = context;
1366 struct xc2028_data *priv = fe->tuner_priv;
1367 int rc;
1368
1369 tuner_dbg("request_firmware_nowait(): %s\n", fw ? "OK" : "error");
1370 if (!fw) {
1371 tuner_err("Could not load firmware %s.\n", priv->fname);
1372 priv->state = XC2028_NODEV;
1373 return;
1374 }
1375
1376 rc = load_all_firmwares(fe, fw);
1377
1378 release_firmware(fw);
1379
1380 if (rc < 0)
1381 return;
ebf044f4 1382 priv->state = XC2028_ACTIVE;
61a96113
MCC
1383}
1384
ab0b9fc6 1385static int xc2028_set_config(struct dvb_frontend *fe, void *priv_cfg)
de3fe21b
MCC
1386{
1387 struct xc2028_data *priv = fe->tuner_priv;
1388 struct xc2028_ctrl *p = priv_cfg;
0a196b6f 1389 int rc = 0;
de3fe21b 1390
7e28adb2 1391 tuner_dbg("%s called\n", __func__);
de3fe21b 1392
06fd82dc
CP
1393 mutex_lock(&priv->lock);
1394
61a96113
MCC
1395 /*
1396 * Copy the config data.
61a96113 1397 */
0a196b6f 1398 memcpy(&priv->ctrl, p, sizeof(priv->ctrl));
de3fe21b 1399
61a96113
MCC
1400 /*
1401 * If firmware name changed, frees firmware. As free_firmware will
1402 * reset the status to NO_FIRMWARE, this forces a new request_firmware
1403 */
1404 if (!firmware_name[0] && p->fname &&
1405 priv->fname && strcmp(p->fname, priv->fname))
1406 free_firmware(priv);
1407
1408 if (priv->ctrl.max_len < 9)
1409 priv->ctrl.max_len = 13;
1410
1411 if (priv->state == XC2028_NO_FIRMWARE) {
1412 if (!firmware_name[0])
22a1e778 1413 priv->fname = kstrdup(p->fname, GFP_KERNEL);
61a96113
MCC
1414 else
1415 priv->fname = firmware_name;
1416
22a1e778
TI
1417 if (!priv->fname) {
1418 rc = -ENOMEM;
1419 goto unlock;
1420 }
1421
61a96113
MCC
1422 rc = request_firmware_nowait(THIS_MODULE, 1,
1423 priv->fname,
1424 priv->i2c_props.adap->dev.parent,
1425 GFP_KERNEL,
1426 fe, load_firmware_cb);
1427 if (rc < 0) {
1428 tuner_err("Failed to request firmware %s\n",
1429 priv->fname);
1430 priv->state = XC2028_NODEV;
1e9c14f7
HPS
1431 } else
1432 priv->state = XC2028_WAITING_FIRMWARE;
61a96113 1433 }
210bd104 1434unlock:
06fd82dc
CP
1435 mutex_unlock(&priv->lock);
1436
0a196b6f 1437 return rc;
de3fe21b
MCC
1438}
1439
215b95ba 1440static const struct dvb_tuner_ops xc2028_dvb_tuner_ops = {
701672eb 1441 .info = {
ab0b9fc6
MCC
1442 .name = "Xceive XC3028",
1443 .frequency_min = 42000000,
1444 .frequency_max = 864000000,
1445 .frequency_step = 50000,
1446 },
701672eb 1447
de3fe21b 1448 .set_config = xc2028_set_config,
00deff1a 1449 .set_analog_params = xc2028_set_analog_freq,
215b95ba
MCC
1450 .release = xc2028_dvb_release,
1451 .get_frequency = xc2028_get_frequency,
1452 .get_rf_strength = xc2028_signal,
1d432a3d 1453 .get_afc = xc2028_get_afc,
215b95ba 1454 .set_params = xc2028_set_params,
74a89b2a 1455 .sleep = xc2028_sleep,
701672eb
ML
1456};
1457
7972f988
MK
1458struct dvb_frontend *xc2028_attach(struct dvb_frontend *fe,
1459 struct xc2028_config *cfg)
701672eb 1460{
215b95ba 1461 struct xc2028_data *priv;
c663d035 1462 int instance;
701672eb 1463
83fb340b 1464 if (debug)
2756665c 1465 printk(KERN_DEBUG "xc2028: Xcv2028/3028 init called!\n");
701672eb 1466
b412ba78 1467 if (NULL == cfg)
a37b4c9b 1468 return NULL;
215b95ba 1469
a37b4c9b 1470 if (!fe) {
2756665c 1471 printk(KERN_ERR "xc2028: No frontend!\n");
a37b4c9b 1472 return NULL;
215b95ba
MCC
1473 }
1474
aa501be9
CP
1475 mutex_lock(&xc2028_list_mutex);
1476
c663d035
MK
1477 instance = hybrid_tuner_request_state(struct xc2028_data, priv,
1478 hybrid_tuner_instance_list,
1479 cfg->i2c_adap, cfg->i2c_addr,
1480 "xc2028");
1481 switch (instance) {
1482 case 0:
1483 /* memory allocation failure */
1484 goto fail;
c663d035
MK
1485 case 1:
1486 /* new tuner instance */
0a196b6f 1487 priv->ctrl.max_len = 13;
de3fe21b 1488
215b95ba
MCC
1489 mutex_init(&priv->lock);
1490
c663d035
MK
1491 fe->tuner_priv = priv;
1492 break;
1493 case 2:
1494 /* existing tuner instance */
1495 fe->tuner_priv = priv;
1496 break;
1497 }
b412ba78 1498
215b95ba 1499 memcpy(&fe->ops.tuner_ops, &xc2028_dvb_tuner_ops,
ab0b9fc6 1500 sizeof(xc2028_dvb_tuner_ops));
215b95ba
MCC
1501
1502 tuner_info("type set to %s\n", "XCeive xc2028/xc3028 tuner");
1503
71a2ee37
MCC
1504 if (cfg->ctrl)
1505 xc2028_set_config(fe, cfg->ctrl);
1506
aa501be9
CP
1507 mutex_unlock(&xc2028_list_mutex);
1508
a37b4c9b 1509 return fe;
c663d035
MK
1510fail:
1511 mutex_unlock(&xc2028_list_mutex);
1512
1513 xc2028_dvb_release(fe);
1514 return NULL;
215b95ba 1515}
a37b4c9b 1516
701672eb
ML
1517EXPORT_SYMBOL(xc2028_attach);
1518
215b95ba 1519MODULE_DESCRIPTION("Xceive xc2028/xc3028 tuner driver");
983d214e 1520MODULE_AUTHOR("Michel Ludwig <michel.ludwig@gmail.com>");
215b95ba 1521MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
0c20e8ca 1522MODULE_LICENSE("GPL v2");
ab9cbcd3
MCC
1523MODULE_FIRMWARE(XC2028_DEFAULT_FIRMWARE);
1524MODULE_FIRMWARE(XC3028L_DEFAULT_FIRMWARE);