Commit | Line | Data |
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6cb45879 MCC |
1 | /* tuner-xc2028 |
2 | * | |
33e53161 | 3 | * Copyright (c) 2007-2008 Mauro Carvalho Chehab (mchehab@infradead.org) |
983d214e | 4 | * |
701672eb ML |
5 | * Copyright (c) 2007 Michel Ludwig (michel.ludwig@gmail.com) |
6 | * - frontend interface | |
983d214e | 7 | * |
6cb45879 MCC |
8 | * This code is placed under the terms of the GNU General Public License v2 |
9 | */ | |
10 | ||
11 | #include <linux/i2c.h> | |
12 | #include <asm/div64.h> | |
13 | #include <linux/firmware.h> | |
ab0b9fc6 | 14 | #include <linux/videodev2.h> |
6cb45879 | 15 | #include <linux/delay.h> |
701672eb | 16 | #include <media/tuner.h> |
3b20532c | 17 | #include <linux/mutex.h> |
5a0e3ad6 | 18 | #include <linux/slab.h> |
84a9f336 | 19 | #include <asm/unaligned.h> |
215b95ba | 20 | #include "tuner-i2c.h" |
6cb45879 | 21 | #include "tuner-xc2028.h" |
de3fe21b | 22 | #include "tuner-xc2028-types.h" |
6cb45879 | 23 | |
701672eb ML |
24 | #include <linux/dvb/frontend.h> |
25 | #include "dvb_frontend.h" | |
26 | ||
304bce41 MS |
27 | /* Registers (Write-only) */ |
28 | #define XREG_INIT 0x00 | |
29 | #define XREG_RF_FREQ 0x02 | |
30 | #define XREG_POWER_DOWN 0x08 | |
31 | ||
32 | /* Registers (Read-only) */ | |
33 | #define XREG_FREQ_ERROR 0x01 | |
34 | #define XREG_LOCK 0x02 | |
35 | #define XREG_VERSION 0x04 | |
36 | #define XREG_PRODUCT_ID 0x08 | |
37 | #define XREG_HSYNC_FREQ 0x10 | |
38 | #define XREG_FRAME_LINES 0x20 | |
39 | #define XREG_SNR 0x40 | |
40 | ||
41 | #define XREG_ADC_ENV 0x0100 | |
ef8c1888 | 42 | |
83fb340b MCC |
43 | static int debug; |
44 | module_param(debug, int, 0644); | |
45 | MODULE_PARM_DESC(debug, "enable verbose debug messages"); | |
46 | ||
74a89b2a MCC |
47 | static int no_poweroff; |
48 | module_param(no_poweroff, int, 0644); | |
4900877b | 49 | MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n" |
74a89b2a MCC |
50 | "1 keep device energized and with tuner ready all the times.\n" |
51 | " Faster, but consumes more power and keeps the device hotter\n"); | |
52 | ||
a82200fb MCC |
53 | static char audio_std[8]; |
54 | module_param_string(audio_std, audio_std, sizeof(audio_std), 0); | |
55 | MODULE_PARM_DESC(audio_std, | |
56 | "Audio standard. XC3028 audio decoder explicitly " | |
57 | "needs to know what audio\n" | |
58 | "standard is needed for some video standards with audio A2 or NICAM.\n" | |
59 | "The valid values are:\n" | |
60 | "A2\n" | |
61 | "A2/A\n" | |
62 | "A2/B\n" | |
63 | "NICAM\n" | |
64 | "NICAM/A\n" | |
65 | "NICAM/B\n"); | |
66 | ||
4327b77e | 67 | static char firmware_name[30]; |
5c913c05 MCC |
68 | module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0); |
69 | MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the " | |
70 | "default firmware name\n"); | |
71 | ||
c663d035 | 72 | static LIST_HEAD(hybrid_tuner_instance_list); |
aa501be9 CP |
73 | static DEFINE_MUTEX(xc2028_list_mutex); |
74 | ||
de3fe21b MCC |
75 | /* struct for storing firmware table */ |
76 | struct firmware_description { | |
77 | unsigned int type; | |
78 | v4l2_std_id id; | |
66c2d53d | 79 | __u16 int_freq; |
de3fe21b MCC |
80 | unsigned char *ptr; |
81 | unsigned int size; | |
82 | }; | |
6cb45879 | 83 | |
e0f0b37a CP |
84 | struct firmware_properties { |
85 | unsigned int type; | |
86 | v4l2_std_id id; | |
87 | v4l2_std_id std_req; | |
66c2d53d | 88 | __u16 int_freq; |
e0f0b37a CP |
89 | unsigned int scode_table; |
90 | int scode_nr; | |
91 | }; | |
92 | ||
61a96113 MCC |
93 | enum xc2028_state { |
94 | XC2028_NO_FIRMWARE = 0, | |
95 | XC2028_WAITING_FIRMWARE, | |
96 | XC2028_ACTIVE, | |
97 | XC2028_SLEEP, | |
98 | XC2028_NODEV, | |
99 | }; | |
100 | ||
6cb45879 | 101 | struct xc2028_data { |
c663d035 | 102 | struct list_head hybrid_tuner_instance_list; |
215b95ba | 103 | struct tuner_i2c_props i2c_props; |
de3fe21b MCC |
104 | __u32 frequency; |
105 | ||
61a96113 MCC |
106 | enum xc2028_state state; |
107 | const char *fname; | |
108 | ||
de3fe21b MCC |
109 | struct firmware_description *firm; |
110 | int firm_size; | |
06fd82dc | 111 | __u16 firm_version; |
de3fe21b | 112 | |
8bf799a6 CP |
113 | __u16 hwmodel; |
114 | __u16 hwvers; | |
115 | ||
de3fe21b | 116 | struct xc2028_ctrl ctrl; |
215b95ba | 117 | |
e0f0b37a | 118 | struct firmware_properties cur_fw; |
215b95ba MCC |
119 | |
120 | struct mutex lock; | |
6cb45879 MCC |
121 | }; |
122 | ||
47cc5b78 CP |
123 | #define i2c_send(priv, buf, size) ({ \ |
124 | int _rc; \ | |
125 | _rc = tuner_i2c_xfer_send(&priv->i2c_props, buf, size); \ | |
126 | if (size != _rc) \ | |
127 | tuner_info("i2c output error: rc = %d (should be %d)\n",\ | |
128 | _rc, (int)size); \ | |
70ca3c4b DH |
129 | if (priv->ctrl.msleep) \ |
130 | msleep(priv->ctrl.msleep); \ | |
47cc5b78 CP |
131 | _rc; \ |
132 | }) | |
133 | ||
134 | #define i2c_rcv(priv, buf, size) ({ \ | |
135 | int _rc; \ | |
136 | _rc = tuner_i2c_xfer_recv(&priv->i2c_props, buf, size); \ | |
137 | if (size != _rc) \ | |
83fb340b | 138 | tuner_err("i2c input error: rc = %d (should be %d)\n", \ |
47cc5b78 CP |
139 | _rc, (int)size); \ |
140 | _rc; \ | |
141 | }) | |
ab0b9fc6 | 142 | |
7d58d111 CP |
143 | #define i2c_send_recv(priv, obuf, osize, ibuf, isize) ({ \ |
144 | int _rc; \ | |
145 | _rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, obuf, osize, \ | |
146 | ibuf, isize); \ | |
147 | if (isize != _rc) \ | |
148 | tuner_err("i2c input error: rc = %d (should be %d)\n", \ | |
149 | _rc, (int)isize); \ | |
70ca3c4b DH |
150 | if (priv->ctrl.msleep) \ |
151 | msleep(priv->ctrl.msleep); \ | |
7d58d111 CP |
152 | _rc; \ |
153 | }) | |
154 | ||
47cc5b78 | 155 | #define send_seq(priv, data...) ({ \ |
215b95ba | 156 | static u8 _val[] = data; \ |
47cc5b78 | 157 | int _rc; \ |
6cb45879 | 158 | if (sizeof(_val) != \ |
47cc5b78 | 159 | (_rc = tuner_i2c_xfer_send(&priv->i2c_props, \ |
215b95ba | 160 | _val, sizeof(_val)))) { \ |
47cc5b78 | 161 | tuner_err("Error on line %d: %d\n", __LINE__, _rc); \ |
70ca3c4b | 162 | } else if (priv->ctrl.msleep) \ |
e5cc2bf4 | 163 | msleep(priv->ctrl.msleep); \ |
47cc5b78 CP |
164 | _rc; \ |
165 | }) | |
6cb45879 | 166 | |
83244025 | 167 | static int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val) |
6cb45879 | 168 | { |
b873e1a3 | 169 | unsigned char buf[2]; |
7d58d111 | 170 | unsigned char ibuf[2]; |
215b95ba | 171 | |
7e28adb2 | 172 | tuner_dbg("%s %04x called\n", __func__, reg); |
6cb45879 | 173 | |
7d58d111 | 174 | buf[0] = reg >> 8; |
80b52208 | 175 | buf[1] = (unsigned char) reg; |
6cb45879 | 176 | |
7d58d111 CP |
177 | if (i2c_send_recv(priv, buf, 2, ibuf, 2) != 2) |
178 | return -EIO; | |
6cb45879 | 179 | |
7d58d111 CP |
180 | *val = (ibuf[1]) | (ibuf[0] << 8); |
181 | return 0; | |
6cb45879 MCC |
182 | } |
183 | ||
e0262688 | 184 | #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) |
29bec0bf | 185 | static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) |
43efe702 MCC |
186 | { |
187 | if (type & BASE) | |
188 | printk("BASE "); | |
f380e1d2 MCC |
189 | if (type & INIT1) |
190 | printk("INIT1 "); | |
43efe702 MCC |
191 | if (type & F8MHZ) |
192 | printk("F8MHZ "); | |
193 | if (type & MTS) | |
194 | printk("MTS "); | |
195 | if (type & D2620) | |
196 | printk("D2620 "); | |
197 | if (type & D2633) | |
198 | printk("D2633 "); | |
199 | if (type & DTV6) | |
200 | printk("DTV6 "); | |
201 | if (type & QAM) | |
202 | printk("QAM "); | |
203 | if (type & DTV7) | |
204 | printk("DTV7 "); | |
205 | if (type & DTV78) | |
206 | printk("DTV78 "); | |
207 | if (type & DTV8) | |
208 | printk("DTV8 "); | |
209 | if (type & FM) | |
210 | printk("FM "); | |
211 | if (type & INPUT1) | |
212 | printk("INPUT1 "); | |
213 | if (type & LCD) | |
214 | printk("LCD "); | |
215 | if (type & NOGD) | |
216 | printk("NOGD "); | |
217 | if (type & MONO) | |
218 | printk("MONO "); | |
219 | if (type & ATSC) | |
220 | printk("ATSC "); | |
221 | if (type & IF) | |
222 | printk("IF "); | |
223 | if (type & LG60) | |
224 | printk("LG60 "); | |
225 | if (type & ATI638) | |
226 | printk("ATI638 "); | |
227 | if (type & OREN538) | |
228 | printk("OREN538 "); | |
229 | if (type & OREN36) | |
230 | printk("OREN36 "); | |
231 | if (type & TOYOTA388) | |
232 | printk("TOYOTA388 "); | |
233 | if (type & TOYOTA794) | |
234 | printk("TOYOTA794 "); | |
235 | if (type & DIBCOM52) | |
236 | printk("DIBCOM52 "); | |
237 | if (type & ZARLINK456) | |
238 | printk("ZARLINK456 "); | |
239 | if (type & CHINA) | |
240 | printk("CHINA "); | |
241 | if (type & F6MHZ) | |
242 | printk("F6MHZ "); | |
243 | if (type & INPUT2) | |
244 | printk("INPUT2 "); | |
245 | if (type & SCODE) | |
246 | printk("SCODE "); | |
e0262688 CP |
247 | if (type & HAS_IF) |
248 | printk("HAS_IF_%d ", int_freq); | |
43efe702 MCC |
249 | } |
250 | ||
ef8c1888 | 251 | static v4l2_std_id parse_audio_std_option(void) |
a82200fb | 252 | { |
e155d908 | 253 | if (strcasecmp(audio_std, "A2") == 0) |
a82200fb | 254 | return V4L2_STD_A2; |
e155d908 | 255 | if (strcasecmp(audio_std, "A2/A") == 0) |
a82200fb | 256 | return V4L2_STD_A2_A; |
e155d908 | 257 | if (strcasecmp(audio_std, "A2/B") == 0) |
a82200fb | 258 | return V4L2_STD_A2_B; |
e155d908 | 259 | if (strcasecmp(audio_std, "NICAM") == 0) |
a82200fb | 260 | return V4L2_STD_NICAM; |
e155d908 | 261 | if (strcasecmp(audio_std, "NICAM/A") == 0) |
a82200fb | 262 | return V4L2_STD_NICAM_A; |
e155d908 | 263 | if (strcasecmp(audio_std, "NICAM/B") == 0) |
a82200fb MCC |
264 | return V4L2_STD_NICAM_B; |
265 | ||
266 | return 0; | |
267 | } | |
268 | ||
61a96113 MCC |
269 | static int check_device_status(struct xc2028_data *priv) |
270 | { | |
271 | switch (priv->state) { | |
272 | case XC2028_NO_FIRMWARE: | |
273 | case XC2028_WAITING_FIRMWARE: | |
274 | return -EAGAIN; | |
275 | case XC2028_ACTIVE: | |
276 | case XC2028_SLEEP: | |
277 | return 0; | |
278 | case XC2028_NODEV: | |
279 | return -ENODEV; | |
280 | } | |
281 | return 0; | |
282 | } | |
283 | ||
ab0b9fc6 | 284 | static void free_firmware(struct xc2028_data *priv) |
6cb45879 | 285 | { |
de3fe21b | 286 | int i; |
92b75ab0 | 287 | tuner_dbg("%s called\n", __func__); |
de3fe21b MCC |
288 | |
289 | if (!priv->firm) | |
290 | return; | |
291 | ||
ab0b9fc6 MCC |
292 | for (i = 0; i < priv->firm_size; i++) |
293 | kfree(priv->firm[i].ptr); | |
294 | ||
de3fe21b MCC |
295 | kfree(priv->firm); |
296 | ||
ab0b9fc6 | 297 | priv->firm = NULL; |
06fd82dc | 298 | priv->firm_size = 0; |
61a96113 | 299 | priv->state = XC2028_NO_FIRMWARE; |
e0f0b37a CP |
300 | |
301 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
de3fe21b MCC |
302 | } |
303 | ||
61a96113 MCC |
304 | static int load_all_firmwares(struct dvb_frontend *fe, |
305 | const struct firmware *fw) | |
de3fe21b MCC |
306 | { |
307 | struct xc2028_data *priv = fe->tuner_priv; | |
c63e87e9 | 308 | const unsigned char *p, *endp; |
ab0b9fc6 MCC |
309 | int rc = 0; |
310 | int n, n_array; | |
de3fe21b | 311 | char name[33]; |
6cb45879 | 312 | |
7e28adb2 | 313 | tuner_dbg("%s called\n", __func__); |
215b95ba | 314 | |
ab0b9fc6 MCC |
315 | p = fw->data; |
316 | endp = p + fw->size; | |
6cb45879 | 317 | |
06fd82dc CP |
318 | if (fw->size < sizeof(name) - 1 + 2 + 2) { |
319 | tuner_err("Error: firmware file %s has invalid size!\n", | |
61a96113 | 320 | priv->fname); |
06fd82dc | 321 | goto corrupt; |
6cb45879 | 322 | } |
de3fe21b | 323 | |
ab0b9fc6 MCC |
324 | memcpy(name, p, sizeof(name) - 1); |
325 | name[sizeof(name) - 1] = 0; | |
326 | p += sizeof(name) - 1; | |
de3fe21b | 327 | |
84a9f336 | 328 | priv->firm_version = get_unaligned_le16(p); |
de3fe21b MCC |
329 | p += 2; |
330 | ||
84a9f336 | 331 | n_array = get_unaligned_le16(p); |
de3fe21b MCC |
332 | p += 2; |
333 | ||
06fd82dc | 334 | tuner_info("Loading %d firmware images from %s, type: %s, ver %d.%d\n", |
61a96113 | 335 | n_array, priv->fname, name, |
06fd82dc | 336 | priv->firm_version >> 8, priv->firm_version & 0xff); |
de3fe21b | 337 | |
1b7acf0c | 338 | priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL); |
06fd82dc CP |
339 | if (priv->firm == NULL) { |
340 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 341 | rc = -ENOMEM; |
06fd82dc | 342 | goto err; |
6cb45879 | 343 | } |
de3fe21b | 344 | priv->firm_size = n_array; |
06fd82dc | 345 | |
ab0b9fc6 MCC |
346 | n = -1; |
347 | while (p < endp) { | |
de3fe21b MCC |
348 | __u32 type, size; |
349 | v4l2_std_id id; | |
66c2d53d | 350 | __u16 int_freq = 0; |
de3fe21b MCC |
351 | |
352 | n++; | |
353 | if (n >= n_array) { | |
06fd82dc CP |
354 | tuner_err("More firmware images in file than " |
355 | "were expected!\n"); | |
de3fe21b MCC |
356 | goto corrupt; |
357 | } | |
358 | ||
359 | /* Checks if there's enough bytes to read */ | |
84a9f336 AV |
360 | if (endp - p < sizeof(type) + sizeof(id) + sizeof(size)) |
361 | goto header; | |
de3fe21b | 362 | |
84a9f336 | 363 | type = get_unaligned_le32(p); |
de3fe21b MCC |
364 | p += sizeof(type); |
365 | ||
84a9f336 | 366 | id = get_unaligned_le64(p); |
de3fe21b MCC |
367 | p += sizeof(id); |
368 | ||
66c2d53d | 369 | if (type & HAS_IF) { |
84a9f336 | 370 | int_freq = get_unaligned_le16(p); |
66c2d53d | 371 | p += sizeof(int_freq); |
84a9f336 AV |
372 | if (endp - p < sizeof(size)) |
373 | goto header; | |
66c2d53d MCC |
374 | } |
375 | ||
84a9f336 | 376 | size = get_unaligned_le32(p); |
de3fe21b MCC |
377 | p += sizeof(size); |
378 | ||
84a9f336 | 379 | if (!size || size > endp - p) { |
83fb340b | 380 | tuner_err("Firmware type "); |
43efe702 | 381 | dump_firm_type(type); |
ef8c1888 MCC |
382 | printk("(%x), id %llx is corrupted " |
383 | "(size=%d, expected %d)\n", | |
91240dd9 | 384 | type, (unsigned long long)id, |
ef8c1888 | 385 | (unsigned)(endp - p), size); |
de3fe21b MCC |
386 | goto corrupt; |
387 | } | |
388 | ||
ab0b9fc6 | 389 | priv->firm[n].ptr = kzalloc(size, GFP_KERNEL); |
06fd82dc CP |
390 | if (priv->firm[n].ptr == NULL) { |
391 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 392 | rc = -ENOMEM; |
de3fe21b MCC |
393 | goto err; |
394 | } | |
06fd82dc CP |
395 | tuner_dbg("Reading firmware type "); |
396 | if (debug) { | |
e0262688 | 397 | dump_firm_type_and_int_freq(type, int_freq); |
06fd82dc | 398 | printk("(%x), id %llx, size=%d.\n", |
e0262688 | 399 | type, (unsigned long long)id, size); |
06fd82dc | 400 | } |
de3fe21b MCC |
401 | |
402 | memcpy(priv->firm[n].ptr, p, size); | |
403 | priv->firm[n].type = type; | |
404 | priv->firm[n].id = id; | |
405 | priv->firm[n].size = size; | |
66c2d53d | 406 | priv->firm[n].int_freq = int_freq; |
de3fe21b MCC |
407 | |
408 | p += size; | |
409 | } | |
410 | ||
ab0b9fc6 | 411 | if (n + 1 != priv->firm_size) { |
83fb340b | 412 | tuner_err("Firmware file is incomplete!\n"); |
de3fe21b MCC |
413 | goto corrupt; |
414 | } | |
415 | ||
416 | goto done; | |
417 | ||
84a9f336 AV |
418 | header: |
419 | tuner_err("Firmware header is incomplete!\n"); | |
de3fe21b | 420 | corrupt: |
ab0b9fc6 | 421 | rc = -EINVAL; |
83fb340b | 422 | tuner_err("Error: firmware file is corrupted!\n"); |
de3fe21b MCC |
423 | |
424 | err: | |
06fd82dc | 425 | tuner_info("Releasing partially loaded firmware file.\n"); |
de3fe21b MCC |
426 | free_firmware(priv); |
427 | ||
428 | done: | |
06fd82dc CP |
429 | if (rc == 0) |
430 | tuner_dbg("Firmware files loaded.\n"); | |
61a96113 MCC |
431 | else |
432 | priv->state = XC2028_NODEV; | |
de3fe21b MCC |
433 | |
434 | return rc; | |
435 | } | |
436 | ||
f380e1d2 MCC |
437 | static int seek_firmware(struct dvb_frontend *fe, unsigned int type, |
438 | v4l2_std_id *id) | |
de3fe21b MCC |
439 | { |
440 | struct xc2028_data *priv = fe->tuner_priv; | |
b1535293 | 441 | int i, best_i = -1, best_nr_matches = 0; |
33e53161 | 442 | unsigned int type_mask = 0; |
de3fe21b | 443 | |
7e28adb2 | 444 | tuner_dbg("%s called, want type=", __func__); |
b1535293 CP |
445 | if (debug) { |
446 | dump_firm_type(type); | |
447 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); | |
448 | } | |
de3fe21b MCC |
449 | |
450 | if (!priv->firm) { | |
83fb340b | 451 | tuner_err("Error! firmware not loaded\n"); |
de3fe21b MCC |
452 | return -EINVAL; |
453 | } | |
454 | ||
f380e1d2 | 455 | if (((type & ~SCODE) == 0) && (*id == 0)) |
ab0b9fc6 | 456 | *id = V4L2_STD_PAL; |
de3fe21b | 457 | |
e0f0b37a | 458 | if (type & BASE) |
33e53161 | 459 | type_mask = BASE_TYPES; |
ef207fed | 460 | else if (type & SCODE) { |
e0f0b37a | 461 | type &= SCODE_TYPES; |
33e53161 | 462 | type_mask = SCODE_TYPES & ~HAS_IF; |
ef207fed | 463 | } else if (type & DTV_TYPES) |
33e53161 | 464 | type_mask = DTV_TYPES; |
11a9eff9 | 465 | else if (type & STD_SPECIFIC_TYPES) |
33e53161 MCC |
466 | type_mask = STD_SPECIFIC_TYPES; |
467 | ||
468 | type &= type_mask; | |
469 | ||
8367fe24 | 470 | if (!(type & SCODE)) |
33e53161 | 471 | type_mask = ~0; |
e0f0b37a | 472 | |
de3fe21b | 473 | /* Seek for exact match */ |
ab0b9fc6 | 474 | for (i = 0; i < priv->firm_size; i++) { |
33e53161 | 475 | if ((type == (priv->firm[i].type & type_mask)) && |
ef207fed | 476 | (*id == priv->firm[i].id)) |
de3fe21b MCC |
477 | goto found; |
478 | } | |
479 | ||
480 | /* Seek for generic video standard match */ | |
ab0b9fc6 | 481 | for (i = 0; i < priv->firm_size; i++) { |
b1535293 CP |
482 | v4l2_std_id match_mask; |
483 | int nr_matches; | |
484 | ||
33e53161 | 485 | if (type != (priv->firm[i].type & type_mask)) |
b1535293 CP |
486 | continue; |
487 | ||
488 | match_mask = *id & priv->firm[i].id; | |
489 | if (!match_mask) | |
490 | continue; | |
491 | ||
492 | if ((*id & match_mask) == *id) | |
493 | goto found; /* Supports all the requested standards */ | |
494 | ||
495 | nr_matches = hweight64(match_mask); | |
496 | if (nr_matches > best_nr_matches) { | |
497 | best_nr_matches = nr_matches; | |
498 | best_i = i; | |
499 | } | |
500 | } | |
501 | ||
502 | if (best_nr_matches > 0) { | |
503 | tuner_dbg("Selecting best matching firmware (%d bits) for " | |
504 | "type=", best_nr_matches); | |
505 | dump_firm_type(type); | |
506 | printk("(%x), id %016llx:\n", type, (unsigned long long)*id); | |
507 | i = best_i; | |
508 | goto found; | |
de3fe21b MCC |
509 | } |
510 | ||
511 | /*FIXME: Would make sense to seek for type "hint" match ? */ | |
512 | ||
b1535293 | 513 | i = -ENOENT; |
f380e1d2 | 514 | goto ret; |
de3fe21b MCC |
515 | |
516 | found: | |
517 | *id = priv->firm[i].id; | |
de3fe21b | 518 | |
f380e1d2 | 519 | ret: |
b1535293 | 520 | tuner_dbg("%s firmware for type=", (i < 0) ? "Can't find" : "Found"); |
83fb340b MCC |
521 | if (debug) { |
522 | dump_firm_type(type); | |
91240dd9 | 523 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); |
83fb340b | 524 | } |
f380e1d2 MCC |
525 | return i; |
526 | } | |
527 | ||
d7cba043 MK |
528 | static inline int do_tuner_callback(struct dvb_frontend *fe, int cmd, int arg) |
529 | { | |
530 | struct xc2028_data *priv = fe->tuner_priv; | |
531 | ||
532 | /* analog side (tuner-core) uses i2c_adap->algo_data. | |
533 | * digital side is not guaranteed to have algo_data defined. | |
534 | * | |
535 | * digital side will always have fe->dvb defined. | |
536 | * analog side (tuner-core) doesn't (yet) define fe->dvb. | |
537 | */ | |
538 | ||
539 | return (!fe->callback) ? -EINVAL : | |
540 | fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | |
541 | fe->dvb->priv : priv->i2c_props.adap->algo_data, | |
542 | DVB_FRONTEND_COMPONENT_TUNER, cmd, arg); | |
543 | } | |
544 | ||
f380e1d2 MCC |
545 | static int load_firmware(struct dvb_frontend *fe, unsigned int type, |
546 | v4l2_std_id *id) | |
547 | { | |
548 | struct xc2028_data *priv = fe->tuner_priv; | |
549 | int pos, rc; | |
0a196b6f | 550 | unsigned char *p, *endp, buf[priv->ctrl.max_len]; |
f380e1d2 | 551 | |
7e28adb2 | 552 | tuner_dbg("%s called\n", __func__); |
f380e1d2 MCC |
553 | |
554 | pos = seek_firmware(fe, type, id); | |
555 | if (pos < 0) | |
556 | return pos; | |
557 | ||
83fb340b | 558 | tuner_info("Loading firmware for type="); |
b1535293 CP |
559 | dump_firm_type(priv->firm[pos].type); |
560 | printk("(%x), id %016llx.\n", priv->firm[pos].type, | |
561 | (unsigned long long)*id); | |
83fb340b | 562 | |
f380e1d2 | 563 | p = priv->firm[pos].ptr; |
f380e1d2 | 564 | endp = p + priv->firm[pos].size; |
6cb45879 | 565 | |
ab0b9fc6 | 566 | while (p < endp) { |
de3fe21b MCC |
567 | __u16 size; |
568 | ||
569 | /* Checks if there's enough bytes to read */ | |
ab0b9fc6 | 570 | if (p + sizeof(size) > endp) { |
83fb340b | 571 | tuner_err("Firmware chunk size is wrong\n"); |
de3fe21b MCC |
572 | return -EINVAL; |
573 | } | |
574 | ||
ab0b9fc6 | 575 | size = le16_to_cpu(*(__u16 *) p); |
de3fe21b MCC |
576 | p += sizeof(size); |
577 | ||
578 | if (size == 0xffff) | |
579 | return 0; | |
580 | ||
581 | if (!size) { | |
6cb45879 | 582 | /* Special callback command received */ |
d7cba043 | 583 | rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0); |
ab0b9fc6 | 584 | if (rc < 0) { |
83fb340b | 585 | tuner_err("Error at RESET code %d\n", |
ab0b9fc6 | 586 | (*p) & 0x7f); |
de3fe21b | 587 | return -EINVAL; |
6cb45879 | 588 | } |
6cb45879 MCC |
589 | continue; |
590 | } | |
5403bbae ML |
591 | if (size >= 0xff00) { |
592 | switch (size) { | |
593 | case 0xff00: | |
d7cba043 | 594 | rc = do_tuner_callback(fe, XC2028_RESET_CLK, 0); |
5403bbae ML |
595 | if (rc < 0) { |
596 | tuner_err("Error at RESET code %d\n", | |
597 | (*p) & 0x7f); | |
598 | return -EINVAL; | |
599 | } | |
b32f9fb9 | 600 | break; |
5403bbae ML |
601 | default: |
602 | tuner_info("Invalid RESET code %d\n", | |
603 | size & 0x7f); | |
604 | return -EINVAL; | |
605 | ||
606 | } | |
2d4c0ac6 | 607 | continue; |
5403bbae | 608 | } |
de3fe21b MCC |
609 | |
610 | /* Checks for a sleep command */ | |
611 | if (size & 0x8000) { | |
ab0b9fc6 | 612 | msleep(size & 0x7fff); |
de3fe21b | 613 | continue; |
6cb45879 MCC |
614 | } |
615 | ||
de3fe21b | 616 | if ((size + p > endp)) { |
83fb340b | 617 | tuner_err("missing bytes: need %d, have %d\n", |
ab0b9fc6 | 618 | size, (int)(endp - p)); |
de3fe21b MCC |
619 | return -EINVAL; |
620 | } | |
6cb45879 | 621 | |
de3fe21b | 622 | buf[0] = *p; |
6cb45879 | 623 | p++; |
de3fe21b | 624 | size--; |
6cb45879 | 625 | |
de3fe21b | 626 | /* Sends message chunks */ |
ab0b9fc6 | 627 | while (size > 0) { |
0a196b6f CP |
628 | int len = (size < priv->ctrl.max_len - 1) ? |
629 | size : priv->ctrl.max_len - 1; | |
6cb45879 | 630 | |
ab0b9fc6 | 631 | memcpy(buf + 1, p, len); |
6cb45879 | 632 | |
47cc5b78 | 633 | rc = i2c_send(priv, buf, len + 1); |
ab0b9fc6 | 634 | if (rc < 0) { |
83fb340b | 635 | tuner_err("%d returned from send\n", rc); |
de3fe21b MCC |
636 | return -EINVAL; |
637 | } | |
638 | ||
639 | p += len; | |
640 | size -= len; | |
641 | } | |
4d37ece7 TR |
642 | |
643 | /* silently fail if the frontend doesn't support I2C flush */ | |
644 | rc = do_tuner_callback(fe, XC2028_I2C_FLUSH, 0); | |
645 | if ((rc < 0) && (rc != -EINVAL)) { | |
646 | tuner_err("error executing flush: %d\n", rc); | |
647 | return rc; | |
648 | } | |
de3fe21b | 649 | } |
43efe702 | 650 | return 0; |
6cb45879 MCC |
651 | } |
652 | ||
f380e1d2 | 653 | static int load_scode(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 654 | v4l2_std_id *id, __u16 int_freq, int scode) |
f380e1d2 MCC |
655 | { |
656 | struct xc2028_data *priv = fe->tuner_priv; | |
657 | int pos, rc; | |
658 | unsigned char *p; | |
659 | ||
7e28adb2 | 660 | tuner_dbg("%s called\n", __func__); |
f380e1d2 | 661 | |
66c2d53d MCC |
662 | if (!int_freq) { |
663 | pos = seek_firmware(fe, type, id); | |
664 | if (pos < 0) | |
665 | return pos; | |
666 | } else { | |
667 | for (pos = 0; pos < priv->firm_size; pos++) { | |
668 | if ((priv->firm[pos].int_freq == int_freq) && | |
9ca01e78 | 669 | (priv->firm[pos].type & HAS_IF)) |
66c2d53d MCC |
670 | break; |
671 | } | |
672 | if (pos == priv->firm_size) | |
673 | return -ENOENT; | |
674 | } | |
f380e1d2 MCC |
675 | |
676 | p = priv->firm[pos].ptr; | |
677 | ||
9ca01e78 | 678 | if (priv->firm[pos].type & HAS_IF) { |
66c2d53d MCC |
679 | if (priv->firm[pos].size != 12 * 16 || scode >= 16) |
680 | return -EINVAL; | |
681 | p += 12 * scode; | |
682 | } else { | |
683 | /* 16 SCODE entries per file; each SCODE entry is 12 bytes and | |
684 | * has a 2-byte size header in the firmware format. */ | |
685 | if (priv->firm[pos].size != 14 * 16 || scode >= 16 || | |
686 | le16_to_cpu(*(__u16 *)(p + 14 * scode)) != 12) | |
687 | return -EINVAL; | |
688 | p += 14 * scode + 2; | |
689 | } | |
f380e1d2 | 690 | |
d7b22c5c | 691 | tuner_info("Loading SCODE for type="); |
e0262688 CP |
692 | dump_firm_type_and_int_freq(priv->firm[pos].type, |
693 | priv->firm[pos].int_freq); | |
d7b22c5c CP |
694 | printk("(%x), id %016llx.\n", priv->firm[pos].type, |
695 | (unsigned long long)*id); | |
696 | ||
06fd82dc | 697 | if (priv->firm_version < 0x0202) |
47cc5b78 CP |
698 | rc = send_seq(priv, {0x20, 0x00, 0x00, 0x00}); |
699 | else | |
700 | rc = send_seq(priv, {0xa0, 0x00, 0x00, 0x00}); | |
701 | if (rc < 0) | |
702 | return -EIO; | |
f380e1d2 | 703 | |
66c2d53d | 704 | rc = i2c_send(priv, p, 12); |
47cc5b78 CP |
705 | if (rc < 0) |
706 | return -EIO; | |
f380e1d2 | 707 | |
47cc5b78 CP |
708 | rc = send_seq(priv, {0x00, 0x8c}); |
709 | if (rc < 0) | |
710 | return -EIO; | |
f380e1d2 MCC |
711 | |
712 | return 0; | |
713 | } | |
714 | ||
00deff1a | 715 | static int check_firmware(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 716 | v4l2_std_id std, __u16 int_freq) |
6cb45879 | 717 | { |
00deff1a | 718 | struct xc2028_data *priv = fe->tuner_priv; |
e0f0b37a | 719 | struct firmware_properties new_fw; |
61a96113 | 720 | int rc, retry_count = 0; |
00deff1a MCC |
721 | u16 version, hwmodel; |
722 | v4l2_std_id std0; | |
6cb45879 | 723 | |
7e28adb2 | 724 | tuner_dbg("%s called\n", __func__); |
6cb45879 | 725 | |
61a96113 MCC |
726 | rc = check_device_status(priv); |
727 | if (rc < 0) | |
728 | return rc; | |
de3fe21b | 729 | |
0f6dac18 | 730 | if (priv->ctrl.mts && !(type & FM)) |
e0f0b37a | 731 | type |= MTS; |
6cb45879 | 732 | |
8bf799a6 | 733 | retry: |
e0f0b37a CP |
734 | new_fw.type = type; |
735 | new_fw.id = std; | |
736 | new_fw.std_req = std; | |
737 | new_fw.scode_table = SCODE | priv->ctrl.scode_table; | |
738 | new_fw.scode_nr = 0; | |
66c2d53d | 739 | new_fw.int_freq = int_freq; |
e0f0b37a CP |
740 | |
741 | tuner_dbg("checking firmware, user requested type="); | |
742 | if (debug) { | |
743 | dump_firm_type(new_fw.type); | |
e0262688 | 744 | printk("(%x), id %016llx, ", new_fw.type, |
e0f0b37a | 745 | (unsigned long long)new_fw.std_req); |
e0262688 CP |
746 | if (!int_freq) { |
747 | printk("scode_tbl "); | |
748 | dump_firm_type(priv->ctrl.scode_table); | |
749 | printk("(%x), ", priv->ctrl.scode_table); | |
750 | } else | |
751 | printk("int_freq %d, ", new_fw.int_freq); | |
752 | printk("scode_nr %d\n", new_fw.scode_nr); | |
e0f0b37a CP |
753 | } |
754 | ||
61a96113 MCC |
755 | /* |
756 | * No need to reload base firmware if it matches and if the tuner | |
757 | * is not at sleep mode | |
758 | */ | |
3a495ed7 | 759 | if ((priv->state == XC2028_ACTIVE) && |
61a96113 MCC |
760 | (((BASE | new_fw.type) & BASE_TYPES) == |
761 | (priv->cur_fw.type & BASE_TYPES))) { | |
e0f0b37a CP |
762 | tuner_dbg("BASE firmware not changed.\n"); |
763 | goto skip_base; | |
764 | } | |
765 | ||
766 | /* Updating BASE - forget about all currently loaded firmware */ | |
767 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
768 | ||
769 | /* Reset is needed before loading firmware */ | |
d7cba043 | 770 | rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0); |
e0f0b37a CP |
771 | if (rc < 0) |
772 | goto fail; | |
773 | ||
47bd5bc6 CP |
774 | /* BASE firmwares are all std0 */ |
775 | std0 = 0; | |
776 | rc = load_firmware(fe, BASE | new_fw.type, &std0); | |
e0f0b37a CP |
777 | if (rc < 0) { |
778 | tuner_err("Error %d while loading base firmware\n", | |
779 | rc); | |
780 | goto fail; | |
781 | } | |
5403bbae | 782 | |
de3fe21b | 783 | /* Load INIT1, if needed */ |
83fb340b | 784 | tuner_dbg("Load init1 firmware, if exists\n"); |
de3fe21b | 785 | |
47bd5bc6 | 786 | rc = load_firmware(fe, BASE | INIT1 | new_fw.type, &std0); |
1ad0b796 CP |
787 | if (rc == -ENOENT) |
788 | rc = load_firmware(fe, (BASE | INIT1 | new_fw.type) & ~F8MHZ, | |
789 | &std0); | |
e0f0b37a CP |
790 | if (rc < 0 && rc != -ENOENT) { |
791 | tuner_err("Error %d while loading init1 firmware\n", | |
792 | rc); | |
793 | goto fail; | |
794 | } | |
de3fe21b | 795 | |
e0f0b37a CP |
796 | skip_base: |
797 | /* | |
798 | * No need to reload standard specific firmware if base firmware | |
799 | * was not reloaded and requested video standards have not changed. | |
de3fe21b | 800 | */ |
e0f0b37a CP |
801 | if (priv->cur_fw.type == (BASE | new_fw.type) && |
802 | priv->cur_fw.std_req == std) { | |
83fb340b | 803 | tuner_dbg("Std-specific firmware already loaded.\n"); |
e0f0b37a | 804 | goto skip_std_specific; |
2e4160ca | 805 | } |
6cb45879 | 806 | |
e0f0b37a CP |
807 | /* Reloading std-specific firmware forces a SCODE update */ |
808 | priv->cur_fw.scode_table = 0; | |
809 | ||
e0f0b37a | 810 | rc = load_firmware(fe, new_fw.type, &new_fw.id); |
cca83798 MCC |
811 | if (rc == -ENOENT) |
812 | rc = load_firmware(fe, new_fw.type & ~F8MHZ, &new_fw.id); | |
813 | ||
ab0b9fc6 | 814 | if (rc < 0) |
e0f0b37a CP |
815 | goto fail; |
816 | ||
817 | skip_std_specific: | |
818 | if (priv->cur_fw.scode_table == new_fw.scode_table && | |
819 | priv->cur_fw.scode_nr == new_fw.scode_nr) { | |
820 | tuner_dbg("SCODE firmware already loaded.\n"); | |
821 | goto check_device; | |
822 | } | |
6cb45879 | 823 | |
40ae91a7 MCC |
824 | if (new_fw.type & FM) |
825 | goto check_device; | |
826 | ||
f380e1d2 | 827 | /* Load SCODE firmware, if exists */ |
e0f0b37a | 828 | tuner_dbg("Trying to load scode %d\n", new_fw.scode_nr); |
f380e1d2 | 829 | |
66c2d53d MCC |
830 | rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id, |
831 | new_fw.int_freq, new_fw.scode_nr); | |
43efe702 | 832 | |
e0f0b37a | 833 | check_device: |
8bf799a6 CP |
834 | if (xc2028_get_reg(priv, 0x0004, &version) < 0 || |
835 | xc2028_get_reg(priv, 0x0008, &hwmodel) < 0) { | |
836 | tuner_err("Unable to read tuner registers.\n"); | |
837 | goto fail; | |
838 | } | |
80b52208 | 839 | |
b37f2d6a DH |
840 | tuner_dbg("Device is Xceive %d version %d.%d, " |
841 | "firmware version %d.%d\n", | |
842 | hwmodel, (version & 0xf000) >> 12, (version & 0xf00) >> 8, | |
843 | (version & 0xf0) >> 4, version & 0xf); | |
6cb45879 | 844 | |
0fb84ce0 MCC |
845 | |
846 | if (priv->ctrl.read_not_reliable) | |
847 | goto read_not_reliable; | |
848 | ||
8bf799a6 CP |
849 | /* Check firmware version against what we downloaded. */ |
850 | if (priv->firm_version != ((version & 0xf0) << 4 | (version & 0x0f))) { | |
2d5024a9 MCC |
851 | if (!priv->ctrl.read_not_reliable) { |
852 | tuner_err("Incorrect readback of firmware version.\n"); | |
853 | goto fail; | |
854 | } else { | |
855 | tuner_err("Returned an incorrect version. However, " | |
856 | "read is not reliable enough. Ignoring it.\n"); | |
857 | hwmodel = 3028; | |
858 | } | |
8bf799a6 CP |
859 | } |
860 | ||
861 | /* Check that the tuner hardware model remains consistent over time. */ | |
862 | if (priv->hwmodel == 0 && (hwmodel == 2028 || hwmodel == 3028)) { | |
863 | priv->hwmodel = hwmodel; | |
864 | priv->hwvers = version & 0xff00; | |
865 | } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel || | |
866 | priv->hwvers != (version & 0xff00)) { | |
867 | tuner_err("Read invalid device hardware information - tuner " | |
868 | "hung?\n"); | |
869 | goto fail; | |
870 | } | |
871 | ||
0fb84ce0 | 872 | read_not_reliable: |
03c42001 | 873 | priv->cur_fw = new_fw; |
e0f0b37a CP |
874 | |
875 | /* | |
876 | * By setting BASE in cur_fw.type only after successfully loading all | |
877 | * firmwares, we can: | |
878 | * 1. Identify that BASE firmware with type=0 has been loaded; | |
879 | * 2. Tell whether BASE firmware was just changed the next time through. | |
880 | */ | |
881 | priv->cur_fw.type |= BASE; | |
61a96113 | 882 | priv->state = XC2028_ACTIVE; |
6cb45879 MCC |
883 | |
884 | return 0; | |
e0f0b37a CP |
885 | |
886 | fail: | |
61a96113 MCC |
887 | priv->state = XC2028_SLEEP; |
888 | ||
e0f0b37a | 889 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); |
b8bc77db | 890 | if (retry_count < 8) { |
8bf799a6 | 891 | msleep(50); |
b8bc77db | 892 | retry_count++; |
8bf799a6 CP |
893 | tuner_dbg("Retrying firmware load\n"); |
894 | goto retry; | |
895 | } | |
896 | ||
e0f0b37a CP |
897 | if (rc == -ENOENT) |
898 | rc = -EINVAL; | |
899 | return rc; | |
6cb45879 MCC |
900 | } |
901 | ||
215b95ba | 902 | static int xc2028_signal(struct dvb_frontend *fe, u16 *strength) |
6cb45879 | 903 | { |
215b95ba | 904 | struct xc2028_data *priv = fe->tuner_priv; |
7d58d111 | 905 | u16 frq_lock, signal = 0; |
90acb85f | 906 | int rc, i; |
3b20532c | 907 | |
7e28adb2 | 908 | tuner_dbg("%s called\n", __func__); |
6cb45879 | 909 | |
61a96113 MCC |
910 | rc = check_device_status(priv); |
911 | if (rc < 0) | |
912 | return rc; | |
913 | ||
215b95ba | 914 | mutex_lock(&priv->lock); |
6cb45879 | 915 | |
80b52208 | 916 | /* Sync Lock Indicator */ |
90acb85f MCC |
917 | for (i = 0; i < 3; i++) { |
918 | rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock); | |
919 | if (rc < 0) | |
920 | goto ret; | |
921 | ||
922 | if (frq_lock) | |
923 | break; | |
924 | msleep(6); | |
925 | } | |
6cb45879 | 926 | |
1d432a3d | 927 | /* Frequency didn't lock */ |
90acb85f MCC |
928 | if (frq_lock == 2) |
929 | goto ret; | |
6cb45879 | 930 | |
80b52208 | 931 | /* Get SNR of the video signal */ |
304bce41 | 932 | rc = xc2028_get_reg(priv, XREG_SNR, &signal); |
7d58d111 | 933 | if (rc < 0) |
b0166ab3 MCC |
934 | goto ret; |
935 | ||
90acb85f MCC |
936 | /* Signal level is 3 bits only */ |
937 | ||
938 | signal = ((1 << 12) - 1) | ((signal & 0x07) << 12); | |
3b20532c MCC |
939 | |
940 | ret: | |
215b95ba MCC |
941 | mutex_unlock(&priv->lock); |
942 | ||
943 | *strength = signal; | |
6cb45879 | 944 | |
b0166ab3 MCC |
945 | tuner_dbg("signal strength is %d\n", signal); |
946 | ||
7d58d111 | 947 | return rc; |
6cb45879 MCC |
948 | } |
949 | ||
1d432a3d MCC |
950 | static int xc2028_get_afc(struct dvb_frontend *fe, s32 *afc) |
951 | { | |
952 | struct xc2028_data *priv = fe->tuner_priv; | |
953 | int i, rc; | |
954 | u16 frq_lock = 0; | |
955 | s16 afc_reg = 0; | |
956 | ||
957 | rc = check_device_status(priv); | |
958 | if (rc < 0) | |
959 | return rc; | |
960 | ||
961 | mutex_lock(&priv->lock); | |
962 | ||
963 | /* Sync Lock Indicator */ | |
964 | for (i = 0; i < 3; i++) { | |
965 | rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock); | |
966 | if (rc < 0) | |
967 | goto ret; | |
968 | ||
969 | if (frq_lock) | |
970 | break; | |
971 | msleep(6); | |
972 | } | |
973 | ||
974 | /* Frequency didn't lock */ | |
975 | if (frq_lock == 2) | |
976 | goto ret; | |
977 | ||
978 | /* Get AFC */ | |
979 | rc = xc2028_get_reg(priv, XREG_FREQ_ERROR, &afc_reg); | |
980 | if (rc < 0) | |
f088ccd6 | 981 | goto ret; |
1d432a3d MCC |
982 | |
983 | *afc = afc_reg * 15625; /* Hz */ | |
984 | ||
985 | tuner_dbg("AFC is %d Hz\n", *afc); | |
986 | ||
987 | ret: | |
988 | mutex_unlock(&priv->lock); | |
989 | ||
990 | return rc; | |
991 | } | |
992 | ||
6cb45879 MCC |
993 | #define DIV 15625 |
994 | ||
00deff1a | 995 | static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */, |
aa40d194 | 996 | enum v4l2_tuner_type new_type, |
66c2d53d MCC |
997 | unsigned int type, |
998 | v4l2_std_id std, | |
999 | u16 int_freq) | |
6cb45879 | 1000 | { |
215b95ba | 1001 | struct xc2028_data *priv = fe->tuner_priv; |
ab0b9fc6 | 1002 | int rc = -EINVAL; |
2ce4b3aa | 1003 | unsigned char buf[4]; |
ab0b9fc6 | 1004 | u32 div, offset = 0; |
6cb45879 | 1005 | |
7e28adb2 | 1006 | tuner_dbg("%s called\n", __func__); |
215b95ba | 1007 | |
de3fe21b MCC |
1008 | mutex_lock(&priv->lock); |
1009 | ||
2ce4b3aa | 1010 | tuner_dbg("should set frequency %d kHz\n", freq / 1000); |
6cb45879 | 1011 | |
66c2d53d | 1012 | if (check_firmware(fe, type, std, int_freq) < 0) |
3b20532c | 1013 | goto ret; |
2e4160ca | 1014 | |
2800ae9c MCC |
1015 | /* On some cases xc2028 can disable video output, if |
1016 | * very weak signals are received. By sending a soft | |
1017 | * reset, this is re-enabled. So, it is better to always | |
1018 | * send a soft reset before changing channels, to be sure | |
1019 | * that xc2028 will be in a safe state. | |
1020 | * Maybe this might also be needed for DTV. | |
1021 | */ | |
fd34cb08 MCC |
1022 | switch (new_type) { |
1023 | case V4L2_TUNER_ANALOG_TV: | |
2800ae9c | 1024 | rc = send_seq(priv, {0x00, 0x00}); |
0a863975 | 1025 | |
fd34cb08 MCC |
1026 | /* Analog mode requires offset = 0 */ |
1027 | break; | |
1028 | case V4L2_TUNER_RADIO: | |
1029 | /* Radio mode requires offset = 0 */ | |
1030 | break; | |
1031 | case V4L2_TUNER_DIGITAL_TV: | |
7f2199c0 MCC |
1032 | /* |
1033 | * Digital modes require an offset to adjust to the | |
1034 | * proper frequency. The offset depends on what | |
1035 | * firmware version is used. | |
1036 | */ | |
1037 | ||
1038 | /* | |
1039 | * Adjust to the center frequency. This is calculated by the | |
1040 | * formula: offset = 1.25MHz - BW/2 | |
1041 | * For DTV 7/8, the firmware uses BW = 8000, so it needs a | |
1042 | * further adjustment to get the frequency center on VHF | |
1043 | */ | |
98ab8550 GG |
1044 | |
1045 | /* | |
1046 | * The firmware DTV78 used to work fine in UHF band (8 MHz | |
1047 | * bandwidth) but not at all in VHF band (7 MHz bandwidth). | |
1048 | * The real problem was connected to the formula used to | |
1049 | * calculate the center frequency offset in VHF band. | |
1050 | * In fact, removing the 500KHz adjustment fixed the problem. | |
1051 | * This is coherent to what was implemented for the DTV7 | |
1052 | * firmware. | |
1053 | * In the end, now the center frequency is the same for all 3 | |
1054 | * firmwares (DTV7, DTV8, DTV78) and doesn't depend on channel | |
1055 | * bandwidth. | |
1056 | */ | |
1057 | ||
0a863975 MCC |
1058 | if (priv->cur_fw.type & DTV6) |
1059 | offset = 1750000; | |
98ab8550 | 1060 | else /* DTV7 or DTV8 or DTV78 */ |
0a863975 MCC |
1061 | offset = 2750000; |
1062 | ||
897b8422 | 1063 | /* |
7f2199c0 MCC |
1064 | * xc3028 additional "magic" |
1065 | * Depending on the firmware version, it needs some adjustments | |
1066 | * to properly centralize the frequency. This seems to be | |
1067 | * needed to compensate the SCODE table adjustments made by | |
1068 | * newer firmwares | |
897b8422 | 1069 | */ |
7f2199c0 | 1070 | |
7f2199c0 MCC |
1071 | /* |
1072 | * The proper adjustment would be to do it at s-code table. | |
1073 | * However, this didn't work, as reported by | |
1074 | * Robert Lowery <rglowery@exemail.com.au> | |
1075 | */ | |
1076 | ||
98ab8550 | 1077 | #if 0 |
7f2199c0 MCC |
1078 | /* |
1079 | * Still need tests for XC3028L (firmware 3.2 or upper) | |
1080 | * So, for now, let's just comment the per-firmware | |
1081 | * version of this change. Reports with xc3028l working | |
1082 | * with and without the lines bellow are welcome | |
1083 | */ | |
1084 | ||
1085 | if (priv->firm_version < 0x0302) { | |
1086 | if (priv->cur_fw.type & DTV7) | |
1087 | offset += 500000; | |
1088 | } else { | |
1089 | if (priv->cur_fw.type & DTV7) | |
1090 | offset -= 300000; | |
1091 | else if (type != ATSC) /* DVB @6MHz, DTV 8 and DTV 7/8 */ | |
1092 | offset += 200000; | |
1093 | } | |
1094 | #endif | |
a44f1c43 | 1095 | } |
2e4160ca | 1096 | |
ab0b9fc6 | 1097 | div = (freq - offset + DIV / 2) / DIV; |
2e4160ca | 1098 | |
6cb45879 | 1099 | /* CMD= Set frequency */ |
06fd82dc | 1100 | if (priv->firm_version < 0x0202) |
304bce41 | 1101 | rc = send_seq(priv, {0x00, XREG_RF_FREQ, 0x00, 0x00}); |
47cc5b78 | 1102 | else |
304bce41 | 1103 | rc = send_seq(priv, {0x80, XREG_RF_FREQ, 0x00, 0x00}); |
47cc5b78 CP |
1104 | if (rc < 0) |
1105 | goto ret; | |
de3fe21b | 1106 | |
1fe87369 MCC |
1107 | /* Return code shouldn't be checked. |
1108 | The reset CLK is needed only with tm6000. | |
1109 | Driver should work fine even if this fails. | |
1110 | */ | |
70ca3c4b DH |
1111 | if (priv->ctrl.msleep) |
1112 | msleep(priv->ctrl.msleep); | |
d7cba043 | 1113 | do_tuner_callback(fe, XC2028_RESET_CLK, 1); |
6cb45879 MCC |
1114 | |
1115 | msleep(10); | |
701672eb | 1116 | |
ab0b9fc6 MCC |
1117 | buf[0] = 0xff & (div >> 24); |
1118 | buf[1] = 0xff & (div >> 16); | |
1119 | buf[2] = 0xff & (div >> 8); | |
1120 | buf[3] = 0xff & (div); | |
6cb45879 | 1121 | |
47cc5b78 | 1122 | rc = i2c_send(priv, buf, sizeof(buf)); |
ab0b9fc6 | 1123 | if (rc < 0) |
3b20532c | 1124 | goto ret; |
6cb45879 MCC |
1125 | msleep(100); |
1126 | ||
ab0b9fc6 | 1127 | priv->frequency = freq; |
215b95ba | 1128 | |
c6480ccc | 1129 | tuner_dbg("divisor= %*ph (freq=%d.%03d)\n", 4, buf, |
2ce4b3aa | 1130 | freq / 1000000, (freq % 1000000) / 1000); |
3b20532c | 1131 | |
ab0b9fc6 | 1132 | rc = 0; |
6cb45879 | 1133 | |
215b95ba MCC |
1134 | ret: |
1135 | mutex_unlock(&priv->lock); | |
6cb45879 | 1136 | |
215b95ba | 1137 | return rc; |
701672eb ML |
1138 | } |
1139 | ||
00deff1a | 1140 | static int xc2028_set_analog_freq(struct dvb_frontend *fe, |
ab0b9fc6 | 1141 | struct analog_parameters *p) |
6cb45879 | 1142 | { |
215b95ba | 1143 | struct xc2028_data *priv = fe->tuner_priv; |
00deff1a MCC |
1144 | unsigned int type=0; |
1145 | ||
7e28adb2 | 1146 | tuner_dbg("%s called\n", __func__); |
c71d4bc5 | 1147 | |
d74cb25e MCC |
1148 | if (p->mode == V4L2_TUNER_RADIO) { |
1149 | type |= FM; | |
1150 | if (priv->ctrl.input1) | |
1151 | type |= INPUT1; | |
1152 | return generic_set_freq(fe, (625l * p->frequency) / 10, | |
437f5fa3 | 1153 | V4L2_TUNER_RADIO, type, 0, 0); |
d74cb25e MCC |
1154 | } |
1155 | ||
a5e9fe14 MCC |
1156 | /* if std is not defined, choose one */ |
1157 | if (!p->std) | |
1158 | p->std = V4L2_STD_MN; | |
1159 | ||
1160 | /* PAL/M, PAL/N, PAL/Nc and NTSC variants should use 6MHz firmware */ | |
00deff1a MCC |
1161 | if (!(p->std & V4L2_STD_MN)) |
1162 | type |= F8MHZ; | |
6cb45879 | 1163 | |
00deff1a MCC |
1164 | /* Add audio hack to std mask */ |
1165 | p->std |= parse_audio_std_option(); | |
6cb45879 | 1166 | |
00deff1a | 1167 | return generic_set_freq(fe, 62500l * p->frequency, |
437f5fa3 | 1168 | V4L2_TUNER_ANALOG_TV, type, p->std, 0); |
215b95ba | 1169 | } |
6cb45879 | 1170 | |
14d24d14 | 1171 | static int xc2028_set_params(struct dvb_frontend *fe) |
6cb45879 | 1172 | { |
506cd714 MCC |
1173 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
1174 | u32 delsys = c->delivery_system; | |
1175 | u32 bw = c->bandwidth_hz; | |
215b95ba | 1176 | struct xc2028_data *priv = fe->tuner_priv; |
61a96113 MCC |
1177 | int rc; |
1178 | unsigned int type = 0; | |
ad35ce9e | 1179 | u16 demod = 0; |
6cb45879 | 1180 | |
7e28adb2 | 1181 | tuner_dbg("%s called\n", __func__); |
701672eb | 1182 | |
61a96113 MCC |
1183 | rc = check_device_status(priv); |
1184 | if (rc < 0) | |
1185 | return rc; | |
1186 | ||
506cd714 MCC |
1187 | switch (delsys) { |
1188 | case SYS_DVBT: | |
1189 | case SYS_DVBT2: | |
a1014d70 MCC |
1190 | /* |
1191 | * The only countries with 6MHz seem to be Taiwan/Uruguay. | |
1192 | * Both seem to require QAM firmware for OFDM decoding | |
1193 | * Tested in Taiwan by Terry Wu <terrywu2009@gmail.com> | |
1194 | */ | |
506cd714 | 1195 | if (bw <= 6000000) |
a1014d70 | 1196 | type |= QAM; |
00deff1a | 1197 | |
0975fc68 MCC |
1198 | switch (priv->ctrl.type) { |
1199 | case XC2028_D2633: | |
1200 | type |= D2633; | |
1201 | break; | |
1202 | case XC2028_D2620: | |
1203 | type |= D2620; | |
1204 | break; | |
1205 | case XC2028_AUTO: | |
1206 | default: | |
1207 | /* Zarlink seems to need D2633 */ | |
1208 | if (priv->ctrl.demod == XC3028_FE_ZARLINK456) | |
1209 | type |= D2633; | |
1210 | else | |
1211 | type |= D2620; | |
1212 | } | |
506cd714 MCC |
1213 | break; |
1214 | case SYS_ATSC: | |
1215 | /* The only ATSC firmware (at least on v2.7) is D2633 */ | |
1216 | type |= ATSC | D2633; | |
1217 | break; | |
1218 | /* DVB-S and pure QAM (FE_QAM) are not supported */ | |
1219 | default: | |
1220 | return -EINVAL; | |
1221 | } | |
1222 | ||
1223 | if (bw <= 6000000) { | |
1224 | type |= DTV6; | |
1225 | priv->ctrl.vhfbw7 = 0; | |
1226 | priv->ctrl.uhfbw8 = 0; | |
1227 | } else if (bw <= 7000000) { | |
1228 | if (c->frequency < 470000000) | |
1229 | priv->ctrl.vhfbw7 = 1; | |
1230 | else | |
1231 | priv->ctrl.uhfbw8 = 0; | |
1232 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7; | |
1233 | type |= F8MHZ; | |
1234 | } else { | |
1235 | if (c->frequency < 470000000) | |
1236 | priv->ctrl.vhfbw7 = 0; | |
1237 | else | |
1238 | priv->ctrl.uhfbw8 = 1; | |
1239 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8; | |
1240 | type |= F8MHZ; | |
0975fc68 MCC |
1241 | } |
1242 | ||
66c2d53d | 1243 | /* All S-code tables need a 200kHz shift */ |
6e707b4c | 1244 | if (priv->ctrl.demod) { |
7d350284 MCC |
1245 | demod = priv->ctrl.demod; |
1246 | ||
7f2199c0 MCC |
1247 | /* |
1248 | * Newer firmwares require a 200 kHz offset only for ATSC | |
1249 | */ | |
1250 | if (type == ATSC || priv->firm_version < 0x0302) | |
7d350284 | 1251 | demod += 200; |
6e707b4c AW |
1252 | /* |
1253 | * The DTV7 S-code table needs a 700 kHz shift. | |
6e707b4c AW |
1254 | * |
1255 | * DTV7 is only used in Australia. Germany or Italy may also | |
1256 | * use this firmware after initialization, but a tune to a UHF | |
1257 | * channel should then cause DTV78 to be used. | |
7f2199c0 MCC |
1258 | * |
1259 | * Unfortunately, on real-field tests, the s-code offset | |
1260 | * didn't work as expected, as reported by | |
1261 | * Robert Lowery <rglowery@exemail.com.au> | |
6e707b4c | 1262 | */ |
6e707b4c | 1263 | } |
b542dfdc | 1264 | |
506cd714 | 1265 | return generic_set_freq(fe, c->frequency, |
437f5fa3 | 1266 | V4L2_TUNER_DIGITAL_TV, type, 0, demod); |
6cb45879 | 1267 | } |
701672eb | 1268 | |
74a89b2a MCC |
1269 | static int xc2028_sleep(struct dvb_frontend *fe) |
1270 | { | |
1271 | struct xc2028_data *priv = fe->tuner_priv; | |
61a96113 MCC |
1272 | int rc; |
1273 | ||
1274 | rc = check_device_status(priv); | |
1275 | if (rc < 0) | |
1276 | return rc; | |
74a89b2a | 1277 | |
93b99923 DH |
1278 | /* Avoid firmware reload on slow devices or if PM disabled */ |
1279 | if (no_poweroff || priv->ctrl.disable_power_mgmt) | |
10f201af | 1280 | return 0; |
74a89b2a MCC |
1281 | |
1282 | tuner_dbg("Putting xc2028/3028 into poweroff mode.\n"); | |
e278e746 MCC |
1283 | if (debug > 1) { |
1284 | tuner_dbg("Printing sleep stack trace:\n"); | |
1285 | dump_stack(); | |
1286 | } | |
74a89b2a MCC |
1287 | |
1288 | mutex_lock(&priv->lock); | |
1289 | ||
1290 | if (priv->firm_version < 0x0202) | |
304bce41 | 1291 | rc = send_seq(priv, {0x00, XREG_POWER_DOWN, 0x00, 0x00}); |
74a89b2a | 1292 | else |
304bce41 | 1293 | rc = send_seq(priv, {0x80, XREG_POWER_DOWN, 0x00, 0x00}); |
74a89b2a | 1294 | |
61a96113 | 1295 | priv->state = XC2028_SLEEP; |
74a89b2a MCC |
1296 | |
1297 | mutex_unlock(&priv->lock); | |
1298 | ||
1299 | return rc; | |
1300 | } | |
45819c38 | 1301 | |
215b95ba | 1302 | static int xc2028_dvb_release(struct dvb_frontend *fe) |
701672eb | 1303 | { |
215b95ba MCC |
1304 | struct xc2028_data *priv = fe->tuner_priv; |
1305 | ||
7e28adb2 | 1306 | tuner_dbg("%s called\n", __func__); |
701672eb | 1307 | |
aa501be9 CP |
1308 | mutex_lock(&xc2028_list_mutex); |
1309 | ||
c663d035 MK |
1310 | /* only perform final cleanup if this is the last instance */ |
1311 | if (hybrid_tuner_report_instance_count(priv) == 1) { | |
de3fe21b | 1312 | free_firmware(priv); |
61a96113 MCC |
1313 | kfree(priv->ctrl.fname); |
1314 | priv->ctrl.fname = NULL; | |
de3fe21b | 1315 | } |
701672eb | 1316 | |
c663d035 MK |
1317 | if (priv) |
1318 | hybrid_tuner_release_state(priv); | |
1319 | ||
aa501be9 CP |
1320 | mutex_unlock(&xc2028_list_mutex); |
1321 | ||
c663d035 MK |
1322 | fe->tuner_priv = NULL; |
1323 | ||
701672eb ML |
1324 | return 0; |
1325 | } | |
1326 | ||
215b95ba | 1327 | static int xc2028_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
701672eb | 1328 | { |
215b95ba | 1329 | struct xc2028_data *priv = fe->tuner_priv; |
61a96113 | 1330 | int rc; |
701672eb | 1331 | |
7e28adb2 | 1332 | tuner_dbg("%s called\n", __func__); |
701672eb | 1333 | |
61a96113 MCC |
1334 | rc = check_device_status(priv); |
1335 | if (rc < 0) | |
1336 | return rc; | |
1337 | ||
215b95ba | 1338 | *frequency = priv->frequency; |
701672eb ML |
1339 | |
1340 | return 0; | |
1341 | } | |
1342 | ||
61a96113 MCC |
1343 | static void load_firmware_cb(const struct firmware *fw, |
1344 | void *context) | |
1345 | { | |
1346 | struct dvb_frontend *fe = context; | |
1347 | struct xc2028_data *priv = fe->tuner_priv; | |
1348 | int rc; | |
1349 | ||
1350 | tuner_dbg("request_firmware_nowait(): %s\n", fw ? "OK" : "error"); | |
1351 | if (!fw) { | |
1352 | tuner_err("Could not load firmware %s.\n", priv->fname); | |
1353 | priv->state = XC2028_NODEV; | |
1354 | return; | |
1355 | } | |
1356 | ||
1357 | rc = load_all_firmwares(fe, fw); | |
1358 | ||
1359 | release_firmware(fw); | |
1360 | ||
1361 | if (rc < 0) | |
1362 | return; | |
1363 | priv->state = XC2028_SLEEP; | |
1364 | } | |
1365 | ||
ab0b9fc6 | 1366 | static int xc2028_set_config(struct dvb_frontend *fe, void *priv_cfg) |
de3fe21b MCC |
1367 | { |
1368 | struct xc2028_data *priv = fe->tuner_priv; | |
1369 | struct xc2028_ctrl *p = priv_cfg; | |
0a196b6f | 1370 | int rc = 0; |
de3fe21b | 1371 | |
7e28adb2 | 1372 | tuner_dbg("%s called\n", __func__); |
de3fe21b | 1373 | |
06fd82dc CP |
1374 | mutex_lock(&priv->lock); |
1375 | ||
61a96113 MCC |
1376 | /* |
1377 | * Copy the config data. | |
1378 | * For the firmware name, keep a local copy of the string, | |
1379 | * in order to avoid troubles during device release. | |
1380 | */ | |
f1065c96 | 1381 | kfree(priv->ctrl.fname); |
0a196b6f | 1382 | memcpy(&priv->ctrl, p, sizeof(priv->ctrl)); |
0a196b6f CP |
1383 | if (p->fname) { |
1384 | priv->ctrl.fname = kstrdup(p->fname, GFP_KERNEL); | |
1385 | if (priv->ctrl.fname == NULL) | |
1386 | rc = -ENOMEM; | |
de3fe21b MCC |
1387 | } |
1388 | ||
61a96113 MCC |
1389 | /* |
1390 | * If firmware name changed, frees firmware. As free_firmware will | |
1391 | * reset the status to NO_FIRMWARE, this forces a new request_firmware | |
1392 | */ | |
1393 | if (!firmware_name[0] && p->fname && | |
1394 | priv->fname && strcmp(p->fname, priv->fname)) | |
1395 | free_firmware(priv); | |
1396 | ||
1397 | if (priv->ctrl.max_len < 9) | |
1398 | priv->ctrl.max_len = 13; | |
1399 | ||
1400 | if (priv->state == XC2028_NO_FIRMWARE) { | |
1401 | if (!firmware_name[0]) | |
1402 | priv->fname = priv->ctrl.fname; | |
1403 | else | |
1404 | priv->fname = firmware_name; | |
1405 | ||
1406 | rc = request_firmware_nowait(THIS_MODULE, 1, | |
1407 | priv->fname, | |
1408 | priv->i2c_props.adap->dev.parent, | |
1409 | GFP_KERNEL, | |
1410 | fe, load_firmware_cb); | |
1411 | if (rc < 0) { | |
1412 | tuner_err("Failed to request firmware %s\n", | |
1413 | priv->fname); | |
1414 | priv->state = XC2028_NODEV; | |
1e9c14f7 HPS |
1415 | } else |
1416 | priv->state = XC2028_WAITING_FIRMWARE; | |
61a96113 | 1417 | } |
06fd82dc CP |
1418 | mutex_unlock(&priv->lock); |
1419 | ||
0a196b6f | 1420 | return rc; |
de3fe21b MCC |
1421 | } |
1422 | ||
215b95ba | 1423 | static const struct dvb_tuner_ops xc2028_dvb_tuner_ops = { |
701672eb | 1424 | .info = { |
ab0b9fc6 MCC |
1425 | .name = "Xceive XC3028", |
1426 | .frequency_min = 42000000, | |
1427 | .frequency_max = 864000000, | |
1428 | .frequency_step = 50000, | |
1429 | }, | |
701672eb | 1430 | |
de3fe21b | 1431 | .set_config = xc2028_set_config, |
00deff1a | 1432 | .set_analog_params = xc2028_set_analog_freq, |
215b95ba MCC |
1433 | .release = xc2028_dvb_release, |
1434 | .get_frequency = xc2028_get_frequency, | |
1435 | .get_rf_strength = xc2028_signal, | |
1d432a3d | 1436 | .get_afc = xc2028_get_afc, |
215b95ba | 1437 | .set_params = xc2028_set_params, |
74a89b2a | 1438 | .sleep = xc2028_sleep, |
701672eb ML |
1439 | }; |
1440 | ||
7972f988 MK |
1441 | struct dvb_frontend *xc2028_attach(struct dvb_frontend *fe, |
1442 | struct xc2028_config *cfg) | |
701672eb | 1443 | { |
215b95ba | 1444 | struct xc2028_data *priv; |
c663d035 | 1445 | int instance; |
701672eb | 1446 | |
83fb340b | 1447 | if (debug) |
2756665c | 1448 | printk(KERN_DEBUG "xc2028: Xcv2028/3028 init called!\n"); |
701672eb | 1449 | |
b412ba78 | 1450 | if (NULL == cfg) |
a37b4c9b | 1451 | return NULL; |
215b95ba | 1452 | |
a37b4c9b | 1453 | if (!fe) { |
2756665c | 1454 | printk(KERN_ERR "xc2028: No frontend!\n"); |
a37b4c9b | 1455 | return NULL; |
215b95ba MCC |
1456 | } |
1457 | ||
aa501be9 CP |
1458 | mutex_lock(&xc2028_list_mutex); |
1459 | ||
c663d035 MK |
1460 | instance = hybrid_tuner_request_state(struct xc2028_data, priv, |
1461 | hybrid_tuner_instance_list, | |
1462 | cfg->i2c_adap, cfg->i2c_addr, | |
1463 | "xc2028"); | |
1464 | switch (instance) { | |
1465 | case 0: | |
1466 | /* memory allocation failure */ | |
1467 | goto fail; | |
1468 | break; | |
1469 | case 1: | |
1470 | /* new tuner instance */ | |
0a196b6f | 1471 | priv->ctrl.max_len = 13; |
de3fe21b | 1472 | |
215b95ba MCC |
1473 | mutex_init(&priv->lock); |
1474 | ||
c663d035 MK |
1475 | fe->tuner_priv = priv; |
1476 | break; | |
1477 | case 2: | |
1478 | /* existing tuner instance */ | |
1479 | fe->tuner_priv = priv; | |
1480 | break; | |
1481 | } | |
b412ba78 | 1482 | |
215b95ba | 1483 | memcpy(&fe->ops.tuner_ops, &xc2028_dvb_tuner_ops, |
ab0b9fc6 | 1484 | sizeof(xc2028_dvb_tuner_ops)); |
215b95ba MCC |
1485 | |
1486 | tuner_info("type set to %s\n", "XCeive xc2028/xc3028 tuner"); | |
1487 | ||
71a2ee37 MCC |
1488 | if (cfg->ctrl) |
1489 | xc2028_set_config(fe, cfg->ctrl); | |
1490 | ||
aa501be9 CP |
1491 | mutex_unlock(&xc2028_list_mutex); |
1492 | ||
a37b4c9b | 1493 | return fe; |
c663d035 MK |
1494 | fail: |
1495 | mutex_unlock(&xc2028_list_mutex); | |
1496 | ||
1497 | xc2028_dvb_release(fe); | |
1498 | return NULL; | |
215b95ba | 1499 | } |
a37b4c9b | 1500 | |
701672eb ML |
1501 | EXPORT_SYMBOL(xc2028_attach); |
1502 | ||
215b95ba | 1503 | MODULE_DESCRIPTION("Xceive xc2028/xc3028 tuner driver"); |
983d214e | 1504 | MODULE_AUTHOR("Michel Ludwig <michel.ludwig@gmail.com>"); |
215b95ba MCC |
1505 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); |
1506 | MODULE_LICENSE("GPL"); | |
ab9cbcd3 MCC |
1507 | MODULE_FIRMWARE(XC2028_DEFAULT_FIRMWARE); |
1508 | MODULE_FIRMWARE(XC3028L_DEFAULT_FIRMWARE); |