Merge branch 'sched/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
[linux-2.6-block.git] / drivers / media / tuners / tuner-xc2028.c
CommitLineData
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1// SPDX-License-Identifier: GPL-2.0
2// tuner-xc2028
3//
32590819 4// Copyright (c) 2007-2008 Mauro Carvalho Chehab <mchehab@kernel.org>
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MCC
5//
6// Copyright (c) 2007 Michel Ludwig (michel.ludwig@gmail.com)
7// - frontend interface
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MCC
8
9#include <linux/i2c.h>
10#include <asm/div64.h>
11#include <linux/firmware.h>
ab0b9fc6 12#include <linux/videodev2.h>
6cb45879 13#include <linux/delay.h>
701672eb 14#include <media/tuner.h>
3b20532c 15#include <linux/mutex.h>
5a0e3ad6 16#include <linux/slab.h>
84a9f336 17#include <asm/unaligned.h>
215b95ba 18#include "tuner-i2c.h"
6cb45879 19#include "tuner-xc2028.h"
de3fe21b 20#include "tuner-xc2028-types.h"
6cb45879 21
701672eb 22#include <linux/dvb/frontend.h>
fada1935 23#include <media/dvb_frontend.h>
701672eb 24
56ac0337
MCC
25/* Max transfer size done by I2C transfer functions */
26#define MAX_XFER_SIZE 80
27
304bce41
MS
28/* Registers (Write-only) */
29#define XREG_INIT 0x00
30#define XREG_RF_FREQ 0x02
31#define XREG_POWER_DOWN 0x08
32
33/* Registers (Read-only) */
34#define XREG_FREQ_ERROR 0x01
35#define XREG_LOCK 0x02
36#define XREG_VERSION 0x04
37#define XREG_PRODUCT_ID 0x08
38#define XREG_HSYNC_FREQ 0x10
39#define XREG_FRAME_LINES 0x20
40#define XREG_SNR 0x40
41
42#define XREG_ADC_ENV 0x0100
ef8c1888 43
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MCC
44static int debug;
45module_param(debug, int, 0644);
46MODULE_PARM_DESC(debug, "enable verbose debug messages");
47
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MCC
48static int no_poweroff;
49module_param(no_poweroff, int, 0644);
4900877b 50MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
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MCC
51 "1 keep device energized and with tuner ready all the times.\n"
52 " Faster, but consumes more power and keeps the device hotter\n");
53
a82200fb
MCC
54static char audio_std[8];
55module_param_string(audio_std, audio_std, sizeof(audio_std), 0);
56MODULE_PARM_DESC(audio_std,
2af3eb64 57 "Audio standard. XC3028 audio decoder explicitly needs to know what audio\n"
a82200fb
MCC
58 "standard is needed for some video standards with audio A2 or NICAM.\n"
59 "The valid values are:\n"
60 "A2\n"
61 "A2/A\n"
62 "A2/B\n"
63 "NICAM\n"
64 "NICAM/A\n"
65 "NICAM/B\n");
66
4327b77e 67static char firmware_name[30];
5c913c05 68module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
2af3eb64
MCC
69MODULE_PARM_DESC(firmware_name,
70 "Firmware file name. Allows overriding the default firmware name\n");
5c913c05 71
c663d035 72static LIST_HEAD(hybrid_tuner_instance_list);
aa501be9
CP
73static DEFINE_MUTEX(xc2028_list_mutex);
74
de3fe21b
MCC
75/* struct for storing firmware table */
76struct firmware_description {
77 unsigned int type;
78 v4l2_std_id id;
66c2d53d 79 __u16 int_freq;
de3fe21b
MCC
80 unsigned char *ptr;
81 unsigned int size;
82};
6cb45879 83
e0f0b37a
CP
84struct firmware_properties {
85 unsigned int type;
86 v4l2_std_id id;
87 v4l2_std_id std_req;
66c2d53d 88 __u16 int_freq;
e0f0b37a 89 unsigned int scode_table;
6e6a8b5a 90 int scode_nr;
e0f0b37a
CP
91};
92
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MCC
93enum xc2028_state {
94 XC2028_NO_FIRMWARE = 0,
95 XC2028_WAITING_FIRMWARE,
96 XC2028_ACTIVE,
97 XC2028_SLEEP,
98 XC2028_NODEV,
99};
100
6cb45879 101struct xc2028_data {
c663d035 102 struct list_head hybrid_tuner_instance_list;
215b95ba 103 struct tuner_i2c_props i2c_props;
de3fe21b
MCC
104 __u32 frequency;
105
61a96113
MCC
106 enum xc2028_state state;
107 const char *fname;
108
de3fe21b
MCC
109 struct firmware_description *firm;
110 int firm_size;
06fd82dc 111 __u16 firm_version;
de3fe21b 112
8bf799a6
CP
113 __u16 hwmodel;
114 __u16 hwvers;
115
de3fe21b 116 struct xc2028_ctrl ctrl;
215b95ba 117
e0f0b37a 118 struct firmware_properties cur_fw;
215b95ba
MCC
119
120 struct mutex lock;
6cb45879
MCC
121};
122
47cc5b78
CP
123#define i2c_send(priv, buf, size) ({ \
124 int _rc; \
125 _rc = tuner_i2c_xfer_send(&priv->i2c_props, buf, size); \
126 if (size != _rc) \
127 tuner_info("i2c output error: rc = %d (should be %d)\n",\
128 _rc, (int)size); \
70ca3c4b
DH
129 if (priv->ctrl.msleep) \
130 msleep(priv->ctrl.msleep); \
47cc5b78
CP
131 _rc; \
132})
133
7d58d111
CP
134#define i2c_send_recv(priv, obuf, osize, ibuf, isize) ({ \
135 int _rc; \
136 _rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, obuf, osize, \
137 ibuf, isize); \
138 if (isize != _rc) \
139 tuner_err("i2c input error: rc = %d (should be %d)\n", \
6e6a8b5a 140 _rc, (int)isize); \
70ca3c4b
DH
141 if (priv->ctrl.msleep) \
142 msleep(priv->ctrl.msleep); \
7d58d111
CP
143 _rc; \
144})
145
47cc5b78 146#define send_seq(priv, data...) ({ \
215b95ba 147 static u8 _val[] = data; \
47cc5b78 148 int _rc; \
6cb45879 149 if (sizeof(_val) != \
47cc5b78 150 (_rc = tuner_i2c_xfer_send(&priv->i2c_props, \
215b95ba 151 _val, sizeof(_val)))) { \
47cc5b78 152 tuner_err("Error on line %d: %d\n", __LINE__, _rc); \
70ca3c4b 153 } else if (priv->ctrl.msleep) \
e5cc2bf4 154 msleep(priv->ctrl.msleep); \
47cc5b78
CP
155 _rc; \
156})
6cb45879 157
83244025 158static int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val)
6cb45879 159{
b873e1a3 160 unsigned char buf[2];
7d58d111 161 unsigned char ibuf[2];
215b95ba 162
7e28adb2 163 tuner_dbg("%s %04x called\n", __func__, reg);
6cb45879 164
7d58d111 165 buf[0] = reg >> 8;
80b52208 166 buf[1] = (unsigned char) reg;
6cb45879 167
7d58d111
CP
168 if (i2c_send_recv(priv, buf, 2, ibuf, 2) != 2)
169 return -EIO;
6cb45879 170
7d58d111
CP
171 *val = (ibuf[1]) | (ibuf[0] << 8);
172 return 0;
6cb45879
MCC
173}
174
6e6a8b5a 175#define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0)
29bec0bf 176static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq)
43efe702 177{
c56019fc 178 if (type & BASE)
15c8ffc4 179 printk(KERN_CONT "BASE ");
c56019fc 180 if (type & INIT1)
15c8ffc4 181 printk(KERN_CONT "INIT1 ");
c56019fc 182 if (type & F8MHZ)
15c8ffc4 183 printk(KERN_CONT "F8MHZ ");
c56019fc 184 if (type & MTS)
15c8ffc4 185 printk(KERN_CONT "MTS ");
c56019fc 186 if (type & D2620)
15c8ffc4 187 printk(KERN_CONT "D2620 ");
c56019fc 188 if (type & D2633)
15c8ffc4 189 printk(KERN_CONT "D2633 ");
c56019fc 190 if (type & DTV6)
15c8ffc4 191 printk(KERN_CONT "DTV6 ");
c56019fc 192 if (type & QAM)
15c8ffc4 193 printk(KERN_CONT "QAM ");
c56019fc 194 if (type & DTV7)
15c8ffc4 195 printk(KERN_CONT "DTV7 ");
c56019fc 196 if (type & DTV78)
15c8ffc4 197 printk(KERN_CONT "DTV78 ");
c56019fc 198 if (type & DTV8)
15c8ffc4 199 printk(KERN_CONT "DTV8 ");
c56019fc 200 if (type & FM)
15c8ffc4 201 printk(KERN_CONT "FM ");
c56019fc 202 if (type & INPUT1)
15c8ffc4 203 printk(KERN_CONT "INPUT1 ");
c56019fc 204 if (type & LCD)
15c8ffc4 205 printk(KERN_CONT "LCD ");
c56019fc 206 if (type & NOGD)
15c8ffc4 207 printk(KERN_CONT "NOGD ");
c56019fc 208 if (type & MONO)
15c8ffc4 209 printk(KERN_CONT "MONO ");
c56019fc 210 if (type & ATSC)
15c8ffc4 211 printk(KERN_CONT "ATSC ");
c56019fc 212 if (type & IF)
15c8ffc4 213 printk(KERN_CONT "IF ");
c56019fc 214 if (type & LG60)
15c8ffc4 215 printk(KERN_CONT "LG60 ");
c56019fc 216 if (type & ATI638)
15c8ffc4 217 printk(KERN_CONT "ATI638 ");
c56019fc 218 if (type & OREN538)
15c8ffc4 219 printk(KERN_CONT "OREN538 ");
c56019fc 220 if (type & OREN36)
15c8ffc4 221 printk(KERN_CONT "OREN36 ");
c56019fc 222 if (type & TOYOTA388)
15c8ffc4 223 printk(KERN_CONT "TOYOTA388 ");
c56019fc 224 if (type & TOYOTA794)
15c8ffc4 225 printk(KERN_CONT "TOYOTA794 ");
c56019fc 226 if (type & DIBCOM52)
15c8ffc4 227 printk(KERN_CONT "DIBCOM52 ");
c56019fc 228 if (type & ZARLINK456)
15c8ffc4 229 printk(KERN_CONT "ZARLINK456 ");
c56019fc 230 if (type & CHINA)
15c8ffc4 231 printk(KERN_CONT "CHINA ");
c56019fc 232 if (type & F6MHZ)
15c8ffc4 233 printk(KERN_CONT "F6MHZ ");
c56019fc 234 if (type & INPUT2)
15c8ffc4 235 printk(KERN_CONT "INPUT2 ");
c56019fc 236 if (type & SCODE)
15c8ffc4 237 printk(KERN_CONT "SCODE ");
c56019fc 238 if (type & HAS_IF)
15c8ffc4 239 printk(KERN_CONT "HAS_IF_%d ", int_freq);
43efe702
MCC
240}
241
ef8c1888 242static v4l2_std_id parse_audio_std_option(void)
a82200fb 243{
e155d908 244 if (strcasecmp(audio_std, "A2") == 0)
a82200fb 245 return V4L2_STD_A2;
e155d908 246 if (strcasecmp(audio_std, "A2/A") == 0)
a82200fb 247 return V4L2_STD_A2_A;
e155d908 248 if (strcasecmp(audio_std, "A2/B") == 0)
a82200fb 249 return V4L2_STD_A2_B;
e155d908 250 if (strcasecmp(audio_std, "NICAM") == 0)
a82200fb 251 return V4L2_STD_NICAM;
e155d908 252 if (strcasecmp(audio_std, "NICAM/A") == 0)
a82200fb 253 return V4L2_STD_NICAM_A;
e155d908 254 if (strcasecmp(audio_std, "NICAM/B") == 0)
a82200fb
MCC
255 return V4L2_STD_NICAM_B;
256
257 return 0;
258}
259
61a96113
MCC
260static int check_device_status(struct xc2028_data *priv)
261{
262 switch (priv->state) {
263 case XC2028_NO_FIRMWARE:
264 case XC2028_WAITING_FIRMWARE:
265 return -EAGAIN;
266 case XC2028_ACTIVE:
2276bf70 267 return 1;
61a96113
MCC
268 case XC2028_SLEEP:
269 return 0;
270 case XC2028_NODEV:
271 return -ENODEV;
272 }
273 return 0;
274}
275
ab0b9fc6 276static void free_firmware(struct xc2028_data *priv)
6cb45879 277{
de3fe21b 278 int i;
92b75ab0 279 tuner_dbg("%s called\n", __func__);
de3fe21b 280
22a1e778
TI
281 /* free allocated f/w string */
282 if (priv->fname != firmware_name)
283 kfree(priv->fname);
284 priv->fname = NULL;
285
286 priv->state = XC2028_NO_FIRMWARE;
287 memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
288
de3fe21b
MCC
289 if (!priv->firm)
290 return;
291
ab0b9fc6
MCC
292 for (i = 0; i < priv->firm_size; i++)
293 kfree(priv->firm[i].ptr);
294
de3fe21b
MCC
295 kfree(priv->firm);
296
ab0b9fc6 297 priv->firm = NULL;
06fd82dc 298 priv->firm_size = 0;
de3fe21b
MCC
299}
300
61a96113
MCC
301static int load_all_firmwares(struct dvb_frontend *fe,
302 const struct firmware *fw)
de3fe21b
MCC
303{
304 struct xc2028_data *priv = fe->tuner_priv;
c63e87e9 305 const unsigned char *p, *endp;
ab0b9fc6
MCC
306 int rc = 0;
307 int n, n_array;
de3fe21b 308 char name[33];
6cb45879 309
7e28adb2 310 tuner_dbg("%s called\n", __func__);
215b95ba 311
ab0b9fc6
MCC
312 p = fw->data;
313 endp = p + fw->size;
6cb45879 314
06fd82dc
CP
315 if (fw->size < sizeof(name) - 1 + 2 + 2) {
316 tuner_err("Error: firmware file %s has invalid size!\n",
61a96113 317 priv->fname);
06fd82dc 318 goto corrupt;
6cb45879 319 }
de3fe21b 320
ab0b9fc6
MCC
321 memcpy(name, p, sizeof(name) - 1);
322 name[sizeof(name) - 1] = 0;
323 p += sizeof(name) - 1;
de3fe21b 324
84a9f336 325 priv->firm_version = get_unaligned_le16(p);
de3fe21b
MCC
326 p += 2;
327
84a9f336 328 n_array = get_unaligned_le16(p);
de3fe21b
MCC
329 p += 2;
330
06fd82dc 331 tuner_info("Loading %d firmware images from %s, type: %s, ver %d.%d\n",
61a96113 332 n_array, priv->fname, name,
06fd82dc 333 priv->firm_version >> 8, priv->firm_version & 0xff);
de3fe21b 334
1b7acf0c 335 priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL);
06fd82dc
CP
336 if (priv->firm == NULL) {
337 tuner_err("Not enough memory to load firmware file.\n");
ab0b9fc6 338 rc = -ENOMEM;
06fd82dc 339 goto err;
6cb45879 340 }
de3fe21b 341 priv->firm_size = n_array;
06fd82dc 342
ab0b9fc6
MCC
343 n = -1;
344 while (p < endp) {
de3fe21b
MCC
345 __u32 type, size;
346 v4l2_std_id id;
66c2d53d 347 __u16 int_freq = 0;
de3fe21b
MCC
348
349 n++;
350 if (n >= n_array) {
2af3eb64 351 tuner_err("More firmware images in file than were expected!\n");
de3fe21b
MCC
352 goto corrupt;
353 }
354
355 /* Checks if there's enough bytes to read */
84a9f336
AV
356 if (endp - p < sizeof(type) + sizeof(id) + sizeof(size))
357 goto header;
de3fe21b 358
84a9f336 359 type = get_unaligned_le32(p);
de3fe21b
MCC
360 p += sizeof(type);
361
84a9f336 362 id = get_unaligned_le64(p);
de3fe21b
MCC
363 p += sizeof(id);
364
66c2d53d 365 if (type & HAS_IF) {
84a9f336 366 int_freq = get_unaligned_le16(p);
66c2d53d 367 p += sizeof(int_freq);
84a9f336
AV
368 if (endp - p < sizeof(size))
369 goto header;
66c2d53d
MCC
370 }
371
84a9f336 372 size = get_unaligned_le32(p);
de3fe21b
MCC
373 p += sizeof(size);
374
84a9f336 375 if (!size || size > endp - p) {
83fb340b 376 tuner_err("Firmware type ");
43efe702 377 dump_firm_type(type);
15c8ffc4 378 printk(KERN_CONT
3fcb3c83
MCC
379 "(%x), id %llx is corrupted (size=%zd, expected %d)\n",
380 type, (unsigned long long)id, (endp - p), size);
de3fe21b
MCC
381 goto corrupt;
382 }
383
ab0b9fc6 384 priv->firm[n].ptr = kzalloc(size, GFP_KERNEL);
06fd82dc
CP
385 if (priv->firm[n].ptr == NULL) {
386 tuner_err("Not enough memory to load firmware file.\n");
ab0b9fc6 387 rc = -ENOMEM;
de3fe21b
MCC
388 goto err;
389 }
06fd82dc
CP
390 tuner_dbg("Reading firmware type ");
391 if (debug) {
e0262688 392 dump_firm_type_and_int_freq(type, int_freq);
15c8ffc4 393 printk(KERN_CONT "(%x), id %llx, size=%d.\n",
e0262688 394 type, (unsigned long long)id, size);
06fd82dc 395 }
de3fe21b
MCC
396
397 memcpy(priv->firm[n].ptr, p, size);
398 priv->firm[n].type = type;
399 priv->firm[n].id = id;
400 priv->firm[n].size = size;
66c2d53d 401 priv->firm[n].int_freq = int_freq;
de3fe21b
MCC
402
403 p += size;
404 }
405
ab0b9fc6 406 if (n + 1 != priv->firm_size) {
83fb340b 407 tuner_err("Firmware file is incomplete!\n");
de3fe21b
MCC
408 goto corrupt;
409 }
410
411 goto done;
412
84a9f336
AV
413header:
414 tuner_err("Firmware header is incomplete!\n");
de3fe21b 415corrupt:
ab0b9fc6 416 rc = -EINVAL;
83fb340b 417 tuner_err("Error: firmware file is corrupted!\n");
de3fe21b
MCC
418
419err:
06fd82dc 420 tuner_info("Releasing partially loaded firmware file.\n");
de3fe21b
MCC
421 free_firmware(priv);
422
423done:
06fd82dc
CP
424 if (rc == 0)
425 tuner_dbg("Firmware files loaded.\n");
61a96113
MCC
426 else
427 priv->state = XC2028_NODEV;
de3fe21b
MCC
428
429 return rc;
430}
431
f380e1d2
MCC
432static int seek_firmware(struct dvb_frontend *fe, unsigned int type,
433 v4l2_std_id *id)
de3fe21b
MCC
434{
435 struct xc2028_data *priv = fe->tuner_priv;
b1535293 436 int i, best_i = -1, best_nr_matches = 0;
33e53161 437 unsigned int type_mask = 0;
de3fe21b 438
7e28adb2 439 tuner_dbg("%s called, want type=", __func__);
b1535293
CP
440 if (debug) {
441 dump_firm_type(type);
15c8ffc4
MCC
442 printk(KERN_CONT "(%x), id %016llx.\n",
443 type, (unsigned long long)*id);
b1535293 444 }
de3fe21b
MCC
445
446 if (!priv->firm) {
83fb340b 447 tuner_err("Error! firmware not loaded\n");
de3fe21b
MCC
448 return -EINVAL;
449 }
450
f380e1d2 451 if (((type & ~SCODE) == 0) && (*id == 0))
ab0b9fc6 452 *id = V4L2_STD_PAL;
de3fe21b 453
e0f0b37a 454 if (type & BASE)
33e53161 455 type_mask = BASE_TYPES;
ef207fed 456 else if (type & SCODE) {
e0f0b37a 457 type &= SCODE_TYPES;
33e53161 458 type_mask = SCODE_TYPES & ~HAS_IF;
ef207fed 459 } else if (type & DTV_TYPES)
33e53161 460 type_mask = DTV_TYPES;
11a9eff9 461 else if (type & STD_SPECIFIC_TYPES)
33e53161
MCC
462 type_mask = STD_SPECIFIC_TYPES;
463
464 type &= type_mask;
465
8367fe24 466 if (!(type & SCODE))
33e53161 467 type_mask = ~0;
e0f0b37a 468
de3fe21b 469 /* Seek for exact match */
ab0b9fc6 470 for (i = 0; i < priv->firm_size; i++) {
33e53161 471 if ((type == (priv->firm[i].type & type_mask)) &&
ef207fed 472 (*id == priv->firm[i].id))
de3fe21b
MCC
473 goto found;
474 }
475
476 /* Seek for generic video standard match */
ab0b9fc6 477 for (i = 0; i < priv->firm_size; i++) {
b1535293
CP
478 v4l2_std_id match_mask;
479 int nr_matches;
480
33e53161 481 if (type != (priv->firm[i].type & type_mask))
b1535293
CP
482 continue;
483
484 match_mask = *id & priv->firm[i].id;
485 if (!match_mask)
486 continue;
487
488 if ((*id & match_mask) == *id)
489 goto found; /* Supports all the requested standards */
490
491 nr_matches = hweight64(match_mask);
492 if (nr_matches > best_nr_matches) {
493 best_nr_matches = nr_matches;
494 best_i = i;
495 }
496 }
497
498 if (best_nr_matches > 0) {
2af3eb64
MCC
499 tuner_dbg("Selecting best matching firmware (%d bits) for type=",
500 best_nr_matches);
b1535293 501 dump_firm_type(type);
15c8ffc4
MCC
502 printk(KERN_CONT
503 "(%x), id %016llx:\n", type, (unsigned long long)*id);
b1535293
CP
504 i = best_i;
505 goto found;
de3fe21b
MCC
506 }
507
508 /*FIXME: Would make sense to seek for type "hint" match ? */
509
b1535293 510 i = -ENOENT;
f380e1d2 511 goto ret;
de3fe21b
MCC
512
513found:
514 *id = priv->firm[i].id;
de3fe21b 515
f380e1d2 516ret:
b1535293 517 tuner_dbg("%s firmware for type=", (i < 0) ? "Can't find" : "Found");
83fb340b
MCC
518 if (debug) {
519 dump_firm_type(type);
15c8ffc4
MCC
520 printk(KERN_CONT "(%x), id %016llx.\n",
521 type, (unsigned long long)*id);
83fb340b 522 }
f380e1d2
MCC
523 return i;
524}
525
d7cba043
MK
526static inline int do_tuner_callback(struct dvb_frontend *fe, int cmd, int arg)
527{
528 struct xc2028_data *priv = fe->tuner_priv;
529
530 /* analog side (tuner-core) uses i2c_adap->algo_data.
531 * digital side is not guaranteed to have algo_data defined.
532 *
533 * digital side will always have fe->dvb defined.
534 * analog side (tuner-core) doesn't (yet) define fe->dvb.
535 */
536
537 return (!fe->callback) ? -EINVAL :
538 fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
539 fe->dvb->priv : priv->i2c_props.adap->algo_data,
540 DVB_FRONTEND_COMPONENT_TUNER, cmd, arg);
541}
542
f380e1d2
MCC
543static int load_firmware(struct dvb_frontend *fe, unsigned int type,
544 v4l2_std_id *id)
545{
546 struct xc2028_data *priv = fe->tuner_priv;
547 int pos, rc;
56ac0337
MCC
548 unsigned char *p, *endp, buf[MAX_XFER_SIZE];
549
550 if (priv->ctrl.max_len > sizeof(buf))
551 priv->ctrl.max_len = sizeof(buf);
f380e1d2 552
7e28adb2 553 tuner_dbg("%s called\n", __func__);
f380e1d2
MCC
554
555 pos = seek_firmware(fe, type, id);
556 if (pos < 0)
557 return pos;
558
83fb340b 559 tuner_info("Loading firmware for type=");
b1535293 560 dump_firm_type(priv->firm[pos].type);
15c8ffc4
MCC
561 printk(KERN_CONT "(%x), id %016llx.\n",
562 priv->firm[pos].type, (unsigned long long)*id);
83fb340b 563
f380e1d2 564 p = priv->firm[pos].ptr;
f380e1d2 565 endp = p + priv->firm[pos].size;
6cb45879 566
ab0b9fc6 567 while (p < endp) {
de3fe21b
MCC
568 __u16 size;
569
570 /* Checks if there's enough bytes to read */
ab0b9fc6 571 if (p + sizeof(size) > endp) {
83fb340b 572 tuner_err("Firmware chunk size is wrong\n");
de3fe21b
MCC
573 return -EINVAL;
574 }
575
84eeb0b4 576 size = le16_to_cpu(*(__le16 *) p);
de3fe21b
MCC
577 p += sizeof(size);
578
579 if (size == 0xffff)
580 return 0;
581
582 if (!size) {
6cb45879 583 /* Special callback command received */
d7cba043 584 rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0);
ab0b9fc6 585 if (rc < 0) {
83fb340b 586 tuner_err("Error at RESET code %d\n",
ab0b9fc6 587 (*p) & 0x7f);
de3fe21b 588 return -EINVAL;
6cb45879 589 }
6cb45879
MCC
590 continue;
591 }
5403bbae
ML
592 if (size >= 0xff00) {
593 switch (size) {
594 case 0xff00:
d7cba043 595 rc = do_tuner_callback(fe, XC2028_RESET_CLK, 0);
5403bbae
ML
596 if (rc < 0) {
597 tuner_err("Error at RESET code %d\n",
598 (*p) & 0x7f);
599 return -EINVAL;
600 }
b32f9fb9 601 break;
5403bbae
ML
602 default:
603 tuner_info("Invalid RESET code %d\n",
604 size & 0x7f);
605 return -EINVAL;
606
607 }
2d4c0ac6 608 continue;
5403bbae 609 }
de3fe21b
MCC
610
611 /* Checks for a sleep command */
612 if (size & 0x8000) {
ab0b9fc6 613 msleep(size & 0x7fff);
de3fe21b 614 continue;
6cb45879
MCC
615 }
616
de3fe21b 617 if ((size + p > endp)) {
3fcb3c83
MCC
618 tuner_err("missing bytes: need %d, have %zd\n",
619 size, (endp - p));
de3fe21b
MCC
620 return -EINVAL;
621 }
6cb45879 622
de3fe21b 623 buf[0] = *p;
6cb45879 624 p++;
de3fe21b 625 size--;
6cb45879 626
de3fe21b 627 /* Sends message chunks */
ab0b9fc6 628 while (size > 0) {
0a196b6f
CP
629 int len = (size < priv->ctrl.max_len - 1) ?
630 size : priv->ctrl.max_len - 1;
6cb45879 631
ab0b9fc6 632 memcpy(buf + 1, p, len);
6cb45879 633
47cc5b78 634 rc = i2c_send(priv, buf, len + 1);
ab0b9fc6 635 if (rc < 0) {
83fb340b 636 tuner_err("%d returned from send\n", rc);
de3fe21b
MCC
637 return -EINVAL;
638 }
639
640 p += len;
641 size -= len;
642 }
4d37ece7
TR
643
644 /* silently fail if the frontend doesn't support I2C flush */
645 rc = do_tuner_callback(fe, XC2028_I2C_FLUSH, 0);
646 if ((rc < 0) && (rc != -EINVAL)) {
647 tuner_err("error executing flush: %d\n", rc);
648 return rc;
649 }
de3fe21b 650 }
43efe702 651 return 0;
6cb45879
MCC
652}
653
f380e1d2 654static int load_scode(struct dvb_frontend *fe, unsigned int type,
66c2d53d 655 v4l2_std_id *id, __u16 int_freq, int scode)
f380e1d2
MCC
656{
657 struct xc2028_data *priv = fe->tuner_priv;
658 int pos, rc;
659 unsigned char *p;
660
7e28adb2 661 tuner_dbg("%s called\n", __func__);
f380e1d2 662
66c2d53d
MCC
663 if (!int_freq) {
664 pos = seek_firmware(fe, type, id);
665 if (pos < 0)
666 return pos;
667 } else {
668 for (pos = 0; pos < priv->firm_size; pos++) {
669 if ((priv->firm[pos].int_freq == int_freq) &&
9ca01e78 670 (priv->firm[pos].type & HAS_IF))
66c2d53d
MCC
671 break;
672 }
673 if (pos == priv->firm_size)
674 return -ENOENT;
675 }
f380e1d2
MCC
676
677 p = priv->firm[pos].ptr;
678
9ca01e78 679 if (priv->firm[pos].type & HAS_IF) {
66c2d53d
MCC
680 if (priv->firm[pos].size != 12 * 16 || scode >= 16)
681 return -EINVAL;
682 p += 12 * scode;
683 } else {
684 /* 16 SCODE entries per file; each SCODE entry is 12 bytes and
685 * has a 2-byte size header in the firmware format. */
686 if (priv->firm[pos].size != 14 * 16 || scode >= 16 ||
84eeb0b4 687 le16_to_cpu(*(__le16 *)(p + 14 * scode)) != 12)
66c2d53d
MCC
688 return -EINVAL;
689 p += 14 * scode + 2;
690 }
f380e1d2 691
d7b22c5c 692 tuner_info("Loading SCODE for type=");
e0262688
CP
693 dump_firm_type_and_int_freq(priv->firm[pos].type,
694 priv->firm[pos].int_freq);
15c8ffc4 695 printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type,
d7b22c5c
CP
696 (unsigned long long)*id);
697
06fd82dc 698 if (priv->firm_version < 0x0202)
47cc5b78
CP
699 rc = send_seq(priv, {0x20, 0x00, 0x00, 0x00});
700 else
701 rc = send_seq(priv, {0xa0, 0x00, 0x00, 0x00});
702 if (rc < 0)
703 return -EIO;
f380e1d2 704
66c2d53d 705 rc = i2c_send(priv, p, 12);
47cc5b78
CP
706 if (rc < 0)
707 return -EIO;
f380e1d2 708
47cc5b78
CP
709 rc = send_seq(priv, {0x00, 0x8c});
710 if (rc < 0)
711 return -EIO;
f380e1d2
MCC
712
713 return 0;
714}
715
ebf044f4
MCC
716static int xc2028_sleep(struct dvb_frontend *fe);
717
00deff1a 718static int check_firmware(struct dvb_frontend *fe, unsigned int type,
66c2d53d 719 v4l2_std_id std, __u16 int_freq)
6cb45879 720{
00deff1a 721 struct xc2028_data *priv = fe->tuner_priv;
e0f0b37a 722 struct firmware_properties new_fw;
61a96113 723 int rc, retry_count = 0;
00deff1a
MCC
724 u16 version, hwmodel;
725 v4l2_std_id std0;
6cb45879 726
7e28adb2 727 tuner_dbg("%s called\n", __func__);
6cb45879 728
61a96113
MCC
729 rc = check_device_status(priv);
730 if (rc < 0)
731 return rc;
de3fe21b 732
0f6dac18 733 if (priv->ctrl.mts && !(type & FM))
e0f0b37a 734 type |= MTS;
6cb45879 735
8bf799a6 736retry:
e0f0b37a
CP
737 new_fw.type = type;
738 new_fw.id = std;
739 new_fw.std_req = std;
740 new_fw.scode_table = SCODE | priv->ctrl.scode_table;
741 new_fw.scode_nr = 0;
66c2d53d 742 new_fw.int_freq = int_freq;
e0f0b37a
CP
743
744 tuner_dbg("checking firmware, user requested type=");
745 if (debug) {
746 dump_firm_type(new_fw.type);
15c8ffc4 747 printk(KERN_CONT "(%x), id %016llx, ", new_fw.type,
e0f0b37a 748 (unsigned long long)new_fw.std_req);
e0262688 749 if (!int_freq) {
15c8ffc4 750 printk(KERN_CONT "scode_tbl ");
e0262688 751 dump_firm_type(priv->ctrl.scode_table);
15c8ffc4 752 printk(KERN_CONT "(%x), ", priv->ctrl.scode_table);
e0262688 753 } else
15c8ffc4
MCC
754 printk(KERN_CONT "int_freq %d, ", new_fw.int_freq);
755 printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr);
e0f0b37a
CP
756 }
757
61a96113
MCC
758 /*
759 * No need to reload base firmware if it matches and if the tuner
760 * is not at sleep mode
761 */
3a495ed7 762 if ((priv->state == XC2028_ACTIVE) &&
61a96113
MCC
763 (((BASE | new_fw.type) & BASE_TYPES) ==
764 (priv->cur_fw.type & BASE_TYPES))) {
e0f0b37a
CP
765 tuner_dbg("BASE firmware not changed.\n");
766 goto skip_base;
767 }
768
769 /* Updating BASE - forget about all currently loaded firmware */
770 memset(&priv->cur_fw, 0, sizeof(priv->cur_fw));
771
772 /* Reset is needed before loading firmware */
d7cba043 773 rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0);
e0f0b37a
CP
774 if (rc < 0)
775 goto fail;
776
47bd5bc6
CP
777 /* BASE firmwares are all std0 */
778 std0 = 0;
779 rc = load_firmware(fe, BASE | new_fw.type, &std0);
e0f0b37a
CP
780 if (rc < 0) {
781 tuner_err("Error %d while loading base firmware\n",
782 rc);
783 goto fail;
784 }
5403bbae 785
de3fe21b 786 /* Load INIT1, if needed */
83fb340b 787 tuner_dbg("Load init1 firmware, if exists\n");
de3fe21b 788
47bd5bc6 789 rc = load_firmware(fe, BASE | INIT1 | new_fw.type, &std0);
1ad0b796
CP
790 if (rc == -ENOENT)
791 rc = load_firmware(fe, (BASE | INIT1 | new_fw.type) & ~F8MHZ,
792 &std0);
e0f0b37a
CP
793 if (rc < 0 && rc != -ENOENT) {
794 tuner_err("Error %d while loading init1 firmware\n",
795 rc);
796 goto fail;
797 }
de3fe21b 798
e0f0b37a
CP
799skip_base:
800 /*
801 * No need to reload standard specific firmware if base firmware
802 * was not reloaded and requested video standards have not changed.
de3fe21b 803 */
e0f0b37a
CP
804 if (priv->cur_fw.type == (BASE | new_fw.type) &&
805 priv->cur_fw.std_req == std) {
83fb340b 806 tuner_dbg("Std-specific firmware already loaded.\n");
e0f0b37a 807 goto skip_std_specific;
2e4160ca 808 }
6cb45879 809
e0f0b37a
CP
810 /* Reloading std-specific firmware forces a SCODE update */
811 priv->cur_fw.scode_table = 0;
812
e0f0b37a 813 rc = load_firmware(fe, new_fw.type, &new_fw.id);
cca83798
MCC
814 if (rc == -ENOENT)
815 rc = load_firmware(fe, new_fw.type & ~F8MHZ, &new_fw.id);
816
ab0b9fc6 817 if (rc < 0)
e0f0b37a
CP
818 goto fail;
819
820skip_std_specific:
821 if (priv->cur_fw.scode_table == new_fw.scode_table &&
822 priv->cur_fw.scode_nr == new_fw.scode_nr) {
823 tuner_dbg("SCODE firmware already loaded.\n");
824 goto check_device;
825 }
6cb45879 826
40ae91a7
MCC
827 if (new_fw.type & FM)
828 goto check_device;
829
f380e1d2 830 /* Load SCODE firmware, if exists */
e0f0b37a 831 tuner_dbg("Trying to load scode %d\n", new_fw.scode_nr);
f380e1d2 832
66c2d53d
MCC
833 rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id,
834 new_fw.int_freq, new_fw.scode_nr);
43efe702 835
e0f0b37a 836check_device:
8bf799a6
CP
837 if (xc2028_get_reg(priv, 0x0004, &version) < 0 ||
838 xc2028_get_reg(priv, 0x0008, &hwmodel) < 0) {
839 tuner_err("Unable to read tuner registers.\n");
840 goto fail;
841 }
80b52208 842
2af3eb64 843 tuner_dbg("Device is Xceive %d version %d.%d, firmware version %d.%d\n",
b37f2d6a
DH
844 hwmodel, (version & 0xf000) >> 12, (version & 0xf00) >> 8,
845 (version & 0xf0) >> 4, version & 0xf);
6cb45879 846
0fb84ce0
MCC
847
848 if (priv->ctrl.read_not_reliable)
849 goto read_not_reliable;
850
8bf799a6
CP
851 /* Check firmware version against what we downloaded. */
852 if (priv->firm_version != ((version & 0xf0) << 4 | (version & 0x0f))) {
2d5024a9
MCC
853 if (!priv->ctrl.read_not_reliable) {
854 tuner_err("Incorrect readback of firmware version.\n");
855 goto fail;
856 } else {
2af3eb64 857 tuner_err("Returned an incorrect version. However, read is not reliable enough. Ignoring it.\n");
2d5024a9
MCC
858 hwmodel = 3028;
859 }
8bf799a6
CP
860 }
861
862 /* Check that the tuner hardware model remains consistent over time. */
863 if (priv->hwmodel == 0 && (hwmodel == 2028 || hwmodel == 3028)) {
864 priv->hwmodel = hwmodel;
865 priv->hwvers = version & 0xff00;
866 } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel ||
867 priv->hwvers != (version & 0xff00)) {
2af3eb64 868 tuner_err("Read invalid device hardware information - tuner hung?\n");
8bf799a6
CP
869 goto fail;
870 }
871
0fb84ce0 872read_not_reliable:
03c42001 873 priv->cur_fw = new_fw;
e0f0b37a
CP
874
875 /*
876 * By setting BASE in cur_fw.type only after successfully loading all
877 * firmwares, we can:
878 * 1. Identify that BASE firmware with type=0 has been loaded;
879 * 2. Tell whether BASE firmware was just changed the next time through.
880 */
881 priv->cur_fw.type |= BASE;
61a96113 882 priv->state = XC2028_ACTIVE;
6cb45879
MCC
883
884 return 0;
e0f0b37a
CP
885
886fail:
22a1e778 887 free_firmware(priv);
61a96113 888
b8bc77db 889 if (retry_count < 8) {
8bf799a6 890 msleep(50);
b8bc77db 891 retry_count++;
8bf799a6
CP
892 tuner_dbg("Retrying firmware load\n");
893 goto retry;
894 }
895
ebf044f4
MCC
896 /* Firmware didn't load. Put the device to sleep */
897 xc2028_sleep(fe);
898
e0f0b37a
CP
899 if (rc == -ENOENT)
900 rc = -EINVAL;
901 return rc;
6cb45879
MCC
902}
903
215b95ba 904static int xc2028_signal(struct dvb_frontend *fe, u16 *strength)
6cb45879 905{
215b95ba 906 struct xc2028_data *priv = fe->tuner_priv;
7d58d111 907 u16 frq_lock, signal = 0;
90acb85f 908 int rc, i;
3b20532c 909
7e28adb2 910 tuner_dbg("%s called\n", __func__);
6cb45879 911
61a96113
MCC
912 rc = check_device_status(priv);
913 if (rc < 0)
914 return rc;
915
2276bf70
MCC
916 /* If the device is sleeping, no channel is tuned */
917 if (!rc) {
918 *strength = 0;
919 return 0;
920 }
921
215b95ba 922 mutex_lock(&priv->lock);
6cb45879 923
80b52208 924 /* Sync Lock Indicator */
90acb85f
MCC
925 for (i = 0; i < 3; i++) {
926 rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock);
927 if (rc < 0)
928 goto ret;
929
930 if (frq_lock)
931 break;
932 msleep(6);
933 }
6cb45879 934
1d432a3d 935 /* Frequency didn't lock */
90acb85f
MCC
936 if (frq_lock == 2)
937 goto ret;
6cb45879 938
80b52208 939 /* Get SNR of the video signal */
304bce41 940 rc = xc2028_get_reg(priv, XREG_SNR, &signal);
7d58d111 941 if (rc < 0)
b0166ab3
MCC
942 goto ret;
943
90acb85f
MCC
944 /* Signal level is 3 bits only */
945
946 signal = ((1 << 12) - 1) | ((signal & 0x07) << 12);
3b20532c
MCC
947
948ret:
215b95ba
MCC
949 mutex_unlock(&priv->lock);
950
951 *strength = signal;
6cb45879 952
b0166ab3
MCC
953 tuner_dbg("signal strength is %d\n", signal);
954
7d58d111 955 return rc;
6cb45879
MCC
956}
957
1d432a3d
MCC
958static int xc2028_get_afc(struct dvb_frontend *fe, s32 *afc)
959{
960 struct xc2028_data *priv = fe->tuner_priv;
961 int i, rc;
962 u16 frq_lock = 0;
963 s16 afc_reg = 0;
964
965 rc = check_device_status(priv);
966 if (rc < 0)
967 return rc;
968
2276bf70
MCC
969 /* If the device is sleeping, no channel is tuned */
970 if (!rc) {
971 *afc = 0;
972 return 0;
973 }
974
1d432a3d
MCC
975 mutex_lock(&priv->lock);
976
977 /* Sync Lock Indicator */
978 for (i = 0; i < 3; i++) {
979 rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock);
980 if (rc < 0)
981 goto ret;
982
983 if (frq_lock)
984 break;
985 msleep(6);
986 }
987
988 /* Frequency didn't lock */
989 if (frq_lock == 2)
990 goto ret;
991
992 /* Get AFC */
993 rc = xc2028_get_reg(priv, XREG_FREQ_ERROR, &afc_reg);
994 if (rc < 0)
f088ccd6 995 goto ret;
1d432a3d
MCC
996
997 *afc = afc_reg * 15625; /* Hz */
998
999 tuner_dbg("AFC is %d Hz\n", *afc);
1000
1001ret:
1002 mutex_unlock(&priv->lock);
1003
1004 return rc;
1005}
1006
6cb45879
MCC
1007#define DIV 15625
1008
00deff1a 1009static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */,
aa40d194 1010 enum v4l2_tuner_type new_type,
66c2d53d
MCC
1011 unsigned int type,
1012 v4l2_std_id std,
1013 u16 int_freq)
6cb45879 1014{
215b95ba 1015 struct xc2028_data *priv = fe->tuner_priv;
ab0b9fc6 1016 int rc = -EINVAL;
2ce4b3aa 1017 unsigned char buf[4];
ab0b9fc6 1018 u32 div, offset = 0;
6cb45879 1019
7e28adb2 1020 tuner_dbg("%s called\n", __func__);
215b95ba 1021
de3fe21b
MCC
1022 mutex_lock(&priv->lock);
1023
2ce4b3aa 1024 tuner_dbg("should set frequency %d kHz\n", freq / 1000);
6cb45879 1025
66c2d53d 1026 if (check_firmware(fe, type, std, int_freq) < 0)
3b20532c 1027 goto ret;
2e4160ca 1028
2800ae9c
MCC
1029 /* On some cases xc2028 can disable video output, if
1030 * very weak signals are received. By sending a soft
1031 * reset, this is re-enabled. So, it is better to always
1032 * send a soft reset before changing channels, to be sure
1033 * that xc2028 will be in a safe state.
1034 * Maybe this might also be needed for DTV.
1035 */
fd34cb08
MCC
1036 switch (new_type) {
1037 case V4L2_TUNER_ANALOG_TV:
2800ae9c 1038 rc = send_seq(priv, {0x00, 0x00});
0a863975 1039
fd34cb08
MCC
1040 /* Analog mode requires offset = 0 */
1041 break;
1042 case V4L2_TUNER_RADIO:
1043 /* Radio mode requires offset = 0 */
1044 break;
1045 case V4L2_TUNER_DIGITAL_TV:
7f2199c0
MCC
1046 /*
1047 * Digital modes require an offset to adjust to the
1048 * proper frequency. The offset depends on what
1049 * firmware version is used.
1050 */
1051
1052 /*
1053 * Adjust to the center frequency. This is calculated by the
1054 * formula: offset = 1.25MHz - BW/2
1055 * For DTV 7/8, the firmware uses BW = 8000, so it needs a
1056 * further adjustment to get the frequency center on VHF
1057 */
98ab8550
GG
1058
1059 /*
1060 * The firmware DTV78 used to work fine in UHF band (8 MHz
1061 * bandwidth) but not at all in VHF band (7 MHz bandwidth).
1062 * The real problem was connected to the formula used to
1063 * calculate the center frequency offset in VHF band.
1064 * In fact, removing the 500KHz adjustment fixed the problem.
1065 * This is coherent to what was implemented for the DTV7
1066 * firmware.
1067 * In the end, now the center frequency is the same for all 3
1068 * firmwares (DTV7, DTV8, DTV78) and doesn't depend on channel
1069 * bandwidth.
1070 */
1071
0a863975
MCC
1072 if (priv->cur_fw.type & DTV6)
1073 offset = 1750000;
98ab8550 1074 else /* DTV7 or DTV8 or DTV78 */
0a863975
MCC
1075 offset = 2750000;
1076
897b8422 1077 /*
7f2199c0
MCC
1078 * xc3028 additional "magic"
1079 * Depending on the firmware version, it needs some adjustments
1080 * to properly centralize the frequency. This seems to be
1081 * needed to compensate the SCODE table adjustments made by
1082 * newer firmwares
897b8422 1083 */
7f2199c0 1084
7f2199c0
MCC
1085 /*
1086 * The proper adjustment would be to do it at s-code table.
1087 * However, this didn't work, as reported by
1088 * Robert Lowery <rglowery@exemail.com.au>
1089 */
1090
98ab8550 1091#if 0
7f2199c0
MCC
1092 /*
1093 * Still need tests for XC3028L (firmware 3.2 or upper)
1094 * So, for now, let's just comment the per-firmware
1095 * version of this change. Reports with xc3028l working
5a13e40b 1096 * with and without the lines below are welcome
7f2199c0
MCC
1097 */
1098
1099 if (priv->firm_version < 0x0302) {
1100 if (priv->cur_fw.type & DTV7)
1101 offset += 500000;
1102 } else {
1103 if (priv->cur_fw.type & DTV7)
1104 offset -= 300000;
1105 else if (type != ATSC) /* DVB @6MHz, DTV 8 and DTV 7/8 */
1106 offset += 200000;
1107 }
1108#endif
c6f977ec 1109 break;
96a5b3a8
AP
1110 default:
1111 tuner_err("Unsupported tuner type %d.\n", new_type);
1112 break;
a44f1c43 1113 }
2e4160ca 1114
ab0b9fc6 1115 div = (freq - offset + DIV / 2) / DIV;
2e4160ca 1116
6cb45879 1117 /* CMD= Set frequency */
06fd82dc 1118 if (priv->firm_version < 0x0202)
304bce41 1119 rc = send_seq(priv, {0x00, XREG_RF_FREQ, 0x00, 0x00});
47cc5b78 1120 else
304bce41 1121 rc = send_seq(priv, {0x80, XREG_RF_FREQ, 0x00, 0x00});
47cc5b78
CP
1122 if (rc < 0)
1123 goto ret;
de3fe21b 1124
1fe87369
MCC
1125 /* Return code shouldn't be checked.
1126 The reset CLK is needed only with tm6000.
1127 Driver should work fine even if this fails.
1128 */
70ca3c4b
DH
1129 if (priv->ctrl.msleep)
1130 msleep(priv->ctrl.msleep);
d7cba043 1131 do_tuner_callback(fe, XC2028_RESET_CLK, 1);
6cb45879
MCC
1132
1133 msleep(10);
701672eb 1134
ab0b9fc6
MCC
1135 buf[0] = 0xff & (div >> 24);
1136 buf[1] = 0xff & (div >> 16);
1137 buf[2] = 0xff & (div >> 8);
1138 buf[3] = 0xff & (div);
6cb45879 1139
47cc5b78 1140 rc = i2c_send(priv, buf, sizeof(buf));
ab0b9fc6 1141 if (rc < 0)
3b20532c 1142 goto ret;
6cb45879
MCC
1143 msleep(100);
1144
ab0b9fc6 1145 priv->frequency = freq;
215b95ba 1146
c6480ccc 1147 tuner_dbg("divisor= %*ph (freq=%d.%03d)\n", 4, buf,
2ce4b3aa 1148 freq / 1000000, (freq % 1000000) / 1000);
3b20532c 1149
ab0b9fc6 1150 rc = 0;
6cb45879 1151
215b95ba
MCC
1152ret:
1153 mutex_unlock(&priv->lock);
6cb45879 1154
215b95ba 1155 return rc;
701672eb
ML
1156}
1157
00deff1a 1158static int xc2028_set_analog_freq(struct dvb_frontend *fe,
ab0b9fc6 1159 struct analog_parameters *p)
6cb45879 1160{
215b95ba 1161 struct xc2028_data *priv = fe->tuner_priv;
00deff1a
MCC
1162 unsigned int type=0;
1163
7e28adb2 1164 tuner_dbg("%s called\n", __func__);
c71d4bc5 1165
d74cb25e
MCC
1166 if (p->mode == V4L2_TUNER_RADIO) {
1167 type |= FM;
1168 if (priv->ctrl.input1)
1169 type |= INPUT1;
1170 return generic_set_freq(fe, (625l * p->frequency) / 10,
437f5fa3 1171 V4L2_TUNER_RADIO, type, 0, 0);
d74cb25e
MCC
1172 }
1173
a5e9fe14
MCC
1174 /* if std is not defined, choose one */
1175 if (!p->std)
1176 p->std = V4L2_STD_MN;
1177
1178 /* PAL/M, PAL/N, PAL/Nc and NTSC variants should use 6MHz firmware */
00deff1a
MCC
1179 if (!(p->std & V4L2_STD_MN))
1180 type |= F8MHZ;
6cb45879 1181
00deff1a
MCC
1182 /* Add audio hack to std mask */
1183 p->std |= parse_audio_std_option();
6cb45879 1184
00deff1a 1185 return generic_set_freq(fe, 62500l * p->frequency,
437f5fa3 1186 V4L2_TUNER_ANALOG_TV, type, p->std, 0);
215b95ba 1187}
6cb45879 1188
14d24d14 1189static int xc2028_set_params(struct dvb_frontend *fe)
6cb45879 1190{
506cd714
MCC
1191 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1192 u32 delsys = c->delivery_system;
1193 u32 bw = c->bandwidth_hz;
215b95ba 1194 struct xc2028_data *priv = fe->tuner_priv;
61a96113
MCC
1195 int rc;
1196 unsigned int type = 0;
ad35ce9e 1197 u16 demod = 0;
6cb45879 1198
7e28adb2 1199 tuner_dbg("%s called\n", __func__);
701672eb 1200
61a96113
MCC
1201 rc = check_device_status(priv);
1202 if (rc < 0)
1203 return rc;
1204
506cd714
MCC
1205 switch (delsys) {
1206 case SYS_DVBT:
1207 case SYS_DVBT2:
a1014d70
MCC
1208 /*
1209 * The only countries with 6MHz seem to be Taiwan/Uruguay.
1210 * Both seem to require QAM firmware for OFDM decoding
1211 * Tested in Taiwan by Terry Wu <terrywu2009@gmail.com>
1212 */
506cd714 1213 if (bw <= 6000000)
a1014d70 1214 type |= QAM;
00deff1a 1215
0975fc68
MCC
1216 switch (priv->ctrl.type) {
1217 case XC2028_D2633:
1218 type |= D2633;
1219 break;
1220 case XC2028_D2620:
1221 type |= D2620;
1222 break;
1223 case XC2028_AUTO:
1224 default:
1225 /* Zarlink seems to need D2633 */
1226 if (priv->ctrl.demod == XC3028_FE_ZARLINK456)
1227 type |= D2633;
1228 else
1229 type |= D2620;
1230 }
506cd714
MCC
1231 break;
1232 case SYS_ATSC:
1233 /* The only ATSC firmware (at least on v2.7) is D2633 */
1234 type |= ATSC | D2633;
1235 break;
1236 /* DVB-S and pure QAM (FE_QAM) are not supported */
1237 default:
1238 return -EINVAL;
1239 }
1240
1241 if (bw <= 6000000) {
1242 type |= DTV6;
1243 priv->ctrl.vhfbw7 = 0;
1244 priv->ctrl.uhfbw8 = 0;
1245 } else if (bw <= 7000000) {
1246 if (c->frequency < 470000000)
1247 priv->ctrl.vhfbw7 = 1;
1248 else
1249 priv->ctrl.uhfbw8 = 0;
1250 type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7;
1251 type |= F8MHZ;
1252 } else {
1253 if (c->frequency < 470000000)
1254 priv->ctrl.vhfbw7 = 0;
1255 else
1256 priv->ctrl.uhfbw8 = 1;
1257 type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8;
1258 type |= F8MHZ;
0975fc68
MCC
1259 }
1260
66c2d53d 1261 /* All S-code tables need a 200kHz shift */
6e707b4c 1262 if (priv->ctrl.demod) {
7d350284
MCC
1263 demod = priv->ctrl.demod;
1264
7f2199c0
MCC
1265 /*
1266 * Newer firmwares require a 200 kHz offset only for ATSC
1267 */
1268 if (type == ATSC || priv->firm_version < 0x0302)
7d350284 1269 demod += 200;
6e707b4c
AW
1270 /*
1271 * The DTV7 S-code table needs a 700 kHz shift.
6e707b4c
AW
1272 *
1273 * DTV7 is only used in Australia. Germany or Italy may also
1274 * use this firmware after initialization, but a tune to a UHF
1275 * channel should then cause DTV78 to be used.
7f2199c0
MCC
1276 *
1277 * Unfortunately, on real-field tests, the s-code offset
1278 * didn't work as expected, as reported by
1279 * Robert Lowery <rglowery@exemail.com.au>
6e707b4c 1280 */
6e707b4c 1281 }
b542dfdc 1282
506cd714 1283 return generic_set_freq(fe, c->frequency,
437f5fa3 1284 V4L2_TUNER_DIGITAL_TV, type, 0, demod);
6cb45879 1285}
701672eb 1286
74a89b2a
MCC
1287static int xc2028_sleep(struct dvb_frontend *fe)
1288{
1289 struct xc2028_data *priv = fe->tuner_priv;
61a96113
MCC
1290 int rc;
1291
1292 rc = check_device_status(priv);
1293 if (rc < 0)
1294 return rc;
74a89b2a 1295
2276bf70
MCC
1296 /* Device is already in sleep mode */
1297 if (!rc)
10f201af 1298 return 0;
74a89b2a 1299
2276bf70
MCC
1300 /* Avoid firmware reload on slow devices or if PM disabled */
1301 if (no_poweroff || priv->ctrl.disable_power_mgmt)
ebf044f4
MCC
1302 return 0;
1303
74a89b2a 1304 tuner_dbg("Putting xc2028/3028 into poweroff mode.\n");
e278e746
MCC
1305 if (debug > 1) {
1306 tuner_dbg("Printing sleep stack trace:\n");
1307 dump_stack();
1308 }
74a89b2a
MCC
1309
1310 mutex_lock(&priv->lock);
1311
1312 if (priv->firm_version < 0x0202)
304bce41 1313 rc = send_seq(priv, {0x00, XREG_POWER_DOWN, 0x00, 0x00});
74a89b2a 1314 else
304bce41 1315 rc = send_seq(priv, {0x80, XREG_POWER_DOWN, 0x00, 0x00});
74a89b2a 1316
ebf044f4
MCC
1317 if (rc >= 0)
1318 priv->state = XC2028_SLEEP;
74a89b2a
MCC
1319
1320 mutex_unlock(&priv->lock);
1321
1322 return rc;
1323}
45819c38 1324
194ced7a 1325static void xc2028_dvb_release(struct dvb_frontend *fe)
701672eb 1326{
215b95ba
MCC
1327 struct xc2028_data *priv = fe->tuner_priv;
1328
7e28adb2 1329 tuner_dbg("%s called\n", __func__);
701672eb 1330
aa501be9
CP
1331 mutex_lock(&xc2028_list_mutex);
1332
c663d035 1333 /* only perform final cleanup if this is the last instance */
22a1e778 1334 if (hybrid_tuner_report_instance_count(priv) == 1)
de3fe21b 1335 free_firmware(priv);
701672eb 1336
c663d035
MK
1337 if (priv)
1338 hybrid_tuner_release_state(priv);
1339
aa501be9
CP
1340 mutex_unlock(&xc2028_list_mutex);
1341
c663d035 1342 fe->tuner_priv = NULL;
701672eb
ML
1343}
1344
215b95ba 1345static int xc2028_get_frequency(struct dvb_frontend *fe, u32 *frequency)
701672eb 1346{
215b95ba 1347 struct xc2028_data *priv = fe->tuner_priv;
61a96113 1348 int rc;
701672eb 1349
7e28adb2 1350 tuner_dbg("%s called\n", __func__);
701672eb 1351
61a96113
MCC
1352 rc = check_device_status(priv);
1353 if (rc < 0)
1354 return rc;
1355
215b95ba 1356 *frequency = priv->frequency;
701672eb
ML
1357
1358 return 0;
1359}
1360
61a96113
MCC
1361static void load_firmware_cb(const struct firmware *fw,
1362 void *context)
1363{
1364 struct dvb_frontend *fe = context;
1365 struct xc2028_data *priv = fe->tuner_priv;
1366 int rc;
1367
1368 tuner_dbg("request_firmware_nowait(): %s\n", fw ? "OK" : "error");
1369 if (!fw) {
1370 tuner_err("Could not load firmware %s.\n", priv->fname);
1371 priv->state = XC2028_NODEV;
1372 return;
1373 }
1374
1375 rc = load_all_firmwares(fe, fw);
1376
1377 release_firmware(fw);
1378
1379 if (rc < 0)
1380 return;
ebf044f4 1381 priv->state = XC2028_ACTIVE;
61a96113
MCC
1382}
1383
ab0b9fc6 1384static int xc2028_set_config(struct dvb_frontend *fe, void *priv_cfg)
de3fe21b
MCC
1385{
1386 struct xc2028_data *priv = fe->tuner_priv;
1387 struct xc2028_ctrl *p = priv_cfg;
0a196b6f 1388 int rc = 0;
de3fe21b 1389
7e28adb2 1390 tuner_dbg("%s called\n", __func__);
de3fe21b 1391
06fd82dc
CP
1392 mutex_lock(&priv->lock);
1393
61a96113
MCC
1394 /*
1395 * Copy the config data.
61a96113 1396 */
0a196b6f 1397 memcpy(&priv->ctrl, p, sizeof(priv->ctrl));
de3fe21b 1398
61a96113
MCC
1399 /*
1400 * If firmware name changed, frees firmware. As free_firmware will
1401 * reset the status to NO_FIRMWARE, this forces a new request_firmware
1402 */
1403 if (!firmware_name[0] && p->fname &&
1404 priv->fname && strcmp(p->fname, priv->fname))
1405 free_firmware(priv);
1406
1407 if (priv->ctrl.max_len < 9)
1408 priv->ctrl.max_len = 13;
1409
1410 if (priv->state == XC2028_NO_FIRMWARE) {
1411 if (!firmware_name[0])
22a1e778 1412 priv->fname = kstrdup(p->fname, GFP_KERNEL);
61a96113
MCC
1413 else
1414 priv->fname = firmware_name;
1415
22a1e778
TI
1416 if (!priv->fname) {
1417 rc = -ENOMEM;
1418 goto unlock;
1419 }
1420
61a96113
MCC
1421 rc = request_firmware_nowait(THIS_MODULE, 1,
1422 priv->fname,
1423 priv->i2c_props.adap->dev.parent,
1424 GFP_KERNEL,
1425 fe, load_firmware_cb);
1426 if (rc < 0) {
1427 tuner_err("Failed to request firmware %s\n",
1428 priv->fname);
1429 priv->state = XC2028_NODEV;
1e9c14f7
HPS
1430 } else
1431 priv->state = XC2028_WAITING_FIRMWARE;
61a96113 1432 }
210bd104 1433unlock:
06fd82dc
CP
1434 mutex_unlock(&priv->lock);
1435
0a196b6f 1436 return rc;
de3fe21b
MCC
1437}
1438
215b95ba 1439static const struct dvb_tuner_ops xc2028_dvb_tuner_ops = {
701672eb 1440 .info = {
ab0b9fc6 1441 .name = "Xceive XC3028",
a3f90c75
MCC
1442 .frequency_min_hz = 42 * MHz,
1443 .frequency_max_hz = 864 * MHz,
1444 .frequency_step_hz = 50 * kHz,
ab0b9fc6 1445 },
701672eb 1446
de3fe21b 1447 .set_config = xc2028_set_config,
00deff1a 1448 .set_analog_params = xc2028_set_analog_freq,
215b95ba
MCC
1449 .release = xc2028_dvb_release,
1450 .get_frequency = xc2028_get_frequency,
1451 .get_rf_strength = xc2028_signal,
1d432a3d 1452 .get_afc = xc2028_get_afc,
215b95ba 1453 .set_params = xc2028_set_params,
74a89b2a 1454 .sleep = xc2028_sleep,
701672eb
ML
1455};
1456
7972f988
MK
1457struct dvb_frontend *xc2028_attach(struct dvb_frontend *fe,
1458 struct xc2028_config *cfg)
701672eb 1459{
215b95ba 1460 struct xc2028_data *priv;
c663d035 1461 int instance;
701672eb 1462
83fb340b 1463 if (debug)
2756665c 1464 printk(KERN_DEBUG "xc2028: Xcv2028/3028 init called!\n");
701672eb 1465
b412ba78 1466 if (NULL == cfg)
a37b4c9b 1467 return NULL;
215b95ba 1468
a37b4c9b 1469 if (!fe) {
2756665c 1470 printk(KERN_ERR "xc2028: No frontend!\n");
a37b4c9b 1471 return NULL;
215b95ba
MCC
1472 }
1473
aa501be9
CP
1474 mutex_lock(&xc2028_list_mutex);
1475
c663d035
MK
1476 instance = hybrid_tuner_request_state(struct xc2028_data, priv,
1477 hybrid_tuner_instance_list,
1478 cfg->i2c_adap, cfg->i2c_addr,
1479 "xc2028");
1480 switch (instance) {
1481 case 0:
1482 /* memory allocation failure */
1483 goto fail;
c663d035
MK
1484 case 1:
1485 /* new tuner instance */
0a196b6f 1486 priv->ctrl.max_len = 13;
de3fe21b 1487
215b95ba
MCC
1488 mutex_init(&priv->lock);
1489
c663d035
MK
1490 fe->tuner_priv = priv;
1491 break;
1492 case 2:
1493 /* existing tuner instance */
1494 fe->tuner_priv = priv;
1495 break;
1496 }
b412ba78 1497
215b95ba 1498 memcpy(&fe->ops.tuner_ops, &xc2028_dvb_tuner_ops,
ab0b9fc6 1499 sizeof(xc2028_dvb_tuner_ops));
215b95ba
MCC
1500
1501 tuner_info("type set to %s\n", "XCeive xc2028/xc3028 tuner");
1502
71a2ee37
MCC
1503 if (cfg->ctrl)
1504 xc2028_set_config(fe, cfg->ctrl);
1505
aa501be9
CP
1506 mutex_unlock(&xc2028_list_mutex);
1507
a37b4c9b 1508 return fe;
c663d035
MK
1509fail:
1510 mutex_unlock(&xc2028_list_mutex);
1511
1512 xc2028_dvb_release(fe);
1513 return NULL;
215b95ba 1514}
a37b4c9b 1515
701672eb
ML
1516EXPORT_SYMBOL(xc2028_attach);
1517
215b95ba 1518MODULE_DESCRIPTION("Xceive xc2028/xc3028 tuner driver");
983d214e 1519MODULE_AUTHOR("Michel Ludwig <michel.ludwig@gmail.com>");
32590819 1520MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@kernel.org>");
0c20e8ca 1521MODULE_LICENSE("GPL v2");
ab9cbcd3
MCC
1522MODULE_FIRMWARE(XC2028_DEFAULT_FIRMWARE);
1523MODULE_FIRMWARE(XC3028L_DEFAULT_FIRMWARE);