projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 148abd3b OS |
1 | /* |
| 2 | * NXP TDA18250BHN silicon tuner driver | |
| 3 | * | |
| 4 | * Copyright (C) 2017 Olli Salonen <olli.salonen@iki.fi> | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License as published by | |
| 8 | * the Free Software Foundation; either version 2 of the License, or | |
| 9 | * (at your option) any later version. | |
| 10 | * | |
| 11 | * This program is distributed in the hope that it will be useful, | |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | * GNU General Public License for more details. | |
| 15 | */ | |
| 16 | ||
| 17 | #ifndef TDA18250_PRIV_H | |
| 18 | #define TDA18250_PRIV_H | |
| 19 | ||
| 20 | #include "tda18250.h" | |
| 21 | ||
| 22 | #define R00_ID1 0x00 /* ID byte 1 */ | |
| 23 | #define R01_ID2 0x01 /* ID byte 2 */ | |
| 24 | #define R02_ID3 0x02 /* ID byte 3 */ | |
| 25 | #define R03_THERMO1 0x03 /* Thermo byte 1 */ | |
| 26 | #define R04_THERMO2 0x04 /* Thermo byte 2 */ | |
| 27 | #define R05_POWER1 0x05 /* Power byte 1 */ | |
| 28 | #define R06_POWER2 0x06 /* Power byte 2 */ | |
| 29 | #define R07_GPIO 0x07 /* GPIO */ | |
| 30 | #define R08_IRQ1 0x08 /* IRQ */ | |
| 31 | #define R09_IRQ2 0x09 /* IRQ */ | |
| 32 | #define R0A_IRQ3 0x0a /* IRQ */ | |
| 33 | #define R0B_IRQ4 0x0b /* IRQ */ | |
| 34 | #define R0C_AGC11 0x0c /* AGC1 byte 1 */ | |
| 35 | #define R0D_AGC12 0x0d /* AGC1 byte 2 */ | |
| 36 | #define R0E_AGC13 0x0e /* AGC1 byte 3 */ | |
| 37 | #define R0F_AGC14 0x0f /* AGC1 byte 4 */ | |
| 38 | #define R10_LT1 0x10 /* LT byte 1 */ | |
| 39 | #define R11_LT2 0x11 /* LT byte 2 */ | |
| 40 | #define R12_AGC21 0x12 /* AGC2 byte 1 */ | |
| 41 | #define R13_AGC22 0x13 /* AGC2 byte 2 */ | |
| 42 | #define R14_AGC23 0x14 /* AGC2 byte 3 */ | |
| 43 | #define R15_AGC24 0x15 /* AGC2 byte 4 */ | |
| 44 | #define R16_AGC25 0x16 /* AGC2 byte 5 */ | |
| 45 | #define R17_AGC31 0x17 /* AGC3 byte 1 */ | |
| 46 | #define R18_AGC32 0x18 /* AGC3 byte 2 */ | |
| 47 | #define R19_AGC33 0x19 /* AGC3 byte 3 */ | |
| 48 | #define R1A_AGCK 0x1a | |
| 49 | #define R1B_GAIN1 0x1b | |
| 50 | #define R1C_GAIN2 0x1c | |
| 51 | #define R1D_GAIN3 0x1d | |
| 52 | #define R1E_WI_FI 0x1e /* Wireless Filter */ | |
| 53 | #define R1F_RF_BPF 0x1f /* RF Band Pass Filter */ | |
| 54 | #define R20_IR_MIX 0x20 /* IR Mixer */ | |
| 55 | #define R21_IF_AGC 0x21 | |
| 56 | #define R22_IF1 0x22 /* IF byte 1 */ | |
| 57 | #define R23_IF2 0x23 /* IF byte 2 */ | |
| 58 | #define R24_IF3 0x24 /* IF byte 3 */ | |
| 59 | #define R25_REF 0x25 /* reference byte */ | |
| 60 | #define R26_IF 0x26 /* IF frequency */ | |
| 61 | #define R27_RF1 0x27 /* RF frequency byte 1 */ | |
| 62 | #define R28_RF2 0x28 /* RF frequency byte 2 */ | |
| 63 | #define R29_RF3 0x29 /* RF frequency byte 3 */ | |
| 64 | #define R2A_MSM1 0x2a | |
| 65 | #define R2B_MSM2 0x2b | |
| 66 | #define R2C_PS1 0x2c /* power saving mode byte 1 */ | |
| 67 | #define R2D_PS2 0x2d /* power saving mode byte 2 */ | |
| 68 | #define R2E_PS3 0x2e /* power saving mode byte 3 */ | |
| 69 | #define R2F_RSSI1 0x2f | |
| 70 | #define R30_RSSI2 0x30 | |
| 71 | #define R31_IRQ_CTRL 0x31 | |
| 72 | #define R32_DUMMY 0x32 | |
| 73 | #define R33_TEST 0x33 | |
| 74 | #define R34_MD1 0x34 | |
| 75 | #define R35_SD1 0x35 | |
| 76 | #define R36_SD2 0x36 | |
| 77 | #define R37_SD3 0x37 | |
| 78 | #define R38_SD4 0x38 | |
| 79 | #define R39_SD5 0x39 | |
| 80 | #define R3A_SD_TEST 0x3a | |
| 81 | #define R3B_REGU 0x3b | |
| 82 | #define R3C_RCCAL1 0x3c | |
| 83 | #define R3D_RCCAL2 0x3d | |
| 84 | #define R3E_IRCAL1 0x3e | |
| 85 | #define R3F_IRCAL2 0x3f | |
| 86 | #define R40_IRCAL3 0x40 | |
| 87 | #define R41_IRCAL4 0x41 | |
| 88 | #define R42_IRCAL5 0x42 | |
| 89 | #define R43_PD1 0x43 /* power down byte 1 */ | |
| 90 | #define R44_PD2 0x44 /* power down byte 2 */ | |
| 91 | #define R45_PD 0x45 /* power down */ | |
| 92 | #define R46_CPUMP 0x46 /* charge pump */ | |
| 93 | #define R47_LNAPOL 0x47 /* LNA polar casc */ | |
| 94 | #define R48_SMOOTH1 0x48 /* smooth test byte 1 */ | |
| 95 | #define R49_SMOOTH2 0x49 /* smooth test byte 2 */ | |
| 96 | #define R4A_SMOOTH3 0x4a /* smooth test byte 3 */ | |
| 97 | #define R4B_XTALOSC1 0x4b | |
| 98 | #define R4C_XTALOSC2 0x4c | |
| 99 | #define R4D_XTALFLX1 0x4d | |
| 100 | #define R4E_XTALFLX2 0x4e | |
| 101 | #define R4F_XTALFLX3 0x4f | |
| 102 | #define R50_XTALFLX4 0x50 | |
| 103 | #define R51_XTALFLX5 0x51 | |
| 104 | #define R52_IRLOOP0 0x52 | |
| 105 | #define R53_IRLOOP1 0x53 | |
| 106 | #define R54_IRLOOP2 0x54 | |
| 107 | #define R55_IRLOOP3 0x55 | |
| 108 | #define R56_IRLOOP4 0x56 | |
| 109 | #define R57_PLL_LOG 0x57 | |
| 110 | #define R58_AGC2_UP1 0x58 | |
| 111 | #define R59_AGC2_UP2 0x59 | |
| 112 | #define R5A_H3H5 0x5a | |
| 113 | #define R5B_AGC_AUTO 0x5b | |
| 114 | #define R5C_AGC_DEBUG 0x5c | |
| 115 | ||
| 116 | #define TDA18250_NUM_REGS 93 | |
| 117 | ||
| 118 | #define TDA18250_POWER_STANDBY 0 | |
| 119 | #define TDA18250_POWER_NORMAL 1 | |
| 120 | ||
| 121 | #define TDA18250_IRQ_CAL 0x81 | |
| 122 | #define TDA18250_IRQ_HW_INIT 0x82 | |
| 123 | #define TDA18250_IRQ_TUNE 0x88 | |
| 124 | ||
| 125 | struct tda18250_dev { | |
| 126 | struct mutex i2c_mutex; | |
| 127 | struct dvb_frontend *fe; | |
| 128 | struct i2c_adapter *i2c; | |
| 129 | struct regmap *regmap; | |
| 130 | u8 xtal_freq; | |
| 131 | /* IF in kHz */ | |
| 132 | u16 if_dvbt_6; | |
| 133 | u16 if_dvbt_7; | |
| 134 | u16 if_dvbt_8; | |
| 135 | u16 if_dvbc_6; | |
| 136 | u16 if_dvbc_8; | |
| 137 | u16 if_atsc; | |
| 138 | u16 if_frequency; | |
| 139 | bool slave; | |
| 140 | bool loopthrough; | |
| 141 | bool warm; | |
| 142 | u8 regs[TDA18250_NUM_REGS]; | |
| 143 | }; | |
| 144 | ||
| 145 | #endif |