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cbdc80ed AP |
1 | /* |
2 | * Driver for Quantek QT1010 silicon tuner | |
3 | * | |
4 | * Copyright (C) 2006 Antti Palosaari <crope@iki.fi> | |
5 | * Aapo Tahkola <aet@rasterburn.org> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
cbdc80ed AP |
16 | */ |
17 | ||
18 | #ifndef QT1010_PRIV_H | |
19 | #define QT1010_PRIV_H | |
20 | ||
21 | /* | |
22 | reg def meaning | |
23 | === === ======= | |
24 | 00 00 ? | |
25 | 01 a0 ? operation start/stop; start=80, stop=00 | |
26 | 02 00 ? | |
27 | 03 19 ? | |
28 | 04 00 ? | |
29 | 05 00 ? maybe band selection | |
30 | 06 00 ? | |
31 | 07 2b set frequency: 32 MHz scale, n*32 MHz | |
32 | 08 0b ? | |
33 | 09 10 ? changes every 8/24 MHz; values 1d/1c | |
34 | 0a 08 set frequency: 4 MHz scale, n*4 MHz | |
35 | 0b 41 ? changes every 2/2 MHz; values 45/45 | |
36 | 0c e1 ? | |
37 | 0d 94 ? | |
38 | 0e b6 ? | |
39 | 0f 2c ? | |
40 | 10 10 ? | |
41 | 11 f1 ? maybe device specified adjustment | |
42 | 12 11 ? maybe device specified adjustment | |
43 | 13 3f ? | |
44 | 14 1f ? | |
45 | 15 3f ? | |
46 | 16 ff ? | |
47 | 17 ff ? | |
48 | 18 f7 ? | |
49 | 19 80 ? | |
50 | 1a d0 set frequency: 125 kHz scale, n*125 kHz | |
51 | 1b 00 ? | |
52 | 1c 89 ? | |
53 | 1d 00 ? | |
54 | 1e 00 ? looks like operation register; write cmd here, read result from 1f-26 | |
55 | 1f 20 ? chip initialization | |
56 | 20 e0 ? chip initialization | |
57 | 21 20 ? | |
58 | 22 d0 ? | |
59 | 23 d0 ? | |
60 | 24 d0 ? | |
61 | 25 40 ? chip initialization | |
62 | 26 08 ? | |
63 | 27 29 ? | |
64 | 28 55 ? | |
65 | 29 39 ? | |
66 | 2a 13 ? | |
67 | 2b 01 ? | |
68 | 2c ea ? | |
69 | 2d 00 ? | |
70 | 2e 00 ? not used? | |
71 | 2f 00 ? not used? | |
72 | */ | |
73 | ||
a3f90c75 MCC |
74 | #define QT1010_STEP (125 * kHz) /* |
75 | * used by Windows drivers, | |
76 | * hw could be more precise but we don't | |
77 | * know how to use | |
78 | */ | |
79 | #define QT1010_MIN_FREQ (48 * MHz) | |
80 | #define QT1010_MAX_FREQ (860 * MHz) | |
81 | #define QT1010_OFFSET (1246 * MHz) | |
cbdc80ed AP |
82 | |
83 | #define QT1010_WR 0 | |
84 | #define QT1010_RD 1 | |
85 | #define QT1010_M1 3 | |
86 | ||
87 | typedef struct { | |
88 | u8 oper, reg, val; | |
89 | } qt1010_i2c_oper_t; | |
90 | ||
91 | struct qt1010_priv { | |
92 | struct qt1010_config *cfg; | |
93 | struct i2c_adapter *i2c; | |
94 | ||
95 | u8 reg1f_init_val; | |
96 | u8 reg20_init_val; | |
97 | u8 reg25_init_val; | |
98 | ||
99 | u32 frequency; | |
cbdc80ed AP |
100 | }; |
101 | ||
102 | #endif |