Merge tag 'csky-for-linus-4.20-fixup-dtb' of https://github.com/c-sky/csky-linux
[linux-block.git] / drivers / media / tuners / mt20xx.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * i2c tv tuner chip device driver
3 * controls microtune tuners, mt2032 + mt2050 at the moment.
96c0b7cf
MK
4 *
5 * This "mt20xx" module was split apart from the original "tuner" module.
1da177e4
LT
6 */
7#include <linux/delay.h>
8#include <linux/i2c.h>
5a0e3ad6 9#include <linux/slab.h>
7f6adeaf 10#include <linux/videodev2.h>
96c0b7cf
MK
11#include "tuner-i2c.h"
12#include "mt20xx.h"
13
ff699e6b 14static int debug;
96c0b7cf
MK
15module_param(debug, int, 0644);
16MODULE_PARM_DESC(debug, "enable verbose debug messages");
17
1da177e4
LT
18/* ---------------------------------------------------------------------- */
19
20static unsigned int optimize_vco = 1;
21module_param(optimize_vco, int, 0644);
22
23static unsigned int tv_antenna = 1;
24module_param(tv_antenna, int, 0644);
25
ff699e6b 26static unsigned int radio_antenna;
1da177e4
LT
27module_param(radio_antenna, int, 0644);
28
29/* ---------------------------------------------------------------------- */
30
31#define MT2032 0x04
32#define MT2030 0x06
33#define MT2040 0x07
34#define MT2050 0x42
35
36static char *microtune_part[] = {
37 [ MT2030 ] = "MT2030",
38 [ MT2032 ] = "MT2032",
39 [ MT2040 ] = "MT2040",
40 [ MT2050 ] = "MT2050",
41};
42
b2083199 43struct microtune_priv {
db8a6956
MK
44 struct tuner_i2c_props i2c_props;
45
b2083199 46 unsigned int xogc;
96c0b7cf
MK
47 //unsigned int radio_if2;
48
49 u32 frequency;
b2083199
MK
50};
51
f2709c20
MCC
52static void microtune_release(struct dvb_frontend *fe)
53{
54 kfree(fe->tuner_priv);
55 fe->tuner_priv = NULL;
56}
57
96c0b7cf 58static int microtune_get_frequency(struct dvb_frontend *fe, u32 *frequency)
c22bcb07 59{
96c0b7cf
MK
60 struct microtune_priv *priv = fe->tuner_priv;
61 *frequency = priv->frequency;
62 return 0;
c22bcb07
MK
63}
64
1da177e4 65// IsSpurInBand()?
96c0b7cf 66static int mt2032_spurcheck(struct dvb_frontend *fe,
1da177e4
LT
67 int f1, int f2, int spectrum_from,int spectrum_to)
68{
96c0b7cf 69 struct microtune_priv *priv = fe->tuner_priv;
1da177e4
LT
70 int n1=1,n2,f;
71
72 f1=f1/1000; //scale to kHz to avoid 32bit overflows
73 f2=f2/1000;
74 spectrum_from/=1000;
75 spectrum_to/=1000;
76
77 tuner_dbg("spurcheck f1=%d f2=%d from=%d to=%d\n",
78 f1,f2,spectrum_from,spectrum_to);
79
80 do {
81 n2=-n1;
82 f=n1*(f1-f2);
83 do {
84 n2--;
85 f=f-f2;
86 tuner_dbg("spurtest n1=%d n2=%d ftest=%d\n",n1,n2,f);
87
88 if( (f>spectrum_from) && (f<spectrum_to))
89 tuner_dbg("mt2032 spurcheck triggered: %d\n",n1);
90 } while ( (f>(f2-spectrum_to)) || (n2>-5));
91 n1++;
92 } while (n1<5);
93
94 return 1;
95}
96
96c0b7cf 97static int mt2032_compute_freq(struct dvb_frontend *fe,
1da177e4
LT
98 unsigned int rfin,
99 unsigned int if1, unsigned int if2,
100 unsigned int spectrum_from,
101 unsigned int spectrum_to,
102 unsigned char *buf,
103 int *ret_sel,
104 unsigned int xogc) //all in Hz
105{
96c0b7cf 106 struct microtune_priv *priv = fe->tuner_priv;
4ac97914 107 unsigned int fref,lo1,lo1n,lo1a,s,sel,lo1freq, desired_lo1,
1da177e4
LT
108 desired_lo2,lo2,lo2n,lo2a,lo2num,lo2freq;
109
4ac97914 110 fref= 5250 *1000; //5.25MHz
1da177e4
LT
111 desired_lo1=rfin+if1;
112
113 lo1=(2*(desired_lo1/1000)+(fref/1000)) / (2*fref/1000);
4ac97914
MCC
114 lo1n=lo1/8;
115 lo1a=lo1-(lo1n*8);
1da177e4 116
4ac97914 117 s=rfin/1000/1000+1090;
1da177e4
LT
118
119 if(optimize_vco) {
120 if(s>1890) sel=0;
121 else if(s>1720) sel=1;
122 else if(s>1530) sel=2;
123 else if(s>1370) sel=3;
124 else sel=4; // >1090
125 }
126 else {
4ac97914
MCC
127 if(s>1790) sel=0; // <1958
128 else if(s>1617) sel=1;
129 else if(s>1449) sel=2;
130 else if(s>1291) sel=3;
131 else sel=4; // >1090
1da177e4
LT
132 }
133 *ret_sel=sel;
134
4ac97914 135 lo1freq=(lo1a+8*lo1n)*fref;
1da177e4
LT
136
137 tuner_dbg("mt2032: rfin=%d lo1=%d lo1n=%d lo1a=%d sel=%d, lo1freq=%d\n",
138 rfin,lo1,lo1n,lo1a,sel,lo1freq);
139
4ac97914
MCC
140 desired_lo2=lo1freq-rfin-if2;
141 lo2=(desired_lo2)/fref;
142 lo2n=lo2/8;
143 lo2a=lo2-(lo2n*8);
144 lo2num=((desired_lo2/1000)%(fref/1000))* 3780/(fref/1000); //scale to fit in 32bit arith
145 lo2freq=(lo2a+8*lo2n)*fref + lo2num*(fref/1000)/3780*1000;
1da177e4
LT
146
147 tuner_dbg("mt2032: rfin=%d lo2=%d lo2n=%d lo2a=%d num=%d lo2freq=%d\n",
148 rfin,lo2,lo2n,lo2a,lo2num,lo2freq);
149
1ffdddd6 150 if (lo1a > 7 || lo1n < 17 || lo1n > 48 || lo2a > 7 || lo2n < 17 ||
151 lo2n > 30) {
1da177e4
LT
152 tuner_info("mt2032: frequency parameters out of range: %d %d %d %d\n",
153 lo1a, lo1n, lo2a,lo2n);
4ac97914
MCC
154 return(-1);
155 }
1da177e4 156
96c0b7cf 157 mt2032_spurcheck(fe, lo1freq, desired_lo2, spectrum_from, spectrum_to);
1da177e4
LT
158 // should recalculate lo1 (one step up/down)
159
160 // set up MT2032 register map for transfer over i2c
161 buf[0]=lo1n-1;
162 buf[1]=lo1a | (sel<<4);
163 buf[2]=0x86; // LOGC
164 buf[3]=0x0f; //reserved
165 buf[4]=0x1f;
166 buf[5]=(lo2n-1) | (lo2a<<5);
4ac97914
MCC
167 if(rfin >400*1000*1000)
168 buf[6]=0xe4;
169 else
170 buf[6]=0xf4; // set PKEN per rev 1.2
1da177e4
LT
171 buf[7]=8+xogc;
172 buf[8]=0xc3; //reserved
173 buf[9]=0x4e; //reserved
174 buf[10]=0xec; //reserved
175 buf[11]=(lo2num&0xff);
176 buf[12]=(lo2num>>8) |0x80; // Lo2RST
177
178 return 0;
179}
180
96c0b7cf 181static int mt2032_check_lo_lock(struct dvb_frontend *fe)
1da177e4 182{
96c0b7cf 183 struct microtune_priv *priv = fe->tuner_priv;
1da177e4
LT
184 int try,lock=0;
185 unsigned char buf[2];
186
187 for(try=0;try<10;try++) {
188 buf[0]=0x0e;
db8a6956
MK
189 tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
190 tuner_i2c_xfer_recv(&priv->i2c_props,buf,1);
1da177e4
LT
191 tuner_dbg("mt2032 Reg.E=0x%02x\n",buf[0]);
192 lock=buf[0] &0x06;
193
194 if (lock==6)
195 break;
196
197 tuner_dbg("mt2032: pll wait 1ms for lock (0x%2x)\n",buf[0]);
198 udelay(1000);
199 }
4ac97914 200 return lock;
1da177e4
LT
201}
202
96c0b7cf 203static int mt2032_optimize_vco(struct dvb_frontend *fe,int sel,int lock)
1da177e4 204{
96c0b7cf 205 struct microtune_priv *priv = fe->tuner_priv;
1da177e4
LT
206 unsigned char buf[2];
207 int tad1;
208
209 buf[0]=0x0f;
db8a6956
MK
210 tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
211 tuner_i2c_xfer_recv(&priv->i2c_props,buf,1);
1da177e4
LT
212 tuner_dbg("mt2032 Reg.F=0x%02x\n",buf[0]);
213 tad1=buf[0]&0x07;
214
215 if(tad1 ==0) return lock;
216 if(tad1 ==1) return lock;
217
218 if(tad1==2) {
219 if(sel==0)
220 return lock;
221 else sel--;
222 }
223 else {
224 if(sel<4)
225 sel++;
226 else
227 return lock;
228 }
229
230 tuner_dbg("mt2032 optimize_vco: sel=%d\n",sel);
231
232 buf[0]=0x0f;
233 buf[1]=sel;
db8a6956 234 tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
96c0b7cf 235 lock=mt2032_check_lo_lock(fe);
1da177e4
LT
236 return lock;
237}
238
239
96c0b7cf 240static void mt2032_set_if_freq(struct dvb_frontend *fe, unsigned int rfin,
1da177e4
LT
241 unsigned int if1, unsigned int if2,
242 unsigned int from, unsigned int to)
243{
244 unsigned char buf[21];
245 int lint_try,ret,sel,lock=0;
96c0b7cf 246 struct microtune_priv *priv = fe->tuner_priv;
1da177e4
LT
247
248 tuner_dbg("mt2032_set_if_freq rfin=%d if1=%d if2=%d from=%d to=%d\n",
249 rfin,if1,if2,from,to);
250
4ac97914 251 buf[0]=0;
db8a6956
MK
252 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
253 tuner_i2c_xfer_recv(&priv->i2c_props,buf,21);
1da177e4
LT
254
255 buf[0]=0;
96c0b7cf 256 ret=mt2032_compute_freq(fe,rfin,if1,if2,from,to,&buf[1],&sel,priv->xogc);
1da177e4
LT
257 if (ret<0)
258 return;
259
4ac97914
MCC
260 // send only the relevant registers per Rev. 1.2
261 buf[0]=0;
db8a6956 262 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,4);
4ac97914 263 buf[5]=5;
db8a6956 264 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+5,4);
4ac97914 265 buf[11]=11;
db8a6956 266 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+11,3);
4ac97914 267 if(ret!=3)
1da177e4
LT
268 tuner_warn("i2c i/o error: rc == %d (should be 3)\n",ret);
269
270 // wait for PLLs to lock (per manual), retry LINT if not.
271 for(lint_try=0; lint_try<2; lint_try++) {
96c0b7cf 272 lock=mt2032_check_lo_lock(fe);
1da177e4
LT
273
274 if(optimize_vco)
96c0b7cf 275 lock=mt2032_optimize_vco(fe,sel,lock);
1da177e4
LT
276 if(lock==6) break;
277
278 tuner_dbg("mt2032: re-init PLLs by LINT\n");
279 buf[0]=7;
b2083199 280 buf[1]=0x80 +8+priv->xogc; // set LINT to re-init PLLs
db8a6956 281 tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
1da177e4 282 mdelay(10);
b2083199 283 buf[1]=8+priv->xogc;
db8a6956 284 tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
4ac97914 285 }
1da177e4
LT
286
287 if (lock!=6)
288 tuner_warn("MT2032 Fatal Error: PLLs didn't lock.\n");
289
290 buf[0]=2;
291 buf[1]=0x20; // LOGC for optimal phase noise
db8a6956 292 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
1da177e4
LT
293 if (ret!=2)
294 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",ret);
295}
296
297
96c0b7cf
MK
298static int mt2032_set_tv_freq(struct dvb_frontend *fe,
299 struct analog_parameters *params)
1da177e4 300{
1da177e4
LT
301 int if2,from,to;
302
303 // signal bandwidth and picture carrier
96c0b7cf 304 if (params->std & V4L2_STD_525_60) {
1da177e4
LT
305 // NTSC
306 from = 40750*1000;
307 to = 46750*1000;
308 if2 = 45750*1000;
309 } else {
310 // PAL
311 from = 32900*1000;
312 to = 39900*1000;
313 if2 = 38900*1000;
314 }
315
96c0b7cf 316 mt2032_set_if_freq(fe, params->frequency*62500,
1da177e4 317 1090*1000*1000, if2, from, to);
96c0b7cf
MK
318
319 return 0;
1da177e4
LT
320}
321
96c0b7cf
MK
322static int mt2032_set_radio_freq(struct dvb_frontend *fe,
323 struct analog_parameters *params)
1da177e4 324{
96c0b7cf
MK
325 struct microtune_priv *priv = fe->tuner_priv;
326 int if2;
327
328 if (params->std & V4L2_STD_525_60) {
329 tuner_dbg("pinnacle ntsc\n");
330 if2 = 41300 * 1000;
331 } else {
332 tuner_dbg("pinnacle pal\n");
333 if2 = 33300 * 1000;
334 }
1da177e4
LT
335
336 // per Manual for FM tuning: first if center freq. 1085 MHz
96c0b7cf
MK
337 mt2032_set_if_freq(fe, params->frequency * 125 / 2,
338 1085*1000*1000,if2,if2,if2);
339
340 return 0;
1da177e4
LT
341}
342
96c0b7cf
MK
343static int mt2032_set_params(struct dvb_frontend *fe,
344 struct analog_parameters *params)
345{
346 struct microtune_priv *priv = fe->tuner_priv;
347 int ret = -EINVAL;
348
349 switch (params->mode) {
350 case V4L2_TUNER_RADIO:
351 ret = mt2032_set_radio_freq(fe, params);
352 priv->frequency = params->frequency * 125 / 2;
353 break;
354 case V4L2_TUNER_ANALOG_TV:
355 case V4L2_TUNER_DIGITAL_TV:
356 ret = mt2032_set_tv_freq(fe, params);
357 priv->frequency = params->frequency * 62500;
358 break;
359 }
360
361 return ret;
362}
363
96105144 364static const struct dvb_tuner_ops mt2032_tuner_ops = {
96c0b7cf 365 .set_analog_params = mt2032_set_params,
f2709c20 366 .release = microtune_release,
96c0b7cf 367 .get_frequency = microtune_get_frequency,
c22bcb07
MK
368};
369
c84e6036 370// Initialization as described in "MT203x Programming Procedures", Rev 1.2, Feb.2001
96c0b7cf 371static int mt2032_init(struct dvb_frontend *fe)
1da177e4 372{
96c0b7cf 373 struct microtune_priv *priv = fe->tuner_priv;
4ac97914
MCC
374 unsigned char buf[21];
375 int ret,xogc,xok=0;
1da177e4
LT
376
377 // Initialize Registers per spec.
4ac97914
MCC
378 buf[1]=2; // Index to register 2
379 buf[2]=0xff;
380 buf[3]=0x0f;
381 buf[4]=0x1f;
db8a6956 382 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+1,4);
4ac97914
MCC
383
384 buf[5]=6; // Index register 6
385 buf[6]=0xe4;
386 buf[7]=0x8f;
387 buf[8]=0xc3;
388 buf[9]=0x4e;
389 buf[10]=0xec;
db8a6956 390 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+5,6);
4ac97914
MCC
391
392 buf[12]=13; // Index register 13
393 buf[13]=0x32;
db8a6956 394 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+12,2);
4ac97914
MCC
395
396 // Adjust XOGC (register 7), wait for XOK
397 xogc=7;
398 do {
399 tuner_dbg("mt2032: xogc = 0x%02x\n",xogc&0x07);
400 mdelay(10);
401 buf[0]=0x0e;
db8a6956
MK
402 tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
403 tuner_i2c_xfer_recv(&priv->i2c_props,buf,1);
4ac97914
MCC
404 xok=buf[0]&0x01;
405 tuner_dbg("mt2032: xok = 0x%02x\n",xok);
406 if (xok == 1) break;
407
408 xogc--;
1da177e4 409 tuner_dbg("mt2032: xogc = 0x%02x\n",xogc&0x07);
4ac97914
MCC
410 if (xogc == 3) {
411 xogc=4; // min. 4 per spec
412 break;
413 }
414 buf[0]=0x07;
415 buf[1]=0x88 + xogc;
db8a6956 416 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
4ac97914 417 if (ret!=2)
1da177e4 418 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",ret);
4ac97914 419 } while (xok != 1 );
b2083199 420 priv->xogc=xogc;
1da177e4 421
96c0b7cf 422 memcpy(&fe->ops.tuner_ops, &mt2032_tuner_ops, sizeof(struct dvb_tuner_ops));
c22bcb07 423
4ac97914 424 return(1);
1da177e4
LT
425}
426
96c0b7cf 427static void mt2050_set_antenna(struct dvb_frontend *fe, unsigned char antenna)
1da177e4 428{
96c0b7cf 429 struct microtune_priv *priv = fe->tuner_priv;
56584c9e 430 unsigned char buf[2];
1da177e4 431
56584c9e
MK
432 buf[0] = 6;
433 buf[1] = antenna ? 0x11 : 0x10;
f68afe5d 434 tuner_i2c_xfer_send(&priv->i2c_props, buf, 2);
56584c9e 435 tuner_dbg("mt2050: enabled antenna connector %d\n", antenna);
1da177e4
LT
436}
437
96c0b7cf 438static void mt2050_set_if_freq(struct dvb_frontend *fe,unsigned int freq, unsigned int if2)
1da177e4 439{
96c0b7cf 440 struct microtune_priv *priv = fe->tuner_priv;
1da177e4
LT
441 unsigned int if1=1218*1000*1000;
442 unsigned int f_lo1,f_lo2,lo1,lo2,f_lo1_modulo,f_lo2_modulo,num1,num2,div1a,div1b,div2a,div2b;
443 int ret;
444 unsigned char buf[6];
445
446 tuner_dbg("mt2050_set_if_freq freq=%d if1=%d if2=%d\n",
447 freq,if1,if2);
448
449 f_lo1=freq+if1;
450 f_lo1=(f_lo1/1000000)*1000000;
451
452 f_lo2=f_lo1-freq-if2;
453 f_lo2=(f_lo2/50000)*50000;
454
455 lo1=f_lo1/4000000;
456 lo2=f_lo2/4000000;
457
458 f_lo1_modulo= f_lo1-(lo1*4000000);
459 f_lo2_modulo= f_lo2-(lo2*4000000);
460
461 num1=4*f_lo1_modulo/4000000;
462 num2=4096*(f_lo2_modulo/1000)/4000;
463
464 // todo spurchecks
465
466 div1a=(lo1/12)-1;
467 div1b=lo1-(div1a+1)*12;
468
469 div2a=(lo2/8)-1;
470 div2b=lo2-(div2a+1)*8;
471
96c0b7cf 472 if (debug > 1) {
1da177e4
LT
473 tuner_dbg("lo1 lo2 = %d %d\n", lo1, lo2);
474 tuner_dbg("num1 num2 div1a div1b div2a div2b= %x %x %x %x %x %x\n",
475 num1,num2,div1a,div1b,div2a,div2b);
476 }
477
478 buf[0]=1;
479 buf[1]= 4*div1b + num1;
480 if(freq<275*1000*1000) buf[1] = buf[1]|0x80;
481
482 buf[2]=div1a;
483 buf[3]=32*div2b + num2/256;
484 buf[4]=num2-(num2/256)*256;
485 buf[5]=div2a;
486 if(num2!=0) buf[5]=buf[5]|0x40;
487
c5bac2e7
MCC
488 if (debug > 1)
489 tuner_dbg("bufs is: %*ph\n", 6, buf);
1da177e4 490
db8a6956 491 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,6);
4ac97914 492 if (ret!=6)
1da177e4
LT
493 tuner_warn("i2c i/o error: rc == %d (should be 6)\n",ret);
494}
495
96c0b7cf
MK
496static int mt2050_set_tv_freq(struct dvb_frontend *fe,
497 struct analog_parameters *params)
1da177e4 498{
1da177e4
LT
499 unsigned int if2;
500
96c0b7cf 501 if (params->std & V4L2_STD_525_60) {
1da177e4 502 // NTSC
4ac97914
MCC
503 if2 = 45750*1000;
504 } else {
505 // PAL
506 if2 = 38900*1000;
507 }
96c0b7cf 508 if (V4L2_TUNER_DIGITAL_TV == params->mode) {
1da177e4
LT
509 // DVB (pinnacle 300i)
510 if2 = 36150*1000;
511 }
96c0b7cf
MK
512 mt2050_set_if_freq(fe, params->frequency*62500, if2);
513 mt2050_set_antenna(fe, tv_antenna);
514
515 return 0;
516}
517
518static int mt2050_set_radio_freq(struct dvb_frontend *fe,
519 struct analog_parameters *params)
520{
521 struct microtune_priv *priv = fe->tuner_priv;
522 int if2;
523
524 if (params->std & V4L2_STD_525_60) {
525 tuner_dbg("pinnacle ntsc\n");
526 if2 = 41300 * 1000;
527 } else {
528 tuner_dbg("pinnacle pal\n");
529 if2 = 33300 * 1000;
530 }
531
532 mt2050_set_if_freq(fe, params->frequency * 125 / 2, if2);
533 mt2050_set_antenna(fe, radio_antenna);
534
535 return 0;
1da177e4
LT
536}
537
96c0b7cf
MK
538static int mt2050_set_params(struct dvb_frontend *fe,
539 struct analog_parameters *params)
1da177e4 540{
96c0b7cf
MK
541 struct microtune_priv *priv = fe->tuner_priv;
542 int ret = -EINVAL;
1da177e4 543
96c0b7cf
MK
544 switch (params->mode) {
545 case V4L2_TUNER_RADIO:
546 ret = mt2050_set_radio_freq(fe, params);
547 priv->frequency = params->frequency * 125 / 2;
548 break;
549 case V4L2_TUNER_ANALOG_TV:
550 case V4L2_TUNER_DIGITAL_TV:
551 ret = mt2050_set_tv_freq(fe, params);
552 priv->frequency = params->frequency * 62500;
553 break;
554 }
555
556 return ret;
1da177e4
LT
557}
558
96105144 559static const struct dvb_tuner_ops mt2050_tuner_ops = {
96c0b7cf 560 .set_analog_params = mt2050_set_params,
f2709c20 561 .release = microtune_release,
96c0b7cf 562 .get_frequency = microtune_get_frequency,
c22bcb07
MK
563};
564
96c0b7cf 565static int mt2050_init(struct dvb_frontend *fe)
1da177e4 566{
96c0b7cf 567 struct microtune_priv *priv = fe->tuner_priv;
1da177e4 568 unsigned char buf[2];
1da177e4 569
f68afe5d
HV
570 buf[0] = 6;
571 buf[1] = 0x10;
572 tuner_i2c_xfer_send(&priv->i2c_props, buf, 2); /* power */
1da177e4 573
f68afe5d
HV
574 buf[0] = 0x0f;
575 buf[1] = 0x0f;
576 tuner_i2c_xfer_send(&priv->i2c_props, buf, 2); /* m1lo */
1da177e4 577
f68afe5d
HV
578 buf[0] = 0x0d;
579 tuner_i2c_xfer_send(&priv->i2c_props, buf, 1);
580 tuner_i2c_xfer_recv(&priv->i2c_props, buf, 1);
1da177e4 581
f68afe5d 582 tuner_dbg("mt2050: sro is %x\n", buf[0]);
1da177e4 583
96c0b7cf 584 memcpy(&fe->ops.tuner_ops, &mt2050_tuner_ops, sizeof(struct dvb_tuner_ops));
024cf530 585
c22bcb07 586 return 0;
024cf530
MK
587}
588
96c0b7cf
MK
589struct dvb_frontend *microtune_attach(struct dvb_frontend *fe,
590 struct i2c_adapter* i2c_adap,
591 u8 i2c_addr)
1da177e4 592{
b2083199 593 struct microtune_priv *priv = NULL;
1da177e4 594 char *name;
4ac97914 595 unsigned char buf[21];
1da177e4
LT
596 int company_code;
597
b2083199
MK
598 priv = kzalloc(sizeof(struct microtune_priv), GFP_KERNEL);
599 if (priv == NULL)
96c0b7cf
MK
600 return NULL;
601 fe->tuner_priv = priv;
b2083199 602
96c0b7cf
MK
603 priv->i2c_props.addr = i2c_addr;
604 priv->i2c_props.adap = i2c_adap;
2756665c 605 priv->i2c_props.name = "mt20xx";
db8a6956 606
96c0b7cf 607 //priv->radio_if2 = 10700 * 1000; /* 10.7MHz - FM radio */
b2083199 608
1da177e4 609 memset(buf,0,sizeof(buf));
c22bcb07 610
1da177e4
LT
611 name = "unknown";
612
db8a6956
MK
613 tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
614 tuner_i2c_xfer_recv(&priv->i2c_props,buf,21);
c5bac2e7
MCC
615 if (debug)
616 tuner_dbg("MT20xx hexdump: %*ph\n", 21, buf);
617
1da177e4
LT
618 company_code = buf[0x11] << 8 | buf[0x12];
619 tuner_info("microtune: companycode=%04x part=%02x rev=%02x\n",
620 company_code,buf[0x13],buf[0x14]);
621
1da177e4
LT
622
623 if (buf[0x13] < ARRAY_SIZE(microtune_part) &&
624 NULL != microtune_part[buf[0x13]])
625 name = microtune_part[buf[0x13]];
626 switch (buf[0x13]) {
627 case MT2032:
96c0b7cf 628 mt2032_init(fe);
1da177e4
LT
629 break;
630 case MT2050:
96c0b7cf 631 mt2050_init(fe);
1da177e4
LT
632 break;
633 default:
634 tuner_info("microtune %s found, not (yet?) supported, sorry :-/\n",
635 name);
5fa1247a 636 return NULL;
4ac97914 637 }
1da177e4 638
c0decac1 639 strscpy(fe->ops.tuner_ops.info.name, name,
96c0b7cf 640 sizeof(fe->ops.tuner_ops.info.name));
1da177e4 641 tuner_info("microtune %s found, OK\n",name);
96c0b7cf 642 return fe;
1da177e4
LT
643}
644
96c0b7cf
MK
645EXPORT_SYMBOL_GPL(microtune_attach);
646
647MODULE_DESCRIPTION("Microtune tuner driver");
648MODULE_AUTHOR("Ralph Metzler, Gerd Knorr, Gunther Mayer");
649MODULE_LICENSE("GPL");