Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
93203dd6 AP |
2 | /* |
3 | * Mirics MSi001 silicon tuner driver | |
4 | * | |
5 | * Copyright (C) 2013 Antti Palosaari <crope@iki.fi> | |
6 | * Copyright (C) 2014 Antti Palosaari <crope@iki.fi> | |
93203dd6 AP |
7 | */ |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/gcd.h> | |
11 | #include <media/v4l2-device.h> | |
12 | #include <media/v4l2-ctrls.h> | |
13 | ||
14 | static const struct v4l2_frequency_band bands[] = { | |
15 | { | |
16 | .type = V4L2_TUNER_RF, | |
17 | .index = 0, | |
18 | .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS, | |
19 | .rangelow = 49000000, | |
20 | .rangehigh = 263000000, | |
21 | }, { | |
22 | .type = V4L2_TUNER_RF, | |
23 | .index = 1, | |
24 | .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS, | |
25 | .rangelow = 390000000, | |
26 | .rangehigh = 960000000, | |
27 | }, | |
28 | }; | |
29 | ||
83e64b4d | 30 | struct msi001_dev { |
93203dd6 AP |
31 | struct spi_device *spi; |
32 | struct v4l2_subdev sd; | |
33 | ||
34 | /* Controls */ | |
35 | struct v4l2_ctrl_handler hdl; | |
36 | struct v4l2_ctrl *bandwidth_auto; | |
37 | struct v4l2_ctrl *bandwidth; | |
38 | struct v4l2_ctrl *lna_gain; | |
39 | struct v4l2_ctrl *mixer_gain; | |
40 | struct v4l2_ctrl *if_gain; | |
41 | ||
42 | unsigned int f_tuner; | |
43 | }; | |
44 | ||
83e64b4d | 45 | static inline struct msi001_dev *sd_to_msi001_dev(struct v4l2_subdev *sd) |
93203dd6 | 46 | { |
83e64b4d | 47 | return container_of(sd, struct msi001_dev, sd); |
93203dd6 AP |
48 | } |
49 | ||
83e64b4d | 50 | static int msi001_wreg(struct msi001_dev *dev, u32 data) |
93203dd6 AP |
51 | { |
52 | /* Register format: 4 bits addr + 20 bits value */ | |
83e64b4d | 53 | return spi_write(dev->spi, &data, 3); |
93203dd6 AP |
54 | }; |
55 | ||
83e64b4d AP |
56 | static int msi001_set_gain(struct msi001_dev *dev, int lna_gain, int mixer_gain, |
57 | int if_gain) | |
93203dd6 | 58 | { |
83e64b4d | 59 | struct spi_device *spi = dev->spi; |
93203dd6 AP |
60 | int ret; |
61 | u32 reg; | |
5fa51cc3 | 62 | |
83e64b4d AP |
63 | dev_dbg(&spi->dev, "lna=%d mixer=%d if=%d\n", |
64 | lna_gain, mixer_gain, if_gain); | |
93203dd6 AP |
65 | |
66 | reg = 1 << 0; | |
67 | reg |= (59 - if_gain) << 4; | |
68 | reg |= 0 << 10; | |
69 | reg |= (1 - mixer_gain) << 12; | |
70 | reg |= (1 - lna_gain) << 13; | |
71 | reg |= 4 << 14; | |
72 | reg |= 0 << 17; | |
83e64b4d | 73 | ret = msi001_wreg(dev, reg); |
93203dd6 AP |
74 | if (ret) |
75 | goto err; | |
76 | ||
77 | return 0; | |
78 | err: | |
83e64b4d | 79 | dev_dbg(&spi->dev, "failed %d\n", ret); |
93203dd6 AP |
80 | return ret; |
81 | }; | |
82 | ||
83e64b4d | 83 | static int msi001_set_tuner(struct msi001_dev *dev) |
93203dd6 | 84 | { |
83e64b4d | 85 | struct spi_device *spi = dev->spi; |
93203dd6 | 86 | int ret, i; |
9195e5b2 | 87 | unsigned int uitmp, div_n, k, k_thresh, k_frac, div_lo, f_if1; |
93203dd6 | 88 | u32 reg; |
9195e5b2 AP |
89 | u64 f_vco; |
90 | u8 mode, filter_mode; | |
5fa51cc3 | 91 | |
93203dd6 AP |
92 | static const struct { |
93 | u32 rf; | |
94 | u8 mode; | |
9195e5b2 | 95 | u8 div_lo; |
93203dd6 AP |
96 | } band_lut[] = { |
97 | { 50000000, 0xe1, 16}, /* AM_MODE2, antenna 2 */ | |
98 | {108000000, 0x42, 32}, /* VHF_MODE */ | |
99 | {330000000, 0x44, 16}, /* B3_MODE */ | |
100 | {960000000, 0x48, 4}, /* B45_MODE */ | |
101 | { ~0U, 0x50, 2}, /* BL_MODE */ | |
102 | }; | |
103 | static const struct { | |
104 | u32 freq; | |
105 | u8 filter_mode; | |
106 | } if_freq_lut[] = { | |
107 | { 0, 0x03}, /* Zero IF */ | |
108 | { 450000, 0x02}, /* 450 kHz IF */ | |
109 | {1620000, 0x01}, /* 1.62 MHz IF */ | |
110 | {2048000, 0x00}, /* 2.048 MHz IF */ | |
111 | }; | |
112 | static const struct { | |
113 | u32 freq; | |
114 | u8 val; | |
115 | } bandwidth_lut[] = { | |
116 | { 200000, 0x00}, /* 200 kHz */ | |
117 | { 300000, 0x01}, /* 300 kHz */ | |
118 | { 600000, 0x02}, /* 600 kHz */ | |
119 | {1536000, 0x03}, /* 1.536 MHz */ | |
120 | {5000000, 0x04}, /* 5 MHz */ | |
121 | {6000000, 0x05}, /* 6 MHz */ | |
122 | {7000000, 0x06}, /* 7 MHz */ | |
123 | {8000000, 0x07}, /* 8 MHz */ | |
124 | }; | |
125 | ||
83e64b4d | 126 | unsigned int f_rf = dev->f_tuner; |
93203dd6 AP |
127 | |
128 | /* | |
129 | * bandwidth (Hz) | |
130 | * 200000, 300000, 600000, 1536000, 5000000, 6000000, 7000000, 8000000 | |
131 | */ | |
132 | unsigned int bandwidth; | |
133 | ||
134 | /* | |
135 | * intermediate frequency (Hz) | |
136 | * 0, 450000, 1620000, 2048000 | |
137 | */ | |
138 | unsigned int f_if = 0; | |
139 | #define F_REF 24000000 | |
9195e5b2 AP |
140 | #define DIV_PRE_N 4 |
141 | #define F_VCO_STEP div_lo | |
93203dd6 | 142 | |
83e64b4d | 143 | dev_dbg(&spi->dev, "f_rf=%d f_if=%d\n", f_rf, f_if); |
93203dd6 AP |
144 | |
145 | for (i = 0; i < ARRAY_SIZE(band_lut); i++) { | |
146 | if (f_rf <= band_lut[i].rf) { | |
147 | mode = band_lut[i].mode; | |
9195e5b2 | 148 | div_lo = band_lut[i].div_lo; |
93203dd6 AP |
149 | break; |
150 | } | |
151 | } | |
93203dd6 AP |
152 | if (i == ARRAY_SIZE(band_lut)) { |
153 | ret = -EINVAL; | |
154 | goto err; | |
155 | } | |
156 | ||
157 | /* AM_MODE is upconverted */ | |
158 | if ((mode >> 0) & 0x1) | |
159 | f_if1 = 5 * F_REF; | |
160 | else | |
161 | f_if1 = 0; | |
162 | ||
163 | for (i = 0; i < ARRAY_SIZE(if_freq_lut); i++) { | |
164 | if (f_if == if_freq_lut[i].freq) { | |
165 | filter_mode = if_freq_lut[i].filter_mode; | |
166 | break; | |
167 | } | |
168 | } | |
93203dd6 AP |
169 | if (i == ARRAY_SIZE(if_freq_lut)) { |
170 | ret = -EINVAL; | |
171 | goto err; | |
172 | } | |
173 | ||
174 | /* filters */ | |
83e64b4d | 175 | bandwidth = dev->bandwidth->val; |
93203dd6 AP |
176 | bandwidth = clamp(bandwidth, 200000U, 8000000U); |
177 | ||
178 | for (i = 0; i < ARRAY_SIZE(bandwidth_lut); i++) { | |
179 | if (bandwidth <= bandwidth_lut[i].freq) { | |
180 | bandwidth = bandwidth_lut[i].val; | |
181 | break; | |
182 | } | |
183 | } | |
93203dd6 AP |
184 | if (i == ARRAY_SIZE(bandwidth_lut)) { |
185 | ret = -EINVAL; | |
186 | goto err; | |
187 | } | |
188 | ||
83e64b4d | 189 | dev->bandwidth->val = bandwidth_lut[i].freq; |
93203dd6 | 190 | |
83e64b4d | 191 | dev_dbg(&spi->dev, "bandwidth selected=%d\n", bandwidth_lut[i].freq); |
93203dd6 | 192 | |
9195e5b2 AP |
193 | /* |
194 | * Fractional-N synthesizer | |
195 | * | |
196 | * +---------------------------------------+ | |
197 | * v | | |
198 | * Fref +----+ +-------+ +----+ +------+ +---+ | |
199 | * ------> | PD | --> | VCO | ------> | /4 | --> | /N.F | <-- | K | | |
200 | * +----+ +-------+ +----+ +------+ +---+ | |
201 | * | | |
202 | * | | |
203 | * v | |
204 | * +-------+ Fout | |
205 | * | /Rout | ------> | |
206 | * +-------+ | |
207 | */ | |
93203dd6 | 208 | |
9195e5b2 AP |
209 | /* Calculate PLL integer and fractional control word. */ |
210 | f_vco = (u64) (f_rf + f_if + f_if1) * div_lo; | |
211 | div_n = div_u64_rem(f_vco, DIV_PRE_N * F_REF, &k); | |
212 | k_thresh = (DIV_PRE_N * F_REF) / F_VCO_STEP; | |
213 | k_frac = div_u64((u64) k * k_thresh, (DIV_PRE_N * F_REF)); | |
93203dd6 AP |
214 | |
215 | /* Find out greatest common divisor and divide to smaller. */ | |
9195e5b2 AP |
216 | uitmp = gcd(k_thresh, k_frac); |
217 | k_thresh /= uitmp; | |
218 | k_frac /= uitmp; | |
93203dd6 AP |
219 | |
220 | /* Force divide to reg max. Resolution will be reduced. */ | |
9195e5b2 AP |
221 | uitmp = DIV_ROUND_UP(k_thresh, 4095); |
222 | k_thresh = DIV_ROUND_CLOSEST(k_thresh, uitmp); | |
223 | k_frac = DIV_ROUND_CLOSEST(k_frac, uitmp); | |
93203dd6 | 224 | |
9195e5b2 AP |
225 | /* Calculate real RF set. */ |
226 | uitmp = (unsigned int) F_REF * DIV_PRE_N * div_n; | |
227 | uitmp += (unsigned int) F_REF * DIV_PRE_N * k_frac / k_thresh; | |
228 | uitmp /= div_lo; | |
93203dd6 | 229 | |
83e64b4d | 230 | dev_dbg(&spi->dev, |
9195e5b2 AP |
231 | "f_rf=%u:%u f_vco=%llu div_n=%u k_thresh=%u k_frac=%u div_lo=%u\n", |
232 | f_rf, uitmp, f_vco, div_n, k_thresh, k_frac, div_lo); | |
93203dd6 | 233 | |
83e64b4d | 234 | ret = msi001_wreg(dev, 0x00000e); |
93203dd6 AP |
235 | if (ret) |
236 | goto err; | |
237 | ||
83e64b4d | 238 | ret = msi001_wreg(dev, 0x000003); |
93203dd6 AP |
239 | if (ret) |
240 | goto err; | |
241 | ||
242 | reg = 0 << 0; | |
243 | reg |= mode << 4; | |
244 | reg |= filter_mode << 12; | |
245 | reg |= bandwidth << 14; | |
246 | reg |= 0x02 << 17; | |
247 | reg |= 0x00 << 20; | |
83e64b4d | 248 | ret = msi001_wreg(dev, reg); |
93203dd6 AP |
249 | if (ret) |
250 | goto err; | |
251 | ||
252 | reg = 5 << 0; | |
9195e5b2 | 253 | reg |= k_thresh << 4; |
93203dd6 AP |
254 | reg |= 1 << 19; |
255 | reg |= 1 << 21; | |
83e64b4d | 256 | ret = msi001_wreg(dev, reg); |
93203dd6 AP |
257 | if (ret) |
258 | goto err; | |
259 | ||
260 | reg = 2 << 0; | |
9195e5b2 AP |
261 | reg |= k_frac << 4; |
262 | reg |= div_n << 16; | |
83e64b4d | 263 | ret = msi001_wreg(dev, reg); |
93203dd6 AP |
264 | if (ret) |
265 | goto err; | |
266 | ||
83e64b4d AP |
267 | ret = msi001_set_gain(dev, dev->lna_gain->cur.val, |
268 | dev->mixer_gain->cur.val, dev->if_gain->cur.val); | |
93203dd6 AP |
269 | if (ret) |
270 | goto err; | |
271 | ||
272 | reg = 6 << 0; | |
273 | reg |= 63 << 4; | |
274 | reg |= 4095 << 10; | |
83e64b4d | 275 | ret = msi001_wreg(dev, reg); |
93203dd6 AP |
276 | if (ret) |
277 | goto err; | |
278 | ||
279 | return 0; | |
280 | err: | |
83e64b4d | 281 | dev_dbg(&spi->dev, "failed %d\n", ret); |
93203dd6 | 282 | return ret; |
9195e5b2 | 283 | } |
93203dd6 | 284 | |
3aab15af | 285 | static int msi001_standby(struct v4l2_subdev *sd) |
93203dd6 | 286 | { |
83e64b4d | 287 | struct msi001_dev *dev = sd_to_msi001_dev(sd); |
93203dd6 | 288 | |
3aab15af | 289 | return msi001_wreg(dev, 0x000000); |
93203dd6 AP |
290 | } |
291 | ||
93203dd6 AP |
292 | static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v) |
293 | { | |
83e64b4d AP |
294 | struct msi001_dev *dev = sd_to_msi001_dev(sd); |
295 | struct spi_device *spi = dev->spi; | |
5fa51cc3 | 296 | |
83e64b4d | 297 | dev_dbg(&spi->dev, "index=%d\n", v->index); |
93203dd6 | 298 | |
c0decac1 | 299 | strscpy(v->name, "Mirics MSi001", sizeof(v->name)); |
93203dd6 AP |
300 | v->type = V4L2_TUNER_RF; |
301 | v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; | |
302 | v->rangelow = 49000000; | |
303 | v->rangehigh = 960000000; | |
304 | ||
305 | return 0; | |
306 | } | |
307 | ||
308 | static int msi001_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v) | |
309 | { | |
83e64b4d AP |
310 | struct msi001_dev *dev = sd_to_msi001_dev(sd); |
311 | struct spi_device *spi = dev->spi; | |
5fa51cc3 | 312 | |
83e64b4d | 313 | dev_dbg(&spi->dev, "index=%d\n", v->index); |
93203dd6 AP |
314 | return 0; |
315 | } | |
316 | ||
317 | static int msi001_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f) | |
318 | { | |
83e64b4d AP |
319 | struct msi001_dev *dev = sd_to_msi001_dev(sd); |
320 | struct spi_device *spi = dev->spi; | |
5fa51cc3 | 321 | |
83e64b4d AP |
322 | dev_dbg(&spi->dev, "tuner=%d\n", f->tuner); |
323 | f->frequency = dev->f_tuner; | |
93203dd6 AP |
324 | return 0; |
325 | } | |
326 | ||
327 | static int msi001_s_frequency(struct v4l2_subdev *sd, | |
83e64b4d | 328 | const struct v4l2_frequency *f) |
93203dd6 | 329 | { |
83e64b4d AP |
330 | struct msi001_dev *dev = sd_to_msi001_dev(sd); |
331 | struct spi_device *spi = dev->spi; | |
93203dd6 | 332 | unsigned int band; |
5fa51cc3 | 333 | |
83e64b4d AP |
334 | dev_dbg(&spi->dev, "tuner=%d type=%d frequency=%u\n", |
335 | f->tuner, f->type, f->frequency); | |
93203dd6 AP |
336 | |
337 | if (f->frequency < ((bands[0].rangehigh + bands[1].rangelow) / 2)) | |
338 | band = 0; | |
339 | else | |
340 | band = 1; | |
83e64b4d AP |
341 | dev->f_tuner = clamp_t(unsigned int, f->frequency, |
342 | bands[band].rangelow, bands[band].rangehigh); | |
93203dd6 | 343 | |
83e64b4d | 344 | return msi001_set_tuner(dev); |
93203dd6 AP |
345 | } |
346 | ||
347 | static int msi001_enum_freq_bands(struct v4l2_subdev *sd, | |
83e64b4d | 348 | struct v4l2_frequency_band *band) |
93203dd6 | 349 | { |
83e64b4d AP |
350 | struct msi001_dev *dev = sd_to_msi001_dev(sd); |
351 | struct spi_device *spi = dev->spi; | |
5fa51cc3 | 352 | |
83e64b4d AP |
353 | dev_dbg(&spi->dev, "tuner=%d type=%d index=%d\n", |
354 | band->tuner, band->type, band->index); | |
93203dd6 AP |
355 | |
356 | if (band->index >= ARRAY_SIZE(bands)) | |
357 | return -EINVAL; | |
358 | ||
359 | band->capability = bands[band->index].capability; | |
360 | band->rangelow = bands[band->index].rangelow; | |
361 | band->rangehigh = bands[band->index].rangehigh; | |
362 | ||
363 | return 0; | |
364 | } | |
365 | ||
366 | static const struct v4l2_subdev_tuner_ops msi001_tuner_ops = { | |
3aab15af | 367 | .standby = msi001_standby, |
93203dd6 AP |
368 | .g_tuner = msi001_g_tuner, |
369 | .s_tuner = msi001_s_tuner, | |
370 | .g_frequency = msi001_g_frequency, | |
371 | .s_frequency = msi001_s_frequency, | |
372 | .enum_freq_bands = msi001_enum_freq_bands, | |
373 | }; | |
374 | ||
375 | static const struct v4l2_subdev_ops msi001_ops = { | |
93203dd6 AP |
376 | .tuner = &msi001_tuner_ops, |
377 | }; | |
378 | ||
379 | static int msi001_s_ctrl(struct v4l2_ctrl *ctrl) | |
380 | { | |
83e64b4d AP |
381 | struct msi001_dev *dev = container_of(ctrl->handler, struct msi001_dev, hdl); |
382 | struct spi_device *spi = dev->spi; | |
93203dd6 AP |
383 | |
384 | int ret; | |
5fa51cc3 | 385 | |
83e64b4d AP |
386 | dev_dbg(&spi->dev, "id=%d name=%s val=%d min=%lld max=%lld step=%lld\n", |
387 | ctrl->id, ctrl->name, ctrl->val, ctrl->minimum, ctrl->maximum, | |
388 | ctrl->step); | |
93203dd6 AP |
389 | |
390 | switch (ctrl->id) { | |
391 | case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO: | |
392 | case V4L2_CID_RF_TUNER_BANDWIDTH: | |
83e64b4d | 393 | ret = msi001_set_tuner(dev); |
93203dd6 AP |
394 | break; |
395 | case V4L2_CID_RF_TUNER_LNA_GAIN: | |
83e64b4d AP |
396 | ret = msi001_set_gain(dev, dev->lna_gain->val, |
397 | dev->mixer_gain->cur.val, | |
398 | dev->if_gain->cur.val); | |
93203dd6 AP |
399 | break; |
400 | case V4L2_CID_RF_TUNER_MIXER_GAIN: | |
83e64b4d AP |
401 | ret = msi001_set_gain(dev, dev->lna_gain->cur.val, |
402 | dev->mixer_gain->val, | |
403 | dev->if_gain->cur.val); | |
93203dd6 AP |
404 | break; |
405 | case V4L2_CID_RF_TUNER_IF_GAIN: | |
83e64b4d AP |
406 | ret = msi001_set_gain(dev, dev->lna_gain->cur.val, |
407 | dev->mixer_gain->cur.val, | |
408 | dev->if_gain->val); | |
93203dd6 AP |
409 | break; |
410 | default: | |
83e64b4d | 411 | dev_dbg(&spi->dev, "unknown control %d\n", ctrl->id); |
93203dd6 AP |
412 | ret = -EINVAL; |
413 | } | |
414 | ||
415 | return ret; | |
416 | } | |
417 | ||
418 | static const struct v4l2_ctrl_ops msi001_ctrl_ops = { | |
419 | .s_ctrl = msi001_s_ctrl, | |
420 | }; | |
421 | ||
422 | static int msi001_probe(struct spi_device *spi) | |
423 | { | |
83e64b4d | 424 | struct msi001_dev *dev; |
93203dd6 | 425 | int ret; |
5fa51cc3 AP |
426 | |
427 | dev_dbg(&spi->dev, "\n"); | |
93203dd6 | 428 | |
83e64b4d AP |
429 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); |
430 | if (!dev) { | |
93203dd6 | 431 | ret = -ENOMEM; |
83e64b4d | 432 | goto err; |
93203dd6 AP |
433 | } |
434 | ||
83e64b4d AP |
435 | dev->spi = spi; |
436 | dev->f_tuner = bands[0].rangelow; | |
437 | v4l2_spi_subdev_init(&dev->sd, spi, &msi001_ops); | |
93203dd6 AP |
438 | |
439 | /* Register controls */ | |
83e64b4d AP |
440 | v4l2_ctrl_handler_init(&dev->hdl, 5); |
441 | dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, | |
93203dd6 | 442 | V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1); |
83e64b4d | 443 | dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, |
93203dd6 | 444 | V4L2_CID_RF_TUNER_BANDWIDTH, 200000, 8000000, 1, 200000); |
3d5831a4 WH |
445 | if (dev->hdl.error) { |
446 | ret = dev->hdl.error; | |
447 | dev_err(&spi->dev, "Could not initialize controls\n"); | |
448 | /* control init failed, free handler */ | |
449 | goto err_ctrl_handler_free; | |
450 | } | |
451 | ||
83e64b4d AP |
452 | v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false); |
453 | dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, | |
93203dd6 | 454 | V4L2_CID_RF_TUNER_LNA_GAIN, 0, 1, 1, 1); |
83e64b4d | 455 | dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, |
93203dd6 | 456 | V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1); |
83e64b4d | 457 | dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, |
93203dd6 | 458 | V4L2_CID_RF_TUNER_IF_GAIN, 0, 59, 1, 0); |
83e64b4d AP |
459 | if (dev->hdl.error) { |
460 | ret = dev->hdl.error; | |
461 | dev_err(&spi->dev, "Could not initialize controls\n"); | |
93203dd6 AP |
462 | /* control init failed, free handler */ |
463 | goto err_ctrl_handler_free; | |
464 | } | |
465 | ||
83e64b4d | 466 | dev->sd.ctrl_handler = &dev->hdl; |
93203dd6 | 467 | return 0; |
93203dd6 | 468 | err_ctrl_handler_free: |
83e64b4d AP |
469 | v4l2_ctrl_handler_free(&dev->hdl); |
470 | kfree(dev); | |
471 | err: | |
93203dd6 AP |
472 | return ret; |
473 | } | |
474 | ||
a0386bba | 475 | static void msi001_remove(struct spi_device *spi) |
93203dd6 AP |
476 | { |
477 | struct v4l2_subdev *sd = spi_get_drvdata(spi); | |
83e64b4d | 478 | struct msi001_dev *dev = sd_to_msi001_dev(sd); |
5fa51cc3 AP |
479 | |
480 | dev_dbg(&spi->dev, "\n"); | |
93203dd6 AP |
481 | |
482 | /* | |
483 | * Registered by v4l2_spi_new_subdev() from master driver, but we must | |
484 | * unregister it from here. Weird. | |
485 | */ | |
83e64b4d AP |
486 | v4l2_device_unregister_subdev(&dev->sd); |
487 | v4l2_ctrl_handler_free(&dev->hdl); | |
488 | kfree(dev); | |
93203dd6 AP |
489 | } |
490 | ||
83e64b4d | 491 | static const struct spi_device_id msi001_id_table[] = { |
93203dd6 AP |
492 | {"msi001", 0}, |
493 | {} | |
494 | }; | |
83e64b4d | 495 | MODULE_DEVICE_TABLE(spi, msi001_id_table); |
93203dd6 AP |
496 | |
497 | static struct spi_driver msi001_driver = { | |
498 | .driver = { | |
499 | .name = "msi001", | |
83e64b4d | 500 | .suppress_bind_attrs = true, |
93203dd6 AP |
501 | }, |
502 | .probe = msi001_probe, | |
503 | .remove = msi001_remove, | |
83e64b4d | 504 | .id_table = msi001_id_table, |
93203dd6 AP |
505 | }; |
506 | module_spi_driver(msi001_driver); | |
507 | ||
508 | MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); | |
509 | MODULE_DESCRIPTION("Mirics MSi001"); | |
510 | MODULE_LICENSE("GPL"); |