projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'sched/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
[linux-2.6-block.git] / drivers / media / tuners / fc2580.c
CommitLineData
d9cb41af
AP		 1/*
2 * FCI FC2580 silicon tuner driver
3 *
4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include "fc2580_priv.h"
22
23/*
24 * TODO:
25 * I2C write and read works only for one single register. Multiple registers
26 * could not be accessed using normal register address auto-increment.
27 * There could be (very likely) register to change that behavior....
d9cb41af
AP		 28 */
29
f2ea86de
AP		 30/* write single register conditionally only when value differs from 0xff
31 * XXX: This is special routine meant only for writing fc2580_freq_regs_lut[]
32 * values. Do not use for the other purposes. */
154cdfb0 33static int fc2580_wr_reg_ff(struct fc2580_dev *dev, u8 reg, u8 val)
f2ea86de
AP		 34{
35 if (val == 0xff)
36 return 0;
37 else
35fe4c65 38 return regmap_write(dev->regmap, reg, val);
f2ea86de
AP		 39}
40
252fad1c 41static int fc2580_set_params(struct fc2580_dev *dev)
d9cb41af 42{
154cdfb0 43 struct i2c_client *client = dev->client;
46de7615
AP		 44 int ret, i;
45 unsigned int uitmp, div_ref, div_ref_val, div_n, k, k_cw, div_out;
d9cb41af 46 u64 f_vco;
8b302d43 47 u8 synth_config;
46de7615 48 unsigned long timeout;
d9cb41af 49
252fad1c
AP		 50 if (!dev->active) {
51 dev_dbg(&client->dev, "tuner is sleeping\n");
52 return 0;
53 }
d9cb41af 54
46de7615
AP		 55 /*
56 * Fractional-N synthesizer
57 *
58 * +---------------------------------------+
59 * v |
60 * Fref +----+ +----+ +-------+ +----+ +------+ +---+
61 * ------> | /R | --> | PD | --> | VCO | ------> | /2 | --> | /N.F | <-- | K |
62 * +----+ +----+ +-------+ +----+ +------+ +---+
63 * |
64 * |
65 * v
66 * +-------+ Fout
67 * | /Rout | ------>
68 * +-------+
69 */
d9cb41af 70 for (i = 0; i < ARRAY_SIZE(fc2580_pll_lut); i++) {
252fad1c 71 if (dev->f_frequency <= fc2580_pll_lut[i].freq)
d9cb41af
AP		 72 break;
73 }
46de7615
AP		 74 if (i == ARRAY_SIZE(fc2580_pll_lut)) {
75 ret = -EINVAL;
d9cb41af 76 goto err;
46de7615 77 }
d9cb41af 78
46de7615 79 #define DIV_PRE_N 2
154cdfb0 80 #define F_REF dev->clk
46de7615 81 div_out = fc2580_pll_lut[i].div_out;
252fad1c 82 f_vco = (u64) dev->f_frequency * div_out;
46de7615
AP		 83 synth_config = fc2580_pll_lut[i].band;
84 if (f_vco < 2600000000ULL)
85 synth_config |= 0x06;
d9cb41af 86 else
46de7615
AP		 87 synth_config |= 0x0e;
88
89 /* select reference divider R (keep PLL div N in valid range) */
90 #define DIV_N_MIN 76
91 if (f_vco >= div_u64((u64) DIV_PRE_N * DIV_N_MIN * F_REF, 1)) {
92 div_ref = 1;
93 div_ref_val = 0x00;
94 } else if (f_vco >= div_u64((u64) DIV_PRE_N * DIV_N_MIN * F_REF, 2)) {
95 div_ref = 2;
96 div_ref_val = 0x10;
d9cb41af 97 } else {
46de7615
AP		 98 div_ref = 4;
99 div_ref_val = 0x20;
d9cb41af
AP		 100 }
101
46de7615
AP		 102 /* calculate PLL integer and fractional control word */
103 uitmp = DIV_PRE_N * F_REF / div_ref;
104 div_n = div_u64_rem(f_vco, uitmp, &k);
105 k_cw = div_u64((u64) k * 0x100000, uitmp);
106
107 dev_dbg(&client->dev,
252fad1c
AP		 108 "frequency=%u bandwidth=%u f_vco=%llu F_REF=%u div_ref=%u div_n=%u k=%u div_out=%u k_cw=%0x\n",
109 dev->f_frequency, dev->f_bandwidth, f_vco, F_REF, div_ref,
110 div_n, k, div_out, k_cw);
d9cb41af 111
35fe4c65
AP		 112 ret = regmap_write(dev->regmap, 0x02, synth_config);
113 if (ret)
d9cb41af
AP		 114 goto err;
115
35fe4c65
AP		 116 ret = regmap_write(dev->regmap, 0x18, div_ref_val << 0 | k_cw >> 16);
117 if (ret)
d9cb41af
AP		 118 goto err;
119
35fe4c65
AP		 120 ret = regmap_write(dev->regmap, 0x1a, (k_cw >> 8) & 0xff);
121 if (ret)
d9cb41af
AP		 122 goto err;
123
35fe4c65
AP		 124 ret = regmap_write(dev->regmap, 0x1b, (k_cw >> 0) & 0xff);
125 if (ret)
d9cb41af
AP		 126 goto err;
127
35fe4c65
AP		 128 ret = regmap_write(dev->regmap, 0x1c, div_n);
129 if (ret)
46de7615 130 goto err;
d9cb41af
AP		 131
132 /* registers */
133 for (i = 0; i < ARRAY_SIZE(fc2580_freq_regs_lut); i++) {
252fad1c 134 if (dev->f_frequency <= fc2580_freq_regs_lut[i].freq)
d9cb41af
AP		 135 break;
136 }
46de7615
AP		 137 if (i == ARRAY_SIZE(fc2580_freq_regs_lut)) {
138 ret = -EINVAL;
d9cb41af 139 goto err;
46de7615 140 }
d9cb41af 141
154cdfb0 142 ret = fc2580_wr_reg_ff(dev, 0x25, fc2580_freq_regs_lut[i].r25_val);
35fe4c65 143 if (ret)
d9cb41af
AP		 144 goto err;
145
154cdfb0 146 ret = fc2580_wr_reg_ff(dev, 0x27, fc2580_freq_regs_lut[i].r27_val);
35fe4c65 147 if (ret)
d9cb41af
AP		 148 goto err;
149
154cdfb0 150 ret = fc2580_wr_reg_ff(dev, 0x28, fc2580_freq_regs_lut[i].r28_val);
35fe4c65 151 if (ret)
d9cb41af
AP		 152 goto err;
153
154cdfb0 154 ret = fc2580_wr_reg_ff(dev, 0x29, fc2580_freq_regs_lut[i].r29_val);
35fe4c65 155 if (ret)
d9cb41af
AP		 156 goto err;
157
154cdfb0 158 ret = fc2580_wr_reg_ff(dev, 0x2b, fc2580_freq_regs_lut[i].r2b_val);
35fe4c65 159 if (ret)
d9cb41af
AP		 160 goto err;
161
154cdfb0 162 ret = fc2580_wr_reg_ff(dev, 0x2c, fc2580_freq_regs_lut[i].r2c_val);
35fe4c65 163 if (ret)
d9cb41af
AP		 164 goto err;
165
154cdfb0 166 ret = fc2580_wr_reg_ff(dev, 0x2d, fc2580_freq_regs_lut[i].r2d_val);
35fe4c65 167 if (ret)
d9cb41af
AP		 168 goto err;
169
154cdfb0 170 ret = fc2580_wr_reg_ff(dev, 0x30, fc2580_freq_regs_lut[i].r30_val);
35fe4c65 171 if (ret)
d9cb41af
AP		 172 goto err;
173
154cdfb0 174 ret = fc2580_wr_reg_ff(dev, 0x44, fc2580_freq_regs_lut[i].r44_val);
35fe4c65 175 if (ret)
d9cb41af
AP		 176 goto err;
177
154cdfb0 178 ret = fc2580_wr_reg_ff(dev, 0x50, fc2580_freq_regs_lut[i].r50_val);
35fe4c65 179 if (ret)
d9cb41af
AP		 180 goto err;
181
154cdfb0 182 ret = fc2580_wr_reg_ff(dev, 0x53, fc2580_freq_regs_lut[i].r53_val);
35fe4c65 183 if (ret)
d9cb41af
AP		 184 goto err;
185
154cdfb0 186 ret = fc2580_wr_reg_ff(dev, 0x5f, fc2580_freq_regs_lut[i].r5f_val);
35fe4c65 187 if (ret)
d9cb41af
AP		 188 goto err;
189
154cdfb0 190 ret = fc2580_wr_reg_ff(dev, 0x61, fc2580_freq_regs_lut[i].r61_val);
35fe4c65 191 if (ret)
d9cb41af
AP		 192 goto err;
193
154cdfb0 194 ret = fc2580_wr_reg_ff(dev, 0x62, fc2580_freq_regs_lut[i].r62_val);
35fe4c65 195 if (ret)
d9cb41af
AP		 196 goto err;
197
154cdfb0 198 ret = fc2580_wr_reg_ff(dev, 0x63, fc2580_freq_regs_lut[i].r63_val);
35fe4c65 199 if (ret)
d9cb41af
AP		 200 goto err;
201
154cdfb0 202 ret = fc2580_wr_reg_ff(dev, 0x67, fc2580_freq_regs_lut[i].r67_val);
35fe4c65 203 if (ret)
d9cb41af
AP		 204 goto err;
205
154cdfb0 206 ret = fc2580_wr_reg_ff(dev, 0x68, fc2580_freq_regs_lut[i].r68_val);
35fe4c65 207 if (ret)
d9cb41af
AP		 208 goto err;
209
154cdfb0 210 ret = fc2580_wr_reg_ff(dev, 0x69, fc2580_freq_regs_lut[i].r69_val);
35fe4c65 211 if (ret)
d9cb41af
AP		 212 goto err;
213
154cdfb0 214 ret = fc2580_wr_reg_ff(dev, 0x6a, fc2580_freq_regs_lut[i].r6a_val);
35fe4c65 215 if (ret)
d9cb41af
AP		 216 goto err;
217
154cdfb0 218 ret = fc2580_wr_reg_ff(dev, 0x6b, fc2580_freq_regs_lut[i].r6b_val);
35fe4c65 219 if (ret)
d9cb41af
AP		 220 goto err;
221
154cdfb0 222 ret = fc2580_wr_reg_ff(dev, 0x6c, fc2580_freq_regs_lut[i].r6c_val);
35fe4c65 223 if (ret)
d9cb41af
AP		 224 goto err;
225
154cdfb0 226 ret = fc2580_wr_reg_ff(dev, 0x6d, fc2580_freq_regs_lut[i].r6d_val);
35fe4c65 227 if (ret)
d9cb41af
AP		 228 goto err;
229
154cdfb0 230 ret = fc2580_wr_reg_ff(dev, 0x6e, fc2580_freq_regs_lut[i].r6e_val);
35fe4c65 231 if (ret)
d9cb41af
AP		 232 goto err;
233
154cdfb0 234 ret = fc2580_wr_reg_ff(dev, 0x6f, fc2580_freq_regs_lut[i].r6f_val);
35fe4c65 235 if (ret)
d9cb41af
AP		 236 goto err;
237
238 /* IF filters */
239 for (i = 0; i < ARRAY_SIZE(fc2580_if_filter_lut); i++) {
252fad1c 240 if (dev->f_bandwidth <= fc2580_if_filter_lut[i].freq)
d9cb41af
AP		 241 break;
242 }
46de7615
AP		 243 if (i == ARRAY_SIZE(fc2580_if_filter_lut)) {
244 ret = -EINVAL;
d9cb41af 245 goto err;
46de7615 246 }
d9cb41af 247
35fe4c65
AP		 248 ret = regmap_write(dev->regmap, 0x36, fc2580_if_filter_lut[i].r36_val);
249 if (ret)
d9cb41af
AP		 250 goto err;
251
252fad1c 252 uitmp = (unsigned int) 8058000 - (dev->f_bandwidth * 122 / 100 / 2);
8b302d43
AP		 253 uitmp = div64_u64((u64) dev->clk * uitmp, 1000000000000ULL);
254 ret = regmap_write(dev->regmap, 0x37, uitmp);
35fe4c65 255 if (ret)
d9cb41af
AP		 256 goto err;
257
35fe4c65
AP		 258 ret = regmap_write(dev->regmap, 0x39, fc2580_if_filter_lut[i].r39_val);
259 if (ret)
d9cb41af
AP		 260 goto err;
261
46de7615
AP		 262 timeout = jiffies + msecs_to_jiffies(30);
263 for (uitmp = ~0xc0; !time_after(jiffies, timeout) && uitmp != 0xc0;) {
264 /* trigger filter */
35fe4c65 265 ret = regmap_write(dev->regmap, 0x2e, 0x09);
46de7615 266 if (ret)
d9cb41af
AP		 267 goto err;
268
46de7615 269 /* locked when [7:6] are set (val: d7 6MHz, d5 7MHz, cd 8MHz) */
35fe4c65 270 ret = regmap_read(dev->regmap, 0x2f, &uitmp);
46de7615 271 if (ret)
d9cb41af 272 goto err;
35fe4c65 273 uitmp &= 0xc0;
d9cb41af 274
35fe4c65 275 ret = regmap_write(dev->regmap, 0x2e, 0x01);
46de7615 276 if (ret)
d9cb41af 277 goto err;
d9cb41af 278 }
46de7615
AP		 279 if (uitmp != 0xc0)
280 dev_dbg(&client->dev, "filter did not lock %02x\n", uitmp);
d9cb41af 281
d9cb41af
AP		 282 return 0;
283err:
46de7615 284 dev_dbg(&client->dev, "failed=%d\n", ret);
d9cb41af
AP		 285 return ret;
286}
287
252fad1c 288static int fc2580_init(struct fc2580_dev *dev)
d9cb41af 289{
154cdfb0 290 struct i2c_client *client = dev->client;
d9cb41af
AP		 291 int ret, i;
292
154cdfb0 293 dev_dbg(&client->dev, "\n");
d9cb41af
AP		 294
295 for (i = 0; i < ARRAY_SIZE(fc2580_init_reg_vals); i++) {
35fe4c65 296 ret = regmap_write(dev->regmap, fc2580_init_reg_vals[i].reg,
d9cb41af 297 fc2580_init_reg_vals[i].val);
35fe4c65 298 if (ret)
d9cb41af
AP		 299 goto err;
300 }
301
252fad1c 302 dev->active = true;
d9cb41af
AP		 303 return 0;
304err:
154cdfb0 305 dev_dbg(&client->dev, "failed=%d\n", ret);
d9cb41af
AP		 306 return ret;
307}
308
252fad1c 309static int fc2580_sleep(struct fc2580_dev *dev)
d9cb41af 310{
154cdfb0 311 struct i2c_client *client = dev->client;
d9cb41af
AP		 312 int ret;
313
154cdfb0 314 dev_dbg(&client->dev, "\n");
d9cb41af 315
252fad1c
AP		 316 dev->active = false;
317
35fe4c65
AP		 318 ret = regmap_write(dev->regmap, 0x02, 0x0a);
319 if (ret)
d9cb41af 320 goto err;
d9cb41af
AP		 321 return 0;
322err:
154cdfb0 323 dev_dbg(&client->dev, "failed=%d\n", ret);
d9cb41af
AP		 324 return ret;
325}
326
252fad1c
AP		 327/*
328 * DVB API
329 */
330static int fc2580_dvb_set_params(struct dvb_frontend *fe)
d9cb41af 331{
154cdfb0 332 struct fc2580_dev *dev = fe->tuner_priv;
252fad1c 333 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
d9cb41af 334
252fad1c
AP		 335 dev->f_frequency = c->frequency;
336 dev->f_bandwidth = c->bandwidth_hz;
337 return fc2580_set_params(dev);
338}
d9cb41af 339
252fad1c
AP		 340static int fc2580_dvb_init(struct dvb_frontend *fe)
341{
342 return fc2580_init(fe->tuner_priv);
343}
d9cb41af 344
252fad1c
AP		 345static int fc2580_dvb_sleep(struct dvb_frontend *fe)
346{
347 return fc2580_sleep(fe->tuner_priv);
348}
349
350static int fc2580_dvb_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
351{
352 *frequency = 0; /* Zero-IF */
d9cb41af
AP		 353 return 0;
354}
355
252fad1c 356static const struct dvb_tuner_ops fc2580_dvb_tuner_ops = {
d9cb41af 357 .info = {
a3f90c75
MCC		 358 .name = "FCI FC2580",
359 .frequency_min_hz = 174 * MHz,
360 .frequency_max_hz = 862 * MHz,
d9cb41af
AP		 361 },
362
252fad1c
AP		 363 .init = fc2580_dvb_init,
364 .sleep = fc2580_dvb_sleep,
365 .set_params = fc2580_dvb_set_params,
d9cb41af 366
252fad1c 367 .get_if_frequency = fc2580_dvb_get_if_frequency,
d9cb41af
AP		 368};
369
252fad1c
AP		 370/*
371 * V4L2 API
372 */
373#if IS_ENABLED(CONFIG_VIDEO_V4L2)
374static const struct v4l2_frequency_band bands[] = {
375 {
376 .type = V4L2_TUNER_RF,
377 .index = 0,
378 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
379 .rangelow = 130000000,
380 .rangehigh = 2000000000,
381 },
382};
383
384static inline struct fc2580_dev *fc2580_subdev_to_dev(struct v4l2_subdev *sd)
385{
386 return container_of(sd, struct fc2580_dev, subdev);
387}
388
3aab15af 389static int fc2580_standby(struct v4l2_subdev *sd)
252fad1c
AP		 390{
391 struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
252fad1c
AP		 392 int ret;
393
3aab15af 394 ret = fc2580_sleep(dev);
252fad1c
AP		 395 if (ret)
396 return ret;
397
398 return fc2580_set_params(dev);
399}
400
252fad1c
AP		 401static int fc2580_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
402{
403 struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
404 struct i2c_client *client = dev->client;
405
406 dev_dbg(&client->dev, "index=%d\n", v->index);
407
c0decac1 408 strscpy(v->name, "FCI FC2580", sizeof(v->name));
252fad1c
AP		 409 v->type = V4L2_TUNER_RF;
410 v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
411 v->rangelow = bands[0].rangelow;
412 v->rangehigh = bands[0].rangehigh;
413 return 0;
414}
415
416static int fc2580_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
417{
418 struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
419 struct i2c_client *client = dev->client;
420
421 dev_dbg(&client->dev, "index=%d\n", v->index);
422 return 0;
423}
424
425static int fc2580_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
426{
427 struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
428 struct i2c_client *client = dev->client;
429
430 dev_dbg(&client->dev, "tuner=%d\n", f->tuner);
431 f->frequency = dev->f_frequency;
432 return 0;
433}
434
435static int fc2580_s_frequency(struct v4l2_subdev *sd,
436 const struct v4l2_frequency *f)
437{
438 struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
439 struct i2c_client *client = dev->client;
440
441 dev_dbg(&client->dev, "tuner=%d type=%d frequency=%u\n",
442 f->tuner, f->type, f->frequency);
443
444 dev->f_frequency = clamp_t(unsigned int, f->frequency,
445 bands[0].rangelow, bands[0].rangehigh);
446 return fc2580_set_params(dev);
447}
448
449static int fc2580_enum_freq_bands(struct v4l2_subdev *sd,
450 struct v4l2_frequency_band *band)
451{
452 struct fc2580_dev *dev = fc2580_subdev_to_dev(sd);
453 struct i2c_client *client = dev->client;
454
455 dev_dbg(&client->dev, "tuner=%d type=%d index=%d\n",
456 band->tuner, band->type, band->index);
457
458 if (band->index >= ARRAY_SIZE(bands))
459 return -EINVAL;
460
461 band->capability = bands[band->index].capability;
462 band->rangelow = bands[band->index].rangelow;
463 band->rangehigh = bands[band->index].rangehigh;
464 return 0;
465}
466
467static const struct v4l2_subdev_tuner_ops fc2580_subdev_tuner_ops = {
3aab15af 468 .standby = fc2580_standby,
252fad1c
AP		 469 .g_tuner = fc2580_g_tuner,
470 .s_tuner = fc2580_s_tuner,
471 .g_frequency = fc2580_g_frequency,
472 .s_frequency = fc2580_s_frequency,
473 .enum_freq_bands = fc2580_enum_freq_bands,
474};
475
476static const struct v4l2_subdev_ops fc2580_subdev_ops = {
252fad1c
AP		 477 .tuner = &fc2580_subdev_tuner_ops,
478};
479
480static int fc2580_s_ctrl(struct v4l2_ctrl *ctrl)
481{
482 struct fc2580_dev *dev = container_of(ctrl->handler, struct fc2580_dev, hdl);
483 struct i2c_client *client = dev->client;
484 int ret;
485
486 dev_dbg(&client->dev, "ctrl: id=%d name=%s cur.val=%d val=%d\n",
487 ctrl->id, ctrl->name, ctrl->cur.val, ctrl->val);
488
489 switch (ctrl->id) {
490 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
491 case V4L2_CID_RF_TUNER_BANDWIDTH:
492 /*
493 * TODO: Auto logic does not work 100% correctly as tuner driver
494 * do not have information to calculate maximum suitable
495 * bandwidth. Calculating it is responsible of master driver.
496 */
497 dev->f_bandwidth = dev->bandwidth->val;
498 ret = fc2580_set_params(dev);
499 break;
500 default:
501 dev_dbg(&client->dev, "unknown ctrl");
502 ret = -EINVAL;
503 }
504 return ret;
505}
506
507static const struct v4l2_ctrl_ops fc2580_ctrl_ops = {
508 .s_ctrl = fc2580_s_ctrl,
509};
510#endif
511
512static struct v4l2_subdev *fc2580_get_v4l2_subdev(struct i2c_client *client)
513{
514 struct fc2580_dev *dev = i2c_get_clientdata(client);
515
516 if (dev->subdev.ops)
517 return &dev->subdev;
518 else
519 return NULL;
520}
521
6802fc0b
AP		 522static int fc2580_probe(struct i2c_client *client,
523 const struct i2c_device_id *id)
524{
154cdfb0 525 struct fc2580_dev *dev;
6802fc0b
AP		 526 struct fc2580_platform_data *pdata = client->dev.platform_data;
527 struct dvb_frontend *fe = pdata->dvb_frontend;
528 int ret;
35fe4c65
AP		 529 unsigned int uitmp;
530 static const struct regmap_config regmap_config = {
531 .reg_bits = 8,
532 .val_bits = 8,
533 };
6802fc0b
AP		 534
535 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
536 if (!dev) {
537 ret = -ENOMEM;
538 goto err;
539 }
540
541 if (pdata->clk)
542 dev->clk = pdata->clk;
543 else
544 dev->clk = 16384000; /* internal clock */
545 dev->client = client;
35fe4c65
AP		 546 dev->regmap = devm_regmap_init_i2c(client, &regmap_config);
547 if (IS_ERR(dev->regmap)) {
548 ret = PTR_ERR(dev->regmap);
549 goto err_kfree;
550 }
6802fc0b
AP		 551
552 /* check if the tuner is there */
35fe4c65
AP		 553 ret = regmap_read(dev->regmap, 0x01, &uitmp);
554 if (ret)
6802fc0b
AP		 555 goto err_kfree;
556
35fe4c65 557 dev_dbg(&client->dev, "chip_id=%02x\n", uitmp);
6802fc0b 558
35fe4c65 559 switch (uitmp) {
6802fc0b
AP		 560 case 0x56:
561 case 0x5a:
562 break;
563 default:
f00245c2 564 ret = -ENODEV;
6802fc0b
AP		 565 goto err_kfree;
566 }
567
252fad1c
AP		 568#if IS_ENABLED(CONFIG_VIDEO_V4L2)
569 /* Register controls */
570 v4l2_ctrl_handler_init(&dev->hdl, 2);
571 dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &fc2580_ctrl_ops,
572 V4L2_CID_RF_TUNER_BANDWIDTH_AUTO,
573 0, 1, 1, 1);
574 dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &fc2580_ctrl_ops,
575 V4L2_CID_RF_TUNER_BANDWIDTH,
576 3000, 10000000, 1, 3000);
577 v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
578 if (dev->hdl.error) {
579 ret = dev->hdl.error;
580 dev_err(&client->dev, "Could not initialize controls\n");
581 v4l2_ctrl_handler_free(&dev->hdl);
582 goto err_kfree;
583 }
584 dev->subdev.ctrl_handler = &dev->hdl;
585 dev->f_frequency = bands[0].rangelow;
586 dev->f_bandwidth = dev->bandwidth->val;
587 v4l2_i2c_subdev_init(&dev->subdev, client, &fc2580_subdev_ops);
588#endif
6802fc0b 589 fe->tuner_priv = dev;
252fad1c
AP		 590 memcpy(&fe->ops.tuner_ops, &fc2580_dvb_tuner_ops,
591 sizeof(fe->ops.tuner_ops));
592 pdata->get_v4l2_subdev = fc2580_get_v4l2_subdev;
6802fc0b
AP		 593 i2c_set_clientdata(client, dev);
594
595 dev_info(&client->dev, "FCI FC2580 successfully identified\n");
596 return 0;
597err_kfree:
598 kfree(dev);
599err:
600 dev_dbg(&client->dev, "failed=%d\n", ret);
601 return ret;
602}
603
604static int fc2580_remove(struct i2c_client *client)
605{
154cdfb0 606 struct fc2580_dev *dev = i2c_get_clientdata(client);
6802fc0b
AP		 607
608 dev_dbg(&client->dev, "\n");
609
252fad1c
AP		 610#if IS_ENABLED(CONFIG_VIDEO_V4L2)
611 v4l2_ctrl_handler_free(&dev->hdl);
612#endif
6802fc0b
AP		 613 kfree(dev);
614 return 0;
615}
616
617static const struct i2c_device_id fc2580_id_table[] = {
618 {"fc2580", 0},
619 {}
620};
621MODULE_DEVICE_TABLE(i2c, fc2580_id_table);
622
623static struct i2c_driver fc2580_driver = {
624 .driver = {
6802fc0b
AP		 625 .name = "fc2580",
626 .suppress_bind_attrs = true,
627 },
628 .probe = fc2580_probe,
629 .remove = fc2580_remove,
630 .id_table = fc2580_id_table,
631};
632
633module_i2c_driver(fc2580_driver);
634
d9cb41af
AP		 635MODULE_DESCRIPTION("FCI FC2580 silicon tuner driver");
636MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
637MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)