projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge tag 'libnvdimm-for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdim...
[linux-2.6-block.git] / drivers / media / rc / ite-cir.c
CommitLineData
620a32bb
JGS		 1/*
2 * Driver for ITE Tech Inc. IT8712F/IT8512 CIR
3 *
4 * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
620a32bb
JGS		 16 * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the
17 * skeleton provided by the nuvoton-cir driver.
18 *
19 * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues
20 * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus
21 * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards
22 * <jimbo-lirc@edwardsclan.net>.
23 *
24 * The lirc_ite8709 driver was written by Grégory Lardière
25 * <spmf2004-lirc@yahoo.fr> in 2008.
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/pnp.h>
31#include <linux/io.h>
32#include <linux/interrupt.h>
33#include <linux/sched.h>
d7516c7c 34#include <linux/delay.h>
620a32bb
JGS		 35#include <linux/slab.h>
36#include <linux/input.h>
37#include <linux/bitops.h>
38#include <media/rc-core.h>
39#include <linux/pci_ids.h>
40
41#include "ite-cir.h"
42
43/* module parameters */
44
45/* debug level */
46static int debug;
47module_param(debug, int, S_IRUGO | S_IWUSR);
48MODULE_PARM_DESC(debug, "Enable debugging output");
49
50/* low limit for RX carrier freq, Hz, 0 for no RX demodulation */
51static int rx_low_carrier_freq;
52module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR);
25ec587c 53MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, 0 for no RX demodulation");
620a32bb
JGS		 54
55/* high limit for RX carrier freq, Hz, 0 for no RX demodulation */
56static int rx_high_carrier_freq;
57module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR);
25ec587c 58MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, Hz, 0 for no RX demodulation");
620a32bb
JGS		 59
60/* override tx carrier frequency */
61static int tx_carrier_freq;
62module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR);
63MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz");
64
65/* override tx duty cycle */
66static int tx_duty_cycle;
67module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR);
68MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100");
69
70/* override default sample period */
71static long sample_period;
72module_param(sample_period, long, S_IRUGO | S_IWUSR);
73MODULE_PARM_DESC(sample_period, "Override carrier sample period, us");
74
75/* override detected model id */
76static int model_number = -1;
77module_param(model_number, int, S_IRUGO | S_IWUSR);
78MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect");
79
80
81/* HW-independent code functions */
82
83/* check whether carrier frequency is high frequency */
84static inline bool ite_is_high_carrier_freq(unsigned int freq)
85{
86 return freq >= ITE_HCF_MIN_CARRIER_FREQ;
87}
88
89/* get the bits required to program the carrier frequency in CFQ bits,
90 * unshifted */
91static u8 ite_get_carrier_freq_bits(unsigned int freq)
92{
93 if (ite_is_high_carrier_freq(freq)) {
94 if (freq < 425000)
95 return ITE_CFQ_400;
96
97 else if (freq < 465000)
98 return ITE_CFQ_450;
99
100 else if (freq < 490000)
101 return ITE_CFQ_480;
102
103 else
104 return ITE_CFQ_500;
105 } else {
106 /* trim to limits */
107 if (freq < ITE_LCF_MIN_CARRIER_FREQ)
108 freq = ITE_LCF_MIN_CARRIER_FREQ;
109 if (freq > ITE_LCF_MAX_CARRIER_FREQ)
110 freq = ITE_LCF_MAX_CARRIER_FREQ;
111
112 /* convert to kHz and subtract the base freq */
113 freq =
114 DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ,
115 1000);
116
117 return (u8) freq;
118 }
119}
120
121/* get the bits required to program the pulse with in TXMPW */
122static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle)
123{
124 unsigned long period_ns, on_ns;
125
126 /* sanitize freq into range */
127 if (freq < ITE_LCF_MIN_CARRIER_FREQ)
128 freq = ITE_LCF_MIN_CARRIER_FREQ;
129 if (freq > ITE_HCF_MAX_CARRIER_FREQ)
130 freq = ITE_HCF_MAX_CARRIER_FREQ;
131
132 period_ns = 1000000000UL / freq;
133 on_ns = period_ns * duty_cycle / 100;
134
135 if (ite_is_high_carrier_freq(freq)) {
136 if (on_ns < 750)
137 return ITE_TXMPW_A;
138
139 else if (on_ns < 850)
140 return ITE_TXMPW_B;
141
142 else if (on_ns < 950)
143 return ITE_TXMPW_C;
144
145 else if (on_ns < 1080)
146 return ITE_TXMPW_D;
147
148 else
149 return ITE_TXMPW_E;
150 } else {
151 if (on_ns < 6500)
152 return ITE_TXMPW_A;
153
154 else if (on_ns < 7850)
155 return ITE_TXMPW_B;
156
157 else if (on_ns < 9650)
158 return ITE_TXMPW_C;
159
160 else if (on_ns < 11950)
161 return ITE_TXMPW_D;
162
163 else
164 return ITE_TXMPW_E;
165 }
166}
167
168/* decode raw bytes as received by the hardware, and push them to the ir-core
169 * layer */
170static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int
171 length)
172{
173 u32 sample_period;
174 unsigned long *ldata;
175 unsigned int next_one, next_zero, size;
176 DEFINE_IR_RAW_EVENT(ev);
177
178 if (length == 0)
179 return;
180
181 sample_period = dev->params.sample_period;
182 ldata = (unsigned long *)data;
183 size = length << 3;
30f5b28e 184 next_one = find_next_bit_le(ldata, size, 0);
620a32bb
JGS		 185 if (next_one > 0) {
186 ev.pulse = true;
187 ev.duration =
188 ITE_BITS_TO_NS(next_one, sample_period);
189 ir_raw_event_store_with_filter(dev->rdev, &ev);
190 }
191
192 while (next_one < size) {
30f5b28e 193 next_zero = find_next_zero_bit_le(ldata, size, next_one + 1);
620a32bb
JGS		 194 ev.pulse = false;
195 ev.duration = ITE_BITS_TO_NS(next_zero - next_one, sample_period);
196 ir_raw_event_store_with_filter(dev->rdev, &ev);
197
198 if (next_zero < size) {
199 next_one =
30f5b28e 200 find_next_bit_le(ldata,
620a32bb
JGS		 201 size,
202 next_zero + 1);
203 ev.pulse = true;
204 ev.duration =
205 ITE_BITS_TO_NS(next_one - next_zero,
206 sample_period);
207 ir_raw_event_store_with_filter
208 (dev->rdev, &ev);
209 } else
210 next_one = size;
211 }
212
213 ir_raw_event_handle(dev->rdev);
214
215 ite_dbg_verbose("decoded %d bytes.", length);
216}
217
218/* set all the rx/tx carrier parameters; this must be called with the device
219 * spinlock held */
220static void ite_set_carrier_params(struct ite_dev *dev)
221{
222 unsigned int freq, low_freq, high_freq;
223 int allowance;
224 bool use_demodulator;
225 bool for_tx = dev->transmitting;
226
227 ite_dbg("%s called", __func__);
228
229 if (for_tx) {
230 /* we don't need no stinking calculations */
231 freq = dev->params.tx_carrier_freq;
232 allowance = ITE_RXDCR_DEFAULT;
233 use_demodulator = false;
234 } else {
235 low_freq = dev->params.rx_low_carrier_freq;
236 high_freq = dev->params.rx_high_carrier_freq;
237
238 if (low_freq == 0) {
239 /* don't demodulate */
240 freq =
241 ITE_DEFAULT_CARRIER_FREQ;
242 allowance = ITE_RXDCR_DEFAULT;
243 use_demodulator = false;
244 } else {
245 /* calculate the middle freq */
246 freq = (low_freq + high_freq) / 2;
247
248 /* calculate the allowance */
249 allowance =
250 DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq),
251 ITE_RXDCR_PER_10000_STEP
252 * (high_freq + low_freq));
253
254 if (allowance < 1)
255 allowance = 1;
256
257 if (allowance > ITE_RXDCR_MAX)
258 allowance = ITE_RXDCR_MAX;
7ec03e60
NI		 259
260 use_demodulator = true;
620a32bb
JGS		 261 }
262 }
263
264 /* set the carrier parameters in a device-dependent way */
265 dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq),
266 use_demodulator, ite_get_carrier_freq_bits(freq), allowance,
267 ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle));
268}
269
270/* interrupt service routine for incoming and outgoing CIR data */
271static irqreturn_t ite_cir_isr(int irq, void *data)
272{
273 struct ite_dev *dev = data;
274 unsigned long flags;
275 irqreturn_t ret = IRQ_RETVAL(IRQ_NONE);
276 u8 rx_buf[ITE_RX_FIFO_LEN];
277 int rx_bytes;
278 int iflags;
279
280 ite_dbg_verbose("%s firing", __func__);
281
282 /* grab the spinlock */
283 spin_lock_irqsave(&dev->lock, flags);
284
285 /* read the interrupt flags */
286 iflags = dev->params.get_irq_causes(dev);
287
288 /* check for the receive interrupt */
289 if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) {
290 /* read the FIFO bytes */
291 rx_bytes =
292 dev->params.get_rx_bytes(dev, rx_buf,
293 ITE_RX_FIFO_LEN);
294
295 if (rx_bytes > 0) {
296 /* drop the spinlock, since the ir-core layer
297 * may call us back again through
298 * ite_s_idle() */
299 spin_unlock_irqrestore(&dev->
300 lock,
301 flags);
302
303 /* decode the data we've just received */
304 ite_decode_bytes(dev, rx_buf,
305 rx_bytes);
306
307 /* reacquire the spinlock */
308 spin_lock_irqsave(&dev->lock,
309 flags);
310
311 /* mark the interrupt as serviced */
312 ret = IRQ_RETVAL(IRQ_HANDLED);
313 }
314 } else if (iflags & ITE_IRQ_TX_FIFO) {
315 /* FIFO space available interrupt */
316 ite_dbg_verbose("got interrupt for TX FIFO");
317
318 /* wake any sleeping transmitter */
319 wake_up_interruptible(&dev->tx_queue);
320
321 /* mark the interrupt as serviced */
322 ret = IRQ_RETVAL(IRQ_HANDLED);
323 }
324
325 /* drop the spinlock */
326 spin_unlock_irqrestore(&dev->lock, flags);
327
328 ite_dbg_verbose("%s done returning %d", __func__, (int)ret);
329
330 return ret;
331}
332
333/* set the rx carrier freq range, guess it's in Hz... */
334static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32
335 carrier_high)
336{
337 unsigned long flags;
338 struct ite_dev *dev = rcdev->priv;
339
340 spin_lock_irqsave(&dev->lock, flags);
341 dev->params.rx_low_carrier_freq = carrier_low;
342 dev->params.rx_high_carrier_freq = carrier_high;
343 ite_set_carrier_params(dev);
344 spin_unlock_irqrestore(&dev->lock, flags);
345
346 return 0;
347}
348
349/* set the tx carrier freq, guess it's in Hz... */
350static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
351{
352 unsigned long flags;
353 struct ite_dev *dev = rcdev->priv;
354
355 spin_lock_irqsave(&dev->lock, flags);
356 dev->params.tx_carrier_freq = carrier;
357 ite_set_carrier_params(dev);
358 spin_unlock_irqrestore(&dev->lock, flags);
359
360 return 0;
361}
362
363/* set the tx duty cycle by controlling the pulse width */
364static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle)
365{
366 unsigned long flags;
367 struct ite_dev *dev = rcdev->priv;
368
369 spin_lock_irqsave(&dev->lock, flags);
370 dev->params.tx_duty_cycle = duty_cycle;
371 ite_set_carrier_params(dev);
372 spin_unlock_irqrestore(&dev->lock, flags);
373
374 return 0;
375}
376
377/* transmit out IR pulses; what you get here is a batch of alternating
378 * pulse/space/pulse/space lengths that we should write out completely through
379 * the FIFO, blocking on a full FIFO */
5588dc2b 380static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n)
620a32bb
JGS		 381{
382 unsigned long flags;
383 struct ite_dev *dev = rcdev->priv;
384 bool is_pulse = false;
385 int remaining_us, fifo_avail, fifo_remaining, last_idx = 0;
386 int max_rle_us, next_rle_us;
387 int ret = n;
388 u8 last_sent[ITE_TX_FIFO_LEN];
389 u8 val;
390
391 ite_dbg("%s called", __func__);
392
393 /* clear the array just in case */
394 memset(last_sent, 0, ARRAY_SIZE(last_sent));
395
620a32bb
JGS		 396 spin_lock_irqsave(&dev->lock, flags);
397
398 /* let everybody know we're now transmitting */
399 dev->transmitting = true;
400
401 /* and set the carrier values for transmission */
402 ite_set_carrier_params(dev);
403
404 /* calculate how much time we can send in one byte */
405 max_rle_us =
406 (ITE_BAUDRATE_DIVISOR * dev->params.sample_period *
407 ITE_TX_MAX_RLE) / 1000;
408
409 /* disable the receiver */
410 dev->params.disable_rx(dev);
411
412 /* this is where we'll begin filling in the FIFO, until it's full.
413 * then we'll just activate the interrupt, wait for it to wake us up
414 * again, disable it, continue filling the FIFO... until everything
415 * has been pushed out */
416 fifo_avail =
417 ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
418
419 while (n > 0 && dev->in_use) {
420 /* transmit the next sample */
421 is_pulse = !is_pulse;
422 remaining_us = *(txbuf++);
423 n--;
424
425 ite_dbg("%s: %ld",
426 ((is_pulse) ? "pulse" : "space"),
427 (long int)
428 remaining_us);
429
430 /* repeat while the pulse is non-zero length */
431 while (remaining_us > 0 && dev->in_use) {
432 if (remaining_us > max_rle_us)
433 next_rle_us = max_rle_us;
434
435 else
436 next_rle_us = remaining_us;
437
438 remaining_us -= next_rle_us;
439
440 /* check what's the length we have to pump out */
441 val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us;
442
443 /* put it into the sent buffer */
444 last_sent[last_idx++] = val;
445 last_idx &= (ITE_TX_FIFO_LEN);
446
447 /* encode it for 7 bits */
448 val = (val - 1) & ITE_TX_RLE_MASK;
449
450 /* take into account pulse/space prefix */
451 if (is_pulse)
452 val |= ITE_TX_PULSE;
453
454 else
455 val |= ITE_TX_SPACE;
456
2ccb24ff
MCC		 457 /*
458 * if we get to 0 available, read again, just in case
459 * some other slot got freed
460 */
620a32bb
JGS		 461 if (fifo_avail <= 0)
462 fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
463
464 /* if it's still full */
465 if (fifo_avail <= 0) {
466 /* enable the tx interrupt */
467 dev->params.
468 enable_tx_interrupt(dev);
469
470 /* drop the spinlock */
471 spin_unlock_irqrestore(&dev->lock, flags);
472
473 /* wait for the FIFO to empty enough */
474 wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8);
475
476 /* get the spinlock again */
477 spin_lock_irqsave(&dev->lock, flags);
478
479 /* disable the tx interrupt again. */
480 dev->params.
481 disable_tx_interrupt(dev);
482 }
483
484 /* now send the byte through the FIFO */
485 dev->params.put_tx_byte(dev, val);
486 fifo_avail--;
487 }
488 }
489
490 /* wait and don't return until the whole FIFO has been sent out;
491 * otherwise we could configure the RX carrier params instead of the
492 * TX ones while the transmission is still being performed! */
493 fifo_remaining = dev->params.get_tx_used_slots(dev);
494 remaining_us = 0;
495 while (fifo_remaining > 0) {
496 fifo_remaining--;
497 last_idx--;
498 last_idx &= (ITE_TX_FIFO_LEN - 1);
499 remaining_us += last_sent[last_idx];
500 }
501 remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE);
502
503 /* drop the spinlock while we sleep */
504 spin_unlock_irqrestore(&dev->lock, flags);
505
506 /* sleep remaining_us microseconds */
507 mdelay(DIV_ROUND_UP(remaining_us, 1000));
508
509 /* reacquire the spinlock */
510 spin_lock_irqsave(&dev->lock, flags);
511
512 /* now we're not transmitting anymore */
513 dev->transmitting = false;
514
515 /* and set the carrier values for reception */
516 ite_set_carrier_params(dev);
517
518 /* reenable the receiver */
519 if (dev->in_use)
520 dev->params.enable_rx(dev);
521
522 /* notify transmission end */
523 wake_up_interruptible(&dev->tx_ended);
524
525 spin_unlock_irqrestore(&dev->lock, flags);
526
527 return ret;
528}
529
530/* idle the receiver if needed */
531static void ite_s_idle(struct rc_dev *rcdev, bool enable)
532{
533 unsigned long flags;
534 struct ite_dev *dev = rcdev->priv;
535
536 ite_dbg("%s called", __func__);
537
538 if (enable) {
539 spin_lock_irqsave(&dev->lock, flags);
540 dev->params.idle_rx(dev);
541 spin_unlock_irqrestore(&dev->lock, flags);
542 }
543}
544
545
546/* IT8712F HW-specific functions */
547
548/* retrieve a bitmask of the current causes for a pending interrupt; this may
549 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
550 * */
551static int it87_get_irq_causes(struct ite_dev *dev)
552{
553 u8 iflags;
554 int ret = 0;
555
556 ite_dbg("%s called", __func__);
557
558 /* read the interrupt flags */
559 iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II;
560
561 switch (iflags) {
562 case IT87_II_RXDS:
563 ret = ITE_IRQ_RX_FIFO;
564 break;
565 case IT87_II_RXFO:
566 ret = ITE_IRQ_RX_FIFO_OVERRUN;
567 break;
568 case IT87_II_TXLDL:
569 ret = ITE_IRQ_TX_FIFO;
570 break;
571 }
572
573 return ret;
574}
575
576/* set the carrier parameters; to be called with the spinlock held */
577static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq,
578 bool use_demodulator,
579 u8 carrier_freq_bits, u8 allowance_bits,
580 u8 pulse_width_bits)
581{
582 u8 val;
583
584 ite_dbg("%s called", __func__);
585
586 /* program the RCR register */
587 val = inb(dev->cir_addr + IT87_RCR)
588 & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR);
589
590 if (high_freq)
591 val |= IT87_HCFS;
592
593 if (use_demodulator)
594 val |= IT87_RXEND;
595
596 val |= allowance_bits;
597
598 outb(val, dev->cir_addr + IT87_RCR);
599
600 /* program the TCR2 register */
601 outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits,
602 dev->cir_addr + IT87_TCR2);
603}
604
605/* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
606 * held */
607static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
608{
609 int fifo, read = 0;
610
611 ite_dbg("%s called", __func__);
612
613 /* read how many bytes are still in the FIFO */
614 fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC;
615
616 while (fifo > 0 && buf_size > 0) {
617 *(buf++) = inb(dev->cir_addr + IT87_DR);
618 fifo--;
619 read++;
620 buf_size--;
621 }
622
623 return read;
624}
625
626/* return how many bytes are still in the FIFO; this will be called
627 * with the device spinlock NOT HELD while waiting for the TX FIFO to get
628 * empty; let's expect this won't be a problem */
629static int it87_get_tx_used_slots(struct ite_dev *dev)
630{
631 ite_dbg("%s called", __func__);
632
633 return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC;
634}
635
636/* put a byte to the TX fifo; this should be called with the spinlock held */
637static void it87_put_tx_byte(struct ite_dev *dev, u8 value)
638{
639 outb(value, dev->cir_addr + IT87_DR);
640}
641
642/* idle the receiver so that we won't receive samples until another
643 pulse is detected; this must be called with the device spinlock held */
644static void it87_idle_rx(struct ite_dev *dev)
645{
646 ite_dbg("%s called", __func__);
647
648 /* disable streaming by clearing RXACT writing it as 1 */
649 outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,
650 dev->cir_addr + IT87_RCR);
651
652 /* clear the FIFO */
653 outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,
654 dev->cir_addr + IT87_TCR1);
655}
656
657/* disable the receiver; this must be called with the device spinlock held */
658static void it87_disable_rx(struct ite_dev *dev)
659{
660 ite_dbg("%s called", __func__);
661
662 /* disable the receiver interrupts */
663 outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),
664 dev->cir_addr + IT87_IER);
665
666 /* disable the receiver */
667 outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,
668 dev->cir_addr + IT87_RCR);
669
670 /* clear the FIFO and RXACT (actually RXACT should have been cleared
671 * in the previous outb() call) */
672 it87_idle_rx(dev);
673}
674
675/* enable the receiver; this must be called with the device spinlock held */
676static void it87_enable_rx(struct ite_dev *dev)
677{
678 ite_dbg("%s called", __func__);
679
680 /* enable the receiver by setting RXEN */
681 outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,
682 dev->cir_addr + IT87_RCR);
683
684 /* just prepare it to idle for the next reception */
685 it87_idle_rx(dev);
686
687 /* enable the receiver interrupts and master enable flag */
688 outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,
689 dev->cir_addr + IT87_IER);
690}
691
692/* disable the transmitter interrupt; this must be called with the device
693 * spinlock held */
694static void it87_disable_tx_interrupt(struct ite_dev *dev)
695{
696 ite_dbg("%s called", __func__);
697
698 /* disable the transmitter interrupts */
699 outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,
700 dev->cir_addr + IT87_IER);
701}
702
703/* enable the transmitter interrupt; this must be called with the device
704 * spinlock held */
705static void it87_enable_tx_interrupt(struct ite_dev *dev)
706{
707 ite_dbg("%s called", __func__);
708
709 /* enable the transmitter interrupts and master enable flag */
710 outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,
711 dev->cir_addr + IT87_IER);
712}
713
714/* disable the device; this must be called with the device spinlock held */
715static void it87_disable(struct ite_dev *dev)
716{
717 ite_dbg("%s called", __func__);
718
719 /* clear out all interrupt enable flags */
720 outb(inb(dev->cir_addr + IT87_IER) &
721 ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE),
722 dev->cir_addr + IT87_IER);
723
724 /* disable the receiver */
725 it87_disable_rx(dev);
726
727 /* erase the FIFO */
728 outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),
729 dev->cir_addr + IT87_TCR1);
730}
731
732/* initialize the hardware */
733static void it87_init_hardware(struct ite_dev *dev)
734{
735 ite_dbg("%s called", __func__);
736
737 /* enable just the baud rate divisor register,
738 disabling all the interrupts at the same time */
739 outb((inb(dev->cir_addr + IT87_IER) &
740 ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR,
741 dev->cir_addr + IT87_IER);
742
743 /* write out the baud rate divisor */
744 outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);
745 outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);
746
747 /* disable the baud rate divisor register again */
748 outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,
749 dev->cir_addr + IT87_IER);
750
751 /* program the RCR register defaults */
752 outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);
753
754 /* program the TCR1 register */
755 outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE
756 | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR,
757 dev->cir_addr + IT87_TCR1);
758
759 /* program the carrier parameters */
760 ite_set_carrier_params(dev);
761}
762
763/* IT8512F on ITE8708 HW-specific functions */
764
765/* retrieve a bitmask of the current causes for a pending interrupt; this may
766 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
767 * */
768static int it8708_get_irq_causes(struct ite_dev *dev)
769{
770 u8 iflags;
771 int ret = 0;
772
773 ite_dbg("%s called", __func__);
774
775 /* read the interrupt flags */
776 iflags = inb(dev->cir_addr + IT8708_C0IIR);
777
778 if (iflags & IT85_TLDLI)
779 ret |= ITE_IRQ_TX_FIFO;
780 if (iflags & IT85_RDAI)
781 ret |= ITE_IRQ_RX_FIFO;
782 if (iflags & IT85_RFOI)
783 ret |= ITE_IRQ_RX_FIFO_OVERRUN;
784
785 return ret;
786}
787
788/* set the carrier parameters; to be called with the spinlock held */
789static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq,
790 bool use_demodulator,
791 u8 carrier_freq_bits, u8 allowance_bits,
792 u8 pulse_width_bits)
793{
794 u8 val;
795
796 ite_dbg("%s called", __func__);
797
798 /* program the C0CFR register, with HRAE=1 */
799 outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
800 dev->cir_addr + IT8708_BANKSEL);
801
802 val = (inb(dev->cir_addr + IT8708_C0CFR)
803 & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits;
804
805 if (high_freq)
806 val |= IT85_HCFS;
807
808 outb(val, dev->cir_addr + IT8708_C0CFR);
809
810 outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
811 dev->cir_addr + IT8708_BANKSEL);
812
813 /* program the C0RCR register */
814 val = inb(dev->cir_addr + IT8708_C0RCR)
815 & ~(IT85_RXEND | IT85_RXDCR);
816
817 if (use_demodulator)
818 val |= IT85_RXEND;
819
820 val |= allowance_bits;
821
822 outb(val, dev->cir_addr + IT8708_C0RCR);
823
824 /* program the C0TCR register */
825 val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW;
826 val |= pulse_width_bits;
827 outb(val, dev->cir_addr + IT8708_C0TCR);
828}
829
830/* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
831 * held */
832static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
833{
834 int fifo, read = 0;
835
836 ite_dbg("%s called", __func__);
837
838 /* read how many bytes are still in the FIFO */
839 fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC;
840
841 while (fifo > 0 && buf_size > 0) {
842 *(buf++) = inb(dev->cir_addr + IT8708_C0DR);
843 fifo--;
844 read++;
845 buf_size--;
846 }
847
848 return read;
849}
850
851/* return how many bytes are still in the FIFO; this will be called
852 * with the device spinlock NOT HELD while waiting for the TX FIFO to get
853 * empty; let's expect this won't be a problem */
854static int it8708_get_tx_used_slots(struct ite_dev *dev)
855{
856 ite_dbg("%s called", __func__);
857
858 return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC;
859}
860
861/* put a byte to the TX fifo; this should be called with the spinlock held */
862static void it8708_put_tx_byte(struct ite_dev *dev, u8 value)
863{
864 outb(value, dev->cir_addr + IT8708_C0DR);
865}
866
867/* idle the receiver so that we won't receive samples until another
868 pulse is detected; this must be called with the device spinlock held */
869static void it8708_idle_rx(struct ite_dev *dev)
870{
871 ite_dbg("%s called", __func__);
872
873 /* disable streaming by clearing RXACT writing it as 1 */
874 outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,
875 dev->cir_addr + IT8708_C0RCR);
876
877 /* clear the FIFO */
878 outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,
879 dev->cir_addr + IT8708_C0MSTCR);
880}
881
882/* disable the receiver; this must be called with the device spinlock held */
883static void it8708_disable_rx(struct ite_dev *dev)
884{
885 ite_dbg("%s called", __func__);
886
887 /* disable the receiver interrupts */
888 outb(inb(dev->cir_addr + IT8708_C0IER) &
889 ~(IT85_RDAIE | IT85_RFOIE),
890 dev->cir_addr + IT8708_C0IER);
891
892 /* disable the receiver */
893 outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,
894 dev->cir_addr + IT8708_C0RCR);
895
896 /* clear the FIFO and RXACT (actually RXACT should have been cleared
897 * in the previous outb() call) */
898 it8708_idle_rx(dev);
899}
900
901/* enable the receiver; this must be called with the device spinlock held */
902static void it8708_enable_rx(struct ite_dev *dev)
903{
904 ite_dbg("%s called", __func__);
905
906 /* enable the receiver by setting RXEN */
907 outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,
908 dev->cir_addr + IT8708_C0RCR);
909
910 /* just prepare it to idle for the next reception */
911 it8708_idle_rx(dev);
912
913 /* enable the receiver interrupts and master enable flag */
914 outb(inb(dev->cir_addr + IT8708_C0IER)
915 |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
916 dev->cir_addr + IT8708_C0IER);
917}
918
919/* disable the transmitter interrupt; this must be called with the device
920 * spinlock held */
921static void it8708_disable_tx_interrupt(struct ite_dev *dev)
922{
923 ite_dbg("%s called", __func__);
924
925 /* disable the transmitter interrupts */
926 outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,
927 dev->cir_addr + IT8708_C0IER);
928}
929
930/* enable the transmitter interrupt; this must be called with the device
931 * spinlock held */
932static void it8708_enable_tx_interrupt(struct ite_dev *dev)
933{
934 ite_dbg("%s called", __func__);
935
936 /* enable the transmitter interrupts and master enable flag */
937 outb(inb(dev->cir_addr + IT8708_C0IER)
938 |IT85_TLDLIE | IT85_IEC,
939 dev->cir_addr + IT8708_C0IER);
940}
941
942/* disable the device; this must be called with the device spinlock held */
943static void it8708_disable(struct ite_dev *dev)
944{
945 ite_dbg("%s called", __func__);
946
947 /* clear out all interrupt enable flags */
948 outb(inb(dev->cir_addr + IT8708_C0IER) &
949 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
950 dev->cir_addr + IT8708_C0IER);
951
952 /* disable the receiver */
953 it8708_disable_rx(dev);
954
955 /* erase the FIFO */
956 outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),
957 dev->cir_addr + IT8708_C0MSTCR);
958}
959
960/* initialize the hardware */
961static void it8708_init_hardware(struct ite_dev *dev)
962{
963 ite_dbg("%s called", __func__);
964
965 /* disable all the interrupts */
966 outb(inb(dev->cir_addr + IT8708_C0IER) &
967 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
968 dev->cir_addr + IT8708_C0IER);
969
970 /* program the baud rate divisor */
971 outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
972 dev->cir_addr + IT8708_BANKSEL);
973
974 outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);
975 outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
976 dev->cir_addr + IT8708_C0BDHR);
977
978 outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
979 dev->cir_addr + IT8708_BANKSEL);
980
981 /* program the C0MSTCR register defaults */
982 outb((inb(dev->cir_addr + IT8708_C0MSTCR) &
983 ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL |
984 IT85_FIFOCLR | IT85_RESET)) |
985 IT85_FIFOTL_DEFAULT,
986 dev->cir_addr + IT8708_C0MSTCR);
987
988 /* program the C0RCR register defaults */
989 outb((inb(dev->cir_addr + IT8708_C0RCR) &
990 ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND |
991 IT85_RXACT | IT85_RXDCR)) |
992 ITE_RXDCR_DEFAULT,
993 dev->cir_addr + IT8708_C0RCR);
994
995 /* program the C0TCR register defaults */
996 outb((inb(dev->cir_addr + IT8708_C0TCR) &
997 ~(IT85_TXMPM | IT85_TXMPW))
998 |IT85_TXRLE | IT85_TXENDF |
999 IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT,
1000 dev->cir_addr + IT8708_C0TCR);
1001
1002 /* program the carrier parameters */
1003 ite_set_carrier_params(dev);
1004}
1005
1006/* IT8512F on ITE8709 HW-specific functions */
1007
1008/* read a byte from the SRAM module */
1009static inline u8 it8709_rm(struct ite_dev *dev, int index)
1010{
1011 outb(index, dev->cir_addr + IT8709_RAM_IDX);
1012 return inb(dev->cir_addr + IT8709_RAM_VAL);
1013}
1014
1015/* write a byte to the SRAM module */
1016static inline void it8709_wm(struct ite_dev *dev, u8 val, int index)
1017{
1018 outb(index, dev->cir_addr + IT8709_RAM_IDX);
1019 outb(val, dev->cir_addr + IT8709_RAM_VAL);
1020}
1021
1022static void it8709_wait(struct ite_dev *dev)
1023{
1024 int i = 0;
1025 /*
1026 * loop until device tells it's ready to continue
1027 * iterations count is usually ~750 but can sometimes achieve 13000
1028 */
1029 for (i = 0; i < 15000; i++) {
1030 udelay(2);
1031 if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE)
1032 break;
1033 }
1034}
1035
1036/* read the value of a CIR register */
1037static u8 it8709_rr(struct ite_dev *dev, int index)
1038{
1039 /* just wait in case the previous access was a write */
1040 it8709_wait(dev);
1041 it8709_wm(dev, index, IT8709_REG_IDX);
1042 it8709_wm(dev, IT8709_READ, IT8709_MODE);
1043
1044 /* wait for the read data to be available */
1045 it8709_wait(dev);
1046
1047 /* return the read value */
1048 return it8709_rm(dev, IT8709_REG_VAL);
1049}
1050
1051/* write the value of a CIR register */
1052static void it8709_wr(struct ite_dev *dev, u8 val, int index)
1053{
1054 /* we wait before writing, and not afterwards, since this allows us to
1055 * pipeline the host CPU with the microcontroller */
1056 it8709_wait(dev);
1057 it8709_wm(dev, val, IT8709_REG_VAL);
1058 it8709_wm(dev, index, IT8709_REG_IDX);
1059 it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
1060}
1061
1062/* retrieve a bitmask of the current causes for a pending interrupt; this may
1063 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
1064 * */
1065static int it8709_get_irq_causes(struct ite_dev *dev)
1066{
1067 u8 iflags;
1068 int ret = 0;
1069
1070 ite_dbg("%s called", __func__);
1071
1072 /* read the interrupt flags */
1073 iflags = it8709_rm(dev, IT8709_IIR);
1074
1075 if (iflags & IT85_TLDLI)
1076 ret |= ITE_IRQ_TX_FIFO;
1077 if (iflags & IT85_RDAI)
1078 ret |= ITE_IRQ_RX_FIFO;
1079 if (iflags & IT85_RFOI)
1080 ret |= ITE_IRQ_RX_FIFO_OVERRUN;
1081
1082 return ret;
1083}
1084
1085/* set the carrier parameters; to be called with the spinlock held */
1086static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq,
1087 bool use_demodulator,
1088 u8 carrier_freq_bits, u8 allowance_bits,
1089 u8 pulse_width_bits)
1090{
1091 u8 val;
1092
1093 ite_dbg("%s called", __func__);
1094
1095 val = (it8709_rr(dev, IT85_C0CFR)
1096 &~(IT85_HCFS | IT85_CFQ)) |
1097 carrier_freq_bits;
1098
1099 if (high_freq)
1100 val |= IT85_HCFS;
1101
1102 it8709_wr(dev, val, IT85_C0CFR);
1103
1104 /* program the C0RCR register */
1105 val = it8709_rr(dev, IT85_C0RCR)
1106 & ~(IT85_RXEND | IT85_RXDCR);
1107
1108 if (use_demodulator)
1109 val |= IT85_RXEND;
1110
1111 val |= allowance_bits;
1112
1113 it8709_wr(dev, val, IT85_C0RCR);
1114
1115 /* program the C0TCR register */
1116 val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW;
1117 val |= pulse_width_bits;
1118 it8709_wr(dev, val, IT85_C0TCR);
1119}
1120
1121/* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
1122 * held */
1123static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
1124{
1125 int fifo, read = 0;
1126
1127 ite_dbg("%s called", __func__);
1128
1129 /* read how many bytes are still in the FIFO */
1130 fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC;
1131
1132 while (fifo > 0 && buf_size > 0) {
1133 *(buf++) = it8709_rm(dev, IT8709_FIFO + read);
1134 fifo--;
1135 read++;
1136 buf_size--;
1137 }
1138
1139 /* 'clear' the FIFO by setting the writing index to 0; this is
1140 * completely bound to be racy, but we can't help it, since it's a
1141 * limitation of the protocol */
1142 it8709_wm(dev, 0, IT8709_RFSR);
1143
1144 return read;
1145}
1146
1147/* return how many bytes are still in the FIFO; this will be called
1148 * with the device spinlock NOT HELD while waiting for the TX FIFO to get
1149 * empty; let's expect this won't be a problem */
1150static int it8709_get_tx_used_slots(struct ite_dev *dev)
1151{
1152 ite_dbg("%s called", __func__);
1153
1154 return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC;
1155}
1156
1157/* put a byte to the TX fifo; this should be called with the spinlock held */
1158static void it8709_put_tx_byte(struct ite_dev *dev, u8 value)
1159{
1160 it8709_wr(dev, value, IT85_C0DR);
1161}
1162
1163/* idle the receiver so that we won't receive samples until another
1164 pulse is detected; this must be called with the device spinlock held */
1165static void it8709_idle_rx(struct ite_dev *dev)
1166{
1167 ite_dbg("%s called", __func__);
1168
1169 /* disable streaming by clearing RXACT writing it as 1 */
1170 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT,
1171 IT85_C0RCR);
1172
1173 /* clear the FIFO */
1174 it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR,
1175 IT85_C0MSTCR);
1176}
1177
1178/* disable the receiver; this must be called with the device spinlock held */
1179static void it8709_disable_rx(struct ite_dev *dev)
1180{
1181 ite_dbg("%s called", __func__);
1182
1183 /* disable the receiver interrupts */
1184 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1185 ~(IT85_RDAIE | IT85_RFOIE),
1186 IT85_C0IER);
1187
1188 /* disable the receiver */
1189 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN,
1190 IT85_C0RCR);
1191
1192 /* clear the FIFO and RXACT (actually RXACT should have been cleared
1193 * in the previous it8709_wr(dev, ) call) */
1194 it8709_idle_rx(dev);
1195}
1196
1197/* enable the receiver; this must be called with the device spinlock held */
1198static void it8709_enable_rx(struct ite_dev *dev)
1199{
1200 ite_dbg("%s called", __func__);
1201
1202 /* enable the receiver by setting RXEN */
1203 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN,
1204 IT85_C0RCR);
1205
1206 /* just prepare it to idle for the next reception */
1207 it8709_idle_rx(dev);
1208
1209 /* enable the receiver interrupts and master enable flag */
1210 it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1211 |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
1212 IT85_C0IER);
1213}
1214
1215/* disable the transmitter interrupt; this must be called with the device
1216 * spinlock held */
1217static void it8709_disable_tx_interrupt(struct ite_dev *dev)
1218{
1219 ite_dbg("%s called", __func__);
1220
1221 /* disable the transmitter interrupts */
1222 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE,
1223 IT85_C0IER);
1224}
1225
1226/* enable the transmitter interrupt; this must be called with the device
1227 * spinlock held */
1228static void it8709_enable_tx_interrupt(struct ite_dev *dev)
1229{
1230 ite_dbg("%s called", __func__);
1231
1232 /* enable the transmitter interrupts and master enable flag */
1233 it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1234 |IT85_TLDLIE | IT85_IEC,
1235 IT85_C0IER);
1236}
1237
1238/* disable the device; this must be called with the device spinlock held */
1239static void it8709_disable(struct ite_dev *dev)
1240{
1241 ite_dbg("%s called", __func__);
1242
1243 /* clear out all interrupt enable flags */
f0c1629d
JW		 1244 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1245 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
1246 IT85_C0IER);
620a32bb
JGS		 1247
1248 /* disable the receiver */
1249 it8709_disable_rx(dev);
1250
1251 /* erase the FIFO */
1252 it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR),
1253 IT85_C0MSTCR);
1254}
1255
1256/* initialize the hardware */
1257static void it8709_init_hardware(struct ite_dev *dev)
1258{
1259 ite_dbg("%s called", __func__);
1260
1261 /* disable all the interrupts */
f0c1629d
JW		 1262 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1263 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
1264 IT85_C0IER);
620a32bb
JGS		 1265
1266 /* program the baud rate divisor */
1267 it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR);
1268 it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
1269 IT85_C0BDHR);
1270
1271 /* program the C0MSTCR register defaults */
f0c1629d
JW		 1272 it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) &
1273 ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL
1274 | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT,
1275 IT85_C0MSTCR);
620a32bb
JGS		 1276
1277 /* program the C0RCR register defaults */
f0c1629d
JW		 1278 it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) &
1279 ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT
1280 | IT85_RXDCR)) | ITE_RXDCR_DEFAULT,
1281 IT85_C0RCR);
620a32bb
JGS		 1282
1283 /* program the C0TCR register defaults */
f0c1629d
JW		 1284 it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW))
1285 | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT
1286 | IT85_TXMPW_DEFAULT,
1287 IT85_C0TCR);
620a32bb
JGS		 1288
1289 /* program the carrier parameters */
1290 ite_set_carrier_params(dev);
1291}
1292
1293
1294/* generic hardware setup/teardown code */
1295
1296/* activate the device for use */
1297static int ite_open(struct rc_dev *rcdev)
1298{
1299 struct ite_dev *dev = rcdev->priv;
1300 unsigned long flags;
1301
1302 ite_dbg("%s called", __func__);
1303
1304 spin_lock_irqsave(&dev->lock, flags);
1305 dev->in_use = true;
1306
1307 /* enable the receiver */
1308 dev->params.enable_rx(dev);
1309
1310 spin_unlock_irqrestore(&dev->lock, flags);
1311
1312 return 0;
1313}
1314
1315/* deactivate the device for use */
1316static void ite_close(struct rc_dev *rcdev)
1317{
1318 struct ite_dev *dev = rcdev->priv;
1319 unsigned long flags;
1320
1321 ite_dbg("%s called", __func__);
1322
1323 spin_lock_irqsave(&dev->lock, flags);
1324 dev->in_use = false;
1325
1326 /* wait for any transmission to end */
1327 spin_unlock_irqrestore(&dev->lock, flags);
1328 wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1329 spin_lock_irqsave(&dev->lock, flags);
1330
1331 dev->params.disable(dev);
1332
1333 spin_unlock_irqrestore(&dev->lock, flags);
1334}
1335
1336/* supported models and their parameters */
1337static const struct ite_dev_params ite_dev_descs[] = {
1338 { /* 0: ITE8704 */
1339 .model = "ITE8704 CIR transceiver",
1340 .io_region_size = IT87_IOREG_LENGTH,
35d136c8 1341 .io_rsrc_no = 0,
620a32bb
JGS		 1342 .hw_tx_capable = true,
1343 .sample_period = (u32) (1000000000ULL / 115200),
1344 .tx_carrier_freq = 38000,
1345 .tx_duty_cycle = 33,
1346 .rx_low_carrier_freq = 0,
1347 .rx_high_carrier_freq = 0,
1348
1349 /* operations */
1350 .get_irq_causes = it87_get_irq_causes,
1351 .enable_rx = it87_enable_rx,
1352 .idle_rx = it87_idle_rx,
1353 .disable_rx = it87_idle_rx,
1354 .get_rx_bytes = it87_get_rx_bytes,
1355 .enable_tx_interrupt = it87_enable_tx_interrupt,
1356 .disable_tx_interrupt = it87_disable_tx_interrupt,
1357 .get_tx_used_slots = it87_get_tx_used_slots,
1358 .put_tx_byte = it87_put_tx_byte,
1359 .disable = it87_disable,
1360 .init_hardware = it87_init_hardware,
1361 .set_carrier_params = it87_set_carrier_params,
1362 },
1363 { /* 1: ITE8713 */
1364 .model = "ITE8713 CIR transceiver",
1365 .io_region_size = IT87_IOREG_LENGTH,
35d136c8 1366 .io_rsrc_no = 0,
620a32bb
JGS		 1367 .hw_tx_capable = true,
1368 .sample_period = (u32) (1000000000ULL / 115200),
1369 .tx_carrier_freq = 38000,
1370 .tx_duty_cycle = 33,
1371 .rx_low_carrier_freq = 0,
1372 .rx_high_carrier_freq = 0,
1373
1374 /* operations */
1375 .get_irq_causes = it87_get_irq_causes,
1376 .enable_rx = it87_enable_rx,
1377 .idle_rx = it87_idle_rx,
1378 .disable_rx = it87_idle_rx,
1379 .get_rx_bytes = it87_get_rx_bytes,
1380 .enable_tx_interrupt = it87_enable_tx_interrupt,
1381 .disable_tx_interrupt = it87_disable_tx_interrupt,
1382 .get_tx_used_slots = it87_get_tx_used_slots,
1383 .put_tx_byte = it87_put_tx_byte,
1384 .disable = it87_disable,
1385 .init_hardware = it87_init_hardware,
1386 .set_carrier_params = it87_set_carrier_params,
1387 },
1388 { /* 2: ITE8708 */
1389 .model = "ITE8708 CIR transceiver",
1390 .io_region_size = IT8708_IOREG_LENGTH,
35d136c8 1391 .io_rsrc_no = 0,
620a32bb
JGS		 1392 .hw_tx_capable = true,
1393 .sample_period = (u32) (1000000000ULL / 115200),
1394 .tx_carrier_freq = 38000,
1395 .tx_duty_cycle = 33,
1396 .rx_low_carrier_freq = 0,
1397 .rx_high_carrier_freq = 0,
1398
1399 /* operations */
1400 .get_irq_causes = it8708_get_irq_causes,
1401 .enable_rx = it8708_enable_rx,
1402 .idle_rx = it8708_idle_rx,
1403 .disable_rx = it8708_idle_rx,
1404 .get_rx_bytes = it8708_get_rx_bytes,
1405 .enable_tx_interrupt = it8708_enable_tx_interrupt,
1406 .disable_tx_interrupt =
1407 it8708_disable_tx_interrupt,
1408 .get_tx_used_slots = it8708_get_tx_used_slots,
1409 .put_tx_byte = it8708_put_tx_byte,
1410 .disable = it8708_disable,
1411 .init_hardware = it8708_init_hardware,
1412 .set_carrier_params = it8708_set_carrier_params,
1413 },
1414 { /* 3: ITE8709 */
1415 .model = "ITE8709 CIR transceiver",
1416 .io_region_size = IT8709_IOREG_LENGTH,
35d136c8 1417 .io_rsrc_no = 2,
620a32bb
JGS		 1418 .hw_tx_capable = true,
1419 .sample_period = (u32) (1000000000ULL / 115200),
1420 .tx_carrier_freq = 38000,
1421 .tx_duty_cycle = 33,
1422 .rx_low_carrier_freq = 0,
1423 .rx_high_carrier_freq = 0,
1424
1425 /* operations */
1426 .get_irq_causes = it8709_get_irq_causes,
1427 .enable_rx = it8709_enable_rx,
1428 .idle_rx = it8709_idle_rx,
1429 .disable_rx = it8709_idle_rx,
1430 .get_rx_bytes = it8709_get_rx_bytes,
1431 .enable_tx_interrupt = it8709_enable_tx_interrupt,
1432 .disable_tx_interrupt =
1433 it8709_disable_tx_interrupt,
1434 .get_tx_used_slots = it8709_get_tx_used_slots,
1435 .put_tx_byte = it8709_put_tx_byte,
1436 .disable = it8709_disable,
1437 .init_hardware = it8709_init_hardware,
1438 .set_carrier_params = it8709_set_carrier_params,
1439 },
1440};
1441
1442static const struct pnp_device_id ite_ids[] = {
1443 {"ITE8704", 0}, /* Default model */
1444 {"ITE8713", 1}, /* CIR found in EEEBox 1501U */
1445 {"ITE8708", 2}, /* Bridged IT8512 */
1446 {"ITE8709", 3}, /* SRAM-Bridged IT8512 */
1447 {"", 0},
1448};
1449
1450/* allocate memory, probe hardware, and initialize everything */
1451static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
1452 *dev_id)
1453{
1454 const struct ite_dev_params *dev_desc = NULL;
1455 struct ite_dev *itdev = NULL;
1456 struct rc_dev *rdev = NULL;
1457 int ret = -ENOMEM;
1458 int model_no;
35d136c8 1459 int io_rsrc_no;
620a32bb
JGS		 1460
1461 ite_dbg("%s called", __func__);
1462
1463 itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL);
1464 if (!itdev)
1465 return ret;
1466
1467 /* input device for IR remote (and tx) */
0f7499fd 1468 rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
620a32bb 1469 if (!rdev)
70ef6991 1470 goto exit_free_dev_rdev;
4b961180 1471 itdev->rdev = rdev;
620a32bb
JGS		 1472
1473 ret = -ENODEV;
1474
1475 /* get the model number */
1476 model_no = (int)dev_id->driver_data;
1477 ite_pr(KERN_NOTICE, "Auto-detected model: %s\n",
1478 ite_dev_descs[model_no].model);
1479
1480 if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) {
1481 model_no = model_number;
25ec587c 1482 ite_pr(KERN_NOTICE, "The model has been fixed by a module parameter.");
620a32bb
JGS		 1483 }
1484
1485 ite_pr(KERN_NOTICE, "Using model: %s\n", ite_dev_descs[model_no].model);
1486
1487 /* get the description for the device */
1488 dev_desc = &ite_dev_descs[model_no];
35d136c8 1489 io_rsrc_no = dev_desc->io_rsrc_no;
620a32bb
JGS		 1490
1491 /* validate pnp resources */
35d136c8
JW		 1492 if (!pnp_port_valid(pdev, io_rsrc_no) ||
1493 pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) {
620a32bb 1494 dev_err(&pdev->dev, "IR PNP Port not valid!\n");
70ef6991 1495 goto exit_free_dev_rdev;
620a32bb
JGS		 1496 }
1497
1498 if (!pnp_irq_valid(pdev, 0)) {
1499 dev_err(&pdev->dev, "PNP IRQ not valid!\n");
70ef6991 1500 goto exit_free_dev_rdev;
620a32bb
JGS		 1501 }
1502
1503 /* store resource values */
35d136c8 1504 itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no);
2ccb24ff 1505 itdev->cir_irq = pnp_irq(pdev, 0);
620a32bb
JGS		 1506
1507 /* initialize spinlocks */
1508 spin_lock_init(&itdev->lock);
1509
1510 /* initialize raw event */
1511 init_ir_raw_event(&itdev->rawir);
1512
620a32bb
JGS		 1513 /* set driver data into the pnp device */
1514 pnp_set_drvdata(pdev, itdev);
1515 itdev->pdev = pdev;
1516
1517 /* initialize waitqueues for transmission */
1518 init_waitqueue_head(&itdev->tx_queue);
1519 init_waitqueue_head(&itdev->tx_ended);
1520
1521 /* copy model-specific parameters */
1522 itdev->params = *dev_desc;
1523
1524 /* apply any overrides */
1525 if (sample_period > 0)
1526 itdev->params.sample_period = sample_period;
1527
1528 if (tx_carrier_freq > 0)
1529 itdev->params.tx_carrier_freq = tx_carrier_freq;
1530
1531 if (tx_duty_cycle > 0 && tx_duty_cycle <= 100)
1532 itdev->params.tx_duty_cycle = tx_duty_cycle;
1533
1534 if (rx_low_carrier_freq > 0)
1535 itdev->params.rx_low_carrier_freq = rx_low_carrier_freq;
1536
1537 if (rx_high_carrier_freq > 0)
1538 itdev->params.rx_high_carrier_freq = rx_high_carrier_freq;
1539
1540 /* print out parameters */
1541 ite_pr(KERN_NOTICE, "TX-capable: %d\n", (int)
1542 itdev->params.hw_tx_capable);
1543 ite_pr(KERN_NOTICE, "Sample period (ns): %ld\n", (long)
1544 itdev->params.sample_period);
1545 ite_pr(KERN_NOTICE, "TX carrier frequency (Hz): %d\n", (int)
1546 itdev->params.tx_carrier_freq);
1547 ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int)
1548 itdev->params.tx_duty_cycle);
1549 ite_pr(KERN_NOTICE, "RX low carrier frequency (Hz): %d\n", (int)
1550 itdev->params.rx_low_carrier_freq);
1551 ite_pr(KERN_NOTICE, "RX high carrier frequency (Hz): %d\n", (int)
1552 itdev->params.rx_high_carrier_freq);
1553
1554 /* set up hardware initial state */
1555 itdev->params.init_hardware(itdev);
1556
1557 /* set up ir-core props */
1558 rdev->priv = itdev;
6d741bfe 1559 rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
620a32bb
JGS		 1560 rdev->open = ite_open;
1561 rdev->close = ite_close;
1562 rdev->s_idle = ite_s_idle;
1563 rdev->s_rx_carrier_range = ite_set_rx_carrier_range;
0630efee
MR		 1564 /* FIFO threshold is 17 bytes, so 17 * 8 samples minimum */
1565 rdev->min_timeout = 17 * 8 * ITE_BAUDRATE_DIVISOR *
1566 itdev->params.sample_period;
1567 rdev->timeout = IR_DEFAULT_TIMEOUT;
1568 rdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
620a32bb
JGS		 1569 rdev->rx_resolution = ITE_BAUDRATE_DIVISOR *
1570 itdev->params.sample_period;
1571 rdev->tx_resolution = ITE_BAUDRATE_DIVISOR *
1572 itdev->params.sample_period;
1573
1574 /* set up transmitter related values if needed */
1575 if (itdev->params.hw_tx_capable) {
1576 rdev->tx_ir = ite_tx_ir;
1577 rdev->s_tx_carrier = ite_set_tx_carrier;
1578 rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle;
1579 }
1580
518f4b26 1581 rdev->device_name = dev_desc->model;
620a32bb
JGS		 1582 rdev->input_id.bustype = BUS_HOST;
1583 rdev->input_id.vendor = PCI_VENDOR_ID_ITE;
1584 rdev->input_id.product = 0;
1585 rdev->input_id.version = 0;
1586 rdev->driver_name = ITE_DRIVER_NAME;
1587 rdev->map_name = RC_MAP_RC6_MCE;
1588
9fa35204
MK		 1589 ret = rc_register_device(rdev);
1590 if (ret)
1591 goto exit_free_dev_rdev;
1592
9ef449c6
LH		 1593 ret = -EBUSY;
1594 /* now claim resources */
1595 if (!request_region(itdev->cir_addr,
1596 dev_desc->io_region_size, ITE_DRIVER_NAME))
9fa35204 1597 goto exit_unregister_device;
9ef449c6
LH		 1598
1599 if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED,
1600 ITE_DRIVER_NAME, (void *)itdev))
70ef6991 1601 goto exit_release_cir_addr;
9ef449c6 1602
620a32bb
JGS		 1603 ite_pr(KERN_NOTICE, "driver has been successfully loaded\n");
1604
1605 return 0;
1606
70ef6991 1607exit_release_cir_addr:
f27b853e 1608 release_region(itdev->cir_addr, itdev->params.io_region_size);
9fa35204
MK		 1609exit_unregister_device:
1610 rc_unregister_device(rdev);
408208fb 1611 rdev = NULL;
70ef6991 1612exit_free_dev_rdev:
620a32bb
JGS		 1613 rc_free_device(rdev);
1614 kfree(itdev);
1615
1616 return ret;
1617}
1618
4c62e976 1619static void ite_remove(struct pnp_dev *pdev)
620a32bb
JGS		 1620{
1621 struct ite_dev *dev = pnp_get_drvdata(pdev);
1622 unsigned long flags;
1623
1624 ite_dbg("%s called", __func__);
1625
1626 spin_lock_irqsave(&dev->lock, flags);
1627
1628 /* disable hardware */
1629 dev->params.disable(dev);
1630
1631 spin_unlock_irqrestore(&dev->lock, flags);
1632
1633 /* free resources */
1634 free_irq(dev->cir_irq, dev);
1635 release_region(dev->cir_addr, dev->params.io_region_size);
1636
1637 rc_unregister_device(dev->rdev);
1638
1639 kfree(dev);
1640}
1641
1642static int ite_suspend(struct pnp_dev *pdev, pm_message_t state)
1643{
1644 struct ite_dev *dev = pnp_get_drvdata(pdev);
1645 unsigned long flags;
1646
1647 ite_dbg("%s called", __func__);
1648
c8120454
JW		 1649 /* wait for any transmission to end */
1650 wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1651
620a32bb
JGS		 1652 spin_lock_irqsave(&dev->lock, flags);
1653
1654 /* disable all interrupts */
1655 dev->params.disable(dev);
1656
1657 spin_unlock_irqrestore(&dev->lock, flags);
1658
1659 return 0;
1660}
1661
1662static int ite_resume(struct pnp_dev *pdev)
1663{
620a32bb
JGS		 1664 struct ite_dev *dev = pnp_get_drvdata(pdev);
1665 unsigned long flags;
1666
1667 ite_dbg("%s called", __func__);
1668
1669 spin_lock_irqsave(&dev->lock, flags);
1670
c8120454
JW		 1671 /* reinitialize hardware config registers */
1672 dev->params.init_hardware(dev);
1673 /* enable the receiver */
1674 dev->params.enable_rx(dev);
620a32bb
JGS		 1675
1676 spin_unlock_irqrestore(&dev->lock, flags);
1677
fc823729 1678 return 0;
620a32bb
JGS		 1679}
1680
1681static void ite_shutdown(struct pnp_dev *pdev)
1682{
1683 struct ite_dev *dev = pnp_get_drvdata(pdev);
1684 unsigned long flags;
1685
1686 ite_dbg("%s called", __func__);
1687
1688 spin_lock_irqsave(&dev->lock, flags);
1689
1690 /* disable all interrupts */
1691 dev->params.disable(dev);
1692
1693 spin_unlock_irqrestore(&dev->lock, flags);
1694}
1695
1696static struct pnp_driver ite_driver = {
1697 .name = ITE_DRIVER_NAME,
1698 .id_table = ite_ids,
1699 .probe = ite_probe,
4c62e976 1700 .remove = ite_remove,
620a32bb
JGS		 1701 .suspend = ite_suspend,
1702 .resume = ite_resume,
1703 .shutdown = ite_shutdown,
1704};
1705
620a32bb
JGS		 1706MODULE_DEVICE_TABLE(pnp, ite_ids);
1707MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver");
1708
1709MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>");
1710MODULE_LICENSE("GPL");
1711
af638a04 1712module_pnp_driver(ite_driver);
Linux 6.x block layer and io_uring tree(s)