[media] s5p-mfc: Prepare driver for callback based re-architecture
[linux-2.6-block.git] / drivers / media / platform / s5p-mfc / s5p_mfc_enc.c
CommitLineData
af935746 1/*
2c3fb08b 2 * linux/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
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3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
6 *
7 * Jeongtae Park <jtp.park@samsung.com>
8 * Kamil Debski <k.debski@samsung.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#include <linux/clk.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/sched.h>
22#include <linux/version.h>
23#include <linux/videodev2.h>
f9f715a9 24#include <media/v4l2-event.h>
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25#include <linux/workqueue.h>
26#include <media/v4l2-ctrls.h>
27#include <media/videobuf2-core.h>
28#include "regs-mfc.h"
29#include "s5p_mfc_common.h"
30#include "s5p_mfc_debug.h"
31#include "s5p_mfc_enc.h"
32#include "s5p_mfc_intr.h"
77a788fc 33#include "s5p_mfc_opr_v5.h"
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34
35static struct s5p_mfc_fmt formats[] = {
36 {
37 .name = "4:2:0 2 Planes 64x32 Tiles",
38 .fourcc = V4L2_PIX_FMT_NV12MT,
39 .codec_mode = S5P_FIMV_CODEC_NONE,
40 .type = MFC_FMT_RAW,
41 .num_planes = 2,
42 },
43 {
44 .name = "4:2:0 2 Planes",
45 .fourcc = V4L2_PIX_FMT_NV12M,
46 .codec_mode = S5P_FIMV_CODEC_NONE,
47 .type = MFC_FMT_RAW,
48 .num_planes = 2,
49 },
50 {
51 .name = "H264 Encoded Stream",
52 .fourcc = V4L2_PIX_FMT_H264,
53 .codec_mode = S5P_FIMV_CODEC_H264_ENC,
54 .type = MFC_FMT_ENC,
55 .num_planes = 1,
56 },
57 {
58 .name = "MPEG4 Encoded Stream",
59 .fourcc = V4L2_PIX_FMT_MPEG4,
60 .codec_mode = S5P_FIMV_CODEC_MPEG4_ENC,
61 .type = MFC_FMT_ENC,
62 .num_planes = 1,
63 },
64 {
a626f394 65 .name = "H263 Encoded Stream",
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66 .fourcc = V4L2_PIX_FMT_H263,
67 .codec_mode = S5P_FIMV_CODEC_H263_ENC,
68 .type = MFC_FMT_ENC,
69 .num_planes = 1,
70 },
71};
72
73#define NUM_FORMATS ARRAY_SIZE(formats)
74static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t)
75{
76 unsigned int i;
77
78 for (i = 0; i < NUM_FORMATS; i++) {
79 if (formats[i].fourcc == f->fmt.pix_mp.pixelformat &&
80 formats[i].type == t)
81 return &formats[i];
82 }
83 return NULL;
84}
85
86static struct mfc_control controls[] = {
87 {
88 .id = V4L2_CID_MPEG_VIDEO_GOP_SIZE,
89 .type = V4L2_CTRL_TYPE_INTEGER,
90 .minimum = 0,
91 .maximum = (1 << 16) - 1,
92 .step = 1,
93 .default_value = 0,
94 },
95 {
96 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
97 .type = V4L2_CTRL_TYPE_MENU,
98 .minimum = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
99 .maximum = V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES,
100 .default_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
101 .menu_skip_mask = 0,
102 },
103 {
104 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB,
105 .type = V4L2_CTRL_TYPE_INTEGER,
106 .minimum = 1,
107 .maximum = (1 << 16) - 1,
108 .step = 1,
109 .default_value = 1,
110 },
111 {
112 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES,
113 .type = V4L2_CTRL_TYPE_INTEGER,
114 .minimum = 1900,
115 .maximum = (1 << 30) - 1,
116 .step = 1,
117 .default_value = 1900,
118 },
119 {
120 .id = V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB,
121 .type = V4L2_CTRL_TYPE_INTEGER,
122 .minimum = 0,
123 .maximum = (1 << 16) - 1,
124 .step = 1,
125 .default_value = 0,
126 },
127 {
128 .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING,
129 .type = V4L2_CTRL_TYPE_BOOLEAN,
130 .name = "Padding Control Enable",
131 .minimum = 0,
132 .maximum = 1,
133 .step = 1,
134 .default_value = 0,
135 },
136 {
137 .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV,
138 .type = V4L2_CTRL_TYPE_INTEGER,
139 .name = "Padding Color YUV Value",
140 .minimum = 0,
141 .maximum = (1 << 25) - 1,
142 .step = 1,
143 .default_value = 0,
144 },
145 {
146 .id = V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE,
147 .type = V4L2_CTRL_TYPE_BOOLEAN,
148 .minimum = 0,
149 .maximum = 1,
150 .step = 1,
151 .default_value = 0,
152 },
153 {
154 .id = V4L2_CID_MPEG_VIDEO_BITRATE,
155 .type = V4L2_CTRL_TYPE_INTEGER,
156 .minimum = 1,
157 .maximum = (1 << 30) - 1,
158 .step = 1,
159 .default_value = 1,
160 },
161 {
162 .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF,
163 .type = V4L2_CTRL_TYPE_INTEGER,
164 .name = "Rate Control Reaction Coeff.",
165 .minimum = 1,
166 .maximum = (1 << 16) - 1,
167 .step = 1,
168 .default_value = 1,
169 },
170 {
171 .id = V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE,
172 .type = V4L2_CTRL_TYPE_MENU,
173 .name = "Force frame type",
174 .minimum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED,
175 .maximum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED,
176 .default_value = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED,
177 .menu_skip_mask = 0,
178 },
179 {
180 .id = V4L2_CID_MPEG_VIDEO_VBV_SIZE,
181 .type = V4L2_CTRL_TYPE_INTEGER,
182 .minimum = 0,
183 .maximum = (1 << 16) - 1,
184 .step = 1,
185 .default_value = 0,
186 },
187 {
188 .id = V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE,
189 .type = V4L2_CTRL_TYPE_INTEGER,
190 .minimum = 0,
191 .maximum = (1 << 16) - 1,
192 .step = 1,
193 .default_value = 0,
194 },
195 {
196 .id = V4L2_CID_MPEG_VIDEO_HEADER_MODE,
197 .type = V4L2_CTRL_TYPE_MENU,
198 .minimum = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
199 .maximum = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
200 .default_value = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
201 .menu_skip_mask = 0,
202 },
203 {
204 .id = V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE,
205 .type = V4L2_CTRL_TYPE_MENU,
206 .name = "Frame Skip Enable",
207 .minimum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED,
208 .maximum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT,
209 .menu_skip_mask = 0,
210 .default_value = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED,
211 },
212 {
213 .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT,
214 .type = V4L2_CTRL_TYPE_BOOLEAN,
215 .name = "Fixed Target Bit Enable",
216 .minimum = 0,
217 .maximum = 1,
218 .default_value = 0,
219 .menu_skip_mask = 0,
220 },
221 {
222 .id = V4L2_CID_MPEG_VIDEO_B_FRAMES,
223 .type = V4L2_CTRL_TYPE_INTEGER,
224 .minimum = 0,
225 .maximum = 2,
226 .step = 1,
227 .default_value = 0,
228 },
229 {
230 .id = V4L2_CID_MPEG_VIDEO_H264_PROFILE,
231 .type = V4L2_CTRL_TYPE_MENU,
232 .minimum = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
233 .maximum = V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH,
234 .default_value = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
235 .menu_skip_mask = ~(
236 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
237 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
238 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_HIGH)
239 ),
240 },
241 {
242 .id = V4L2_CID_MPEG_VIDEO_H264_LEVEL,
243 .type = V4L2_CTRL_TYPE_MENU,
244 .minimum = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
245 .maximum = V4L2_MPEG_VIDEO_H264_LEVEL_4_0,
246 .default_value = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
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247 },
248 {
249 .id = V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL,
250 .type = V4L2_CTRL_TYPE_MENU,
251 .minimum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0,
252 .maximum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_5,
253 .default_value = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0,
254 .menu_skip_mask = 0,
255 },
256 {
257 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
258 .type = V4L2_CTRL_TYPE_MENU,
259 .minimum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
260 .maximum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY,
261 .default_value = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
262 .menu_skip_mask = 0,
263 },
264 {
265 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA,
266 .type = V4L2_CTRL_TYPE_INTEGER,
267 .minimum = -6,
268 .maximum = 6,
269 .step = 1,
270 .default_value = 0,
271 },
272 {
273 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA,
274 .type = V4L2_CTRL_TYPE_INTEGER,
275 .minimum = -6,
276 .maximum = 6,
277 .step = 1,
278 .default_value = 0,
279 },
280 {
281 .id = V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE,
282 .type = V4L2_CTRL_TYPE_MENU,
283 .minimum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
284 .maximum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
285 .default_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
286 .menu_skip_mask = 0,
287 },
288 {
289 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P,
290 .type = V4L2_CTRL_TYPE_INTEGER,
291 .name = "The Number of Ref. Pic for P",
292 .minimum = 1,
293 .maximum = 2,
294 .step = 1,
295 .default_value = 1,
296 },
297 {
298 .id = V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM,
299 .type = V4L2_CTRL_TYPE_BOOLEAN,
300 .minimum = 0,
301 .maximum = 1,
302 .step = 1,
303 .default_value = 0,
304 },
305 {
306 .id = V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE,
307 .type = V4L2_CTRL_TYPE_BOOLEAN,
308 .minimum = 0,
309 .maximum = 1,
310 .step = 1,
311 .default_value = 0,
312 },
313 {
314 .id = V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP,
315 .type = V4L2_CTRL_TYPE_INTEGER,
316 .minimum = 0,
317 .maximum = 51,
318 .step = 1,
319 .default_value = 1,
320 },
321 {
322 .id = V4L2_CID_MPEG_VIDEO_H264_MIN_QP,
323 .type = V4L2_CTRL_TYPE_INTEGER,
324 .minimum = 0,
325 .maximum = 51,
326 .step = 1,
327 .default_value = 1,
328 },
329 {
330 .id = V4L2_CID_MPEG_VIDEO_H264_MAX_QP,
331 .type = V4L2_CTRL_TYPE_INTEGER,
332 .minimum = 0,
333 .maximum = 51,
334 .step = 1,
335 .default_value = 1,
336 },
337 {
338 .id = V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP,
339 .type = V4L2_CTRL_TYPE_INTEGER,
340 .minimum = 0,
341 .maximum = 51,
342 .step = 1,
343 .default_value = 1,
344 },
345 {
346 .id = V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP,
347 .type = V4L2_CTRL_TYPE_INTEGER,
348 .minimum = 0,
349 .maximum = 51,
350 .step = 1,
351 .default_value = 1,
352 },
353 {
354 .id = V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP,
355 .type = V4L2_CTRL_TYPE_INTEGER,
356 .name = "H263 I-Frame QP value",
357 .minimum = 1,
358 .maximum = 31,
359 .step = 1,
360 .default_value = 1,
361 },
362 {
363 .id = V4L2_CID_MPEG_VIDEO_H263_MIN_QP,
364 .type = V4L2_CTRL_TYPE_INTEGER,
365 .name = "H263 Minimum QP value",
366 .minimum = 1,
367 .maximum = 31,
368 .step = 1,
369 .default_value = 1,
370 },
371 {
372 .id = V4L2_CID_MPEG_VIDEO_H263_MAX_QP,
373 .type = V4L2_CTRL_TYPE_INTEGER,
374 .name = "H263 Maximum QP value",
375 .minimum = 1,
376 .maximum = 31,
377 .step = 1,
378 .default_value = 1,
379 },
380 {
381 .id = V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP,
382 .type = V4L2_CTRL_TYPE_INTEGER,
383 .name = "H263 P frame QP value",
384 .minimum = 1,
385 .maximum = 31,
386 .step = 1,
387 .default_value = 1,
388 },
389 {
390 .id = V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP,
391 .type = V4L2_CTRL_TYPE_INTEGER,
392 .name = "H263 B frame QP value",
393 .minimum = 1,
394 .maximum = 31,
395 .step = 1,
396 .default_value = 1,
397 },
398 {
399 .id = V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP,
400 .type = V4L2_CTRL_TYPE_INTEGER,
401 .name = "MPEG4 I-Frame QP value",
402 .minimum = 1,
403 .maximum = 31,
404 .step = 1,
405 .default_value = 1,
406 },
407 {
408 .id = V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP,
409 .type = V4L2_CTRL_TYPE_INTEGER,
410 .name = "MPEG4 Minimum QP value",
411 .minimum = 1,
412 .maximum = 31,
413 .step = 1,
414 .default_value = 1,
415 },
416 {
417 .id = V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP,
418 .type = V4L2_CTRL_TYPE_INTEGER,
419 .name = "MPEG4 Maximum QP value",
420 .minimum = 0,
421 .maximum = 51,
422 .step = 1,
423 .default_value = 1,
424 },
425 {
426 .id = V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP,
427 .type = V4L2_CTRL_TYPE_INTEGER,
428 .name = "MPEG4 P frame QP value",
429 .minimum = 1,
430 .maximum = 31,
431 .step = 1,
432 .default_value = 1,
433 },
434 {
435 .id = V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP,
436 .type = V4L2_CTRL_TYPE_INTEGER,
437 .name = "MPEG4 B frame QP value",
438 .minimum = 1,
439 .maximum = 31,
440 .step = 1,
441 .default_value = 1,
442 },
443 {
444 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK,
445 .type = V4L2_CTRL_TYPE_BOOLEAN,
446 .name = "H264 Dark Reg Adaptive RC",
447 .minimum = 0,
448 .maximum = 1,
449 .step = 1,
450 .default_value = 0,
451 },
452 {
453 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH,
454 .type = V4L2_CTRL_TYPE_BOOLEAN,
455 .name = "H264 Smooth Reg Adaptive RC",
456 .minimum = 0,
457 .maximum = 1,
458 .step = 1,
459 .default_value = 0,
460 },
461 {
462 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC,
463 .type = V4L2_CTRL_TYPE_BOOLEAN,
464 .name = "H264 Static Reg Adaptive RC",
465 .minimum = 0,
466 .maximum = 1,
467 .step = 1,
468 .default_value = 0,
469 },
470 {
471 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY,
472 .type = V4L2_CTRL_TYPE_BOOLEAN,
473 .name = "H264 Activity Reg Adaptive RC",
474 .minimum = 0,
475 .maximum = 1,
476 .step = 1,
477 .default_value = 0,
478 },
479 {
480 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE,
481 .type = V4L2_CTRL_TYPE_BOOLEAN,
482 .minimum = 0,
483 .maximum = 1,
484 .step = 1,
485 .default_value = 0,
486 },
487 {
488 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC,
489 .type = V4L2_CTRL_TYPE_MENU,
490 .minimum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED,
491 .maximum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED,
afd14f48 492 .default_value = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED,
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493 .menu_skip_mask = 0,
494 },
495 {
496 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH,
497 .type = V4L2_CTRL_TYPE_INTEGER,
498 .minimum = 0,
499 .maximum = (1 << 16) - 1,
500 .step = 1,
501 .default_value = 0,
502 },
503 {
504 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT,
505 .type = V4L2_CTRL_TYPE_INTEGER,
506 .minimum = 0,
507 .maximum = (1 << 16) - 1,
508 .step = 1,
509 .default_value = 0,
510 },
511 {
512 .id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE,
513 .type = V4L2_CTRL_TYPE_BOOLEAN,
514 .minimum = 0,
515 .maximum = 1,
516 .step = 1,
517 .default_value = 1,
518 },
519 {
520 .id = V4L2_CID_MPEG_VIDEO_H264_I_PERIOD,
521 .type = V4L2_CTRL_TYPE_INTEGER,
522 .minimum = 0,
523 .maximum = (1 << 16) - 1,
524 .step = 1,
525 .default_value = 0,
526 },
527 {
528 .id = V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE,
529 .type = V4L2_CTRL_TYPE_MENU,
530 .minimum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE,
531 .maximum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE,
afd14f48 532 .default_value = V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE,
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533 .menu_skip_mask = 0,
534 },
535 {
536 .id = V4L2_CID_MPEG_VIDEO_MPEG4_QPEL,
537 .type = V4L2_CTRL_TYPE_BOOLEAN,
538 .minimum = 0,
539 .maximum = 1,
540 .step = 1,
541 .default_value = 0,
542 },
543};
544
545#define NUM_CTRLS ARRAY_SIZE(controls)
546static const char * const *mfc51_get_menu(u32 id)
547{
548 static const char * const mfc51_video_frame_skip[] = {
549 "Disabled",
550 "Level Limit",
551 "VBV/CPB Limit",
552 NULL,
553 };
554 static const char * const mfc51_video_force_frame[] = {
555 "Disabled",
556 "I Frame",
557 "Not Coded",
558 NULL,
559 };
560 switch (id) {
561 case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE:
562 return mfc51_video_frame_skip;
563 case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE:
564 return mfc51_video_force_frame;
565 }
566 return NULL;
567}
568
569static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx)
570{
571 mfc_debug(2, "src=%d, dst=%d, state=%d\n",
572 ctx->src_queue_cnt, ctx->dst_queue_cnt, ctx->state);
573 /* context is ready to make header */
574 if (ctx->state == MFCINST_GOT_INST && ctx->dst_queue_cnt >= 1)
575 return 1;
576 /* context is ready to encode a frame */
577 if (ctx->state == MFCINST_RUNNING &&
578 ctx->src_queue_cnt >= 1 && ctx->dst_queue_cnt >= 1)
579 return 1;
f9f715a9 580 /* context is ready to encode remaining frames */
af935746 581 if (ctx->state == MFCINST_FINISHING &&
f9f715a9 582 ctx->dst_queue_cnt >= 1)
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583 return 1;
584 mfc_debug(2, "ctx is not ready\n");
585 return 0;
586}
587
588static void cleanup_ref_queue(struct s5p_mfc_ctx *ctx)
589{
590 struct s5p_mfc_buf *mb_entry;
591 unsigned long mb_y_addr, mb_c_addr;
592
593 /* move buffers in ref queue to src queue */
594 while (!list_empty(&ctx->ref_queue)) {
595 mb_entry = list_entry((&ctx->ref_queue)->next,
596 struct s5p_mfc_buf, list);
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597 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
598 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
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599 list_del(&mb_entry->list);
600 ctx->ref_queue_cnt--;
601 list_add_tail(&mb_entry->list, &ctx->src_queue);
602 ctx->src_queue_cnt++;
603 }
604 mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
605 ctx->src_queue_cnt, ctx->ref_queue_cnt);
606 INIT_LIST_HEAD(&ctx->ref_queue);
607 ctx->ref_queue_cnt = 0;
608}
609
610static int enc_pre_seq_start(struct s5p_mfc_ctx *ctx)
611{
612 struct s5p_mfc_dev *dev = ctx->dev;
613 struct s5p_mfc_buf *dst_mb;
614 unsigned long dst_addr;
615 unsigned int dst_size;
616 unsigned long flags;
617
618 spin_lock_irqsave(&dev->irqlock, flags);
619 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
ba7fcb0c 620 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
af935746
KD
621 dst_size = vb2_plane_size(dst_mb->b, 0);
622 s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
623 spin_unlock_irqrestore(&dev->irqlock, flags);
624 return 0;
625}
626
627static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
628{
629 struct s5p_mfc_dev *dev = ctx->dev;
630 struct s5p_mfc_enc_params *p = &ctx->enc_params;
631 struct s5p_mfc_buf *dst_mb;
632 unsigned long flags;
633
634 if (p->seq_hdr_mode == V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) {
635 spin_lock_irqsave(&dev->irqlock, flags);
636 dst_mb = list_entry(ctx->dst_queue.next,
637 struct s5p_mfc_buf, list);
638 list_del(&dst_mb->list);
639 ctx->dst_queue_cnt--;
640 vb2_set_plane_payload(dst_mb->b, 0,
641 s5p_mfc_get_enc_strm_size());
642 vb2_buffer_done(dst_mb->b, VB2_BUF_STATE_DONE);
643 spin_unlock_irqrestore(&dev->irqlock, flags);
644 }
645 ctx->state = MFCINST_RUNNING;
7fb89eca
AH
646 if (s5p_mfc_ctx_ready(ctx))
647 set_work_bit_irqsave(ctx);
af935746
KD
648 s5p_mfc_try_run(dev);
649 return 0;
650}
651
652static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx)
653{
654 struct s5p_mfc_dev *dev = ctx->dev;
655 struct s5p_mfc_buf *dst_mb;
656 struct s5p_mfc_buf *src_mb;
657 unsigned long flags;
658 unsigned long src_y_addr, src_c_addr, dst_addr;
659 unsigned int dst_size;
660
661 spin_lock_irqsave(&dev->irqlock, flags);
662 src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
ba7fcb0c
MS
663 src_y_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 0);
664 src_c_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 1);
af935746
KD
665 s5p_mfc_set_enc_frame_buffer(ctx, src_y_addr, src_c_addr);
666 spin_unlock_irqrestore(&dev->irqlock, flags);
667
668 spin_lock_irqsave(&dev->irqlock, flags);
669 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
ba7fcb0c 670 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
af935746
KD
671 dst_size = vb2_plane_size(dst_mb->b, 0);
672 s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
673 spin_unlock_irqrestore(&dev->irqlock, flags);
674
675 return 0;
676}
677
678static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
679{
680 struct s5p_mfc_dev *dev = ctx->dev;
681 struct s5p_mfc_buf *mb_entry;
682 unsigned long enc_y_addr, enc_c_addr;
683 unsigned long mb_y_addr, mb_c_addr;
684 int slice_type;
685 unsigned int strm_size;
686 unsigned long flags;
687
688 slice_type = s5p_mfc_get_enc_slice_type();
689 strm_size = s5p_mfc_get_enc_strm_size();
690 mfc_debug(2, "Encoded slice type: %d", slice_type);
691 mfc_debug(2, "Encoded stream size: %d", strm_size);
692 mfc_debug(2, "Display order: %d",
693 mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT));
694 spin_lock_irqsave(&dev->irqlock, flags);
695 if (slice_type >= 0) {
696 s5p_mfc_get_enc_frame_buffer(ctx, &enc_y_addr, &enc_c_addr);
697 list_for_each_entry(mb_entry, &ctx->src_queue, list) {
ba7fcb0c
MS
698 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
699 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
af935746
KD
700 if ((enc_y_addr == mb_y_addr) &&
701 (enc_c_addr == mb_c_addr)) {
702 list_del(&mb_entry->list);
703 ctx->src_queue_cnt--;
704 vb2_buffer_done(mb_entry->b,
705 VB2_BUF_STATE_DONE);
706 break;
707 }
708 }
709 list_for_each_entry(mb_entry, &ctx->ref_queue, list) {
ba7fcb0c
MS
710 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
711 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
af935746
KD
712 if ((enc_y_addr == mb_y_addr) &&
713 (enc_c_addr == mb_c_addr)) {
714 list_del(&mb_entry->list);
715 ctx->ref_queue_cnt--;
716 vb2_buffer_done(mb_entry->b,
717 VB2_BUF_STATE_DONE);
718 break;
719 }
720 }
721 }
722 if ((ctx->src_queue_cnt > 0) && (ctx->state == MFCINST_RUNNING)) {
723 mb_entry = list_entry(ctx->src_queue.next, struct s5p_mfc_buf,
724 list);
f9f715a9 725 if (mb_entry->flags & MFC_BUF_FLAG_USED) {
af935746
KD
726 list_del(&mb_entry->list);
727 ctx->src_queue_cnt--;
728 list_add_tail(&mb_entry->list, &ctx->ref_queue);
729 ctx->ref_queue_cnt++;
730 }
731 mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
732 ctx->src_queue_cnt, ctx->ref_queue_cnt);
733 }
734 if (strm_size > 0) {
735 /* at least one more dest. buffers exist always */
736 mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf,
737 list);
738 list_del(&mb_entry->list);
739 ctx->dst_queue_cnt--;
740 switch (slice_type) {
741 case S5P_FIMV_ENC_SI_SLICE_TYPE_I:
742 mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
743 break;
744 case S5P_FIMV_ENC_SI_SLICE_TYPE_P:
745 mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
746 break;
747 case S5P_FIMV_ENC_SI_SLICE_TYPE_B:
748 mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_BFRAME;
749 break;
750 }
751 vb2_set_plane_payload(mb_entry->b, 0, strm_size);
752 vb2_buffer_done(mb_entry->b, VB2_BUF_STATE_DONE);
753 }
754 spin_unlock_irqrestore(&dev->irqlock, flags);
7fb89eca
AH
755 if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0))
756 clear_work_bit(ctx);
af935746
KD
757 return 0;
758}
759
760static struct s5p_mfc_codec_ops encoder_codec_ops = {
761 .pre_seq_start = enc_pre_seq_start,
762 .post_seq_start = enc_post_seq_start,
763 .pre_frame_start = enc_pre_frame_start,
764 .post_frame_start = enc_post_frame_start,
765};
766
767/* Query capabilities of the device */
768static int vidioc_querycap(struct file *file, void *priv,
769 struct v4l2_capability *cap)
770{
771 struct s5p_mfc_dev *dev = video_drvdata(file);
772
773 strncpy(cap->driver, dev->plat_dev->name, sizeof(cap->driver) - 1);
774 strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1);
775 cap->bus_info[0] = 0;
776 cap->version = KERNEL_VERSION(1, 0, 0);
f0476a83
SN
777 /*
778 * This is only a mem-to-mem video device. The capture and output
779 * device capability flags are left only for backward compatibility
780 * and are scheduled for removal.
781 */
782 cap->capabilities = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING |
783 V4L2_CAP_VIDEO_CAPTURE_MPLANE |
784 V4L2_CAP_VIDEO_OUTPUT_MPLANE;
af935746
KD
785 return 0;
786}
787
788static int vidioc_enum_fmt(struct v4l2_fmtdesc *f, bool mplane, bool out)
789{
790 struct s5p_mfc_fmt *fmt;
791 int i, j = 0;
792
793 for (i = 0; i < ARRAY_SIZE(formats); ++i) {
794 if (mplane && formats[i].num_planes == 1)
795 continue;
796 else if (!mplane && formats[i].num_planes > 1)
797 continue;
798 if (out && formats[i].type != MFC_FMT_RAW)
799 continue;
800 else if (!out && formats[i].type != MFC_FMT_ENC)
801 continue;
802 if (j == f->index) {
803 fmt = &formats[i];
804 strlcpy(f->description, fmt->name,
805 sizeof(f->description));
806 f->pixelformat = fmt->fourcc;
807 return 0;
808 }
809 ++j;
810 }
811 return -EINVAL;
812}
813
814static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv,
815 struct v4l2_fmtdesc *f)
816{
817 return vidioc_enum_fmt(f, false, false);
818}
819
820static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv,
821 struct v4l2_fmtdesc *f)
822{
823 return vidioc_enum_fmt(f, true, false);
824}
825
826static int vidioc_enum_fmt_vid_out(struct file *file, void *prov,
827 struct v4l2_fmtdesc *f)
828{
829 return vidioc_enum_fmt(f, false, true);
830}
831
832static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *prov,
833 struct v4l2_fmtdesc *f)
834{
835 return vidioc_enum_fmt(f, true, true);
836}
837
838static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
839{
840 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
841 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
842
843 mfc_debug(2, "f->type = %d ctx->state = %d\n", f->type, ctx->state);
844 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
845 /* This is run on output (encoder dest) */
846 pix_fmt_mp->width = 0;
847 pix_fmt_mp->height = 0;
848 pix_fmt_mp->field = V4L2_FIELD_NONE;
849 pix_fmt_mp->pixelformat = ctx->dst_fmt->fourcc;
850 pix_fmt_mp->num_planes = ctx->dst_fmt->num_planes;
851
852 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->enc_dst_buf_size;
853 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->enc_dst_buf_size;
854 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
855 /* This is run on capture (encoder src) */
856 pix_fmt_mp->width = ctx->img_width;
857 pix_fmt_mp->height = ctx->img_height;
858
859 pix_fmt_mp->field = V4L2_FIELD_NONE;
860 pix_fmt_mp->pixelformat = ctx->src_fmt->fourcc;
861 pix_fmt_mp->num_planes = ctx->src_fmt->num_planes;
862
863 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
864 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
865 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
866 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
867 } else {
868 mfc_err("invalid buf type\n");
869 return -EINVAL;
870 }
871 return 0;
872}
873
874static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
875{
876 struct s5p_mfc_fmt *fmt;
877 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
878
879 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
880 fmt = find_format(f, MFC_FMT_ENC);
881 if (!fmt) {
882 mfc_err("failed to try output format\n");
883 return -EINVAL;
884 }
885
886 if (pix_fmt_mp->plane_fmt[0].sizeimage == 0) {
887 mfc_err("must be set encoding output size\n");
888 return -EINVAL;
889 }
890
891 pix_fmt_mp->plane_fmt[0].bytesperline =
892 pix_fmt_mp->plane_fmt[0].sizeimage;
893 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
894 fmt = find_format(f, MFC_FMT_RAW);
895 if (!fmt) {
896 mfc_err("failed to try output format\n");
897 return -EINVAL;
898 }
899
900 if (fmt->num_planes != pix_fmt_mp->num_planes) {
901 mfc_err("failed to try output format\n");
902 return -EINVAL;
903 }
0749ae35
AH
904 v4l_bound_align_image(&pix_fmt_mp->width, 8, 1920, 1,
905 &pix_fmt_mp->height, 4, 1080, 1, 0);
af935746
KD
906 } else {
907 mfc_err("invalid buf type\n");
908 return -EINVAL;
909 }
910 return 0;
911}
912
913static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
914{
915 struct s5p_mfc_dev *dev = video_drvdata(file);
916 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
917 struct s5p_mfc_fmt *fmt;
918 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
af935746
KD
919 int ret = 0;
920
921 ret = vidioc_try_fmt(file, priv, f);
922 if (ret)
923 return ret;
924 if (ctx->vq_src.streaming || ctx->vq_dst.streaming) {
925 v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
926 ret = -EBUSY;
927 goto out;
928 }
929 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
930 fmt = find_format(f, MFC_FMT_ENC);
931 if (!fmt) {
932 mfc_err("failed to set capture format\n");
933 return -EINVAL;
934 }
935 ctx->state = MFCINST_INIT;
936 ctx->dst_fmt = fmt;
937 ctx->codec_mode = ctx->dst_fmt->codec_mode;
938 ctx->enc_dst_buf_size = pix_fmt_mp->plane_fmt[0].sizeimage;
939 pix_fmt_mp->plane_fmt[0].bytesperline = 0;
940 ctx->dst_bufs_cnt = 0;
941 ctx->capture_state = QUEUE_FREE;
942 s5p_mfc_alloc_instance_buffer(ctx);
7fb89eca 943 set_work_bit_irqsave(ctx);
af935746
KD
944 s5p_mfc_clean_ctx_int_flags(ctx);
945 s5p_mfc_try_run(dev);
946 if (s5p_mfc_wait_for_done_ctx(ctx, \
947 S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET, 1)) {
948 /* Error or timeout */
949 mfc_err("Error getting instance from hardware\n");
950 s5p_mfc_release_instance_buffer(ctx);
951 ret = -EIO;
952 goto out;
953 }
954 mfc_debug(2, "Got instance number: %d\n", ctx->inst_no);
955 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
956 fmt = find_format(f, MFC_FMT_RAW);
957 if (!fmt) {
958 mfc_err("failed to set output format\n");
959 return -EINVAL;
960 }
961 if (fmt->num_planes != pix_fmt_mp->num_planes) {
962 mfc_err("failed to set output format\n");
963 ret = -EINVAL;
964 goto out;
965 }
966 ctx->src_fmt = fmt;
967 ctx->img_width = pix_fmt_mp->width;
968 ctx->img_height = pix_fmt_mp->height;
969 mfc_debug(2, "codec number: %d\n", ctx->src_fmt->codec_mode);
970 mfc_debug(2, "fmt - w: %d, h: %d, ctx - w: %d, h: %d\n",
971 pix_fmt_mp->width, pix_fmt_mp->height,
972 ctx->img_width, ctx->img_height);
973 if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12M) {
974 ctx->buf_width = ALIGN(ctx->img_width,
975 S5P_FIMV_NV12M_HALIGN);
976 ctx->luma_size = ALIGN(ctx->img_width,
977 S5P_FIMV_NV12M_HALIGN) * ALIGN(ctx->img_height,
978 S5P_FIMV_NV12M_LVALIGN);
979 ctx->chroma_size = ALIGN(ctx->img_width,
980 S5P_FIMV_NV12M_HALIGN) * ALIGN((ctx->img_height
981 >> 1), S5P_FIMV_NV12M_CVALIGN);
982
983 ctx->luma_size = ALIGN(ctx->luma_size,
984 S5P_FIMV_NV12M_SALIGN);
985 ctx->chroma_size = ALIGN(ctx->chroma_size,
986 S5P_FIMV_NV12M_SALIGN);
987
988 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
989 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
990 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
991 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
992
993 } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12MT) {
994 ctx->buf_width = ALIGN(ctx->img_width,
995 S5P_FIMV_NV12MT_HALIGN);
996 ctx->luma_size = ALIGN(ctx->img_width,
997 S5P_FIMV_NV12MT_HALIGN) * ALIGN(ctx->img_height,
998 S5P_FIMV_NV12MT_VALIGN);
999 ctx->chroma_size = ALIGN(ctx->img_width,
1000 S5P_FIMV_NV12MT_HALIGN) * ALIGN((ctx->img_height
1001 >> 1), S5P_FIMV_NV12MT_VALIGN);
1002 ctx->luma_size = ALIGN(ctx->luma_size,
1003 S5P_FIMV_NV12MT_SALIGN);
1004 ctx->chroma_size = ALIGN(ctx->chroma_size,
1005 S5P_FIMV_NV12MT_SALIGN);
1006
1007 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
1008 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
1009 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
1010 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
1011 }
1012 ctx->src_bufs_cnt = 0;
1013 ctx->output_state = QUEUE_FREE;
1014 } else {
1015 mfc_err("invalid buf type\n");
1016 return -EINVAL;
1017 }
1018out:
1019 mfc_debug_leave();
1020 return ret;
1021}
1022
1023static int vidioc_reqbufs(struct file *file, void *priv,
1024 struct v4l2_requestbuffers *reqbufs)
1025{
1026 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1027 int ret = 0;
1028
1029 /* if memory is not mmp or userptr return error */
1030 if ((reqbufs->memory != V4L2_MEMORY_MMAP) &&
1031 (reqbufs->memory != V4L2_MEMORY_USERPTR))
1032 return -EINVAL;
1033 if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1034 if (ctx->capture_state != QUEUE_FREE) {
1035 mfc_err("invalid capture state: %d\n",
1036 ctx->capture_state);
1037 return -EINVAL;
1038 }
1039 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1040 if (ret != 0) {
1041 mfc_err("error in vb2_reqbufs() for E(D)\n");
1042 return ret;
1043 }
1044 ctx->capture_state = QUEUE_BUFS_REQUESTED;
1045 ret = s5p_mfc_alloc_codec_buffers(ctx);
1046 if (ret) {
1047 mfc_err("Failed to allocate encoding buffers\n");
1048 reqbufs->count = 0;
1049 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1050 return -ENOMEM;
1051 }
1052 } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1053 if (ctx->output_state != QUEUE_FREE) {
1054 mfc_err("invalid output state: %d\n",
1055 ctx->output_state);
1056 return -EINVAL;
1057 }
1058 ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
1059 if (ret != 0) {
1060 mfc_err("error in vb2_reqbufs() for E(S)\n");
1061 return ret;
1062 }
1063 ctx->output_state = QUEUE_BUFS_REQUESTED;
1064 } else {
1065 mfc_err("invalid buf type\n");
1066 return -EINVAL;
1067 }
1068 return ret;
1069}
1070
1071static int vidioc_querybuf(struct file *file, void *priv,
1072 struct v4l2_buffer *buf)
1073{
1074 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1075 int ret = 0;
1076
1077 /* if memory is not mmp or userptr return error */
1078 if ((buf->memory != V4L2_MEMORY_MMAP) &&
1079 (buf->memory != V4L2_MEMORY_USERPTR))
1080 return -EINVAL;
1081 if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1082 if (ctx->state != MFCINST_GOT_INST) {
1083 mfc_err("invalid context state: %d\n", ctx->state);
1084 return -EINVAL;
1085 }
1086 ret = vb2_querybuf(&ctx->vq_dst, buf);
1087 if (ret != 0) {
1088 mfc_err("error in vb2_querybuf() for E(D)\n");
1089 return ret;
1090 }
1091 buf->m.planes[0].m.mem_offset += DST_QUEUE_OFF_BASE;
1092 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1093 ret = vb2_querybuf(&ctx->vq_src, buf);
1094 if (ret != 0) {
1095 mfc_err("error in vb2_querybuf() for E(S)\n");
1096 return ret;
1097 }
1098 } else {
1099 mfc_err("invalid buf type\n");
1100 return -EINVAL;
1101 }
1102 return ret;
1103}
1104
1105/* Queue a buffer */
1106static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1107{
1108 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1109
1110 if (ctx->state == MFCINST_ERROR) {
1111 mfc_err("Call on QBUF after unrecoverable error\n");
1112 return -EIO;
1113 }
f9f715a9
AH
1114 if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1115 if (ctx->state == MFCINST_FINISHING) {
1116 mfc_err("Call on QBUF after EOS command\n");
1117 return -EIO;
1118 }
af935746 1119 return vb2_qbuf(&ctx->vq_src, buf);
f9f715a9 1120 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
af935746 1121 return vb2_qbuf(&ctx->vq_dst, buf);
f9f715a9 1122 }
af935746
KD
1123 return -EINVAL;
1124}
1125
1126/* Dequeue a buffer */
1127static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1128{
f9f715a9
AH
1129 const struct v4l2_event ev = {
1130 .type = V4L2_EVENT_EOS
1131 };
af935746 1132 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
f9f715a9 1133 int ret;
af935746
KD
1134
1135 if (ctx->state == MFCINST_ERROR) {
1136 mfc_err("Call on DQBUF after unrecoverable error\n");
1137 return -EIO;
1138 }
f9f715a9
AH
1139 if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1140 ret = vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK);
1141 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1142 ret = vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK);
1143 if (ret == 0 && ctx->state == MFCINST_FINISHED
1144 && list_empty(&ctx->vq_dst.done_list))
1145 v4l2_event_queue_fh(&ctx->fh, &ev);
1146 } else {
1147 ret = -EINVAL;
1148 }
1149
1150 return ret;
af935746
KD
1151}
1152
1153/* Stream on */
1154static int vidioc_streamon(struct file *file, void *priv,
1155 enum v4l2_buf_type type)
1156{
1157 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1158
1159 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1160 return vb2_streamon(&ctx->vq_src, type);
1161 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1162 return vb2_streamon(&ctx->vq_dst, type);
1163 return -EINVAL;
1164}
1165
1166/* Stream off, which equals to a pause */
1167static int vidioc_streamoff(struct file *file, void *priv,
1168 enum v4l2_buf_type type)
1169{
1170 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1171
1172 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1173 return vb2_streamoff(&ctx->vq_src, type);
1174 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1175 return vb2_streamoff(&ctx->vq_dst, type);
1176 return -EINVAL;
1177}
1178
1179static inline int h264_level(enum v4l2_mpeg_video_h264_level lvl)
1180{
1181 static unsigned int t[V4L2_MPEG_VIDEO_H264_LEVEL_4_0 + 1] = {
1182 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_0 */ 10,
1183 /* V4L2_MPEG_VIDEO_H264_LEVEL_1B */ 9,
1184 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_1 */ 11,
1185 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_2 */ 12,
1186 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_3 */ 13,
1187 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_0 */ 20,
1188 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_1 */ 21,
1189 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_2 */ 22,
1190 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_0 */ 30,
1191 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_1 */ 31,
1192 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_2 */ 32,
1193 /* V4L2_MPEG_VIDEO_H264_LEVEL_4_0 */ 40,
1194 };
1195 return t[lvl];
1196}
1197
1198static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
1199{
1200 static unsigned int t[V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 + 1] = {
1201 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0 */ 0,
1202 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B */ 9,
1203 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_1 */ 1,
1204 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_2 */ 2,
1205 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3 */ 3,
1206 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B */ 7,
1207 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_4 */ 4,
1208 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 */ 5,
1209 };
1210 return t[lvl];
1211}
1212
1213static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
1214{
1215 static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
1216 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED */ 0,
1217 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1 */ 1,
1218 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11 */ 2,
1219 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11 */ 3,
1220 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11 */ 4,
1221 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33 */ 5,
1222 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11 */ 6,
1223 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11 */ 7,
1224 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11 */ 8,
1225 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33 */ 9,
1226 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11 */ 10,
1227 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11 */ 11,
1228 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33 */ 12,
1229 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99 */ 13,
1230 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3 */ 14,
1231 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2 */ 15,
1232 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1 */ 16,
1233 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED */ 255,
1234 };
1235 return t[sar];
1236}
1237
1238static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
1239{
1240 struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
1241 struct s5p_mfc_dev *dev = ctx->dev;
1242 struct s5p_mfc_enc_params *p = &ctx->enc_params;
1243 int ret = 0;
1244
1245 switch (ctrl->id) {
1246 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1247 p->gop_size = ctrl->val;
1248 break;
1249 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1250 p->slice_mode = ctrl->val;
1251 break;
1252 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1253 p->slice_mb = ctrl->val;
1254 break;
1255 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1256 p->slice_bit = ctrl->val * 8;
1257 break;
1258 case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB:
1259 p->intra_refresh_mb = ctrl->val;
1260 break;
1261 case V4L2_CID_MPEG_MFC51_VIDEO_PADDING:
1262 p->pad = ctrl->val;
1263 break;
1264 case V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV:
1265 p->pad_luma = (ctrl->val >> 16) & 0xff;
1266 p->pad_cb = (ctrl->val >> 8) & 0xff;
1267 p->pad_cr = (ctrl->val >> 0) & 0xff;
1268 break;
1269 case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE:
1270 p->rc_frame = ctrl->val;
1271 break;
1272 case V4L2_CID_MPEG_VIDEO_BITRATE:
1273 p->rc_bitrate = ctrl->val;
1274 break;
1275 case V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF:
1276 p->rc_reaction_coeff = ctrl->val;
1277 break;
1278 case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE:
1279 ctx->force_frame_type = ctrl->val;
1280 break;
1281 case V4L2_CID_MPEG_VIDEO_VBV_SIZE:
1282 p->vbv_size = ctrl->val;
1283 break;
1284 case V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE:
1285 p->codec.h264.cpb_size = ctrl->val;
1286 break;
1287 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1288 p->seq_hdr_mode = ctrl->val;
1289 break;
1290 case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE:
1291 p->frame_skip_mode = ctrl->val;
1292 break;
1293 case V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT:
1294 p->fixed_target_bit = ctrl->val;
1295 break;
1296 case V4L2_CID_MPEG_VIDEO_B_FRAMES:
1297 p->num_b_frame = ctrl->val;
1298 break;
1299 case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
1300 switch (ctrl->val) {
1301 case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN:
1302 p->codec.h264.profile =
1303 S5P_FIMV_ENC_PROFILE_H264_MAIN;
1304 break;
1305 case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH:
1306 p->codec.h264.profile =
1307 S5P_FIMV_ENC_PROFILE_H264_HIGH;
1308 break;
1309 case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE:
1310 p->codec.h264.profile =
1311 S5P_FIMV_ENC_PROFILE_H264_BASELINE;
1312 break;
1313 default:
1314 ret = -EINVAL;
1315 }
1316 break;
1317 case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
1318 p->codec.h264.level_v4l2 = ctrl->val;
1319 p->codec.h264.level = h264_level(ctrl->val);
1320 if (p->codec.h264.level < 0) {
1321 mfc_err("Level number is wrong\n");
1322 ret = p->codec.h264.level;
1323 }
1324 break;
1325 case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL:
1326 p->codec.mpeg4.level_v4l2 = ctrl->val;
1327 p->codec.mpeg4.level = mpeg4_level(ctrl->val);
1328 if (p->codec.mpeg4.level < 0) {
1329 mfc_err("Level number is wrong\n");
1330 ret = p->codec.mpeg4.level;
1331 }
1332 break;
1333 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
1334 p->codec.h264.loop_filter_mode = ctrl->val;
1335 break;
1336 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA:
1337 p->codec.h264.loop_filter_alpha = ctrl->val;
1338 break;
1339 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA:
1340 p->codec.h264.loop_filter_beta = ctrl->val;
1341 break;
1342 case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE:
1343 p->codec.h264.entropy_mode = ctrl->val;
1344 break;
1345 case V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P:
1346 p->codec.h264.num_ref_pic_4p = ctrl->val;
1347 break;
1348 case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM:
1349 p->codec.h264._8x8_transform = ctrl->val;
1350 break;
1351 case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE:
1352 p->codec.h264.rc_mb = ctrl->val;
1353 break;
1354 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1355 p->codec.h264.rc_frame_qp = ctrl->val;
1356 break;
1357 case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
1358 p->codec.h264.rc_min_qp = ctrl->val;
1359 break;
1360 case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
1361 p->codec.h264.rc_max_qp = ctrl->val;
1362 break;
1363 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1364 p->codec.h264.rc_p_frame_qp = ctrl->val;
1365 break;
1366 case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP:
1367 p->codec.h264.rc_b_frame_qp = ctrl->val;
1368 break;
1369 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1370 case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP:
1371 p->codec.mpeg4.rc_frame_qp = ctrl->val;
1372 break;
1373 case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP:
1374 case V4L2_CID_MPEG_VIDEO_H263_MIN_QP:
1375 p->codec.mpeg4.rc_min_qp = ctrl->val;
1376 break;
1377 case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP:
1378 case V4L2_CID_MPEG_VIDEO_H263_MAX_QP:
1379 p->codec.mpeg4.rc_max_qp = ctrl->val;
1380 break;
1381 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1382 case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP:
1383 p->codec.mpeg4.rc_p_frame_qp = ctrl->val;
1384 break;
1385 case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP:
1386 case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP:
1387 p->codec.mpeg4.rc_b_frame_qp = ctrl->val;
1388 break;
1389 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK:
1390 p->codec.h264.rc_mb_dark = ctrl->val;
1391 break;
1392 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH:
1393 p->codec.h264.rc_mb_smooth = ctrl->val;
1394 break;
1395 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC:
1396 p->codec.h264.rc_mb_static = ctrl->val;
1397 break;
1398 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY:
1399 p->codec.h264.rc_mb_activity = ctrl->val;
1400 break;
1401 case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE:
1402 p->codec.h264.vui_sar = ctrl->val;
1403 break;
1404 case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC:
1405 p->codec.h264.vui_sar_idc = vui_sar_idc(ctrl->val);
1406 break;
1407 case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH:
1408 p->codec.h264.vui_ext_sar_width = ctrl->val;
1409 break;
1410 case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT:
1411 p->codec.h264.vui_ext_sar_height = ctrl->val;
1412 break;
1413 case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE:
1414 p->codec.h264.open_gop = !ctrl->val;
1415 break;
1416 case V4L2_CID_MPEG_VIDEO_H264_I_PERIOD:
1417 p->codec.h264.open_gop_size = ctrl->val;
1418 break;
1419 case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE:
1420 switch (ctrl->val) {
1421 case V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE:
1422 p->codec.mpeg4.profile =
1423 S5P_FIMV_ENC_PROFILE_MPEG4_SIMPLE;
1424 break;
1425 case V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE:
1426 p->codec.mpeg4.profile =
1427 S5P_FIMV_ENC_PROFILE_MPEG4_ADVANCED_SIMPLE;
1428 break;
1429 default:
1430 ret = -EINVAL;
1431 }
1432 break;
1433 case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL:
1434 p->codec.mpeg4.quarter_pixel = ctrl->val;
1435 break;
1436 default:
1437 v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
1438 ctrl->id, ctrl->val);
1439 ret = -EINVAL;
1440 }
1441 return ret;
1442}
1443
1444static const struct v4l2_ctrl_ops s5p_mfc_enc_ctrl_ops = {
1445 .s_ctrl = s5p_mfc_enc_s_ctrl,
1446};
1447
3e9095d5
SK
1448static int vidioc_s_parm(struct file *file, void *priv,
1449 struct v4l2_streamparm *a)
af935746
KD
1450{
1451 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1452
1453 if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1454 ctx->enc_params.rc_framerate_num =
1455 a->parm.output.timeperframe.denominator;
1456 ctx->enc_params.rc_framerate_denom =
1457 a->parm.output.timeperframe.numerator;
1458 } else {
1459 mfc_err("Setting FPS is only possible for the output queue\n");
1460 return -EINVAL;
1461 }
1462 return 0;
1463}
1464
3e9095d5
SK
1465static int vidioc_g_parm(struct file *file, void *priv,
1466 struct v4l2_streamparm *a)
af935746
KD
1467{
1468 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1469
1470 if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1471 a->parm.output.timeperframe.denominator =
1472 ctx->enc_params.rc_framerate_num;
1473 a->parm.output.timeperframe.numerator =
1474 ctx->enc_params.rc_framerate_denom;
1475 } else {
1476 mfc_err("Setting FPS is only possible for the output queue\n");
1477 return -EINVAL;
1478 }
1479 return 0;
1480}
1481
f9f715a9
AH
1482int vidioc_encoder_cmd(struct file *file, void *priv,
1483 struct v4l2_encoder_cmd *cmd)
1484{
1485 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1486 struct s5p_mfc_dev *dev = ctx->dev;
1487 struct s5p_mfc_buf *buf;
1488 unsigned long flags;
1489
1490 switch (cmd->cmd) {
1491 case V4L2_ENC_CMD_STOP:
1492 if (cmd->flags != 0)
1493 return -EINVAL;
1494
1495 if (!ctx->vq_src.streaming)
1496 return -EINVAL;
1497
1498 spin_lock_irqsave(&dev->irqlock, flags);
1499 if (list_empty(&ctx->src_queue)) {
1500 mfc_debug(2, "EOS: empty src queue, entering finishing state");
1501 ctx->state = MFCINST_FINISHING;
1502 spin_unlock_irqrestore(&dev->irqlock, flags);
1503 s5p_mfc_try_run(dev);
1504 } else {
1505 mfc_debug(2, "EOS: marking last buffer of stream");
1506 buf = list_entry(ctx->src_queue.prev,
1507 struct s5p_mfc_buf, list);
1508 if (buf->flags & MFC_BUF_FLAG_USED)
1509 ctx->state = MFCINST_FINISHING;
1510 else
1511 buf->flags |= MFC_BUF_FLAG_EOS;
1512 spin_unlock_irqrestore(&dev->irqlock, flags);
1513 }
1514 break;
1515 default:
1516 return -EINVAL;
1517
1518 }
1519 return 0;
1520}
1521
1522static int vidioc_subscribe_event(struct v4l2_fh *fh,
1523 struct v4l2_event_subscription *sub)
1524{
1525 switch (sub->type) {
1526 case V4L2_EVENT_EOS:
1527 return v4l2_event_subscribe(fh, sub, 2, NULL);
1528 default:
1529 return -EINVAL;
1530 }
1531}
1532
af935746
KD
1533static const struct v4l2_ioctl_ops s5p_mfc_enc_ioctl_ops = {
1534 .vidioc_querycap = vidioc_querycap,
1535 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1536 .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane,
1537 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
1538 .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane,
1539 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
1540 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
1541 .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt,
1542 .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt,
1543 .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt,
1544 .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt,
1545 .vidioc_reqbufs = vidioc_reqbufs,
1546 .vidioc_querybuf = vidioc_querybuf,
1547 .vidioc_qbuf = vidioc_qbuf,
1548 .vidioc_dqbuf = vidioc_dqbuf,
1549 .vidioc_streamon = vidioc_streamon,
1550 .vidioc_streamoff = vidioc_streamoff,
1551 .vidioc_s_parm = vidioc_s_parm,
1552 .vidioc_g_parm = vidioc_g_parm,
f9f715a9
AH
1553 .vidioc_encoder_cmd = vidioc_encoder_cmd,
1554 .vidioc_subscribe_event = vidioc_subscribe_event,
1555 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
af935746
KD
1556};
1557
1558static int check_vb_with_fmt(struct s5p_mfc_fmt *fmt, struct vb2_buffer *vb)
1559{
1560 int i;
1561
1562 if (!fmt)
1563 return -EINVAL;
1564 if (fmt->num_planes != vb->num_planes) {
1565 mfc_err("invalid plane number for the format\n");
1566 return -EINVAL;
1567 }
1568 for (i = 0; i < fmt->num_planes; i++) {
ba7fcb0c 1569 if (!vb2_dma_contig_plane_dma_addr(vb, i)) {
af935746
KD
1570 mfc_err("failed to get plane cookie\n");
1571 return -EINVAL;
1572 }
1573 mfc_debug(2, "index: %d, plane[%d] cookie: 0x%08zx",
1574 vb->v4l2_buf.index, i,
ba7fcb0c 1575 vb2_dma_contig_plane_dma_addr(vb, i));
af935746
KD
1576 }
1577 return 0;
1578}
1579
1580static int s5p_mfc_queue_setup(struct vb2_queue *vq,
fc714e70
GL
1581 const struct v4l2_format *fmt,
1582 unsigned int *buf_count, unsigned int *plane_count,
1583 unsigned int psize[], void *allocators[])
af935746
KD
1584{
1585 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1586
1587 if (ctx->state != MFCINST_GOT_INST) {
1588 mfc_err("inavlid state: %d\n", ctx->state);
1589 return -EINVAL;
1590 }
1591 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1592 if (ctx->dst_fmt)
1593 *plane_count = ctx->dst_fmt->num_planes;
1594 else
1595 *plane_count = MFC_ENC_CAP_PLANE_COUNT;
1596 if (*buf_count < 1)
1597 *buf_count = 1;
1598 if (*buf_count > MFC_MAX_BUFFERS)
1599 *buf_count = MFC_MAX_BUFFERS;
1600 psize[0] = ctx->enc_dst_buf_size;
1601 allocators[0] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1602 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1603 if (ctx->src_fmt)
1604 *plane_count = ctx->src_fmt->num_planes;
1605 else
1606 *plane_count = MFC_ENC_OUT_PLANE_COUNT;
1607
1608 if (*buf_count < 1)
1609 *buf_count = 1;
1610 if (*buf_count > MFC_MAX_BUFFERS)
1611 *buf_count = MFC_MAX_BUFFERS;
1612 psize[0] = ctx->luma_size;
1613 psize[1] = ctx->chroma_size;
1614 allocators[0] = ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX];
1615 allocators[1] = ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX];
1616 } else {
1617 mfc_err("inavlid queue type: %d\n", vq->type);
1618 return -EINVAL;
1619 }
1620 return 0;
1621}
1622
1623static void s5p_mfc_unlock(struct vb2_queue *q)
1624{
1625 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1626 struct s5p_mfc_dev *dev = ctx->dev;
1627
1628 mutex_unlock(&dev->mfc_mutex);
1629}
1630
1631static void s5p_mfc_lock(struct vb2_queue *q)
1632{
1633 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1634 struct s5p_mfc_dev *dev = ctx->dev;
1635
1636 mutex_lock(&dev->mfc_mutex);
1637}
1638
1639static int s5p_mfc_buf_init(struct vb2_buffer *vb)
1640{
1641 struct vb2_queue *vq = vb->vb2_queue;
1642 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1643 unsigned int i;
1644 int ret;
1645
1646 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1647 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1648 if (ret < 0)
1649 return ret;
1650 i = vb->v4l2_buf.index;
1651 ctx->dst_bufs[i].b = vb;
1652 ctx->dst_bufs[i].cookie.stream =
ba7fcb0c 1653 vb2_dma_contig_plane_dma_addr(vb, 0);
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1654 ctx->dst_bufs_cnt++;
1655 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1656 ret = check_vb_with_fmt(ctx->src_fmt, vb);
1657 if (ret < 0)
1658 return ret;
1659 i = vb->v4l2_buf.index;
1660 ctx->src_bufs[i].b = vb;
1661 ctx->src_bufs[i].cookie.raw.luma =
ba7fcb0c 1662 vb2_dma_contig_plane_dma_addr(vb, 0);
af935746 1663 ctx->src_bufs[i].cookie.raw.chroma =
ba7fcb0c 1664 vb2_dma_contig_plane_dma_addr(vb, 1);
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1665 ctx->src_bufs_cnt++;
1666 } else {
1667 mfc_err("inavlid queue type: %d\n", vq->type);
1668 return -EINVAL;
1669 }
1670 return 0;
1671}
1672
1673static int s5p_mfc_buf_prepare(struct vb2_buffer *vb)
1674{
1675 struct vb2_queue *vq = vb->vb2_queue;
1676 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1677 int ret;
1678
1679 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1680 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1681 if (ret < 0)
1682 return ret;
1683 mfc_debug(2, "plane size: %ld, dst size: %d\n",
1684 vb2_plane_size(vb, 0), ctx->enc_dst_buf_size);
1685 if (vb2_plane_size(vb, 0) < ctx->enc_dst_buf_size) {
1686 mfc_err("plane size is too small for capture\n");
1687 return -EINVAL;
1688 }
1689 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1690 ret = check_vb_with_fmt(ctx->src_fmt, vb);
1691 if (ret < 0)
1692 return ret;
1693 mfc_debug(2, "plane size: %ld, luma size: %d\n",
1694 vb2_plane_size(vb, 0), ctx->luma_size);
1695 mfc_debug(2, "plane size: %ld, chroma size: %d\n",
1696 vb2_plane_size(vb, 1), ctx->chroma_size);
1697 if (vb2_plane_size(vb, 0) < ctx->luma_size ||
1698 vb2_plane_size(vb, 1) < ctx->chroma_size) {
1699 mfc_err("plane size is too small for output\n");
1700 return -EINVAL;
1701 }
1702 } else {
1703 mfc_err("inavlid queue type: %d\n", vq->type);
1704 return -EINVAL;
1705 }
1706 return 0;
1707}
1708
bd323e28 1709static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count)
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1710{
1711 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1712 struct s5p_mfc_dev *dev = ctx->dev;
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1713
1714 v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
1715 /* If context is ready then dev = work->data;schedule it to run */
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1716 if (s5p_mfc_ctx_ready(ctx))
1717 set_work_bit_irqsave(ctx);
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1718 s5p_mfc_try_run(dev);
1719 return 0;
1720}
1721
1722static int s5p_mfc_stop_streaming(struct vb2_queue *q)
1723{
1724 unsigned long flags;
1725 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1726 struct s5p_mfc_dev *dev = ctx->dev;
1727
1728 if ((ctx->state == MFCINST_FINISHING ||
1729 ctx->state == MFCINST_RUNNING) &&
1730 dev->curr_ctx == ctx->num && dev->hw_lock) {
1731 ctx->state = MFCINST_ABORT;
1732 s5p_mfc_wait_for_done_ctx(ctx, S5P_FIMV_R2H_CMD_FRAME_DONE_RET,
1733 0);
1734 }
1735 ctx->state = MFCINST_FINISHED;
1736 spin_lock_irqsave(&dev->irqlock, flags);
1737 if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1738 s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst);
1739 INIT_LIST_HEAD(&ctx->dst_queue);
1740 ctx->dst_queue_cnt = 0;
1741 }
1742 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1743 cleanup_ref_queue(ctx);
1744 s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src);
1745 INIT_LIST_HEAD(&ctx->src_queue);
1746 ctx->src_queue_cnt = 0;
1747 }
1748 spin_unlock_irqrestore(&dev->irqlock, flags);
1749 return 0;
1750}
1751
1752static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
1753{
1754 struct vb2_queue *vq = vb->vb2_queue;
1755 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1756 struct s5p_mfc_dev *dev = ctx->dev;
1757 unsigned long flags;
1758 struct s5p_mfc_buf *mfc_buf;
1759
1760 if (ctx->state == MFCINST_ERROR) {
1761 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
1762 cleanup_ref_queue(ctx);
1763 return;
1764 }
1765 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1766 mfc_buf = &ctx->dst_bufs[vb->v4l2_buf.index];
f9f715a9 1767 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
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1768 /* Mark destination as available for use by MFC */
1769 spin_lock_irqsave(&dev->irqlock, flags);
1770 list_add_tail(&mfc_buf->list, &ctx->dst_queue);
1771 ctx->dst_queue_cnt++;
1772 spin_unlock_irqrestore(&dev->irqlock, flags);
1773 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1774 mfc_buf = &ctx->src_bufs[vb->v4l2_buf.index];
f9f715a9 1775 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
af935746 1776 spin_lock_irqsave(&dev->irqlock, flags);
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1777 list_add_tail(&mfc_buf->list, &ctx->src_queue);
1778 ctx->src_queue_cnt++;
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1779 spin_unlock_irqrestore(&dev->irqlock, flags);
1780 } else {
1781 mfc_err("unsupported buffer type (%d)\n", vq->type);
1782 }
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1783 if (s5p_mfc_ctx_ready(ctx))
1784 set_work_bit_irqsave(ctx);
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1785 s5p_mfc_try_run(dev);
1786}
1787
1788static struct vb2_ops s5p_mfc_enc_qops = {
1789 .queue_setup = s5p_mfc_queue_setup,
1790 .wait_prepare = s5p_mfc_unlock,
1791 .wait_finish = s5p_mfc_lock,
1792 .buf_init = s5p_mfc_buf_init,
1793 .buf_prepare = s5p_mfc_buf_prepare,
1794 .start_streaming = s5p_mfc_start_streaming,
1795 .stop_streaming = s5p_mfc_stop_streaming,
1796 .buf_queue = s5p_mfc_buf_queue,
1797};
1798
1799struct s5p_mfc_codec_ops *get_enc_codec_ops(void)
1800{
1801 return &encoder_codec_ops;
1802}
1803
1804struct vb2_ops *get_enc_queue_ops(void)
1805{
1806 return &s5p_mfc_enc_qops;
1807}
1808
1809const struct v4l2_ioctl_ops *get_enc_v4l2_ioctl_ops(void)
1810{
1811 return &s5p_mfc_enc_ioctl_ops;
1812}
1813
1814#define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2CLASS(x) == V4L2_CTRL_CLASS_MPEG) \
1815 && V4L2_CTRL_DRIVER_PRIV(x))
1816
1817int s5p_mfc_enc_ctrls_setup(struct s5p_mfc_ctx *ctx)
1818{
1819 struct v4l2_ctrl_config cfg;
1820 int i;
1821
1822 v4l2_ctrl_handler_init(&ctx->ctrl_handler, NUM_CTRLS);
1823 if (ctx->ctrl_handler.error) {
1824 mfc_err("v4l2_ctrl_handler_init failed\n");
1825 return ctx->ctrl_handler.error;
1826 }
1827 for (i = 0; i < NUM_CTRLS; i++) {
1828 if (IS_MFC51_PRIV(controls[i].id)) {
a65c3262 1829 memset(&cfg, 0, sizeof(struct v4l2_ctrl_config));
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1830 cfg.ops = &s5p_mfc_enc_ctrl_ops;
1831 cfg.id = controls[i].id;
1832 cfg.min = controls[i].minimum;
1833 cfg.max = controls[i].maximum;
1834 cfg.def = controls[i].default_value;
1835 cfg.name = controls[i].name;
1836 cfg.type = controls[i].type;
1837 cfg.flags = 0;
1838
1839 if (cfg.type == V4L2_CTRL_TYPE_MENU) {
1840 cfg.step = 0;
1841 cfg.menu_skip_mask = cfg.menu_skip_mask;
1842 cfg.qmenu = mfc51_get_menu(cfg.id);
1843 } else {
1844 cfg.step = controls[i].step;
1845 cfg.menu_skip_mask = 0;
1846 }
1847 ctx->ctrls[i] = v4l2_ctrl_new_custom(&ctx->ctrl_handler,
1848 &cfg, NULL);
1849 } else {
1850 if (controls[i].type == V4L2_CTRL_TYPE_MENU) {
1851 ctx->ctrls[i] = v4l2_ctrl_new_std_menu(
1852 &ctx->ctrl_handler,
1853 &s5p_mfc_enc_ctrl_ops, controls[i].id,
1854 controls[i].maximum, 0,
1855 controls[i].default_value);
1856 } else {
1857 ctx->ctrls[i] = v4l2_ctrl_new_std(
1858 &ctx->ctrl_handler,
1859 &s5p_mfc_enc_ctrl_ops, controls[i].id,
1860 controls[i].minimum,
1861 controls[i].maximum, controls[i].step,
1862 controls[i].default_value);
1863 }
1864 }
1865 if (ctx->ctrl_handler.error) {
1866 mfc_err("Adding control (%d) failed\n", i);
1867 return ctx->ctrl_handler.error;
1868 }
1869 if (controls[i].is_volatile && ctx->ctrls[i])
88365105 1870 ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_VOLATILE;
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1871 }
1872 return 0;
1873}
1874
1875void s5p_mfc_enc_ctrls_delete(struct s5p_mfc_ctx *ctx)
1876{
1877 int i;
1878
1879 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
1880 for (i = 0; i < NUM_CTRLS; i++)
1881 ctx->ctrls[i] = NULL;
1882}