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[media] s5p-mfc: use one implementation of s5p_mfc_get_new_ctx
[linux-2.6-block.git] / drivers / media / platform / s5p-mfc / s5p_mfc_enc.c
CommitLineData
af935746 1/*
2c3fb08b 2 * linux/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
af935746
KD		 3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
6 *
7 * Jeongtae Park <jtp.park@samsung.com>
8 * Kamil Debski <k.debski@samsung.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#include <linux/clk.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/sched.h>
af935746 22#include <linux/videodev2.h>
f9f715a9 23#include <media/v4l2-event.h>
af935746
KD		 24#include <linux/workqueue.h>
25#include <media/v4l2-ctrls.h>
c139990e 26#include <media/videobuf2-v4l2.h>
af935746 27#include "s5p_mfc_common.h"
818cd91a 28#include "s5p_mfc_ctrl.h"
af935746
KD		 29#include "s5p_mfc_debug.h"
30#include "s5p_mfc_enc.h"
31#include "s5p_mfc_intr.h"
43a1ea1f
AK		 32#include "s5p_mfc_opr.h"
33
bf69877d 34#define DEF_SRC_FMT_ENC V4L2_PIX_FMT_NV12M
43a1ea1f 35#define DEF_DST_FMT_ENC V4L2_PIX_FMT_H264
af935746
KD		 36
37static struct s5p_mfc_fmt formats[] = {
38 {
f96f3cfa
JP		 39 .name = "4:2:0 2 Planes 16x16 Tiles",
40 .fourcc = V4L2_PIX_FMT_NV12MT_16X16,
41 .codec_mode = S5P_MFC_CODEC_NONE,
42 .type = MFC_FMT_RAW,
43 .num_planes = 2,
9aa5f008 44 .versions = MFC_V6_BIT | MFC_V7_BIT,
af935746
KD		 45 },
46 {
f96f3cfa
JP		 47 .name = "4:2:0 2 Planes 64x32 Tiles",
48 .fourcc = V4L2_PIX_FMT_NV12MT,
49 .codec_mode = S5P_MFC_CODEC_NONE,
50 .type = MFC_FMT_RAW,
51 .num_planes = 2,
9aa5f008 52 .versions = MFC_V5_BIT,
af935746
KD		 53 },
54 {
f96f3cfa
JP		 55 .name = "4:2:0 2 Planes Y/CbCr",
56 .fourcc = V4L2_PIX_FMT_NV12M,
57 .codec_mode = S5P_MFC_CODEC_NONE,
58 .type = MFC_FMT_RAW,
59 .num_planes = 2,
3e594ce7
KA		 60 .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
61 MFC_V8_BIT,
af935746
KD		 62 },
63 {
f96f3cfa
JP		 64 .name = "4:2:0 2 Planes Y/CrCb",
65 .fourcc = V4L2_PIX_FMT_NV21M,
66 .codec_mode = S5P_MFC_CODEC_NONE,
67 .type = MFC_FMT_RAW,
68 .num_planes = 2,
bf69877d 69 .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
af935746
KD		 70 },
71 {
f96f3cfa
JP		 72 .name = "H264 Encoded Stream",
73 .fourcc = V4L2_PIX_FMT_H264,
74 .codec_mode = S5P_MFC_CODEC_H264_ENC,
75 .type = MFC_FMT_ENC,
76 .num_planes = 1,
3e594ce7
KA		 77 .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
78 MFC_V8_BIT,
f96f3cfa
JP		 79 },
80 {
81 .name = "MPEG4 Encoded Stream",
82 .fourcc = V4L2_PIX_FMT_MPEG4,
83 .codec_mode = S5P_MFC_CODEC_MPEG4_ENC,
84 .type = MFC_FMT_ENC,
85 .num_planes = 1,
3e594ce7
KA		 86 .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
87 MFC_V8_BIT,
f96f3cfa
JP		 88 },
89 {
90 .name = "H263 Encoded Stream",
91 .fourcc = V4L2_PIX_FMT_H263,
92 .codec_mode = S5P_MFC_CODEC_H263_ENC,
93 .type = MFC_FMT_ENC,
94 .num_planes = 1,
3e594ce7
KA		 95 .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
96 MFC_V8_BIT,
af935746 97 },
3a967706
AK		 98 {
99 .name = "VP8 Encoded Stream",
100 .fourcc = V4L2_PIX_FMT_VP8,
101 .codec_mode = S5P_MFC_CODEC_VP8_ENC,
102 .type = MFC_FMT_ENC,
103 .num_planes = 1,
3e594ce7 104 .versions = MFC_V7_BIT | MFC_V8_BIT,
3a967706 105 },
af935746
KD		 106};
107
108#define NUM_FORMATS ARRAY_SIZE(formats)
109static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t)
110{
111 unsigned int i;
112
113 for (i = 0; i < NUM_FORMATS; i++) {
114 if (formats[i].fourcc == f->fmt.pix_mp.pixelformat &&
115 formats[i].type == t)
116 return &formats[i];
117 }
118 return NULL;
119}
120
121static struct mfc_control controls[] = {
122 {
123 .id = V4L2_CID_MPEG_VIDEO_GOP_SIZE,
124 .type = V4L2_CTRL_TYPE_INTEGER,
125 .minimum = 0,
126 .maximum = (1 << 16) - 1,
127 .step = 1,
d6950c47 128 .default_value = 12,
af935746
KD		 129 },
130 {
131 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
132 .type = V4L2_CTRL_TYPE_MENU,
133 .minimum = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
134 .maximum = V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES,
135 .default_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
136 .menu_skip_mask = 0,
137 },
138 {
139 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB,
140 .type = V4L2_CTRL_TYPE_INTEGER,
141 .minimum = 1,
142 .maximum = (1 << 16) - 1,
143 .step = 1,
144 .default_value = 1,
145 },
146 {
147 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES,
148 .type = V4L2_CTRL_TYPE_INTEGER,
149 .minimum = 1900,
150 .maximum = (1 << 30) - 1,
151 .step = 1,
152 .default_value = 1900,
153 },
154 {
155 .id = V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB,
156 .type = V4L2_CTRL_TYPE_INTEGER,
157 .minimum = 0,
158 .maximum = (1 << 16) - 1,
159 .step = 1,
160 .default_value = 0,
161 },
162 {
163 .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING,
164 .type = V4L2_CTRL_TYPE_BOOLEAN,
165 .name = "Padding Control Enable",
166 .minimum = 0,
167 .maximum = 1,
168 .step = 1,
169 .default_value = 0,
170 },
171 {
172 .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV,
173 .type = V4L2_CTRL_TYPE_INTEGER,
174 .name = "Padding Color YUV Value",
175 .minimum = 0,
176 .maximum = (1 << 25) - 1,
177 .step = 1,
178 .default_value = 0,
179 },
180 {
181 .id = V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE,
182 .type = V4L2_CTRL_TYPE_BOOLEAN,
183 .minimum = 0,
184 .maximum = 1,
185 .step = 1,
186 .default_value = 0,
187 },
188 {
189 .id = V4L2_CID_MPEG_VIDEO_BITRATE,
190 .type = V4L2_CTRL_TYPE_INTEGER,
191 .minimum = 1,
192 .maximum = (1 << 30) - 1,
193 .step = 1,
194 .default_value = 1,
195 },
196 {
197 .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF,
198 .type = V4L2_CTRL_TYPE_INTEGER,
199 .name = "Rate Control Reaction Coeff.",
200 .minimum = 1,
201 .maximum = (1 << 16) - 1,
202 .step = 1,
203 .default_value = 1,
204 },
205 {
206 .id = V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE,
207 .type = V4L2_CTRL_TYPE_MENU,
208 .name = "Force frame type",
209 .minimum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED,
210 .maximum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED,
211 .default_value = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED,
212 .menu_skip_mask = 0,
213 },
214 {
215 .id = V4L2_CID_MPEG_VIDEO_VBV_SIZE,
216 .type = V4L2_CTRL_TYPE_INTEGER,
217 .minimum = 0,
218 .maximum = (1 << 16) - 1,
219 .step = 1,
220 .default_value = 0,
221 },
a378a320
AG		 222 {
223 .id = V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE,
224 .type = V4L2_CTRL_TYPE_INTEGER,
225 .name = "Horizontal MV Search Range",
226 .minimum = 16,
227 .maximum = 128,
228 .step = 16,
229 .default_value = 32,
230 },
231 {
232 .id = V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE,
233 .type = V4L2_CTRL_TYPE_INTEGER,
234 .name = "Vertical MV Search Range",
235 .minimum = 16,
236 .maximum = 128,
237 .step = 16,
238 .default_value = 32,
239 },
af935746
KD		 240 {
241 .id = V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE,
242 .type = V4L2_CTRL_TYPE_INTEGER,
243 .minimum = 0,
244 .maximum = (1 << 16) - 1,
245 .step = 1,
246 .default_value = 0,
247 },
248 {
249 .id = V4L2_CID_MPEG_VIDEO_HEADER_MODE,
250 .type = V4L2_CTRL_TYPE_MENU,
251 .minimum = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
252 .maximum = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
253 .default_value = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
254 .menu_skip_mask = 0,
255 },
256 {
257 .id = V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE,
258 .type = V4L2_CTRL_TYPE_MENU,
259 .name = "Frame Skip Enable",
260 .minimum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED,
261 .maximum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT,
262 .menu_skip_mask = 0,
263 .default_value = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED,
264 },
265 {
266 .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT,
267 .type = V4L2_CTRL_TYPE_BOOLEAN,
268 .name = "Fixed Target Bit Enable",
269 .minimum = 0,
270 .maximum = 1,
271 .default_value = 0,
053e09f3 272 .step = 1,
af935746
KD		 273 .menu_skip_mask = 0,
274 },
275 {
276 .id = V4L2_CID_MPEG_VIDEO_B_FRAMES,
277 .type = V4L2_CTRL_TYPE_INTEGER,
278 .minimum = 0,
279 .maximum = 2,
280 .step = 1,
281 .default_value = 0,
282 },
283 {
284 .id = V4L2_CID_MPEG_VIDEO_H264_PROFILE,
285 .type = V4L2_CTRL_TYPE_MENU,
286 .minimum = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
287 .maximum = V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH,
288 .default_value = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
289 .menu_skip_mask = ~(
290 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
291 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
292 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_HIGH)
293 ),
294 },
295 {
296 .id = V4L2_CID_MPEG_VIDEO_H264_LEVEL,
297 .type = V4L2_CTRL_TYPE_MENU,
298 .minimum = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
299 .maximum = V4L2_MPEG_VIDEO_H264_LEVEL_4_0,
300 .default_value = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
af935746
KD		 301 },
302 {
303 .id = V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL,
304 .type = V4L2_CTRL_TYPE_MENU,
305 .minimum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0,
306 .maximum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_5,
307 .default_value = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0,
308 .menu_skip_mask = 0,
309 },
310 {
311 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
312 .type = V4L2_CTRL_TYPE_MENU,
313 .minimum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
314 .maximum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY,
315 .default_value = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
316 .menu_skip_mask = 0,
317 },
318 {
319 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA,
320 .type = V4L2_CTRL_TYPE_INTEGER,
321 .minimum = -6,
322 .maximum = 6,
323 .step = 1,
324 .default_value = 0,
325 },
326 {
327 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA,
328 .type = V4L2_CTRL_TYPE_INTEGER,
329 .minimum = -6,
330 .maximum = 6,
331 .step = 1,
332 .default_value = 0,
333 },
334 {
335 .id = V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE,
336 .type = V4L2_CTRL_TYPE_MENU,
337 .minimum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
338 .maximum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
339 .default_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
340 .menu_skip_mask = 0,
341 },
342 {
343 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P,
344 .type = V4L2_CTRL_TYPE_INTEGER,
345 .name = "The Number of Ref. Pic for P",
346 .minimum = 1,
347 .maximum = 2,
348 .step = 1,
349 .default_value = 1,
350 },
351 {
352 .id = V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM,
353 .type = V4L2_CTRL_TYPE_BOOLEAN,
354 .minimum = 0,
355 .maximum = 1,
356 .step = 1,
357 .default_value = 0,
358 },
359 {
360 .id = V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE,
361 .type = V4L2_CTRL_TYPE_BOOLEAN,
362 .minimum = 0,
363 .maximum = 1,
364 .step = 1,
365 .default_value = 0,
366 },
367 {
368 .id = V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP,
369 .type = V4L2_CTRL_TYPE_INTEGER,
370 .minimum = 0,
371 .maximum = 51,
372 .step = 1,
373 .default_value = 1,
374 },
375 {
376 .id = V4L2_CID_MPEG_VIDEO_H264_MIN_QP,
377 .type = V4L2_CTRL_TYPE_INTEGER,
378 .minimum = 0,
379 .maximum = 51,
380 .step = 1,
381 .default_value = 1,
382 },
383 {
384 .id = V4L2_CID_MPEG_VIDEO_H264_MAX_QP,
385 .type = V4L2_CTRL_TYPE_INTEGER,
386 .minimum = 0,
387 .maximum = 51,
388 .step = 1,
d6950c47 389 .default_value = 51,
af935746
KD		 390 },
391 {
392 .id = V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP,
393 .type = V4L2_CTRL_TYPE_INTEGER,
394 .minimum = 0,
395 .maximum = 51,
396 .step = 1,
397 .default_value = 1,
398 },
399 {
400 .id = V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP,
401 .type = V4L2_CTRL_TYPE_INTEGER,
402 .minimum = 0,
403 .maximum = 51,
404 .step = 1,
405 .default_value = 1,
406 },
407 {
408 .id = V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP,
409 .type = V4L2_CTRL_TYPE_INTEGER,
410 .name = "H263 I-Frame QP value",
411 .minimum = 1,
412 .maximum = 31,
413 .step = 1,
414 .default_value = 1,
415 },
416 {
417 .id = V4L2_CID_MPEG_VIDEO_H263_MIN_QP,
418 .type = V4L2_CTRL_TYPE_INTEGER,
419 .name = "H263 Minimum QP value",
420 .minimum = 1,
421 .maximum = 31,
422 .step = 1,
423 .default_value = 1,
424 },
425 {
426 .id = V4L2_CID_MPEG_VIDEO_H263_MAX_QP,
427 .type = V4L2_CTRL_TYPE_INTEGER,
428 .name = "H263 Maximum QP value",
429 .minimum = 1,
430 .maximum = 31,
431 .step = 1,
d6950c47 432 .default_value = 31,
af935746
KD		 433 },
434 {
435 .id = V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP,
436 .type = V4L2_CTRL_TYPE_INTEGER,
437 .name = "H263 P frame QP value",
438 .minimum = 1,
439 .maximum = 31,
440 .step = 1,
441 .default_value = 1,
442 },
443 {
444 .id = V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP,
445 .type = V4L2_CTRL_TYPE_INTEGER,
446 .name = "H263 B frame QP value",
447 .minimum = 1,
448 .maximum = 31,
449 .step = 1,
450 .default_value = 1,
451 },
452 {
453 .id = V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP,
454 .type = V4L2_CTRL_TYPE_INTEGER,
455 .name = "MPEG4 I-Frame QP value",
456 .minimum = 1,
457 .maximum = 31,
458 .step = 1,
459 .default_value = 1,
460 },
461 {
462 .id = V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP,
463 .type = V4L2_CTRL_TYPE_INTEGER,
464 .name = "MPEG4 Minimum QP value",
465 .minimum = 1,
466 .maximum = 31,
467 .step = 1,
468 .default_value = 1,
469 },
470 {
471 .id = V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP,
472 .type = V4L2_CTRL_TYPE_INTEGER,
473 .name = "MPEG4 Maximum QP value",
474 .minimum = 0,
475 .maximum = 51,
476 .step = 1,
d6950c47 477 .default_value = 51,
af935746
KD		 478 },
479 {
480 .id = V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP,
481 .type = V4L2_CTRL_TYPE_INTEGER,
482 .name = "MPEG4 P frame QP value",
483 .minimum = 1,
484 .maximum = 31,
485 .step = 1,
486 .default_value = 1,
487 },
488 {
489 .id = V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP,
490 .type = V4L2_CTRL_TYPE_INTEGER,
491 .name = "MPEG4 B frame QP value",
492 .minimum = 1,
493 .maximum = 31,
494 .step = 1,
495 .default_value = 1,
496 },
497 {
498 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK,
499 .type = V4L2_CTRL_TYPE_BOOLEAN,
500 .name = "H264 Dark Reg Adaptive RC",
501 .minimum = 0,
502 .maximum = 1,
503 .step = 1,
504 .default_value = 0,
505 },
506 {
507 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH,
508 .type = V4L2_CTRL_TYPE_BOOLEAN,
509 .name = "H264 Smooth Reg Adaptive RC",
510 .minimum = 0,
511 .maximum = 1,
512 .step = 1,
513 .default_value = 0,
514 },
515 {
516 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC,
517 .type = V4L2_CTRL_TYPE_BOOLEAN,
518 .name = "H264 Static Reg Adaptive RC",
519 .minimum = 0,
520 .maximum = 1,
521 .step = 1,
522 .default_value = 0,
523 },
524 {
525 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY,
526 .type = V4L2_CTRL_TYPE_BOOLEAN,
527 .name = "H264 Activity Reg Adaptive RC",
528 .minimum = 0,
529 .maximum = 1,
530 .step = 1,
531 .default_value = 0,
532 },
533 {
534 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE,
535 .type = V4L2_CTRL_TYPE_BOOLEAN,
536 .minimum = 0,
537 .maximum = 1,
538 .step = 1,
539 .default_value = 0,
540 },
541 {
542 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC,
543 .type = V4L2_CTRL_TYPE_MENU,
544 .minimum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED,
545 .maximum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED,
afd14f48 546 .default_value = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED,
af935746
KD		 547 .menu_skip_mask = 0,
548 },
549 {
550 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH,
551 .type = V4L2_CTRL_TYPE_INTEGER,
552 .minimum = 0,
553 .maximum = (1 << 16) - 1,
554 .step = 1,
555 .default_value = 0,
556 },
557 {
558 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT,
559 .type = V4L2_CTRL_TYPE_INTEGER,
560 .minimum = 0,
561 .maximum = (1 << 16) - 1,
562 .step = 1,
563 .default_value = 0,
564 },
565 {
566 .id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE,
567 .type = V4L2_CTRL_TYPE_BOOLEAN,
568 .minimum = 0,
569 .maximum = 1,
570 .step = 1,
571 .default_value = 1,
572 },
573 {
574 .id = V4L2_CID_MPEG_VIDEO_H264_I_PERIOD,
575 .type = V4L2_CTRL_TYPE_INTEGER,
576 .minimum = 0,
577 .maximum = (1 << 16) - 1,
578 .step = 1,
579 .default_value = 0,
580 },
581 {
582 .id = V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE,
583 .type = V4L2_CTRL_TYPE_MENU,
584 .minimum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE,
585 .maximum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE,
afd14f48 586 .default_value = V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE,
af935746
KD		 587 .menu_skip_mask = 0,
588 },
589 {
590 .id = V4L2_CID_MPEG_VIDEO_MPEG4_QPEL,
591 .type = V4L2_CTRL_TYPE_BOOLEAN,
592 .minimum = 0,
593 .maximum = 1,
594 .step = 1,
595 .default_value = 0,
596 },
3a967706
AK		 597 {
598 .id = V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS,
599 .type = V4L2_CTRL_TYPE_INTEGER_MENU,
600 .maximum = V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS,
601 .default_value = V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION,
602 .menu_skip_mask = 0,
603 },
604 {
605 .id = V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4,
606 .type = V4L2_CTRL_TYPE_BOOLEAN,
607 .minimum = 0,
608 .maximum = 1,
609 .step = 1,
610 .default_value = 0,
611 },
612 {
613 .id = V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES,
614 .type = V4L2_CTRL_TYPE_INTEGER_MENU,
615 .maximum = V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME,
616 .default_value = V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME,
617 .menu_skip_mask = 0,
618 },
619 {
620 .id = V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL,
621 .type = V4L2_CTRL_TYPE_INTEGER,
622 .minimum = 0,
623 .maximum = 63,
624 .step = 1,
625 .default_value = 0,
626 },
627 {
628 .id = V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS,
629 .type = V4L2_CTRL_TYPE_INTEGER,
630 .minimum = 0,
631 .maximum = 7,
632 .step = 1,
633 .default_value = 0,
634 },
635 {
636 .id = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD,
637 .type = V4L2_CTRL_TYPE_INTEGER,
638 .minimum = 0,
639 .maximum = (1 << 16) - 1,
640 .step = 1,
641 .default_value = 0,
642 },
643 {
644 .id = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL,
645 .type = V4L2_CTRL_TYPE_MENU,
646 .minimum = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV,
647 .maximum = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD,
648 .default_value = V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV,
649 .menu_skip_mask = 0,
650 },
4773ab99
AK		 651 {
652 .id = V4L2_CID_MPEG_VIDEO_VPX_MAX_QP,
653 .type = V4L2_CTRL_TYPE_INTEGER,
654 .minimum = 0,
655 .maximum = 127,
656 .step = 1,
657 .default_value = 127,
658 },
659 {
660 .id = V4L2_CID_MPEG_VIDEO_VPX_MIN_QP,
661 .type = V4L2_CTRL_TYPE_INTEGER,
662 .minimum = 0,
663 .maximum = 11,
664 .step = 1,
665 .default_value = 0,
666 },
667 {
668 .id = V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP,
669 .type = V4L2_CTRL_TYPE_INTEGER,
670 .minimum = 0,
671 .maximum = 127,
672 .step = 1,
673 .default_value = 10,
674 },
675 {
676 .id = V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP,
677 .type = V4L2_CTRL_TYPE_INTEGER,
678 .minimum = 0,
679 .maximum = 127,
680 .step = 1,
681 .default_value = 10,
682 },
bbd8f3fe
KA		 683 {
684 .id = V4L2_CID_MPEG_VIDEO_VPX_PROFILE,
685 .type = V4L2_CTRL_TYPE_INTEGER,
686 .minimum = 0,
687 .maximum = 3,
688 .step = 1,
689 .default_value = 0,
690 },
c4b1ce05
KA		 691 {
692 .id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
693 .type = V4L2_CTRL_TYPE_INTEGER,
694 .name = "Minimum number of output bufs",
695 .minimum = 1,
696 .maximum = 32,
697 .step = 1,
698 .default_value = 1,
699 .is_volatile = 1,
700 },
af935746
KD		 701};
702
703#define NUM_CTRLS ARRAY_SIZE(controls)
704static const char * const *mfc51_get_menu(u32 id)
705{
706 static const char * const mfc51_video_frame_skip[] = {
707 "Disabled",
708 "Level Limit",
709 "VBV/CPB Limit",
710 NULL,
711 };
712 static const char * const mfc51_video_force_frame[] = {
713 "Disabled",
714 "I Frame",
715 "Not Coded",
716 NULL,
717 };
718 switch (id) {
719 case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE:
720 return mfc51_video_frame_skip;
721 case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE:
722 return mfc51_video_force_frame;
723 }
724 return NULL;
725}
726
727static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx)
728{
729 mfc_debug(2, "src=%d, dst=%d, state=%d\n",
730 ctx->src_queue_cnt, ctx->dst_queue_cnt, ctx->state);
731 /* context is ready to make header */
732 if (ctx->state == MFCINST_GOT_INST && ctx->dst_queue_cnt >= 1)
733 return 1;
734 /* context is ready to encode a frame */
f96f3cfa 735 if ((ctx->state == MFCINST_RUNNING ||
e9d98ddc 736 ctx->state == MFCINST_HEAD_PRODUCED) &&
af935746
KD		 737 ctx->src_queue_cnt >= 1 && ctx->dst_queue_cnt >= 1)
738 return 1;
f9f715a9 739 /* context is ready to encode remaining frames */
af935746 740 if (ctx->state == MFCINST_FINISHING &&
f9f715a9 741 ctx->dst_queue_cnt >= 1)
af935746
KD		 742 return 1;
743 mfc_debug(2, "ctx is not ready\n");
744 return 0;
745}
746
747static void cleanup_ref_queue(struct s5p_mfc_ctx *ctx)
748{
749 struct s5p_mfc_buf *mb_entry;
af935746
KD		 750
751 /* move buffers in ref queue to src queue */
752 while (!list_empty(&ctx->ref_queue)) {
753 mb_entry = list_entry((&ctx->ref_queue)->next,
754 struct s5p_mfc_buf, list);
af935746
KD		 755 list_del(&mb_entry->list);
756 ctx->ref_queue_cnt--;
757 list_add_tail(&mb_entry->list, &ctx->src_queue);
758 ctx->src_queue_cnt++;
759 }
760 mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
761 ctx->src_queue_cnt, ctx->ref_queue_cnt);
762 INIT_LIST_HEAD(&ctx->ref_queue);
763 ctx->ref_queue_cnt = 0;
764}
765
766static int enc_pre_seq_start(struct s5p_mfc_ctx *ctx)
767{
768 struct s5p_mfc_dev *dev = ctx->dev;
769 struct s5p_mfc_buf *dst_mb;
770 unsigned long dst_addr;
771 unsigned int dst_size;
772 unsigned long flags;
773
774 spin_lock_irqsave(&dev->irqlock, flags);
775 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
2d700715
JS		 776 dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0);
777 dst_size = vb2_plane_size(&dst_mb->b->vb2_buf, 0);
e2c3be2a 778 s5p_mfc_hw_call_void(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr,
43a1ea1f 779 dst_size);
af935746
KD		 780 spin_unlock_irqrestore(&dev->irqlock, flags);
781 return 0;
782}
783
784static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
785{
786 struct s5p_mfc_dev *dev = ctx->dev;
787 struct s5p_mfc_enc_params *p = &ctx->enc_params;
788 struct s5p_mfc_buf *dst_mb;
789 unsigned long flags;
e9d98ddc 790 unsigned int enc_pb_count;
af935746
KD		 791
792 if (p->seq_hdr_mode == V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) {
793 spin_lock_irqsave(&dev->irqlock, flags);
e933cefa
JS		 794 if (!list_empty(&ctx->dst_queue)) {
795 dst_mb = list_entry(ctx->dst_queue.next,
796 struct s5p_mfc_buf, list);
797 list_del(&dst_mb->list);
798 ctx->dst_queue_cnt--;
2d700715 799 vb2_set_plane_payload(&dst_mb->b->vb2_buf, 0,
e933cefa
JS		 800 s5p_mfc_hw_call(dev->mfc_ops, get_enc_strm_size,
801 dev));
2d700715
JS		 802 vb2_buffer_done(&dst_mb->b->vb2_buf,
803 VB2_BUF_STATE_DONE);
e933cefa 804 }
af935746
KD		 805 spin_unlock_irqrestore(&dev->irqlock, flags);
806 }
e9d98ddc 807
722b979e 808 if (!IS_MFCV6_PLUS(dev)) {
f96f3cfa
JP		 809 ctx->state = MFCINST_RUNNING;
810 if (s5p_mfc_ctx_ready(ctx))
811 set_work_bit_irqsave(ctx);
e2c3be2a 812 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
e9d98ddc
AK		 813 } else {
814 enc_pb_count = s5p_mfc_hw_call(dev->mfc_ops,
f96f3cfa 815 get_enc_dpb_count, dev);
e9d98ddc
AK		 816 if (ctx->pb_count < enc_pb_count)
817 ctx->pb_count = enc_pb_count;
818 ctx->state = MFCINST_HEAD_PRODUCED;
819 }
f96f3cfa 820
af935746
KD		 821 return 0;
822}
823
824static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx)
825{
826 struct s5p_mfc_dev *dev = ctx->dev;
827 struct s5p_mfc_buf *dst_mb;
828 struct s5p_mfc_buf *src_mb;
829 unsigned long flags;
830 unsigned long src_y_addr, src_c_addr, dst_addr;
831 unsigned int dst_size;
832
833 spin_lock_irqsave(&dev->irqlock, flags);
834 src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
2d700715
JS		 835 src_y_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 0);
836 src_c_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 1);
e2c3be2a
KD		 837 s5p_mfc_hw_call_void(dev->mfc_ops, set_enc_frame_buffer, ctx,
838 src_y_addr, src_c_addr);
af935746
KD		 839 spin_unlock_irqrestore(&dev->irqlock, flags);
840
841 spin_lock_irqsave(&dev->irqlock, flags);
842 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
2d700715
JS		 843 dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0);
844 dst_size = vb2_plane_size(&dst_mb->b->vb2_buf, 0);
e2c3be2a 845 s5p_mfc_hw_call_void(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr,
43a1ea1f 846 dst_size);
af935746
KD		 847 spin_unlock_irqrestore(&dev->irqlock, flags);
848
849 return 0;
850}
851
852static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
853{
854 struct s5p_mfc_dev *dev = ctx->dev;
855 struct s5p_mfc_buf *mb_entry;
856 unsigned long enc_y_addr, enc_c_addr;
857 unsigned long mb_y_addr, mb_c_addr;
858 int slice_type;
859 unsigned int strm_size;
860 unsigned long flags;
861
43a1ea1f
AK		 862 slice_type = s5p_mfc_hw_call(dev->mfc_ops, get_enc_slice_type, dev);
863 strm_size = s5p_mfc_hw_call(dev->mfc_ops, get_enc_strm_size, dev);
4130eabc
AH		 864 mfc_debug(2, "Encoded slice type: %d\n", slice_type);
865 mfc_debug(2, "Encoded stream size: %d\n", strm_size);
866 mfc_debug(2, "Display order: %d\n",
af935746
KD		 867 mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT));
868 spin_lock_irqsave(&dev->irqlock, flags);
869 if (slice_type >= 0) {
e2c3be2a 870 s5p_mfc_hw_call_void(dev->mfc_ops, get_enc_frame_buffer, ctx,
43a1ea1f 871 &enc_y_addr, &enc_c_addr);
af935746 872 list_for_each_entry(mb_entry, &ctx->src_queue, list) {
2d700715
JS		 873 mb_y_addr = vb2_dma_contig_plane_dma_addr(
874 &mb_entry->b->vb2_buf, 0);
875 mb_c_addr = vb2_dma_contig_plane_dma_addr(
876 &mb_entry->b->vb2_buf, 1);
af935746
KD		 877 if ((enc_y_addr == mb_y_addr) &&
878 (enc_c_addr == mb_c_addr)) {
879 list_del(&mb_entry->list);
880 ctx->src_queue_cnt--;
2d700715 881 vb2_buffer_done(&mb_entry->b->vb2_buf,
af935746
KD		 882 VB2_BUF_STATE_DONE);
883 break;
884 }
885 }
886 list_for_each_entry(mb_entry, &ctx->ref_queue, list) {
2d700715
JS		 887 mb_y_addr = vb2_dma_contig_plane_dma_addr(
888 &mb_entry->b->vb2_buf, 0);
889 mb_c_addr = vb2_dma_contig_plane_dma_addr(
890 &mb_entry->b->vb2_buf, 1);
af935746
KD		 891 if ((enc_y_addr == mb_y_addr) &&
892 (enc_c_addr == mb_c_addr)) {
893 list_del(&mb_entry->list);
894 ctx->ref_queue_cnt--;
2d700715 895 vb2_buffer_done(&mb_entry->b->vb2_buf,
af935746
KD		 896 VB2_BUF_STATE_DONE);
897 break;
898 }
899 }
900 }
901 if ((ctx->src_queue_cnt > 0) && (ctx->state == MFCINST_RUNNING)) {
902 mb_entry = list_entry(ctx->src_queue.next, struct s5p_mfc_buf,
903 list);
f9f715a9 904 if (mb_entry->flags & MFC_BUF_FLAG_USED) {
af935746
KD		 905 list_del(&mb_entry->list);
906 ctx->src_queue_cnt--;
907 list_add_tail(&mb_entry->list, &ctx->ref_queue);
908 ctx->ref_queue_cnt++;
909 }
af935746 910 }
96c57776
AH		 911 mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
912 ctx->src_queue_cnt, ctx->ref_queue_cnt);
e933cefa 913 if ((ctx->dst_queue_cnt > 0) && (strm_size > 0)) {
af935746
KD		 914 mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf,
915 list);
916 list_del(&mb_entry->list);
917 ctx->dst_queue_cnt--;
918 switch (slice_type) {
919 case S5P_FIMV_ENC_SI_SLICE_TYPE_I:
2d700715 920 mb_entry->b->flags |= V4L2_BUF_FLAG_KEYFRAME;
af935746
KD		 921 break;
922 case S5P_FIMV_ENC_SI_SLICE_TYPE_P:
2d700715 923 mb_entry->b->flags |= V4L2_BUF_FLAG_PFRAME;
af935746
KD		 924 break;
925 case S5P_FIMV_ENC_SI_SLICE_TYPE_B:
2d700715 926 mb_entry->b->flags |= V4L2_BUF_FLAG_BFRAME;
af935746
KD		 927 break;
928 }
2d700715
JS		 929 vb2_set_plane_payload(&mb_entry->b->vb2_buf, 0, strm_size);
930 vb2_buffer_done(&mb_entry->b->vb2_buf, VB2_BUF_STATE_DONE);
af935746
KD		 931 }
932 spin_unlock_irqrestore(&dev->irqlock, flags);
7fb89eca
AH		 933 if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0))
934 clear_work_bit(ctx);
96c57776 935
af935746
KD		 936 return 0;
937}
938
4e9691aa 939static const struct s5p_mfc_codec_ops encoder_codec_ops = {
af935746
KD		 940 .pre_seq_start = enc_pre_seq_start,
941 .post_seq_start = enc_post_seq_start,
942 .pre_frame_start = enc_pre_frame_start,
943 .post_frame_start = enc_post_frame_start,
944};
945
946/* Query capabilities of the device */
947static int vidioc_querycap(struct file *file, void *priv,
948 struct v4l2_capability *cap)
949{
950 struct s5p_mfc_dev *dev = video_drvdata(file);
951
952 strncpy(cap->driver, dev->plat_dev->name, sizeof(cap->driver) - 1);
953 strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1);
954 cap->bus_info[0] = 0;
f0476a83
SN		 955 /*
956 * This is only a mem-to-mem video device. The capture and output
957 * device capability flags are left only for backward compatibility
958 * and are scheduled for removal.
959 */
8c17e5e3
HV		 960 cap->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING;
961 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
af935746
KD		 962 return 0;
963}
964
9aa5f008 965static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f,
7e8fe13d 966 bool out)
af935746 967{
9aa5f008 968 struct s5p_mfc_dev *dev = video_drvdata(file);
af935746
KD		 969 struct s5p_mfc_fmt *fmt;
970 int i, j = 0;
971
972 for (i = 0; i < ARRAY_SIZE(formats); ++i) {
af935746
KD		 973 if (out && formats[i].type != MFC_FMT_RAW)
974 continue;
975 else if (!out && formats[i].type != MFC_FMT_ENC)
976 continue;
9aa5f008
KD		 977 else if ((dev->variant->version_bit & formats[i].versions) == 0)
978 continue;
979
af935746
KD		 980 if (j == f->index) {
981 fmt = &formats[i];
982 strlcpy(f->description, fmt->name,
983 sizeof(f->description));
984 f->pixelformat = fmt->fourcc;
985 return 0;
986 }
987 ++j;
988 }
989 return -EINVAL;
990}
991
af935746
KD		 992static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv,
993 struct v4l2_fmtdesc *f)
994{
7e8fe13d 995 return vidioc_enum_fmt(file, f, false);
af935746
KD		 996}
997
998static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *prov,
999 struct v4l2_fmtdesc *f)
1000{
7e8fe13d 1001 return vidioc_enum_fmt(file, f, true);
af935746
KD		 1002}
1003
1004static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
1005{
1006 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1007 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
1008
1009 mfc_debug(2, "f->type = %d ctx->state = %d\n", f->type, ctx->state);
1010 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1011 /* This is run on output (encoder dest) */
1012 pix_fmt_mp->width = 0;
1013 pix_fmt_mp->height = 0;
1014 pix_fmt_mp->field = V4L2_FIELD_NONE;
1015 pix_fmt_mp->pixelformat = ctx->dst_fmt->fourcc;
1016 pix_fmt_mp->num_planes = ctx->dst_fmt->num_planes;
1017
1018 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->enc_dst_buf_size;
1019 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->enc_dst_buf_size;
1020 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1021 /* This is run on capture (encoder src) */
1022 pix_fmt_mp->width = ctx->img_width;
1023 pix_fmt_mp->height = ctx->img_height;
1024
1025 pix_fmt_mp->field = V4L2_FIELD_NONE;
1026 pix_fmt_mp->pixelformat = ctx->src_fmt->fourcc;
1027 pix_fmt_mp->num_planes = ctx->src_fmt->num_planes;
1028
1029 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
1030 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
1031 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
1032 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
1033 } else {
1034 mfc_err("invalid buf type\n");
1035 return -EINVAL;
1036 }
1037 return 0;
1038}
1039
1040static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
1041{
19c2813c 1042 struct s5p_mfc_dev *dev = video_drvdata(file);
af935746
KD		 1043 struct s5p_mfc_fmt *fmt;
1044 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
1045
1046 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1047 fmt = find_format(f, MFC_FMT_ENC);
1048 if (!fmt) {
1049 mfc_err("failed to try output format\n");
1050 return -EINVAL;
1051 }
af935746
KD		 1052 if (pix_fmt_mp->plane_fmt[0].sizeimage == 0) {
1053 mfc_err("must be set encoding output size\n");
1054 return -EINVAL;
1055 }
9aa5f008
KD		 1056 if ((dev->variant->version_bit & fmt->versions) == 0) {
1057 mfc_err("Unsupported format by this MFC version.\n");
1058 return -EINVAL;
1059 }
af935746
KD		 1060
1061 pix_fmt_mp->plane_fmt[0].bytesperline =
1062 pix_fmt_mp->plane_fmt[0].sizeimage;
1063 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1064 fmt = find_format(f, MFC_FMT_RAW);
1065 if (!fmt) {
1066 mfc_err("failed to try output format\n");
1067 return -EINVAL;
1068 }
1069
1070 if (fmt->num_planes != pix_fmt_mp->num_planes) {
1071 mfc_err("failed to try output format\n");
1072 return -EINVAL;
1073 }
9aa5f008
KD		 1074 if ((dev->variant->version_bit & fmt->versions) == 0) {
1075 mfc_err("Unsupported format by this MFC version.\n");
1076 return -EINVAL;
1077 }
1078
0749ae35
AH		 1079 v4l_bound_align_image(&pix_fmt_mp->width, 8, 1920, 1,
1080 &pix_fmt_mp->height, 4, 1080, 1, 0);
af935746
KD		 1081 } else {
1082 mfc_err("invalid buf type\n");
1083 return -EINVAL;
1084 }
1085 return 0;
1086}
1087
1088static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
1089{
1090 struct s5p_mfc_dev *dev = video_drvdata(file);
1091 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
af935746 1092 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
af935746
KD		 1093 int ret = 0;
1094
1095 ret = vidioc_try_fmt(file, priv, f);
1096 if (ret)
1097 return ret;
1098 if (ctx->vq_src.streaming || ctx->vq_dst.streaming) {
1099 v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
1100 ret = -EBUSY;
1101 goto out;
1102 }
1103 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
19c2813c
JS		 1104 /* dst_fmt is validated by call to vidioc_try_fmt */
1105 ctx->dst_fmt = find_format(f, MFC_FMT_ENC);
af935746 1106 ctx->state = MFCINST_INIT;
af935746
KD		 1107 ctx->codec_mode = ctx->dst_fmt->codec_mode;
1108 ctx->enc_dst_buf_size = pix_fmt_mp->plane_fmt[0].sizeimage;
1109 pix_fmt_mp->plane_fmt[0].bytesperline = 0;
1110 ctx->dst_bufs_cnt = 0;
1111 ctx->capture_state = QUEUE_FREE;
818cd91a 1112 ret = s5p_mfc_open_mfc_inst(dev, ctx);
af935746 1113 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
19c2813c
JS		 1114 /* src_fmt is validated by call to vidioc_try_fmt */
1115 ctx->src_fmt = find_format(f, MFC_FMT_RAW);
af935746
KD		 1116 ctx->img_width = pix_fmt_mp->width;
1117 ctx->img_height = pix_fmt_mp->height;
1118 mfc_debug(2, "codec number: %d\n", ctx->src_fmt->codec_mode);
1119 mfc_debug(2, "fmt - w: %d, h: %d, ctx - w: %d, h: %d\n",
1120 pix_fmt_mp->width, pix_fmt_mp->height,
1121 ctx->img_width, ctx->img_height);
af935746 1122
e2c3be2a 1123 s5p_mfc_hw_call_void(dev->mfc_ops, enc_calc_src_size, ctx);
8f532a7f
AK		 1124 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
1125 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
1126 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
1127 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
af935746 1128
af935746
KD		 1129 ctx->src_bufs_cnt = 0;
1130 ctx->output_state = QUEUE_FREE;
1131 } else {
1132 mfc_err("invalid buf type\n");
818cd91a 1133 ret = -EINVAL;
af935746
KD		 1134 }
1135out:
1136 mfc_debug_leave();
1137 return ret;
1138}
1139
1140static int vidioc_reqbufs(struct file *file, void *priv,
1141 struct v4l2_requestbuffers *reqbufs)
1142{
f96f3cfa 1143 struct s5p_mfc_dev *dev = video_drvdata(file);
af935746
KD		 1144 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1145 int ret = 0;
1146
1147 /* if memory is not mmp or userptr return error */
1148 if ((reqbufs->memory != V4L2_MEMORY_MMAP) &&
1149 (reqbufs->memory != V4L2_MEMORY_USERPTR))
1150 return -EINVAL;
1151 if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
53c51492
PO		 1152 if (reqbufs->count == 0) {
1153 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1154 ctx->capture_state = QUEUE_FREE;
1155 return ret;
1156 }
af935746
KD		 1157 if (ctx->capture_state != QUEUE_FREE) {
1158 mfc_err("invalid capture state: %d\n",
1159 ctx->capture_state);
1160 return -EINVAL;
1161 }
1162 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1163 if (ret != 0) {
1164 mfc_err("error in vb2_reqbufs() for E(D)\n");
1165 return ret;
1166 }
1167 ctx->capture_state = QUEUE_BUFS_REQUESTED;
f96f3cfa 1168
e9d98ddc
AK		 1169 ret = s5p_mfc_hw_call(ctx->dev->mfc_ops,
1170 alloc_codec_buffers, ctx);
1171 if (ret) {
1172 mfc_err("Failed to allocate encoding buffers\n");
1173 reqbufs->count = 0;
1174 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1175 return -ENOMEM;
af935746
KD		 1176 }
1177 } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
53c51492
PO		 1178 if (reqbufs->count == 0) {
1179 mfc_debug(2, "Freeing buffers\n");
1180 ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
4895cc47 1181 s5p_mfc_hw_call_void(dev->mfc_ops, release_codec_buffers,
53c51492
PO		 1182 ctx);
1183 ctx->output_state = QUEUE_FREE;
1184 return ret;
1185 }
af935746
KD		 1186 if (ctx->output_state != QUEUE_FREE) {
1187 mfc_err("invalid output state: %d\n",
1188 ctx->output_state);
1189 return -EINVAL;
1190 }
e9d98ddc 1191
722b979e 1192 if (IS_MFCV6_PLUS(dev)) {
e9d98ddc
AK		 1193 /* Check for min encoder buffers */
1194 if (ctx->pb_count &&
1195 (reqbufs->count < ctx->pb_count)) {
1196 reqbufs->count = ctx->pb_count;
1197 mfc_debug(2, "Minimum %d output buffers needed\n",
1198 ctx->pb_count);
1199 } else {
1200 ctx->pb_count = reqbufs->count;
1201 }
1202 }
1203
af935746
KD		 1204 ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
1205 if (ret != 0) {
1206 mfc_err("error in vb2_reqbufs() for E(S)\n");
1207 return ret;
1208 }
1209 ctx->output_state = QUEUE_BUFS_REQUESTED;
1210 } else {
1211 mfc_err("invalid buf type\n");
1212 return -EINVAL;
1213 }
1214 return ret;
1215}
1216
1217static int vidioc_querybuf(struct file *file, void *priv,
1218 struct v4l2_buffer *buf)
1219{
1220 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1221 int ret = 0;
1222
1223 /* if memory is not mmp or userptr return error */
1224 if ((buf->memory != V4L2_MEMORY_MMAP) &&
1225 (buf->memory != V4L2_MEMORY_USERPTR))
1226 return -EINVAL;
1227 if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1228 if (ctx->state != MFCINST_GOT_INST) {
1229 mfc_err("invalid context state: %d\n", ctx->state);
1230 return -EINVAL;
1231 }
1232 ret = vb2_querybuf(&ctx->vq_dst, buf);
1233 if (ret != 0) {
1234 mfc_err("error in vb2_querybuf() for E(D)\n");
1235 return ret;
1236 }
1237 buf->m.planes[0].m.mem_offset += DST_QUEUE_OFF_BASE;
1238 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1239 ret = vb2_querybuf(&ctx->vq_src, buf);
1240 if (ret != 0) {
1241 mfc_err("error in vb2_querybuf() for E(S)\n");
1242 return ret;
1243 }
1244 } else {
1245 mfc_err("invalid buf type\n");
1246 return -EINVAL;
1247 }
1248 return ret;
1249}
1250
1251/* Queue a buffer */
1252static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1253{
1254 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1255
1256 if (ctx->state == MFCINST_ERROR) {
1257 mfc_err("Call on QBUF after unrecoverable error\n");
1258 return -EIO;
1259 }
f9f715a9
AH		 1260 if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1261 if (ctx->state == MFCINST_FINISHING) {
1262 mfc_err("Call on QBUF after EOS command\n");
1263 return -EIO;
1264 }
af935746 1265 return vb2_qbuf(&ctx->vq_src, buf);
f9f715a9 1266 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
af935746 1267 return vb2_qbuf(&ctx->vq_dst, buf);
f9f715a9 1268 }
af935746
KD		 1269 return -EINVAL;
1270}
1271
1272/* Dequeue a buffer */
1273static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1274{
f9f715a9
AH		 1275 const struct v4l2_event ev = {
1276 .type = V4L2_EVENT_EOS
1277 };
af935746 1278 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
f9f715a9 1279 int ret;
af935746
KD		 1280
1281 if (ctx->state == MFCINST_ERROR) {
1282 mfc_err("Call on DQBUF after unrecoverable error\n");
1283 return -EIO;
1284 }
f9f715a9
AH		 1285 if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1286 ret = vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK);
1287 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1288 ret = vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK);
1289 if (ret == 0 && ctx->state == MFCINST_FINISHED
1290 && list_empty(&ctx->vq_dst.done_list))
1291 v4l2_event_queue_fh(&ctx->fh, &ev);
1292 } else {
1293 ret = -EINVAL;
1294 }
1295
1296 return ret;
af935746
KD		 1297}
1298
6fa9dd06
TS		 1299/* Export DMA buffer */
1300static int vidioc_expbuf(struct file *file, void *priv,
1301 struct v4l2_exportbuffer *eb)
1302{
1303 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1304
1305 if (eb->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1306 return vb2_expbuf(&ctx->vq_src, eb);
1307 if (eb->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1308 return vb2_expbuf(&ctx->vq_dst, eb);
1309 return -EINVAL;
1310}
1311
af935746
KD		 1312/* Stream on */
1313static int vidioc_streamon(struct file *file, void *priv,
1314 enum v4l2_buf_type type)
1315{
1316 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1317
1318 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1319 return vb2_streamon(&ctx->vq_src, type);
1320 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1321 return vb2_streamon(&ctx->vq_dst, type);
1322 return -EINVAL;
1323}
1324
1325/* Stream off, which equals to a pause */
1326static int vidioc_streamoff(struct file *file, void *priv,
1327 enum v4l2_buf_type type)
1328{
1329 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1330
1331 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1332 return vb2_streamoff(&ctx->vq_src, type);
1333 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1334 return vb2_streamoff(&ctx->vq_dst, type);
1335 return -EINVAL;
1336}
1337
1338static inline int h264_level(enum v4l2_mpeg_video_h264_level lvl)
1339{
1340 static unsigned int t[V4L2_MPEG_VIDEO_H264_LEVEL_4_0 + 1] = {
1341 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_0 */ 10,
1342 /* V4L2_MPEG_VIDEO_H264_LEVEL_1B */ 9,
1343 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_1 */ 11,
1344 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_2 */ 12,
1345 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_3 */ 13,
1346 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_0 */ 20,
1347 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_1 */ 21,
1348 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_2 */ 22,
1349 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_0 */ 30,
1350 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_1 */ 31,
1351 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_2 */ 32,
1352 /* V4L2_MPEG_VIDEO_H264_LEVEL_4_0 */ 40,
1353 };
1354 return t[lvl];
1355}
1356
1357static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
1358{
1359 static unsigned int t[V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 + 1] = {
1360 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0 */ 0,
1361 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B */ 9,
1362 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_1 */ 1,
1363 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_2 */ 2,
1364 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3 */ 3,
1365 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B */ 7,
1366 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_4 */ 4,
1367 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 */ 5,
1368 };
1369 return t[lvl];
1370}
1371
1372static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
1373{
1374 static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
1375 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED */ 0,
1376 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1 */ 1,
1377 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11 */ 2,
1378 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11 */ 3,
1379 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11 */ 4,
1380 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33 */ 5,
1381 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11 */ 6,
1382 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11 */ 7,
1383 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11 */ 8,
1384 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33 */ 9,
1385 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11 */ 10,
1386 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11 */ 11,
1387 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33 */ 12,
1388 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99 */ 13,
1389 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3 */ 14,
1390 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2 */ 15,
1391 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1 */ 16,
1392 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED */ 255,
1393 };
1394 return t[sar];
1395}
1396
1397static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
1398{
1399 struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
1400 struct s5p_mfc_dev *dev = ctx->dev;
1401 struct s5p_mfc_enc_params *p = &ctx->enc_params;
1402 int ret = 0;
1403
1404 switch (ctrl->id) {
1405 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1406 p->gop_size = ctrl->val;
1407 break;
1408 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1409 p->slice_mode = ctrl->val;
1410 break;
1411 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1412 p->slice_mb = ctrl->val;
1413 break;
1414 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1415 p->slice_bit = ctrl->val * 8;
1416 break;
1417 case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB:
1418 p->intra_refresh_mb = ctrl->val;
1419 break;
1420 case V4L2_CID_MPEG_MFC51_VIDEO_PADDING:
1421 p->pad = ctrl->val;
1422 break;
1423 case V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV:
1424 p->pad_luma = (ctrl->val >> 16) & 0xff;
1425 p->pad_cb = (ctrl->val >> 8) & 0xff;
1426 p->pad_cr = (ctrl->val >> 0) & 0xff;
1427 break;
1428 case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE:
1429 p->rc_frame = ctrl->val;
1430 break;
1431 case V4L2_CID_MPEG_VIDEO_BITRATE:
1432 p->rc_bitrate = ctrl->val;
1433 break;
1434 case V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF:
1435 p->rc_reaction_coeff = ctrl->val;
1436 break;
1437 case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE:
1438 ctx->force_frame_type = ctrl->val;
1439 break;
1440 case V4L2_CID_MPEG_VIDEO_VBV_SIZE:
1441 p->vbv_size = ctrl->val;
1442 break;
a378a320
AG		 1443 case V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE:
1444 p->mv_h_range = ctrl->val;
1445 break;
1446 case V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE:
1447 p->mv_v_range = ctrl->val;
1448 break;
af935746
KD		 1449 case V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE:
1450 p->codec.h264.cpb_size = ctrl->val;
1451 break;
1452 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1453 p->seq_hdr_mode = ctrl->val;
1454 break;
1455 case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE:
1456 p->frame_skip_mode = ctrl->val;
1457 break;
1458 case V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT:
1459 p->fixed_target_bit = ctrl->val;
1460 break;
1461 case V4L2_CID_MPEG_VIDEO_B_FRAMES:
1462 p->num_b_frame = ctrl->val;
1463 break;
1464 case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
1465 switch (ctrl->val) {
1466 case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN:
1467 p->codec.h264.profile =
1468 S5P_FIMV_ENC_PROFILE_H264_MAIN;
1469 break;
1470 case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH:
1471 p->codec.h264.profile =
1472 S5P_FIMV_ENC_PROFILE_H264_HIGH;
1473 break;
1474 case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE:
1475 p->codec.h264.profile =
1476 S5P_FIMV_ENC_PROFILE_H264_BASELINE;
1477 break;
f96f3cfa 1478 case V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE:
722b979e 1479 if (IS_MFCV6_PLUS(dev))
f96f3cfa
JP		 1480 p->codec.h264.profile =
1481 S5P_FIMV_ENC_PROFILE_H264_CONSTRAINED_BASELINE;
1482 else
1483 ret = -EINVAL;
1484 break;
af935746
KD		 1485 default:
1486 ret = -EINVAL;
1487 }
1488 break;
1489 case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
1490 p->codec.h264.level_v4l2 = ctrl->val;
1491 p->codec.h264.level = h264_level(ctrl->val);
1492 if (p->codec.h264.level < 0) {
1493 mfc_err("Level number is wrong\n");
1494 ret = p->codec.h264.level;
1495 }
1496 break;
1497 case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL:
1498 p->codec.mpeg4.level_v4l2 = ctrl->val;
1499 p->codec.mpeg4.level = mpeg4_level(ctrl->val);
1500 if (p->codec.mpeg4.level < 0) {
1501 mfc_err("Level number is wrong\n");
1502 ret = p->codec.mpeg4.level;
1503 }
1504 break;
1505 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
1506 p->codec.h264.loop_filter_mode = ctrl->val;
1507 break;
1508 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA:
1509 p->codec.h264.loop_filter_alpha = ctrl->val;
1510 break;
1511 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA:
1512 p->codec.h264.loop_filter_beta = ctrl->val;
1513 break;
1514 case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE:
1515 p->codec.h264.entropy_mode = ctrl->val;
1516 break;
1517 case V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P:
1518 p->codec.h264.num_ref_pic_4p = ctrl->val;
1519 break;
1520 case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM:
1521 p->codec.h264._8x8_transform = ctrl->val;
1522 break;
1523 case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE:
8f532a7f 1524 p->rc_mb = ctrl->val;
af935746
KD		 1525 break;
1526 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1527 p->codec.h264.rc_frame_qp = ctrl->val;
1528 break;
1529 case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
1530 p->codec.h264.rc_min_qp = ctrl->val;
1531 break;
1532 case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
1533 p->codec.h264.rc_max_qp = ctrl->val;
1534 break;
1535 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1536 p->codec.h264.rc_p_frame_qp = ctrl->val;
1537 break;
1538 case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP:
1539 p->codec.h264.rc_b_frame_qp = ctrl->val;
1540 break;
1541 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1542 case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP:
1543 p->codec.mpeg4.rc_frame_qp = ctrl->val;
1544 break;
1545 case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP:
1546 case V4L2_CID_MPEG_VIDEO_H263_MIN_QP:
1547 p->codec.mpeg4.rc_min_qp = ctrl->val;
1548 break;
1549 case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP:
1550 case V4L2_CID_MPEG_VIDEO_H263_MAX_QP:
1551 p->codec.mpeg4.rc_max_qp = ctrl->val;
1552 break;
1553 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1554 case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP:
1555 p->codec.mpeg4.rc_p_frame_qp = ctrl->val;
1556 break;
1557 case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP:
1558 case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP:
1559 p->codec.mpeg4.rc_b_frame_qp = ctrl->val;
1560 break;
1561 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK:
1562 p->codec.h264.rc_mb_dark = ctrl->val;
1563 break;
1564 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH:
1565 p->codec.h264.rc_mb_smooth = ctrl->val;
1566 break;
1567 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC:
1568 p->codec.h264.rc_mb_static = ctrl->val;
1569 break;
1570 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY:
1571 p->codec.h264.rc_mb_activity = ctrl->val;
1572 break;
1573 case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE:
1574 p->codec.h264.vui_sar = ctrl->val;
1575 break;
1576 case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC:
1577 p->codec.h264.vui_sar_idc = vui_sar_idc(ctrl->val);
1578 break;
1579 case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH:
1580 p->codec.h264.vui_ext_sar_width = ctrl->val;
1581 break;
1582 case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT:
1583 p->codec.h264.vui_ext_sar_height = ctrl->val;
1584 break;
1585 case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE:
1586 p->codec.h264.open_gop = !ctrl->val;
1587 break;
1588 case V4L2_CID_MPEG_VIDEO_H264_I_PERIOD:
1589 p->codec.h264.open_gop_size = ctrl->val;
1590 break;
1591 case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE:
1592 switch (ctrl->val) {
1593 case V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE:
1594 p->codec.mpeg4.profile =
1595 S5P_FIMV_ENC_PROFILE_MPEG4_SIMPLE;
1596 break;
1597 case V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE:
1598 p->codec.mpeg4.profile =
1599 S5P_FIMV_ENC_PROFILE_MPEG4_ADVANCED_SIMPLE;
1600 break;
1601 default:
1602 ret = -EINVAL;
1603 }
1604 break;
1605 case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL:
1606 p->codec.mpeg4.quarter_pixel = ctrl->val;
1607 break;
3a967706
AK		 1608 case V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS:
1609 p->codec.vp8.num_partitions = ctrl->val;
1610 break;
1611 case V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4:
1612 p->codec.vp8.imd_4x4 = ctrl->val;
1613 break;
1614 case V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES:
1615 p->codec.vp8.num_ref = ctrl->val;
1616 break;
1617 case V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL:
1618 p->codec.vp8.filter_level = ctrl->val;
1619 break;
1620 case V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS:
1621 p->codec.vp8.filter_sharpness = ctrl->val;
1622 break;
1623 case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD:
1624 p->codec.vp8.golden_frame_ref_period = ctrl->val;
1625 break;
1626 case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
1627 p->codec.vp8.golden_frame_sel = ctrl->val;
1628 break;
4773ab99
AK		 1629 case V4L2_CID_MPEG_VIDEO_VPX_MIN_QP:
1630 p->codec.vp8.rc_min_qp = ctrl->val;
1631 break;
1632 case V4L2_CID_MPEG_VIDEO_VPX_MAX_QP:
1633 p->codec.vp8.rc_max_qp = ctrl->val;
1634 break;
1635 case V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP:
1636 p->codec.vp8.rc_frame_qp = ctrl->val;
1637 break;
1638 case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:
1639 p->codec.vp8.rc_p_frame_qp = ctrl->val;
1640 break;
bbd8f3fe
KA		 1641 case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
1642 p->codec.vp8.profile = ctrl->val;
1643 break;
af935746
KD		 1644 default:
1645 v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
1646 ctrl->id, ctrl->val);
1647 ret = -EINVAL;
1648 }
1649 return ret;
1650}
1651
c4b1ce05
KA		 1652static int s5p_mfc_enc_g_v_ctrl(struct v4l2_ctrl *ctrl)
1653{
1654 struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
1655 struct s5p_mfc_dev *dev = ctx->dev;
1656
1657 switch (ctrl->id) {
1658 case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT:
1659 if (ctx->state >= MFCINST_HEAD_PARSED &&
1660 ctx->state < MFCINST_ABORT) {
1661 ctrl->val = ctx->pb_count;
1662 break;
1663 } else if (ctx->state != MFCINST_INIT) {
1664 v4l2_err(&dev->v4l2_dev, "Encoding not initialised\n");
1665 return -EINVAL;
1666 }
1667 /* Should wait for the header to be produced */
c4b1ce05
KA		 1668 s5p_mfc_wait_for_done_ctx(ctx,
1669 S5P_MFC_R2H_CMD_SEQ_DONE_RET, 0);
1670 if (ctx->state >= MFCINST_HEAD_PARSED &&
1671 ctx->state < MFCINST_ABORT) {
1672 ctrl->val = ctx->pb_count;
1673 } else {
1674 v4l2_err(&dev->v4l2_dev, "Encoding not initialised\n");
1675 return -EINVAL;
1676 }
1677 break;
1678 }
1679 return 0;
1680}
1681
af935746
KD		 1682static const struct v4l2_ctrl_ops s5p_mfc_enc_ctrl_ops = {
1683 .s_ctrl = s5p_mfc_enc_s_ctrl,
c4b1ce05 1684 .g_volatile_ctrl = s5p_mfc_enc_g_v_ctrl,
af935746
KD		 1685};
1686
3e9095d5
SK		 1687static int vidioc_s_parm(struct file *file, void *priv,
1688 struct v4l2_streamparm *a)
af935746
KD		 1689{
1690 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1691
1692 if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1693 ctx->enc_params.rc_framerate_num =
1694 a->parm.output.timeperframe.denominator;
1695 ctx->enc_params.rc_framerate_denom =
1696 a->parm.output.timeperframe.numerator;
1697 } else {
1698 mfc_err("Setting FPS is only possible for the output queue\n");
1699 return -EINVAL;
1700 }
1701 return 0;
1702}
1703
3e9095d5
SK		 1704static int vidioc_g_parm(struct file *file, void *priv,
1705 struct v4l2_streamparm *a)
af935746
KD		 1706{
1707 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1708
1709 if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1710 a->parm.output.timeperframe.denominator =
1711 ctx->enc_params.rc_framerate_num;
1712 a->parm.output.timeperframe.numerator =
1713 ctx->enc_params.rc_framerate_denom;
1714 } else {
1715 mfc_err("Setting FPS is only possible for the output queue\n");
1716 return -EINVAL;
1717 }
1718 return 0;
1719}
1720
8492ec69
MCC		 1721static int vidioc_encoder_cmd(struct file *file, void *priv,
1722 struct v4l2_encoder_cmd *cmd)
f9f715a9
AH		 1723{
1724 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1725 struct s5p_mfc_dev *dev = ctx->dev;
1726 struct s5p_mfc_buf *buf;
1727 unsigned long flags;
1728
1729 switch (cmd->cmd) {
1730 case V4L2_ENC_CMD_STOP:
1731 if (cmd->flags != 0)
1732 return -EINVAL;
1733
1734 if (!ctx->vq_src.streaming)
1735 return -EINVAL;
1736
1737 spin_lock_irqsave(&dev->irqlock, flags);
1738 if (list_empty(&ctx->src_queue)) {
4130eabc 1739 mfc_debug(2, "EOS: empty src queue, entering finishing state\n");
f9f715a9 1740 ctx->state = MFCINST_FINISHING;
eb362092
KD		 1741 if (s5p_mfc_ctx_ready(ctx))
1742 set_work_bit_irqsave(ctx);
f9f715a9 1743 spin_unlock_irqrestore(&dev->irqlock, flags);
e2c3be2a 1744 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
f9f715a9 1745 } else {
4130eabc 1746 mfc_debug(2, "EOS: marking last buffer of stream\n");
f9f715a9
AH		 1747 buf = list_entry(ctx->src_queue.prev,
1748 struct s5p_mfc_buf, list);
1749 if (buf->flags & MFC_BUF_FLAG_USED)
1750 ctx->state = MFCINST_FINISHING;
1751 else
1752 buf->flags |= MFC_BUF_FLAG_EOS;
1753 spin_unlock_irqrestore(&dev->irqlock, flags);
1754 }
1755 break;
1756 default:
1757 return -EINVAL;
1758
1759 }
1760 return 0;
1761}
1762
1763static int vidioc_subscribe_event(struct v4l2_fh *fh,
e1393b59 1764 const struct v4l2_event_subscription *sub)
f9f715a9
AH		 1765{
1766 switch (sub->type) {
1767 case V4L2_EVENT_EOS:
1768 return v4l2_event_subscribe(fh, sub, 2, NULL);
1769 default:
1770 return -EINVAL;
1771 }
1772}
1773
af935746
KD		 1774static const struct v4l2_ioctl_ops s5p_mfc_enc_ioctl_ops = {
1775 .vidioc_querycap = vidioc_querycap,
af935746 1776 .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane,
af935746
KD		 1777 .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane,
1778 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
1779 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
1780 .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt,
1781 .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt,
1782 .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt,
1783 .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt,
1784 .vidioc_reqbufs = vidioc_reqbufs,
1785 .vidioc_querybuf = vidioc_querybuf,
1786 .vidioc_qbuf = vidioc_qbuf,
1787 .vidioc_dqbuf = vidioc_dqbuf,
6fa9dd06 1788 .vidioc_expbuf = vidioc_expbuf,
af935746
KD		 1789 .vidioc_streamon = vidioc_streamon,
1790 .vidioc_streamoff = vidioc_streamoff,
1791 .vidioc_s_parm = vidioc_s_parm,
1792 .vidioc_g_parm = vidioc_g_parm,
f9f715a9
AH		 1793 .vidioc_encoder_cmd = vidioc_encoder_cmd,
1794 .vidioc_subscribe_event = vidioc_subscribe_event,
1795 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
af935746
KD		 1796};
1797
1798static int check_vb_with_fmt(struct s5p_mfc_fmt *fmt, struct vb2_buffer *vb)
1799{
1800 int i;
1801
1802 if (!fmt)
1803 return -EINVAL;
1804 if (fmt->num_planes != vb->num_planes) {
1805 mfc_err("invalid plane number for the format\n");
1806 return -EINVAL;
1807 }
1808 for (i = 0; i < fmt->num_planes; i++) {
03ce7816
MCC		 1809 dma_addr_t dma = vb2_dma_contig_plane_dma_addr(vb, i);
1810 if (!dma) {
af935746
KD		 1811 mfc_err("failed to get plane cookie\n");
1812 return -EINVAL;
1813 }
03ce7816 1814 mfc_debug(2, "index: %d, plane[%d] cookie: %pad\n",
2d700715 1815 vb->index, i, &dma);
af935746
KD		 1816 }
1817 return 0;
1818}
1819
1820static int s5p_mfc_queue_setup(struct vb2_queue *vq,
fc714e70
GL		 1821 unsigned int *buf_count, unsigned int *plane_count,
1822 unsigned int psize[], void *allocators[])
af935746
KD		 1823{
1824 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
f96f3cfa 1825 struct s5p_mfc_dev *dev = ctx->dev;
af935746 1826
af935746 1827 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
d44da046 1828 if (ctx->state != MFCINST_GOT_INST) {
f6375eaf 1829 mfc_err("invalid state: %d\n", ctx->state);
d44da046
SWK		 1830 return -EINVAL;
1831 }
1832
af935746
KD		 1833 if (ctx->dst_fmt)
1834 *plane_count = ctx->dst_fmt->num_planes;
1835 else
1836 *plane_count = MFC_ENC_CAP_PLANE_COUNT;
1837 if (*buf_count < 1)
1838 *buf_count = 1;
1839 if (*buf_count > MFC_MAX_BUFFERS)
1840 *buf_count = MFC_MAX_BUFFERS;
1841 psize[0] = ctx->enc_dst_buf_size;
1842 allocators[0] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1843 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1844 if (ctx->src_fmt)
1845 *plane_count = ctx->src_fmt->num_planes;
1846 else
1847 *plane_count = MFC_ENC_OUT_PLANE_COUNT;
1848
1849 if (*buf_count < 1)
1850 *buf_count = 1;
1851 if (*buf_count > MFC_MAX_BUFFERS)
1852 *buf_count = MFC_MAX_BUFFERS;
722b979e 1853
af935746
KD		 1854 psize[0] = ctx->luma_size;
1855 psize[1] = ctx->chroma_size;
debe6267 1856
722b979e 1857 if (IS_MFCV6_PLUS(dev)) {
f96f3cfa
JP		 1858 allocators[0] =
1859 ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1860 allocators[1] =
1861 ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1862 } else {
1863 allocators[0] =
1864 ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX];
1865 allocators[1] =
1866 ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX];
1867 }
af935746 1868 } else {
f6375eaf 1869 mfc_err("invalid queue type: %d\n", vq->type);
af935746
KD		 1870 return -EINVAL;
1871 }
1872 return 0;
1873}
1874
af935746
KD		 1875static int s5p_mfc_buf_init(struct vb2_buffer *vb)
1876{
2d700715 1877 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
af935746
KD		 1878 struct vb2_queue *vq = vb->vb2_queue;
1879 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1880 unsigned int i;
1881 int ret;
1882
1883 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1884 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1885 if (ret < 0)
1886 return ret;
2d700715
JS		 1887 i = vb->index;
1888 ctx->dst_bufs[i].b = vbuf;
af935746 1889 ctx->dst_bufs[i].cookie.stream =
ba7fcb0c 1890 vb2_dma_contig_plane_dma_addr(vb, 0);
af935746
KD		 1891 ctx->dst_bufs_cnt++;
1892 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1893 ret = check_vb_with_fmt(ctx->src_fmt, vb);
1894 if (ret < 0)
1895 return ret;
2d700715
JS		 1896 i = vb->index;
1897 ctx->src_bufs[i].b = vbuf;
af935746 1898 ctx->src_bufs[i].cookie.raw.luma =
ba7fcb0c 1899 vb2_dma_contig_plane_dma_addr(vb, 0);
af935746 1900 ctx->src_bufs[i].cookie.raw.chroma =
ba7fcb0c 1901 vb2_dma_contig_plane_dma_addr(vb, 1);
af935746
KD		 1902 ctx->src_bufs_cnt++;
1903 } else {
f6375eaf 1904 mfc_err("invalid queue type: %d\n", vq->type);
af935746
KD		 1905 return -EINVAL;
1906 }
1907 return 0;
1908}
1909
1910static int s5p_mfc_buf_prepare(struct vb2_buffer *vb)
1911{
1912 struct vb2_queue *vq = vb->vb2_queue;
1913 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1914 int ret;
1915
1916 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1917 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1918 if (ret < 0)
1919 return ret;
03ce7816 1920 mfc_debug(2, "plane size: %ld, dst size: %zu\n",
af935746
KD		 1921 vb2_plane_size(vb, 0), ctx->enc_dst_buf_size);
1922 if (vb2_plane_size(vb, 0) < ctx->enc_dst_buf_size) {
1923 mfc_err("plane size is too small for capture\n");
1924 return -EINVAL;
1925 }
1926 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1927 ret = check_vb_with_fmt(ctx->src_fmt, vb);
1928 if (ret < 0)
1929 return ret;
1930 mfc_debug(2, "plane size: %ld, luma size: %d\n",
1931 vb2_plane_size(vb, 0), ctx->luma_size);
1932 mfc_debug(2, "plane size: %ld, chroma size: %d\n",
1933 vb2_plane_size(vb, 1), ctx->chroma_size);
1934 if (vb2_plane_size(vb, 0) < ctx->luma_size ||
1935 vb2_plane_size(vb, 1) < ctx->chroma_size) {
1936 mfc_err("plane size is too small for output\n");
1937 return -EINVAL;
1938 }
1939 } else {
f6375eaf 1940 mfc_err("invalid queue type: %d\n", vq->type);
af935746
KD		 1941 return -EINVAL;
1942 }
1943 return 0;
1944}
1945
bd323e28 1946static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count)
af935746
KD		 1947{
1948 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1949 struct s5p_mfc_dev *dev = ctx->dev;
af935746 1950
722b979e
AK		 1951 if (IS_MFCV6_PLUS(dev) &&
1952 (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)) {
e9d98ddc
AK		 1953
1954 if ((ctx->state == MFCINST_GOT_INST) &&
1955 (dev->curr_ctx == ctx->num) && dev->hw_lock) {
1956 s5p_mfc_wait_for_done_ctx(ctx,
1957 S5P_MFC_R2H_CMD_SEQ_DONE_RET,
1958 0);
1959 }
1960
1961 if (ctx->src_bufs_cnt < ctx->pb_count) {
1962 mfc_err("Need minimum %d OUTPUT buffers\n",
1963 ctx->pb_count);
79aeb3f3 1964 return -ENOBUFS;
e9d98ddc
AK		 1965 }
1966 }
1967
af935746 1968 /* If context is ready then dev = work->data;schedule it to run */
7fb89eca
AH		 1969 if (s5p_mfc_ctx_ready(ctx))
1970 set_work_bit_irqsave(ctx);
e2c3be2a 1971 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
e9d98ddc 1972
af935746
KD		 1973 return 0;
1974}
1975
e37559b2 1976static void s5p_mfc_stop_streaming(struct vb2_queue *q)
af935746
KD		 1977{
1978 unsigned long flags;
1979 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1980 struct s5p_mfc_dev *dev = ctx->dev;
1981
1982 if ((ctx->state == MFCINST_FINISHING ||
1983 ctx->state == MFCINST_RUNNING) &&
1984 dev->curr_ctx == ctx->num && dev->hw_lock) {
1985 ctx->state = MFCINST_ABORT;
43a1ea1f 1986 s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_FRAME_DONE_RET,
af935746
KD		 1987 0);
1988 }
1989 ctx->state = MFCINST_FINISHED;
1990 spin_lock_irqsave(&dev->irqlock, flags);
1991 if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
e2c3be2a
KD		 1992 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
1993 &ctx->dst_queue, &ctx->vq_dst);
af935746
KD		 1994 INIT_LIST_HEAD(&ctx->dst_queue);
1995 ctx->dst_queue_cnt = 0;
1996 }
1997 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1998 cleanup_ref_queue(ctx);
e2c3be2a 1999 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, &ctx->src_queue,
43a1ea1f 2000 &ctx->vq_src);
af935746
KD		 2001 INIT_LIST_HEAD(&ctx->src_queue);
2002 ctx->src_queue_cnt = 0;
2003 }
2004 spin_unlock_irqrestore(&dev->irqlock, flags);
af935746
KD		 2005}
2006
2007static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
2008{
2009 struct vb2_queue *vq = vb->vb2_queue;
2010 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
2011 struct s5p_mfc_dev *dev = ctx->dev;
2012 unsigned long flags;
2013 struct s5p_mfc_buf *mfc_buf;
2014
2015 if (ctx->state == MFCINST_ERROR) {
2016 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
2017 cleanup_ref_queue(ctx);
2018 return;
2019 }
2020 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
2d700715 2021 mfc_buf = &ctx->dst_bufs[vb->index];
f9f715a9 2022 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
af935746
KD		 2023 /* Mark destination as available for use by MFC */
2024 spin_lock_irqsave(&dev->irqlock, flags);
2025 list_add_tail(&mfc_buf->list, &ctx->dst_queue);
2026 ctx->dst_queue_cnt++;
2027 spin_unlock_irqrestore(&dev->irqlock, flags);
2028 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
2d700715 2029 mfc_buf = &ctx->src_bufs[vb->index];
f9f715a9 2030 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
af935746 2031 spin_lock_irqsave(&dev->irqlock, flags);
f9f715a9
AH		 2032 list_add_tail(&mfc_buf->list, &ctx->src_queue);
2033 ctx->src_queue_cnt++;
af935746
KD		 2034 spin_unlock_irqrestore(&dev->irqlock, flags);
2035 } else {
2036 mfc_err("unsupported buffer type (%d)\n", vq->type);
2037 }
7fb89eca
AH		 2038 if (s5p_mfc_ctx_ready(ctx))
2039 set_work_bit_irqsave(ctx);
e2c3be2a 2040 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
af935746
KD		 2041}
2042
2043static struct vb2_ops s5p_mfc_enc_qops = {
2044 .queue_setup = s5p_mfc_queue_setup,
654a731b
PL		 2045 .wait_prepare = vb2_ops_wait_prepare,
2046 .wait_finish = vb2_ops_wait_finish,
af935746
KD		 2047 .buf_init = s5p_mfc_buf_init,
2048 .buf_prepare = s5p_mfc_buf_prepare,
2049 .start_streaming = s5p_mfc_start_streaming,
2050 .stop_streaming = s5p_mfc_stop_streaming,
2051 .buf_queue = s5p_mfc_buf_queue,
2052};
2053
4e9691aa 2054const struct s5p_mfc_codec_ops *get_enc_codec_ops(void)
af935746
KD		 2055{
2056 return &encoder_codec_ops;
2057}
2058
2059struct vb2_ops *get_enc_queue_ops(void)
2060{
2061 return &s5p_mfc_enc_qops;
2062}
2063
2064const struct v4l2_ioctl_ops *get_enc_v4l2_ioctl_ops(void)
2065{
2066 return &s5p_mfc_enc_ioctl_ops;
2067}
2068
0f8017be 2069#define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2WHICH(x) == V4L2_CTRL_CLASS_MPEG) \
af935746
KD		 2070 && V4L2_CTRL_DRIVER_PRIV(x))
2071
2072int s5p_mfc_enc_ctrls_setup(struct s5p_mfc_ctx *ctx)
2073{
2074 struct v4l2_ctrl_config cfg;
2075 int i;
2076
2077 v4l2_ctrl_handler_init(&ctx->ctrl_handler, NUM_CTRLS);
2078 if (ctx->ctrl_handler.error) {
2079 mfc_err("v4l2_ctrl_handler_init failed\n");
2080 return ctx->ctrl_handler.error;
2081 }
2082 for (i = 0; i < NUM_CTRLS; i++) {
2083 if (IS_MFC51_PRIV(controls[i].id)) {
a65c3262 2084 memset(&cfg, 0, sizeof(struct v4l2_ctrl_config));
af935746
KD		 2085 cfg.ops = &s5p_mfc_enc_ctrl_ops;
2086 cfg.id = controls[i].id;
2087 cfg.min = controls[i].minimum;
2088 cfg.max = controls[i].maximum;
2089 cfg.def = controls[i].default_value;
2090 cfg.name = controls[i].name;
2091 cfg.type = controls[i].type;
2092 cfg.flags = 0;
2093
2094 if (cfg.type == V4L2_CTRL_TYPE_MENU) {
2095 cfg.step = 0;
2096 cfg.menu_skip_mask = cfg.menu_skip_mask;
2097 cfg.qmenu = mfc51_get_menu(cfg.id);
2098 } else {
2099 cfg.step = controls[i].step;
2100 cfg.menu_skip_mask = 0;
2101 }
2102 ctx->ctrls[i] = v4l2_ctrl_new_custom(&ctx->ctrl_handler,
2103 &cfg, NULL);
2104 } else {
3a967706
AK		 2105 if ((controls[i].type == V4L2_CTRL_TYPE_MENU) ||
2106 (controls[i].type ==
2107 V4L2_CTRL_TYPE_INTEGER_MENU)) {
af935746
KD		 2108 ctx->ctrls[i] = v4l2_ctrl_new_std_menu(
2109 &ctx->ctrl_handler,
2110 &s5p_mfc_enc_ctrl_ops, controls[i].id,
2111 controls[i].maximum, 0,
2112 controls[i].default_value);
2113 } else {
2114 ctx->ctrls[i] = v4l2_ctrl_new_std(
2115 &ctx->ctrl_handler,
2116 &s5p_mfc_enc_ctrl_ops, controls[i].id,
2117 controls[i].minimum,
2118 controls[i].maximum, controls[i].step,
2119 controls[i].default_value);
2120 }
2121 }
2122 if (ctx->ctrl_handler.error) {
2123 mfc_err("Adding control (%d) failed\n", i);
2124 return ctx->ctrl_handler.error;
2125 }
2126 if (controls[i].is_volatile && ctx->ctrls[i])
88365105 2127 ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_VOLATILE;
af935746 2128 }
69c9fe6f 2129 v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
af935746
KD		 2130 return 0;
2131}
2132
2133void s5p_mfc_enc_ctrls_delete(struct s5p_mfc_ctx *ctx)
2134{
2135 int i;
2136
2137 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
2138 for (i = 0; i < NUM_CTRLS; i++)
2139 ctx->ctrls[i] = NULL;
2140}
43a1ea1f
AK		 2141
2142void s5p_mfc_enc_init(struct s5p_mfc_ctx *ctx)
2143{
2144 struct v4l2_format f;
2145 f.fmt.pix_mp.pixelformat = DEF_SRC_FMT_ENC;
2146 ctx->src_fmt = find_format(&f, MFC_FMT_RAW);
2147 f.fmt.pix_mp.pixelformat = DEF_DST_FMT_ENC;
2148 ctx->dst_fmt = find_format(&f, MFC_FMT_ENC);
2149}
2150
Linux 6.x block layer and io_uring tree(s)