Merge branch 'core-objtool-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-block.git] / drivers / media / platform / s5p-g2d / g2d.c
CommitLineData
2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
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2/*
3 * Samsung S5P G2D - 2D Graphics Accelerator Driver
4 *
5 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
6 * Kamil Debski, <k.debski@samsung.com>
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7 */
8
9#include <linux/module.h>
10#include <linux/fs.h>
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11#include <linux/timer.h>
12#include <linux/sched.h>
13#include <linux/slab.h>
14#include <linux/clk.h>
15#include <linux/interrupt.h>
5ce60d79 16#include <linux/of.h>
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17
18#include <linux/platform_device.h>
19#include <media/v4l2-mem2mem.h>
20#include <media/v4l2-device.h>
21#include <media/v4l2-ioctl.h>
c139990e 22#include <media/videobuf2-v4l2.h>
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23#include <media/videobuf2-dma-contig.h>
24
25#include "g2d.h"
26#include "g2d-regs.h"
27
28#define fh2ctx(__fh) container_of(__fh, struct g2d_ctx, fh)
29
30static struct g2d_fmt formats[] = {
31 {
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32 .fourcc = V4L2_PIX_FMT_RGB32,
33 .depth = 32,
34 .hw = COLOR_MODE(ORDER_XRGB, MODE_XRGB_8888),
35 },
36 {
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37 .fourcc = V4L2_PIX_FMT_RGB565X,
38 .depth = 16,
39 .hw = COLOR_MODE(ORDER_XRGB, MODE_RGB_565),
40 },
41 {
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42 .fourcc = V4L2_PIX_FMT_RGB555X,
43 .depth = 16,
44 .hw = COLOR_MODE(ORDER_XRGB, MODE_XRGB_1555),
45 },
46 {
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47 .fourcc = V4L2_PIX_FMT_RGB444,
48 .depth = 16,
49 .hw = COLOR_MODE(ORDER_XRGB, MODE_XRGB_4444),
50 },
51 {
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52 .fourcc = V4L2_PIX_FMT_RGB24,
53 .depth = 24,
54 .hw = COLOR_MODE(ORDER_XRGB, MODE_PACKED_RGB_888),
55 },
56};
57#define NUM_FORMATS ARRAY_SIZE(formats)
58
ec76afe8 59static struct g2d_frame def_frame = {
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60 .width = DEFAULT_WIDTH,
61 .height = DEFAULT_HEIGHT,
62 .c_width = DEFAULT_WIDTH,
63 .c_height = DEFAULT_HEIGHT,
64 .o_width = 0,
65 .o_height = 0,
66 .fmt = &formats[0],
67 .right = DEFAULT_WIDTH,
68 .bottom = DEFAULT_HEIGHT,
69};
70
ec76afe8 71static struct g2d_fmt *find_fmt(struct v4l2_format *f)
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72{
73 unsigned int i;
74 for (i = 0; i < NUM_FORMATS; i++) {
75 if (formats[i].fourcc == f->fmt.pix.pixelformat)
76 return &formats[i];
77 }
78 return NULL;
79}
80
81
82static struct g2d_frame *get_frame(struct g2d_ctx *ctx,
f72b9d8c 83 enum v4l2_buf_type type)
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84{
85 switch (type) {
86 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
87 return &ctx->in;
88 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
89 return &ctx->out;
90 default:
91 return ERR_PTR(-EINVAL);
92 }
93}
94
df9ecb0c 95static int g2d_queue_setup(struct vb2_queue *vq,
91884734 96 unsigned int *nbuffers, unsigned int *nplanes,
36c0f8b3 97 unsigned int sizes[], struct device *alloc_devs[])
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98{
99 struct g2d_ctx *ctx = vb2_get_drv_priv(vq);
100 struct g2d_frame *f = get_frame(ctx, vq->type);
101
102 if (IS_ERR(f))
103 return PTR_ERR(f);
104
105 sizes[0] = f->size;
106 *nplanes = 1;
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107
108 if (*nbuffers == 0)
109 *nbuffers = 1;
110
111 return 0;
112}
113
114static int g2d_buf_prepare(struct vb2_buffer *vb)
115{
116 struct g2d_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
117 struct g2d_frame *f = get_frame(ctx, vb->vb2_queue->type);
118
119 if (IS_ERR(f))
120 return PTR_ERR(f);
121 vb2_set_plane_payload(vb, 0, f->size);
122 return 0;
123}
124
125static void g2d_buf_queue(struct vb2_buffer *vb)
126{
2d700715 127 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
91884734 128 struct g2d_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
2d700715 129 v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf);
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130}
131
b7b361f0 132static const struct vb2_ops g2d_qops = {
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133 .queue_setup = g2d_queue_setup,
134 .buf_prepare = g2d_buf_prepare,
135 .buf_queue = g2d_buf_queue,
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136 .wait_prepare = vb2_ops_wait_prepare,
137 .wait_finish = vb2_ops_wait_finish,
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138};
139
140static int queue_init(void *priv, struct vb2_queue *src_vq,
141 struct vb2_queue *dst_vq)
142{
143 struct g2d_ctx *ctx = priv;
144 int ret;
145
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146 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
147 src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
148 src_vq->drv_priv = ctx;
149 src_vq->ops = &g2d_qops;
150 src_vq->mem_ops = &vb2_dma_contig_memops;
151 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
ade48681 152 src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
febeaa45 153 src_vq->lock = &ctx->dev->mutex;
c781e4a5 154 src_vq->dev = ctx->dev->v4l2_dev.dev;
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155
156 ret = vb2_queue_init(src_vq);
157 if (ret)
158 return ret;
159
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160 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
161 dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
162 dst_vq->drv_priv = ctx;
163 dst_vq->ops = &g2d_qops;
164 dst_vq->mem_ops = &vb2_dma_contig_memops;
165 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
ade48681 166 dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
febeaa45 167 dst_vq->lock = &ctx->dev->mutex;
c781e4a5 168 dst_vq->dev = ctx->dev->v4l2_dev.dev;
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169
170 return vb2_queue_init(dst_vq);
171}
172
173static int g2d_s_ctrl(struct v4l2_ctrl *ctrl)
174{
175 struct g2d_ctx *ctx = container_of(ctrl->handler, struct g2d_ctx,
176 ctrl_handler);
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177 unsigned long flags;
178
179 spin_lock_irqsave(&ctx->dev->ctrl_lock, flags);
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180 switch (ctrl->id) {
181 case V4L2_CID_COLORFX:
182 if (ctrl->val == V4L2_COLORFX_NEGATIVE)
183 ctx->rop = ROP4_INVERT;
184 else
185 ctx->rop = ROP4_COPY;
7f6cce69 186 break;
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187
188 case V4L2_CID_HFLIP:
189 ctx->flip = ctx->ctrl_hflip->val | (ctx->ctrl_vflip->val << 1);
190 break;
191
91884734 192 }
27dda973 193 spin_unlock_irqrestore(&ctx->dev->ctrl_lock, flags);
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194 return 0;
195}
196
197static const struct v4l2_ctrl_ops g2d_ctrl_ops = {
198 .s_ctrl = g2d_s_ctrl,
199};
200
ec76afe8 201static int g2d_setup_ctrls(struct g2d_ctx *ctx)
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202{
203 struct g2d_dev *dev = ctx->dev;
204
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205 v4l2_ctrl_handler_init(&ctx->ctrl_handler, 3);
206
207 ctx->ctrl_hflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, &g2d_ctrl_ops,
208 V4L2_CID_HFLIP, 0, 1, 1, 0);
209
210 ctx->ctrl_vflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, &g2d_ctrl_ops,
211 V4L2_CID_VFLIP, 0, 1, 1, 0);
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212
213 v4l2_ctrl_new_std_menu(
214 &ctx->ctrl_handler,
215 &g2d_ctrl_ops,
216 V4L2_CID_COLORFX,
217 V4L2_COLORFX_NEGATIVE,
218 ~((1 << V4L2_COLORFX_NONE) | (1 << V4L2_COLORFX_NEGATIVE)),
219 V4L2_COLORFX_NONE);
220
221 if (ctx->ctrl_handler.error) {
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222 int err = ctx->ctrl_handler.error;
223 v4l2_err(&dev->v4l2_dev, "g2d_setup_ctrls failed\n");
224 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
225 return err;
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226 }
227
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228 v4l2_ctrl_cluster(2, &ctx->ctrl_hflip);
229
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230 return 0;
231}
232
233static int g2d_open(struct file *file)
234{
235 struct g2d_dev *dev = video_drvdata(file);
236 struct g2d_ctx *ctx = NULL;
237 int ret = 0;
238
239 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
240 if (!ctx)
241 return -ENOMEM;
242 ctx->dev = dev;
243 /* Set default formats */
244 ctx->in = def_frame;
245 ctx->out = def_frame;
246
de40cb22
HV
247 if (mutex_lock_interruptible(&dev->mutex)) {
248 kfree(ctx);
249 return -ERESTARTSYS;
250 }
febeaa45
SN
251 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, &queue_init);
252 if (IS_ERR(ctx->fh.m2m_ctx)) {
253 ret = PTR_ERR(ctx->fh.m2m_ctx);
de40cb22 254 mutex_unlock(&dev->mutex);
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255 kfree(ctx);
256 return ret;
257 }
258 v4l2_fh_init(&ctx->fh, video_devdata(file));
259 file->private_data = &ctx->fh;
260 v4l2_fh_add(&ctx->fh);
261
262 g2d_setup_ctrls(ctx);
263
264 /* Write the default values to the ctx struct */
265 v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
266
267 ctx->fh.ctrl_handler = &ctx->ctrl_handler;
de40cb22 268 mutex_unlock(&dev->mutex);
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269
270 v4l2_info(&dev->v4l2_dev, "instance opened\n");
271 return 0;
272}
273
274static int g2d_release(struct file *file)
275{
276 struct g2d_dev *dev = video_drvdata(file);
277 struct g2d_ctx *ctx = fh2ctx(file->private_data);
278
279 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
280 v4l2_fh_del(&ctx->fh);
281 v4l2_fh_exit(&ctx->fh);
282 kfree(ctx);
283 v4l2_info(&dev->v4l2_dev, "instance closed\n");
284 return 0;
285}
286
287
288static int vidioc_querycap(struct file *file, void *priv,
289 struct v4l2_capability *cap)
290{
85709cbf
MCC
291 strscpy(cap->driver, G2D_NAME, sizeof(cap->driver));
292 strscpy(cap->card, G2D_NAME, sizeof(cap->card));
91884734 293 cap->bus_info[0] = 0;
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294 return 0;
295}
296
297static int vidioc_enum_fmt(struct file *file, void *prv, struct v4l2_fmtdesc *f)
298{
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299 if (f->index >= NUM_FORMATS)
300 return -EINVAL;
59fe916c 301 f->pixelformat = formats[f->index].fourcc;
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302 return 0;
303}
304
305static int vidioc_g_fmt(struct file *file, void *prv, struct v4l2_format *f)
306{
307 struct g2d_ctx *ctx = prv;
308 struct vb2_queue *vq;
309 struct g2d_frame *frm;
310
febeaa45 311 vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
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312 if (!vq)
313 return -EINVAL;
314 frm = get_frame(ctx, f->type);
315 if (IS_ERR(frm))
316 return PTR_ERR(frm);
317
318 f->fmt.pix.width = frm->width;
319 f->fmt.pix.height = frm->height;
320 f->fmt.pix.field = V4L2_FIELD_NONE;
321 f->fmt.pix.pixelformat = frm->fmt->fourcc;
322 f->fmt.pix.bytesperline = (frm->width * frm->fmt->depth) >> 3;
323 f->fmt.pix.sizeimage = frm->size;
324 return 0;
325}
326
327static int vidioc_try_fmt(struct file *file, void *prv, struct v4l2_format *f)
328{
329 struct g2d_fmt *fmt;
330 enum v4l2_field *field;
331
332 fmt = find_fmt(f);
333 if (!fmt)
334 return -EINVAL;
335
336 field = &f->fmt.pix.field;
337 if (*field == V4L2_FIELD_ANY)
338 *field = V4L2_FIELD_NONE;
339 else if (*field != V4L2_FIELD_NONE)
340 return -EINVAL;
341
342 if (f->fmt.pix.width > MAX_WIDTH)
343 f->fmt.pix.width = MAX_WIDTH;
344 if (f->fmt.pix.height > MAX_HEIGHT)
345 f->fmt.pix.height = MAX_HEIGHT;
346
347 if (f->fmt.pix.width < 1)
348 f->fmt.pix.width = 1;
349 if (f->fmt.pix.height < 1)
350 f->fmt.pix.height = 1;
351
352 f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3;
353 f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
354 return 0;
355}
356
357static int vidioc_s_fmt(struct file *file, void *prv, struct v4l2_format *f)
358{
359 struct g2d_ctx *ctx = prv;
360 struct g2d_dev *dev = ctx->dev;
361 struct vb2_queue *vq;
362 struct g2d_frame *frm;
363 struct g2d_fmt *fmt;
364 int ret = 0;
365
366 /* Adjust all values accordingly to the hardware capabilities
367 * and chosen format. */
368 ret = vidioc_try_fmt(file, prv, f);
369 if (ret)
370 return ret;
febeaa45 371 vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
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372 if (vb2_is_busy(vq)) {
373 v4l2_err(&dev->v4l2_dev, "queue (%d) bust\n", f->type);
374 return -EBUSY;
375 }
376 frm = get_frame(ctx, f->type);
377 if (IS_ERR(frm))
378 return PTR_ERR(frm);
379 fmt = find_fmt(f);
380 if (!fmt)
381 return -EINVAL;
382 frm->width = f->fmt.pix.width;
383 frm->height = f->fmt.pix.height;
384 frm->size = f->fmt.pix.sizeimage;
385 /* Reset crop settings */
386 frm->o_width = 0;
387 frm->o_height = 0;
388 frm->c_width = frm->width;
389 frm->c_height = frm->height;
390 frm->right = frm->width;
391 frm->bottom = frm->height;
392 frm->fmt = fmt;
393 frm->stride = f->fmt.pix.bytesperline;
394 return 0;
395}
396
f72b9d8c
HV
397static int vidioc_g_selection(struct file *file, void *prv,
398 struct v4l2_selection *s)
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399{
400 struct g2d_ctx *ctx = prv;
401 struct g2d_frame *f;
402
f72b9d8c 403 f = get_frame(ctx, s->type);
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404 if (IS_ERR(f))
405 return PTR_ERR(f);
406
f72b9d8c
HV
407 switch (s->target) {
408 case V4L2_SEL_TGT_CROP:
409 case V4L2_SEL_TGT_CROP_DEFAULT:
410 case V4L2_SEL_TGT_CROP_BOUNDS:
411 if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
412 return -EINVAL;
413 break;
414 case V4L2_SEL_TGT_COMPOSE:
415 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
416 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
417 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
418 return -EINVAL;
419 break;
420 default:
421 return -EINVAL;
422 }
423
424 switch (s->target) {
425 case V4L2_SEL_TGT_CROP:
426 case V4L2_SEL_TGT_COMPOSE:
427 s->r.left = f->o_height;
428 s->r.top = f->o_width;
429 s->r.width = f->c_width;
430 s->r.height = f->c_height;
431 break;
432 case V4L2_SEL_TGT_CROP_DEFAULT:
433 case V4L2_SEL_TGT_CROP_BOUNDS:
434 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
435 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
436 s->r.left = 0;
437 s->r.top = 0;
438 s->r.width = f->width;
439 s->r.height = f->height;
440 break;
441 default:
442 return -EINVAL;
443 }
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444 return 0;
445}
446
f72b9d8c
HV
447static int vidioc_try_selection(struct file *file, void *prv,
448 const struct v4l2_selection *s)
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449{
450 struct g2d_ctx *ctx = prv;
451 struct g2d_dev *dev = ctx->dev;
452 struct g2d_frame *f;
453
f72b9d8c 454 f = get_frame(ctx, s->type);
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455 if (IS_ERR(f))
456 return PTR_ERR(f);
457
f72b9d8c
HV
458 if (s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
459 if (s->target != V4L2_SEL_TGT_COMPOSE)
460 return -EINVAL;
461 } else if (s->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
462 if (s->target != V4L2_SEL_TGT_CROP)
463 return -EINVAL;
464 }
465
466 if (s->r.top < 0 || s->r.left < 0) {
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467 v4l2_err(&dev->v4l2_dev,
468 "doesn't support negative values for top & left\n");
469 return -EINVAL;
470 }
471
472 return 0;
473}
474
f72b9d8c
HV
475static int vidioc_s_selection(struct file *file, void *prv,
476 struct v4l2_selection *s)
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477{
478 struct g2d_ctx *ctx = prv;
479 struct g2d_frame *f;
480 int ret;
481
f72b9d8c 482 ret = vidioc_try_selection(file, prv, s);
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483 if (ret)
484 return ret;
f72b9d8c 485 f = get_frame(ctx, s->type);
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486 if (IS_ERR(f))
487 return PTR_ERR(f);
488
f72b9d8c
HV
489 f->c_width = s->r.width;
490 f->c_height = s->r.height;
491 f->o_width = s->r.left;
492 f->o_height = s->r.top;
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493 f->bottom = f->o_height + f->c_height;
494 f->right = f->o_width + f->c_width;
495 return 0;
496}
497
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498static void device_run(void *prv)
499{
500 struct g2d_ctx *ctx = prv;
501 struct g2d_dev *dev = ctx->dev;
30fa627b 502 struct vb2_v4l2_buffer *src, *dst;
27dda973 503 unsigned long flags;
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504 u32 cmd = 0;
505
506 dev->curr = ctx;
507
febeaa45
SN
508 src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
509 dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
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510
511 clk_enable(dev->gate);
512 g2d_reset(dev);
513
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514 spin_lock_irqsave(&dev->ctrl_lock, flags);
515
91884734 516 g2d_set_src_size(dev, &ctx->in);
30fa627b 517 g2d_set_src_addr(dev, vb2_dma_contig_plane_dma_addr(&src->vb2_buf, 0));
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518
519 g2d_set_dst_size(dev, &ctx->out);
30fa627b 520 g2d_set_dst_addr(dev, vb2_dma_contig_plane_dma_addr(&dst->vb2_buf, 0));
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521
522 g2d_set_rop4(dev, ctx->rop);
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SK
523 g2d_set_flip(dev, ctx->flip);
524
91884734 525 if (ctx->in.c_width != ctx->out.c_width ||
62ce272d
SK
526 ctx->in.c_height != ctx->out.c_height) {
527 if (dev->variant->hw_rev == TYPE_G2D_3X)
528 cmd |= CMD_V3_ENABLE_STRETCH;
529 else
530 g2d_set_v41_stretch(dev, &ctx->in, &ctx->out);
531 }
532
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533 g2d_set_cmd(dev, cmd);
534 g2d_start(dev);
27dda973
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535
536 spin_unlock_irqrestore(&dev->ctrl_lock, flags);
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537}
538
539static irqreturn_t g2d_isr(int irq, void *prv)
540{
541 struct g2d_dev *dev = prv;
542 struct g2d_ctx *ctx = dev->curr;
2d700715 543 struct vb2_v4l2_buffer *src, *dst;
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544
545 g2d_clear_int(dev);
546 clk_disable(dev->gate);
547
2356877c 548 BUG_ON(ctx == NULL);
91884734 549
febeaa45
SN
550 src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
551 dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
91884734 552
2356877c
SK
553 BUG_ON(src == NULL);
554 BUG_ON(dst == NULL);
91884734 555
2d700715 556 dst->timecode = src->timecode;
d6dd645e 557 dst->vb2_buf.timestamp = src->vb2_buf.timestamp;
2d700715
JS
558 dst->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
559 dst->flags |=
560 src->flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
dc7be295 561
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562 v4l2_m2m_buf_done(src, VB2_BUF_STATE_DONE);
563 v4l2_m2m_buf_done(dst, VB2_BUF_STATE_DONE);
febeaa45 564 v4l2_m2m_job_finish(dev->m2m_dev, ctx->fh.m2m_ctx);
91884734 565
2356877c 566 dev->curr = NULL;
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567 return IRQ_HANDLED;
568}
569
570static const struct v4l2_file_operations g2d_fops = {
571 .owner = THIS_MODULE,
572 .open = g2d_open,
573 .release = g2d_release,
febeaa45 574 .poll = v4l2_m2m_fop_poll,
91884734 575 .unlocked_ioctl = video_ioctl2,
febeaa45 576 .mmap = v4l2_m2m_fop_mmap,
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577};
578
579static const struct v4l2_ioctl_ops g2d_ioctl_ops = {
580 .vidioc_querycap = vidioc_querycap,
581
582 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt,
583 .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
584 .vidioc_try_fmt_vid_cap = vidioc_try_fmt,
585 .vidioc_s_fmt_vid_cap = vidioc_s_fmt,
586
587 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt,
588 .vidioc_g_fmt_vid_out = vidioc_g_fmt,
589 .vidioc_try_fmt_vid_out = vidioc_try_fmt,
590 .vidioc_s_fmt_vid_out = vidioc_s_fmt,
591
febeaa45
SN
592 .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
593 .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
594 .vidioc_qbuf = v4l2_m2m_ioctl_qbuf,
595 .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
91884734 596
febeaa45
SN
597 .vidioc_streamon = v4l2_m2m_ioctl_streamon,
598 .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
91884734 599
f72b9d8c
HV
600 .vidioc_g_selection = vidioc_g_selection,
601 .vidioc_s_selection = vidioc_s_selection,
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602};
603
5303135c 604static const struct video_device g2d_videodev = {
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605 .name = G2D_NAME,
606 .fops = &g2d_fops,
607 .ioctl_ops = &g2d_ioctl_ops,
608 .minor = -1,
609 .release = video_device_release,
954f340f 610 .vfl_dir = VFL_DIR_M2M,
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611};
612
65d371af 613static const struct v4l2_m2m_ops g2d_m2m_ops = {
91884734 614 .device_run = device_run,
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615};
616
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617static const struct of_device_id exynos_g2d_match[];
618
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619static int g2d_probe(struct platform_device *pdev)
620{
621 struct g2d_dev *dev;
622 struct video_device *vfd;
623 struct resource *res;
5ce60d79 624 const struct of_device_id *of_id;
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625 int ret = 0;
626
32fced05 627 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
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628 if (!dev)
629 return -ENOMEM;
32fced05 630
27dda973 631 spin_lock_init(&dev->ctrl_lock);
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632 mutex_init(&dev->mutex);
633 atomic_set(&dev->num_inst, 0);
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634
635 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
91884734 636
f23999ec
TR
637 dev->regs = devm_ioremap_resource(&pdev->dev, res);
638 if (IS_ERR(dev->regs))
639 return PTR_ERR(dev->regs);
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640
641 dev->clk = clk_get(&pdev->dev, "sclk_fimg2d");
15514fb5 642 if (IS_ERR(dev->clk)) {
91884734 643 dev_err(&pdev->dev, "failed to get g2d clock\n");
32fced05 644 return -ENXIO;
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645 }
646
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647 ret = clk_prepare(dev->clk);
648 if (ret) {
649 dev_err(&pdev->dev, "failed to prepare g2d clock\n");
650 goto put_clk;
651 }
652
91884734 653 dev->gate = clk_get(&pdev->dev, "fimg2d");
15514fb5 654 if (IS_ERR(dev->gate)) {
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655 dev_err(&pdev->dev, "failed to get g2d clock gate\n");
656 ret = -ENXIO;
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657 goto unprep_clk;
658 }
659
660 ret = clk_prepare(dev->gate);
661 if (ret) {
662 dev_err(&pdev->dev, "failed to prepare g2d clock gate\n");
663 goto put_clk_gate;
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664 }
665
666 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
667 if (!res) {
668 dev_err(&pdev->dev, "failed to find IRQ\n");
669 ret = -ENXIO;
11a37c70 670 goto unprep_clk_gate;
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671 }
672
673 dev->irq = res->start;
674
32fced05
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675 ret = devm_request_irq(&pdev->dev, dev->irq, g2d_isr,
676 0, pdev->name, dev);
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677 if (ret) {
678 dev_err(&pdev->dev, "failed to install IRQ\n");
2f65ec05 679 goto unprep_clk_gate;
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680 }
681
712b617e 682 vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
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683
684 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
685 if (ret)
c781e4a5 686 goto unprep_clk_gate;
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687 vfd = video_device_alloc();
688 if (!vfd) {
689 v4l2_err(&dev->v4l2_dev, "Failed to allocate video device\n");
690 ret = -ENOMEM;
691 goto unreg_v4l2_dev;
692 }
693 *vfd = g2d_videodev;
f72b9d8c 694 set_bit(V4L2_FL_QUIRK_INVERTED_CROP, &vfd->flags);
91884734 695 vfd->lock = &dev->mutex;
8a09a4cc 696 vfd->v4l2_dev = &dev->v4l2_dev;
994587c3 697 vfd->device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
70cad449 698 ret = video_register_device(vfd, VFL_TYPE_VIDEO, 0);
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699 if (ret) {
700 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
701 goto rel_vdev;
702 }
703 video_set_drvdata(vfd, dev);
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704 dev->vfd = vfd;
705 v4l2_info(&dev->v4l2_dev, "device registered as /dev/video%d\n",
706 vfd->num);
707 platform_set_drvdata(pdev, dev);
708 dev->m2m_dev = v4l2_m2m_init(&g2d_m2m_ops);
709 if (IS_ERR(dev->m2m_dev)) {
710 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
711 ret = PTR_ERR(dev->m2m_dev);
712 goto unreg_video_dev;
713 }
714
715 def_frame.stride = (def_frame.width * def_frame.fmt->depth) >> 3;
5ce60d79 716
ef3617c4
MS
717 of_id = of_match_node(exynos_g2d_match, pdev->dev.of_node);
718 if (!of_id) {
719 ret = -ENODEV;
720 goto unreg_video_dev;
5ce60d79 721 }
ef3617c4 722 dev->variant = (struct g2d_variant *)of_id->data;
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723
724 return 0;
725
726unreg_video_dev:
727 video_unregister_device(dev->vfd);
728rel_vdev:
729 video_device_release(vfd);
730unreg_v4l2_dev:
731 v4l2_device_unregister(&dev->v4l2_dev);
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732unprep_clk_gate:
733 clk_unprepare(dev->gate);
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734put_clk_gate:
735 clk_put(dev->gate);
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736unprep_clk:
737 clk_unprepare(dev->clk);
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738put_clk:
739 clk_put(dev->clk);
32fced05 740
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741 return ret;
742}
743
744static int g2d_remove(struct platform_device *pdev)
745{
4e3eff61 746 struct g2d_dev *dev = platform_get_drvdata(pdev);
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747
748 v4l2_info(&dev->v4l2_dev, "Removing " G2D_NAME);
749 v4l2_m2m_release(dev->m2m_dev);
750 video_unregister_device(dev->vfd);
751 v4l2_device_unregister(&dev->v4l2_dev);
712b617e 752 vb2_dma_contig_clear_max_seg_size(&pdev->dev);
11a37c70 753 clk_unprepare(dev->gate);
91884734 754 clk_put(dev->gate);
11a37c70 755 clk_unprepare(dev->clk);
91884734 756 clk_put(dev->clk);
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757 return 0;
758}
759
62ce272d 760static struct g2d_variant g2d_drvdata_v3x = {
5ce60d79 761 .hw_rev = TYPE_G2D_3X, /* Revision 3.0 for S5PV210 and Exynos4210 */
62ce272d
SK
762};
763
764static struct g2d_variant g2d_drvdata_v4x = {
765 .hw_rev = TYPE_G2D_4X, /* Revision 4.1 for Exynos4X12 and Exynos5 */
766};
767
5ce60d79
SK
768static const struct of_device_id exynos_g2d_match[] = {
769 {
770 .compatible = "samsung,s5pv210-g2d",
771 .data = &g2d_drvdata_v3x,
772 }, {
773 .compatible = "samsung,exynos4212-g2d",
774 .data = &g2d_drvdata_v4x,
775 },
776 {},
777};
778MODULE_DEVICE_TABLE(of, exynos_g2d_match);
779
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780static struct platform_driver g2d_pdrv = {
781 .probe = g2d_probe,
782 .remove = g2d_remove,
783 .driver = {
784 .name = G2D_NAME,
5ce60d79 785 .of_match_table = exynos_g2d_match,
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786 },
787};
788
1d6629b1 789module_platform_driver(g2d_pdrv);
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790
791MODULE_AUTHOR("Kamil Debski <k.debski@samsung.com>");
792MODULE_DESCRIPTION("S5P G2D 2d graphics accelerator driver");
793MODULE_LICENSE("GPL");