[media] s5p-fimc: Use video entity for marking media pipeline as streaming
[linux-2.6-block.git] / drivers / media / platform / s5p-fimc / fimc-capture.c
CommitLineData
5f3cc447 1/*
3a3f9449 2 * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
5f3cc447 3 *
0c9204d3
SN
4 * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
5f3cc447
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
5f3cc447
SN
14#include <linux/types.h>
15#include <linux/errno.h>
16#include <linux/bug.h>
17#include <linux/interrupt.h>
18#include <linux/device.h>
e9e21083 19#include <linux/pm_runtime.h>
5f3cc447
SN
20#include <linux/list.h>
21#include <linux/slab.h>
5f3cc447
SN
22
23#include <linux/videodev2.h>
24#include <media/v4l2-device.h>
25#include <media/v4l2-ioctl.h>
26#include <media/v4l2-mem2mem.h>
2dab38e2
SN
27#include <media/videobuf2-core.h>
28#include <media/videobuf2-dma-contig.h>
5f3cc447 29
131b6c61 30#include "fimc-mdevice.h"
5f3cc447 31#include "fimc-core.h"
c83a1ff0 32#include "fimc-reg.h"
5f3cc447 33
bb7c276e 34static int fimc_capture_hw_init(struct fimc_dev *fimc)
9e803a04
SN
35{
36 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
0f735f52 37 struct fimc_pipeline *p = &fimc->pipeline;
9e803a04
SN
38 struct fimc_sensor_info *sensor;
39 unsigned long flags;
40 int ret = 0;
41
0f735f52 42 if (p->subdevs[IDX_SENSOR] == NULL || ctx == NULL)
9e803a04
SN
43 return -ENXIO;
44 if (ctx->s_frame.fmt == NULL)
45 return -EINVAL;
46
0f735f52 47 sensor = v4l2_get_subdev_hostdata(p->subdevs[IDX_SENSOR]);
9e803a04
SN
48
49 spin_lock_irqsave(&fimc->slock, flags);
50 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
51 fimc_set_yuv_order(ctx);
52
6612a082
SN
53 fimc_hw_set_camera_polarity(fimc, &sensor->pdata);
54 fimc_hw_set_camera_type(fimc, &sensor->pdata);
55 fimc_hw_set_camera_source(fimc, &sensor->pdata);
9e803a04
SN
56 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
57
58 ret = fimc_set_scaler_info(ctx);
59 if (!ret) {
60 fimc_hw_set_input_path(ctx);
61 fimc_hw_set_prescaler(ctx);
62 fimc_hw_set_mainscaler(ctx);
63 fimc_hw_set_target_format(ctx);
64 fimc_hw_set_rotation(ctx);
9448ab7d 65 fimc_hw_set_effect(ctx);
9e803a04
SN
66 fimc_hw_set_output_path(ctx);
67 fimc_hw_set_out_dma(ctx);
dafb9c70
SN
68 if (fimc->variant->has_alpha)
69 fimc_hw_set_rgb_alpha(ctx);
237e0265 70 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
9e803a04
SN
71 }
72 spin_unlock_irqrestore(&fimc->slock, flags);
73 return ret;
74}
75
bb7c276e
SN
76/*
77 * Reinitialize the driver so it is ready to start the streaming again.
78 * Set fimc->state to indicate stream off and the hardware shut down state.
79 * If not suspending (@suspend is false), return any buffers to videobuf2.
80 * Otherwise put any owned buffers onto the pending buffers queue, so they
81 * can be re-spun when the device is being resumed. Also perform FIMC
82 * software reset and disable streaming on the whole pipeline if required.
83 */
3e4748d8 84static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
5f3cc447 85{
bd323e28 86 struct fimc_vid_cap *cap = &fimc->vid_cap;
2dab38e2 87 struct fimc_vid_buffer *buf;
bd323e28 88 unsigned long flags;
3e4748d8 89 bool streaming;
5f3cc447
SN
90
91 spin_lock_irqsave(&fimc->slock, flags);
3e4748d8 92 streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
5f3cc447 93
3e4748d8
SN
94 fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
95 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
aa333122
SN
96 if (suspend)
97 fimc->state |= (1 << ST_CAPT_SUSPENDED);
98 else
3e4748d8 99 fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
2dab38e2 100
3e4748d8
SN
101 /* Release unused buffers */
102 while (!suspend && !list_empty(&cap->pending_buf_q)) {
0295202c 103 buf = fimc_pending_queue_pop(cap);
2dab38e2
SN
104 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
105 }
3e4748d8 106 /* If suspending put unused buffers onto pending queue */
2dab38e2 107 while (!list_empty(&cap->active_buf_q)) {
0295202c 108 buf = fimc_active_queue_pop(cap);
3e4748d8
SN
109 if (suspend)
110 fimc_pending_queue_add(cap, buf);
111 else
112 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
2dab38e2 113 }
2c1bb62e
SN
114
115 fimc_hw_reset(fimc);
116 cap->buf_index = 0;
117
5f3cc447 118 spin_unlock_irqrestore(&fimc->slock, flags);
4db5e27e 119
3e4748d8 120 if (streaming)
b9ee31e6
SN
121 return fimc_pipeline_call(fimc, set_stream,
122 &fimc->pipeline, 0);
4db5e27e
SN
123 else
124 return 0;
bd323e28
MS
125}
126
3e4748d8 127static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
bd323e28 128{
bd323e28
MS
129 unsigned long flags;
130
131 if (!fimc_capture_active(fimc))
132 return 0;
133
134 spin_lock_irqsave(&fimc->slock, flags);
135 set_bit(ST_CAPT_SHUT, &fimc->state);
136 fimc_deactivate_capture(fimc);
137 spin_unlock_irqrestore(&fimc->slock, flags);
138
139 wait_event_timeout(fimc->irq_queue,
140 !test_bit(ST_CAPT_SHUT, &fimc->state),
3e4748d8 141 (2*HZ/10)); /* 200 ms */
5f3cc447 142
3e4748d8 143 return fimc_capture_state_cleanup(fimc, suspend);
5f3cc447
SN
144}
145
237e0265
SN
146/**
147 * fimc_capture_config_update - apply the camera interface configuration
148 *
149 * To be called from within the interrupt handler with fimc.slock
150 * spinlock held. It updates the camera pixel crop, rotation and
151 * image flip in H/W.
152 */
97d97422 153static int fimc_capture_config_update(struct fimc_ctx *ctx)
237e0265
SN
154{
155 struct fimc_dev *fimc = ctx->fimc_dev;
156 int ret;
157
237e0265 158 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
efb13c3d 159
237e0265 160 ret = fimc_set_scaler_info(ctx);
efb13c3d
SN
161 if (ret)
162 return ret;
163
164 fimc_hw_set_prescaler(ctx);
165 fimc_hw_set_mainscaler(ctx);
166 fimc_hw_set_target_format(ctx);
167 fimc_hw_set_rotation(ctx);
9448ab7d 168 fimc_hw_set_effect(ctx);
efb13c3d
SN
169 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
170 fimc_hw_set_out_dma(ctx);
171 if (fimc->variant->has_alpha)
172 fimc_hw_set_rgb_alpha(ctx);
173
174 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
237e0265
SN
175 return ret;
176}
bd323e28 177
97d97422
SN
178void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
179{
14783d25 180 struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
97d97422 181 struct fimc_vid_cap *cap = &fimc->vid_cap;
14783d25 182 struct fimc_frame *f = &cap->ctx->d_frame;
97d97422
SN
183 struct fimc_vid_buffer *v_buf;
184 struct timeval *tv;
185 struct timespec ts;
186
187 if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
188 wake_up(&fimc->irq_queue);
189 goto done;
190 }
191
192 if (!list_empty(&cap->active_buf_q) &&
193 test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
194 ktime_get_real_ts(&ts);
195
196 v_buf = fimc_active_queue_pop(cap);
197
198 tv = &v_buf->vb.v4l2_buf.timestamp;
199 tv->tv_sec = ts.tv_sec;
200 tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
201 v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
202
203 vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
204 }
205
206 if (!list_empty(&cap->pending_buf_q)) {
207
208 v_buf = fimc_pending_queue_pop(cap);
209 fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
210 v_buf->index = cap->buf_index;
211
212 /* Move the buffer to the capture active queue */
213 fimc_active_queue_add(cap, v_buf);
214
215 dbg("next frame: %d, done frame: %d",
216 fimc_hw_get_frame_index(fimc), v_buf->index);
217
218 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
219 cap->buf_index = 0;
220 }
14783d25
SN
221 /*
222 * Set up a buffer at MIPI-CSIS if current image format
223 * requires the frame embedded data capture.
224 */
225 if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
226 unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
227 unsigned int size = f->payload[plane];
228 s32 index = fimc_hw_get_frame_index(fimc);
229 void *vaddr;
230
231 list_for_each_entry(v_buf, &cap->active_buf_q, list) {
232 if (v_buf->index != index)
233 continue;
234 vaddr = vb2_plane_vaddr(&v_buf->vb, plane);
235 v4l2_subdev_call(csis, video, s_rx_buffer,
236 vaddr, &size);
237 break;
238 }
239 }
97d97422
SN
240
241 if (cap->active_buf_cnt == 0) {
242 if (deq_buf)
243 clear_bit(ST_CAPT_RUN, &fimc->state);
244
245 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
246 cap->buf_index = 0;
247 } else {
248 set_bit(ST_CAPT_RUN, &fimc->state);
249 }
250
bb7c276e
SN
251 if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
252 fimc_capture_config_update(cap->ctx);
97d97422
SN
253done:
254 if (cap->active_buf_cnt == 1) {
255 fimc_deactivate_capture(fimc);
256 clear_bit(ST_CAPT_STREAM, &fimc->state);
257 }
258
259 dbg("frame: %d, active_buf_cnt: %d",
260 fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
261}
262
263
bd323e28 264static int start_streaming(struct vb2_queue *q, unsigned int count)
2dab38e2
SN
265{
266 struct fimc_ctx *ctx = q->drv_priv;
267 struct fimc_dev *fimc = ctx->fimc_dev;
9e803a04 268 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
bd323e28 269 int min_bufs;
2dab38e2
SN
270 int ret;
271
9e803a04 272 vid_cap->frame_count = 0;
8ec737ff 273
bb7c276e
SN
274 ret = fimc_capture_hw_init(fimc);
275 if (ret) {
276 fimc_capture_state_cleanup(fimc, false);
277 return ret;
278 }
2dab38e2 279
2dab38e2
SN
280 set_bit(ST_CAPT_PEND, &fimc->state);
281
bd323e28
MS
282 min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
283
4db5e27e
SN
284 if (vid_cap->active_buf_cnt >= min_bufs &&
285 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
bd323e28
MS
286 fimc_activate_capture(ctx);
287
4db5e27e 288 if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
b9ee31e6
SN
289 fimc_pipeline_call(fimc, set_stream,
290 &fimc->pipeline, 1);
4db5e27e
SN
291 }
292
2dab38e2
SN
293 return 0;
294}
295
296static int stop_streaming(struct vb2_queue *q)
297{
298 struct fimc_ctx *ctx = q->drv_priv;
299 struct fimc_dev *fimc = ctx->fimc_dev;
2dab38e2 300
4ecbf5d1 301 if (!fimc_capture_active(fimc))
2dab38e2 302 return -EINVAL;
2dab38e2 303
3e4748d8 304 return fimc_stop_capture(fimc, false);
2dab38e2
SN
305}
306
e9e21083
SN
307int fimc_capture_suspend(struct fimc_dev *fimc)
308{
3e4748d8
SN
309 bool suspend = fimc_capture_busy(fimc);
310
311 int ret = fimc_stop_capture(fimc, suspend);
312 if (ret)
313 return ret;
b9ee31e6 314 return fimc_pipeline_call(fimc, close, &fimc->pipeline);
e9e21083
SN
315}
316
3e4748d8
SN
317static void buffer_queue(struct vb2_buffer *vb);
318
e9e21083
SN
319int fimc_capture_resume(struct fimc_dev *fimc)
320{
3e4748d8
SN
321 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
322 struct fimc_vid_buffer *buf;
323 int i;
324
325 if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
326 return 0;
327
328 INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
329 vid_cap->buf_index = 0;
b9ee31e6
SN
330 fimc_pipeline_call(fimc, open, &fimc->pipeline,
331 &vid_cap->vfd.entity, false);
bb7c276e 332 fimc_capture_hw_init(fimc);
3e4748d8
SN
333
334 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
335
336 for (i = 0; i < vid_cap->reqbufs_count; i++) {
337 if (list_empty(&vid_cap->pending_buf_q))
338 break;
339 buf = fimc_pending_queue_pop(vid_cap);
340 buffer_queue(&buf->vb);
341 }
e9e21083 342 return 0;
3e4748d8 343
e9e21083
SN
344}
345
63746be5 346static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
fc714e70
GL
347 unsigned int *num_buffers, unsigned int *num_planes,
348 unsigned int sizes[], void *allocators[])
2dab38e2 349{
63746be5 350 const struct v4l2_pix_format_mplane *pixm = NULL;
2dab38e2 351 struct fimc_ctx *ctx = vq->drv_priv;
63746be5
SN
352 struct fimc_frame *frame = &ctx->d_frame;
353 struct fimc_fmt *fmt = frame->fmt;
354 unsigned long wh;
ef7af59b 355 int i;
2dab38e2 356
63746be5
SN
357 if (pfmt) {
358 pixm = &pfmt->fmt.pix_mp;
359 fmt = fimc_find_format(&pixm->pixelformat, NULL,
360 FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
361 wh = pixm->width * pixm->height;
362 } else {
363 wh = frame->f_width * frame->f_height;
364 }
365
366 if (fmt == NULL)
2dab38e2
SN
367 return -EINVAL;
368
ef7af59b 369 *num_planes = fmt->memplanes;
2dab38e2 370
ef7af59b 371 for (i = 0; i < fmt->memplanes; i++) {
63746be5
SN
372 unsigned int size = (wh * fmt->depth[i]) / 8;
373 if (pixm)
374 sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
14783d25
SN
375 else if (fimc_fmt_is_user_defined(fmt->color))
376 sizes[i] = frame->payload[i];
63746be5 377 else
d547ab66
SN
378 sizes[i] = max_t(u32, size, frame->payload[i]);
379
ef7af59b
SN
380 allocators[i] = ctx->fimc_dev->alloc_ctx;
381 }
2dab38e2 382
ef7af59b 383 return 0;
2dab38e2
SN
384}
385
2dab38e2
SN
386static int buffer_prepare(struct vb2_buffer *vb)
387{
388 struct vb2_queue *vq = vb->vb2_queue;
389 struct fimc_ctx *ctx = vq->drv_priv;
2dab38e2
SN
390 int i;
391
4db5e27e 392 if (ctx->d_frame.fmt == NULL)
ef7af59b 393 return -EINVAL;
2dab38e2 394
ef7af59b 395 for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
4db5e27e 396 unsigned long size = ctx->d_frame.payload[i];
2dab38e2
SN
397
398 if (vb2_plane_size(vb, i) < size) {
31d34d9b 399 v4l2_err(&ctx->fimc_dev->vid_cap.vfd,
30c9939d 400 "User buffer too small (%ld < %ld)\n",
2dab38e2
SN
401 vb2_plane_size(vb, i), size);
402 return -EINVAL;
403 }
2dab38e2
SN
404 vb2_set_plane_payload(vb, i, size);
405 }
406
407 return 0;
408}
409
410static void buffer_queue(struct vb2_buffer *vb)
411{
2dab38e2
SN
412 struct fimc_vid_buffer *buf
413 = container_of(vb, struct fimc_vid_buffer, vb);
4db5e27e
SN
414 struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
415 struct fimc_dev *fimc = ctx->fimc_dev;
2dab38e2
SN
416 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
417 unsigned long flags;
8ec737ff 418 int min_bufs;
2dab38e2
SN
419
420 spin_lock_irqsave(&fimc->slock, flags);
8ec737ff
SK
421 fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
422
3e4748d8
SN
423 if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
424 !test_bit(ST_CAPT_STREAM, &fimc->state) &&
425 vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
8ec737ff
SK
426 /* Setup the buffer directly for processing. */
427 int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
428 vid_cap->buf_index;
2dab38e2 429
8ec737ff
SK
430 fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
431 buf->index = vid_cap->buf_index;
0295202c 432 fimc_active_queue_add(vid_cap, buf);
2dab38e2 433
8ec737ff
SK
434 if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
435 vid_cap->buf_index = 0;
436 } else {
437 fimc_pending_queue_add(vid_cap, buf);
2dab38e2 438 }
8ec737ff
SK
439
440 min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
441
4db5e27e 442
bd323e28
MS
443 if (vb2_is_streaming(&vid_cap->vbq) &&
444 vid_cap->active_buf_cnt >= min_bufs &&
4db5e27e 445 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
8ec737ff 446 fimc_activate_capture(ctx);
4db5e27e 447 spin_unlock_irqrestore(&fimc->slock, flags);
8ec737ff 448
4db5e27e 449 if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
b9ee31e6
SN
450 fimc_pipeline_call(fimc, set_stream,
451 &fimc->pipeline, 1);
4db5e27e
SN
452 return;
453 }
2dab38e2
SN
454 spin_unlock_irqrestore(&fimc->slock, flags);
455}
456
457static void fimc_lock(struct vb2_queue *vq)
458{
459 struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
460 mutex_lock(&ctx->fimc_dev->lock);
461}
462
463static void fimc_unlock(struct vb2_queue *vq)
464{
465 struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
466 mutex_unlock(&ctx->fimc_dev->lock);
467}
468
469static struct vb2_ops fimc_capture_qops = {
470 .queue_setup = queue_setup,
471 .buf_prepare = buffer_prepare,
472 .buf_queue = buffer_queue,
2dab38e2
SN
473 .wait_prepare = fimc_unlock,
474 .wait_finish = fimc_lock,
475 .start_streaming = start_streaming,
476 .stop_streaming = stop_streaming,
477};
478
131b6c61
SN
479/**
480 * fimc_capture_ctrls_create - initialize the control handler
481 * Initialize the capture video node control handler and fill it
482 * with the FIMC controls. Inherit any sensor's controls if the
483 * 'user_subdev_api' flag is false (default behaviour).
484 * This function need to be called with the graph mutex held.
485 */
486int fimc_capture_ctrls_create(struct fimc_dev *fimc)
487{
488 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
031f515b 489 struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
131b6c61
SN
490 int ret;
491
492 if (WARN_ON(vid_cap->ctx == NULL))
493 return -ENXIO;
9448ab7d 494 if (vid_cap->ctx->ctrls.ready)
131b6c61
SN
495 return 0;
496
497 ret = fimc_ctrls_create(vid_cap->ctx);
031f515b
SN
498
499 if (ret || vid_cap->user_subdev_api || !sensor ||
500 !vid_cap->ctx->ctrls.ready)
131b6c61
SN
501 return ret;
502
9448ab7d 503 return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler,
031f515b 504 sensor->ctrl_handler, NULL);
131b6c61
SN
505}
506
237e0265
SN
507static int fimc_capture_set_default_format(struct fimc_dev *fimc);
508
5f3cc447
SN
509static int fimc_capture_open(struct file *file)
510{
511 struct fimc_dev *fimc = video_drvdata(file);
c2d430af 512 int ret = -EBUSY;
5f3cc447
SN
513
514 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
515
740ad921
SN
516 fimc_md_graph_lock(fimc);
517 mutex_lock(&fimc->lock);
c2d430af 518
5f3cc447 519 if (fimc_m2m_active(fimc))
c2d430af 520 goto unlock;
5f3cc447 521
3e4748d8 522 set_bit(ST_CAPT_BUSY, &fimc->state);
e3fc82e8
SN
523 ret = pm_runtime_get_sync(&fimc->pdev->dev);
524 if (ret < 0)
c2d430af 525 goto unlock;
4db5e27e 526
e3fc82e8 527 ret = v4l2_fh_open(file);
c2d430af
SN
528 if (ret) {
529 pm_runtime_put(&fimc->pdev->dev);
530 goto unlock;
531 }
e3fc82e8 532
c2d430af 533 if (++fimc->vid_cap.refcnt == 1) {
b9ee31e6
SN
534 ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
535 &fimc->vid_cap.vfd.entity, true);
e3fc82e8 536
c2d430af
SN
537 if (!ret && !fimc->vid_cap.user_subdev_api)
538 ret = fimc_capture_set_default_format(fimc);
539
540 if (!ret)
541 ret = fimc_capture_ctrls_create(fimc);
e3fc82e8 542
c2d430af
SN
543 if (ret < 0) {
544 clear_bit(ST_CAPT_BUSY, &fimc->state);
545 pm_runtime_put_sync(&fimc->pdev->dev);
546 fimc->vid_cap.refcnt--;
547 v4l2_fh_release(file);
548 }
549 }
550unlock:
551 mutex_unlock(&fimc->lock);
740ad921 552 fimc_md_graph_unlock(fimc);
131b6c61 553 return ret;
5f3cc447
SN
554}
555
556static int fimc_capture_close(struct file *file)
557{
558 struct fimc_dev *fimc = video_drvdata(file);
c2d430af 559 int ret;
5f3cc447 560
5f3cc447
SN
561 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
562
ba6b372c 563 mutex_lock(&fimc->lock);
c2d430af 564
5f3cc447 565 if (--fimc->vid_cap.refcnt == 0) {
3e4748d8
SN
566 clear_bit(ST_CAPT_BUSY, &fimc->state);
567 fimc_stop_capture(fimc, false);
b9ee31e6 568 fimc_pipeline_call(fimc, close, &fimc->pipeline);
3e4748d8 569 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
5f3cc447
SN
570 }
571
e9e21083
SN
572 pm_runtime_put(&fimc->pdev->dev);
573
3e4748d8
SN
574 if (fimc->vid_cap.refcnt == 0) {
575 vb2_queue_release(&fimc->vid_cap.vbq);
576 fimc_ctrls_delete(fimc->vid_cap.ctx);
577 }
c2d430af
SN
578
579 ret = v4l2_fh_release(file);
580
581 mutex_unlock(&fimc->lock);
582 return ret;
5f3cc447
SN
583}
584
585static unsigned int fimc_capture_poll(struct file *file,
586 struct poll_table_struct *wait)
587{
e578588e 588 struct fimc_dev *fimc = video_drvdata(file);
c2d430af 589 int ret;
5f3cc447 590
c2d430af
SN
591 if (mutex_lock_interruptible(&fimc->lock))
592 return POLL_ERR;
593
594 ret = vb2_poll(&fimc->vid_cap.vbq, file, wait);
595 mutex_unlock(&fimc->lock);
596
597 return ret;
5f3cc447
SN
598}
599
600static int fimc_capture_mmap(struct file *file, struct vm_area_struct *vma)
601{
e578588e 602 struct fimc_dev *fimc = video_drvdata(file);
c2d430af
SN
603 int ret;
604
605 if (mutex_lock_interruptible(&fimc->lock))
606 return -ERESTARTSYS;
5f3cc447 607
c2d430af
SN
608 ret = vb2_mmap(&fimc->vid_cap.vbq, vma);
609 mutex_unlock(&fimc->lock);
610
611 return ret;
5f3cc447
SN
612}
613
5f3cc447
SN
614static const struct v4l2_file_operations fimc_capture_fops = {
615 .owner = THIS_MODULE,
616 .open = fimc_capture_open,
617 .release = fimc_capture_close,
618 .poll = fimc_capture_poll,
619 .unlocked_ioctl = video_ioctl2,
620 .mmap = fimc_capture_mmap,
621};
622
237e0265
SN
623/*
624 * Format and crop negotiation helpers
625 */
626
627static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
628 u32 *width, u32 *height,
629 u32 *code, u32 *fourcc, int pad)
630{
631 bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
632 struct fimc_dev *fimc = ctx->fimc_dev;
405f230c
SN
633 const struct fimc_variant *var = fimc->variant;
634 const struct fimc_pix_limit *pl = var->pix_limit;
237e0265
SN
635 struct fimc_frame *dst = &ctx->d_frame;
636 u32 depth, min_w, max_w, min_h, align_h = 3;
637 u32 mask = FMT_FLAGS_CAM;
638 struct fimc_fmt *ffmt;
639
14783d25 640 /* Conversion from/to JPEG or User Defined format is not supported */
237e0265 641 if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
14783d25
SN
642 fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
643 *code = ctx->s_frame.fmt->mbus_code;
237e0265
SN
644
645 if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad != FIMC_SD_PAD_SINK)
646 mask |= FMT_FLAGS_M2M;
647
648 ffmt = fimc_find_format(fourcc, code, mask, 0);
649 if (WARN_ON(!ffmt))
650 return NULL;
651 if (code)
652 *code = ffmt->mbus_code;
653 if (fourcc)
654 *fourcc = ffmt->fourcc;
655
656 if (pad == FIMC_SD_PAD_SINK) {
14783d25 657 max_w = fimc_fmt_is_user_defined(ffmt->color) ?
237e0265
SN
658 pl->scaler_dis_w : pl->scaler_en_w;
659 /* Apply the camera input interface pixel constraints */
660 v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
661 height, max_t(u32, *height, 32),
662 FIMC_CAMIF_MAX_HEIGHT,
14783d25
SN
663 fimc_fmt_is_user_defined(ffmt->color) ?
664 3 : 1,
237e0265
SN
665 0);
666 return ffmt;
667 }
668 /* Can't scale or crop in transparent (JPEG) transfer mode */
14783d25 669 if (fimc_fmt_is_user_defined(ffmt->color)) {
237e0265
SN
670 *width = ctx->s_frame.f_width;
671 *height = ctx->s_frame.f_height;
672 return ffmt;
673 }
674 /* Apply the scaler and the output DMA constraints */
675 max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
fed07f84
SN
676 if (ctx->state & FIMC_COMPOSE) {
677 min_w = dst->offs_h + dst->width;
678 min_h = dst->offs_v + dst->height;
679 } else {
680 min_w = var->min_out_pixsize;
681 min_h = var->min_out_pixsize;
682 }
9c63afcb 683 if (var->min_vsize_align == 1 && !rotation)
237e0265
SN
684 align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
685
686 depth = fimc_get_format_depth(ffmt);
687 v4l_bound_align_image(width, min_w, max_w,
688 ffs(var->min_out_pixsize) - 1,
689 height, min_h, FIMC_CAMIF_MAX_HEIGHT,
690 align_h,
691 64/(ALIGN(depth, 8)));
692
693 dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
694 pad, code ? *code : 0, *width, *height,
695 dst->f_width, dst->f_height);
696
697 return ffmt;
698}
699
fed07f84
SN
700static void fimc_capture_try_selection(struct fimc_ctx *ctx,
701 struct v4l2_rect *r,
702 int target)
237e0265
SN
703{
704 bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
705 struct fimc_dev *fimc = ctx->fimc_dev;
405f230c
SN
706 const struct fimc_variant *var = fimc->variant;
707 const struct fimc_pix_limit *pl = var->pix_limit;
237e0265
SN
708 struct fimc_frame *sink = &ctx->s_frame;
709 u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
710 u32 align_sz = 0, align_h = 4;
711 u32 max_sc_h, max_sc_v;
712
713 /* In JPEG transparent transfer mode cropping is not supported */
14783d25 714 if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
237e0265
SN
715 r->width = sink->f_width;
716 r->height = sink->f_height;
717 r->left = r->top = 0;
718 return;
719 }
c1334823 720 if (target == V4L2_SEL_TGT_COMPOSE) {
237e0265
SN
721 if (ctx->rotation != 90 && ctx->rotation != 270)
722 align_h = 1;
723 max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
724 max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
725 min_sz = var->min_out_pixsize;
726 } else {
727 u32 depth = fimc_get_format_depth(sink->fmt);
728 align_sz = 64/ALIGN(depth, 8);
729 min_sz = var->min_inp_pixsize;
730 min_w = min_h = min_sz;
731 max_sc_h = max_sc_v = 1;
732 }
733 /*
fed07f84 734 * For the compose rectangle the following constraints must be met:
237e0265
SN
735 * - it must fit in the sink pad format rectangle (f_width/f_height);
736 * - maximum downscaling ratio is 64;
737 * - maximum crop size depends if the rotator is used or not;
738 * - the sink pad format width/height must be 4 multiple of the
739 * prescaler ratios determined by sink pad size and source pad crop,
740 * the prescaler ratio is returned by fimc_get_scaler_factor().
741 */
742 max_w = min_t(u32,
743 rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
744 rotate ? sink->f_height : sink->f_width);
745 max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
fed07f84 746
c1334823 747 if (target == V4L2_SEL_TGT_COMPOSE) {
237e0265
SN
748 min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
749 min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
750 if (rotate) {
751 swap(max_sc_h, max_sc_v);
752 swap(min_w, min_h);
753 }
754 }
755 v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
756 &r->height, min_h, max_h, align_h,
757 align_sz);
fed07f84 758 /* Adjust left/top if crop/compose rectangle is out of bounds */
237e0265
SN
759 r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
760 r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
761 r->left = round_down(r->left, var->hor_offs_align);
762
fed07f84
SN
763 dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
764 target, r->left, r->top, r->width, r->height,
237e0265
SN
765 sink->f_width, sink->f_height);
766}
767
768/*
769 * The video node ioctl operations
770 */
5f3cc447
SN
771static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
772 struct v4l2_capability *cap)
773{
e578588e 774 struct fimc_dev *fimc = video_drvdata(file);
5f3cc447
SN
775
776 strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1);
777 strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1);
778 cap->bus_info[0] = 0;
8f401543 779 cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
5f3cc447
SN
780
781 return 0;
782}
783
cf52df8a
SN
784static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
785 struct v4l2_fmtdesc *f)
786{
787 struct fimc_fmt *fmt;
788
789 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
790 f->index);
791 if (!fmt)
792 return -EINVAL;
793 strncpy(f->description, fmt->name, sizeof(f->description) - 1);
794 f->pixelformat = fmt->fourcc;
795 if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
796 f->flags |= V4L2_FMT_FLAG_COMPRESSED;
797 return 0;
798}
799
47800bc4
SN
800static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
801{
802 struct media_pad *pad = &me->pads[0];
803
804 while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
805 pad = media_entity_remote_source(pad);
806 if (!pad)
807 break;
808 me = pad->entity;
809 pad = &me->pads[0];
810 }
811
812 return me;
813}
814
237e0265
SN
815/**
816 * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
817 * elements
818 * @ctx: FIMC capture context
819 * @tfmt: media bus format to try/set on subdevs
820 * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
821 * @set: true to set format on subdevs, false to try only
822 */
823static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
824 struct v4l2_mbus_framefmt *tfmt,
825 struct fimc_fmt **fmt_id,
826 bool set)
827{
828 struct fimc_dev *fimc = ctx->fimc_dev;
0f735f52 829 struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
237e0265
SN
830 struct v4l2_subdev_format sfmt;
831 struct v4l2_mbus_framefmt *mf = &sfmt.format;
47800bc4
SN
832 struct media_entity *me;
833 struct fimc_fmt *ffmt;
834 struct media_pad *pad;
835 int ret, i = 1;
836 u32 fcc;
237e0265
SN
837
838 if (WARN_ON(!sd || !tfmt))
839 return -EINVAL;
5f3cc447 840
237e0265
SN
841 memset(&sfmt, 0, sizeof(sfmt));
842 sfmt.format = *tfmt;
237e0265 843 sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
47800bc4
SN
844
845 me = fimc_pipeline_get_head(&sd->entity);
846
237e0265
SN
847 while (1) {
848 ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
849 FMT_FLAGS_CAM, i++);
850 if (ffmt == NULL) {
851 /*
852 * Notify user-space if common pixel code for
853 * host and sensor does not exist.
854 */
855 return -EINVAL;
856 }
857 mf->code = tfmt->code = ffmt->mbus_code;
5f3cc447 858
47800bc4
SN
859 /* set format on all pipeline subdevs */
860 while (me != &fimc->vid_cap.subdev.entity) {
861 sd = media_entity_to_v4l2_subdev(me);
862
863 sfmt.pad = 0;
864 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
865 if (ret)
866 return ret;
867
868 if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
869 sfmt.pad = me->num_pads - 1;
870 mf->code = tfmt->code;
871 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
872 &sfmt);
873 if (ret)
874 return ret;
875 }
876
877 pad = media_entity_remote_source(&me->pads[sfmt.pad]);
878 if (!pad)
879 return -EINVAL;
880 me = pad->entity;
237e0265 881 }
5f3cc447 882
47800bc4
SN
883 if (mf->code != tfmt->code)
884 continue;
885
886 fcc = ffmt->fourcc;
887 tfmt->width = mf->width;
888 tfmt->height = mf->height;
889 ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
890 NULL, &fcc, FIMC_SD_PAD_SINK);
891 ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
892 NULL, &fcc, FIMC_SD_PAD_SOURCE);
893 if (ffmt && ffmt->mbus_code)
894 mf->code = ffmt->mbus_code;
895 if (mf->width != tfmt->width || mf->height != tfmt->height)
896 continue;
897 tfmt->code = mf->code;
898 break;
237e0265 899 }
5f3cc447 900
237e0265
SN
901 if (fmt_id && ffmt)
902 *fmt_id = ffmt;
903 *tfmt = *mf;
5f3cc447 904
237e0265
SN
905 return 0;
906}
5f3cc447 907
14783d25
SN
908/**
909 * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
910 * @sensor: pointer to the sensor subdev
911 * @plane_fmt: provides plane sizes corresponding to the frame layout entries
912 * @try: true to set the frame parameters, false to query only
913 *
914 * This function is used by this driver only for compressed/blob data formats.
915 */
916static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
917 struct v4l2_plane_pix_format *plane_fmt,
918 unsigned int num_planes, bool try)
919{
920 struct v4l2_mbus_frame_desc fd;
921 int i, ret;
1c9f5bd7 922 int pad;
14783d25
SN
923
924 for (i = 0; i < num_planes; i++)
925 fd.entry[i].length = plane_fmt[i].sizeimage;
926
1c9f5bd7 927 pad = sensor->entity.num_pads - 1;
14783d25 928 if (try)
1c9f5bd7 929 ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
14783d25 930 else
1c9f5bd7 931 ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
14783d25
SN
932
933 if (ret < 0)
934 return ret;
935
936 if (num_planes != fd.num_entries)
937 return -EINVAL;
938
939 for (i = 0; i < num_planes; i++)
940 plane_fmt[i].sizeimage = fd.entry[i].length;
941
942 if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
943 v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
944 fd.entry[0].length);
945
946 return -EINVAL;
947 }
948
949 return 0;
950}
951
e578588e
SN
952static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
953 struct v4l2_format *f)
954{
955 struct fimc_dev *fimc = video_drvdata(file);
e578588e 956
fa8880be
SN
957 __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
958 return 0;
e578588e
SN
959}
960
961static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
962 struct v4l2_format *f)
963{
237e0265 964 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
e578588e
SN
965 struct fimc_dev *fimc = video_drvdata(file);
966 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
237e0265
SN
967 struct v4l2_mbus_framefmt mf;
968 struct fimc_fmt *ffmt = NULL;
740ad921
SN
969 int ret = 0;
970
971 fimc_md_graph_lock(fimc);
972 mutex_lock(&fimc->lock);
237e0265 973
14783d25 974 if (fimc_jpeg_fourcc(pix->pixelformat)) {
237e0265
SN
975 fimc_capture_try_format(ctx, &pix->width, &pix->height,
976 NULL, &pix->pixelformat,
977 FIMC_SD_PAD_SINK);
978 ctx->s_frame.f_width = pix->width;
979 ctx->s_frame.f_height = pix->height;
980 }
981 ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
982 NULL, &pix->pixelformat,
983 FIMC_SD_PAD_SOURCE);
740ad921
SN
984 if (!ffmt) {
985 ret = -EINVAL;
986 goto unlock;
987 }
237e0265
SN
988
989 if (!fimc->vid_cap.user_subdev_api) {
14783d25 990 mf.width = pix->width;
237e0265 991 mf.height = pix->height;
14783d25 992 mf.code = ffmt->mbus_code;
237e0265 993 fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
14783d25
SN
994 pix->width = mf.width;
995 pix->height = mf.height;
237e0265
SN
996 if (ffmt)
997 pix->pixelformat = ffmt->fourcc;
998 }
e578588e 999
237e0265 1000 fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
14783d25
SN
1001
1002 if (ffmt->flags & FMT_FLAGS_COMPRESSED)
1003 fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
1004 pix->plane_fmt, ffmt->memplanes, true);
740ad921
SN
1005unlock:
1006 mutex_unlock(&fimc->lock);
1007 fimc_md_graph_unlock(fimc);
14783d25 1008
740ad921 1009 return ret;
e578588e
SN
1010}
1011
14783d25
SN
1012static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
1013 enum fimc_color_fmt color)
ee7160e5 1014{
14783d25
SN
1015 bool jpeg = fimc_fmt_is_user_defined(color);
1016
ee7160e5
SN
1017 ctx->scaler.enabled = !jpeg;
1018 fimc_ctrls_activate(ctx, !jpeg);
1019
1020 if (jpeg)
1021 set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1022 else
1023 clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1024}
1025
740ad921
SN
1026static int __fimc_capture_set_format(struct fimc_dev *fimc,
1027 struct v4l2_format *f)
5f3cc447 1028{
e578588e 1029 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
237e0265
SN
1030 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
1031 struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.mf;
1032 struct fimc_frame *ff = &ctx->d_frame;
1033 struct fimc_fmt *s_fmt = NULL;
1034 int ret, i;
5f3cc447 1035
237e0265 1036 if (vb2_is_busy(&fimc->vid_cap.vbq))
ef7af59b 1037 return -EBUSY;
5f3cc447 1038
237e0265 1039 /* Pre-configure format at camera interface input, for JPEG only */
14783d25 1040 if (fimc_jpeg_fourcc(pix->pixelformat)) {
237e0265
SN
1041 fimc_capture_try_format(ctx, &pix->width, &pix->height,
1042 NULL, &pix->pixelformat,
1043 FIMC_SD_PAD_SINK);
1044 ctx->s_frame.f_width = pix->width;
1045 ctx->s_frame.f_height = pix->height;
1046 }
1047 /* Try the format at the scaler and the DMA output */
1048 ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
1049 NULL, &pix->pixelformat,
1050 FIMC_SD_PAD_SOURCE);
1051 if (!ff->fmt)
8293ebfc 1052 return -EINVAL;
dafb9c70
SN
1053
1054 /* Update RGB Alpha control state and value range */
1055 fimc_alpha_ctrl_update(ctx);
1056
237e0265
SN
1057 /* Try to match format at the host and the sensor */
1058 if (!fimc->vid_cap.user_subdev_api) {
1059 mf->code = ff->fmt->mbus_code;
1060 mf->width = pix->width;
1061 mf->height = pix->height;
237e0265 1062 ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
237e0265
SN
1063 if (ret)
1064 return ret;
740ad921 1065
237e0265
SN
1066 pix->width = mf->width;
1067 pix->height = mf->height;
1068 }
d547ab66 1069
237e0265 1070 fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
14783d25
SN
1071
1072 if (ff->fmt->flags & FMT_FLAGS_COMPRESSED) {
1073 ret = fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
1074 pix->plane_fmt, ff->fmt->memplanes,
1075 true);
1076 if (ret < 0)
1077 return ret;
1078 }
1079
fa8880be
SN
1080 for (i = 0; i < ff->fmt->memplanes; i++) {
1081 ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
d547ab66 1082 ff->payload[i] = pix->plane_fmt[i].sizeimage;
fa8880be 1083 }
237e0265
SN
1084
1085 set_frame_bounds(ff, pix->width, pix->height);
1086 /* Reset the composition rectangle if not yet configured */
fed07f84 1087 if (!(ctx->state & FIMC_COMPOSE))
237e0265
SN
1088 set_frame_crop(ff, 0, 0, pix->width, pix->height);
1089
14783d25 1090 fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
ee7160e5 1091
237e0265
SN
1092 /* Reset cropping and set format at the camera interface input */
1093 if (!fimc->vid_cap.user_subdev_api) {
1094 ctx->s_frame.fmt = s_fmt;
1095 set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
1096 set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
045030fa 1097 }
ef7af59b 1098
237e0265
SN
1099 return ret;
1100}
5f3cc447 1101
237e0265
SN
1102static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
1103 struct v4l2_format *f)
1104{
1105 struct fimc_dev *fimc = video_drvdata(file);
740ad921
SN
1106 int ret;
1107
1108 fimc_md_graph_lock(fimc);
1109 mutex_lock(&fimc->lock);
1110 /*
1111 * The graph is walked within __fimc_capture_set_format() to set
1112 * the format at subdevs thus the graph mutex needs to be held at
1113 * this point and acquired before the video mutex, to avoid AB-BA
1114 * deadlock when fimc_md_link_notify() is called by other thread.
1115 * Ideally the graph walking and setting format at the whole pipeline
1116 * should be removed from this driver and handled in userspace only.
1117 */
1118 ret = __fimc_capture_set_format(fimc, f);
5f3cc447 1119
740ad921
SN
1120 mutex_unlock(&fimc->lock);
1121 fimc_md_graph_unlock(fimc);
1122 return ret;
5f3cc447
SN
1123}
1124
1125static int fimc_cap_enum_input(struct file *file, void *priv,
3e002182 1126 struct v4l2_input *i)
5f3cc447 1127{
e578588e 1128 struct fimc_dev *fimc = video_drvdata(file);
0f735f52 1129 struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
5f3cc447 1130
3e002182 1131 if (i->index != 0)
5f3cc447
SN
1132 return -EINVAL;
1133
5f3cc447 1134 i->type = V4L2_INPUT_TYPE_CAMERA;
4db5e27e
SN
1135 if (sd)
1136 strlcpy(i->name, sd->name, sizeof(i->name));
5f3cc447
SN
1137 return 0;
1138}
1139
3e002182 1140static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
5f3cc447 1141{
3e002182 1142 return i == 0 ? i : -EINVAL;
5f3cc447
SN
1143}
1144
3e002182 1145static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
5f3cc447 1146{
3e002182 1147 *i = 0;
5f3cc447
SN
1148 return 0;
1149}
1150
237e0265
SN
1151/**
1152 * fimc_pipeline_validate - check for formats inconsistencies
1153 * between source and sink pad of each link
1154 *
1155 * Return 0 if all formats match or -EPIPE otherwise.
1156 */
1157static int fimc_pipeline_validate(struct fimc_dev *fimc)
1158{
1159 struct v4l2_subdev_format sink_fmt, src_fmt;
1160 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
1161 struct v4l2_subdev *sd;
1162 struct media_pad *pad;
1163 int ret;
1164
1165 /* Start with the video capture node pad */
1166 pad = media_entity_remote_source(&vid_cap->vd_pad);
1167 if (pad == NULL)
1168 return -EPIPE;
1169 /* FIMC.{N} subdevice */
1170 sd = media_entity_to_v4l2_subdev(pad->entity);
1171
1172 while (1) {
1173 /* Retrieve format at the sink pad */
1174 pad = &sd->entity.pads[0];
1175 if (!(pad->flags & MEDIA_PAD_FL_SINK))
1176 break;
1177 /* Don't call FIMC subdev operation to avoid nested locking */
693f5c40 1178 if (sd == &fimc->vid_cap.subdev) {
237e0265
SN
1179 struct fimc_frame *ff = &vid_cap->ctx->s_frame;
1180 sink_fmt.format.width = ff->f_width;
1181 sink_fmt.format.height = ff->f_height;
1182 sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
1183 } else {
1184 sink_fmt.pad = pad->index;
1185 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1186 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
1187 if (ret < 0 && ret != -ENOIOCTLCMD)
1188 return -EPIPE;
1189 }
1190 /* Retrieve format at the source pad */
1191 pad = media_entity_remote_source(pad);
1192 if (pad == NULL ||
1193 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
1194 break;
1195
1196 sd = media_entity_to_v4l2_subdev(pad->entity);
1197 src_fmt.pad = pad->index;
1198 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1199 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
1200 if (ret < 0 && ret != -ENOIOCTLCMD)
1201 return -EPIPE;
1202
1203 if (src_fmt.format.width != sink_fmt.format.width ||
1204 src_fmt.format.height != sink_fmt.format.height ||
1205 src_fmt.format.code != sink_fmt.format.code)
1206 return -EPIPE;
14783d25
SN
1207
1208 if (sd == fimc->pipeline.subdevs[IDX_SENSOR] &&
1209 fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
1210 struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
1211 struct fimc_frame *frame = &vid_cap->ctx->d_frame;
1212 unsigned int i;
1213
1214 ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
1215 frame->fmt->memplanes,
1216 false);
1217 if (ret < 0)
1218 return -EPIPE;
1219
1220 for (i = 0; i < frame->fmt->memplanes; i++)
1221 if (frame->payload[i] < plane_fmt[i].sizeimage)
1222 return -EPIPE;
1223 }
237e0265
SN
1224 }
1225 return 0;
1226}
1227
5f3cc447 1228static int fimc_cap_streamon(struct file *file, void *priv,
2dab38e2 1229 enum v4l2_buf_type type)
5f3cc447 1230{
e578588e 1231 struct fimc_dev *fimc = video_drvdata(file);
4db5e27e 1232 struct fimc_pipeline *p = &fimc->pipeline;
95c4a17f
SN
1233 struct fimc_vid_cap *vc = &fimc->vid_cap;
1234 struct media_entity *entity = &vc->vfd.entity;
237e0265 1235 int ret;
5f3cc447 1236
4db5e27e 1237 if (fimc_capture_active(fimc))
8293ebfc 1238 return -EBUSY;
5f3cc447 1239
95c4a17f 1240 ret = media_entity_pipeline_start(entity, p->m_pipeline);
a60a2959
SA
1241 if (ret < 0)
1242 return ret;
5f3cc447 1243
95c4a17f 1244 if (vc->user_subdev_api) {
237e0265 1245 ret = fimc_pipeline_validate(fimc);
95c4a17f
SN
1246 if (ret < 0)
1247 goto err_p_stop;
237e0265 1248 }
95c4a17f
SN
1249
1250 ret = vb2_streamon(&vc->vbq, type);
1251 if (!ret)
1252 return ret;
1253
1254err_p_stop:
1255 media_entity_pipeline_stop(entity);
1256 return ret;
5f3cc447
SN
1257}
1258
1259static int fimc_cap_streamoff(struct file *file, void *priv,
8293ebfc 1260 enum v4l2_buf_type type)
5f3cc447 1261{
e578588e 1262 struct fimc_dev *fimc = video_drvdata(file);
4db5e27e 1263 int ret;
5f3cc447 1264
4db5e27e 1265 ret = vb2_streamoff(&fimc->vid_cap.vbq, type);
95c4a17f 1266
4db5e27e 1267 if (ret == 0)
95c4a17f
SN
1268 media_entity_pipeline_stop(&fimc->vid_cap.vfd.entity);
1269
4db5e27e 1270 return ret;
5f3cc447
SN
1271}
1272
1273static int fimc_cap_reqbufs(struct file *file, void *priv,
ef7af59b 1274 struct v4l2_requestbuffers *reqbufs)
5f3cc447 1275{
e578588e
SN
1276 struct fimc_dev *fimc = video_drvdata(file);
1277 int ret = vb2_reqbufs(&fimc->vid_cap.vbq, reqbufs);
5f3cc447 1278
5f3cc447 1279 if (!ret)
e578588e 1280 fimc->vid_cap.reqbufs_count = reqbufs->count;
5f3cc447
SN
1281 return ret;
1282}
1283
1284static int fimc_cap_querybuf(struct file *file, void *priv,
1285 struct v4l2_buffer *buf)
1286{
e578588e 1287 struct fimc_dev *fimc = video_drvdata(file);
5f3cc447 1288
e578588e 1289 return vb2_querybuf(&fimc->vid_cap.vbq, buf);
5f3cc447
SN
1290}
1291
1292static int fimc_cap_qbuf(struct file *file, void *priv,
1293 struct v4l2_buffer *buf)
1294{
e578588e
SN
1295 struct fimc_dev *fimc = video_drvdata(file);
1296
1297 return vb2_qbuf(&fimc->vid_cap.vbq, buf);
5f3cc447
SN
1298}
1299
b28d61b6
TS
1300static int fimc_cap_expbuf(struct file *file, void *priv,
1301 struct v4l2_exportbuffer *eb)
1302{
1303 struct fimc_dev *fimc = video_drvdata(file);
1304
1305 return vb2_expbuf(&fimc->vid_cap.vbq, eb);
1306}
1307
5f3cc447
SN
1308static int fimc_cap_dqbuf(struct file *file, void *priv,
1309 struct v4l2_buffer *buf)
1310{
e578588e
SN
1311 struct fimc_dev *fimc = video_drvdata(file);
1312
1313 return vb2_dqbuf(&fimc->vid_cap.vbq, buf, file->f_flags & O_NONBLOCK);
5f3cc447
SN
1314}
1315
3b4c34aa
SN
1316static int fimc_cap_create_bufs(struct file *file, void *priv,
1317 struct v4l2_create_buffers *create)
1318{
1319 struct fimc_dev *fimc = video_drvdata(file);
1320
1321 return vb2_create_bufs(&fimc->vid_cap.vbq, create);
1322}
1323
1324static int fimc_cap_prepare_buf(struct file *file, void *priv,
1325 struct v4l2_buffer *b)
1326{
1327 struct fimc_dev *fimc = video_drvdata(file);
1328
1329 return vb2_prepare_buf(&fimc->vid_cap.vbq, b);
1330}
1331
f9331d11
SN
1332static int fimc_cap_g_selection(struct file *file, void *fh,
1333 struct v4l2_selection *s)
e004e02f 1334{
e578588e 1335 struct fimc_dev *fimc = video_drvdata(file);
f9331d11
SN
1336 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1337 struct fimc_frame *f = &ctx->s_frame;
e004e02f 1338
f9331d11 1339 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
e004e02f
SN
1340 return -EINVAL;
1341
f9331d11
SN
1342 switch (s->target) {
1343 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
1344 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1345 f = &ctx->d_frame;
1346 case V4L2_SEL_TGT_CROP_BOUNDS:
1347 case V4L2_SEL_TGT_CROP_DEFAULT:
1348 s->r.left = 0;
1349 s->r.top = 0;
1350 s->r.width = f->o_width;
1351 s->r.height = f->o_height;
1352 return 0;
e004e02f 1353
c1334823 1354 case V4L2_SEL_TGT_COMPOSE:
f9331d11 1355 f = &ctx->d_frame;
c1334823 1356 case V4L2_SEL_TGT_CROP:
f9331d11
SN
1357 s->r.left = f->offs_h;
1358 s->r.top = f->offs_v;
1359 s->r.width = f->width;
1360 s->r.height = f->height;
1361 return 0;
1362 }
1363
1364 return -EINVAL;
e004e02f
SN
1365}
1366
f9331d11 1367/* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
7e566be2 1368static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
e004e02f 1369{
f9331d11
SN
1370 if (a->left < b->left || a->top < b->top)
1371 return 0;
1372 if (a->left + a->width > b->left + b->width)
1373 return 0;
1374 if (a->top + a->height > b->top + b->height)
1375 return 0;
e004e02f 1376
f9331d11 1377 return 1;
e004e02f
SN
1378}
1379
f9331d11
SN
1380static int fimc_cap_s_selection(struct file *file, void *fh,
1381 struct v4l2_selection *s)
5f3cc447 1382{
e578588e
SN
1383 struct fimc_dev *fimc = video_drvdata(file);
1384 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
f9331d11
SN
1385 struct v4l2_rect rect = s->r;
1386 struct fimc_frame *f;
237e0265 1387 unsigned long flags;
f9331d11
SN
1388
1389 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1390 return -EINVAL;
1391
c1334823 1392 if (s->target == V4L2_SEL_TGT_COMPOSE)
f9331d11 1393 f = &ctx->d_frame;
c1334823 1394 else if (s->target == V4L2_SEL_TGT_CROP)
f9331d11 1395 f = &ctx->s_frame;
fed07f84 1396 else
f9331d11 1397 return -EINVAL;
f9331d11 1398
fed07f84 1399 fimc_capture_try_selection(ctx, &rect, s->target);
f9331d11
SN
1400
1401 if (s->flags & V4L2_SEL_FLAG_LE &&
1402 !enclosed_rectangle(&rect, &s->r))
1403 return -ERANGE;
5f3cc447 1404
f9331d11
SN
1405 if (s->flags & V4L2_SEL_FLAG_GE &&
1406 !enclosed_rectangle(&s->r, &rect))
1407 return -ERANGE;
5f3cc447 1408
f9331d11 1409 s->r = rect;
237e0265 1410 spin_lock_irqsave(&fimc->slock, flags);
f9331d11
SN
1411 set_frame_crop(f, s->r.left, s->r.top, s->r.width,
1412 s->r.height);
237e0265 1413 spin_unlock_irqrestore(&fimc->slock, flags);
8293ebfc 1414
f9331d11 1415 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
8293ebfc 1416 return 0;
5f3cc447
SN
1417}
1418
5f3cc447
SN
1419static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
1420 .vidioc_querycap = fimc_vidioc_querycap_capture,
1421
cf52df8a 1422 .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
e578588e 1423 .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
ef7af59b 1424 .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
e578588e 1425 .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
5f3cc447
SN
1426
1427 .vidioc_reqbufs = fimc_cap_reqbufs,
1428 .vidioc_querybuf = fimc_cap_querybuf,
1429
1430 .vidioc_qbuf = fimc_cap_qbuf,
1431 .vidioc_dqbuf = fimc_cap_dqbuf,
b28d61b6 1432 .vidioc_expbuf = fimc_cap_expbuf,
5f3cc447 1433
3b4c34aa
SN
1434 .vidioc_prepare_buf = fimc_cap_prepare_buf,
1435 .vidioc_create_bufs = fimc_cap_create_bufs,
1436
5f3cc447
SN
1437 .vidioc_streamon = fimc_cap_streamon,
1438 .vidioc_streamoff = fimc_cap_streamoff,
1439
f9331d11
SN
1440 .vidioc_g_selection = fimc_cap_g_selection,
1441 .vidioc_s_selection = fimc_cap_s_selection,
5f3cc447
SN
1442
1443 .vidioc_enum_input = fimc_cap_enum_input,
1444 .vidioc_s_input = fimc_cap_s_input,
1445 .vidioc_g_input = fimc_cap_g_input,
1446};
1447
237e0265 1448/* Capture subdev media entity operations */
d09a7dc8
SN
1449static int fimc_link_setup(struct media_entity *entity,
1450 const struct media_pad *local,
1451 const struct media_pad *remote, u32 flags)
1452{
237e0265
SN
1453 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1454 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1455
1456 if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
1457 return -EINVAL;
d09a7dc8
SN
1458
1459 if (WARN_ON(fimc == NULL))
1460 return 0;
1461
1462 dbg("%s --> %s, flags: 0x%x. input: 0x%x",
1463 local->entity->name, remote->entity->name, flags,
1464 fimc->vid_cap.input);
1465
1466 if (flags & MEDIA_LNK_FL_ENABLED) {
1467 if (fimc->vid_cap.input != 0)
1468 return -EBUSY;
1469 fimc->vid_cap.input = sd->grp_id;
1470 return 0;
1471 }
1472
1473 fimc->vid_cap.input = 0;
1474 return 0;
1475}
1476
237e0265 1477static const struct media_entity_operations fimc_sd_media_ops = {
d09a7dc8
SN
1478 .link_setup = fimc_link_setup,
1479};
1480
e1d72f4d
SN
1481/**
1482 * fimc_sensor_notify - v4l2_device notification from a sensor subdev
1483 * @sd: pointer to a subdev generating the notification
1484 * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
1485 * @arg: pointer to an u32 type integer that stores the frame payload value
1486 *
1487 * The End Of Frame notification sent by sensor subdev in its still capture
1488 * mode. If there is only a single VSYNC generated by the sensor at the
1489 * beginning of a frame transmission, FIMC does not issue the LastIrq
1490 * (end of frame) interrupt. And this notification is used to complete the
1491 * frame capture and returning a buffer to user-space. Subdev drivers should
1492 * call this notification from their last 'End of frame capture' interrupt.
1493 */
1494void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
1495 void *arg)
1496{
1497 struct fimc_sensor_info *sensor;
1498 struct fimc_vid_buffer *buf;
1499 struct fimc_md *fmd;
1500 struct fimc_dev *fimc;
1501 unsigned long flags;
1502
1503 if (sd == NULL)
1504 return;
1505
1506 sensor = v4l2_get_subdev_hostdata(sd);
1507 fmd = entity_to_fimc_mdev(&sd->entity);
1508
1509 spin_lock_irqsave(&fmd->slock, flags);
1510 fimc = sensor ? sensor->host : NULL;
1511
1512 if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
1513 test_bit(ST_CAPT_PEND, &fimc->state)) {
1514 unsigned long irq_flags;
1515 spin_lock_irqsave(&fimc->slock, irq_flags);
1516 if (!list_empty(&fimc->vid_cap.active_buf_q)) {
1517 buf = list_entry(fimc->vid_cap.active_buf_q.next,
1518 struct fimc_vid_buffer, list);
1519 vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
1520 }
97d97422 1521 fimc_capture_irq_handler(fimc, 1);
e1d72f4d
SN
1522 fimc_deactivate_capture(fimc);
1523 spin_unlock_irqrestore(&fimc->slock, irq_flags);
1524 }
1525 spin_unlock_irqrestore(&fmd->slock, flags);
1526}
1527
237e0265
SN
1528static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1529 struct v4l2_subdev_fh *fh,
1530 struct v4l2_subdev_mbus_code_enum *code)
1531{
1532 struct fimc_fmt *fmt;
1533
1534 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
1535 if (!fmt)
1536 return -EINVAL;
1537 code->code = fmt->mbus_code;
1538 return 0;
1539}
1540
1541static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
1542 struct v4l2_subdev_fh *fh,
1543 struct v4l2_subdev_format *fmt)
1544{
1545 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1546 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1547 struct v4l2_mbus_framefmt *mf;
1548 struct fimc_frame *ff;
1549
1550 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1551 mf = v4l2_subdev_get_try_format(fh, fmt->pad);
1552 fmt->format = *mf;
1553 return 0;
1554 }
1555 mf = &fmt->format;
1556 mf->colorspace = V4L2_COLORSPACE_JPEG;
1557 ff = fmt->pad == FIMC_SD_PAD_SINK ? &ctx->s_frame : &ctx->d_frame;
1558
1559 mutex_lock(&fimc->lock);
1560 /* The pixel code is same on both input and output pad */
1561 if (!WARN_ON(ctx->s_frame.fmt == NULL))
1562 mf->code = ctx->s_frame.fmt->mbus_code;
1563 mf->width = ff->f_width;
1564 mf->height = ff->f_height;
1565 mutex_unlock(&fimc->lock);
1566
1567 return 0;
1568}
1569
1570static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
1571 struct v4l2_subdev_fh *fh,
1572 struct v4l2_subdev_format *fmt)
1573{
1574 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1575 struct v4l2_mbus_framefmt *mf = &fmt->format;
1576 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1577 struct fimc_frame *ff;
1578 struct fimc_fmt *ffmt;
1579
1580 dbg("pad%d: code: 0x%x, %dx%d",
1581 fmt->pad, mf->code, mf->width, mf->height);
1582
1583 if (fmt->pad == FIMC_SD_PAD_SOURCE &&
1584 vb2_is_busy(&fimc->vid_cap.vbq))
1585 return -EBUSY;
1586
1587 mutex_lock(&fimc->lock);
1588 ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
1589 &mf->code, NULL, fmt->pad);
1590 mutex_unlock(&fimc->lock);
1591 mf->colorspace = V4L2_COLORSPACE_JPEG;
1592
1593 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1594 mf = v4l2_subdev_get_try_format(fh, fmt->pad);
1595 *mf = fmt->format;
1596 return 0;
1597 }
6612545f
SN
1598 /* There must be a bug in the driver if this happens */
1599 if (WARN_ON(ffmt == NULL))
1600 return -EINVAL;
1601
dafb9c70
SN
1602 /* Update RGB Alpha control state and value range */
1603 fimc_alpha_ctrl_update(ctx);
1604
14783d25 1605 fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
ee7160e5 1606
237e0265
SN
1607 ff = fmt->pad == FIMC_SD_PAD_SINK ?
1608 &ctx->s_frame : &ctx->d_frame;
1609
1610 mutex_lock(&fimc->lock);
1611 set_frame_bounds(ff, mf->width, mf->height);
393a23fc 1612 fimc->vid_cap.mf = *mf;
237e0265
SN
1613 ff->fmt = ffmt;
1614
1615 /* Reset the crop rectangle if required. */
fed07f84 1616 if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
237e0265
SN
1617 set_frame_crop(ff, 0, 0, mf->width, mf->height);
1618
1619 if (fmt->pad == FIMC_SD_PAD_SINK)
fed07f84 1620 ctx->state &= ~FIMC_COMPOSE;
237e0265
SN
1621 mutex_unlock(&fimc->lock);
1622 return 0;
1623}
1624
fed07f84
SN
1625static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
1626 struct v4l2_subdev_fh *fh,
1627 struct v4l2_subdev_selection *sel)
237e0265
SN
1628{
1629 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1630 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
fed07f84
SN
1631 struct fimc_frame *f = &ctx->s_frame;
1632 struct v4l2_rect *r = &sel->r;
1633 struct v4l2_rect *try_sel;
1634
1635 if (sel->pad != FIMC_SD_PAD_SINK)
1636 return -EINVAL;
1637
1638 mutex_lock(&fimc->lock);
237e0265 1639
fed07f84 1640 switch (sel->target) {
5689b288 1641 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
fed07f84 1642 f = &ctx->d_frame;
5689b288 1643 case V4L2_SEL_TGT_CROP_BOUNDS:
fed07f84
SN
1644 r->width = f->o_width;
1645 r->height = f->o_height;
1646 r->left = 0;
1647 r->top = 0;
1648 mutex_unlock(&fimc->lock);
237e0265 1649 return 0;
fed07f84 1650
5689b288 1651 case V4L2_SEL_TGT_CROP:
fed07f84
SN
1652 try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
1653 break;
5689b288 1654 case V4L2_SEL_TGT_COMPOSE:
fed07f84
SN
1655 try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
1656 f = &ctx->d_frame;
1657 break;
1658 default:
1659 mutex_unlock(&fimc->lock);
1660 return -EINVAL;
237e0265 1661 }
237e0265 1662
fed07f84
SN
1663 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1664 sel->r = *try_sel;
1665 } else {
1666 r->left = f->offs_h;
1667 r->top = f->offs_v;
1668 r->width = f->width;
1669 r->height = f->height;
1670 }
237e0265 1671
fed07f84
SN
1672 dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
1673 sel->pad, r->left, r->top, r->width, r->height,
1674 f->f_width, f->f_height);
237e0265 1675
fed07f84 1676 mutex_unlock(&fimc->lock);
237e0265
SN
1677 return 0;
1678}
1679
fed07f84
SN
1680static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
1681 struct v4l2_subdev_fh *fh,
1682 struct v4l2_subdev_selection *sel)
237e0265
SN
1683{
1684 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1685 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
fed07f84
SN
1686 struct fimc_frame *f = &ctx->s_frame;
1687 struct v4l2_rect *r = &sel->r;
1688 struct v4l2_rect *try_sel;
237e0265
SN
1689 unsigned long flags;
1690
fed07f84
SN
1691 if (sel->pad != FIMC_SD_PAD_SINK)
1692 return -EINVAL;
237e0265
SN
1693
1694 mutex_lock(&fimc->lock);
c1334823 1695 fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
237e0265 1696
fed07f84 1697 switch (sel->target) {
5689b288 1698 case V4L2_SEL_TGT_CROP:
fed07f84
SN
1699 try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
1700 break;
5689b288 1701 case V4L2_SEL_TGT_COMPOSE:
fed07f84
SN
1702 try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
1703 f = &ctx->d_frame;
1704 break;
1705 default:
1706 mutex_unlock(&fimc->lock);
1707 return -EINVAL;
237e0265 1708 }
237e0265 1709
fed07f84
SN
1710 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1711 *try_sel = sel->r;
1712 } else {
1713 spin_lock_irqsave(&fimc->slock, flags);
1714 set_frame_crop(f, r->left, r->top, r->width, r->height);
1715 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
5689b288 1716 if (sel->target == V4L2_SEL_TGT_COMPOSE)
fed07f84 1717 ctx->state |= FIMC_COMPOSE;
8b164105 1718 spin_unlock_irqrestore(&fimc->slock, flags);
fed07f84 1719 }
237e0265 1720
fed07f84 1721 dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
237e0265
SN
1722 r->width, r->height);
1723
1724 mutex_unlock(&fimc->lock);
1725 return 0;
1726}
1727
1728static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
1729 .enum_mbus_code = fimc_subdev_enum_mbus_code,
fed07f84
SN
1730 .get_selection = fimc_subdev_get_selection,
1731 .set_selection = fimc_subdev_set_selection,
237e0265
SN
1732 .get_fmt = fimc_subdev_get_fmt,
1733 .set_fmt = fimc_subdev_set_fmt,
237e0265
SN
1734};
1735
1736static struct v4l2_subdev_ops fimc_subdev_ops = {
1737 .pad = &fimc_subdev_pad_ops,
1738};
1739
237e0265
SN
1740/* Set default format at the sensor and host interface */
1741static int fimc_capture_set_default_format(struct fimc_dev *fimc)
1742{
1743 struct v4l2_format fmt = {
1744 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
1745 .fmt.pix_mp = {
1746 .width = 640,
1747 .height = 480,
1748 .pixelformat = V4L2_PIX_FMT_YUYV,
1749 .field = V4L2_FIELD_NONE,
1750 .colorspace = V4L2_COLORSPACE_JPEG,
1751 },
1752 };
1753
740ad921 1754 return __fimc_capture_set_format(fimc, &fmt);
237e0265
SN
1755}
1756
ef7af59b 1757/* fimc->lock must be already initialized */
693f5c40 1758static int fimc_register_capture_device(struct fimc_dev *fimc,
30c9939d 1759 struct v4l2_device *v4l2_dev)
5f3cc447 1760{
31d34d9b 1761 struct video_device *vfd = &fimc->vid_cap.vfd;
5f3cc447
SN
1762 struct fimc_vid_cap *vid_cap;
1763 struct fimc_ctx *ctx;
2dab38e2 1764 struct vb2_queue *q;
30c9939d 1765 int ret = -ENOMEM;
5f3cc447 1766
26ee7f47 1767 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
5f3cc447
SN
1768 if (!ctx)
1769 return -ENOMEM;
1770
1771 ctx->fimc_dev = fimc;
3d112d9a
SN
1772 ctx->in_path = FIMC_IO_CAMERA;
1773 ctx->out_path = FIMC_IO_DMA;
5f3cc447 1774 ctx->state = FIMC_CTX_CAP;
237e0265 1775 ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
693f5c40 1776 ctx->d_frame.fmt = ctx->s_frame.fmt;
5f3cc447 1777
31d34d9b 1778 memset(vfd, 0, sizeof(*vfd));
693f5c40 1779 snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
5f3cc447
SN
1780
1781 vfd->fops = &fimc_capture_fops;
1782 vfd->ioctl_ops = &fimc_capture_ioctl_ops;
574e1717 1783 vfd->v4l2_dev = v4l2_dev;
5f3cc447 1784 vfd->minor = -1;
31d34d9b 1785 vfd->release = video_device_release_empty;
8293ebfc 1786 vfd->lock = &fimc->lock;
c2d430af 1787
5f3cc447
SN
1788 video_set_drvdata(vfd, fimc);
1789
1790 vid_cap = &fimc->vid_cap;
5f3cc447
SN
1791 vid_cap->active_buf_cnt = 0;
1792 vid_cap->reqbufs_count = 0;
1793 vid_cap->refcnt = 0;
5f3cc447
SN
1794
1795 INIT_LIST_HEAD(&vid_cap->pending_buf_q);
1796 INIT_LIST_HEAD(&vid_cap->active_buf_q);
5f3cc447
SN
1797 vid_cap->ctx = ctx;
1798
2dab38e2
SN
1799 q = &fimc->vid_cap.vbq;
1800 memset(q, 0, sizeof(*q));
ef7af59b 1801 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
9bd09fd7 1802 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
2dab38e2
SN
1803 q->drv_priv = fimc->vid_cap.ctx;
1804 q->ops = &fimc_capture_qops;
1805 q->mem_ops = &vb2_dma_contig_memops;
1806 q->buf_struct_size = sizeof(struct fimc_vid_buffer);
6aa69f99 1807 q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2dab38e2 1808
41fd087f
SN
1809 ret = vb2_queue_init(q);
1810 if (ret)
1811 goto err_ent;
5f3cc447 1812
693f5c40
SN
1813 vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
1814 ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
574e1717
SN
1815 if (ret)
1816 goto err_ent;
740ad921
SN
1817 /*
1818 * For proper order of acquiring/releasing the video
1819 * and the graph mutex.
1820 */
1821 v4l2_disable_ioctl_locking(vfd, VIDIOC_TRY_FMT);
1822 v4l2_disable_ioctl_locking(vfd, VIDIOC_S_FMT);
693f5c40
SN
1823
1824 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
237e0265 1825 if (ret)
693f5c40
SN
1826 goto err_vd;
1827
1828 v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
1829 vfd->name, video_device_node_name(vfd));
574e1717 1830
9448ab7d 1831 vfd->ctrl_handler = &ctx->ctrls.handler;
5f3cc447
SN
1832 return 0;
1833
693f5c40 1834err_vd:
237e0265 1835 media_entity_cleanup(&vfd->entity);
574e1717 1836err_ent:
cfd77310 1837 kfree(ctx);
5f3cc447
SN
1838 return ret;
1839}
1840
693f5c40 1841static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
5f3cc447 1842{
693f5c40
SN
1843 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1844 int ret;
5f3cc447 1845
bbc5296f
SN
1846 if (fimc == NULL)
1847 return -ENXIO;
1848
693f5c40
SN
1849 ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
1850 if (ret)
1851 return ret;
1852
97d66c47
SN
1853 fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
1854
693f5c40 1855 ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
97d66c47 1856 if (ret) {
693f5c40 1857 fimc_unregister_m2m_device(fimc);
97d66c47
SN
1858 fimc->pipeline_ops = NULL;
1859 }
693f5c40
SN
1860
1861 return ret;
1862}
1863
1864static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
1865{
1866 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1867
1868 if (fimc == NULL)
1869 return;
1870
1871 fimc_unregister_m2m_device(fimc);
1872
31d34d9b
SN
1873 if (video_is_registered(&fimc->vid_cap.vfd)) {
1874 video_unregister_device(&fimc->vid_cap.vfd);
1875 media_entity_cleanup(&fimc->vid_cap.vfd.entity);
97d66c47 1876 fimc->pipeline_ops = NULL;
574e1717
SN
1877 }
1878 kfree(fimc->vid_cap.ctx);
96a85742 1879 fimc->vid_cap.ctx = NULL;
5f3cc447 1880}
693f5c40
SN
1881
1882static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
1883 .registered = fimc_capture_subdev_registered,
1884 .unregistered = fimc_capture_subdev_unregistered,
1885};
1886
1887int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
1888{
1889 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1890 int ret;
1891
1892 v4l2_subdev_init(sd, &fimc_subdev_ops);
1893 sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
1894 snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->pdev->id);
1895
1896 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1897 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1898 ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
1899 fimc->vid_cap.sd_pads, 0);
1900 if (ret)
1901 return ret;
1902
1903 sd->entity.ops = &fimc_sd_media_ops;
1904 sd->internal_ops = &fimc_capture_sd_internal_ops;
1905 v4l2_set_subdevdata(sd, fimc);
1906 return 0;
1907}
1908
1909void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
1910{
1911 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1912
1913 v4l2_device_unregister_subdev(sd);
1914 media_entity_cleanup(&sd->entity);
1915 v4l2_set_subdevdata(sd, NULL);
1916}