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51abcf7f PZ |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * i.MX Pixel Pipeline (PXP) mem-to-mem scaler/CSC/rotator driver | |
4 | * | |
5 | * Copyright (c) 2018 Pengutronix, Philipp Zabel | |
6 | * | |
7 | * based on vim2m | |
8 | * | |
9 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | |
10 | * Pawel Osciak, <pawel@osciak.com> | |
11 | * Marek Szyprowski, <m.szyprowski@samsung.com> | |
12 | */ | |
13 | #include <linux/clk.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/dma-mapping.h> | |
b4fbf423 | 16 | #include <linux/interrupt.h> |
51abcf7f PZ |
17 | #include <linux/io.h> |
18 | #include <linux/iopoll.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/of.h> | |
21 | #include <linux/sched.h> | |
22 | #include <linux/slab.h> | |
23 | ||
24 | #include <linux/platform_device.h> | |
25 | #include <media/v4l2-mem2mem.h> | |
26 | #include <media/v4l2-device.h> | |
27 | #include <media/v4l2-ioctl.h> | |
28 | #include <media/v4l2-ctrls.h> | |
29 | #include <media/v4l2-event.h> | |
30 | #include <media/videobuf2-dma-contig.h> | |
31 | ||
32 | #include "imx-pxp.h" | |
33 | ||
34 | static unsigned int debug; | |
35 | module_param(debug, uint, 0644); | |
36 | MODULE_PARM_DESC(debug, "activates debug info"); | |
37 | ||
38 | #define MIN_W 8 | |
39 | #define MIN_H 8 | |
40 | #define MAX_W 4096 | |
41 | #define MAX_H 4096 | |
42 | #define ALIGN_W 3 /* 8x8 pixel blocks */ | |
43 | #define ALIGN_H 3 | |
44 | ||
45 | /* Flags that indicate a format can be used for capture/output */ | |
46 | #define MEM2MEM_CAPTURE (1 << 0) | |
47 | #define MEM2MEM_OUTPUT (1 << 1) | |
48 | ||
49 | #define MEM2MEM_NAME "pxp" | |
50 | ||
51 | /* Flags that indicate processing mode */ | |
52 | #define MEM2MEM_HFLIP (1 << 0) | |
53 | #define MEM2MEM_VFLIP (1 << 1) | |
54 | ||
55 | #define dprintk(dev, fmt, arg...) \ | |
56 | v4l2_dbg(1, debug, &dev->v4l2_dev, "%s: " fmt, __func__, ## arg) | |
57 | ||
58 | struct pxp_fmt { | |
59 | u32 fourcc; | |
60 | int depth; | |
61 | /* Types the format can be used for */ | |
62 | u32 types; | |
63 | }; | |
64 | ||
65 | static struct pxp_fmt formats[] = { | |
66 | { | |
67 | .fourcc = V4L2_PIX_FMT_XBGR32, | |
68 | .depth = 32, | |
69 | /* Both capture and output format */ | |
70 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
71 | }, { | |
72 | .fourcc = V4L2_PIX_FMT_ABGR32, | |
73 | .depth = 32, | |
74 | /* Capture-only format */ | |
75 | .types = MEM2MEM_CAPTURE, | |
76 | }, { | |
77 | .fourcc = V4L2_PIX_FMT_BGR24, | |
78 | .depth = 24, | |
79 | .types = MEM2MEM_CAPTURE, | |
80 | }, { | |
81 | .fourcc = V4L2_PIX_FMT_RGB565, | |
82 | .depth = 16, | |
83 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
84 | }, { | |
85 | .fourcc = V4L2_PIX_FMT_RGB555, | |
86 | .depth = 16, | |
87 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
88 | }, { | |
89 | .fourcc = V4L2_PIX_FMT_RGB444, | |
90 | .depth = 16, | |
91 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
92 | }, { | |
98617b45 VK |
93 | .fourcc = V4L2_PIX_FMT_VUYA32, |
94 | .depth = 32, | |
95 | .types = MEM2MEM_CAPTURE, | |
96 | }, { | |
97 | .fourcc = V4L2_PIX_FMT_VUYX32, | |
51abcf7f PZ |
98 | .depth = 32, |
99 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
100 | }, { | |
101 | .fourcc = V4L2_PIX_FMT_UYVY, | |
102 | .depth = 16, | |
103 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
104 | }, { | |
105 | .fourcc = V4L2_PIX_FMT_YUYV, | |
106 | .depth = 16, | |
107 | /* Output-only format */ | |
108 | .types = MEM2MEM_OUTPUT, | |
109 | }, { | |
110 | .fourcc = V4L2_PIX_FMT_VYUY, | |
111 | .depth = 16, | |
112 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
113 | }, { | |
114 | .fourcc = V4L2_PIX_FMT_YVYU, | |
115 | .depth = 16, | |
116 | .types = MEM2MEM_OUTPUT, | |
117 | }, { | |
118 | .fourcc = V4L2_PIX_FMT_GREY, | |
119 | .depth = 8, | |
120 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
121 | }, { | |
122 | .fourcc = V4L2_PIX_FMT_Y4, | |
123 | .depth = 4, | |
124 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
125 | }, { | |
126 | .fourcc = V4L2_PIX_FMT_NV16, | |
127 | .depth = 16, | |
128 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
129 | }, { | |
130 | .fourcc = V4L2_PIX_FMT_NV12, | |
131 | .depth = 12, | |
132 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
133 | }, { | |
134 | .fourcc = V4L2_PIX_FMT_NV21, | |
135 | .depth = 12, | |
136 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
137 | }, { | |
138 | .fourcc = V4L2_PIX_FMT_NV61, | |
139 | .depth = 16, | |
140 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | |
141 | }, { | |
142 | .fourcc = V4L2_PIX_FMT_YUV422P, | |
143 | .depth = 16, | |
144 | .types = MEM2MEM_OUTPUT, | |
145 | }, { | |
146 | .fourcc = V4L2_PIX_FMT_YUV420, | |
147 | .depth = 12, | |
148 | .types = MEM2MEM_OUTPUT, | |
149 | }, | |
150 | }; | |
151 | ||
152 | #define NUM_FORMATS ARRAY_SIZE(formats) | |
153 | ||
154 | /* Per-queue, driver-specific private data */ | |
155 | struct pxp_q_data { | |
156 | unsigned int width; | |
157 | unsigned int height; | |
158 | unsigned int bytesperline; | |
159 | unsigned int sizeimage; | |
160 | unsigned int sequence; | |
161 | struct pxp_fmt *fmt; | |
162 | enum v4l2_ycbcr_encoding ycbcr_enc; | |
163 | enum v4l2_quantization quant; | |
164 | }; | |
165 | ||
166 | enum { | |
167 | V4L2_M2M_SRC = 0, | |
168 | V4L2_M2M_DST = 1, | |
169 | }; | |
170 | ||
171 | static struct pxp_fmt *find_format(struct v4l2_format *f) | |
172 | { | |
173 | struct pxp_fmt *fmt; | |
174 | unsigned int k; | |
175 | ||
176 | for (k = 0; k < NUM_FORMATS; k++) { | |
177 | fmt = &formats[k]; | |
178 | if (fmt->fourcc == f->fmt.pix.pixelformat) | |
179 | break; | |
180 | } | |
181 | ||
182 | if (k == NUM_FORMATS) | |
183 | return NULL; | |
184 | ||
185 | return &formats[k]; | |
186 | } | |
187 | ||
188 | struct pxp_dev { | |
189 | struct v4l2_device v4l2_dev; | |
190 | struct video_device vfd; | |
191 | ||
192 | struct clk *clk; | |
193 | void __iomem *mmio; | |
194 | ||
195 | atomic_t num_inst; | |
196 | struct mutex dev_mutex; | |
197 | spinlock_t irqlock; | |
198 | ||
199 | struct v4l2_m2m_dev *m2m_dev; | |
200 | }; | |
201 | ||
202 | struct pxp_ctx { | |
203 | struct v4l2_fh fh; | |
204 | struct pxp_dev *dev; | |
205 | ||
206 | struct v4l2_ctrl_handler hdl; | |
207 | ||
208 | /* Abort requested by m2m */ | |
209 | int aborting; | |
210 | ||
211 | /* Processing mode */ | |
212 | int mode; | |
213 | u8 alpha_component; | |
214 | ||
215 | enum v4l2_colorspace colorspace; | |
216 | enum v4l2_xfer_func xfer_func; | |
217 | ||
218 | /* Source and destination queue data */ | |
219 | struct pxp_q_data q_data[2]; | |
220 | }; | |
221 | ||
222 | static inline struct pxp_ctx *file2ctx(struct file *file) | |
223 | { | |
224 | return container_of(file->private_data, struct pxp_ctx, fh); | |
225 | } | |
226 | ||
227 | static struct pxp_q_data *get_q_data(struct pxp_ctx *ctx, | |
228 | enum v4l2_buf_type type) | |
229 | { | |
230 | if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT) | |
231 | return &ctx->q_data[V4L2_M2M_SRC]; | |
232 | else | |
233 | return &ctx->q_data[V4L2_M2M_DST]; | |
234 | } | |
235 | ||
236 | static u32 pxp_v4l2_pix_fmt_to_ps_format(u32 v4l2_pix_fmt) | |
237 | { | |
238 | switch (v4l2_pix_fmt) { | |
239 | case V4L2_PIX_FMT_XBGR32: return BV_PXP_PS_CTRL_FORMAT__RGB888; | |
240 | case V4L2_PIX_FMT_RGB555: return BV_PXP_PS_CTRL_FORMAT__RGB555; | |
241 | case V4L2_PIX_FMT_RGB444: return BV_PXP_PS_CTRL_FORMAT__RGB444; | |
242 | case V4L2_PIX_FMT_RGB565: return BV_PXP_PS_CTRL_FORMAT__RGB565; | |
98617b45 | 243 | case V4L2_PIX_FMT_VUYX32: return BV_PXP_PS_CTRL_FORMAT__YUV1P444; |
51abcf7f PZ |
244 | case V4L2_PIX_FMT_UYVY: return BV_PXP_PS_CTRL_FORMAT__UYVY1P422; |
245 | case V4L2_PIX_FMT_YUYV: return BM_PXP_PS_CTRL_WB_SWAP | | |
246 | BV_PXP_PS_CTRL_FORMAT__UYVY1P422; | |
247 | case V4L2_PIX_FMT_VYUY: return BV_PXP_PS_CTRL_FORMAT__VYUY1P422; | |
248 | case V4L2_PIX_FMT_YVYU: return BM_PXP_PS_CTRL_WB_SWAP | | |
249 | BV_PXP_PS_CTRL_FORMAT__VYUY1P422; | |
250 | case V4L2_PIX_FMT_GREY: return BV_PXP_PS_CTRL_FORMAT__Y8; | |
251 | default: | |
252 | case V4L2_PIX_FMT_Y4: return BV_PXP_PS_CTRL_FORMAT__Y4; | |
253 | case V4L2_PIX_FMT_NV16: return BV_PXP_PS_CTRL_FORMAT__YUV2P422; | |
254 | case V4L2_PIX_FMT_NV12: return BV_PXP_PS_CTRL_FORMAT__YUV2P420; | |
255 | case V4L2_PIX_FMT_NV21: return BV_PXP_PS_CTRL_FORMAT__YVU2P420; | |
256 | case V4L2_PIX_FMT_NV61: return BV_PXP_PS_CTRL_FORMAT__YVU2P422; | |
257 | case V4L2_PIX_FMT_YUV422P: return BV_PXP_PS_CTRL_FORMAT__YUV422; | |
258 | case V4L2_PIX_FMT_YUV420: return BV_PXP_PS_CTRL_FORMAT__YUV420; | |
259 | } | |
260 | } | |
261 | ||
262 | static u32 pxp_v4l2_pix_fmt_to_out_format(u32 v4l2_pix_fmt) | |
263 | { | |
264 | switch (v4l2_pix_fmt) { | |
265 | case V4L2_PIX_FMT_XBGR32: return BV_PXP_OUT_CTRL_FORMAT__RGB888; | |
266 | case V4L2_PIX_FMT_ABGR32: return BV_PXP_OUT_CTRL_FORMAT__ARGB8888; | |
267 | case V4L2_PIX_FMT_BGR24: return BV_PXP_OUT_CTRL_FORMAT__RGB888P; | |
268 | /* Missing V4L2 pixel formats for ARGB1555 and ARGB4444 */ | |
269 | case V4L2_PIX_FMT_RGB555: return BV_PXP_OUT_CTRL_FORMAT__RGB555; | |
270 | case V4L2_PIX_FMT_RGB444: return BV_PXP_OUT_CTRL_FORMAT__RGB444; | |
271 | case V4L2_PIX_FMT_RGB565: return BV_PXP_OUT_CTRL_FORMAT__RGB565; | |
98617b45 VK |
272 | case V4L2_PIX_FMT_VUYA32: |
273 | case V4L2_PIX_FMT_VUYX32: return BV_PXP_OUT_CTRL_FORMAT__YUV1P444; | |
51abcf7f PZ |
274 | case V4L2_PIX_FMT_UYVY: return BV_PXP_OUT_CTRL_FORMAT__UYVY1P422; |
275 | case V4L2_PIX_FMT_VYUY: return BV_PXP_OUT_CTRL_FORMAT__VYUY1P422; | |
276 | case V4L2_PIX_FMT_GREY: return BV_PXP_OUT_CTRL_FORMAT__Y8; | |
277 | default: | |
278 | case V4L2_PIX_FMT_Y4: return BV_PXP_OUT_CTRL_FORMAT__Y4; | |
279 | case V4L2_PIX_FMT_NV16: return BV_PXP_OUT_CTRL_FORMAT__YUV2P422; | |
280 | case V4L2_PIX_FMT_NV12: return BV_PXP_OUT_CTRL_FORMAT__YUV2P420; | |
281 | case V4L2_PIX_FMT_NV61: return BV_PXP_OUT_CTRL_FORMAT__YVU2P422; | |
282 | case V4L2_PIX_FMT_NV21: return BV_PXP_OUT_CTRL_FORMAT__YVU2P420; | |
283 | } | |
284 | } | |
285 | ||
286 | static bool pxp_v4l2_pix_fmt_is_yuv(u32 v4l2_pix_fmt) | |
287 | { | |
288 | switch (v4l2_pix_fmt) { | |
98617b45 VK |
289 | case V4L2_PIX_FMT_VUYA32: |
290 | case V4L2_PIX_FMT_VUYX32: | |
51abcf7f PZ |
291 | case V4L2_PIX_FMT_UYVY: |
292 | case V4L2_PIX_FMT_YUYV: | |
293 | case V4L2_PIX_FMT_VYUY: | |
294 | case V4L2_PIX_FMT_YVYU: | |
295 | case V4L2_PIX_FMT_NV16: | |
296 | case V4L2_PIX_FMT_NV12: | |
297 | case V4L2_PIX_FMT_NV61: | |
298 | case V4L2_PIX_FMT_NV21: | |
299 | case V4L2_PIX_FMT_YUV420: | |
300 | case V4L2_PIX_FMT_YUV422P: | |
301 | case V4L2_PIX_FMT_GREY: | |
302 | case V4L2_PIX_FMT_Y4: | |
303 | return true; | |
304 | default: | |
305 | return false; | |
306 | } | |
307 | } | |
308 | ||
309 | static void pxp_setup_csc(struct pxp_ctx *ctx) | |
310 | { | |
311 | struct pxp_dev *dev = ctx->dev; | |
312 | enum v4l2_ycbcr_encoding ycbcr_enc; | |
313 | enum v4l2_quantization quantization; | |
314 | ||
315 | if (pxp_v4l2_pix_fmt_is_yuv(ctx->q_data[V4L2_M2M_SRC].fmt->fourcc) && | |
316 | !pxp_v4l2_pix_fmt_is_yuv(ctx->q_data[V4L2_M2M_DST].fmt->fourcc)) { | |
317 | /* | |
318 | * CSC1 YUV/YCbCr to RGB conversion is implemented as follows: | |
319 | * | |
320 | * |R| |C0 0 C1| |Y + Yoffset | | |
321 | * |G| = |C0 C3 C2| * |Cb + UVoffset| | |
322 | * |B| |C0 C4 0 | |Cr + UVoffset| | |
323 | * | |
324 | * Results are clamped to 0..255. | |
325 | * | |
326 | * BT.601 limited range: | |
327 | * | |
328 | * |R| |1.1644 0.0000 1.5960| |Y - 16 | | |
329 | * |G| = |1.1644 -0.3917 -0.8129| * |Cb - 128| | |
330 | * |B| |1.1644 2.0172 0.0000| |Cr - 128| | |
331 | */ | |
332 | static const u32 csc1_coef_bt601_lim[3] = { | |
333 | BM_PXP_CSC1_COEF0_YCBCR_MODE | | |
334 | BF_PXP_CSC1_COEF0_C0(0x12a) | /* 1.1641 (-0.03 %) */ | |
335 | BF_PXP_CSC1_COEF0_UV_OFFSET(-128) | | |
336 | BF_PXP_CSC1_COEF0_Y_OFFSET(-16), | |
337 | BF_PXP_CSC1_COEF1_C1(0x198) | /* 1.5938 (-0.23 %) */ | |
338 | BF_PXP_CSC1_COEF1_C4(0x204), /* 2.0156 (-0.16 %) */ | |
339 | BF_PXP_CSC1_COEF2_C2(0x730) | /* -0.8125 (+0.04 %) */ | |
340 | BF_PXP_CSC1_COEF2_C3(0x79c), /* -0.3906 (+0.11 %) */ | |
341 | }; | |
342 | /* | |
343 | * BT.601 full range: | |
344 | * | |
345 | * |R| |1.0000 0.0000 1.4020| |Y + 0 | | |
346 | * |G| = |1.0000 -0.3441 -0.7141| * |Cb - 128| | |
347 | * |B| |1.0000 1.7720 0.0000| |Cr - 128| | |
348 | */ | |
349 | static const u32 csc1_coef_bt601_full[3] = { | |
350 | BM_PXP_CSC1_COEF0_YCBCR_MODE | | |
351 | BF_PXP_CSC1_COEF0_C0(0x100) | /* 1.0000 (+0.00 %) */ | |
352 | BF_PXP_CSC1_COEF0_UV_OFFSET(-128) | | |
353 | BF_PXP_CSC1_COEF0_Y_OFFSET(0), | |
354 | BF_PXP_CSC1_COEF1_C1(0x166) | /* 1.3984 (-0.36 %) */ | |
355 | BF_PXP_CSC1_COEF1_C4(0x1c5), /* 1.7695 (-0.25 %) */ | |
356 | BF_PXP_CSC1_COEF2_C2(0x74a) | /* -0.7109 (+0.32 %) */ | |
357 | BF_PXP_CSC1_COEF2_C3(0x7a8), /* -0.3438 (+0.04 %) */ | |
358 | }; | |
359 | /* | |
360 | * Rec.709 limited range: | |
361 | * | |
362 | * |R| |1.1644 0.0000 1.7927| |Y - 16 | | |
363 | * |G| = |1.1644 -0.2132 -0.5329| * |Cb - 128| | |
364 | * |B| |1.1644 2.1124 0.0000| |Cr - 128| | |
365 | */ | |
366 | static const u32 csc1_coef_rec709_lim[3] = { | |
367 | BM_PXP_CSC1_COEF0_YCBCR_MODE | | |
368 | BF_PXP_CSC1_COEF0_C0(0x12a) | /* 1.1641 (-0.03 %) */ | |
369 | BF_PXP_CSC1_COEF0_UV_OFFSET(-128) | | |
370 | BF_PXP_CSC1_COEF0_Y_OFFSET(-16), | |
371 | BF_PXP_CSC1_COEF1_C1(0x1ca) | /* 1.7891 (-0.37 %) */ | |
372 | BF_PXP_CSC1_COEF1_C4(0x21c), /* 2.1094 (-0.30 %) */ | |
373 | BF_PXP_CSC1_COEF2_C2(0x778) | /* -0.5312 (+0.16 %) */ | |
374 | BF_PXP_CSC1_COEF2_C3(0x7ca), /* -0.2109 (+0.23 %) */ | |
375 | }; | |
376 | /* | |
377 | * Rec.709 full range: | |
378 | * | |
379 | * |R| |1.0000 0.0000 1.5748| |Y + 0 | | |
380 | * |G| = |1.0000 -0.1873 -0.4681| * |Cb - 128| | |
381 | * |B| |1.0000 1.8556 0.0000| |Cr - 128| | |
382 | */ | |
383 | static const u32 csc1_coef_rec709_full[3] = { | |
384 | BM_PXP_CSC1_COEF0_YCBCR_MODE | | |
385 | BF_PXP_CSC1_COEF0_C0(0x100) | /* 1.0000 (+0.00 %) */ | |
386 | BF_PXP_CSC1_COEF0_UV_OFFSET(-128) | | |
387 | BF_PXP_CSC1_COEF0_Y_OFFSET(0), | |
388 | BF_PXP_CSC1_COEF1_C1(0x193) | /* 1.5742 (-0.06 %) */ | |
389 | BF_PXP_CSC1_COEF1_C4(0x1db), /* 1.8555 (-0.01 %) */ | |
390 | BF_PXP_CSC1_COEF2_C2(0x789) | /* -0.4648 (+0.33 %) */ | |
391 | BF_PXP_CSC1_COEF2_C3(0x7d1), /* -0.1836 (+0.37 %) */ | |
392 | }; | |
393 | /* | |
394 | * BT.2020 limited range: | |
395 | * | |
396 | * |R| |1.1644 0.0000 1.6787| |Y - 16 | | |
397 | * |G| = |1.1644 -0.1874 -0.6505| * |Cb - 128| | |
398 | * |B| |1.1644 2.1418 0.0000| |Cr - 128| | |
399 | */ | |
400 | static const u32 csc1_coef_bt2020_lim[3] = { | |
401 | BM_PXP_CSC1_COEF0_YCBCR_MODE | | |
402 | BF_PXP_CSC1_COEF0_C0(0x12a) | /* 1.1641 (-0.03 %) */ | |
403 | BF_PXP_CSC1_COEF0_UV_OFFSET(-128) | | |
404 | BF_PXP_CSC1_COEF0_Y_OFFSET(-16), | |
405 | BF_PXP_CSC1_COEF1_C1(0x1ad) | /* 1.6758 (-0.29 %) */ | |
406 | BF_PXP_CSC1_COEF1_C4(0x224), /* 2.1406 (-0.11 %) */ | |
407 | BF_PXP_CSC1_COEF2_C2(0x75a) | /* -0.6484 (+0.20 %) */ | |
408 | BF_PXP_CSC1_COEF2_C3(0x7d1), /* -0.1836 (+0.38 %) */ | |
409 | }; | |
410 | /* | |
411 | * BT.2020 full range: | |
412 | * | |
413 | * |R| |1.0000 0.0000 1.4746| |Y + 0 | | |
414 | * |G| = |1.0000 -0.1646 -0.5714| * |Cb - 128| | |
415 | * |B| |1.0000 1.8814 0.0000| |Cr - 128| | |
416 | */ | |
417 | static const u32 csc1_coef_bt2020_full[3] = { | |
418 | BM_PXP_CSC1_COEF0_YCBCR_MODE | | |
419 | BF_PXP_CSC1_COEF0_C0(0x100) | /* 1.0000 (+0.00 %) */ | |
420 | BF_PXP_CSC1_COEF0_UV_OFFSET(-128) | | |
421 | BF_PXP_CSC1_COEF0_Y_OFFSET(0), | |
422 | BF_PXP_CSC1_COEF1_C1(0x179) | /* 1.4727 (-0.19 %) */ | |
423 | BF_PXP_CSC1_COEF1_C4(0x1e1), /* 1.8789 (-0.25 %) */ | |
424 | BF_PXP_CSC1_COEF2_C2(0x76e) | /* -0.5703 (+0.11 %) */ | |
425 | BF_PXP_CSC1_COEF2_C3(0x7d6), /* -0.1641 (+0.05 %) */ | |
426 | }; | |
427 | /* | |
428 | * SMPTE 240m limited range: | |
429 | * | |
430 | * |R| |1.1644 0.0000 1.7937| |Y - 16 | | |
431 | * |G| = |1.1644 -0.2565 -0.5427| * |Cb - 128| | |
432 | * |B| |1.1644 2.0798 0.0000| |Cr - 128| | |
433 | */ | |
434 | static const u32 csc1_coef_smpte240m_lim[3] = { | |
435 | BM_PXP_CSC1_COEF0_YCBCR_MODE | | |
436 | BF_PXP_CSC1_COEF0_C0(0x12a) | /* 1.1641 (-0.03 %) */ | |
437 | BF_PXP_CSC1_COEF0_UV_OFFSET(-128) | | |
438 | BF_PXP_CSC1_COEF0_Y_OFFSET(-16), | |
439 | BF_PXP_CSC1_COEF1_C1(0x1cb) | /* 1.7930 (-0.07 %) */ | |
440 | BF_PXP_CSC1_COEF1_C4(0x214), /* 2.0781 (-0.17 %) */ | |
441 | BF_PXP_CSC1_COEF2_C2(0x776) | /* -0.5391 (+0.36 %) */ | |
442 | BF_PXP_CSC1_COEF2_C3(0x7bf), /* -0.2539 (+0.26 %) */ | |
443 | }; | |
444 | /* | |
445 | * SMPTE 240m full range: | |
446 | * | |
447 | * |R| |1.0000 0.0000 1.5756| |Y + 0 | | |
448 | * |G| = |1.0000 -0.2253 -0.4767| * |Cb - 128| | |
449 | * |B| |1.0000 1.8270 0.0000| |Cr - 128| | |
450 | */ | |
451 | static const u32 csc1_coef_smpte240m_full[3] = { | |
452 | BM_PXP_CSC1_COEF0_YCBCR_MODE | | |
453 | BF_PXP_CSC1_COEF0_C0(0x100) | /* 1.0000 (+0.00 %) */ | |
454 | BF_PXP_CSC1_COEF0_UV_OFFSET(-128) | | |
455 | BF_PXP_CSC1_COEF0_Y_OFFSET(0), | |
456 | BF_PXP_CSC1_COEF1_C1(0x193) | /* 1.5742 (-0.14 %) */ | |
457 | BF_PXP_CSC1_COEF1_C4(0x1d3), /* 1.8242 (-0.28 %) */ | |
458 | BF_PXP_CSC1_COEF2_C2(0x786) | /* -0.4766 (+0.01 %) */ | |
459 | BF_PXP_CSC1_COEF2_C3(0x7c7), /* -0.2227 (+0.26 %) */ | |
460 | }; | |
461 | const u32 *csc1_coef; | |
462 | ||
463 | ycbcr_enc = ctx->q_data[V4L2_M2M_SRC].ycbcr_enc; | |
464 | quantization = ctx->q_data[V4L2_M2M_SRC].quant; | |
465 | ||
466 | if (ycbcr_enc == V4L2_YCBCR_ENC_601) { | |
467 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) | |
468 | csc1_coef = csc1_coef_bt601_full; | |
469 | else | |
470 | csc1_coef = csc1_coef_bt601_lim; | |
471 | } else if (ycbcr_enc == V4L2_YCBCR_ENC_709) { | |
472 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) | |
473 | csc1_coef = csc1_coef_rec709_full; | |
474 | else | |
475 | csc1_coef = csc1_coef_rec709_lim; | |
476 | } else if (ycbcr_enc == V4L2_YCBCR_ENC_BT2020) { | |
477 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) | |
478 | csc1_coef = csc1_coef_bt2020_full; | |
479 | else | |
480 | csc1_coef = csc1_coef_bt2020_lim; | |
481 | } else { | |
482 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) | |
483 | csc1_coef = csc1_coef_smpte240m_full; | |
484 | else | |
485 | csc1_coef = csc1_coef_smpte240m_lim; | |
486 | } | |
487 | ||
488 | writel(csc1_coef[0], dev->mmio + HW_PXP_CSC1_COEF0); | |
489 | writel(csc1_coef[1], dev->mmio + HW_PXP_CSC1_COEF1); | |
490 | writel(csc1_coef[2], dev->mmio + HW_PXP_CSC1_COEF2); | |
491 | } else { | |
492 | writel(BM_PXP_CSC1_COEF0_BYPASS, dev->mmio + HW_PXP_CSC1_COEF0); | |
493 | } | |
494 | ||
495 | if (!pxp_v4l2_pix_fmt_is_yuv(ctx->q_data[V4L2_M2M_SRC].fmt->fourcc) && | |
496 | pxp_v4l2_pix_fmt_is_yuv(ctx->q_data[V4L2_M2M_DST].fmt->fourcc)) { | |
497 | /* | |
498 | * CSC2 RGB to YUV/YCbCr conversion is implemented as follows: | |
499 | * | |
500 | * |Y | |A1 A2 A3| |R| |D1| | |
501 | * |Cb| = |B1 B2 B3| * |G| + |D2| | |
502 | * |Cr| |C1 C2 C3| |B| |D3| | |
503 | * | |
504 | * Results are clamped to 0..255. | |
505 | * | |
506 | * BT.601 limited range: | |
507 | * | |
508 | * |Y | | 0.2568 0.5041 0.0979| |R| |16 | | |
509 | * |Cb| = |-0.1482 -0.2910 0.4392| * |G| + |128| | |
510 | * |Cr| | 0.4392 0.4392 -0.3678| |B| |128| | |
511 | */ | |
512 | static const u32 csc2_coef_bt601_lim[6] = { | |
513 | BF_PXP_CSC2_COEF0_A2(0x081) | /* 0.5039 (-0.02 %) */ | |
514 | BF_PXP_CSC2_COEF0_A1(0x041), /* 0.2539 (-0.29 %) */ | |
515 | BF_PXP_CSC2_COEF1_B1(0x7db) | /* -0.1445 (+0.37 %) */ | |
516 | BF_PXP_CSC2_COEF1_A3(0x019), /* 0.0977 (-0.02 %) */ | |
517 | BF_PXP_CSC2_COEF2_B3(0x070) | /* 0.4375 (-0.17 %) */ | |
518 | BF_PXP_CSC2_COEF2_B2(0x7b6), /* -0.2891 (+0.20 %) */ | |
519 | BF_PXP_CSC2_COEF3_C2(0x7a2) | /* -0.3672 (+0.06 %) */ | |
520 | BF_PXP_CSC2_COEF3_C1(0x070), /* 0.4375 (-0.17 %) */ | |
521 | BF_PXP_CSC2_COEF4_D1(16) | | |
522 | BF_PXP_CSC2_COEF4_C3(0x7ee), /* -0.0703 (+0.11 %) */ | |
523 | BF_PXP_CSC2_COEF5_D3(128) | | |
524 | BF_PXP_CSC2_COEF5_D2(128), | |
525 | }; | |
526 | /* | |
527 | * BT.601 full range: | |
528 | * | |
529 | * |Y | | 0.2990 0.5870 0.1140| |R| |0 | | |
530 | * |Cb| = |-0.1687 -0.3313 0.5000| * |G| + |128| | |
531 | * |Cr| | 0.5000 0.5000 -0.4187| |B| |128| | |
532 | */ | |
533 | static const u32 csc2_coef_bt601_full[6] = { | |
534 | BF_PXP_CSC2_COEF0_A2(0x096) | /* 0.5859 (-0.11 %) */ | |
535 | BF_PXP_CSC2_COEF0_A1(0x04c), /* 0.2969 (-0.21 %) */ | |
536 | BF_PXP_CSC2_COEF1_B1(0x7d5) | /* -0.1680 (+0.07 %) */ | |
537 | BF_PXP_CSC2_COEF1_A3(0x01d), /* 0.1133 (-0.07 %) */ | |
538 | BF_PXP_CSC2_COEF2_B3(0x080) | /* 0.5000 (+0.00 %) */ | |
539 | BF_PXP_CSC2_COEF2_B2(0x7ac), /* -0.3281 (+0.32 %) */ | |
540 | BF_PXP_CSC2_COEF3_C2(0x795) | /* -0.4180 (+0.07 %) */ | |
541 | BF_PXP_CSC2_COEF3_C1(0x080), /* 0.5000 (+0.00 %) */ | |
542 | BF_PXP_CSC2_COEF4_D1(0) | | |
543 | BF_PXP_CSC2_COEF4_C3(0x7ec), /* -0.0781 (+0.32 %) */ | |
544 | BF_PXP_CSC2_COEF5_D3(128) | | |
545 | BF_PXP_CSC2_COEF5_D2(128), | |
546 | }; | |
547 | /* | |
548 | * Rec.709 limited range: | |
549 | * | |
550 | * |Y | | 0.1826 0.6142 0.0620| |R| |16 | | |
551 | * |Cb| = |-0.1007 -0.3385 0.4392| * |G| + |128| | |
552 | * |Cr| | 0.4392 0.4392 -0.3990| |B| |128| | |
553 | */ | |
554 | static const u32 csc2_coef_rec709_lim[6] = { | |
555 | BF_PXP_CSC2_COEF0_A2(0x09d) | /* 0.6133 (-0.09 %) */ | |
556 | BF_PXP_CSC2_COEF0_A1(0x02e), /* 0.1797 (-0.29 %) */ | |
557 | BF_PXP_CSC2_COEF1_B1(0x7e7) | /* -0.0977 (+0.30 %) */ | |
558 | BF_PXP_CSC2_COEF1_A3(0x00f), /* 0.0586 (-0.34 %) */ | |
559 | BF_PXP_CSC2_COEF2_B3(0x070) | /* 0.4375 (-0.17 %) */ | |
560 | BF_PXP_CSC2_COEF2_B2(0x7aa), /* -0.3359 (+0.26 %) */ | |
561 | BF_PXP_CSC2_COEF3_C2(0x79a) | /* -0.3984 (+0.05 %) */ | |
562 | BF_PXP_CSC2_COEF3_C1(0x070), /* 0.4375 (-0.17 %) */ | |
563 | BF_PXP_CSC2_COEF4_D1(16) | | |
564 | BF_PXP_CSC2_COEF4_C3(0x7f6), /* -0.0391 (+0.12 %) */ | |
565 | BF_PXP_CSC2_COEF5_D3(128) | | |
566 | BF_PXP_CSC2_COEF5_D2(128), | |
567 | }; | |
568 | /* | |
569 | * Rec.709 full range: | |
570 | * | |
571 | * |Y | | 0.2126 0.7152 0.0722| |R| |0 | | |
572 | * |Cb| = |-0.1146 -0.3854 0.5000| * |G| + |128| | |
573 | * |Cr| | 0.5000 0.5000 -0.4542| |B| |128| | |
574 | */ | |
575 | static const u32 csc2_coef_rec709_full[6] = { | |
576 | BF_PXP_CSC2_COEF0_A2(0x0b7) | /* 0.7148 (-0.04 %) */ | |
577 | BF_PXP_CSC2_COEF0_A1(0x036), /* 0.2109 (-0.17 %) */ | |
578 | BF_PXP_CSC2_COEF1_B1(0x7e3) | /* -0.1133 (+0.13 %) */ | |
579 | BF_PXP_CSC2_COEF1_A3(0x012), /* 0.0703 (-0.19 %) */ | |
580 | BF_PXP_CSC2_COEF2_B3(0x080) | /* 0.5000 (+0.00 %) */ | |
581 | BF_PXP_CSC2_COEF2_B2(0x79e), /* -0.3828 (+0.26 %) */ | |
582 | BF_PXP_CSC2_COEF3_C2(0x78c) | /* -0.4531 (+0.11 %) */ | |
583 | BF_PXP_CSC2_COEF3_C1(0x080), /* 0.5000 (+0.00 %) */ | |
584 | BF_PXP_CSC2_COEF4_D1(0) | | |
585 | BF_PXP_CSC2_COEF4_C3(0x7f5), /* -0.0430 (+0.28 %) */ | |
586 | BF_PXP_CSC2_COEF5_D3(128) | | |
587 | BF_PXP_CSC2_COEF5_D2(128), | |
588 | }; | |
589 | /* | |
590 | * BT.2020 limited range: | |
591 | * | |
592 | * |Y | | 0.2256 0.5823 0.0509| |R| |16 | | |
593 | * |Cb| = |-0.1226 -0.3166 0.4392| * |G| + |128| | |
594 | * |Cr| | 0.4392 0.4392 -0.4039| |B| |128| | |
595 | */ | |
596 | static const u32 csc2_coef_bt2020_lim[6] = { | |
597 | BF_PXP_CSC2_COEF0_A2(0x095) | /* 0.5820 (-0.03 %) */ | |
598 | BF_PXP_CSC2_COEF0_A1(0x039), /* 0.2227 (-0.30 %) */ | |
599 | BF_PXP_CSC2_COEF1_B1(0x7e1) | /* -0.1211 (+0.15 %) */ | |
600 | BF_PXP_CSC2_COEF1_A3(0x00d), /* 0.0508 (-0.01 %) */ | |
601 | BF_PXP_CSC2_COEF2_B3(0x070) | /* 0.4375 (-0.17 %) */ | |
602 | BF_PXP_CSC2_COEF2_B2(0x7af), /* -0.3164 (+0.02 %) */ | |
603 | BF_PXP_CSC2_COEF3_C2(0x799) | /* -0.4023 (+0.16 %) */ | |
604 | BF_PXP_CSC2_COEF3_C1(0x070), /* 0.4375 (-0.17 %) */ | |
605 | BF_PXP_CSC2_COEF4_D1(16) | | |
606 | BF_PXP_CSC2_COEF4_C3(0x7f7), /* -0.0352 (+0.02 %) */ | |
607 | BF_PXP_CSC2_COEF5_D3(128) | | |
608 | BF_PXP_CSC2_COEF5_D2(128), | |
609 | }; | |
610 | /* | |
611 | * BT.2020 full range: | |
612 | * | |
613 | * |Y | | 0.2627 0.6780 0.0593| |R| |0 | | |
614 | * |Cb| = |-0.1396 -0.3604 0.5000| * |G| + |128| | |
615 | * |Cr| | 0.5000 0.5000 -0.4598| |B| |128| | |
616 | */ | |
617 | static const u32 csc2_coef_bt2020_full[6] = { | |
618 | BF_PXP_CSC2_COEF0_A2(0x0ad) | /* 0.6758 (-0.22 %) */ | |
619 | BF_PXP_CSC2_COEF0_A1(0x043), /* 0.2617 (-0.10 %) */ | |
620 | BF_PXP_CSC2_COEF1_B1(0x7dd) | /* -0.1367 (+0.29 %) */ | |
621 | BF_PXP_CSC2_COEF1_A3(0x00f), /* 0.0586 (-0.07 %) */ | |
622 | BF_PXP_CSC2_COEF2_B3(0x080) | /* 0.5000 (+0.00 %) */ | |
623 | BF_PXP_CSC2_COEF2_B2(0x7a4), /* -0.3594 (+0.10 %) */ | |
624 | BF_PXP_CSC2_COEF3_C2(0x78b) | /* -0.4570 (+0.28 %) */ | |
625 | BF_PXP_CSC2_COEF3_C1(0x080), /* 0.5000 (+0.00 %) */ | |
626 | BF_PXP_CSC2_COEF4_D1(0) | | |
627 | BF_PXP_CSC2_COEF4_C3(0x7f6), /* -0.0391 (+0.11 %) */ | |
628 | BF_PXP_CSC2_COEF5_D3(128) | | |
629 | BF_PXP_CSC2_COEF5_D2(128), | |
630 | }; | |
631 | /* | |
632 | * SMPTE 240m limited range: | |
633 | * | |
634 | * |Y | | 0.1821 0.6020 0.0747| |R| |16 | | |
635 | * |Cb| = |-0.1019 -0.3373 0.4392| * |G| + |128| | |
636 | * |Cr| | 0.4392 0.4392 -0.3909| |B| |128| | |
637 | */ | |
638 | static const u32 csc2_coef_smpte240m_lim[6] = { | |
639 | BF_PXP_CSC2_COEF0_A2(0x09a) | /* 0.6016 (-0.05 %) */ | |
640 | BF_PXP_CSC2_COEF0_A1(0x02e), /* 0.1797 (-0.24 %) */ | |
641 | BF_PXP_CSC2_COEF1_B1(0x7e6) | /* -0.1016 (+0.03 %) */ | |
642 | BF_PXP_CSC2_COEF1_A3(0x013), /* 0.0742 (-0.05 %) */ | |
643 | BF_PXP_CSC2_COEF2_B3(0x070) | /* 0.4375 (-0.17 %) */ | |
644 | BF_PXP_CSC2_COEF2_B2(0x7aa), /* -0.3359 (+0.14 %) */ | |
645 | BF_PXP_CSC2_COEF3_C2(0x79c) | /* -0.3906 (+0.03 %) */ | |
646 | BF_PXP_CSC2_COEF3_C1(0x070), /* 0.4375 (-0.17 %) */ | |
647 | BF_PXP_CSC2_COEF4_D1(16) | | |
648 | BF_PXP_CSC2_COEF4_C3(0x7f4), /* -0.0469 (+0.14 %) */ | |
649 | BF_PXP_CSC2_COEF5_D3(128) | | |
650 | BF_PXP_CSC2_COEF5_D2(128), | |
651 | }; | |
652 | /* | |
653 | * SMPTE 240m full range: | |
654 | * | |
655 | * |Y | | 0.2120 0.7010 0.0870| |R| |0 | | |
656 | * |Cb| = |-0.1160 -0.3840 0.5000| * |G| + |128| | |
657 | * |Cr| | 0.5000 0.5000 -0.4450| |B| |128| | |
658 | */ | |
659 | static const u32 csc2_coef_smpte240m_full[6] = { | |
660 | BF_PXP_CSC2_COEF0_A2(0x0b3) | /* 0.6992 (-0.18 %) */ | |
661 | BF_PXP_CSC2_COEF0_A1(0x036), /* 0.2109 (-0.11 %) */ | |
662 | BF_PXP_CSC2_COEF1_B1(0x7e3) | /* -0.1133 (+0.27 %) */ | |
663 | BF_PXP_CSC2_COEF1_A3(0x016), /* 0.0859 (-0.11 %) */ | |
664 | BF_PXP_CSC2_COEF2_B3(0x080) | /* 0.5000 (+0.00 %) */ | |
665 | BF_PXP_CSC2_COEF2_B2(0x79e), /* -0.3828 (+0.12 %) */ | |
666 | BF_PXP_CSC2_COEF3_C2(0x78f) | /* -0.4414 (+0.36 %) */ | |
667 | BF_PXP_CSC2_COEF3_C1(0x080), /* 0.5000 (+0.00 %) */ | |
668 | BF_PXP_CSC2_COEF4_D1(0) | | |
669 | BF_PXP_CSC2_COEF4_C3(0x7f2), /* -0.0547 (+0.03 %) */ | |
670 | BF_PXP_CSC2_COEF5_D3(128) | | |
671 | BF_PXP_CSC2_COEF5_D2(128), | |
672 | }; | |
673 | const u32 *csc2_coef; | |
674 | u32 csc2_ctrl; | |
675 | ||
676 | ycbcr_enc = ctx->q_data[V4L2_M2M_DST].ycbcr_enc; | |
677 | quantization = ctx->q_data[V4L2_M2M_DST].quant; | |
678 | ||
679 | if (ycbcr_enc == V4L2_YCBCR_ENC_601) { | |
680 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) | |
681 | csc2_coef = csc2_coef_bt601_full; | |
682 | else | |
683 | csc2_coef = csc2_coef_bt601_lim; | |
684 | } else if (ycbcr_enc == V4L2_YCBCR_ENC_709) { | |
685 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) | |
686 | csc2_coef = csc2_coef_rec709_full; | |
687 | else | |
688 | csc2_coef = csc2_coef_rec709_lim; | |
801efd0f | 689 | } else if (ycbcr_enc == V4L2_YCBCR_ENC_BT2020) { |
51abcf7f PZ |
690 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) |
691 | csc2_coef = csc2_coef_bt2020_full; | |
692 | else | |
693 | csc2_coef = csc2_coef_bt2020_lim; | |
694 | } else { | |
695 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) | |
696 | csc2_coef = csc2_coef_smpte240m_full; | |
697 | else | |
698 | csc2_coef = csc2_coef_smpte240m_lim; | |
699 | } | |
700 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) { | |
701 | csc2_ctrl = BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YUV << | |
702 | BP_PXP_CSC2_CTRL_CSC_MODE; | |
703 | } else { | |
704 | csc2_ctrl = BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YCbCr << | |
705 | BP_PXP_CSC2_CTRL_CSC_MODE; | |
706 | } | |
707 | ||
708 | writel(csc2_ctrl, dev->mmio + HW_PXP_CSC2_CTRL); | |
709 | writel(csc2_coef[0], dev->mmio + HW_PXP_CSC2_COEF0); | |
710 | writel(csc2_coef[1], dev->mmio + HW_PXP_CSC2_COEF1); | |
711 | writel(csc2_coef[2], dev->mmio + HW_PXP_CSC2_COEF2); | |
712 | writel(csc2_coef[3], dev->mmio + HW_PXP_CSC2_COEF3); | |
713 | writel(csc2_coef[4], dev->mmio + HW_PXP_CSC2_COEF4); | |
714 | writel(csc2_coef[5], dev->mmio + HW_PXP_CSC2_COEF5); | |
715 | } else { | |
716 | writel(BM_PXP_CSC2_CTRL_BYPASS, dev->mmio + HW_PXP_CSC2_CTRL); | |
717 | } | |
718 | } | |
719 | ||
720 | static int pxp_start(struct pxp_ctx *ctx, struct vb2_v4l2_buffer *in_vb, | |
721 | struct vb2_v4l2_buffer *out_vb) | |
722 | { | |
723 | struct pxp_dev *dev = ctx->dev; | |
724 | struct pxp_q_data *q_data; | |
725 | u32 src_width, src_height, src_stride, src_fourcc; | |
726 | u32 dst_width, dst_height, dst_stride, dst_fourcc; | |
727 | dma_addr_t p_in, p_out; | |
728 | u32 ctrl, out_ctrl, out_buf, out_buf2, out_pitch, out_lrc, out_ps_ulc; | |
729 | u32 out_ps_lrc; | |
730 | u32 ps_ctrl, ps_buf, ps_ubuf, ps_vbuf, ps_pitch, ps_scale, ps_offset; | |
731 | u32 as_ulc, as_lrc; | |
732 | u32 y_size; | |
733 | u32 decx, decy, xscale, yscale; | |
734 | ||
735 | q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); | |
736 | ||
737 | src_width = ctx->q_data[V4L2_M2M_SRC].width; | |
738 | dst_width = ctx->q_data[V4L2_M2M_DST].width; | |
739 | src_height = ctx->q_data[V4L2_M2M_SRC].height; | |
740 | dst_height = ctx->q_data[V4L2_M2M_DST].height; | |
741 | src_stride = ctx->q_data[V4L2_M2M_SRC].bytesperline; | |
742 | dst_stride = ctx->q_data[V4L2_M2M_DST].bytesperline; | |
743 | src_fourcc = ctx->q_data[V4L2_M2M_SRC].fmt->fourcc; | |
744 | dst_fourcc = ctx->q_data[V4L2_M2M_DST].fmt->fourcc; | |
745 | ||
746 | p_in = vb2_dma_contig_plane_dma_addr(&in_vb->vb2_buf, 0); | |
747 | p_out = vb2_dma_contig_plane_dma_addr(&out_vb->vb2_buf, 0); | |
748 | ||
749 | if (!p_in || !p_out) { | |
750 | v4l2_err(&dev->v4l2_dev, | |
751 | "Acquiring DMA addresses of buffers failed\n"); | |
752 | return -EFAULT; | |
753 | } | |
754 | ||
755 | out_vb->sequence = | |
756 | get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE)->sequence++; | |
757 | in_vb->sequence = q_data->sequence++; | |
758 | out_vb->vb2_buf.timestamp = in_vb->vb2_buf.timestamp; | |
759 | ||
760 | if (in_vb->flags & V4L2_BUF_FLAG_TIMECODE) | |
761 | out_vb->timecode = in_vb->timecode; | |
762 | out_vb->field = in_vb->field; | |
763 | out_vb->flags = in_vb->flags & | |
764 | (V4L2_BUF_FLAG_TIMECODE | | |
765 | V4L2_BUF_FLAG_KEYFRAME | | |
766 | V4L2_BUF_FLAG_PFRAME | | |
767 | V4L2_BUF_FLAG_BFRAME | | |
768 | V4L2_BUF_FLAG_TSTAMP_SRC_MASK); | |
769 | ||
770 | /* Rotation disabled, 8x8 block size */ | |
771 | ctrl = BF_PXP_CTRL_VFLIP0(!!(ctx->mode & MEM2MEM_VFLIP)) | | |
772 | BF_PXP_CTRL_HFLIP0(!!(ctx->mode & MEM2MEM_HFLIP)); | |
773 | /* Always write alpha value as V4L2_CID_ALPHA_COMPONENT */ | |
774 | out_ctrl = BF_PXP_OUT_CTRL_ALPHA(ctx->alpha_component) | | |
775 | BF_PXP_OUT_CTRL_ALPHA_OUTPUT(1) | | |
776 | pxp_v4l2_pix_fmt_to_out_format(dst_fourcc); | |
777 | out_buf = p_out; | |
778 | switch (dst_fourcc) { | |
779 | case V4L2_PIX_FMT_NV12: | |
780 | case V4L2_PIX_FMT_NV21: | |
781 | case V4L2_PIX_FMT_NV16: | |
782 | case V4L2_PIX_FMT_NV61: | |
783 | out_buf2 = out_buf + dst_stride * dst_height; | |
784 | break; | |
785 | default: | |
786 | out_buf2 = 0; | |
787 | } | |
788 | ||
789 | out_pitch = BF_PXP_OUT_PITCH_PITCH(dst_stride); | |
790 | out_lrc = BF_PXP_OUT_LRC_X(dst_width - 1) | | |
791 | BF_PXP_OUT_LRC_Y(dst_height - 1); | |
792 | /* PS covers whole output */ | |
793 | out_ps_ulc = BF_PXP_OUT_PS_ULC_X(0) | BF_PXP_OUT_PS_ULC_Y(0); | |
794 | out_ps_lrc = BF_PXP_OUT_PS_LRC_X(dst_width - 1) | | |
795 | BF_PXP_OUT_PS_LRC_Y(dst_height - 1); | |
796 | /* no AS */ | |
797 | as_ulc = BF_PXP_OUT_AS_ULC_X(1) | BF_PXP_OUT_AS_ULC_Y(1); | |
798 | as_lrc = BF_PXP_OUT_AS_LRC_X(0) | BF_PXP_OUT_AS_LRC_Y(0); | |
799 | ||
800 | decx = (src_width <= dst_width) ? 0 : ilog2(src_width / dst_width); | |
801 | decy = (src_height <= dst_height) ? 0 : ilog2(src_height / dst_height); | |
802 | ps_ctrl = BF_PXP_PS_CTRL_DECX(decx) | BF_PXP_PS_CTRL_DECY(decy) | | |
803 | pxp_v4l2_pix_fmt_to_ps_format(src_fourcc); | |
804 | ps_buf = p_in; | |
805 | y_size = src_stride * src_height; | |
806 | switch (src_fourcc) { | |
807 | case V4L2_PIX_FMT_YUV420: | |
808 | ps_ubuf = ps_buf + y_size; | |
809 | ps_vbuf = ps_ubuf + y_size / 4; | |
810 | break; | |
811 | case V4L2_PIX_FMT_YUV422P: | |
812 | ps_ubuf = ps_buf + y_size; | |
813 | ps_vbuf = ps_ubuf + y_size / 2; | |
814 | break; | |
815 | case V4L2_PIX_FMT_NV12: | |
816 | case V4L2_PIX_FMT_NV21: | |
817 | case V4L2_PIX_FMT_NV16: | |
818 | case V4L2_PIX_FMT_NV61: | |
819 | ps_ubuf = ps_buf + y_size; | |
820 | ps_vbuf = 0; | |
821 | break; | |
822 | case V4L2_PIX_FMT_GREY: | |
823 | case V4L2_PIX_FMT_Y4: | |
824 | ps_ubuf = 0; | |
825 | /* In grayscale mode, ps_vbuf contents are reused as CbCr */ | |
826 | ps_vbuf = 0x8080; | |
827 | break; | |
828 | default: | |
829 | ps_ubuf = 0; | |
830 | ps_vbuf = 0; | |
831 | break; | |
832 | } | |
833 | ps_pitch = BF_PXP_PS_PITCH_PITCH(src_stride); | |
834 | if (decx) { | |
835 | xscale = (src_width >> decx) * 0x1000 / dst_width; | |
836 | } else { | |
837 | switch (src_fourcc) { | |
838 | case V4L2_PIX_FMT_UYVY: | |
839 | case V4L2_PIX_FMT_YUYV: | |
840 | case V4L2_PIX_FMT_VYUY: | |
841 | case V4L2_PIX_FMT_YVYU: | |
842 | case V4L2_PIX_FMT_NV16: | |
843 | case V4L2_PIX_FMT_NV12: | |
844 | case V4L2_PIX_FMT_NV21: | |
845 | case V4L2_PIX_FMT_NV61: | |
846 | case V4L2_PIX_FMT_YUV422P: | |
847 | case V4L2_PIX_FMT_YUV420: | |
848 | /* | |
849 | * This avoids sampling past the right edge for | |
850 | * horizontally chroma subsampled formats. | |
851 | */ | |
852 | xscale = (src_width - 2) * 0x1000 / (dst_width - 1); | |
853 | break; | |
854 | default: | |
855 | xscale = (src_width - 1) * 0x1000 / (dst_width - 1); | |
856 | break; | |
857 | } | |
858 | } | |
859 | if (decy) | |
860 | yscale = (src_height >> decy) * 0x1000 / dst_height; | |
861 | else | |
862 | yscale = (src_height - 1) * 0x1000 / (dst_height - 1); | |
863 | ps_scale = BF_PXP_PS_SCALE_YSCALE(yscale) | | |
864 | BF_PXP_PS_SCALE_XSCALE(xscale); | |
865 | ps_offset = BF_PXP_PS_OFFSET_YOFFSET(0) | BF_PXP_PS_OFFSET_XOFFSET(0); | |
866 | ||
867 | writel(ctrl, dev->mmio + HW_PXP_CTRL); | |
868 | /* skip STAT */ | |
869 | writel(out_ctrl, dev->mmio + HW_PXP_OUT_CTRL); | |
870 | writel(out_buf, dev->mmio + HW_PXP_OUT_BUF); | |
871 | writel(out_buf2, dev->mmio + HW_PXP_OUT_BUF2); | |
872 | writel(out_pitch, dev->mmio + HW_PXP_OUT_PITCH); | |
873 | writel(out_lrc, dev->mmio + HW_PXP_OUT_LRC); | |
874 | writel(out_ps_ulc, dev->mmio + HW_PXP_OUT_PS_ULC); | |
875 | writel(out_ps_lrc, dev->mmio + HW_PXP_OUT_PS_LRC); | |
876 | writel(as_ulc, dev->mmio + HW_PXP_OUT_AS_ULC); | |
877 | writel(as_lrc, dev->mmio + HW_PXP_OUT_AS_LRC); | |
878 | writel(ps_ctrl, dev->mmio + HW_PXP_PS_CTRL); | |
879 | writel(ps_buf, dev->mmio + HW_PXP_PS_BUF); | |
880 | writel(ps_ubuf, dev->mmio + HW_PXP_PS_UBUF); | |
881 | writel(ps_vbuf, dev->mmio + HW_PXP_PS_VBUF); | |
882 | writel(ps_pitch, dev->mmio + HW_PXP_PS_PITCH); | |
883 | writel(0x00ffffff, dev->mmio + HW_PXP_PS_BACKGROUND_0); | |
884 | writel(ps_scale, dev->mmio + HW_PXP_PS_SCALE); | |
885 | writel(ps_offset, dev->mmio + HW_PXP_PS_OFFSET); | |
886 | /* disable processed surface color keying */ | |
887 | writel(0x00ffffff, dev->mmio + HW_PXP_PS_CLRKEYLOW_0); | |
888 | writel(0x00000000, dev->mmio + HW_PXP_PS_CLRKEYHIGH_0); | |
889 | ||
890 | /* disable alpha surface color keying */ | |
891 | writel(0x00ffffff, dev->mmio + HW_PXP_AS_CLRKEYLOW_0); | |
892 | writel(0x00000000, dev->mmio + HW_PXP_AS_CLRKEYHIGH_0); | |
893 | ||
894 | /* setup CSC */ | |
895 | pxp_setup_csc(ctx); | |
896 | ||
897 | /* bypass LUT */ | |
898 | writel(BM_PXP_LUT_CTRL_BYPASS, dev->mmio + HW_PXP_LUT_CTRL); | |
899 | ||
900 | writel(BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(0)| | |
901 | BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(1)| | |
902 | BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(0)| | |
903 | BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(0)| | |
904 | BF_PXP_DATA_PATH_CTRL0_MUX11_SEL(0)| | |
905 | BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(0)| | |
906 | BF_PXP_DATA_PATH_CTRL0_MUX9_SEL(1)| | |
907 | BF_PXP_DATA_PATH_CTRL0_MUX8_SEL(0)| | |
908 | BF_PXP_DATA_PATH_CTRL0_MUX7_SEL(0)| | |
909 | BF_PXP_DATA_PATH_CTRL0_MUX6_SEL(0)| | |
910 | BF_PXP_DATA_PATH_CTRL0_MUX5_SEL(0)| | |
911 | BF_PXP_DATA_PATH_CTRL0_MUX4_SEL(0)| | |
912 | BF_PXP_DATA_PATH_CTRL0_MUX3_SEL(0)| | |
913 | BF_PXP_DATA_PATH_CTRL0_MUX2_SEL(0)| | |
914 | BF_PXP_DATA_PATH_CTRL0_MUX1_SEL(0)| | |
915 | BF_PXP_DATA_PATH_CTRL0_MUX0_SEL(0), | |
916 | dev->mmio + HW_PXP_DATA_PATH_CTRL0); | |
917 | writel(BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(1) | | |
918 | BF_PXP_DATA_PATH_CTRL1_MUX16_SEL(1), | |
919 | dev->mmio + HW_PXP_DATA_PATH_CTRL1); | |
920 | ||
921 | writel(0xffff, dev->mmio + HW_PXP_IRQ_MASK); | |
922 | ||
923 | /* ungate, enable PS/AS/OUT and PXP operation */ | |
924 | writel(BM_PXP_CTRL_IRQ_ENABLE, dev->mmio + HW_PXP_CTRL_SET); | |
925 | writel(BM_PXP_CTRL_ENABLE | BM_PXP_CTRL_ENABLE_CSC2 | | |
926 | BM_PXP_CTRL_ENABLE_LUT | BM_PXP_CTRL_ENABLE_ROTATE0 | | |
927 | BM_PXP_CTRL_ENABLE_PS_AS_OUT, dev->mmio + HW_PXP_CTRL_SET); | |
928 | ||
929 | return 0; | |
930 | } | |
931 | ||
932 | static void pxp_job_finish(struct pxp_dev *dev) | |
933 | { | |
934 | struct pxp_ctx *curr_ctx; | |
935 | struct vb2_v4l2_buffer *src_vb, *dst_vb; | |
936 | unsigned long flags; | |
937 | ||
938 | curr_ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev); | |
939 | ||
940 | if (curr_ctx == NULL) { | |
941 | pr_err("Instance released before the end of transaction\n"); | |
942 | return; | |
943 | } | |
944 | ||
945 | src_vb = v4l2_m2m_src_buf_remove(curr_ctx->fh.m2m_ctx); | |
946 | dst_vb = v4l2_m2m_dst_buf_remove(curr_ctx->fh.m2m_ctx); | |
947 | ||
948 | spin_lock_irqsave(&dev->irqlock, flags); | |
949 | v4l2_m2m_buf_done(src_vb, VB2_BUF_STATE_DONE); | |
950 | v4l2_m2m_buf_done(dst_vb, VB2_BUF_STATE_DONE); | |
951 | spin_unlock_irqrestore(&dev->irqlock, flags); | |
952 | ||
953 | dprintk(curr_ctx->dev, "Finishing transaction\n"); | |
954 | v4l2_m2m_job_finish(dev->m2m_dev, curr_ctx->fh.m2m_ctx); | |
955 | } | |
956 | ||
957 | /* | |
958 | * mem2mem callbacks | |
959 | */ | |
960 | static void pxp_device_run(void *priv) | |
961 | { | |
962 | struct pxp_ctx *ctx = priv; | |
963 | struct vb2_v4l2_buffer *src_buf, *dst_buf; | |
964 | ||
965 | src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | |
966 | dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); | |
967 | ||
968 | pxp_start(ctx, src_buf, dst_buf); | |
969 | } | |
970 | ||
971 | static int pxp_job_ready(void *priv) | |
972 | { | |
973 | struct pxp_ctx *ctx = priv; | |
974 | ||
975 | if (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) < 1 || | |
976 | v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx) < 1) { | |
977 | dprintk(ctx->dev, "Not enough buffers available\n"); | |
978 | return 0; | |
979 | } | |
980 | ||
981 | return 1; | |
982 | } | |
983 | ||
984 | static void pxp_job_abort(void *priv) | |
985 | { | |
986 | struct pxp_ctx *ctx = priv; | |
987 | ||
988 | /* Will cancel the transaction in the next interrupt handler */ | |
989 | ctx->aborting = 1; | |
990 | } | |
991 | ||
992 | /* | |
993 | * interrupt handler | |
994 | */ | |
995 | static irqreturn_t pxp_irq_handler(int irq, void *dev_id) | |
996 | { | |
997 | struct pxp_dev *dev = dev_id; | |
998 | u32 stat; | |
999 | ||
1000 | stat = readl(dev->mmio + HW_PXP_STAT); | |
1001 | ||
1002 | if (stat & BM_PXP_STAT_IRQ0) { | |
1003 | /* we expect x = 0, y = height, irq0 = 1 */ | |
1004 | if (stat & ~(BM_PXP_STAT_BLOCKX | BM_PXP_STAT_BLOCKY | | |
1005 | BM_PXP_STAT_IRQ0)) | |
1006 | dprintk(dev, "%s: stat = 0x%08x\n", __func__, stat); | |
1007 | writel(BM_PXP_STAT_IRQ0, dev->mmio + HW_PXP_STAT_CLR); | |
1008 | ||
1009 | pxp_job_finish(dev); | |
1010 | } else { | |
1011 | u32 irq = readl(dev->mmio + HW_PXP_IRQ); | |
1012 | ||
1013 | dprintk(dev, "%s: stat = 0x%08x\n", __func__, stat); | |
1014 | dprintk(dev, "%s: irq = 0x%08x\n", __func__, irq); | |
1015 | ||
1016 | writel(irq, dev->mmio + HW_PXP_IRQ_CLR); | |
1017 | } | |
1018 | ||
1019 | return IRQ_HANDLED; | |
1020 | } | |
1021 | ||
1022 | /* | |
1023 | * video ioctls | |
1024 | */ | |
1025 | static int pxp_querycap(struct file *file, void *priv, | |
1026 | struct v4l2_capability *cap) | |
1027 | { | |
85709cbf MCC |
1028 | strscpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver)); |
1029 | strscpy(cap->card, MEM2MEM_NAME, sizeof(cap->card)); | |
51abcf7f PZ |
1030 | snprintf(cap->bus_info, sizeof(cap->bus_info), |
1031 | "platform:%s", MEM2MEM_NAME); | |
1032 | return 0; | |
1033 | } | |
1034 | ||
1035 | static int pxp_enum_fmt(struct v4l2_fmtdesc *f, u32 type) | |
1036 | { | |
1037 | int i, num; | |
1038 | struct pxp_fmt *fmt; | |
1039 | ||
1040 | num = 0; | |
1041 | ||
1042 | for (i = 0; i < NUM_FORMATS; ++i) { | |
1043 | if (formats[i].types & type) { | |
1044 | /* index-th format of type type found ? */ | |
1045 | if (num == f->index) | |
1046 | break; | |
1047 | /* | |
1048 | * Correct type but haven't reached our index yet, | |
1049 | * just increment per-type index | |
1050 | */ | |
1051 | ++num; | |
1052 | } | |
1053 | } | |
1054 | ||
1055 | if (i < NUM_FORMATS) { | |
1056 | /* Format found */ | |
1057 | fmt = &formats[i]; | |
1058 | f->pixelformat = fmt->fourcc; | |
1059 | return 0; | |
1060 | } | |
1061 | ||
1062 | /* Format not found */ | |
1063 | return -EINVAL; | |
1064 | } | |
1065 | ||
1066 | static int pxp_enum_fmt_vid_cap(struct file *file, void *priv, | |
1067 | struct v4l2_fmtdesc *f) | |
1068 | { | |
1069 | return pxp_enum_fmt(f, MEM2MEM_CAPTURE); | |
1070 | } | |
1071 | ||
1072 | static int pxp_enum_fmt_vid_out(struct file *file, void *priv, | |
1073 | struct v4l2_fmtdesc *f) | |
1074 | { | |
1075 | return pxp_enum_fmt(f, MEM2MEM_OUTPUT); | |
1076 | } | |
1077 | ||
1078 | static int pxp_g_fmt(struct pxp_ctx *ctx, struct v4l2_format *f) | |
1079 | { | |
1080 | struct vb2_queue *vq; | |
1081 | struct pxp_q_data *q_data; | |
1082 | ||
1083 | vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); | |
1084 | if (!vq) | |
1085 | return -EINVAL; | |
1086 | ||
1087 | q_data = get_q_data(ctx, f->type); | |
1088 | ||
1089 | f->fmt.pix.width = q_data->width; | |
1090 | f->fmt.pix.height = q_data->height; | |
1091 | f->fmt.pix.field = V4L2_FIELD_NONE; | |
1092 | f->fmt.pix.pixelformat = q_data->fmt->fourcc; | |
1093 | f->fmt.pix.bytesperline = q_data->bytesperline; | |
1094 | f->fmt.pix.sizeimage = q_data->sizeimage; | |
1095 | f->fmt.pix.colorspace = ctx->colorspace; | |
1096 | f->fmt.pix.xfer_func = ctx->xfer_func; | |
1097 | f->fmt.pix.ycbcr_enc = q_data->ycbcr_enc; | |
1098 | f->fmt.pix.quantization = q_data->quant; | |
1099 | ||
1100 | return 0; | |
1101 | } | |
1102 | ||
1103 | static int pxp_g_fmt_vid_out(struct file *file, void *priv, | |
1104 | struct v4l2_format *f) | |
1105 | { | |
1106 | return pxp_g_fmt(file2ctx(file), f); | |
1107 | } | |
1108 | ||
1109 | static int pxp_g_fmt_vid_cap(struct file *file, void *priv, | |
1110 | struct v4l2_format *f) | |
1111 | { | |
1112 | return pxp_g_fmt(file2ctx(file), f); | |
1113 | } | |
1114 | ||
1115 | static inline u32 pxp_bytesperline(struct pxp_fmt *fmt, u32 width) | |
1116 | { | |
1117 | switch (fmt->fourcc) { | |
1118 | case V4L2_PIX_FMT_YUV420: | |
1119 | case V4L2_PIX_FMT_NV12: | |
1120 | case V4L2_PIX_FMT_NV21: | |
1121 | case V4L2_PIX_FMT_YUV422P: | |
1122 | case V4L2_PIX_FMT_NV16: | |
1123 | case V4L2_PIX_FMT_NV61: | |
1124 | return width; | |
1125 | default: | |
1126 | return (width * fmt->depth) >> 3; | |
1127 | } | |
1128 | } | |
1129 | ||
1130 | static inline u32 pxp_sizeimage(struct pxp_fmt *fmt, u32 width, u32 height) | |
1131 | { | |
1132 | return (fmt->depth * width * height) >> 3; | |
1133 | } | |
1134 | ||
1135 | static int pxp_try_fmt(struct v4l2_format *f, struct pxp_fmt *fmt) | |
1136 | { | |
1137 | v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W, ALIGN_W, | |
1138 | &f->fmt.pix.height, MIN_H, MAX_H, ALIGN_H, 0); | |
1139 | ||
1140 | f->fmt.pix.bytesperline = pxp_bytesperline(fmt, f->fmt.pix.width); | |
1141 | f->fmt.pix.sizeimage = pxp_sizeimage(fmt, f->fmt.pix.width, | |
1142 | f->fmt.pix.height); | |
1143 | f->fmt.pix.field = V4L2_FIELD_NONE; | |
1144 | ||
1145 | return 0; | |
1146 | } | |
1147 | ||
1148 | static void | |
1149 | pxp_fixup_colorimetry_cap(struct pxp_ctx *ctx, u32 dst_fourcc, | |
1150 | enum v4l2_ycbcr_encoding *ycbcr_enc, | |
1151 | enum v4l2_quantization *quantization) | |
1152 | { | |
1153 | bool dst_is_yuv = pxp_v4l2_pix_fmt_is_yuv(dst_fourcc); | |
1154 | ||
1155 | if (pxp_v4l2_pix_fmt_is_yuv(ctx->q_data[V4L2_M2M_SRC].fmt->fourcc) == | |
1156 | dst_is_yuv) { | |
1157 | /* | |
1158 | * There is no support for conversion between different YCbCr | |
1159 | * encodings or between RGB limited and full range. | |
1160 | */ | |
1161 | *ycbcr_enc = ctx->q_data[V4L2_M2M_SRC].ycbcr_enc; | |
1162 | *quantization = ctx->q_data[V4L2_M2M_SRC].quant; | |
1163 | } else { | |
1164 | *ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(ctx->colorspace); | |
1165 | *quantization = V4L2_MAP_QUANTIZATION_DEFAULT(!dst_is_yuv, | |
1166 | ctx->colorspace, | |
1167 | *ycbcr_enc); | |
1168 | } | |
1169 | } | |
1170 | ||
1171 | static int pxp_try_fmt_vid_cap(struct file *file, void *priv, | |
1172 | struct v4l2_format *f) | |
1173 | { | |
1174 | struct pxp_fmt *fmt; | |
1175 | struct pxp_ctx *ctx = file2ctx(file); | |
1176 | ||
1177 | fmt = find_format(f); | |
1178 | if (!fmt) { | |
1179 | f->fmt.pix.pixelformat = formats[0].fourcc; | |
1180 | fmt = find_format(f); | |
1181 | } | |
1182 | if (!(fmt->types & MEM2MEM_CAPTURE)) { | |
1183 | v4l2_err(&ctx->dev->v4l2_dev, | |
1184 | "Fourcc format (0x%08x) invalid.\n", | |
1185 | f->fmt.pix.pixelformat); | |
1186 | return -EINVAL; | |
1187 | } | |
1188 | ||
1189 | f->fmt.pix.colorspace = ctx->colorspace; | |
1190 | f->fmt.pix.xfer_func = ctx->xfer_func; | |
1191 | ||
1192 | pxp_fixup_colorimetry_cap(ctx, fmt->fourcc, | |
1193 | &f->fmt.pix.ycbcr_enc, | |
1194 | &f->fmt.pix.quantization); | |
1195 | ||
1196 | return pxp_try_fmt(f, fmt); | |
1197 | } | |
1198 | ||
1199 | static int pxp_try_fmt_vid_out(struct file *file, void *priv, | |
1200 | struct v4l2_format *f) | |
1201 | { | |
1202 | struct pxp_fmt *fmt; | |
1203 | struct pxp_ctx *ctx = file2ctx(file); | |
1204 | ||
1205 | fmt = find_format(f); | |
1206 | if (!fmt) { | |
1207 | f->fmt.pix.pixelformat = formats[0].fourcc; | |
1208 | fmt = find_format(f); | |
1209 | } | |
1210 | if (!(fmt->types & MEM2MEM_OUTPUT)) { | |
1211 | v4l2_err(&ctx->dev->v4l2_dev, | |
1212 | "Fourcc format (0x%08x) invalid.\n", | |
1213 | f->fmt.pix.pixelformat); | |
1214 | return -EINVAL; | |
1215 | } | |
1216 | ||
1217 | if (!f->fmt.pix.colorspace) | |
1218 | f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709; | |
1219 | ||
1220 | return pxp_try_fmt(f, fmt); | |
1221 | } | |
1222 | ||
1223 | static int pxp_s_fmt(struct pxp_ctx *ctx, struct v4l2_format *f) | |
1224 | { | |
1225 | struct pxp_q_data *q_data; | |
1226 | struct vb2_queue *vq; | |
1227 | ||
1228 | vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); | |
1229 | if (!vq) | |
1230 | return -EINVAL; | |
1231 | ||
1232 | q_data = get_q_data(ctx, f->type); | |
1233 | if (!q_data) | |
1234 | return -EINVAL; | |
1235 | ||
1236 | if (vb2_is_busy(vq)) { | |
1237 | v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__); | |
1238 | return -EBUSY; | |
1239 | } | |
1240 | ||
1241 | q_data->fmt = find_format(f); | |
1242 | q_data->width = f->fmt.pix.width; | |
1243 | q_data->height = f->fmt.pix.height; | |
1244 | q_data->bytesperline = f->fmt.pix.bytesperline; | |
1245 | q_data->sizeimage = f->fmt.pix.sizeimage; | |
1246 | ||
1247 | dprintk(ctx->dev, | |
1248 | "Setting format for type %d, wxh: %dx%d, fmt: %d\n", | |
1249 | f->type, q_data->width, q_data->height, q_data->fmt->fourcc); | |
1250 | ||
1251 | return 0; | |
1252 | } | |
1253 | ||
1254 | static int pxp_s_fmt_vid_cap(struct file *file, void *priv, | |
1255 | struct v4l2_format *f) | |
1256 | { | |
1257 | struct pxp_ctx *ctx = file2ctx(file); | |
1258 | int ret; | |
1259 | ||
1260 | ret = pxp_try_fmt_vid_cap(file, priv, f); | |
1261 | if (ret) | |
1262 | return ret; | |
1263 | ||
1264 | ret = pxp_s_fmt(file2ctx(file), f); | |
1265 | if (ret) | |
1266 | return ret; | |
1267 | ||
1268 | ctx->q_data[V4L2_M2M_DST].ycbcr_enc = f->fmt.pix.ycbcr_enc; | |
1269 | ctx->q_data[V4L2_M2M_DST].quant = f->fmt.pix.quantization; | |
1270 | ||
1271 | return 0; | |
1272 | } | |
1273 | ||
1274 | static int pxp_s_fmt_vid_out(struct file *file, void *priv, | |
1275 | struct v4l2_format *f) | |
1276 | { | |
1277 | struct pxp_ctx *ctx = file2ctx(file); | |
1278 | int ret; | |
1279 | ||
1280 | ret = pxp_try_fmt_vid_out(file, priv, f); | |
1281 | if (ret) | |
1282 | return ret; | |
1283 | ||
1284 | ret = pxp_s_fmt(file2ctx(file), f); | |
1285 | if (ret) | |
1286 | return ret; | |
1287 | ||
1288 | ctx->colorspace = f->fmt.pix.colorspace; | |
1289 | ctx->xfer_func = f->fmt.pix.xfer_func; | |
1290 | ctx->q_data[V4L2_M2M_SRC].ycbcr_enc = f->fmt.pix.ycbcr_enc; | |
1291 | ctx->q_data[V4L2_M2M_SRC].quant = f->fmt.pix.quantization; | |
1292 | ||
1293 | pxp_fixup_colorimetry_cap(ctx, ctx->q_data[V4L2_M2M_DST].fmt->fourcc, | |
1294 | &ctx->q_data[V4L2_M2M_DST].ycbcr_enc, | |
1295 | &ctx->q_data[V4L2_M2M_DST].quant); | |
1296 | ||
1297 | return 0; | |
1298 | } | |
1299 | ||
1300 | static int pxp_s_ctrl(struct v4l2_ctrl *ctrl) | |
1301 | { | |
1302 | struct pxp_ctx *ctx = | |
1303 | container_of(ctrl->handler, struct pxp_ctx, hdl); | |
1304 | ||
1305 | switch (ctrl->id) { | |
1306 | case V4L2_CID_HFLIP: | |
1307 | if (ctrl->val) | |
1308 | ctx->mode |= MEM2MEM_HFLIP; | |
1309 | else | |
1310 | ctx->mode &= ~MEM2MEM_HFLIP; | |
1311 | break; | |
1312 | ||
1313 | case V4L2_CID_VFLIP: | |
1314 | if (ctrl->val) | |
1315 | ctx->mode |= MEM2MEM_VFLIP; | |
1316 | else | |
1317 | ctx->mode &= ~MEM2MEM_VFLIP; | |
1318 | break; | |
1319 | ||
1320 | case V4L2_CID_ALPHA_COMPONENT: | |
1321 | ctx->alpha_component = ctrl->val; | |
1322 | break; | |
1323 | ||
1324 | default: | |
1325 | v4l2_err(&ctx->dev->v4l2_dev, "Invalid control\n"); | |
1326 | return -EINVAL; | |
1327 | } | |
1328 | ||
1329 | return 0; | |
1330 | } | |
1331 | ||
1332 | static const struct v4l2_ctrl_ops pxp_ctrl_ops = { | |
1333 | .s_ctrl = pxp_s_ctrl, | |
1334 | }; | |
1335 | ||
1336 | static const struct v4l2_ioctl_ops pxp_ioctl_ops = { | |
1337 | .vidioc_querycap = pxp_querycap, | |
1338 | ||
1339 | .vidioc_enum_fmt_vid_cap = pxp_enum_fmt_vid_cap, | |
1340 | .vidioc_g_fmt_vid_cap = pxp_g_fmt_vid_cap, | |
1341 | .vidioc_try_fmt_vid_cap = pxp_try_fmt_vid_cap, | |
1342 | .vidioc_s_fmt_vid_cap = pxp_s_fmt_vid_cap, | |
1343 | ||
1344 | .vidioc_enum_fmt_vid_out = pxp_enum_fmt_vid_out, | |
1345 | .vidioc_g_fmt_vid_out = pxp_g_fmt_vid_out, | |
1346 | .vidioc_try_fmt_vid_out = pxp_try_fmt_vid_out, | |
1347 | .vidioc_s_fmt_vid_out = pxp_s_fmt_vid_out, | |
1348 | ||
1349 | .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, | |
1350 | .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, | |
1351 | .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, | |
1352 | .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, | |
1353 | .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, | |
1354 | .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, | |
1355 | .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, | |
1356 | ||
1357 | .vidioc_streamon = v4l2_m2m_ioctl_streamon, | |
1358 | .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, | |
1359 | ||
1360 | .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, | |
1361 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, | |
1362 | }; | |
1363 | ||
1364 | /* | |
1365 | * Queue operations | |
1366 | */ | |
1367 | static int pxp_queue_setup(struct vb2_queue *vq, | |
1368 | unsigned int *nbuffers, unsigned int *nplanes, | |
1369 | unsigned int sizes[], struct device *alloc_devs[]) | |
1370 | { | |
1371 | struct pxp_ctx *ctx = vb2_get_drv_priv(vq); | |
1372 | struct pxp_q_data *q_data; | |
1373 | unsigned int size, count = *nbuffers; | |
1374 | ||
1375 | q_data = get_q_data(ctx, vq->type); | |
1376 | ||
1377 | size = q_data->sizeimage; | |
1378 | ||
1379 | *nbuffers = count; | |
1380 | ||
1381 | if (*nplanes) | |
1382 | return sizes[0] < size ? -EINVAL : 0; | |
1383 | ||
1384 | *nplanes = 1; | |
1385 | sizes[0] = size; | |
1386 | ||
1387 | dprintk(ctx->dev, "get %d buffer(s) of size %d each.\n", count, size); | |
1388 | ||
1389 | return 0; | |
1390 | } | |
1391 | ||
1392 | static int pxp_buf_prepare(struct vb2_buffer *vb) | |
1393 | { | |
1394 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | |
1395 | struct pxp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); | |
1396 | struct pxp_dev *dev = ctx->dev; | |
1397 | struct pxp_q_data *q_data; | |
1398 | ||
1399 | dprintk(ctx->dev, "type: %d\n", vb->vb2_queue->type); | |
1400 | ||
1401 | q_data = get_q_data(ctx, vb->vb2_queue->type); | |
1402 | if (V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) { | |
1403 | if (vbuf->field == V4L2_FIELD_ANY) | |
1404 | vbuf->field = V4L2_FIELD_NONE; | |
1405 | if (vbuf->field != V4L2_FIELD_NONE) { | |
1406 | dprintk(dev, "%s field isn't supported\n", __func__); | |
1407 | return -EINVAL; | |
1408 | } | |
1409 | } | |
1410 | ||
1411 | if (vb2_plane_size(vb, 0) < q_data->sizeimage) { | |
1412 | dprintk(dev, "%s data will not fit into plane (%lu < %lu)\n", | |
1413 | __func__, vb2_plane_size(vb, 0), | |
1414 | (long)q_data->sizeimage); | |
1415 | return -EINVAL; | |
1416 | } | |
1417 | ||
1418 | vb2_set_plane_payload(vb, 0, q_data->sizeimage); | |
1419 | ||
1420 | return 0; | |
1421 | } | |
1422 | ||
1423 | static void pxp_buf_queue(struct vb2_buffer *vb) | |
1424 | { | |
1425 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | |
1426 | struct pxp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); | |
1427 | ||
1428 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); | |
1429 | } | |
1430 | ||
1431 | static int pxp_start_streaming(struct vb2_queue *q, unsigned int count) | |
1432 | { | |
1433 | struct pxp_ctx *ctx = vb2_get_drv_priv(q); | |
1434 | struct pxp_q_data *q_data = get_q_data(ctx, q->type); | |
1435 | ||
1436 | q_data->sequence = 0; | |
1437 | return 0; | |
1438 | } | |
1439 | ||
1440 | static void pxp_stop_streaming(struct vb2_queue *q) | |
1441 | { | |
1442 | struct pxp_ctx *ctx = vb2_get_drv_priv(q); | |
1443 | struct vb2_v4l2_buffer *vbuf; | |
1444 | unsigned long flags; | |
1445 | ||
1446 | for (;;) { | |
1447 | if (V4L2_TYPE_IS_OUTPUT(q->type)) | |
1448 | vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); | |
1449 | else | |
1450 | vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); | |
1451 | if (vbuf == NULL) | |
1452 | return; | |
1453 | spin_lock_irqsave(&ctx->dev->irqlock, flags); | |
1454 | v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); | |
1455 | spin_unlock_irqrestore(&ctx->dev->irqlock, flags); | |
1456 | } | |
1457 | } | |
1458 | ||
1459 | static const struct vb2_ops pxp_qops = { | |
1460 | .queue_setup = pxp_queue_setup, | |
1461 | .buf_prepare = pxp_buf_prepare, | |
1462 | .buf_queue = pxp_buf_queue, | |
1463 | .start_streaming = pxp_start_streaming, | |
1464 | .stop_streaming = pxp_stop_streaming, | |
1465 | .wait_prepare = vb2_ops_wait_prepare, | |
1466 | .wait_finish = vb2_ops_wait_finish, | |
1467 | }; | |
1468 | ||
1469 | static int queue_init(void *priv, struct vb2_queue *src_vq, | |
1470 | struct vb2_queue *dst_vq) | |
1471 | { | |
1472 | struct pxp_ctx *ctx = priv; | |
1473 | int ret; | |
1474 | ||
1475 | src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; | |
1476 | src_vq->io_modes = VB2_MMAP | VB2_DMABUF; | |
1477 | src_vq->drv_priv = ctx; | |
1478 | src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); | |
1479 | src_vq->ops = &pxp_qops; | |
1480 | src_vq->mem_ops = &vb2_dma_contig_memops; | |
1481 | src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; | |
1482 | src_vq->lock = &ctx->dev->dev_mutex; | |
1483 | src_vq->dev = ctx->dev->v4l2_dev.dev; | |
1484 | ||
1485 | ret = vb2_queue_init(src_vq); | |
1486 | if (ret) | |
1487 | return ret; | |
1488 | ||
1489 | dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
1490 | dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; | |
1491 | dst_vq->drv_priv = ctx; | |
1492 | dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); | |
1493 | dst_vq->ops = &pxp_qops; | |
1494 | dst_vq->mem_ops = &vb2_dma_contig_memops; | |
1495 | dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; | |
1496 | dst_vq->lock = &ctx->dev->dev_mutex; | |
1497 | dst_vq->dev = ctx->dev->v4l2_dev.dev; | |
1498 | ||
1499 | return vb2_queue_init(dst_vq); | |
1500 | } | |
1501 | ||
1502 | /* | |
1503 | * File operations | |
1504 | */ | |
1505 | static int pxp_open(struct file *file) | |
1506 | { | |
1507 | struct pxp_dev *dev = video_drvdata(file); | |
1508 | struct pxp_ctx *ctx = NULL; | |
1509 | struct v4l2_ctrl_handler *hdl; | |
1510 | int rc = 0; | |
1511 | ||
1512 | if (mutex_lock_interruptible(&dev->dev_mutex)) | |
1513 | return -ERESTARTSYS; | |
1514 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); | |
1515 | if (!ctx) { | |
1516 | rc = -ENOMEM; | |
1517 | goto open_unlock; | |
1518 | } | |
1519 | ||
1520 | v4l2_fh_init(&ctx->fh, video_devdata(file)); | |
1521 | file->private_data = &ctx->fh; | |
1522 | ctx->dev = dev; | |
1523 | hdl = &ctx->hdl; | |
1524 | v4l2_ctrl_handler_init(hdl, 4); | |
1525 | v4l2_ctrl_new_std(hdl, &pxp_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); | |
1526 | v4l2_ctrl_new_std(hdl, &pxp_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); | |
1527 | v4l2_ctrl_new_std(hdl, &pxp_ctrl_ops, V4L2_CID_ALPHA_COMPONENT, | |
1528 | 0, 255, 1, 255); | |
1529 | if (hdl->error) { | |
1530 | rc = hdl->error; | |
1531 | v4l2_ctrl_handler_free(hdl); | |
1532 | kfree(ctx); | |
1533 | goto open_unlock; | |
1534 | } | |
1535 | ctx->fh.ctrl_handler = hdl; | |
1536 | v4l2_ctrl_handler_setup(hdl); | |
1537 | ||
1538 | ctx->q_data[V4L2_M2M_SRC].fmt = &formats[0]; | |
1539 | ctx->q_data[V4L2_M2M_SRC].width = 640; | |
1540 | ctx->q_data[V4L2_M2M_SRC].height = 480; | |
1541 | ctx->q_data[V4L2_M2M_SRC].bytesperline = | |
1542 | pxp_bytesperline(&formats[0], 640); | |
1543 | ctx->q_data[V4L2_M2M_SRC].sizeimage = | |
1544 | pxp_sizeimage(&formats[0], 640, 480); | |
1545 | ctx->q_data[V4L2_M2M_DST] = ctx->q_data[V4L2_M2M_SRC]; | |
1546 | ctx->colorspace = V4L2_COLORSPACE_REC709; | |
1547 | ||
1548 | ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, &queue_init); | |
1549 | ||
1550 | if (IS_ERR(ctx->fh.m2m_ctx)) { | |
1551 | rc = PTR_ERR(ctx->fh.m2m_ctx); | |
1552 | ||
1553 | v4l2_ctrl_handler_free(hdl); | |
1554 | v4l2_fh_exit(&ctx->fh); | |
1555 | kfree(ctx); | |
1556 | goto open_unlock; | |
1557 | } | |
1558 | ||
1559 | v4l2_fh_add(&ctx->fh); | |
1560 | atomic_inc(&dev->num_inst); | |
1561 | ||
1562 | dprintk(dev, "Created instance: %p, m2m_ctx: %p\n", | |
1563 | ctx, ctx->fh.m2m_ctx); | |
1564 | ||
1565 | open_unlock: | |
1566 | mutex_unlock(&dev->dev_mutex); | |
1567 | return rc; | |
1568 | } | |
1569 | ||
1570 | static int pxp_release(struct file *file) | |
1571 | { | |
1572 | struct pxp_dev *dev = video_drvdata(file); | |
1573 | struct pxp_ctx *ctx = file2ctx(file); | |
1574 | ||
1575 | dprintk(dev, "Releasing instance %p\n", ctx); | |
1576 | ||
1577 | v4l2_fh_del(&ctx->fh); | |
1578 | v4l2_fh_exit(&ctx->fh); | |
1579 | v4l2_ctrl_handler_free(&ctx->hdl); | |
1580 | mutex_lock(&dev->dev_mutex); | |
1581 | v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); | |
1582 | mutex_unlock(&dev->dev_mutex); | |
1583 | kfree(ctx); | |
1584 | ||
1585 | atomic_dec(&dev->num_inst); | |
1586 | ||
1587 | return 0; | |
1588 | } | |
1589 | ||
1590 | static const struct v4l2_file_operations pxp_fops = { | |
1591 | .owner = THIS_MODULE, | |
1592 | .open = pxp_open, | |
1593 | .release = pxp_release, | |
1594 | .poll = v4l2_m2m_fop_poll, | |
1595 | .unlocked_ioctl = video_ioctl2, | |
1596 | .mmap = v4l2_m2m_fop_mmap, | |
1597 | }; | |
1598 | ||
1599 | static const struct video_device pxp_videodev = { | |
1600 | .name = MEM2MEM_NAME, | |
1601 | .vfl_dir = VFL_DIR_M2M, | |
1602 | .fops = &pxp_fops, | |
1603 | .device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING, | |
1604 | .ioctl_ops = &pxp_ioctl_ops, | |
1605 | .minor = -1, | |
1606 | .release = video_device_release_empty, | |
1607 | }; | |
1608 | ||
1609 | static const struct v4l2_m2m_ops m2m_ops = { | |
1610 | .device_run = pxp_device_run, | |
1611 | .job_ready = pxp_job_ready, | |
1612 | .job_abort = pxp_job_abort, | |
1613 | }; | |
1614 | ||
e03eb362 | 1615 | static int pxp_soft_reset(struct pxp_dev *dev) |
51abcf7f PZ |
1616 | { |
1617 | int ret; | |
1618 | u32 val; | |
1619 | ||
1620 | writel(BM_PXP_CTRL_SFTRST, dev->mmio + HW_PXP_CTRL_CLR); | |
1621 | writel(BM_PXP_CTRL_CLKGATE, dev->mmio + HW_PXP_CTRL_CLR); | |
1622 | ||
1623 | writel(BM_PXP_CTRL_SFTRST, dev->mmio + HW_PXP_CTRL_SET); | |
1624 | ||
1625 | ret = readl_poll_timeout(dev->mmio + HW_PXP_CTRL, val, | |
1626 | val & BM_PXP_CTRL_CLKGATE, 0, 100); | |
3431ebe5 | 1627 | if (ret < 0) |
e03eb362 | 1628 | return ret; |
51abcf7f PZ |
1629 | |
1630 | writel(BM_PXP_CTRL_SFTRST, dev->mmio + HW_PXP_CTRL_CLR); | |
1631 | writel(BM_PXP_CTRL_CLKGATE, dev->mmio + HW_PXP_CTRL_CLR); | |
e03eb362 FE |
1632 | |
1633 | return 0; | |
51abcf7f PZ |
1634 | } |
1635 | ||
1636 | static int pxp_probe(struct platform_device *pdev) | |
1637 | { | |
1638 | struct pxp_dev *dev; | |
1639 | struct resource *res; | |
1640 | struct video_device *vfd; | |
1641 | int irq; | |
1642 | int ret; | |
1643 | ||
1644 | dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); | |
1645 | if (!dev) | |
1646 | return -ENOMEM; | |
1647 | ||
1648 | dev->clk = devm_clk_get(&pdev->dev, "axi"); | |
1649 | if (IS_ERR(dev->clk)) { | |
1650 | ret = PTR_ERR(dev->clk); | |
1651 | dev_err(&pdev->dev, "Failed to get clk: %d\n", ret); | |
1652 | return ret; | |
1653 | } | |
1654 | ||
1655 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1656 | dev->mmio = devm_ioremap_resource(&pdev->dev, res); | |
1657 | if (IS_ERR(dev->mmio)) { | |
1658 | ret = PTR_ERR(dev->mmio); | |
1659 | dev_err(&pdev->dev, "Failed to map register space: %d\n", ret); | |
1660 | return ret; | |
1661 | } | |
1662 | ||
1663 | irq = platform_get_irq(pdev, 0); | |
1664 | if (irq < 0) { | |
1665 | dev_err(&pdev->dev, "Failed to get irq resource: %d\n", irq); | |
1666 | return irq; | |
1667 | } | |
1668 | ||
1669 | ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, pxp_irq_handler, | |
1670 | IRQF_ONESHOT, dev_name(&pdev->dev), dev); | |
1671 | if (ret < 0) { | |
1672 | dev_err(&pdev->dev, "Failed to request irq: %d\n", ret); | |
1673 | return ret; | |
1674 | } | |
1675 | ||
efceb765 FE |
1676 | ret = clk_prepare_enable(dev->clk); |
1677 | if (ret < 0) | |
1678 | return ret; | |
1679 | ||
e03eb362 | 1680 | ret = pxp_soft_reset(dev); |
3431ebe5 FE |
1681 | if (ret < 0) { |
1682 | dev_err(&pdev->dev, "PXP reset timeout: %d\n", ret); | |
e03eb362 | 1683 | goto err_clk; |
3431ebe5 | 1684 | } |
51abcf7f PZ |
1685 | |
1686 | spin_lock_init(&dev->irqlock); | |
1687 | ||
1688 | ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); | |
1689 | if (ret) | |
1690 | goto err_clk; | |
1691 | ||
1692 | atomic_set(&dev->num_inst, 0); | |
1693 | mutex_init(&dev->dev_mutex); | |
1694 | ||
1695 | dev->vfd = pxp_videodev; | |
1696 | vfd = &dev->vfd; | |
1697 | vfd->lock = &dev->dev_mutex; | |
1698 | vfd->v4l2_dev = &dev->v4l2_dev; | |
1699 | ||
1700 | video_set_drvdata(vfd, dev); | |
1701 | snprintf(vfd->name, sizeof(vfd->name), "%s", pxp_videodev.name); | |
1702 | v4l2_info(&dev->v4l2_dev, | |
1703 | "Device registered as /dev/video%d\n", vfd->num); | |
1704 | ||
1705 | platform_set_drvdata(pdev, dev); | |
1706 | ||
1707 | dev->m2m_dev = v4l2_m2m_init(&m2m_ops); | |
1708 | if (IS_ERR(dev->m2m_dev)) { | |
1709 | v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n"); | |
1710 | ret = PTR_ERR(dev->m2m_dev); | |
1711 | goto err_v4l2; | |
1712 | } | |
1713 | ||
1714 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0); | |
1715 | if (ret) { | |
1716 | v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); | |
1717 | goto err_m2m; | |
1718 | } | |
1719 | ||
1720 | return 0; | |
1721 | ||
1722 | err_m2m: | |
1723 | v4l2_m2m_release(dev->m2m_dev); | |
1724 | err_v4l2: | |
1725 | v4l2_device_unregister(&dev->v4l2_dev); | |
1726 | err_clk: | |
1727 | clk_disable_unprepare(dev->clk); | |
1728 | ||
1729 | return ret; | |
1730 | } | |
1731 | ||
1732 | static int pxp_remove(struct platform_device *pdev) | |
1733 | { | |
1734 | struct pxp_dev *dev = platform_get_drvdata(pdev); | |
1735 | ||
1736 | writel(BM_PXP_CTRL_CLKGATE, dev->mmio + HW_PXP_CTRL_SET); | |
1737 | writel(BM_PXP_CTRL_SFTRST, dev->mmio + HW_PXP_CTRL_SET); | |
1738 | ||
1739 | clk_disable_unprepare(dev->clk); | |
1740 | ||
1741 | v4l2_info(&dev->v4l2_dev, "Removing " MEM2MEM_NAME); | |
1742 | video_unregister_device(&dev->vfd); | |
1743 | v4l2_m2m_release(dev->m2m_dev); | |
1744 | v4l2_device_unregister(&dev->v4l2_dev); | |
1745 | ||
1746 | return 0; | |
1747 | } | |
1748 | ||
1749 | static const struct of_device_id pxp_dt_ids[] = { | |
1750 | { .compatible = "fsl,imx6ull-pxp", .data = NULL }, | |
1751 | { }, | |
1752 | }; | |
1753 | MODULE_DEVICE_TABLE(of, pxp_dt_ids); | |
1754 | ||
1755 | static struct platform_driver pxp_driver = { | |
1756 | .probe = pxp_probe, | |
1757 | .remove = pxp_remove, | |
1758 | .driver = { | |
1759 | .name = MEM2MEM_NAME, | |
1760 | .of_match_table = of_match_ptr(pxp_dt_ids), | |
1761 | }, | |
1762 | }; | |
1763 | ||
1764 | module_platform_driver(pxp_driver); | |
1765 | ||
1766 | MODULE_DESCRIPTION("i.MX PXP mem2mem scaler/CSC/rotator"); | |
1767 | MODULE_AUTHOR("Philipp Zabel <kernel@pengutronix.de>"); | |
1768 | MODULE_LICENSE("GPL"); |