Commit | Line | Data |
---|---|---|
d3953223 SN |
1 | /* |
2 | * S5P/EXYNOS4 SoC series camera host interface media device driver | |
3 | * | |
52917bcb SN |
4 | * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd. |
5 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> | |
d3953223 SN |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published | |
9 | * by the Free Software Foundation, either version 2 of the License, | |
10 | * or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/bug.h> | |
d3f5e0c5 SN |
14 | #include <linux/clk.h> |
15 | #include <linux/clk-provider.h> | |
d3953223 SN |
16 | #include <linux/device.h> |
17 | #include <linux/errno.h> | |
18 | #include <linux/i2c.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/list.h> | |
21 | #include <linux/module.h> | |
e2985a26 SN |
22 | #include <linux/of.h> |
23 | #include <linux/of_platform.h> | |
24 | #include <linux/of_device.h> | |
fd9fdb78 | 25 | #include <linux/of_graph.h> |
d3953223 SN |
26 | #include <linux/platform_device.h> |
27 | #include <linux/pm_runtime.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/slab.h> | |
fa91f105 | 30 | #include <media/v4l2-async.h> |
131b6c61 | 31 | #include <media/v4l2-ctrls.h> |
e2985a26 | 32 | #include <media/v4l2-of.h> |
d3953223 | 33 | #include <media/media-device.h> |
49b2f4c5 | 34 | #include <media/exynos-fimc.h> |
d3953223 | 35 | |
56fa1a6a | 36 | #include "media-dev.h" |
d3953223 | 37 | #include "fimc-core.h" |
e781bbe3 | 38 | #include "fimc-is.h" |
0f735f52 | 39 | #include "fimc-lite.h" |
d3953223 SN |
40 | #include "mipi-csis.h" |
41 | ||
52917bcb SN |
42 | /* Set up image sensor subdev -> FIMC capture node notifications. */ |
43 | static void __setup_sensor_notification(struct fimc_md *fmd, | |
44 | struct v4l2_subdev *sensor, | |
45 | struct v4l2_subdev *fimc_sd) | |
46 | { | |
47 | struct fimc_source_info *src_inf; | |
48 | struct fimc_sensor_info *md_si; | |
49 | unsigned long flags; | |
50 | ||
51 | src_inf = v4l2_get_subdev_hostdata(sensor); | |
52 | if (!src_inf || WARN_ON(fmd == NULL)) | |
53 | return; | |
54 | ||
55 | md_si = source_to_sensor_info(src_inf); | |
56 | spin_lock_irqsave(&fmd->slock, flags); | |
57 | md_si->host = v4l2_get_subdevdata(fimc_sd); | |
58 | spin_unlock_irqrestore(&fmd->slock, flags); | |
59 | } | |
60 | ||
d3953223 SN |
61 | /** |
62 | * fimc_pipeline_prepare - update pipeline information with subdevice pointers | |
39bb6df6 | 63 | * @me: media entity terminating the pipeline |
d3953223 SN |
64 | * |
65 | * Caller holds the graph mutex. | |
66 | */ | |
b9ee31e6 | 67 | static void fimc_pipeline_prepare(struct fimc_pipeline *p, |
403dfbec | 68 | struct media_entity *me) |
d3953223 | 69 | { |
52917bcb | 70 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
d3953223 | 71 | struct v4l2_subdev *sd; |
52917bcb | 72 | struct v4l2_subdev *sensor = NULL; |
0f735f52 | 73 | int i; |
d3953223 | 74 | |
0f735f52 SN |
75 | for (i = 0; i < IDX_MAX; i++) |
76 | p->subdevs[i] = NULL; | |
d3953223 | 77 | |
0f735f52 | 78 | while (1) { |
39bb6df6 SN |
79 | struct media_pad *pad = NULL; |
80 | ||
81 | /* Find remote source pad */ | |
82 | for (i = 0; i < me->num_pads; i++) { | |
83 | struct media_pad *spad = &me->pads[i]; | |
84 | if (!(spad->flags & MEDIA_PAD_FL_SINK)) | |
85 | continue; | |
1bddf1b3 | 86 | pad = media_entity_remote_pad(spad); |
39bb6df6 SN |
87 | if (pad) |
88 | break; | |
89 | } | |
0f735f52 | 90 | |
0f735f52 SN |
91 | if (pad == NULL || |
92 | media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV) | |
93 | break; | |
0f735f52 SN |
94 | sd = media_entity_to_v4l2_subdev(pad->entity); |
95 | ||
96 | switch (sd->grp_id) { | |
588c87be | 97 | case GRP_ID_SENSOR: |
52917bcb SN |
98 | sensor = sd; |
99 | /* fall through */ | |
100 | case GRP_ID_FIMC_IS_SENSOR: | |
0f735f52 SN |
101 | p->subdevs[IDX_SENSOR] = sd; |
102 | break; | |
588c87be | 103 | case GRP_ID_CSIS: |
0f735f52 SN |
104 | p->subdevs[IDX_CSIS] = sd; |
105 | break; | |
588c87be | 106 | case GRP_ID_FLITE: |
4af81310 SN |
107 | p->subdevs[IDX_FLITE] = sd; |
108 | break; | |
588c87be | 109 | case GRP_ID_FIMC: |
52917bcb | 110 | p->subdevs[IDX_FIMC] = sd; |
0f735f52 | 111 | break; |
e781bbe3 SN |
112 | case GRP_ID_FIMC_IS: |
113 | p->subdevs[IDX_IS_ISP] = sd; | |
114 | break; | |
0f735f52 | 115 | default: |
e781bbe3 | 116 | break; |
0f735f52 | 117 | } |
39bb6df6 SN |
118 | me = &sd->entity; |
119 | if (me->num_pads == 1) | |
120 | break; | |
d3953223 | 121 | } |
52917bcb SN |
122 | |
123 | if (sensor && p->subdevs[IDX_FIMC]) | |
124 | __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]); | |
d3953223 SN |
125 | } |
126 | ||
127 | /** | |
128 | * __subdev_set_power - change power state of a single subdev | |
129 | * @sd: subdevice to change power state for | |
130 | * @on: 1 to enable power or 0 to disable | |
131 | * | |
132 | * Return result of s_power subdev operation or -ENXIO if sd argument | |
133 | * is NULL. Return 0 if the subdevice does not implement s_power. | |
134 | */ | |
135 | static int __subdev_set_power(struct v4l2_subdev *sd, int on) | |
136 | { | |
137 | int *use_count; | |
138 | int ret; | |
139 | ||
140 | if (sd == NULL) | |
141 | return -ENXIO; | |
142 | ||
143 | use_count = &sd->entity.use_count; | |
144 | if (on && (*use_count)++ > 0) | |
145 | return 0; | |
146 | else if (!on && (*use_count == 0 || --(*use_count) > 0)) | |
147 | return 0; | |
148 | ret = v4l2_subdev_call(sd, core, s_power, on); | |
149 | ||
150 | return ret != -ENOIOCTLCMD ? ret : 0; | |
151 | } | |
152 | ||
153 | /** | |
154 | * fimc_pipeline_s_power - change power state of all pipeline subdevs | |
155 | * @fimc: fimc device terminating the pipeline | |
0f735f52 | 156 | * @state: true to power on, false to power off |
d3953223 | 157 | * |
0f735f52 | 158 | * Needs to be called with the graph mutex held. |
d3953223 | 159 | */ |
f8bca4f5 | 160 | static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on) |
d3953223 | 161 | { |
f8bca4f5 SN |
162 | static const u8 seq[2][IDX_MAX - 1] = { |
163 | { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE }, | |
164 | { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP }, | |
165 | }; | |
166 | int i, ret = 0; | |
d3953223 | 167 | |
0f735f52 | 168 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
169 | return -ENXIO; |
170 | ||
f8bca4f5 SN |
171 | for (i = 0; i < IDX_MAX - 1; i++) { |
172 | unsigned int idx = seq[on][i]; | |
173 | ||
174 | ret = __subdev_set_power(p->subdevs[idx], on); | |
175 | ||
0f735f52 | 176 | |
0f735f52 | 177 | if (ret < 0 && ret != -ENXIO) |
f8bca4f5 | 178 | goto error; |
d3953223 | 179 | } |
0f735f52 | 180 | return 0; |
f8bca4f5 SN |
181 | error: |
182 | for (; i >= 0; i--) { | |
183 | unsigned int idx = seq[on][i]; | |
184 | __subdev_set_power(p->subdevs[idx], !on); | |
185 | } | |
186 | return ret; | |
d3953223 SN |
187 | } |
188 | ||
189 | /** | |
b9ee31e6 SN |
190 | * __fimc_pipeline_open - update the pipeline information, enable power |
191 | * of all pipeline subdevs and the sensor clock | |
d3953223 | 192 | * @me: media entity to start graph walk with |
056f4f30 | 193 | * @prepare: true to walk the current pipeline and acquire all subdevs |
d3953223 | 194 | * |
740ad921 | 195 | * Called with the graph mutex held. |
d3953223 | 196 | */ |
403dfbec | 197 | static int __fimc_pipeline_open(struct exynos_media_pipeline *ep, |
056f4f30 | 198 | struct media_entity *me, bool prepare) |
d3953223 | 199 | { |
056f4f30 | 200 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
403dfbec | 201 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 | 202 | struct v4l2_subdev *sd; |
d3953223 SN |
203 | int ret; |
204 | ||
056f4f30 SN |
205 | if (WARN_ON(p == NULL || me == NULL)) |
206 | return -EINVAL; | |
207 | ||
208 | if (prepare) | |
0f735f52 SN |
209 | fimc_pipeline_prepare(p, me); |
210 | ||
056f4f30 SN |
211 | sd = p->subdevs[IDX_SENSOR]; |
212 | if (sd == NULL) | |
d3953223 | 213 | return -EINVAL; |
0f735f52 | 214 | |
056f4f30 SN |
215 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ |
216 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) { | |
217 | ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); | |
218 | if (ret < 0) | |
219 | return ret; | |
220 | } | |
fa91f105 | 221 | |
056f4f30 SN |
222 | ret = fimc_pipeline_s_power(p, 1); |
223 | if (!ret) | |
224 | return 0; | |
0f735f52 | 225 | |
056f4f30 SN |
226 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) |
227 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
228 | ||
229 | return ret; | |
d3953223 SN |
230 | } |
231 | ||
d3953223 | 232 | /** |
b9ee31e6 | 233 | * __fimc_pipeline_close - disable the sensor clock and pipeline power |
d3953223 SN |
234 | * @fimc: fimc device terminating the pipeline |
235 | * | |
740ad921 | 236 | * Disable power of all subdevs and turn the external sensor clock off. |
d3953223 | 237 | */ |
403dfbec | 238 | static int __fimc_pipeline_close(struct exynos_media_pipeline *ep) |
d3953223 | 239 | { |
403dfbec | 240 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 SN |
241 | struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL; |
242 | struct fimc_md *fmd; | |
36da6fcd | 243 | int ret; |
740ad921 | 244 | |
36da6fcd SN |
245 | if (sd == NULL) { |
246 | pr_warn("%s(): No sensor subdev\n", __func__); | |
247 | return 0; | |
d3953223 | 248 | } |
056f4f30 | 249 | |
36da6fcd | 250 | ret = fimc_pipeline_s_power(p, 0); |
36da6fcd | 251 | |
056f4f30 SN |
252 | fmd = entity_to_fimc_mdev(&sd->entity); |
253 | ||
254 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ | |
255 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) | |
256 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
257 | ||
d3953223 SN |
258 | return ret == -ENXIO ? 0 : ret; |
259 | } | |
260 | ||
d3953223 | 261 | /** |
8d274e7c | 262 | * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs |
0f735f52 | 263 | * @pipeline: video pipeline structure |
8d274e7c | 264 | * @on: passed as the s_stream() callback argument |
d3953223 | 265 | */ |
403dfbec | 266 | static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on) |
d3953223 | 267 | { |
8d274e7c SN |
268 | static const u8 seq[2][IDX_MAX] = { |
269 | { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE }, | |
270 | { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP }, | |
271 | }; | |
403dfbec | 272 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
8d274e7c | 273 | int i, ret = 0; |
d3953223 | 274 | |
0f735f52 | 275 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
276 | return -ENODEV; |
277 | ||
0f735f52 | 278 | for (i = 0; i < IDX_MAX; i++) { |
8d274e7c | 279 | unsigned int idx = seq[on][i]; |
0f735f52 SN |
280 | |
281 | ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on); | |
282 | ||
283 | if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) | |
8d274e7c | 284 | goto error; |
0f735f52 | 285 | } |
0f735f52 | 286 | return 0; |
8d274e7c SN |
287 | error: |
288 | for (; i >= 0; i--) { | |
289 | unsigned int idx = seq[on][i]; | |
290 | v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on); | |
291 | } | |
292 | return ret; | |
d3953223 | 293 | } |
b9ee31e6 SN |
294 | |
295 | /* Media pipeline operations for the FIMC/FIMC-LITE video device driver */ | |
403dfbec | 296 | static const struct exynos_media_pipeline_ops fimc_pipeline_ops = { |
740ad921 SN |
297 | .open = __fimc_pipeline_open, |
298 | .close = __fimc_pipeline_close, | |
299 | .set_stream = __fimc_pipeline_s_stream, | |
b9ee31e6 | 300 | }; |
d3953223 | 301 | |
403dfbec SN |
302 | static struct exynos_media_pipeline *fimc_md_pipeline_create( |
303 | struct fimc_md *fmd) | |
304 | { | |
305 | struct fimc_pipeline *p; | |
306 | ||
307 | p = kzalloc(sizeof(*p), GFP_KERNEL); | |
308 | if (!p) | |
309 | return NULL; | |
310 | ||
311 | list_add_tail(&p->list, &fmd->pipelines); | |
312 | ||
313 | p->ep.ops = &fimc_pipeline_ops; | |
314 | return &p->ep; | |
315 | } | |
316 | ||
317 | static void fimc_md_pipelines_free(struct fimc_md *fmd) | |
318 | { | |
319 | while (!list_empty(&fmd->pipelines)) { | |
320 | struct fimc_pipeline *p; | |
321 | ||
322 | p = list_entry(fmd->pipelines.next, typeof(*p), list); | |
323 | list_del(&p->list); | |
324 | kfree(p); | |
325 | } | |
326 | } | |
327 | ||
2b13f7d4 SN |
328 | /* Parse port node and register as a sub-device any sensor specified there. */ |
329 | static int fimc_md_parse_port_node(struct fimc_md *fmd, | |
330 | struct device_node *port, | |
331 | unsigned int index) | |
332 | { | |
49b2f4c5 | 333 | struct fimc_source_info *pd = &fmd->sensor[index].pdata; |
2b13f7d4 | 334 | struct device_node *rem, *ep, *np; |
2b13f7d4 | 335 | struct v4l2_of_endpoint endpoint; |
2b13f7d4 SN |
336 | |
337 | /* Assume here a port node can have only one endpoint node. */ | |
338 | ep = of_get_next_child(port, NULL); | |
339 | if (!ep) | |
340 | return 0; | |
341 | ||
342 | v4l2_of_parse_endpoint(ep, &endpoint); | |
f2a575f6 | 343 | if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS) |
2b13f7d4 SN |
344 | return -EINVAL; |
345 | ||
f2a575f6 | 346 | pd->mux_id = (endpoint.base.port - 1) & 0x1; |
2b13f7d4 | 347 | |
fd9fdb78 | 348 | rem = of_graph_get_remote_port_parent(ep); |
2b13f7d4 SN |
349 | of_node_put(ep); |
350 | if (rem == NULL) { | |
351 | v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n", | |
352 | ep->full_name); | |
353 | return 0; | |
354 | } | |
2b13f7d4 | 355 | |
f2a575f6 | 356 | if (fimc_input_is_parallel(endpoint.base.port)) { |
2b13f7d4 SN |
357 | if (endpoint.bus_type == V4L2_MBUS_PARALLEL) |
358 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601; | |
359 | else | |
360 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656; | |
361 | pd->flags = endpoint.bus.parallel.flags; | |
f2a575f6 | 362 | } else if (fimc_input_is_mipi_csi(endpoint.base.port)) { |
2b13f7d4 SN |
363 | /* |
364 | * MIPI CSI-2: only input mux selection and | |
365 | * the sensor's clock frequency is needed. | |
366 | */ | |
367 | pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2; | |
368 | } else { | |
369 | v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n", | |
f2a575f6 | 370 | endpoint.base.port, rem->full_name); |
2b13f7d4 SN |
371 | } |
372 | /* | |
373 | * For FIMC-IS handled sensors, that are placed under i2c-isp device | |
374 | * node, FIMC is connected to the FIMC-IS through its ISP Writeback | |
375 | * input. Sensors are attached to the FIMC-LITE hostdata interface | |
376 | * directly or through MIPI-CSIS, depending on the external media bus | |
377 | * used. This needs to be handled in a more reliable way, not by just | |
378 | * checking parent's node name. | |
379 | */ | |
380 | np = of_get_parent(rem); | |
381 | ||
382 | if (np && !of_node_cmp(np->name, "i2c-isp")) | |
383 | pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK; | |
384 | else | |
385 | pd->fimc_bus_type = pd->sensor_bus_type; | |
386 | ||
fa91f105 SN |
387 | if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor))) |
388 | return -EINVAL; | |
2b13f7d4 | 389 | |
fa91f105 SN |
390 | fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF; |
391 | fmd->sensor[index].asd.match.of.node = rem; | |
392 | fmd->async_subdevs[index] = &fmd->sensor[index].asd; | |
393 | ||
394 | fmd->num_sensors++; | |
395 | ||
396 | of_node_put(rem); | |
397 | return 0; | |
2b13f7d4 SN |
398 | } |
399 | ||
400 | /* Register all SoC external sub-devices */ | |
49b2f4c5 | 401 | static int fimc_md_register_sensor_entities(struct fimc_md *fmd) |
2b13f7d4 SN |
402 | { |
403 | struct device_node *parent = fmd->pdev->dev.of_node; | |
404 | struct device_node *node, *ports; | |
405 | int index = 0; | |
406 | int ret; | |
407 | ||
49b2f4c5 SN |
408 | /* |
409 | * Runtime resume one of the FIMC entities to make sure | |
410 | * the sclk_cam clocks are not globally disabled. | |
411 | */ | |
412 | if (!fmd->pmf) | |
413 | return -ENXIO; | |
414 | ||
415 | ret = pm_runtime_get_sync(fmd->pmf); | |
416 | if (ret < 0) | |
417 | return ret; | |
418 | ||
419 | fmd->num_sensors = 0; | |
420 | ||
2b13f7d4 SN |
421 | /* Attach sensors linked to MIPI CSI-2 receivers */ |
422 | for_each_available_child_of_node(parent, node) { | |
423 | struct device_node *port; | |
424 | ||
425 | if (of_node_cmp(node->name, "csis")) | |
426 | continue; | |
427 | /* The csis node can have only port subnode. */ | |
428 | port = of_get_next_child(node, NULL); | |
429 | if (!port) | |
430 | continue; | |
431 | ||
432 | ret = fimc_md_parse_port_node(fmd, port, index); | |
433 | if (ret < 0) | |
49b2f4c5 | 434 | goto rpm_put; |
2b13f7d4 SN |
435 | index++; |
436 | } | |
437 | ||
438 | /* Attach sensors listed in the parallel-ports node */ | |
439 | ports = of_get_child_by_name(parent, "parallel-ports"); | |
440 | if (!ports) | |
49b2f4c5 | 441 | goto rpm_put; |
2b13f7d4 SN |
442 | |
443 | for_each_child_of_node(ports, node) { | |
444 | ret = fimc_md_parse_port_node(fmd, node, index); | |
445 | if (ret < 0) | |
446 | break; | |
447 | index++; | |
448 | } | |
49b2f4c5 SN |
449 | rpm_put: |
450 | pm_runtime_put(fmd->pmf); | |
451 | return ret; | |
2b13f7d4 SN |
452 | } |
453 | ||
e2985a26 SN |
454 | static int __of_get_csis_id(struct device_node *np) |
455 | { | |
456 | u32 reg = 0; | |
457 | ||
458 | np = of_get_child_by_name(np, "port"); | |
459 | if (!np) | |
460 | return -EINVAL; | |
461 | of_property_read_u32(np, "reg", ®); | |
462 | return reg - FIMC_INPUT_MIPI_CSI2_0; | |
463 | } | |
d3953223 SN |
464 | |
465 | /* | |
7b43a6f3 | 466 | * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration. |
d3953223 | 467 | */ |
7b43a6f3 SN |
468 | static int register_fimc_lite_entity(struct fimc_md *fmd, |
469 | struct fimc_lite *fimc_lite) | |
d3953223 | 470 | { |
8163ec0b | 471 | struct v4l2_subdev *sd; |
403dfbec | 472 | struct exynos_media_pipeline *ep; |
afd7348c | 473 | int ret; |
4af81310 | 474 | |
7b43a6f3 SN |
475 | if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS || |
476 | fmd->fimc_lite[fimc_lite->index])) | |
477 | return -EBUSY; | |
d3953223 | 478 | |
7b43a6f3 SN |
479 | sd = &fimc_lite->subdev; |
480 | sd->grp_id = GRP_ID_FLITE; | |
403dfbec SN |
481 | |
482 | ep = fimc_md_pipeline_create(fmd); | |
483 | if (!ep) | |
484 | return -ENOMEM; | |
485 | ||
486 | v4l2_set_subdev_hostdata(sd, ep); | |
693f5c40 SN |
487 | |
488 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); | |
7b43a6f3 SN |
489 | if (!ret) |
490 | fmd->fimc_lite[fimc_lite->index] = fimc_lite; | |
491 | else | |
492 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n", | |
493 | fimc_lite->index); | |
494 | return ret; | |
d3953223 SN |
495 | } |
496 | ||
7b43a6f3 | 497 | static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc) |
4af81310 | 498 | { |
7b43a6f3 | 499 | struct v4l2_subdev *sd; |
403dfbec | 500 | struct exynos_media_pipeline *ep; |
4af81310 SN |
501 | int ret; |
502 | ||
7b43a6f3 SN |
503 | if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id])) |
504 | return -EBUSY; | |
4af81310 | 505 | |
7b43a6f3 SN |
506 | sd = &fimc->vid_cap.subdev; |
507 | sd->grp_id = GRP_ID_FIMC; | |
403dfbec SN |
508 | |
509 | ep = fimc_md_pipeline_create(fmd); | |
510 | if (!ep) | |
511 | return -ENOMEM; | |
512 | ||
513 | v4l2_set_subdev_hostdata(sd, ep); | |
4af81310 | 514 | |
7b43a6f3 SN |
515 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
516 | if (!ret) { | |
3e20c345 SN |
517 | if (!fmd->pmf && fimc->pdev) |
518 | fmd->pmf = &fimc->pdev->dev; | |
7b43a6f3 SN |
519 | fmd->fimc[fimc->id] = fimc; |
520 | fimc->vid_cap.user_subdev_api = fmd->user_subdev_api; | |
521 | } else { | |
522 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n", | |
523 | fimc->id, ret); | |
4af81310 | 524 | } |
7b43a6f3 | 525 | return ret; |
4af81310 SN |
526 | } |
527 | ||
7b43a6f3 SN |
528 | static int register_csis_entity(struct fimc_md *fmd, |
529 | struct platform_device *pdev, | |
530 | struct v4l2_subdev *sd) | |
d3953223 | 531 | { |
7b43a6f3 | 532 | struct device_node *node = pdev->dev.of_node; |
d3953223 SN |
533 | int id, ret; |
534 | ||
e2985a26 | 535 | id = node ? __of_get_csis_id(node) : max(0, pdev->id); |
7b43a6f3 | 536 | |
e2985a26 SN |
537 | if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES)) |
538 | return -ENOENT; | |
7b43a6f3 | 539 | |
e2985a26 SN |
540 | if (WARN_ON(fmd->csis[id].sd)) |
541 | return -EBUSY; | |
d3953223 | 542 | |
588c87be | 543 | sd->grp_id = GRP_ID_CSIS; |
d3953223 | 544 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
afd7348c SN |
545 | if (!ret) |
546 | fmd->csis[id].sd = sd; | |
547 | else | |
d3953223 | 548 | v4l2_err(&fmd->v4l2_dev, |
7b43a6f3 | 549 | "Failed to register MIPI-CSIS.%d (%d)\n", id, ret); |
d3953223 SN |
550 | return ret; |
551 | } | |
552 | ||
e781bbe3 SN |
553 | static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is) |
554 | { | |
555 | struct v4l2_subdev *sd = &is->isp.subdev; | |
34947b8a | 556 | struct exynos_media_pipeline *ep; |
e781bbe3 SN |
557 | int ret; |
558 | ||
34947b8a SN |
559 | /* Allocate pipeline object for the ISP capture video node. */ |
560 | ep = fimc_md_pipeline_create(fmd); | |
561 | if (!ep) | |
562 | return -ENOMEM; | |
563 | ||
564 | v4l2_set_subdev_hostdata(sd, ep); | |
565 | ||
e781bbe3 SN |
566 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
567 | if (ret) { | |
568 | v4l2_err(&fmd->v4l2_dev, | |
569 | "Failed to register FIMC-ISP (%d)\n", ret); | |
570 | return ret; | |
571 | } | |
572 | ||
573 | fmd->fimc_is = is; | |
574 | return 0; | |
575 | } | |
576 | ||
7b43a6f3 SN |
577 | static int fimc_md_register_platform_entity(struct fimc_md *fmd, |
578 | struct platform_device *pdev, | |
579 | int plat_entity) | |
d3953223 | 580 | { |
7b43a6f3 SN |
581 | struct device *dev = &pdev->dev; |
582 | int ret = -EPROBE_DEFER; | |
583 | void *drvdata; | |
584 | ||
585 | /* Lock to ensure dev->driver won't change. */ | |
586 | device_lock(dev); | |
587 | ||
588 | if (!dev->driver || !try_module_get(dev->driver->owner)) | |
589 | goto dev_unlock; | |
590 | ||
591 | drvdata = dev_get_drvdata(dev); | |
f58c91ce | 592 | /* Some subdev didn't probe successfully id drvdata is NULL */ |
7b43a6f3 SN |
593 | if (drvdata) { |
594 | switch (plat_entity) { | |
595 | case IDX_FIMC: | |
596 | ret = register_fimc_entity(fmd, drvdata); | |
597 | break; | |
598 | case IDX_FLITE: | |
599 | ret = register_fimc_lite_entity(fmd, drvdata); | |
ecd9acbf | 600 | break; |
7b43a6f3 SN |
601 | case IDX_CSIS: |
602 | ret = register_csis_entity(fmd, pdev, drvdata); | |
603 | break; | |
e781bbe3 SN |
604 | case IDX_IS_ISP: |
605 | ret = register_fimc_is_entity(fmd, drvdata); | |
606 | break; | |
7b43a6f3 SN |
607 | default: |
608 | ret = -ENODEV; | |
ecd9acbf SN |
609 | } |
610 | } | |
d3953223 | 611 | |
7b43a6f3 SN |
612 | module_put(dev->driver->owner); |
613 | dev_unlock: | |
614 | device_unlock(dev); | |
615 | if (ret == -EPROBE_DEFER) | |
616 | dev_info(&fmd->pdev->dev, "deferring %s device registration\n", | |
617 | dev_name(dev)); | |
618 | else if (ret < 0) | |
619 | dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n", | |
620 | dev_name(dev), ret); | |
621 | return ret; | |
622 | } | |
623 | ||
e2985a26 | 624 | /* Register FIMC, FIMC-LITE and CSIS media entities */ |
49b2f4c5 SN |
625 | static int fimc_md_register_platform_entities(struct fimc_md *fmd, |
626 | struct device_node *parent) | |
e2985a26 SN |
627 | { |
628 | struct device_node *node; | |
629 | int ret = 0; | |
630 | ||
631 | for_each_available_child_of_node(parent, node) { | |
632 | struct platform_device *pdev; | |
633 | int plat_entity = -1; | |
634 | ||
635 | pdev = of_find_device_by_node(node); | |
636 | if (!pdev) | |
637 | continue; | |
638 | ||
639 | /* If driver of any entity isn't ready try all again later. */ | |
640 | if (!strcmp(node->name, CSIS_OF_NODE_NAME)) | |
641 | plat_entity = IDX_CSIS; | |
e781bbe3 SN |
642 | else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME)) |
643 | plat_entity = IDX_IS_ISP; | |
e2985a26 SN |
644 | else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME)) |
645 | plat_entity = IDX_FLITE; | |
646 | else if (!strcmp(node->name, FIMC_OF_NODE_NAME) && | |
647 | !of_property_read_bool(node, "samsung,lcd-wb")) | |
648 | plat_entity = IDX_FIMC; | |
649 | ||
650 | if (plat_entity >= 0) | |
651 | ret = fimc_md_register_platform_entity(fmd, pdev, | |
652 | plat_entity); | |
653 | put_device(&pdev->dev); | |
654 | if (ret < 0) | |
655 | break; | |
656 | } | |
657 | ||
658 | return ret; | |
659 | } | |
e2985a26 | 660 | |
d3953223 SN |
661 | static void fimc_md_unregister_entities(struct fimc_md *fmd) |
662 | { | |
663 | int i; | |
664 | ||
665 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
403dfbec SN |
666 | struct fimc_dev *dev = fmd->fimc[i]; |
667 | if (dev == NULL) | |
d3953223 | 668 | continue; |
403dfbec SN |
669 | v4l2_device_unregister_subdev(&dev->vid_cap.subdev); |
670 | dev->vid_cap.ve.pipe = NULL; | |
d3953223 SN |
671 | fmd->fimc[i] = NULL; |
672 | } | |
4af81310 | 673 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { |
403dfbec SN |
674 | struct fimc_lite *dev = fmd->fimc_lite[i]; |
675 | if (dev == NULL) | |
4af81310 | 676 | continue; |
403dfbec SN |
677 | v4l2_device_unregister_subdev(&dev->subdev); |
678 | dev->ve.pipe = NULL; | |
4af81310 SN |
679 | fmd->fimc_lite[i] = NULL; |
680 | } | |
d3953223 SN |
681 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
682 | if (fmd->csis[i].sd == NULL) | |
683 | continue; | |
684 | v4l2_device_unregister_subdev(fmd->csis[i].sd); | |
685 | fmd->csis[i].sd = NULL; | |
686 | } | |
e41a35cb SN |
687 | |
688 | if (fmd->fimc_is) | |
689 | v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev); | |
690 | ||
7b43a6f3 | 691 | v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n"); |
d3953223 SN |
692 | } |
693 | ||
d3953223 SN |
694 | /** |
695 | * __fimc_md_create_fimc_links - create links to all FIMC entities | |
696 | * @fmd: fimc media device | |
697 | * @source: the source entity to create links to all fimc entities from | |
698 | * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null | |
699 | * @pad: the source entity pad index | |
d0da3c35 | 700 | * @link_mask: bitmask of the fimc devices for which link should be enabled |
d3953223 | 701 | */ |
4af81310 SN |
702 | static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, |
703 | struct media_entity *source, | |
704 | struct v4l2_subdev *sensor, | |
d0da3c35 | 705 | int pad, int link_mask) |
d3953223 | 706 | { |
4c8f0629 | 707 | struct fimc_source_info *si = NULL; |
d3953223 | 708 | struct media_entity *sink; |
4af81310 | 709 | unsigned int flags = 0; |
f998bb7b | 710 | int i, ret = 0; |
d3953223 | 711 | |
f998bb7b SN |
712 | if (sensor) { |
713 | si = v4l2_get_subdev_hostdata(sensor); | |
714 | /* Skip direct FIMC links in the logical FIMC-IS sensor path */ | |
4c8f0629 | 715 | if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) |
f998bb7b SN |
716 | ret = 1; |
717 | } | |
718 | ||
719 | for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) { | |
d3953223 | 720 | if (!fmd->fimc[i]) |
4af81310 | 721 | continue; |
d3953223 SN |
722 | /* |
723 | * Some FIMC variants are not fitted with camera capture | |
724 | * interface. Skip creating a link from sensor for those. | |
725 | */ | |
4af81310 | 726 | if (!fmd->fimc[i]->variant->has_cam_if) |
d3953223 SN |
727 | continue; |
728 | ||
d0da3c35 | 729 | flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0; |
4af81310 | 730 | |
693f5c40 | 731 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
237e0265 | 732 | ret = media_entity_create_link(source, pad, sink, |
88fa8311 | 733 | FIMC_SD_PAD_SINK_CAM, flags); |
d3953223 SN |
734 | if (ret) |
735 | return ret; | |
736 | ||
237e0265 SN |
737 | /* Notify FIMC capture subdev entity */ |
738 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
739 | &source->pads[pad], flags); | |
740 | if (ret) | |
741 | break; | |
742 | ||
542fb082 | 743 | v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n", |
d3953223 | 744 | source->name, flags ? '=' : '-', sink->name); |
d3953223 | 745 | } |
4af81310 SN |
746 | |
747 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
748 | if (!fmd->fimc_lite[i]) | |
749 | continue; | |
750 | ||
4af81310 SN |
751 | sink = &fmd->fimc_lite[i]->subdev.entity; |
752 | ret = media_entity_create_link(source, pad, sink, | |
f998bb7b | 753 | FLITE_SD_PAD_SINK, 0); |
4af81310 SN |
754 | if (ret) |
755 | return ret; | |
756 | ||
757 | /* Notify FIMC-LITE subdev entity */ | |
758 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
f998bb7b | 759 | &source->pads[pad], 0); |
4af81310 SN |
760 | if (ret) |
761 | break; | |
762 | ||
f998bb7b SN |
763 | v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n", |
764 | source->name, sink->name); | |
4af81310 | 765 | } |
d3953223 SN |
766 | return 0; |
767 | } | |
768 | ||
4af81310 SN |
769 | /* Create links from FIMC-LITE source pads to other entities */ |
770 | static int __fimc_md_create_flite_source_links(struct fimc_md *fmd) | |
771 | { | |
772 | struct media_entity *source, *sink; | |
a26860bd | 773 | int i, ret = 0; |
4af81310 SN |
774 | |
775 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
776 | struct fimc_lite *fimc = fmd->fimc_lite[i]; | |
f998bb7b | 777 | |
4af81310 SN |
778 | if (fimc == NULL) |
779 | continue; | |
f998bb7b | 780 | |
4af81310 | 781 | source = &fimc->subdev.entity; |
bc7584b0 | 782 | sink = &fimc->ve.vdev.entity; |
4af81310 | 783 | /* FIMC-LITE's subdev and video node */ |
6319d6a0 | 784 | ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_DMA, |
f998bb7b SN |
785 | sink, 0, 0); |
786 | if (ret) | |
787 | break; | |
788 | /* Link from FIMC-LITE to IS-ISP subdev */ | |
789 | sink = &fmd->fimc_is->isp.subdev.entity; | |
790 | ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_ISP, | |
791 | sink, 0, 0); | |
4af81310 SN |
792 | if (ret) |
793 | break; | |
f998bb7b SN |
794 | } |
795 | ||
796 | return ret; | |
797 | } | |
798 | ||
799 | /* Create FIMC-IS links */ | |
800 | static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd) | |
801 | { | |
34947b8a | 802 | struct fimc_isp *isp = &fmd->fimc_is->isp; |
f998bb7b SN |
803 | struct media_entity *source, *sink; |
804 | int i, ret; | |
805 | ||
34947b8a | 806 | source = &isp->subdev.entity; |
f998bb7b SN |
807 | |
808 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
809 | if (fmd->fimc[i] == NULL) | |
810 | continue; | |
811 | ||
34947b8a | 812 | /* Link from FIMC-IS-ISP subdev to FIMC */ |
f998bb7b SN |
813 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
814 | ret = media_entity_create_link(source, FIMC_ISP_SD_PAD_SRC_FIFO, | |
815 | sink, FIMC_SD_PAD_SINK_FIFO, 0); | |
816 | if (ret) | |
817 | return ret; | |
4af81310 SN |
818 | } |
819 | ||
34947b8a SN |
820 | /* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */ |
821 | sink = &isp->video_capture.ve.vdev.entity; | |
822 | ||
823 | /* Skip this link if the fimc-is-isp video node driver isn't built-in */ | |
824 | if (sink->num_pads == 0) | |
825 | return 0; | |
826 | ||
827 | return media_entity_create_link(source, FIMC_ISP_SD_PAD_SRC_DMA, | |
828 | sink, 0, 0); | |
4af81310 SN |
829 | } |
830 | ||
d3953223 SN |
831 | /** |
832 | * fimc_md_create_links - create default links between registered entities | |
833 | * | |
834 | * Parallel interface sensor entities are connected directly to FIMC capture | |
835 | * entities. The sensors using MIPI CSIS bus are connected through immutable | |
836 | * link with CSI receiver entity specified by mux_id. Any registered CSIS | |
837 | * entity has a link to each registered FIMC capture entity. Enabled links | |
838 | * are created by default between each subsequent registered sensor and | |
839 | * subsequent FIMC capture entity. The number of default active links is | |
840 | * determined by the number of available sensors or FIMC entities, | |
841 | * whichever is less. | |
842 | */ | |
843 | static int fimc_md_create_links(struct fimc_md *fmd) | |
844 | { | |
a8697ec8 | 845 | struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL }; |
d3953223 | 846 | struct v4l2_subdev *sensor, *csis; |
56bc911a | 847 | struct fimc_source_info *pdata; |
237e0265 | 848 | struct media_entity *source, *sink; |
d0da3c35 SN |
849 | int i, pad, fimc_id = 0, ret = 0; |
850 | u32 flags, link_mask = 0; | |
d3953223 SN |
851 | |
852 | for (i = 0; i < fmd->num_sensors; i++) { | |
853 | if (fmd->sensor[i].subdev == NULL) | |
854 | continue; | |
855 | ||
856 | sensor = fmd->sensor[i].subdev; | |
4c8f0629 SN |
857 | pdata = v4l2_get_subdev_hostdata(sensor); |
858 | if (!pdata) | |
d3953223 SN |
859 | continue; |
860 | ||
861 | source = NULL; | |
d3953223 | 862 | |
56bc911a SN |
863 | switch (pdata->sensor_bus_type) { |
864 | case FIMC_BUS_TYPE_MIPI_CSI2: | |
d3953223 SN |
865 | if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES, |
866 | "Wrong CSI channel id: %d\n", pdata->mux_id)) | |
867 | return -EINVAL; | |
868 | ||
869 | csis = fmd->csis[pdata->mux_id].sd; | |
870 | if (WARN(csis == NULL, | |
871 | "MIPI-CSI interface specified " | |
872 | "but s5p-csis module is not loaded!\n")) | |
d12392ec | 873 | return -EINVAL; |
d3953223 | 874 | |
1c9f5bd7 AH |
875 | pad = sensor->entity.num_pads - 1; |
876 | ret = media_entity_create_link(&sensor->entity, pad, | |
d3953223 SN |
877 | &csis->entity, CSIS_PAD_SINK, |
878 | MEDIA_LNK_FL_IMMUTABLE | | |
879 | MEDIA_LNK_FL_ENABLED); | |
880 | if (ret) | |
881 | return ret; | |
882 | ||
969e877c | 883 | v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n", |
d3953223 SN |
884 | sensor->entity.name, csis->entity.name); |
885 | ||
4af81310 | 886 | source = NULL; |
5d33ee92 | 887 | csi_sensors[pdata->mux_id] = sensor; |
d3953223 SN |
888 | break; |
889 | ||
56bc911a | 890 | case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656: |
d3953223 SN |
891 | source = &sensor->entity; |
892 | pad = 0; | |
893 | break; | |
894 | ||
895 | default: | |
896 | v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n", | |
56bc911a | 897 | pdata->sensor_bus_type); |
d3953223 SN |
898 | return -EINVAL; |
899 | } | |
900 | if (source == NULL) | |
901 | continue; | |
902 | ||
d0da3c35 | 903 | link_mask = 1 << fimc_id++; |
4af81310 | 904 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 905 | pad, link_mask); |
4af81310 SN |
906 | } |
907 | ||
a8697ec8 | 908 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
4af81310 SN |
909 | if (fmd->csis[i].sd == NULL) |
910 | continue; | |
f998bb7b | 911 | |
4af81310 SN |
912 | source = &fmd->csis[i].sd->entity; |
913 | pad = CSIS_PAD_SOURCE; | |
5d33ee92 | 914 | sensor = csi_sensors[i]; |
4af81310 | 915 | |
d0da3c35 | 916 | link_mask = 1 << fimc_id++; |
5d33ee92 | 917 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 918 | pad, link_mask); |
d3953223 | 919 | } |
4af81310 | 920 | |
237e0265 SN |
921 | /* Create immutable links between each FIMC's subdev and video node */ |
922 | flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED; | |
923 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
924 | if (!fmd->fimc[i]) | |
925 | continue; | |
f998bb7b | 926 | |
693f5c40 | 927 | source = &fmd->fimc[i]->vid_cap.subdev.entity; |
bc7584b0 | 928 | sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity; |
f998bb7b | 929 | |
237e0265 SN |
930 | ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE, |
931 | sink, 0, flags); | |
932 | if (ret) | |
933 | break; | |
934 | } | |
935 | ||
f998bb7b SN |
936 | ret = __fimc_md_create_flite_source_links(fmd); |
937 | if (ret < 0) | |
938 | return ret; | |
939 | ||
940 | if (fmd->use_isp) | |
941 | ret = __fimc_md_create_fimc_is_links(fmd); | |
942 | ||
943 | return ret; | |
d3953223 SN |
944 | } |
945 | ||
946 | /* | |
056f4f30 | 947 | * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management. |
d3953223 | 948 | */ |
0e23cbbe SN |
949 | static void fimc_md_put_clocks(struct fimc_md *fmd) |
950 | { | |
951 | int i = FIMC_MAX_CAMCLKS; | |
952 | ||
953 | while (--i >= 0) { | |
954 | if (IS_ERR(fmd->camclk[i].clock)) | |
955 | continue; | |
0e23cbbe SN |
956 | clk_put(fmd->camclk[i].clock); |
957 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
958 | } | |
056f4f30 SN |
959 | |
960 | /* Writeback (PIXELASYNCMx) clocks */ | |
961 | for (i = 0; i < FIMC_MAX_WBCLKS; i++) { | |
962 | if (IS_ERR(fmd->wbclk[i])) | |
963 | continue; | |
964 | clk_put(fmd->wbclk[i]); | |
965 | fmd->wbclk[i] = ERR_PTR(-EINVAL); | |
966 | } | |
0e23cbbe SN |
967 | } |
968 | ||
d3953223 SN |
969 | static int fimc_md_get_clocks(struct fimc_md *fmd) |
970 | { | |
49b2f4c5 | 971 | struct device *dev = &fmd->pdev->dev; |
d3953223 SN |
972 | char clk_name[32]; |
973 | struct clk *clock; | |
044c372a | 974 | int i, ret = 0; |
0e23cbbe SN |
975 | |
976 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) | |
977 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
978 | ||
d3953223 SN |
979 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { |
980 | snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i); | |
0e23cbbe SN |
981 | clock = clk_get(dev, clk_name); |
982 | ||
dc3ae328 | 983 | if (IS_ERR(clock)) { |
49b2f4c5 | 984 | dev_err(dev, "Failed to get clock: %s\n", clk_name); |
0e23cbbe SN |
985 | ret = PTR_ERR(clock); |
986 | break; | |
987 | } | |
d3953223 SN |
988 | fmd->camclk[i].clock = clock; |
989 | } | |
0e23cbbe SN |
990 | if (ret) |
991 | fimc_md_put_clocks(fmd); | |
d3953223 | 992 | |
056f4f30 SN |
993 | if (!fmd->use_isp) |
994 | return 0; | |
995 | /* | |
996 | * For now get only PIXELASYNCM1 clock (Writeback B/ISP), | |
997 | * leave PIXELASYNCM0 out for the LCD Writeback driver. | |
998 | */ | |
999 | fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL); | |
1000 | ||
1001 | for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) { | |
1002 | snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i); | |
1003 | clock = clk_get(dev, clk_name); | |
1004 | if (IS_ERR(clock)) { | |
1005 | v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n", | |
1006 | clk_name); | |
1007 | ret = PTR_ERR(clock); | |
1008 | break; | |
1009 | } | |
1010 | fmd->wbclk[i] = clock; | |
1011 | } | |
1012 | if (ret) | |
1013 | fimc_md_put_clocks(fmd); | |
1014 | ||
0e23cbbe | 1015 | return ret; |
d3953223 SN |
1016 | } |
1017 | ||
d3775fa7 | 1018 | static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable) |
d3953223 | 1019 | { |
403dfbec | 1020 | struct exynos_video_entity *ve; |
d3775fa7 | 1021 | struct fimc_pipeline *p; |
403dfbec | 1022 | struct video_device *vdev; |
d3775fa7 | 1023 | int ret; |
d3953223 | 1024 | |
d3775fa7 SN |
1025 | vdev = media_entity_to_video_device(entity); |
1026 | if (vdev->entity.use_count == 0) | |
d3953223 SN |
1027 | return 0; |
1028 | ||
403dfbec | 1029 | ve = vdev_to_exynos_video_entity(vdev); |
d3775fa7 SN |
1030 | p = to_fimc_pipeline(ve->pipe); |
1031 | /* | |
1032 | * Nothing to do if we are disabling the pipeline, some link | |
1033 | * has been disconnected and p->subdevs array is cleared now. | |
1034 | */ | |
1035 | if (!enable && p->subdevs[IDX_SENSOR] == NULL) | |
1036 | return 0; | |
403dfbec | 1037 | |
d3775fa7 SN |
1038 | if (enable) |
1039 | ret = __fimc_pipeline_open(ve->pipe, entity, true); | |
1040 | else | |
1041 | ret = __fimc_pipeline_close(ve->pipe); | |
131b6c61 | 1042 | |
d3775fa7 SN |
1043 | if (ret == 0 && !enable) |
1044 | memset(p->subdevs, 0, sizeof(p->subdevs)); | |
1045 | ||
1046 | return ret; | |
1047 | } | |
1048 | ||
1049 | /* Locking: called with entity->parent->graph_mutex mutex held. */ | |
1050 | static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable) | |
1051 | { | |
1052 | struct media_entity *entity_err = entity; | |
1053 | struct media_entity_graph graph; | |
1054 | int ret; | |
1055 | ||
1056 | /* | |
1057 | * Walk current graph and call the pipeline open/close routine for each | |
1058 | * opened video node that belongs to the graph of entities connected | |
1059 | * through active links. This is needed as we cannot power on/off the | |
1060 | * subdevs in random order. | |
1061 | */ | |
1062 | media_entity_graph_walk_start(&graph, entity); | |
1063 | ||
1064 | while ((entity = media_entity_graph_walk_next(&graph))) { | |
1065 | if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE) | |
1066 | continue; | |
1067 | ||
1068 | ret = __fimc_md_modify_pipeline(entity, enable); | |
1069 | ||
1070 | if (ret < 0) | |
1071 | goto err; | |
1072 | } | |
1073 | ||
1074 | return 0; | |
1075 | err: | |
1076 | media_entity_graph_walk_start(&graph, entity_err); | |
1077 | ||
1078 | while ((entity_err = media_entity_graph_walk_next(&graph))) { | |
1079 | if (media_entity_type(entity_err) != MEDIA_ENT_T_DEVNODE) | |
1080 | continue; | |
1081 | ||
1082 | __fimc_md_modify_pipeline(entity_err, !enable); | |
1083 | ||
1084 | if (entity_err == entity) | |
1085 | break; | |
1086 | } | |
1087 | ||
1088 | return ret; | |
1089 | } | |
1090 | ||
1091 | static int fimc_md_link_notify(struct media_link *link, unsigned int flags, | |
1092 | unsigned int notification) | |
1093 | { | |
1094 | struct media_entity *sink = link->sink->entity; | |
1095 | int ret = 0; | |
1096 | ||
1097 | /* Before link disconnection */ | |
1098 | if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) { | |
1099 | if (!(flags & MEDIA_LNK_FL_ENABLED)) | |
1100 | ret = __fimc_md_modify_pipelines(sink, false); | |
cdf58a6f | 1101 | #if 0 |
d3775fa7 | 1102 | else |
cdf58a6f MCC |
1103 | /* TODO: Link state change validation */ |
1104 | #endif | |
d3775fa7 SN |
1105 | /* After link activation */ |
1106 | } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH && | |
1107 | (link->flags & MEDIA_LNK_FL_ENABLED)) { | |
1108 | ret = __fimc_md_modify_pipelines(sink, true); | |
d3953223 | 1109 | } |
740ad921 | 1110 | |
d3775fa7 | 1111 | return ret ? -EPIPE : 0; |
d3953223 SN |
1112 | } |
1113 | ||
1114 | static ssize_t fimc_md_sysfs_show(struct device *dev, | |
1115 | struct device_attribute *attr, char *buf) | |
1116 | { | |
1117 | struct platform_device *pdev = to_platform_device(dev); | |
1118 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1119 | ||
1120 | if (fmd->user_subdev_api) | |
1121 | return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE); | |
1122 | ||
1123 | return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE); | |
1124 | } | |
1125 | ||
1126 | static ssize_t fimc_md_sysfs_store(struct device *dev, | |
1127 | struct device_attribute *attr, | |
1128 | const char *buf, size_t count) | |
1129 | { | |
1130 | struct platform_device *pdev = to_platform_device(dev); | |
1131 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1132 | bool subdev_api; | |
1133 | int i; | |
1134 | ||
1135 | if (!strcmp(buf, "vid-dev\n")) | |
1136 | subdev_api = false; | |
1137 | else if (!strcmp(buf, "sub-dev\n")) | |
1138 | subdev_api = true; | |
1139 | else | |
1140 | return count; | |
1141 | ||
1142 | fmd->user_subdev_api = subdev_api; | |
1143 | for (i = 0; i < FIMC_MAX_DEVS; i++) | |
1144 | if (fmd->fimc[i]) | |
1145 | fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api; | |
1146 | return count; | |
1147 | } | |
1148 | /* | |
1149 | * This device attribute is to select video pipeline configuration method. | |
1150 | * There are following valid values: | |
1151 | * vid-dev - for V4L2 video node API only, subdevice will be configured | |
1152 | * by the host driver. | |
1153 | * sub-dev - for media controller API, subdevs must be configured in user | |
1154 | * space before starting streaming. | |
1155 | */ | |
1156 | static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO, | |
1157 | fimc_md_sysfs_show, fimc_md_sysfs_store); | |
1158 | ||
4163851f SN |
1159 | static int fimc_md_get_pinctrl(struct fimc_md *fmd) |
1160 | { | |
1161 | struct device *dev = &fmd->pdev->dev; | |
1162 | struct fimc_pinctrl *pctl = &fmd->pinctl; | |
1163 | ||
1164 | pctl->pinctrl = devm_pinctrl_get(dev); | |
1165 | if (IS_ERR(pctl->pinctrl)) | |
1166 | return PTR_ERR(pctl->pinctrl); | |
1167 | ||
1168 | pctl->state_default = pinctrl_lookup_state(pctl->pinctrl, | |
1169 | PINCTRL_STATE_DEFAULT); | |
1170 | if (IS_ERR(pctl->state_default)) | |
1171 | return PTR_ERR(pctl->state_default); | |
1172 | ||
1173 | pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl, | |
1174 | PINCTRL_STATE_IDLE); | |
1175 | return 0; | |
1176 | } | |
1177 | ||
d3f5e0c5 SN |
1178 | static int cam_clk_prepare(struct clk_hw *hw) |
1179 | { | |
1180 | struct cam_clk *camclk = to_cam_clk(hw); | |
1181 | int ret; | |
1182 | ||
1183 | if (camclk->fmd->pmf == NULL) | |
1184 | return -ENODEV; | |
1185 | ||
1186 | ret = pm_runtime_get_sync(camclk->fmd->pmf); | |
1187 | return ret < 0 ? ret : 0; | |
1188 | } | |
1189 | ||
1190 | static void cam_clk_unprepare(struct clk_hw *hw) | |
1191 | { | |
1192 | struct cam_clk *camclk = to_cam_clk(hw); | |
1193 | ||
1194 | if (camclk->fmd->pmf == NULL) | |
1195 | return; | |
1196 | ||
1197 | pm_runtime_put_sync(camclk->fmd->pmf); | |
1198 | } | |
1199 | ||
1200 | static const struct clk_ops cam_clk_ops = { | |
1201 | .prepare = cam_clk_prepare, | |
1202 | .unprepare = cam_clk_unprepare, | |
1203 | }; | |
1204 | ||
1205 | static void fimc_md_unregister_clk_provider(struct fimc_md *fmd) | |
1206 | { | |
1207 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1208 | unsigned int i; | |
1209 | ||
1210 | if (cp->of_node) | |
1211 | of_clk_del_provider(cp->of_node); | |
1212 | ||
1213 | for (i = 0; i < cp->num_clocks; i++) | |
1214 | clk_unregister(cp->clks[i]); | |
1215 | } | |
1216 | ||
1217 | static int fimc_md_register_clk_provider(struct fimc_md *fmd) | |
1218 | { | |
1219 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1220 | struct device *dev = &fmd->pdev->dev; | |
1221 | int i, ret; | |
1222 | ||
1223 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { | |
1224 | struct cam_clk *camclk = &cp->camclk[i]; | |
1225 | struct clk_init_data init; | |
1226 | const char *p_name; | |
1227 | ||
1228 | ret = of_property_read_string_index(dev->of_node, | |
1229 | "clock-output-names", i, &init.name); | |
1230 | if (ret < 0) | |
1231 | break; | |
1232 | ||
1233 | p_name = __clk_get_name(fmd->camclk[i].clock); | |
1234 | ||
1235 | /* It's safe since clk_register() will duplicate the string. */ | |
1236 | init.parent_names = &p_name; | |
1237 | init.num_parents = 1; | |
1238 | init.ops = &cam_clk_ops; | |
1239 | init.flags = CLK_SET_RATE_PARENT; | |
1240 | camclk->hw.init = &init; | |
1241 | camclk->fmd = fmd; | |
1242 | ||
1243 | cp->clks[i] = clk_register(NULL, &camclk->hw); | |
1244 | if (IS_ERR(cp->clks[i])) { | |
1245 | dev_err(dev, "failed to register clock: %s (%ld)\n", | |
1246 | init.name, PTR_ERR(cp->clks[i])); | |
1247 | ret = PTR_ERR(cp->clks[i]); | |
1248 | goto err; | |
1249 | } | |
1250 | cp->num_clocks++; | |
1251 | } | |
1252 | ||
1253 | if (cp->num_clocks == 0) { | |
1254 | dev_warn(dev, "clk provider not registered\n"); | |
1255 | return 0; | |
1256 | } | |
1257 | ||
1258 | cp->clk_data.clks = cp->clks; | |
1259 | cp->clk_data.clk_num = cp->num_clocks; | |
1260 | cp->of_node = dev->of_node; | |
1261 | ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, | |
1262 | &cp->clk_data); | |
1263 | if (ret == 0) | |
1264 | return 0; | |
1265 | err: | |
1266 | fimc_md_unregister_clk_provider(fmd); | |
1267 | return ret; | |
1268 | } | |
d3f5e0c5 | 1269 | |
fa91f105 SN |
1270 | static int subdev_notifier_bound(struct v4l2_async_notifier *notifier, |
1271 | struct v4l2_subdev *subdev, | |
1272 | struct v4l2_async_subdev *asd) | |
1273 | { | |
1274 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1275 | struct fimc_sensor_info *si = NULL; | |
1276 | int i; | |
1277 | ||
1278 | /* Find platform data for this sensor subdev */ | |
1279 | for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++) | |
1280 | if (fmd->sensor[i].asd.match.of.node == subdev->dev->of_node) | |
1281 | si = &fmd->sensor[i]; | |
1282 | ||
1283 | if (si == NULL) | |
1284 | return -EINVAL; | |
1285 | ||
1286 | v4l2_set_subdev_hostdata(subdev, &si->pdata); | |
1287 | ||
1288 | if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) | |
1289 | subdev->grp_id = GRP_ID_FIMC_IS_SENSOR; | |
1290 | else | |
1291 | subdev->grp_id = GRP_ID_SENSOR; | |
1292 | ||
1293 | si->subdev = subdev; | |
1294 | ||
1295 | v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n", | |
1296 | subdev->name, fmd->num_sensors); | |
1297 | ||
1298 | fmd->num_sensors++; | |
1299 | ||
1300 | return 0; | |
1301 | } | |
1302 | ||
1303 | static int subdev_notifier_complete(struct v4l2_async_notifier *notifier) | |
1304 | { | |
1305 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1306 | int ret; | |
1307 | ||
1308 | mutex_lock(&fmd->media_dev.graph_mutex); | |
1309 | ||
1310 | ret = fimc_md_create_links(fmd); | |
1311 | if (ret < 0) | |
1312 | goto unlock; | |
1313 | ||
1314 | ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev); | |
1315 | unlock: | |
1316 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
1317 | return ret; | |
1318 | } | |
1319 | ||
ecd9acbf | 1320 | static int fimc_md_probe(struct platform_device *pdev) |
d3953223 | 1321 | { |
e2985a26 | 1322 | struct device *dev = &pdev->dev; |
d3953223 SN |
1323 | struct v4l2_device *v4l2_dev; |
1324 | struct fimc_md *fmd; | |
1325 | int ret; | |
1326 | ||
e2985a26 | 1327 | fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL); |
d3953223 SN |
1328 | if (!fmd) |
1329 | return -ENOMEM; | |
1330 | ||
1331 | spin_lock_init(&fmd->slock); | |
403dfbec | 1332 | INIT_LIST_HEAD(&fmd->pipelines); |
49b2f4c5 | 1333 | fmd->pdev = pdev; |
d3953223 SN |
1334 | |
1335 | strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC", | |
1336 | sizeof(fmd->media_dev.model)); | |
1337 | fmd->media_dev.link_notify = fimc_md_link_notify; | |
e2985a26 | 1338 | fmd->media_dev.dev = dev; |
d3953223 SN |
1339 | |
1340 | v4l2_dev = &fmd->v4l2_dev; | |
1341 | v4l2_dev->mdev = &fmd->media_dev; | |
e1d72f4d | 1342 | v4l2_dev->notify = fimc_sensor_notify; |
e2985a26 | 1343 | strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name)); |
d3953223 | 1344 | |
e781bbe3 | 1345 | fmd->use_isp = fimc_md_is_isp_available(dev->of_node); |
49b2f4c5 | 1346 | fmd->user_subdev_api = true; |
e781bbe3 | 1347 | |
e2985a26 | 1348 | ret = v4l2_device_register(dev, &fmd->v4l2_dev); |
d3953223 SN |
1349 | if (ret < 0) { |
1350 | v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret); | |
6d91a51a | 1351 | return ret; |
d3953223 | 1352 | } |
d3f5e0c5 | 1353 | |
d3953223 SN |
1354 | ret = media_device_register(&fmd->media_dev); |
1355 | if (ret < 0) { | |
1356 | v4l2_err(v4l2_dev, "Failed to register media device: %d\n", ret); | |
fa91f105 | 1357 | goto err_v4l2_dev; |
d3953223 | 1358 | } |
d3f5e0c5 | 1359 | |
d3953223 SN |
1360 | ret = fimc_md_get_clocks(fmd); |
1361 | if (ret) | |
fa91f105 | 1362 | goto err_md; |
d3953223 | 1363 | |
4163851f SN |
1364 | ret = fimc_md_get_pinctrl(fmd); |
1365 | if (ret < 0) { | |
1366 | if (ret != EPROBE_DEFER) | |
1367 | dev_err(dev, "Failed to get pinctrl: %d\n", ret); | |
fa91f105 | 1368 | goto err_clk; |
4163851f SN |
1369 | } |
1370 | ||
fa91f105 SN |
1371 | platform_set_drvdata(pdev, fmd); |
1372 | ||
1373 | /* Protect the media graph while we're registering entities */ | |
1374 | mutex_lock(&fmd->media_dev.graph_mutex); | |
1375 | ||
49b2f4c5 | 1376 | ret = fimc_md_register_platform_entities(fmd, dev->of_node); |
fa91f105 SN |
1377 | if (ret) { |
1378 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
1379 | goto err_clk; | |
1380 | } | |
d3953223 | 1381 | |
49b2f4c5 SN |
1382 | ret = fimc_md_register_sensor_entities(fmd); |
1383 | if (ret) { | |
1384 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
1385 | goto err_m_ent; | |
5cbf6f16 | 1386 | } |
e2985a26 | 1387 | |
fa91f105 | 1388 | mutex_unlock(&fmd->media_dev.graph_mutex); |
d3953223 SN |
1389 | |
1390 | ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 | 1391 | if (ret) |
fa91f105 SN |
1392 | goto err_m_ent; |
1393 | /* | |
1394 | * FIMC platform devices need to be registered before the sclk_cam | |
1395 | * clocks provider, as one of these devices needs to be activated | |
1396 | * to enable the clock. | |
1397 | */ | |
1398 | ret = fimc_md_register_clk_provider(fmd); | |
1399 | if (ret < 0) { | |
1400 | v4l2_err(v4l2_dev, "clock provider registration failed\n"); | |
1401 | goto err_attr; | |
1402 | } | |
1403 | ||
1404 | if (fmd->num_sensors > 0) { | |
1405 | fmd->subdev_notifier.subdevs = fmd->async_subdevs; | |
1406 | fmd->subdev_notifier.num_subdevs = fmd->num_sensors; | |
1407 | fmd->subdev_notifier.bound = subdev_notifier_bound; | |
1408 | fmd->subdev_notifier.complete = subdev_notifier_complete; | |
1409 | fmd->num_sensors = 0; | |
1410 | ||
1411 | ret = v4l2_async_notifier_register(&fmd->v4l2_dev, | |
1412 | &fmd->subdev_notifier); | |
1413 | if (ret) | |
1414 | goto err_clk_p; | |
1415 | } | |
693f5c40 | 1416 | |
693f5c40 SN |
1417 | return 0; |
1418 | ||
fa91f105 SN |
1419 | err_clk_p: |
1420 | fimc_md_unregister_clk_provider(fmd); | |
1421 | err_attr: | |
1422 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 | 1423 | err_clk: |
d3953223 | 1424 | fimc_md_put_clocks(fmd); |
fa91f105 | 1425 | err_m_ent: |
d3953223 | 1426 | fimc_md_unregister_entities(fmd); |
693f5c40 | 1427 | err_md: |
fa91f105 SN |
1428 | media_device_unregister(&fmd->media_dev); |
1429 | err_v4l2_dev: | |
d3953223 | 1430 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1431 | return ret; |
1432 | } | |
1433 | ||
4c62e976 | 1434 | static int fimc_md_remove(struct platform_device *pdev) |
d3953223 SN |
1435 | { |
1436 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1437 | ||
1438 | if (!fmd) | |
1439 | return 0; | |
b74bee15 | 1440 | |
d3f5e0c5 | 1441 | fimc_md_unregister_clk_provider(fmd); |
fa91f105 SN |
1442 | v4l2_async_notifier_unregister(&fmd->subdev_notifier); |
1443 | ||
b74bee15 | 1444 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1445 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); |
1446 | fimc_md_unregister_entities(fmd); | |
403dfbec | 1447 | fimc_md_pipelines_free(fmd); |
d3953223 SN |
1448 | media_device_unregister(&fmd->media_dev); |
1449 | fimc_md_put_clocks(fmd); | |
fa91f105 | 1450 | |
d3953223 SN |
1451 | return 0; |
1452 | } | |
1453 | ||
c42639d8 | 1454 | static const struct platform_device_id fimc_driver_ids[] __always_unused = { |
e2985a26 SN |
1455 | { .name = "s5p-fimc-md" }, |
1456 | { }, | |
1457 | }; | |
1458 | MODULE_DEVICE_TABLE(platform, fimc_driver_ids); | |
1459 | ||
1460 | static const struct of_device_id fimc_md_of_match[] = { | |
1461 | { .compatible = "samsung,fimc" }, | |
1462 | { }, | |
1463 | }; | |
1464 | MODULE_DEVICE_TABLE(of, fimc_md_of_match); | |
1465 | ||
d3953223 SN |
1466 | static struct platform_driver fimc_md_driver = { |
1467 | .probe = fimc_md_probe, | |
4c62e976 | 1468 | .remove = fimc_md_remove, |
d3953223 | 1469 | .driver = { |
e2985a26 SN |
1470 | .of_match_table = of_match_ptr(fimc_md_of_match), |
1471 | .name = "s5p-fimc-md", | |
d3953223 SN |
1472 | } |
1473 | }; | |
1474 | ||
7e566be2 | 1475 | static int __init fimc_md_init(void) |
d3953223 SN |
1476 | { |
1477 | int ret; | |
ecd9acbf | 1478 | |
d3953223 SN |
1479 | request_module("s5p-csis"); |
1480 | ret = fimc_register_driver(); | |
1481 | if (ret) | |
1482 | return ret; | |
ecd9acbf | 1483 | |
d3953223 SN |
1484 | return platform_driver_register(&fimc_md_driver); |
1485 | } | |
7e566be2 SK |
1486 | |
1487 | static void __exit fimc_md_exit(void) | |
d3953223 SN |
1488 | { |
1489 | platform_driver_unregister(&fimc_md_driver); | |
1490 | fimc_unregister_driver(); | |
1491 | } | |
1492 | ||
1493 | module_init(fimc_md_init); | |
1494 | module_exit(fimc_md_exit); | |
1495 | ||
1496 | MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); | |
1497 | MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver"); | |
1498 | MODULE_LICENSE("GPL"); | |
1499 | MODULE_VERSION("2.0.1"); |