Commit | Line | Data |
---|---|---|
d3953223 SN |
1 | /* |
2 | * S5P/EXYNOS4 SoC series camera host interface media device driver | |
3 | * | |
52917bcb SN |
4 | * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd. |
5 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> | |
d3953223 SN |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published | |
9 | * by the Free Software Foundation, either version 2 of the License, | |
10 | * or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/bug.h> | |
d3f5e0c5 SN |
14 | #include <linux/clk.h> |
15 | #include <linux/clk-provider.h> | |
d3953223 SN |
16 | #include <linux/device.h> |
17 | #include <linux/errno.h> | |
18 | #include <linux/i2c.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/list.h> | |
21 | #include <linux/module.h> | |
e2985a26 SN |
22 | #include <linux/of.h> |
23 | #include <linux/of_platform.h> | |
24 | #include <linux/of_device.h> | |
fd9fdb78 | 25 | #include <linux/of_graph.h> |
d3953223 SN |
26 | #include <linux/platform_device.h> |
27 | #include <linux/pm_runtime.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/slab.h> | |
fa91f105 | 30 | #include <media/v4l2-async.h> |
131b6c61 | 31 | #include <media/v4l2-ctrls.h> |
859969b3 | 32 | #include <media/v4l2-fwnode.h> |
d3953223 | 33 | #include <media/media-device.h> |
d647f0b7 | 34 | #include <media/drv-intf/exynos-fimc.h> |
d3953223 | 35 | |
56fa1a6a | 36 | #include "media-dev.h" |
d3953223 | 37 | #include "fimc-core.h" |
e781bbe3 | 38 | #include "fimc-is.h" |
0f735f52 | 39 | #include "fimc-lite.h" |
d3953223 SN |
40 | #include "mipi-csis.h" |
41 | ||
52917bcb SN |
42 | /* Set up image sensor subdev -> FIMC capture node notifications. */ |
43 | static void __setup_sensor_notification(struct fimc_md *fmd, | |
44 | struct v4l2_subdev *sensor, | |
45 | struct v4l2_subdev *fimc_sd) | |
46 | { | |
47 | struct fimc_source_info *src_inf; | |
48 | struct fimc_sensor_info *md_si; | |
49 | unsigned long flags; | |
50 | ||
51 | src_inf = v4l2_get_subdev_hostdata(sensor); | |
52 | if (!src_inf || WARN_ON(fmd == NULL)) | |
53 | return; | |
54 | ||
55 | md_si = source_to_sensor_info(src_inf); | |
56 | spin_lock_irqsave(&fmd->slock, flags); | |
57 | md_si->host = v4l2_get_subdevdata(fimc_sd); | |
58 | spin_unlock_irqrestore(&fmd->slock, flags); | |
59 | } | |
60 | ||
d3953223 SN |
61 | /** |
62 | * fimc_pipeline_prepare - update pipeline information with subdevice pointers | |
3b060ba0 | 63 | * @p: fimc pipeline |
39bb6df6 | 64 | * @me: media entity terminating the pipeline |
d3953223 SN |
65 | * |
66 | * Caller holds the graph mutex. | |
67 | */ | |
b9ee31e6 | 68 | static void fimc_pipeline_prepare(struct fimc_pipeline *p, |
403dfbec | 69 | struct media_entity *me) |
d3953223 | 70 | { |
52917bcb | 71 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
d3953223 | 72 | struct v4l2_subdev *sd; |
52917bcb | 73 | struct v4l2_subdev *sensor = NULL; |
0f735f52 | 74 | int i; |
d3953223 | 75 | |
0f735f52 SN |
76 | for (i = 0; i < IDX_MAX; i++) |
77 | p->subdevs[i] = NULL; | |
d3953223 | 78 | |
0f735f52 | 79 | while (1) { |
39bb6df6 SN |
80 | struct media_pad *pad = NULL; |
81 | ||
82 | /* Find remote source pad */ | |
83 | for (i = 0; i < me->num_pads; i++) { | |
84 | struct media_pad *spad = &me->pads[i]; | |
85 | if (!(spad->flags & MEDIA_PAD_FL_SINK)) | |
86 | continue; | |
1bddf1b3 | 87 | pad = media_entity_remote_pad(spad); |
39bb6df6 SN |
88 | if (pad) |
89 | break; | |
90 | } | |
0f735f52 | 91 | |
3efdf62c | 92 | if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) |
0f735f52 | 93 | break; |
0f735f52 SN |
94 | sd = media_entity_to_v4l2_subdev(pad->entity); |
95 | ||
96 | switch (sd->grp_id) { | |
588c87be | 97 | case GRP_ID_SENSOR: |
52917bcb SN |
98 | sensor = sd; |
99 | /* fall through */ | |
100 | case GRP_ID_FIMC_IS_SENSOR: | |
0f735f52 SN |
101 | p->subdevs[IDX_SENSOR] = sd; |
102 | break; | |
588c87be | 103 | case GRP_ID_CSIS: |
0f735f52 SN |
104 | p->subdevs[IDX_CSIS] = sd; |
105 | break; | |
588c87be | 106 | case GRP_ID_FLITE: |
4af81310 SN |
107 | p->subdevs[IDX_FLITE] = sd; |
108 | break; | |
588c87be | 109 | case GRP_ID_FIMC: |
52917bcb | 110 | p->subdevs[IDX_FIMC] = sd; |
0f735f52 | 111 | break; |
e781bbe3 SN |
112 | case GRP_ID_FIMC_IS: |
113 | p->subdevs[IDX_IS_ISP] = sd; | |
114 | break; | |
0f735f52 | 115 | default: |
e781bbe3 | 116 | break; |
0f735f52 | 117 | } |
39bb6df6 SN |
118 | me = &sd->entity; |
119 | if (me->num_pads == 1) | |
120 | break; | |
d3953223 | 121 | } |
52917bcb SN |
122 | |
123 | if (sensor && p->subdevs[IDX_FIMC]) | |
124 | __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]); | |
d3953223 SN |
125 | } |
126 | ||
127 | /** | |
128 | * __subdev_set_power - change power state of a single subdev | |
129 | * @sd: subdevice to change power state for | |
130 | * @on: 1 to enable power or 0 to disable | |
131 | * | |
132 | * Return result of s_power subdev operation or -ENXIO if sd argument | |
133 | * is NULL. Return 0 if the subdevice does not implement s_power. | |
134 | */ | |
135 | static int __subdev_set_power(struct v4l2_subdev *sd, int on) | |
136 | { | |
137 | int *use_count; | |
138 | int ret; | |
139 | ||
140 | if (sd == NULL) | |
141 | return -ENXIO; | |
142 | ||
143 | use_count = &sd->entity.use_count; | |
144 | if (on && (*use_count)++ > 0) | |
145 | return 0; | |
146 | else if (!on && (*use_count == 0 || --(*use_count) > 0)) | |
147 | return 0; | |
148 | ret = v4l2_subdev_call(sd, core, s_power, on); | |
149 | ||
150 | return ret != -ENOIOCTLCMD ? ret : 0; | |
151 | } | |
152 | ||
153 | /** | |
154 | * fimc_pipeline_s_power - change power state of all pipeline subdevs | |
3b060ba0 MCC |
155 | * @p: fimc device terminating the pipeline |
156 | * @on: true to power on, false to power off | |
d3953223 | 157 | * |
0f735f52 | 158 | * Needs to be called with the graph mutex held. |
d3953223 | 159 | */ |
f8bca4f5 | 160 | static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on) |
d3953223 | 161 | { |
f8bca4f5 SN |
162 | static const u8 seq[2][IDX_MAX - 1] = { |
163 | { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE }, | |
164 | { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP }, | |
165 | }; | |
166 | int i, ret = 0; | |
d3953223 | 167 | |
0f735f52 | 168 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
169 | return -ENXIO; |
170 | ||
f8bca4f5 SN |
171 | for (i = 0; i < IDX_MAX - 1; i++) { |
172 | unsigned int idx = seq[on][i]; | |
173 | ||
174 | ret = __subdev_set_power(p->subdevs[idx], on); | |
175 | ||
0f735f52 | 176 | |
0f735f52 | 177 | if (ret < 0 && ret != -ENXIO) |
f8bca4f5 | 178 | goto error; |
d3953223 | 179 | } |
0f735f52 | 180 | return 0; |
f8bca4f5 SN |
181 | error: |
182 | for (; i >= 0; i--) { | |
183 | unsigned int idx = seq[on][i]; | |
184 | __subdev_set_power(p->subdevs[idx], !on); | |
185 | } | |
186 | return ret; | |
d3953223 SN |
187 | } |
188 | ||
76775776 JA |
189 | /** |
190 | * __fimc_pipeline_enable - enable power of all pipeline subdevs | |
191 | * and the sensor clock | |
192 | * @ep: video pipeline structure | |
193 | * @fmd: fimc media device | |
194 | * | |
195 | * Called with the graph mutex held. | |
196 | */ | |
197 | static int __fimc_pipeline_enable(struct exynos_media_pipeline *ep, | |
198 | struct fimc_md *fmd) | |
199 | { | |
200 | struct fimc_pipeline *p = to_fimc_pipeline(ep); | |
201 | int ret; | |
202 | ||
203 | /* Enable PXLASYNC clock if this pipeline includes FIMC-IS */ | |
204 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) { | |
205 | ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); | |
206 | if (ret < 0) | |
207 | return ret; | |
208 | } | |
209 | ||
210 | ret = fimc_pipeline_s_power(p, 1); | |
211 | if (!ret) | |
212 | return 0; | |
213 | ||
214 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) | |
215 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
216 | ||
217 | return ret; | |
218 | } | |
219 | ||
d3953223 | 220 | /** |
b9ee31e6 SN |
221 | * __fimc_pipeline_open - update the pipeline information, enable power |
222 | * of all pipeline subdevs and the sensor clock | |
3b060ba0 | 223 | * @ep: fimc device terminating the pipeline |
d3953223 | 224 | * @me: media entity to start graph walk with |
056f4f30 | 225 | * @prepare: true to walk the current pipeline and acquire all subdevs |
d3953223 | 226 | * |
740ad921 | 227 | * Called with the graph mutex held. |
d3953223 | 228 | */ |
403dfbec | 229 | static int __fimc_pipeline_open(struct exynos_media_pipeline *ep, |
056f4f30 | 230 | struct media_entity *me, bool prepare) |
d3953223 | 231 | { |
056f4f30 | 232 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
403dfbec | 233 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 | 234 | struct v4l2_subdev *sd; |
d3953223 | 235 | |
056f4f30 SN |
236 | if (WARN_ON(p == NULL || me == NULL)) |
237 | return -EINVAL; | |
238 | ||
239 | if (prepare) | |
0f735f52 SN |
240 | fimc_pipeline_prepare(p, me); |
241 | ||
056f4f30 | 242 | sd = p->subdevs[IDX_SENSOR]; |
76775776 JA |
243 | if (sd == NULL) { |
244 | pr_warn("%s(): No sensor subdev\n", __func__); | |
245 | /* | |
246 | * Pipeline open cannot fail so as to make it possible | |
247 | * for the user space to configure the pipeline. | |
248 | */ | |
056f4f30 | 249 | return 0; |
76775776 | 250 | } |
0f735f52 | 251 | |
76775776 | 252 | return __fimc_pipeline_enable(ep, fmd); |
d3953223 SN |
253 | } |
254 | ||
d3953223 | 255 | /** |
b9ee31e6 | 256 | * __fimc_pipeline_close - disable the sensor clock and pipeline power |
3b060ba0 | 257 | * @ep: fimc device terminating the pipeline |
d3953223 | 258 | * |
740ad921 | 259 | * Disable power of all subdevs and turn the external sensor clock off. |
d3953223 | 260 | */ |
403dfbec | 261 | static int __fimc_pipeline_close(struct exynos_media_pipeline *ep) |
d3953223 | 262 | { |
403dfbec | 263 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 SN |
264 | struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL; |
265 | struct fimc_md *fmd; | |
36da6fcd | 266 | int ret; |
740ad921 | 267 | |
36da6fcd SN |
268 | if (sd == NULL) { |
269 | pr_warn("%s(): No sensor subdev\n", __func__); | |
270 | return 0; | |
d3953223 | 271 | } |
056f4f30 | 272 | |
36da6fcd | 273 | ret = fimc_pipeline_s_power(p, 0); |
36da6fcd | 274 | |
056f4f30 SN |
275 | fmd = entity_to_fimc_mdev(&sd->entity); |
276 | ||
277 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ | |
278 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) | |
279 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
280 | ||
d3953223 SN |
281 | return ret == -ENXIO ? 0 : ret; |
282 | } | |
283 | ||
d3953223 | 284 | /** |
8d274e7c | 285 | * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs |
3b060ba0 | 286 | * @ep: video pipeline structure |
8d274e7c | 287 | * @on: passed as the s_stream() callback argument |
d3953223 | 288 | */ |
403dfbec | 289 | static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on) |
d3953223 | 290 | { |
8d274e7c SN |
291 | static const u8 seq[2][IDX_MAX] = { |
292 | { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE }, | |
293 | { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP }, | |
294 | }; | |
403dfbec | 295 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
76775776 JA |
296 | struct fimc_md *fmd = entity_to_fimc_mdev(&p->subdevs[IDX_CSIS]->entity); |
297 | enum fimc_subdev_index sd_id; | |
8d274e7c | 298 | int i, ret = 0; |
d3953223 | 299 | |
76775776 JA |
300 | if (p->subdevs[IDX_SENSOR] == NULL) { |
301 | if (!fmd->user_subdev_api) { | |
302 | /* | |
303 | * Sensor must be already discovered if we | |
304 | * aren't in the user_subdev_api mode | |
305 | */ | |
306 | return -ENODEV; | |
307 | } | |
308 | ||
309 | /* Get pipeline sink entity */ | |
310 | if (p->subdevs[IDX_FIMC]) | |
311 | sd_id = IDX_FIMC; | |
312 | else if (p->subdevs[IDX_IS_ISP]) | |
313 | sd_id = IDX_IS_ISP; | |
314 | else if (p->subdevs[IDX_FLITE]) | |
315 | sd_id = IDX_FLITE; | |
316 | else | |
317 | return -ENODEV; | |
318 | ||
319 | /* | |
320 | * Sensor could have been linked between open and STREAMON - | |
321 | * check if this is the case. | |
322 | */ | |
323 | fimc_pipeline_prepare(p, &p->subdevs[sd_id]->entity); | |
324 | ||
325 | if (p->subdevs[IDX_SENSOR] == NULL) | |
326 | return -ENODEV; | |
327 | ||
328 | ret = __fimc_pipeline_enable(ep, fmd); | |
329 | if (ret < 0) | |
330 | return ret; | |
331 | ||
332 | } | |
d3953223 | 333 | |
0f735f52 | 334 | for (i = 0; i < IDX_MAX; i++) { |
8d274e7c | 335 | unsigned int idx = seq[on][i]; |
0f735f52 SN |
336 | |
337 | ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on); | |
338 | ||
339 | if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) | |
8d274e7c | 340 | goto error; |
0f735f52 | 341 | } |
76775776 | 342 | |
0f735f52 | 343 | return 0; |
8d274e7c | 344 | error: |
76775776 | 345 | fimc_pipeline_s_power(p, !on); |
8d274e7c SN |
346 | for (; i >= 0; i--) { |
347 | unsigned int idx = seq[on][i]; | |
348 | v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on); | |
349 | } | |
350 | return ret; | |
d3953223 | 351 | } |
b9ee31e6 SN |
352 | |
353 | /* Media pipeline operations for the FIMC/FIMC-LITE video device driver */ | |
403dfbec | 354 | static const struct exynos_media_pipeline_ops fimc_pipeline_ops = { |
740ad921 SN |
355 | .open = __fimc_pipeline_open, |
356 | .close = __fimc_pipeline_close, | |
357 | .set_stream = __fimc_pipeline_s_stream, | |
b9ee31e6 | 358 | }; |
d3953223 | 359 | |
403dfbec SN |
360 | static struct exynos_media_pipeline *fimc_md_pipeline_create( |
361 | struct fimc_md *fmd) | |
362 | { | |
363 | struct fimc_pipeline *p; | |
364 | ||
365 | p = kzalloc(sizeof(*p), GFP_KERNEL); | |
366 | if (!p) | |
367 | return NULL; | |
368 | ||
369 | list_add_tail(&p->list, &fmd->pipelines); | |
370 | ||
371 | p->ep.ops = &fimc_pipeline_ops; | |
372 | return &p->ep; | |
373 | } | |
374 | ||
375 | static void fimc_md_pipelines_free(struct fimc_md *fmd) | |
376 | { | |
377 | while (!list_empty(&fmd->pipelines)) { | |
378 | struct fimc_pipeline *p; | |
379 | ||
380 | p = list_entry(fmd->pipelines.next, typeof(*p), list); | |
381 | list_del(&p->list); | |
382 | kfree(p); | |
383 | } | |
384 | } | |
385 | ||
2b13f7d4 SN |
386 | /* Parse port node and register as a sub-device any sensor specified there. */ |
387 | static int fimc_md_parse_port_node(struct fimc_md *fmd, | |
388 | struct device_node *port, | |
389 | unsigned int index) | |
390 | { | |
49b2f4c5 | 391 | struct fimc_source_info *pd = &fmd->sensor[index].pdata; |
2b13f7d4 | 392 | struct device_node *rem, *ep, *np; |
859969b3 | 393 | struct v4l2_fwnode_endpoint endpoint; |
234eab84 | 394 | int ret; |
2b13f7d4 SN |
395 | |
396 | /* Assume here a port node can have only one endpoint node. */ | |
397 | ep = of_get_next_child(port, NULL); | |
398 | if (!ep) | |
399 | return 0; | |
400 | ||
859969b3 | 401 | ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &endpoint); |
234eab84 JMC |
402 | if (ret) { |
403 | of_node_put(ep); | |
404 | return ret; | |
405 | } | |
406 | ||
2b2d1d40 CJ |
407 | if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS) { |
408 | of_node_put(ep); | |
2b13f7d4 | 409 | return -EINVAL; |
2b2d1d40 | 410 | } |
2b13f7d4 | 411 | |
f2a575f6 | 412 | pd->mux_id = (endpoint.base.port - 1) & 0x1; |
2b13f7d4 | 413 | |
fd9fdb78 | 414 | rem = of_graph_get_remote_port_parent(ep); |
2b13f7d4 SN |
415 | of_node_put(ep); |
416 | if (rem == NULL) { | |
68d9c47b RH |
417 | v4l2_info(&fmd->v4l2_dev, "Remote device at %pOF not found\n", |
418 | ep); | |
2b13f7d4 SN |
419 | return 0; |
420 | } | |
2b13f7d4 | 421 | |
f2a575f6 | 422 | if (fimc_input_is_parallel(endpoint.base.port)) { |
2b13f7d4 SN |
423 | if (endpoint.bus_type == V4L2_MBUS_PARALLEL) |
424 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601; | |
425 | else | |
426 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656; | |
427 | pd->flags = endpoint.bus.parallel.flags; | |
f2a575f6 | 428 | } else if (fimc_input_is_mipi_csi(endpoint.base.port)) { |
2b13f7d4 SN |
429 | /* |
430 | * MIPI CSI-2: only input mux selection and | |
431 | * the sensor's clock frequency is needed. | |
432 | */ | |
433 | pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2; | |
434 | } else { | |
68d9c47b RH |
435 | v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %pOF\n", |
436 | endpoint.base.port, rem); | |
2b13f7d4 SN |
437 | } |
438 | /* | |
439 | * For FIMC-IS handled sensors, that are placed under i2c-isp device | |
440 | * node, FIMC is connected to the FIMC-IS through its ISP Writeback | |
441 | * input. Sensors are attached to the FIMC-LITE hostdata interface | |
442 | * directly or through MIPI-CSIS, depending on the external media bus | |
443 | * used. This needs to be handled in a more reliable way, not by just | |
444 | * checking parent's node name. | |
445 | */ | |
446 | np = of_get_parent(rem); | |
447 | ||
448 | if (np && !of_node_cmp(np->name, "i2c-isp")) | |
449 | pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK; | |
450 | else | |
451 | pd->fimc_bus_type = pd->sensor_bus_type; | |
452 | ||
7e8da343 KK |
453 | if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor))) { |
454 | of_node_put(rem); | |
fa91f105 | 455 | return -EINVAL; |
7e8da343 | 456 | } |
2b13f7d4 | 457 | |
859969b3 | 458 | fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_FWNODE; |
4e48afec | 459 | fmd->sensor[index].asd.match.fwnode = of_fwnode_handle(rem); |
fa91f105 SN |
460 | fmd->async_subdevs[index] = &fmd->sensor[index].asd; |
461 | ||
462 | fmd->num_sensors++; | |
463 | ||
464 | of_node_put(rem); | |
465 | return 0; | |
2b13f7d4 SN |
466 | } |
467 | ||
468 | /* Register all SoC external sub-devices */ | |
49b2f4c5 | 469 | static int fimc_md_register_sensor_entities(struct fimc_md *fmd) |
2b13f7d4 SN |
470 | { |
471 | struct device_node *parent = fmd->pdev->dev.of_node; | |
472 | struct device_node *node, *ports; | |
473 | int index = 0; | |
474 | int ret; | |
475 | ||
49b2f4c5 SN |
476 | /* |
477 | * Runtime resume one of the FIMC entities to make sure | |
478 | * the sclk_cam clocks are not globally disabled. | |
479 | */ | |
480 | if (!fmd->pmf) | |
481 | return -ENXIO; | |
482 | ||
483 | ret = pm_runtime_get_sync(fmd->pmf); | |
484 | if (ret < 0) | |
485 | return ret; | |
486 | ||
487 | fmd->num_sensors = 0; | |
488 | ||
2b13f7d4 SN |
489 | /* Attach sensors linked to MIPI CSI-2 receivers */ |
490 | for_each_available_child_of_node(parent, node) { | |
491 | struct device_node *port; | |
492 | ||
493 | if (of_node_cmp(node->name, "csis")) | |
494 | continue; | |
495 | /* The csis node can have only port subnode. */ | |
496 | port = of_get_next_child(node, NULL); | |
497 | if (!port) | |
498 | continue; | |
499 | ||
500 | ret = fimc_md_parse_port_node(fmd, port, index); | |
458a3952 AKC |
501 | if (ret < 0) { |
502 | of_node_put(node); | |
49b2f4c5 | 503 | goto rpm_put; |
458a3952 | 504 | } |
2b13f7d4 SN |
505 | index++; |
506 | } | |
507 | ||
508 | /* Attach sensors listed in the parallel-ports node */ | |
509 | ports = of_get_child_by_name(parent, "parallel-ports"); | |
510 | if (!ports) | |
49b2f4c5 | 511 | goto rpm_put; |
2b13f7d4 SN |
512 | |
513 | for_each_child_of_node(ports, node) { | |
514 | ret = fimc_md_parse_port_node(fmd, node, index); | |
458a3952 AKC |
515 | if (ret < 0) { |
516 | of_node_put(node); | |
2b13f7d4 | 517 | break; |
458a3952 | 518 | } |
2b13f7d4 SN |
519 | index++; |
520 | } | |
49b2f4c5 SN |
521 | rpm_put: |
522 | pm_runtime_put(fmd->pmf); | |
523 | return ret; | |
2b13f7d4 SN |
524 | } |
525 | ||
e2985a26 SN |
526 | static int __of_get_csis_id(struct device_node *np) |
527 | { | |
528 | u32 reg = 0; | |
529 | ||
530 | np = of_get_child_by_name(np, "port"); | |
531 | if (!np) | |
532 | return -EINVAL; | |
533 | of_property_read_u32(np, "reg", ®); | |
534 | return reg - FIMC_INPUT_MIPI_CSI2_0; | |
535 | } | |
d3953223 SN |
536 | |
537 | /* | |
7b43a6f3 | 538 | * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration. |
d3953223 | 539 | */ |
7b43a6f3 SN |
540 | static int register_fimc_lite_entity(struct fimc_md *fmd, |
541 | struct fimc_lite *fimc_lite) | |
d3953223 | 542 | { |
8163ec0b | 543 | struct v4l2_subdev *sd; |
403dfbec | 544 | struct exynos_media_pipeline *ep; |
afd7348c | 545 | int ret; |
4af81310 | 546 | |
7b43a6f3 SN |
547 | if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS || |
548 | fmd->fimc_lite[fimc_lite->index])) | |
549 | return -EBUSY; | |
d3953223 | 550 | |
7b43a6f3 SN |
551 | sd = &fimc_lite->subdev; |
552 | sd->grp_id = GRP_ID_FLITE; | |
403dfbec SN |
553 | |
554 | ep = fimc_md_pipeline_create(fmd); | |
555 | if (!ep) | |
556 | return -ENOMEM; | |
557 | ||
558 | v4l2_set_subdev_hostdata(sd, ep); | |
693f5c40 SN |
559 | |
560 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); | |
7b43a6f3 SN |
561 | if (!ret) |
562 | fmd->fimc_lite[fimc_lite->index] = fimc_lite; | |
563 | else | |
564 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n", | |
565 | fimc_lite->index); | |
566 | return ret; | |
d3953223 SN |
567 | } |
568 | ||
7b43a6f3 | 569 | static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc) |
4af81310 | 570 | { |
7b43a6f3 | 571 | struct v4l2_subdev *sd; |
403dfbec | 572 | struct exynos_media_pipeline *ep; |
4af81310 SN |
573 | int ret; |
574 | ||
7b43a6f3 SN |
575 | if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id])) |
576 | return -EBUSY; | |
4af81310 | 577 | |
7b43a6f3 SN |
578 | sd = &fimc->vid_cap.subdev; |
579 | sd->grp_id = GRP_ID_FIMC; | |
403dfbec SN |
580 | |
581 | ep = fimc_md_pipeline_create(fmd); | |
582 | if (!ep) | |
583 | return -ENOMEM; | |
584 | ||
585 | v4l2_set_subdev_hostdata(sd, ep); | |
4af81310 | 586 | |
7b43a6f3 SN |
587 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
588 | if (!ret) { | |
3e20c345 SN |
589 | if (!fmd->pmf && fimc->pdev) |
590 | fmd->pmf = &fimc->pdev->dev; | |
7b43a6f3 SN |
591 | fmd->fimc[fimc->id] = fimc; |
592 | fimc->vid_cap.user_subdev_api = fmd->user_subdev_api; | |
593 | } else { | |
594 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n", | |
595 | fimc->id, ret); | |
4af81310 | 596 | } |
7b43a6f3 | 597 | return ret; |
4af81310 SN |
598 | } |
599 | ||
7b43a6f3 SN |
600 | static int register_csis_entity(struct fimc_md *fmd, |
601 | struct platform_device *pdev, | |
602 | struct v4l2_subdev *sd) | |
d3953223 | 603 | { |
7b43a6f3 | 604 | struct device_node *node = pdev->dev.of_node; |
d3953223 SN |
605 | int id, ret; |
606 | ||
e2985a26 | 607 | id = node ? __of_get_csis_id(node) : max(0, pdev->id); |
7b43a6f3 | 608 | |
e2985a26 SN |
609 | if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES)) |
610 | return -ENOENT; | |
7b43a6f3 | 611 | |
e2985a26 SN |
612 | if (WARN_ON(fmd->csis[id].sd)) |
613 | return -EBUSY; | |
d3953223 | 614 | |
588c87be | 615 | sd->grp_id = GRP_ID_CSIS; |
d3953223 | 616 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
afd7348c SN |
617 | if (!ret) |
618 | fmd->csis[id].sd = sd; | |
619 | else | |
d3953223 | 620 | v4l2_err(&fmd->v4l2_dev, |
7b43a6f3 | 621 | "Failed to register MIPI-CSIS.%d (%d)\n", id, ret); |
d3953223 SN |
622 | return ret; |
623 | } | |
624 | ||
e781bbe3 SN |
625 | static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is) |
626 | { | |
627 | struct v4l2_subdev *sd = &is->isp.subdev; | |
34947b8a | 628 | struct exynos_media_pipeline *ep; |
e781bbe3 SN |
629 | int ret; |
630 | ||
34947b8a SN |
631 | /* Allocate pipeline object for the ISP capture video node. */ |
632 | ep = fimc_md_pipeline_create(fmd); | |
633 | if (!ep) | |
634 | return -ENOMEM; | |
635 | ||
636 | v4l2_set_subdev_hostdata(sd, ep); | |
637 | ||
e781bbe3 SN |
638 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
639 | if (ret) { | |
640 | v4l2_err(&fmd->v4l2_dev, | |
641 | "Failed to register FIMC-ISP (%d)\n", ret); | |
642 | return ret; | |
643 | } | |
644 | ||
645 | fmd->fimc_is = is; | |
646 | return 0; | |
647 | } | |
648 | ||
7b43a6f3 SN |
649 | static int fimc_md_register_platform_entity(struct fimc_md *fmd, |
650 | struct platform_device *pdev, | |
651 | int plat_entity) | |
d3953223 | 652 | { |
7b43a6f3 SN |
653 | struct device *dev = &pdev->dev; |
654 | int ret = -EPROBE_DEFER; | |
655 | void *drvdata; | |
656 | ||
657 | /* Lock to ensure dev->driver won't change. */ | |
658 | device_lock(dev); | |
659 | ||
660 | if (!dev->driver || !try_module_get(dev->driver->owner)) | |
661 | goto dev_unlock; | |
662 | ||
663 | drvdata = dev_get_drvdata(dev); | |
f58c91ce | 664 | /* Some subdev didn't probe successfully id drvdata is NULL */ |
7b43a6f3 SN |
665 | if (drvdata) { |
666 | switch (plat_entity) { | |
667 | case IDX_FIMC: | |
668 | ret = register_fimc_entity(fmd, drvdata); | |
669 | break; | |
670 | case IDX_FLITE: | |
671 | ret = register_fimc_lite_entity(fmd, drvdata); | |
ecd9acbf | 672 | break; |
7b43a6f3 SN |
673 | case IDX_CSIS: |
674 | ret = register_csis_entity(fmd, pdev, drvdata); | |
675 | break; | |
e781bbe3 SN |
676 | case IDX_IS_ISP: |
677 | ret = register_fimc_is_entity(fmd, drvdata); | |
678 | break; | |
7b43a6f3 SN |
679 | default: |
680 | ret = -ENODEV; | |
ecd9acbf SN |
681 | } |
682 | } | |
d3953223 | 683 | |
7b43a6f3 SN |
684 | module_put(dev->driver->owner); |
685 | dev_unlock: | |
686 | device_unlock(dev); | |
687 | if (ret == -EPROBE_DEFER) | |
688 | dev_info(&fmd->pdev->dev, "deferring %s device registration\n", | |
689 | dev_name(dev)); | |
690 | else if (ret < 0) | |
691 | dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n", | |
692 | dev_name(dev), ret); | |
693 | return ret; | |
694 | } | |
695 | ||
e2985a26 | 696 | /* Register FIMC, FIMC-LITE and CSIS media entities */ |
49b2f4c5 SN |
697 | static int fimc_md_register_platform_entities(struct fimc_md *fmd, |
698 | struct device_node *parent) | |
e2985a26 SN |
699 | { |
700 | struct device_node *node; | |
701 | int ret = 0; | |
702 | ||
703 | for_each_available_child_of_node(parent, node) { | |
704 | struct platform_device *pdev; | |
705 | int plat_entity = -1; | |
706 | ||
707 | pdev = of_find_device_by_node(node); | |
708 | if (!pdev) | |
709 | continue; | |
710 | ||
711 | /* If driver of any entity isn't ready try all again later. */ | |
712 | if (!strcmp(node->name, CSIS_OF_NODE_NAME)) | |
713 | plat_entity = IDX_CSIS; | |
e781bbe3 SN |
714 | else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME)) |
715 | plat_entity = IDX_IS_ISP; | |
e2985a26 SN |
716 | else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME)) |
717 | plat_entity = IDX_FLITE; | |
718 | else if (!strcmp(node->name, FIMC_OF_NODE_NAME) && | |
719 | !of_property_read_bool(node, "samsung,lcd-wb")) | |
720 | plat_entity = IDX_FIMC; | |
721 | ||
722 | if (plat_entity >= 0) | |
723 | ret = fimc_md_register_platform_entity(fmd, pdev, | |
724 | plat_entity); | |
725 | put_device(&pdev->dev); | |
458a3952 AKC |
726 | if (ret < 0) { |
727 | of_node_put(node); | |
e2985a26 | 728 | break; |
458a3952 | 729 | } |
e2985a26 SN |
730 | } |
731 | ||
732 | return ret; | |
733 | } | |
e2985a26 | 734 | |
d3953223 SN |
735 | static void fimc_md_unregister_entities(struct fimc_md *fmd) |
736 | { | |
737 | int i; | |
738 | ||
739 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
403dfbec SN |
740 | struct fimc_dev *dev = fmd->fimc[i]; |
741 | if (dev == NULL) | |
d3953223 | 742 | continue; |
403dfbec SN |
743 | v4l2_device_unregister_subdev(&dev->vid_cap.subdev); |
744 | dev->vid_cap.ve.pipe = NULL; | |
d3953223 SN |
745 | fmd->fimc[i] = NULL; |
746 | } | |
4af81310 | 747 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { |
403dfbec SN |
748 | struct fimc_lite *dev = fmd->fimc_lite[i]; |
749 | if (dev == NULL) | |
4af81310 | 750 | continue; |
403dfbec SN |
751 | v4l2_device_unregister_subdev(&dev->subdev); |
752 | dev->ve.pipe = NULL; | |
4af81310 SN |
753 | fmd->fimc_lite[i] = NULL; |
754 | } | |
d3953223 SN |
755 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
756 | if (fmd->csis[i].sd == NULL) | |
757 | continue; | |
758 | v4l2_device_unregister_subdev(fmd->csis[i].sd); | |
759 | fmd->csis[i].sd = NULL; | |
760 | } | |
e41a35cb SN |
761 | |
762 | if (fmd->fimc_is) | |
763 | v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev); | |
764 | ||
7b43a6f3 | 765 | v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n"); |
d3953223 SN |
766 | } |
767 | ||
d3953223 SN |
768 | /** |
769 | * __fimc_md_create_fimc_links - create links to all FIMC entities | |
770 | * @fmd: fimc media device | |
771 | * @source: the source entity to create links to all fimc entities from | |
772 | * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null | |
773 | * @pad: the source entity pad index | |
d0da3c35 | 774 | * @link_mask: bitmask of the fimc devices for which link should be enabled |
d3953223 | 775 | */ |
4af81310 SN |
776 | static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, |
777 | struct media_entity *source, | |
778 | struct v4l2_subdev *sensor, | |
d0da3c35 | 779 | int pad, int link_mask) |
d3953223 | 780 | { |
4c8f0629 | 781 | struct fimc_source_info *si = NULL; |
d3953223 | 782 | struct media_entity *sink; |
4af81310 | 783 | unsigned int flags = 0; |
f998bb7b | 784 | int i, ret = 0; |
d3953223 | 785 | |
f998bb7b SN |
786 | if (sensor) { |
787 | si = v4l2_get_subdev_hostdata(sensor); | |
788 | /* Skip direct FIMC links in the logical FIMC-IS sensor path */ | |
4c8f0629 | 789 | if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) |
f998bb7b SN |
790 | ret = 1; |
791 | } | |
792 | ||
793 | for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) { | |
d3953223 | 794 | if (!fmd->fimc[i]) |
4af81310 | 795 | continue; |
d3953223 SN |
796 | /* |
797 | * Some FIMC variants are not fitted with camera capture | |
798 | * interface. Skip creating a link from sensor for those. | |
799 | */ | |
4af81310 | 800 | if (!fmd->fimc[i]->variant->has_cam_if) |
d3953223 SN |
801 | continue; |
802 | ||
d0da3c35 | 803 | flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0; |
4af81310 | 804 | |
693f5c40 | 805 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
8df00a15 | 806 | ret = media_create_pad_link(source, pad, sink, |
88fa8311 | 807 | FIMC_SD_PAD_SINK_CAM, flags); |
d3953223 SN |
808 | if (ret) |
809 | return ret; | |
810 | ||
237e0265 SN |
811 | /* Notify FIMC capture subdev entity */ |
812 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
813 | &source->pads[pad], flags); | |
814 | if (ret) | |
815 | break; | |
816 | ||
542fb082 | 817 | v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n", |
d3953223 | 818 | source->name, flags ? '=' : '-', sink->name); |
d3953223 | 819 | } |
4af81310 SN |
820 | |
821 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
822 | if (!fmd->fimc_lite[i]) | |
823 | continue; | |
824 | ||
4af81310 | 825 | sink = &fmd->fimc_lite[i]->subdev.entity; |
8df00a15 | 826 | ret = media_create_pad_link(source, pad, sink, |
f998bb7b | 827 | FLITE_SD_PAD_SINK, 0); |
4af81310 SN |
828 | if (ret) |
829 | return ret; | |
830 | ||
831 | /* Notify FIMC-LITE subdev entity */ | |
832 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
f998bb7b | 833 | &source->pads[pad], 0); |
4af81310 SN |
834 | if (ret) |
835 | break; | |
836 | ||
f998bb7b SN |
837 | v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n", |
838 | source->name, sink->name); | |
4af81310 | 839 | } |
d3953223 SN |
840 | return 0; |
841 | } | |
842 | ||
4af81310 SN |
843 | /* Create links from FIMC-LITE source pads to other entities */ |
844 | static int __fimc_md_create_flite_source_links(struct fimc_md *fmd) | |
845 | { | |
846 | struct media_entity *source, *sink; | |
a26860bd | 847 | int i, ret = 0; |
4af81310 SN |
848 | |
849 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
850 | struct fimc_lite *fimc = fmd->fimc_lite[i]; | |
f998bb7b | 851 | |
4af81310 SN |
852 | if (fimc == NULL) |
853 | continue; | |
f998bb7b | 854 | |
4af81310 | 855 | source = &fimc->subdev.entity; |
bc7584b0 | 856 | sink = &fimc->ve.vdev.entity; |
4af81310 | 857 | /* FIMC-LITE's subdev and video node */ |
8df00a15 | 858 | ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_DMA, |
f998bb7b SN |
859 | sink, 0, 0); |
860 | if (ret) | |
861 | break; | |
862 | /* Link from FIMC-LITE to IS-ISP subdev */ | |
863 | sink = &fmd->fimc_is->isp.subdev.entity; | |
8df00a15 | 864 | ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_ISP, |
f998bb7b | 865 | sink, 0, 0); |
4af81310 SN |
866 | if (ret) |
867 | break; | |
f998bb7b SN |
868 | } |
869 | ||
870 | return ret; | |
871 | } | |
872 | ||
873 | /* Create FIMC-IS links */ | |
874 | static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd) | |
875 | { | |
34947b8a | 876 | struct fimc_isp *isp = &fmd->fimc_is->isp; |
f998bb7b SN |
877 | struct media_entity *source, *sink; |
878 | int i, ret; | |
879 | ||
34947b8a | 880 | source = &isp->subdev.entity; |
f998bb7b SN |
881 | |
882 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
883 | if (fmd->fimc[i] == NULL) | |
884 | continue; | |
885 | ||
34947b8a | 886 | /* Link from FIMC-IS-ISP subdev to FIMC */ |
f998bb7b | 887 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
8df00a15 | 888 | ret = media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_FIFO, |
f998bb7b SN |
889 | sink, FIMC_SD_PAD_SINK_FIFO, 0); |
890 | if (ret) | |
891 | return ret; | |
4af81310 SN |
892 | } |
893 | ||
34947b8a SN |
894 | /* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */ |
895 | sink = &isp->video_capture.ve.vdev.entity; | |
896 | ||
897 | /* Skip this link if the fimc-is-isp video node driver isn't built-in */ | |
898 | if (sink->num_pads == 0) | |
899 | return 0; | |
900 | ||
8df00a15 | 901 | return media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_DMA, |
34947b8a | 902 | sink, 0, 0); |
4af81310 SN |
903 | } |
904 | ||
d3953223 SN |
905 | /** |
906 | * fimc_md_create_links - create default links between registered entities | |
3b060ba0 | 907 | * @fmd: fimc media device |
d3953223 SN |
908 | * |
909 | * Parallel interface sensor entities are connected directly to FIMC capture | |
910 | * entities. The sensors using MIPI CSIS bus are connected through immutable | |
911 | * link with CSI receiver entity specified by mux_id. Any registered CSIS | |
912 | * entity has a link to each registered FIMC capture entity. Enabled links | |
913 | * are created by default between each subsequent registered sensor and | |
914 | * subsequent FIMC capture entity. The number of default active links is | |
915 | * determined by the number of available sensors or FIMC entities, | |
916 | * whichever is less. | |
917 | */ | |
918 | static int fimc_md_create_links(struct fimc_md *fmd) | |
919 | { | |
a8697ec8 | 920 | struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL }; |
d3953223 | 921 | struct v4l2_subdev *sensor, *csis; |
56bc911a | 922 | struct fimc_source_info *pdata; |
237e0265 | 923 | struct media_entity *source, *sink; |
d0da3c35 SN |
924 | int i, pad, fimc_id = 0, ret = 0; |
925 | u32 flags, link_mask = 0; | |
d3953223 SN |
926 | |
927 | for (i = 0; i < fmd->num_sensors; i++) { | |
928 | if (fmd->sensor[i].subdev == NULL) | |
929 | continue; | |
930 | ||
931 | sensor = fmd->sensor[i].subdev; | |
4c8f0629 SN |
932 | pdata = v4l2_get_subdev_hostdata(sensor); |
933 | if (!pdata) | |
d3953223 SN |
934 | continue; |
935 | ||
936 | source = NULL; | |
d3953223 | 937 | |
56bc911a SN |
938 | switch (pdata->sensor_bus_type) { |
939 | case FIMC_BUS_TYPE_MIPI_CSI2: | |
d3953223 SN |
940 | if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES, |
941 | "Wrong CSI channel id: %d\n", pdata->mux_id)) | |
942 | return -EINVAL; | |
943 | ||
944 | csis = fmd->csis[pdata->mux_id].sd; | |
945 | if (WARN(csis == NULL, | |
57425dc7 | 946 | "MIPI-CSI interface specified but s5p-csis module is not loaded!\n")) |
d12392ec | 947 | return -EINVAL; |
d3953223 | 948 | |
1c9f5bd7 | 949 | pad = sensor->entity.num_pads - 1; |
8df00a15 | 950 | ret = media_create_pad_link(&sensor->entity, pad, |
d3953223 SN |
951 | &csis->entity, CSIS_PAD_SINK, |
952 | MEDIA_LNK_FL_IMMUTABLE | | |
953 | MEDIA_LNK_FL_ENABLED); | |
954 | if (ret) | |
955 | return ret; | |
956 | ||
969e877c | 957 | v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n", |
d3953223 SN |
958 | sensor->entity.name, csis->entity.name); |
959 | ||
4af81310 | 960 | source = NULL; |
5d33ee92 | 961 | csi_sensors[pdata->mux_id] = sensor; |
d3953223 SN |
962 | break; |
963 | ||
56bc911a | 964 | case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656: |
d3953223 SN |
965 | source = &sensor->entity; |
966 | pad = 0; | |
967 | break; | |
968 | ||
969 | default: | |
970 | v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n", | |
56bc911a | 971 | pdata->sensor_bus_type); |
d3953223 SN |
972 | return -EINVAL; |
973 | } | |
974 | if (source == NULL) | |
975 | continue; | |
976 | ||
d0da3c35 | 977 | link_mask = 1 << fimc_id++; |
4af81310 | 978 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 979 | pad, link_mask); |
4af81310 SN |
980 | } |
981 | ||
a8697ec8 | 982 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
4af81310 SN |
983 | if (fmd->csis[i].sd == NULL) |
984 | continue; | |
f998bb7b | 985 | |
4af81310 SN |
986 | source = &fmd->csis[i].sd->entity; |
987 | pad = CSIS_PAD_SOURCE; | |
5d33ee92 | 988 | sensor = csi_sensors[i]; |
4af81310 | 989 | |
d0da3c35 | 990 | link_mask = 1 << fimc_id++; |
5d33ee92 | 991 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 992 | pad, link_mask); |
d3953223 | 993 | } |
4af81310 | 994 | |
237e0265 SN |
995 | /* Create immutable links between each FIMC's subdev and video node */ |
996 | flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED; | |
997 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
998 | if (!fmd->fimc[i]) | |
999 | continue; | |
f998bb7b | 1000 | |
693f5c40 | 1001 | source = &fmd->fimc[i]->vid_cap.subdev.entity; |
bc7584b0 | 1002 | sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity; |
f998bb7b | 1003 | |
8df00a15 | 1004 | ret = media_create_pad_link(source, FIMC_SD_PAD_SOURCE, |
237e0265 SN |
1005 | sink, 0, flags); |
1006 | if (ret) | |
1007 | break; | |
1008 | } | |
1009 | ||
f998bb7b SN |
1010 | ret = __fimc_md_create_flite_source_links(fmd); |
1011 | if (ret < 0) | |
1012 | return ret; | |
1013 | ||
1014 | if (fmd->use_isp) | |
1015 | ret = __fimc_md_create_fimc_is_links(fmd); | |
1016 | ||
1017 | return ret; | |
d3953223 SN |
1018 | } |
1019 | ||
1020 | /* | |
056f4f30 | 1021 | * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management. |
d3953223 | 1022 | */ |
0e23cbbe SN |
1023 | static void fimc_md_put_clocks(struct fimc_md *fmd) |
1024 | { | |
1025 | int i = FIMC_MAX_CAMCLKS; | |
1026 | ||
1027 | while (--i >= 0) { | |
1028 | if (IS_ERR(fmd->camclk[i].clock)) | |
1029 | continue; | |
0e23cbbe SN |
1030 | clk_put(fmd->camclk[i].clock); |
1031 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
1032 | } | |
056f4f30 SN |
1033 | |
1034 | /* Writeback (PIXELASYNCMx) clocks */ | |
1035 | for (i = 0; i < FIMC_MAX_WBCLKS; i++) { | |
1036 | if (IS_ERR(fmd->wbclk[i])) | |
1037 | continue; | |
1038 | clk_put(fmd->wbclk[i]); | |
1039 | fmd->wbclk[i] = ERR_PTR(-EINVAL); | |
1040 | } | |
0e23cbbe SN |
1041 | } |
1042 | ||
d3953223 SN |
1043 | static int fimc_md_get_clocks(struct fimc_md *fmd) |
1044 | { | |
49b2f4c5 | 1045 | struct device *dev = &fmd->pdev->dev; |
d3953223 SN |
1046 | char clk_name[32]; |
1047 | struct clk *clock; | |
044c372a | 1048 | int i, ret = 0; |
0e23cbbe SN |
1049 | |
1050 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) | |
1051 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
1052 | ||
d3953223 SN |
1053 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { |
1054 | snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i); | |
0e23cbbe SN |
1055 | clock = clk_get(dev, clk_name); |
1056 | ||
dc3ae328 | 1057 | if (IS_ERR(clock)) { |
49b2f4c5 | 1058 | dev_err(dev, "Failed to get clock: %s\n", clk_name); |
0e23cbbe SN |
1059 | ret = PTR_ERR(clock); |
1060 | break; | |
1061 | } | |
d3953223 SN |
1062 | fmd->camclk[i].clock = clock; |
1063 | } | |
0e23cbbe SN |
1064 | if (ret) |
1065 | fimc_md_put_clocks(fmd); | |
d3953223 | 1066 | |
056f4f30 SN |
1067 | if (!fmd->use_isp) |
1068 | return 0; | |
1069 | /* | |
1070 | * For now get only PIXELASYNCM1 clock (Writeback B/ISP), | |
1071 | * leave PIXELASYNCM0 out for the LCD Writeback driver. | |
1072 | */ | |
1073 | fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL); | |
1074 | ||
1075 | for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) { | |
1076 | snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i); | |
1077 | clock = clk_get(dev, clk_name); | |
1078 | if (IS_ERR(clock)) { | |
1079 | v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n", | |
1080 | clk_name); | |
1081 | ret = PTR_ERR(clock); | |
1082 | break; | |
1083 | } | |
1084 | fmd->wbclk[i] = clock; | |
1085 | } | |
1086 | if (ret) | |
1087 | fimc_md_put_clocks(fmd); | |
1088 | ||
0e23cbbe | 1089 | return ret; |
d3953223 SN |
1090 | } |
1091 | ||
d3775fa7 | 1092 | static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable) |
d3953223 | 1093 | { |
403dfbec | 1094 | struct exynos_video_entity *ve; |
d3775fa7 | 1095 | struct fimc_pipeline *p; |
403dfbec | 1096 | struct video_device *vdev; |
d3775fa7 | 1097 | int ret; |
d3953223 | 1098 | |
d3775fa7 SN |
1099 | vdev = media_entity_to_video_device(entity); |
1100 | if (vdev->entity.use_count == 0) | |
d3953223 SN |
1101 | return 0; |
1102 | ||
403dfbec | 1103 | ve = vdev_to_exynos_video_entity(vdev); |
d3775fa7 SN |
1104 | p = to_fimc_pipeline(ve->pipe); |
1105 | /* | |
1106 | * Nothing to do if we are disabling the pipeline, some link | |
1107 | * has been disconnected and p->subdevs array is cleared now. | |
1108 | */ | |
1109 | if (!enable && p->subdevs[IDX_SENSOR] == NULL) | |
1110 | return 0; | |
403dfbec | 1111 | |
d3775fa7 SN |
1112 | if (enable) |
1113 | ret = __fimc_pipeline_open(ve->pipe, entity, true); | |
1114 | else | |
1115 | ret = __fimc_pipeline_close(ve->pipe); | |
131b6c61 | 1116 | |
d3775fa7 SN |
1117 | if (ret == 0 && !enable) |
1118 | memset(p->subdevs, 0, sizeof(p->subdevs)); | |
1119 | ||
1120 | return ret; | |
1121 | } | |
1122 | ||
d10c9894 | 1123 | /* Locking: called with entity->graph_obj.mdev->graph_mutex mutex held. */ |
fd7e5309 | 1124 | static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable, |
20b85227 | 1125 | struct media_graph *graph) |
d3775fa7 SN |
1126 | { |
1127 | struct media_entity *entity_err = entity; | |
d3775fa7 SN |
1128 | int ret; |
1129 | ||
1130 | /* | |
1131 | * Walk current graph and call the pipeline open/close routine for each | |
1132 | * opened video node that belongs to the graph of entities connected | |
1133 | * through active links. This is needed as we cannot power on/off the | |
1134 | * subdevs in random order. | |
1135 | */ | |
20b85227 | 1136 | media_graph_walk_start(graph, entity); |
d3775fa7 | 1137 | |
20b85227 | 1138 | while ((entity = media_graph_walk_next(graph))) { |
45b46879 | 1139 | if (!is_media_entity_v4l2_video_device(entity)) |
d3775fa7 SN |
1140 | continue; |
1141 | ||
1142 | ret = __fimc_md_modify_pipeline(entity, enable); | |
1143 | ||
1144 | if (ret < 0) | |
1145 | goto err; | |
1146 | } | |
1147 | ||
1148 | return 0; | |
d3775fa7 | 1149 | |
fd7e5309 | 1150 | err: |
20b85227 | 1151 | media_graph_walk_start(graph, entity_err); |
fd7e5309 | 1152 | |
20b85227 | 1153 | while ((entity_err = media_graph_walk_next(graph))) { |
45b46879 | 1154 | if (!is_media_entity_v4l2_video_device(entity_err)) |
d3775fa7 SN |
1155 | continue; |
1156 | ||
1157 | __fimc_md_modify_pipeline(entity_err, !enable); | |
1158 | ||
1159 | if (entity_err == entity) | |
1160 | break; | |
1161 | } | |
1162 | ||
1163 | return ret; | |
1164 | } | |
1165 | ||
1166 | static int fimc_md_link_notify(struct media_link *link, unsigned int flags, | |
1167 | unsigned int notification) | |
1168 | { | |
20b85227 | 1169 | struct media_graph *graph = |
fd7e5309 SA |
1170 | &container_of(link->graph_obj.mdev, struct fimc_md, |
1171 | media_dev)->link_setup_graph; | |
d3775fa7 SN |
1172 | struct media_entity *sink = link->sink->entity; |
1173 | int ret = 0; | |
1174 | ||
1175 | /* Before link disconnection */ | |
1176 | if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) { | |
20b85227 | 1177 | ret = media_graph_walk_init(graph, |
fd7e5309 SA |
1178 | link->graph_obj.mdev); |
1179 | if (ret) | |
1180 | return ret; | |
d3775fa7 | 1181 | if (!(flags & MEDIA_LNK_FL_ENABLED)) |
fd7e5309 | 1182 | ret = __fimc_md_modify_pipelines(sink, false, graph); |
cdf58a6f | 1183 | #if 0 |
d3775fa7 | 1184 | else |
cdf58a6f MCC |
1185 | /* TODO: Link state change validation */ |
1186 | #endif | |
d3775fa7 | 1187 | /* After link activation */ |
fd7e5309 SA |
1188 | } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) { |
1189 | if (link->flags & MEDIA_LNK_FL_ENABLED) | |
1190 | ret = __fimc_md_modify_pipelines(sink, true, graph); | |
20b85227 | 1191 | media_graph_walk_cleanup(graph); |
d3953223 | 1192 | } |
740ad921 | 1193 | |
d3775fa7 | 1194 | return ret ? -EPIPE : 0; |
d3953223 SN |
1195 | } |
1196 | ||
68429f50 LP |
1197 | static const struct media_device_ops fimc_md_ops = { |
1198 | .link_notify = fimc_md_link_notify, | |
1199 | }; | |
1200 | ||
d3953223 SN |
1201 | static ssize_t fimc_md_sysfs_show(struct device *dev, |
1202 | struct device_attribute *attr, char *buf) | |
1203 | { | |
1204 | struct platform_device *pdev = to_platform_device(dev); | |
1205 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1206 | ||
1207 | if (fmd->user_subdev_api) | |
1208 | return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE); | |
1209 | ||
1210 | return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE); | |
1211 | } | |
1212 | ||
1213 | static ssize_t fimc_md_sysfs_store(struct device *dev, | |
1214 | struct device_attribute *attr, | |
1215 | const char *buf, size_t count) | |
1216 | { | |
1217 | struct platform_device *pdev = to_platform_device(dev); | |
1218 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1219 | bool subdev_api; | |
1220 | int i; | |
1221 | ||
1222 | if (!strcmp(buf, "vid-dev\n")) | |
1223 | subdev_api = false; | |
1224 | else if (!strcmp(buf, "sub-dev\n")) | |
1225 | subdev_api = true; | |
1226 | else | |
1227 | return count; | |
1228 | ||
1229 | fmd->user_subdev_api = subdev_api; | |
1230 | for (i = 0; i < FIMC_MAX_DEVS; i++) | |
1231 | if (fmd->fimc[i]) | |
1232 | fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api; | |
1233 | return count; | |
1234 | } | |
1235 | /* | |
1236 | * This device attribute is to select video pipeline configuration method. | |
1237 | * There are following valid values: | |
1238 | * vid-dev - for V4L2 video node API only, subdevice will be configured | |
1239 | * by the host driver. | |
1240 | * sub-dev - for media controller API, subdevs must be configured in user | |
1241 | * space before starting streaming. | |
1242 | */ | |
1243 | static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO, | |
1244 | fimc_md_sysfs_show, fimc_md_sysfs_store); | |
1245 | ||
4163851f SN |
1246 | static int fimc_md_get_pinctrl(struct fimc_md *fmd) |
1247 | { | |
1248 | struct device *dev = &fmd->pdev->dev; | |
1249 | struct fimc_pinctrl *pctl = &fmd->pinctl; | |
1250 | ||
1251 | pctl->pinctrl = devm_pinctrl_get(dev); | |
1252 | if (IS_ERR(pctl->pinctrl)) | |
1253 | return PTR_ERR(pctl->pinctrl); | |
1254 | ||
1255 | pctl->state_default = pinctrl_lookup_state(pctl->pinctrl, | |
1256 | PINCTRL_STATE_DEFAULT); | |
1257 | if (IS_ERR(pctl->state_default)) | |
1258 | return PTR_ERR(pctl->state_default); | |
1259 | ||
1260 | pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl, | |
1261 | PINCTRL_STATE_IDLE); | |
1262 | return 0; | |
1263 | } | |
1264 | ||
d3f5e0c5 SN |
1265 | static int cam_clk_prepare(struct clk_hw *hw) |
1266 | { | |
1267 | struct cam_clk *camclk = to_cam_clk(hw); | |
1268 | int ret; | |
1269 | ||
1270 | if (camclk->fmd->pmf == NULL) | |
1271 | return -ENODEV; | |
1272 | ||
1273 | ret = pm_runtime_get_sync(camclk->fmd->pmf); | |
1274 | return ret < 0 ? ret : 0; | |
1275 | } | |
1276 | ||
1277 | static void cam_clk_unprepare(struct clk_hw *hw) | |
1278 | { | |
1279 | struct cam_clk *camclk = to_cam_clk(hw); | |
1280 | ||
1281 | if (camclk->fmd->pmf == NULL) | |
1282 | return; | |
1283 | ||
1284 | pm_runtime_put_sync(camclk->fmd->pmf); | |
1285 | } | |
1286 | ||
1287 | static const struct clk_ops cam_clk_ops = { | |
1288 | .prepare = cam_clk_prepare, | |
1289 | .unprepare = cam_clk_unprepare, | |
1290 | }; | |
1291 | ||
1292 | static void fimc_md_unregister_clk_provider(struct fimc_md *fmd) | |
1293 | { | |
1294 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1295 | unsigned int i; | |
1296 | ||
1297 | if (cp->of_node) | |
1298 | of_clk_del_provider(cp->of_node); | |
1299 | ||
1300 | for (i = 0; i < cp->num_clocks; i++) | |
1301 | clk_unregister(cp->clks[i]); | |
1302 | } | |
1303 | ||
1304 | static int fimc_md_register_clk_provider(struct fimc_md *fmd) | |
1305 | { | |
1306 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1307 | struct device *dev = &fmd->pdev->dev; | |
1308 | int i, ret; | |
1309 | ||
1310 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { | |
1311 | struct cam_clk *camclk = &cp->camclk[i]; | |
1312 | struct clk_init_data init; | |
1313 | const char *p_name; | |
1314 | ||
1315 | ret = of_property_read_string_index(dev->of_node, | |
1316 | "clock-output-names", i, &init.name); | |
1317 | if (ret < 0) | |
1318 | break; | |
1319 | ||
1320 | p_name = __clk_get_name(fmd->camclk[i].clock); | |
1321 | ||
1322 | /* It's safe since clk_register() will duplicate the string. */ | |
1323 | init.parent_names = &p_name; | |
1324 | init.num_parents = 1; | |
1325 | init.ops = &cam_clk_ops; | |
1326 | init.flags = CLK_SET_RATE_PARENT; | |
1327 | camclk->hw.init = &init; | |
1328 | camclk->fmd = fmd; | |
1329 | ||
1330 | cp->clks[i] = clk_register(NULL, &camclk->hw); | |
1331 | if (IS_ERR(cp->clks[i])) { | |
1332 | dev_err(dev, "failed to register clock: %s (%ld)\n", | |
1333 | init.name, PTR_ERR(cp->clks[i])); | |
1334 | ret = PTR_ERR(cp->clks[i]); | |
1335 | goto err; | |
1336 | } | |
1337 | cp->num_clocks++; | |
1338 | } | |
1339 | ||
1340 | if (cp->num_clocks == 0) { | |
1341 | dev_warn(dev, "clk provider not registered\n"); | |
1342 | return 0; | |
1343 | } | |
1344 | ||
1345 | cp->clk_data.clks = cp->clks; | |
1346 | cp->clk_data.clk_num = cp->num_clocks; | |
1347 | cp->of_node = dev->of_node; | |
1348 | ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, | |
1349 | &cp->clk_data); | |
1350 | if (ret == 0) | |
1351 | return 0; | |
1352 | err: | |
1353 | fimc_md_unregister_clk_provider(fmd); | |
1354 | return ret; | |
1355 | } | |
d3f5e0c5 | 1356 | |
fa91f105 SN |
1357 | static int subdev_notifier_bound(struct v4l2_async_notifier *notifier, |
1358 | struct v4l2_subdev *subdev, | |
1359 | struct v4l2_async_subdev *asd) | |
1360 | { | |
1361 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1362 | struct fimc_sensor_info *si = NULL; | |
1363 | int i; | |
1364 | ||
1365 | /* Find platform data for this sensor subdev */ | |
1366 | for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++) | |
4e48afec | 1367 | if (fmd->sensor[i].asd.match.fwnode == |
859969b3 | 1368 | of_fwnode_handle(subdev->dev->of_node)) |
fa91f105 SN |
1369 | si = &fmd->sensor[i]; |
1370 | ||
1371 | if (si == NULL) | |
1372 | return -EINVAL; | |
1373 | ||
1374 | v4l2_set_subdev_hostdata(subdev, &si->pdata); | |
1375 | ||
1376 | if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) | |
1377 | subdev->grp_id = GRP_ID_FIMC_IS_SENSOR; | |
1378 | else | |
1379 | subdev->grp_id = GRP_ID_SENSOR; | |
1380 | ||
1381 | si->subdev = subdev; | |
1382 | ||
1383 | v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n", | |
1384 | subdev->name, fmd->num_sensors); | |
1385 | ||
1386 | fmd->num_sensors++; | |
1387 | ||
1388 | return 0; | |
1389 | } | |
1390 | ||
1391 | static int subdev_notifier_complete(struct v4l2_async_notifier *notifier) | |
1392 | { | |
1393 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1394 | int ret; | |
1395 | ||
1396 | mutex_lock(&fmd->media_dev.graph_mutex); | |
1397 | ||
1398 | ret = fimc_md_create_links(fmd); | |
1399 | if (ret < 0) | |
1400 | goto unlock; | |
1401 | ||
1402 | ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev); | |
1403 | unlock: | |
1404 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
9832e155 JMC |
1405 | if (ret < 0) |
1406 | return ret; | |
1407 | ||
1408 | return media_device_register(&fmd->media_dev); | |
fa91f105 SN |
1409 | } |
1410 | ||
b6ee3f0d LP |
1411 | static const struct v4l2_async_notifier_operations subdev_notifier_ops = { |
1412 | .bound = subdev_notifier_bound, | |
1413 | .complete = subdev_notifier_complete, | |
1414 | }; | |
1415 | ||
ecd9acbf | 1416 | static int fimc_md_probe(struct platform_device *pdev) |
d3953223 | 1417 | { |
e2985a26 | 1418 | struct device *dev = &pdev->dev; |
d3953223 SN |
1419 | struct v4l2_device *v4l2_dev; |
1420 | struct fimc_md *fmd; | |
1421 | int ret; | |
1422 | ||
e2985a26 | 1423 | fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL); |
d3953223 SN |
1424 | if (!fmd) |
1425 | return -ENOMEM; | |
1426 | ||
1427 | spin_lock_init(&fmd->slock); | |
403dfbec | 1428 | INIT_LIST_HEAD(&fmd->pipelines); |
49b2f4c5 | 1429 | fmd->pdev = pdev; |
d3953223 SN |
1430 | |
1431 | strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC", | |
1432 | sizeof(fmd->media_dev.model)); | |
68429f50 | 1433 | fmd->media_dev.ops = &fimc_md_ops; |
e2985a26 | 1434 | fmd->media_dev.dev = dev; |
d3953223 SN |
1435 | |
1436 | v4l2_dev = &fmd->v4l2_dev; | |
1437 | v4l2_dev->mdev = &fmd->media_dev; | |
e1d72f4d | 1438 | v4l2_dev->notify = fimc_sensor_notify; |
e2985a26 | 1439 | strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name)); |
d3953223 | 1440 | |
e781bbe3 | 1441 | fmd->use_isp = fimc_md_is_isp_available(dev->of_node); |
49b2f4c5 | 1442 | fmd->user_subdev_api = true; |
e781bbe3 | 1443 | |
2e7508e4 MCC |
1444 | media_device_init(&fmd->media_dev); |
1445 | ||
e2985a26 | 1446 | ret = v4l2_device_register(dev, &fmd->v4l2_dev); |
d3953223 SN |
1447 | if (ret < 0) { |
1448 | v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret); | |
6d91a51a | 1449 | return ret; |
d3953223 | 1450 | } |
d3f5e0c5 | 1451 | |
d3953223 SN |
1452 | ret = fimc_md_get_clocks(fmd); |
1453 | if (ret) | |
fa91f105 | 1454 | goto err_md; |
d3953223 | 1455 | |
4163851f SN |
1456 | ret = fimc_md_get_pinctrl(fmd); |
1457 | if (ret < 0) { | |
1458 | if (ret != EPROBE_DEFER) | |
1459 | dev_err(dev, "Failed to get pinctrl: %d\n", ret); | |
fa91f105 | 1460 | goto err_clk; |
4163851f SN |
1461 | } |
1462 | ||
fa91f105 SN |
1463 | platform_set_drvdata(pdev, fmd); |
1464 | ||
49b2f4c5 | 1465 | ret = fimc_md_register_platform_entities(fmd, dev->of_node); |
243d4c02 | 1466 | if (ret) |
fa91f105 | 1467 | goto err_clk; |
d3953223 | 1468 | |
49b2f4c5 | 1469 | ret = fimc_md_register_sensor_entities(fmd); |
243d4c02 | 1470 | if (ret) |
49b2f4c5 | 1471 | goto err_m_ent; |
d3953223 SN |
1472 | |
1473 | ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 | 1474 | if (ret) |
fa91f105 SN |
1475 | goto err_m_ent; |
1476 | /* | |
1477 | * FIMC platform devices need to be registered before the sclk_cam | |
1478 | * clocks provider, as one of these devices needs to be activated | |
1479 | * to enable the clock. | |
1480 | */ | |
1481 | ret = fimc_md_register_clk_provider(fmd); | |
1482 | if (ret < 0) { | |
1483 | v4l2_err(v4l2_dev, "clock provider registration failed\n"); | |
1484 | goto err_attr; | |
1485 | } | |
1486 | ||
1487 | if (fmd->num_sensors > 0) { | |
1488 | fmd->subdev_notifier.subdevs = fmd->async_subdevs; | |
1489 | fmd->subdev_notifier.num_subdevs = fmd->num_sensors; | |
b6ee3f0d | 1490 | fmd->subdev_notifier.ops = &subdev_notifier_ops; |
fa91f105 SN |
1491 | fmd->num_sensors = 0; |
1492 | ||
1493 | ret = v4l2_async_notifier_register(&fmd->v4l2_dev, | |
1494 | &fmd->subdev_notifier); | |
1495 | if (ret) | |
1496 | goto err_clk_p; | |
1497 | } | |
693f5c40 | 1498 | |
693f5c40 SN |
1499 | return 0; |
1500 | ||
fa91f105 SN |
1501 | err_clk_p: |
1502 | fimc_md_unregister_clk_provider(fmd); | |
1503 | err_attr: | |
1504 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 | 1505 | err_clk: |
d3953223 | 1506 | fimc_md_put_clocks(fmd); |
fa91f105 | 1507 | err_m_ent: |
d3953223 | 1508 | fimc_md_unregister_entities(fmd); |
693f5c40 | 1509 | err_md: |
9832e155 | 1510 | media_device_cleanup(&fmd->media_dev); |
d3953223 | 1511 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1512 | return ret; |
1513 | } | |
1514 | ||
4c62e976 | 1515 | static int fimc_md_remove(struct platform_device *pdev) |
d3953223 SN |
1516 | { |
1517 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1518 | ||
1519 | if (!fmd) | |
1520 | return 0; | |
b74bee15 | 1521 | |
d3f5e0c5 | 1522 | fimc_md_unregister_clk_provider(fmd); |
fa91f105 SN |
1523 | v4l2_async_notifier_unregister(&fmd->subdev_notifier); |
1524 | ||
b74bee15 | 1525 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1526 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); |
1527 | fimc_md_unregister_entities(fmd); | |
403dfbec | 1528 | fimc_md_pipelines_free(fmd); |
d3953223 | 1529 | media_device_unregister(&fmd->media_dev); |
9832e155 | 1530 | media_device_cleanup(&fmd->media_dev); |
d3953223 | 1531 | fimc_md_put_clocks(fmd); |
fa91f105 | 1532 | |
d3953223 SN |
1533 | return 0; |
1534 | } | |
1535 | ||
c42639d8 | 1536 | static const struct platform_device_id fimc_driver_ids[] __always_unused = { |
e2985a26 SN |
1537 | { .name = "s5p-fimc-md" }, |
1538 | { }, | |
1539 | }; | |
1540 | MODULE_DEVICE_TABLE(platform, fimc_driver_ids); | |
1541 | ||
1542 | static const struct of_device_id fimc_md_of_match[] = { | |
1543 | { .compatible = "samsung,fimc" }, | |
1544 | { }, | |
1545 | }; | |
1546 | MODULE_DEVICE_TABLE(of, fimc_md_of_match); | |
1547 | ||
d3953223 SN |
1548 | static struct platform_driver fimc_md_driver = { |
1549 | .probe = fimc_md_probe, | |
4c62e976 | 1550 | .remove = fimc_md_remove, |
d3953223 | 1551 | .driver = { |
e2985a26 SN |
1552 | .of_match_table = of_match_ptr(fimc_md_of_match), |
1553 | .name = "s5p-fimc-md", | |
d3953223 SN |
1554 | } |
1555 | }; | |
1556 | ||
7e566be2 | 1557 | static int __init fimc_md_init(void) |
d3953223 SN |
1558 | { |
1559 | int ret; | |
ecd9acbf | 1560 | |
d3953223 SN |
1561 | request_module("s5p-csis"); |
1562 | ret = fimc_register_driver(); | |
1563 | if (ret) | |
1564 | return ret; | |
ecd9acbf | 1565 | |
d3953223 SN |
1566 | return platform_driver_register(&fimc_md_driver); |
1567 | } | |
7e566be2 SK |
1568 | |
1569 | static void __exit fimc_md_exit(void) | |
d3953223 SN |
1570 | { |
1571 | platform_driver_unregister(&fimc_md_driver); | |
1572 | fimc_unregister_driver(); | |
1573 | } | |
1574 | ||
1575 | module_init(fimc_md_init); | |
1576 | module_exit(fimc_md_exit); | |
1577 | ||
1578 | MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); | |
1579 | MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver"); | |
1580 | MODULE_LICENSE("GPL"); | |
1581 | MODULE_VERSION("2.0.1"); |