Commit | Line | Data |
---|---|---|
d3953223 SN |
1 | /* |
2 | * S5P/EXYNOS4 SoC series camera host interface media device driver | |
3 | * | |
52917bcb SN |
4 | * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd. |
5 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> | |
d3953223 SN |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published | |
9 | * by the Free Software Foundation, either version 2 of the License, | |
10 | * or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/bug.h> | |
d3f5e0c5 SN |
14 | #include <linux/clk.h> |
15 | #include <linux/clk-provider.h> | |
d3953223 SN |
16 | #include <linux/device.h> |
17 | #include <linux/errno.h> | |
18 | #include <linux/i2c.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/list.h> | |
21 | #include <linux/module.h> | |
e2985a26 SN |
22 | #include <linux/of.h> |
23 | #include <linux/of_platform.h> | |
24 | #include <linux/of_device.h> | |
fd9fdb78 | 25 | #include <linux/of_graph.h> |
d3953223 SN |
26 | #include <linux/platform_device.h> |
27 | #include <linux/pm_runtime.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/slab.h> | |
fa91f105 | 30 | #include <media/v4l2-async.h> |
131b6c61 | 31 | #include <media/v4l2-ctrls.h> |
e2985a26 | 32 | #include <media/v4l2-of.h> |
d3953223 | 33 | #include <media/media-device.h> |
d647f0b7 | 34 | #include <media/drv-intf/exynos-fimc.h> |
d3953223 | 35 | |
56fa1a6a | 36 | #include "media-dev.h" |
d3953223 | 37 | #include "fimc-core.h" |
e781bbe3 | 38 | #include "fimc-is.h" |
0f735f52 | 39 | #include "fimc-lite.h" |
d3953223 SN |
40 | #include "mipi-csis.h" |
41 | ||
52917bcb SN |
42 | /* Set up image sensor subdev -> FIMC capture node notifications. */ |
43 | static void __setup_sensor_notification(struct fimc_md *fmd, | |
44 | struct v4l2_subdev *sensor, | |
45 | struct v4l2_subdev *fimc_sd) | |
46 | { | |
47 | struct fimc_source_info *src_inf; | |
48 | struct fimc_sensor_info *md_si; | |
49 | unsigned long flags; | |
50 | ||
51 | src_inf = v4l2_get_subdev_hostdata(sensor); | |
52 | if (!src_inf || WARN_ON(fmd == NULL)) | |
53 | return; | |
54 | ||
55 | md_si = source_to_sensor_info(src_inf); | |
56 | spin_lock_irqsave(&fmd->slock, flags); | |
57 | md_si->host = v4l2_get_subdevdata(fimc_sd); | |
58 | spin_unlock_irqrestore(&fmd->slock, flags); | |
59 | } | |
60 | ||
d3953223 SN |
61 | /** |
62 | * fimc_pipeline_prepare - update pipeline information with subdevice pointers | |
39bb6df6 | 63 | * @me: media entity terminating the pipeline |
d3953223 SN |
64 | * |
65 | * Caller holds the graph mutex. | |
66 | */ | |
b9ee31e6 | 67 | static void fimc_pipeline_prepare(struct fimc_pipeline *p, |
403dfbec | 68 | struct media_entity *me) |
d3953223 | 69 | { |
52917bcb | 70 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
d3953223 | 71 | struct v4l2_subdev *sd; |
52917bcb | 72 | struct v4l2_subdev *sensor = NULL; |
0f735f52 | 73 | int i; |
d3953223 | 74 | |
0f735f52 SN |
75 | for (i = 0; i < IDX_MAX; i++) |
76 | p->subdevs[i] = NULL; | |
d3953223 | 77 | |
0f735f52 | 78 | while (1) { |
39bb6df6 SN |
79 | struct media_pad *pad = NULL; |
80 | ||
81 | /* Find remote source pad */ | |
82 | for (i = 0; i < me->num_pads; i++) { | |
83 | struct media_pad *spad = &me->pads[i]; | |
84 | if (!(spad->flags & MEDIA_PAD_FL_SINK)) | |
85 | continue; | |
1bddf1b3 | 86 | pad = media_entity_remote_pad(spad); |
39bb6df6 SN |
87 | if (pad) |
88 | break; | |
89 | } | |
0f735f52 | 90 | |
3efdf62c | 91 | if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) |
0f735f52 | 92 | break; |
0f735f52 SN |
93 | sd = media_entity_to_v4l2_subdev(pad->entity); |
94 | ||
95 | switch (sd->grp_id) { | |
588c87be | 96 | case GRP_ID_SENSOR: |
52917bcb SN |
97 | sensor = sd; |
98 | /* fall through */ | |
99 | case GRP_ID_FIMC_IS_SENSOR: | |
0f735f52 SN |
100 | p->subdevs[IDX_SENSOR] = sd; |
101 | break; | |
588c87be | 102 | case GRP_ID_CSIS: |
0f735f52 SN |
103 | p->subdevs[IDX_CSIS] = sd; |
104 | break; | |
588c87be | 105 | case GRP_ID_FLITE: |
4af81310 SN |
106 | p->subdevs[IDX_FLITE] = sd; |
107 | break; | |
588c87be | 108 | case GRP_ID_FIMC: |
52917bcb | 109 | p->subdevs[IDX_FIMC] = sd; |
0f735f52 | 110 | break; |
e781bbe3 SN |
111 | case GRP_ID_FIMC_IS: |
112 | p->subdevs[IDX_IS_ISP] = sd; | |
113 | break; | |
0f735f52 | 114 | default: |
e781bbe3 | 115 | break; |
0f735f52 | 116 | } |
39bb6df6 SN |
117 | me = &sd->entity; |
118 | if (me->num_pads == 1) | |
119 | break; | |
d3953223 | 120 | } |
52917bcb SN |
121 | |
122 | if (sensor && p->subdevs[IDX_FIMC]) | |
123 | __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]); | |
d3953223 SN |
124 | } |
125 | ||
126 | /** | |
127 | * __subdev_set_power - change power state of a single subdev | |
128 | * @sd: subdevice to change power state for | |
129 | * @on: 1 to enable power or 0 to disable | |
130 | * | |
131 | * Return result of s_power subdev operation or -ENXIO if sd argument | |
132 | * is NULL. Return 0 if the subdevice does not implement s_power. | |
133 | */ | |
134 | static int __subdev_set_power(struct v4l2_subdev *sd, int on) | |
135 | { | |
136 | int *use_count; | |
137 | int ret; | |
138 | ||
139 | if (sd == NULL) | |
140 | return -ENXIO; | |
141 | ||
142 | use_count = &sd->entity.use_count; | |
143 | if (on && (*use_count)++ > 0) | |
144 | return 0; | |
145 | else if (!on && (*use_count == 0 || --(*use_count) > 0)) | |
146 | return 0; | |
147 | ret = v4l2_subdev_call(sd, core, s_power, on); | |
148 | ||
149 | return ret != -ENOIOCTLCMD ? ret : 0; | |
150 | } | |
151 | ||
152 | /** | |
153 | * fimc_pipeline_s_power - change power state of all pipeline subdevs | |
154 | * @fimc: fimc device terminating the pipeline | |
0f735f52 | 155 | * @state: true to power on, false to power off |
d3953223 | 156 | * |
0f735f52 | 157 | * Needs to be called with the graph mutex held. |
d3953223 | 158 | */ |
f8bca4f5 | 159 | static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on) |
d3953223 | 160 | { |
f8bca4f5 SN |
161 | static const u8 seq[2][IDX_MAX - 1] = { |
162 | { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE }, | |
163 | { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP }, | |
164 | }; | |
165 | int i, ret = 0; | |
d3953223 | 166 | |
0f735f52 | 167 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
168 | return -ENXIO; |
169 | ||
f8bca4f5 SN |
170 | for (i = 0; i < IDX_MAX - 1; i++) { |
171 | unsigned int idx = seq[on][i]; | |
172 | ||
173 | ret = __subdev_set_power(p->subdevs[idx], on); | |
174 | ||
0f735f52 | 175 | |
0f735f52 | 176 | if (ret < 0 && ret != -ENXIO) |
f8bca4f5 | 177 | goto error; |
d3953223 | 178 | } |
0f735f52 | 179 | return 0; |
f8bca4f5 SN |
180 | error: |
181 | for (; i >= 0; i--) { | |
182 | unsigned int idx = seq[on][i]; | |
183 | __subdev_set_power(p->subdevs[idx], !on); | |
184 | } | |
185 | return ret; | |
d3953223 SN |
186 | } |
187 | ||
188 | /** | |
b9ee31e6 SN |
189 | * __fimc_pipeline_open - update the pipeline information, enable power |
190 | * of all pipeline subdevs and the sensor clock | |
d3953223 | 191 | * @me: media entity to start graph walk with |
056f4f30 | 192 | * @prepare: true to walk the current pipeline and acquire all subdevs |
d3953223 | 193 | * |
740ad921 | 194 | * Called with the graph mutex held. |
d3953223 | 195 | */ |
403dfbec | 196 | static int __fimc_pipeline_open(struct exynos_media_pipeline *ep, |
056f4f30 | 197 | struct media_entity *me, bool prepare) |
d3953223 | 198 | { |
056f4f30 | 199 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
403dfbec | 200 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 | 201 | struct v4l2_subdev *sd; |
d3953223 SN |
202 | int ret; |
203 | ||
056f4f30 SN |
204 | if (WARN_ON(p == NULL || me == NULL)) |
205 | return -EINVAL; | |
206 | ||
207 | if (prepare) | |
0f735f52 SN |
208 | fimc_pipeline_prepare(p, me); |
209 | ||
056f4f30 SN |
210 | sd = p->subdevs[IDX_SENSOR]; |
211 | if (sd == NULL) | |
d3953223 | 212 | return -EINVAL; |
0f735f52 | 213 | |
056f4f30 SN |
214 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ |
215 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) { | |
216 | ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); | |
217 | if (ret < 0) | |
218 | return ret; | |
219 | } | |
fa91f105 | 220 | |
056f4f30 SN |
221 | ret = fimc_pipeline_s_power(p, 1); |
222 | if (!ret) | |
223 | return 0; | |
0f735f52 | 224 | |
056f4f30 SN |
225 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) |
226 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
227 | ||
228 | return ret; | |
d3953223 SN |
229 | } |
230 | ||
d3953223 | 231 | /** |
b9ee31e6 | 232 | * __fimc_pipeline_close - disable the sensor clock and pipeline power |
d3953223 SN |
233 | * @fimc: fimc device terminating the pipeline |
234 | * | |
740ad921 | 235 | * Disable power of all subdevs and turn the external sensor clock off. |
d3953223 | 236 | */ |
403dfbec | 237 | static int __fimc_pipeline_close(struct exynos_media_pipeline *ep) |
d3953223 | 238 | { |
403dfbec | 239 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 SN |
240 | struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL; |
241 | struct fimc_md *fmd; | |
36da6fcd | 242 | int ret; |
740ad921 | 243 | |
36da6fcd SN |
244 | if (sd == NULL) { |
245 | pr_warn("%s(): No sensor subdev\n", __func__); | |
246 | return 0; | |
d3953223 | 247 | } |
056f4f30 | 248 | |
36da6fcd | 249 | ret = fimc_pipeline_s_power(p, 0); |
36da6fcd | 250 | |
056f4f30 SN |
251 | fmd = entity_to_fimc_mdev(&sd->entity); |
252 | ||
253 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ | |
254 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) | |
255 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
256 | ||
d3953223 SN |
257 | return ret == -ENXIO ? 0 : ret; |
258 | } | |
259 | ||
d3953223 | 260 | /** |
8d274e7c | 261 | * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs |
0f735f52 | 262 | * @pipeline: video pipeline structure |
8d274e7c | 263 | * @on: passed as the s_stream() callback argument |
d3953223 | 264 | */ |
403dfbec | 265 | static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on) |
d3953223 | 266 | { |
8d274e7c SN |
267 | static const u8 seq[2][IDX_MAX] = { |
268 | { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE }, | |
269 | { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP }, | |
270 | }; | |
403dfbec | 271 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
8d274e7c | 272 | int i, ret = 0; |
d3953223 | 273 | |
0f735f52 | 274 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
275 | return -ENODEV; |
276 | ||
0f735f52 | 277 | for (i = 0; i < IDX_MAX; i++) { |
8d274e7c | 278 | unsigned int idx = seq[on][i]; |
0f735f52 SN |
279 | |
280 | ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on); | |
281 | ||
282 | if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) | |
8d274e7c | 283 | goto error; |
0f735f52 | 284 | } |
0f735f52 | 285 | return 0; |
8d274e7c SN |
286 | error: |
287 | for (; i >= 0; i--) { | |
288 | unsigned int idx = seq[on][i]; | |
289 | v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on); | |
290 | } | |
291 | return ret; | |
d3953223 | 292 | } |
b9ee31e6 SN |
293 | |
294 | /* Media pipeline operations for the FIMC/FIMC-LITE video device driver */ | |
403dfbec | 295 | static const struct exynos_media_pipeline_ops fimc_pipeline_ops = { |
740ad921 SN |
296 | .open = __fimc_pipeline_open, |
297 | .close = __fimc_pipeline_close, | |
298 | .set_stream = __fimc_pipeline_s_stream, | |
b9ee31e6 | 299 | }; |
d3953223 | 300 | |
403dfbec SN |
301 | static struct exynos_media_pipeline *fimc_md_pipeline_create( |
302 | struct fimc_md *fmd) | |
303 | { | |
304 | struct fimc_pipeline *p; | |
305 | ||
306 | p = kzalloc(sizeof(*p), GFP_KERNEL); | |
307 | if (!p) | |
308 | return NULL; | |
309 | ||
310 | list_add_tail(&p->list, &fmd->pipelines); | |
311 | ||
312 | p->ep.ops = &fimc_pipeline_ops; | |
313 | return &p->ep; | |
314 | } | |
315 | ||
316 | static void fimc_md_pipelines_free(struct fimc_md *fmd) | |
317 | { | |
318 | while (!list_empty(&fmd->pipelines)) { | |
319 | struct fimc_pipeline *p; | |
320 | ||
321 | p = list_entry(fmd->pipelines.next, typeof(*p), list); | |
322 | list_del(&p->list); | |
323 | kfree(p); | |
324 | } | |
325 | } | |
326 | ||
2b13f7d4 SN |
327 | /* Parse port node and register as a sub-device any sensor specified there. */ |
328 | static int fimc_md_parse_port_node(struct fimc_md *fmd, | |
329 | struct device_node *port, | |
330 | unsigned int index) | |
331 | { | |
49b2f4c5 | 332 | struct fimc_source_info *pd = &fmd->sensor[index].pdata; |
2b13f7d4 | 333 | struct device_node *rem, *ep, *np; |
2b13f7d4 | 334 | struct v4l2_of_endpoint endpoint; |
234eab84 | 335 | int ret; |
2b13f7d4 SN |
336 | |
337 | /* Assume here a port node can have only one endpoint node. */ | |
338 | ep = of_get_next_child(port, NULL); | |
339 | if (!ep) | |
340 | return 0; | |
341 | ||
234eab84 JMC |
342 | ret = v4l2_of_parse_endpoint(ep, &endpoint); |
343 | if (ret) { | |
344 | of_node_put(ep); | |
345 | return ret; | |
346 | } | |
347 | ||
f2a575f6 | 348 | if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS) |
2b13f7d4 SN |
349 | return -EINVAL; |
350 | ||
f2a575f6 | 351 | pd->mux_id = (endpoint.base.port - 1) & 0x1; |
2b13f7d4 | 352 | |
fd9fdb78 | 353 | rem = of_graph_get_remote_port_parent(ep); |
2b13f7d4 SN |
354 | of_node_put(ep); |
355 | if (rem == NULL) { | |
356 | v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n", | |
357 | ep->full_name); | |
358 | return 0; | |
359 | } | |
2b13f7d4 | 360 | |
f2a575f6 | 361 | if (fimc_input_is_parallel(endpoint.base.port)) { |
2b13f7d4 SN |
362 | if (endpoint.bus_type == V4L2_MBUS_PARALLEL) |
363 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601; | |
364 | else | |
365 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656; | |
366 | pd->flags = endpoint.bus.parallel.flags; | |
f2a575f6 | 367 | } else if (fimc_input_is_mipi_csi(endpoint.base.port)) { |
2b13f7d4 SN |
368 | /* |
369 | * MIPI CSI-2: only input mux selection and | |
370 | * the sensor's clock frequency is needed. | |
371 | */ | |
372 | pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2; | |
373 | } else { | |
374 | v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n", | |
f2a575f6 | 375 | endpoint.base.port, rem->full_name); |
2b13f7d4 SN |
376 | } |
377 | /* | |
378 | * For FIMC-IS handled sensors, that are placed under i2c-isp device | |
379 | * node, FIMC is connected to the FIMC-IS through its ISP Writeback | |
380 | * input. Sensors are attached to the FIMC-LITE hostdata interface | |
381 | * directly or through MIPI-CSIS, depending on the external media bus | |
382 | * used. This needs to be handled in a more reliable way, not by just | |
383 | * checking parent's node name. | |
384 | */ | |
385 | np = of_get_parent(rem); | |
386 | ||
387 | if (np && !of_node_cmp(np->name, "i2c-isp")) | |
388 | pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK; | |
389 | else | |
390 | pd->fimc_bus_type = pd->sensor_bus_type; | |
391 | ||
fa91f105 SN |
392 | if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor))) |
393 | return -EINVAL; | |
2b13f7d4 | 394 | |
fa91f105 SN |
395 | fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF; |
396 | fmd->sensor[index].asd.match.of.node = rem; | |
397 | fmd->async_subdevs[index] = &fmd->sensor[index].asd; | |
398 | ||
399 | fmd->num_sensors++; | |
400 | ||
401 | of_node_put(rem); | |
402 | return 0; | |
2b13f7d4 SN |
403 | } |
404 | ||
405 | /* Register all SoC external sub-devices */ | |
49b2f4c5 | 406 | static int fimc_md_register_sensor_entities(struct fimc_md *fmd) |
2b13f7d4 SN |
407 | { |
408 | struct device_node *parent = fmd->pdev->dev.of_node; | |
409 | struct device_node *node, *ports; | |
410 | int index = 0; | |
411 | int ret; | |
412 | ||
49b2f4c5 SN |
413 | /* |
414 | * Runtime resume one of the FIMC entities to make sure | |
415 | * the sclk_cam clocks are not globally disabled. | |
416 | */ | |
417 | if (!fmd->pmf) | |
418 | return -ENXIO; | |
419 | ||
420 | ret = pm_runtime_get_sync(fmd->pmf); | |
421 | if (ret < 0) | |
422 | return ret; | |
423 | ||
424 | fmd->num_sensors = 0; | |
425 | ||
2b13f7d4 SN |
426 | /* Attach sensors linked to MIPI CSI-2 receivers */ |
427 | for_each_available_child_of_node(parent, node) { | |
428 | struct device_node *port; | |
429 | ||
430 | if (of_node_cmp(node->name, "csis")) | |
431 | continue; | |
432 | /* The csis node can have only port subnode. */ | |
433 | port = of_get_next_child(node, NULL); | |
434 | if (!port) | |
435 | continue; | |
436 | ||
437 | ret = fimc_md_parse_port_node(fmd, port, index); | |
438 | if (ret < 0) | |
49b2f4c5 | 439 | goto rpm_put; |
2b13f7d4 SN |
440 | index++; |
441 | } | |
442 | ||
443 | /* Attach sensors listed in the parallel-ports node */ | |
444 | ports = of_get_child_by_name(parent, "parallel-ports"); | |
445 | if (!ports) | |
49b2f4c5 | 446 | goto rpm_put; |
2b13f7d4 SN |
447 | |
448 | for_each_child_of_node(ports, node) { | |
449 | ret = fimc_md_parse_port_node(fmd, node, index); | |
450 | if (ret < 0) | |
451 | break; | |
452 | index++; | |
453 | } | |
49b2f4c5 SN |
454 | rpm_put: |
455 | pm_runtime_put(fmd->pmf); | |
456 | return ret; | |
2b13f7d4 SN |
457 | } |
458 | ||
e2985a26 SN |
459 | static int __of_get_csis_id(struct device_node *np) |
460 | { | |
461 | u32 reg = 0; | |
462 | ||
463 | np = of_get_child_by_name(np, "port"); | |
464 | if (!np) | |
465 | return -EINVAL; | |
466 | of_property_read_u32(np, "reg", ®); | |
467 | return reg - FIMC_INPUT_MIPI_CSI2_0; | |
468 | } | |
d3953223 SN |
469 | |
470 | /* | |
7b43a6f3 | 471 | * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration. |
d3953223 | 472 | */ |
7b43a6f3 SN |
473 | static int register_fimc_lite_entity(struct fimc_md *fmd, |
474 | struct fimc_lite *fimc_lite) | |
d3953223 | 475 | { |
8163ec0b | 476 | struct v4l2_subdev *sd; |
403dfbec | 477 | struct exynos_media_pipeline *ep; |
afd7348c | 478 | int ret; |
4af81310 | 479 | |
7b43a6f3 SN |
480 | if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS || |
481 | fmd->fimc_lite[fimc_lite->index])) | |
482 | return -EBUSY; | |
d3953223 | 483 | |
7b43a6f3 SN |
484 | sd = &fimc_lite->subdev; |
485 | sd->grp_id = GRP_ID_FLITE; | |
403dfbec SN |
486 | |
487 | ep = fimc_md_pipeline_create(fmd); | |
488 | if (!ep) | |
489 | return -ENOMEM; | |
490 | ||
491 | v4l2_set_subdev_hostdata(sd, ep); | |
693f5c40 SN |
492 | |
493 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); | |
7b43a6f3 SN |
494 | if (!ret) |
495 | fmd->fimc_lite[fimc_lite->index] = fimc_lite; | |
496 | else | |
497 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n", | |
498 | fimc_lite->index); | |
499 | return ret; | |
d3953223 SN |
500 | } |
501 | ||
7b43a6f3 | 502 | static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc) |
4af81310 | 503 | { |
7b43a6f3 | 504 | struct v4l2_subdev *sd; |
403dfbec | 505 | struct exynos_media_pipeline *ep; |
4af81310 SN |
506 | int ret; |
507 | ||
7b43a6f3 SN |
508 | if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id])) |
509 | return -EBUSY; | |
4af81310 | 510 | |
7b43a6f3 SN |
511 | sd = &fimc->vid_cap.subdev; |
512 | sd->grp_id = GRP_ID_FIMC; | |
403dfbec SN |
513 | |
514 | ep = fimc_md_pipeline_create(fmd); | |
515 | if (!ep) | |
516 | return -ENOMEM; | |
517 | ||
518 | v4l2_set_subdev_hostdata(sd, ep); | |
4af81310 | 519 | |
7b43a6f3 SN |
520 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
521 | if (!ret) { | |
3e20c345 SN |
522 | if (!fmd->pmf && fimc->pdev) |
523 | fmd->pmf = &fimc->pdev->dev; | |
7b43a6f3 SN |
524 | fmd->fimc[fimc->id] = fimc; |
525 | fimc->vid_cap.user_subdev_api = fmd->user_subdev_api; | |
526 | } else { | |
527 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n", | |
528 | fimc->id, ret); | |
4af81310 | 529 | } |
7b43a6f3 | 530 | return ret; |
4af81310 SN |
531 | } |
532 | ||
7b43a6f3 SN |
533 | static int register_csis_entity(struct fimc_md *fmd, |
534 | struct platform_device *pdev, | |
535 | struct v4l2_subdev *sd) | |
d3953223 | 536 | { |
7b43a6f3 | 537 | struct device_node *node = pdev->dev.of_node; |
d3953223 SN |
538 | int id, ret; |
539 | ||
e2985a26 | 540 | id = node ? __of_get_csis_id(node) : max(0, pdev->id); |
7b43a6f3 | 541 | |
e2985a26 SN |
542 | if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES)) |
543 | return -ENOENT; | |
7b43a6f3 | 544 | |
e2985a26 SN |
545 | if (WARN_ON(fmd->csis[id].sd)) |
546 | return -EBUSY; | |
d3953223 | 547 | |
588c87be | 548 | sd->grp_id = GRP_ID_CSIS; |
d3953223 | 549 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
afd7348c SN |
550 | if (!ret) |
551 | fmd->csis[id].sd = sd; | |
552 | else | |
d3953223 | 553 | v4l2_err(&fmd->v4l2_dev, |
7b43a6f3 | 554 | "Failed to register MIPI-CSIS.%d (%d)\n", id, ret); |
d3953223 SN |
555 | return ret; |
556 | } | |
557 | ||
e781bbe3 SN |
558 | static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is) |
559 | { | |
560 | struct v4l2_subdev *sd = &is->isp.subdev; | |
34947b8a | 561 | struct exynos_media_pipeline *ep; |
e781bbe3 SN |
562 | int ret; |
563 | ||
34947b8a SN |
564 | /* Allocate pipeline object for the ISP capture video node. */ |
565 | ep = fimc_md_pipeline_create(fmd); | |
566 | if (!ep) | |
567 | return -ENOMEM; | |
568 | ||
569 | v4l2_set_subdev_hostdata(sd, ep); | |
570 | ||
e781bbe3 SN |
571 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
572 | if (ret) { | |
573 | v4l2_err(&fmd->v4l2_dev, | |
574 | "Failed to register FIMC-ISP (%d)\n", ret); | |
575 | return ret; | |
576 | } | |
577 | ||
578 | fmd->fimc_is = is; | |
579 | return 0; | |
580 | } | |
581 | ||
7b43a6f3 SN |
582 | static int fimc_md_register_platform_entity(struct fimc_md *fmd, |
583 | struct platform_device *pdev, | |
584 | int plat_entity) | |
d3953223 | 585 | { |
7b43a6f3 SN |
586 | struct device *dev = &pdev->dev; |
587 | int ret = -EPROBE_DEFER; | |
588 | void *drvdata; | |
589 | ||
590 | /* Lock to ensure dev->driver won't change. */ | |
591 | device_lock(dev); | |
592 | ||
593 | if (!dev->driver || !try_module_get(dev->driver->owner)) | |
594 | goto dev_unlock; | |
595 | ||
596 | drvdata = dev_get_drvdata(dev); | |
f58c91ce | 597 | /* Some subdev didn't probe successfully id drvdata is NULL */ |
7b43a6f3 SN |
598 | if (drvdata) { |
599 | switch (plat_entity) { | |
600 | case IDX_FIMC: | |
601 | ret = register_fimc_entity(fmd, drvdata); | |
602 | break; | |
603 | case IDX_FLITE: | |
604 | ret = register_fimc_lite_entity(fmd, drvdata); | |
ecd9acbf | 605 | break; |
7b43a6f3 SN |
606 | case IDX_CSIS: |
607 | ret = register_csis_entity(fmd, pdev, drvdata); | |
608 | break; | |
e781bbe3 SN |
609 | case IDX_IS_ISP: |
610 | ret = register_fimc_is_entity(fmd, drvdata); | |
611 | break; | |
7b43a6f3 SN |
612 | default: |
613 | ret = -ENODEV; | |
ecd9acbf SN |
614 | } |
615 | } | |
d3953223 | 616 | |
7b43a6f3 SN |
617 | module_put(dev->driver->owner); |
618 | dev_unlock: | |
619 | device_unlock(dev); | |
620 | if (ret == -EPROBE_DEFER) | |
621 | dev_info(&fmd->pdev->dev, "deferring %s device registration\n", | |
622 | dev_name(dev)); | |
623 | else if (ret < 0) | |
624 | dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n", | |
625 | dev_name(dev), ret); | |
626 | return ret; | |
627 | } | |
628 | ||
e2985a26 | 629 | /* Register FIMC, FIMC-LITE and CSIS media entities */ |
49b2f4c5 SN |
630 | static int fimc_md_register_platform_entities(struct fimc_md *fmd, |
631 | struct device_node *parent) | |
e2985a26 SN |
632 | { |
633 | struct device_node *node; | |
634 | int ret = 0; | |
635 | ||
636 | for_each_available_child_of_node(parent, node) { | |
637 | struct platform_device *pdev; | |
638 | int plat_entity = -1; | |
639 | ||
640 | pdev = of_find_device_by_node(node); | |
641 | if (!pdev) | |
642 | continue; | |
643 | ||
644 | /* If driver of any entity isn't ready try all again later. */ | |
645 | if (!strcmp(node->name, CSIS_OF_NODE_NAME)) | |
646 | plat_entity = IDX_CSIS; | |
e781bbe3 SN |
647 | else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME)) |
648 | plat_entity = IDX_IS_ISP; | |
e2985a26 SN |
649 | else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME)) |
650 | plat_entity = IDX_FLITE; | |
651 | else if (!strcmp(node->name, FIMC_OF_NODE_NAME) && | |
652 | !of_property_read_bool(node, "samsung,lcd-wb")) | |
653 | plat_entity = IDX_FIMC; | |
654 | ||
655 | if (plat_entity >= 0) | |
656 | ret = fimc_md_register_platform_entity(fmd, pdev, | |
657 | plat_entity); | |
658 | put_device(&pdev->dev); | |
659 | if (ret < 0) | |
660 | break; | |
661 | } | |
662 | ||
663 | return ret; | |
664 | } | |
e2985a26 | 665 | |
d3953223 SN |
666 | static void fimc_md_unregister_entities(struct fimc_md *fmd) |
667 | { | |
668 | int i; | |
669 | ||
670 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
403dfbec SN |
671 | struct fimc_dev *dev = fmd->fimc[i]; |
672 | if (dev == NULL) | |
d3953223 | 673 | continue; |
403dfbec SN |
674 | v4l2_device_unregister_subdev(&dev->vid_cap.subdev); |
675 | dev->vid_cap.ve.pipe = NULL; | |
d3953223 SN |
676 | fmd->fimc[i] = NULL; |
677 | } | |
4af81310 | 678 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { |
403dfbec SN |
679 | struct fimc_lite *dev = fmd->fimc_lite[i]; |
680 | if (dev == NULL) | |
4af81310 | 681 | continue; |
403dfbec SN |
682 | v4l2_device_unregister_subdev(&dev->subdev); |
683 | dev->ve.pipe = NULL; | |
4af81310 SN |
684 | fmd->fimc_lite[i] = NULL; |
685 | } | |
d3953223 SN |
686 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
687 | if (fmd->csis[i].sd == NULL) | |
688 | continue; | |
689 | v4l2_device_unregister_subdev(fmd->csis[i].sd); | |
690 | fmd->csis[i].sd = NULL; | |
691 | } | |
e41a35cb SN |
692 | |
693 | if (fmd->fimc_is) | |
694 | v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev); | |
695 | ||
7b43a6f3 | 696 | v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n"); |
d3953223 SN |
697 | } |
698 | ||
d3953223 SN |
699 | /** |
700 | * __fimc_md_create_fimc_links - create links to all FIMC entities | |
701 | * @fmd: fimc media device | |
702 | * @source: the source entity to create links to all fimc entities from | |
703 | * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null | |
704 | * @pad: the source entity pad index | |
d0da3c35 | 705 | * @link_mask: bitmask of the fimc devices for which link should be enabled |
d3953223 | 706 | */ |
4af81310 SN |
707 | static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, |
708 | struct media_entity *source, | |
709 | struct v4l2_subdev *sensor, | |
d0da3c35 | 710 | int pad, int link_mask) |
d3953223 | 711 | { |
4c8f0629 | 712 | struct fimc_source_info *si = NULL; |
d3953223 | 713 | struct media_entity *sink; |
4af81310 | 714 | unsigned int flags = 0; |
f998bb7b | 715 | int i, ret = 0; |
d3953223 | 716 | |
f998bb7b SN |
717 | if (sensor) { |
718 | si = v4l2_get_subdev_hostdata(sensor); | |
719 | /* Skip direct FIMC links in the logical FIMC-IS sensor path */ | |
4c8f0629 | 720 | if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) |
f998bb7b SN |
721 | ret = 1; |
722 | } | |
723 | ||
724 | for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) { | |
d3953223 | 725 | if (!fmd->fimc[i]) |
4af81310 | 726 | continue; |
d3953223 SN |
727 | /* |
728 | * Some FIMC variants are not fitted with camera capture | |
729 | * interface. Skip creating a link from sensor for those. | |
730 | */ | |
4af81310 | 731 | if (!fmd->fimc[i]->variant->has_cam_if) |
d3953223 SN |
732 | continue; |
733 | ||
d0da3c35 | 734 | flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0; |
4af81310 | 735 | |
693f5c40 | 736 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
8df00a15 | 737 | ret = media_create_pad_link(source, pad, sink, |
88fa8311 | 738 | FIMC_SD_PAD_SINK_CAM, flags); |
d3953223 SN |
739 | if (ret) |
740 | return ret; | |
741 | ||
237e0265 SN |
742 | /* Notify FIMC capture subdev entity */ |
743 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
744 | &source->pads[pad], flags); | |
745 | if (ret) | |
746 | break; | |
747 | ||
542fb082 | 748 | v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n", |
d3953223 | 749 | source->name, flags ? '=' : '-', sink->name); |
d3953223 | 750 | } |
4af81310 SN |
751 | |
752 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
753 | if (!fmd->fimc_lite[i]) | |
754 | continue; | |
755 | ||
4af81310 | 756 | sink = &fmd->fimc_lite[i]->subdev.entity; |
8df00a15 | 757 | ret = media_create_pad_link(source, pad, sink, |
f998bb7b | 758 | FLITE_SD_PAD_SINK, 0); |
4af81310 SN |
759 | if (ret) |
760 | return ret; | |
761 | ||
762 | /* Notify FIMC-LITE subdev entity */ | |
763 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
f998bb7b | 764 | &source->pads[pad], 0); |
4af81310 SN |
765 | if (ret) |
766 | break; | |
767 | ||
f998bb7b SN |
768 | v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n", |
769 | source->name, sink->name); | |
4af81310 | 770 | } |
d3953223 SN |
771 | return 0; |
772 | } | |
773 | ||
4af81310 SN |
774 | /* Create links from FIMC-LITE source pads to other entities */ |
775 | static int __fimc_md_create_flite_source_links(struct fimc_md *fmd) | |
776 | { | |
777 | struct media_entity *source, *sink; | |
a26860bd | 778 | int i, ret = 0; |
4af81310 SN |
779 | |
780 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
781 | struct fimc_lite *fimc = fmd->fimc_lite[i]; | |
f998bb7b | 782 | |
4af81310 SN |
783 | if (fimc == NULL) |
784 | continue; | |
f998bb7b | 785 | |
4af81310 | 786 | source = &fimc->subdev.entity; |
bc7584b0 | 787 | sink = &fimc->ve.vdev.entity; |
4af81310 | 788 | /* FIMC-LITE's subdev and video node */ |
8df00a15 | 789 | ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_DMA, |
f998bb7b SN |
790 | sink, 0, 0); |
791 | if (ret) | |
792 | break; | |
793 | /* Link from FIMC-LITE to IS-ISP subdev */ | |
794 | sink = &fmd->fimc_is->isp.subdev.entity; | |
8df00a15 | 795 | ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_ISP, |
f998bb7b | 796 | sink, 0, 0); |
4af81310 SN |
797 | if (ret) |
798 | break; | |
f998bb7b SN |
799 | } |
800 | ||
801 | return ret; | |
802 | } | |
803 | ||
804 | /* Create FIMC-IS links */ | |
805 | static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd) | |
806 | { | |
34947b8a | 807 | struct fimc_isp *isp = &fmd->fimc_is->isp; |
f998bb7b SN |
808 | struct media_entity *source, *sink; |
809 | int i, ret; | |
810 | ||
34947b8a | 811 | source = &isp->subdev.entity; |
f998bb7b SN |
812 | |
813 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
814 | if (fmd->fimc[i] == NULL) | |
815 | continue; | |
816 | ||
34947b8a | 817 | /* Link from FIMC-IS-ISP subdev to FIMC */ |
f998bb7b | 818 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
8df00a15 | 819 | ret = media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_FIFO, |
f998bb7b SN |
820 | sink, FIMC_SD_PAD_SINK_FIFO, 0); |
821 | if (ret) | |
822 | return ret; | |
4af81310 SN |
823 | } |
824 | ||
34947b8a SN |
825 | /* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */ |
826 | sink = &isp->video_capture.ve.vdev.entity; | |
827 | ||
828 | /* Skip this link if the fimc-is-isp video node driver isn't built-in */ | |
829 | if (sink->num_pads == 0) | |
830 | return 0; | |
831 | ||
8df00a15 | 832 | return media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_DMA, |
34947b8a | 833 | sink, 0, 0); |
4af81310 SN |
834 | } |
835 | ||
d3953223 SN |
836 | /** |
837 | * fimc_md_create_links - create default links between registered entities | |
838 | * | |
839 | * Parallel interface sensor entities are connected directly to FIMC capture | |
840 | * entities. The sensors using MIPI CSIS bus are connected through immutable | |
841 | * link with CSI receiver entity specified by mux_id. Any registered CSIS | |
842 | * entity has a link to each registered FIMC capture entity. Enabled links | |
843 | * are created by default between each subsequent registered sensor and | |
844 | * subsequent FIMC capture entity. The number of default active links is | |
845 | * determined by the number of available sensors or FIMC entities, | |
846 | * whichever is less. | |
847 | */ | |
848 | static int fimc_md_create_links(struct fimc_md *fmd) | |
849 | { | |
a8697ec8 | 850 | struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL }; |
d3953223 | 851 | struct v4l2_subdev *sensor, *csis; |
56bc911a | 852 | struct fimc_source_info *pdata; |
237e0265 | 853 | struct media_entity *source, *sink; |
d0da3c35 SN |
854 | int i, pad, fimc_id = 0, ret = 0; |
855 | u32 flags, link_mask = 0; | |
d3953223 SN |
856 | |
857 | for (i = 0; i < fmd->num_sensors; i++) { | |
858 | if (fmd->sensor[i].subdev == NULL) | |
859 | continue; | |
860 | ||
861 | sensor = fmd->sensor[i].subdev; | |
4c8f0629 SN |
862 | pdata = v4l2_get_subdev_hostdata(sensor); |
863 | if (!pdata) | |
d3953223 SN |
864 | continue; |
865 | ||
866 | source = NULL; | |
d3953223 | 867 | |
56bc911a SN |
868 | switch (pdata->sensor_bus_type) { |
869 | case FIMC_BUS_TYPE_MIPI_CSI2: | |
d3953223 SN |
870 | if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES, |
871 | "Wrong CSI channel id: %d\n", pdata->mux_id)) | |
872 | return -EINVAL; | |
873 | ||
874 | csis = fmd->csis[pdata->mux_id].sd; | |
875 | if (WARN(csis == NULL, | |
876 | "MIPI-CSI interface specified " | |
877 | "but s5p-csis module is not loaded!\n")) | |
d12392ec | 878 | return -EINVAL; |
d3953223 | 879 | |
1c9f5bd7 | 880 | pad = sensor->entity.num_pads - 1; |
8df00a15 | 881 | ret = media_create_pad_link(&sensor->entity, pad, |
d3953223 SN |
882 | &csis->entity, CSIS_PAD_SINK, |
883 | MEDIA_LNK_FL_IMMUTABLE | | |
884 | MEDIA_LNK_FL_ENABLED); | |
885 | if (ret) | |
886 | return ret; | |
887 | ||
969e877c | 888 | v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n", |
d3953223 SN |
889 | sensor->entity.name, csis->entity.name); |
890 | ||
4af81310 | 891 | source = NULL; |
5d33ee92 | 892 | csi_sensors[pdata->mux_id] = sensor; |
d3953223 SN |
893 | break; |
894 | ||
56bc911a | 895 | case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656: |
d3953223 SN |
896 | source = &sensor->entity; |
897 | pad = 0; | |
898 | break; | |
899 | ||
900 | default: | |
901 | v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n", | |
56bc911a | 902 | pdata->sensor_bus_type); |
d3953223 SN |
903 | return -EINVAL; |
904 | } | |
905 | if (source == NULL) | |
906 | continue; | |
907 | ||
d0da3c35 | 908 | link_mask = 1 << fimc_id++; |
4af81310 | 909 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 910 | pad, link_mask); |
4af81310 SN |
911 | } |
912 | ||
a8697ec8 | 913 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
4af81310 SN |
914 | if (fmd->csis[i].sd == NULL) |
915 | continue; | |
f998bb7b | 916 | |
4af81310 SN |
917 | source = &fmd->csis[i].sd->entity; |
918 | pad = CSIS_PAD_SOURCE; | |
5d33ee92 | 919 | sensor = csi_sensors[i]; |
4af81310 | 920 | |
d0da3c35 | 921 | link_mask = 1 << fimc_id++; |
5d33ee92 | 922 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 923 | pad, link_mask); |
d3953223 | 924 | } |
4af81310 | 925 | |
237e0265 SN |
926 | /* Create immutable links between each FIMC's subdev and video node */ |
927 | flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED; | |
928 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
929 | if (!fmd->fimc[i]) | |
930 | continue; | |
f998bb7b | 931 | |
693f5c40 | 932 | source = &fmd->fimc[i]->vid_cap.subdev.entity; |
bc7584b0 | 933 | sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity; |
f998bb7b | 934 | |
8df00a15 | 935 | ret = media_create_pad_link(source, FIMC_SD_PAD_SOURCE, |
237e0265 SN |
936 | sink, 0, flags); |
937 | if (ret) | |
938 | break; | |
939 | } | |
940 | ||
f998bb7b SN |
941 | ret = __fimc_md_create_flite_source_links(fmd); |
942 | if (ret < 0) | |
943 | return ret; | |
944 | ||
945 | if (fmd->use_isp) | |
946 | ret = __fimc_md_create_fimc_is_links(fmd); | |
947 | ||
948 | return ret; | |
d3953223 SN |
949 | } |
950 | ||
951 | /* | |
056f4f30 | 952 | * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management. |
d3953223 | 953 | */ |
0e23cbbe SN |
954 | static void fimc_md_put_clocks(struct fimc_md *fmd) |
955 | { | |
956 | int i = FIMC_MAX_CAMCLKS; | |
957 | ||
958 | while (--i >= 0) { | |
959 | if (IS_ERR(fmd->camclk[i].clock)) | |
960 | continue; | |
0e23cbbe SN |
961 | clk_put(fmd->camclk[i].clock); |
962 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
963 | } | |
056f4f30 SN |
964 | |
965 | /* Writeback (PIXELASYNCMx) clocks */ | |
966 | for (i = 0; i < FIMC_MAX_WBCLKS; i++) { | |
967 | if (IS_ERR(fmd->wbclk[i])) | |
968 | continue; | |
969 | clk_put(fmd->wbclk[i]); | |
970 | fmd->wbclk[i] = ERR_PTR(-EINVAL); | |
971 | } | |
0e23cbbe SN |
972 | } |
973 | ||
d3953223 SN |
974 | static int fimc_md_get_clocks(struct fimc_md *fmd) |
975 | { | |
49b2f4c5 | 976 | struct device *dev = &fmd->pdev->dev; |
d3953223 SN |
977 | char clk_name[32]; |
978 | struct clk *clock; | |
044c372a | 979 | int i, ret = 0; |
0e23cbbe SN |
980 | |
981 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) | |
982 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
983 | ||
d3953223 SN |
984 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { |
985 | snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i); | |
0e23cbbe SN |
986 | clock = clk_get(dev, clk_name); |
987 | ||
dc3ae328 | 988 | if (IS_ERR(clock)) { |
49b2f4c5 | 989 | dev_err(dev, "Failed to get clock: %s\n", clk_name); |
0e23cbbe SN |
990 | ret = PTR_ERR(clock); |
991 | break; | |
992 | } | |
d3953223 SN |
993 | fmd->camclk[i].clock = clock; |
994 | } | |
0e23cbbe SN |
995 | if (ret) |
996 | fimc_md_put_clocks(fmd); | |
d3953223 | 997 | |
056f4f30 SN |
998 | if (!fmd->use_isp) |
999 | return 0; | |
1000 | /* | |
1001 | * For now get only PIXELASYNCM1 clock (Writeback B/ISP), | |
1002 | * leave PIXELASYNCM0 out for the LCD Writeback driver. | |
1003 | */ | |
1004 | fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL); | |
1005 | ||
1006 | for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) { | |
1007 | snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i); | |
1008 | clock = clk_get(dev, clk_name); | |
1009 | if (IS_ERR(clock)) { | |
1010 | v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n", | |
1011 | clk_name); | |
1012 | ret = PTR_ERR(clock); | |
1013 | break; | |
1014 | } | |
1015 | fmd->wbclk[i] = clock; | |
1016 | } | |
1017 | if (ret) | |
1018 | fimc_md_put_clocks(fmd); | |
1019 | ||
0e23cbbe | 1020 | return ret; |
d3953223 SN |
1021 | } |
1022 | ||
d3775fa7 | 1023 | static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable) |
d3953223 | 1024 | { |
403dfbec | 1025 | struct exynos_video_entity *ve; |
d3775fa7 | 1026 | struct fimc_pipeline *p; |
403dfbec | 1027 | struct video_device *vdev; |
d3775fa7 | 1028 | int ret; |
d3953223 | 1029 | |
d3775fa7 SN |
1030 | vdev = media_entity_to_video_device(entity); |
1031 | if (vdev->entity.use_count == 0) | |
d3953223 SN |
1032 | return 0; |
1033 | ||
403dfbec | 1034 | ve = vdev_to_exynos_video_entity(vdev); |
d3775fa7 SN |
1035 | p = to_fimc_pipeline(ve->pipe); |
1036 | /* | |
1037 | * Nothing to do if we are disabling the pipeline, some link | |
1038 | * has been disconnected and p->subdevs array is cleared now. | |
1039 | */ | |
1040 | if (!enable && p->subdevs[IDX_SENSOR] == NULL) | |
1041 | return 0; | |
403dfbec | 1042 | |
d3775fa7 SN |
1043 | if (enable) |
1044 | ret = __fimc_pipeline_open(ve->pipe, entity, true); | |
1045 | else | |
1046 | ret = __fimc_pipeline_close(ve->pipe); | |
131b6c61 | 1047 | |
d3775fa7 SN |
1048 | if (ret == 0 && !enable) |
1049 | memset(p->subdevs, 0, sizeof(p->subdevs)); | |
1050 | ||
1051 | return ret; | |
1052 | } | |
1053 | ||
d10c9894 | 1054 | /* Locking: called with entity->graph_obj.mdev->graph_mutex mutex held. */ |
fd7e5309 SA |
1055 | static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable, |
1056 | struct media_entity_graph *graph) | |
d3775fa7 SN |
1057 | { |
1058 | struct media_entity *entity_err = entity; | |
d3775fa7 SN |
1059 | int ret; |
1060 | ||
1061 | /* | |
1062 | * Walk current graph and call the pipeline open/close routine for each | |
1063 | * opened video node that belongs to the graph of entities connected | |
1064 | * through active links. This is needed as we cannot power on/off the | |
1065 | * subdevs in random order. | |
1066 | */ | |
fd7e5309 | 1067 | media_entity_graph_walk_start(graph, entity); |
d3775fa7 | 1068 | |
fd7e5309 | 1069 | while ((entity = media_entity_graph_walk_next(graph))) { |
3efdf62c | 1070 | if (!is_media_entity_v4l2_io(entity)) |
d3775fa7 SN |
1071 | continue; |
1072 | ||
1073 | ret = __fimc_md_modify_pipeline(entity, enable); | |
1074 | ||
1075 | if (ret < 0) | |
1076 | goto err; | |
1077 | } | |
1078 | ||
1079 | return 0; | |
d3775fa7 | 1080 | |
fd7e5309 SA |
1081 | err: |
1082 | media_entity_graph_walk_start(graph, entity_err); | |
1083 | ||
1084 | while ((entity_err = media_entity_graph_walk_next(graph))) { | |
3efdf62c | 1085 | if (!is_media_entity_v4l2_io(entity_err)) |
d3775fa7 SN |
1086 | continue; |
1087 | ||
1088 | __fimc_md_modify_pipeline(entity_err, !enable); | |
1089 | ||
1090 | if (entity_err == entity) | |
1091 | break; | |
1092 | } | |
1093 | ||
1094 | return ret; | |
1095 | } | |
1096 | ||
1097 | static int fimc_md_link_notify(struct media_link *link, unsigned int flags, | |
1098 | unsigned int notification) | |
1099 | { | |
fd7e5309 SA |
1100 | struct media_entity_graph *graph = |
1101 | &container_of(link->graph_obj.mdev, struct fimc_md, | |
1102 | media_dev)->link_setup_graph; | |
d3775fa7 SN |
1103 | struct media_entity *sink = link->sink->entity; |
1104 | int ret = 0; | |
1105 | ||
1106 | /* Before link disconnection */ | |
1107 | if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) { | |
fd7e5309 SA |
1108 | ret = media_entity_graph_walk_init(graph, |
1109 | link->graph_obj.mdev); | |
1110 | if (ret) | |
1111 | return ret; | |
d3775fa7 | 1112 | if (!(flags & MEDIA_LNK_FL_ENABLED)) |
fd7e5309 | 1113 | ret = __fimc_md_modify_pipelines(sink, false, graph); |
cdf58a6f | 1114 | #if 0 |
d3775fa7 | 1115 | else |
cdf58a6f MCC |
1116 | /* TODO: Link state change validation */ |
1117 | #endif | |
d3775fa7 | 1118 | /* After link activation */ |
fd7e5309 SA |
1119 | } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) { |
1120 | if (link->flags & MEDIA_LNK_FL_ENABLED) | |
1121 | ret = __fimc_md_modify_pipelines(sink, true, graph); | |
1122 | media_entity_graph_walk_cleanup(graph); | |
d3953223 | 1123 | } |
740ad921 | 1124 | |
d3775fa7 | 1125 | return ret ? -EPIPE : 0; |
d3953223 SN |
1126 | } |
1127 | ||
1128 | static ssize_t fimc_md_sysfs_show(struct device *dev, | |
1129 | struct device_attribute *attr, char *buf) | |
1130 | { | |
1131 | struct platform_device *pdev = to_platform_device(dev); | |
1132 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1133 | ||
1134 | if (fmd->user_subdev_api) | |
1135 | return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE); | |
1136 | ||
1137 | return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE); | |
1138 | } | |
1139 | ||
1140 | static ssize_t fimc_md_sysfs_store(struct device *dev, | |
1141 | struct device_attribute *attr, | |
1142 | const char *buf, size_t count) | |
1143 | { | |
1144 | struct platform_device *pdev = to_platform_device(dev); | |
1145 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1146 | bool subdev_api; | |
1147 | int i; | |
1148 | ||
1149 | if (!strcmp(buf, "vid-dev\n")) | |
1150 | subdev_api = false; | |
1151 | else if (!strcmp(buf, "sub-dev\n")) | |
1152 | subdev_api = true; | |
1153 | else | |
1154 | return count; | |
1155 | ||
1156 | fmd->user_subdev_api = subdev_api; | |
1157 | for (i = 0; i < FIMC_MAX_DEVS; i++) | |
1158 | if (fmd->fimc[i]) | |
1159 | fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api; | |
1160 | return count; | |
1161 | } | |
1162 | /* | |
1163 | * This device attribute is to select video pipeline configuration method. | |
1164 | * There are following valid values: | |
1165 | * vid-dev - for V4L2 video node API only, subdevice will be configured | |
1166 | * by the host driver. | |
1167 | * sub-dev - for media controller API, subdevs must be configured in user | |
1168 | * space before starting streaming. | |
1169 | */ | |
1170 | static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO, | |
1171 | fimc_md_sysfs_show, fimc_md_sysfs_store); | |
1172 | ||
4163851f SN |
1173 | static int fimc_md_get_pinctrl(struct fimc_md *fmd) |
1174 | { | |
1175 | struct device *dev = &fmd->pdev->dev; | |
1176 | struct fimc_pinctrl *pctl = &fmd->pinctl; | |
1177 | ||
1178 | pctl->pinctrl = devm_pinctrl_get(dev); | |
1179 | if (IS_ERR(pctl->pinctrl)) | |
1180 | return PTR_ERR(pctl->pinctrl); | |
1181 | ||
1182 | pctl->state_default = pinctrl_lookup_state(pctl->pinctrl, | |
1183 | PINCTRL_STATE_DEFAULT); | |
1184 | if (IS_ERR(pctl->state_default)) | |
1185 | return PTR_ERR(pctl->state_default); | |
1186 | ||
1187 | pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl, | |
1188 | PINCTRL_STATE_IDLE); | |
1189 | return 0; | |
1190 | } | |
1191 | ||
d3f5e0c5 SN |
1192 | static int cam_clk_prepare(struct clk_hw *hw) |
1193 | { | |
1194 | struct cam_clk *camclk = to_cam_clk(hw); | |
1195 | int ret; | |
1196 | ||
1197 | if (camclk->fmd->pmf == NULL) | |
1198 | return -ENODEV; | |
1199 | ||
1200 | ret = pm_runtime_get_sync(camclk->fmd->pmf); | |
1201 | return ret < 0 ? ret : 0; | |
1202 | } | |
1203 | ||
1204 | static void cam_clk_unprepare(struct clk_hw *hw) | |
1205 | { | |
1206 | struct cam_clk *camclk = to_cam_clk(hw); | |
1207 | ||
1208 | if (camclk->fmd->pmf == NULL) | |
1209 | return; | |
1210 | ||
1211 | pm_runtime_put_sync(camclk->fmd->pmf); | |
1212 | } | |
1213 | ||
1214 | static const struct clk_ops cam_clk_ops = { | |
1215 | .prepare = cam_clk_prepare, | |
1216 | .unprepare = cam_clk_unprepare, | |
1217 | }; | |
1218 | ||
1219 | static void fimc_md_unregister_clk_provider(struct fimc_md *fmd) | |
1220 | { | |
1221 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1222 | unsigned int i; | |
1223 | ||
1224 | if (cp->of_node) | |
1225 | of_clk_del_provider(cp->of_node); | |
1226 | ||
1227 | for (i = 0; i < cp->num_clocks; i++) | |
1228 | clk_unregister(cp->clks[i]); | |
1229 | } | |
1230 | ||
1231 | static int fimc_md_register_clk_provider(struct fimc_md *fmd) | |
1232 | { | |
1233 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1234 | struct device *dev = &fmd->pdev->dev; | |
1235 | int i, ret; | |
1236 | ||
1237 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { | |
1238 | struct cam_clk *camclk = &cp->camclk[i]; | |
1239 | struct clk_init_data init; | |
1240 | const char *p_name; | |
1241 | ||
1242 | ret = of_property_read_string_index(dev->of_node, | |
1243 | "clock-output-names", i, &init.name); | |
1244 | if (ret < 0) | |
1245 | break; | |
1246 | ||
1247 | p_name = __clk_get_name(fmd->camclk[i].clock); | |
1248 | ||
1249 | /* It's safe since clk_register() will duplicate the string. */ | |
1250 | init.parent_names = &p_name; | |
1251 | init.num_parents = 1; | |
1252 | init.ops = &cam_clk_ops; | |
1253 | init.flags = CLK_SET_RATE_PARENT; | |
1254 | camclk->hw.init = &init; | |
1255 | camclk->fmd = fmd; | |
1256 | ||
1257 | cp->clks[i] = clk_register(NULL, &camclk->hw); | |
1258 | if (IS_ERR(cp->clks[i])) { | |
1259 | dev_err(dev, "failed to register clock: %s (%ld)\n", | |
1260 | init.name, PTR_ERR(cp->clks[i])); | |
1261 | ret = PTR_ERR(cp->clks[i]); | |
1262 | goto err; | |
1263 | } | |
1264 | cp->num_clocks++; | |
1265 | } | |
1266 | ||
1267 | if (cp->num_clocks == 0) { | |
1268 | dev_warn(dev, "clk provider not registered\n"); | |
1269 | return 0; | |
1270 | } | |
1271 | ||
1272 | cp->clk_data.clks = cp->clks; | |
1273 | cp->clk_data.clk_num = cp->num_clocks; | |
1274 | cp->of_node = dev->of_node; | |
1275 | ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, | |
1276 | &cp->clk_data); | |
1277 | if (ret == 0) | |
1278 | return 0; | |
1279 | err: | |
1280 | fimc_md_unregister_clk_provider(fmd); | |
1281 | return ret; | |
1282 | } | |
d3f5e0c5 | 1283 | |
fa91f105 SN |
1284 | static int subdev_notifier_bound(struct v4l2_async_notifier *notifier, |
1285 | struct v4l2_subdev *subdev, | |
1286 | struct v4l2_async_subdev *asd) | |
1287 | { | |
1288 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1289 | struct fimc_sensor_info *si = NULL; | |
1290 | int i; | |
1291 | ||
1292 | /* Find platform data for this sensor subdev */ | |
1293 | for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++) | |
1294 | if (fmd->sensor[i].asd.match.of.node == subdev->dev->of_node) | |
1295 | si = &fmd->sensor[i]; | |
1296 | ||
1297 | if (si == NULL) | |
1298 | return -EINVAL; | |
1299 | ||
1300 | v4l2_set_subdev_hostdata(subdev, &si->pdata); | |
1301 | ||
1302 | if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) | |
1303 | subdev->grp_id = GRP_ID_FIMC_IS_SENSOR; | |
1304 | else | |
1305 | subdev->grp_id = GRP_ID_SENSOR; | |
1306 | ||
1307 | si->subdev = subdev; | |
1308 | ||
1309 | v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n", | |
1310 | subdev->name, fmd->num_sensors); | |
1311 | ||
1312 | fmd->num_sensors++; | |
1313 | ||
1314 | return 0; | |
1315 | } | |
1316 | ||
1317 | static int subdev_notifier_complete(struct v4l2_async_notifier *notifier) | |
1318 | { | |
1319 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1320 | int ret; | |
1321 | ||
1322 | mutex_lock(&fmd->media_dev.graph_mutex); | |
1323 | ||
1324 | ret = fimc_md_create_links(fmd); | |
1325 | if (ret < 0) | |
1326 | goto unlock; | |
1327 | ||
1328 | ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev); | |
1329 | unlock: | |
1330 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
9832e155 JMC |
1331 | if (ret < 0) |
1332 | return ret; | |
1333 | ||
1334 | return media_device_register(&fmd->media_dev); | |
fa91f105 SN |
1335 | } |
1336 | ||
ecd9acbf | 1337 | static int fimc_md_probe(struct platform_device *pdev) |
d3953223 | 1338 | { |
e2985a26 | 1339 | struct device *dev = &pdev->dev; |
d3953223 SN |
1340 | struct v4l2_device *v4l2_dev; |
1341 | struct fimc_md *fmd; | |
1342 | int ret; | |
1343 | ||
e2985a26 | 1344 | fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL); |
d3953223 SN |
1345 | if (!fmd) |
1346 | return -ENOMEM; | |
1347 | ||
1348 | spin_lock_init(&fmd->slock); | |
403dfbec | 1349 | INIT_LIST_HEAD(&fmd->pipelines); |
49b2f4c5 | 1350 | fmd->pdev = pdev; |
d3953223 SN |
1351 | |
1352 | strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC", | |
1353 | sizeof(fmd->media_dev.model)); | |
1354 | fmd->media_dev.link_notify = fimc_md_link_notify; | |
e2985a26 | 1355 | fmd->media_dev.dev = dev; |
d3953223 SN |
1356 | |
1357 | v4l2_dev = &fmd->v4l2_dev; | |
1358 | v4l2_dev->mdev = &fmd->media_dev; | |
e1d72f4d | 1359 | v4l2_dev->notify = fimc_sensor_notify; |
e2985a26 | 1360 | strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name)); |
d3953223 | 1361 | |
e781bbe3 | 1362 | fmd->use_isp = fimc_md_is_isp_available(dev->of_node); |
49b2f4c5 | 1363 | fmd->user_subdev_api = true; |
e781bbe3 | 1364 | |
2e7508e4 MCC |
1365 | media_device_init(&fmd->media_dev); |
1366 | ||
e2985a26 | 1367 | ret = v4l2_device_register(dev, &fmd->v4l2_dev); |
d3953223 SN |
1368 | if (ret < 0) { |
1369 | v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret); | |
6d91a51a | 1370 | return ret; |
d3953223 | 1371 | } |
d3f5e0c5 | 1372 | |
d3953223 SN |
1373 | ret = fimc_md_get_clocks(fmd); |
1374 | if (ret) | |
fa91f105 | 1375 | goto err_md; |
d3953223 | 1376 | |
4163851f SN |
1377 | ret = fimc_md_get_pinctrl(fmd); |
1378 | if (ret < 0) { | |
1379 | if (ret != EPROBE_DEFER) | |
1380 | dev_err(dev, "Failed to get pinctrl: %d\n", ret); | |
fa91f105 | 1381 | goto err_clk; |
4163851f SN |
1382 | } |
1383 | ||
fa91f105 SN |
1384 | platform_set_drvdata(pdev, fmd); |
1385 | ||
1386 | /* Protect the media graph while we're registering entities */ | |
1387 | mutex_lock(&fmd->media_dev.graph_mutex); | |
1388 | ||
49b2f4c5 | 1389 | ret = fimc_md_register_platform_entities(fmd, dev->of_node); |
fa91f105 SN |
1390 | if (ret) { |
1391 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
1392 | goto err_clk; | |
1393 | } | |
d3953223 | 1394 | |
49b2f4c5 SN |
1395 | ret = fimc_md_register_sensor_entities(fmd); |
1396 | if (ret) { | |
1397 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
1398 | goto err_m_ent; | |
5cbf6f16 | 1399 | } |
e2985a26 | 1400 | |
fa91f105 | 1401 | mutex_unlock(&fmd->media_dev.graph_mutex); |
d3953223 SN |
1402 | |
1403 | ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 | 1404 | if (ret) |
fa91f105 SN |
1405 | goto err_m_ent; |
1406 | /* | |
1407 | * FIMC platform devices need to be registered before the sclk_cam | |
1408 | * clocks provider, as one of these devices needs to be activated | |
1409 | * to enable the clock. | |
1410 | */ | |
1411 | ret = fimc_md_register_clk_provider(fmd); | |
1412 | if (ret < 0) { | |
1413 | v4l2_err(v4l2_dev, "clock provider registration failed\n"); | |
1414 | goto err_attr; | |
1415 | } | |
1416 | ||
1417 | if (fmd->num_sensors > 0) { | |
1418 | fmd->subdev_notifier.subdevs = fmd->async_subdevs; | |
1419 | fmd->subdev_notifier.num_subdevs = fmd->num_sensors; | |
1420 | fmd->subdev_notifier.bound = subdev_notifier_bound; | |
1421 | fmd->subdev_notifier.complete = subdev_notifier_complete; | |
1422 | fmd->num_sensors = 0; | |
1423 | ||
1424 | ret = v4l2_async_notifier_register(&fmd->v4l2_dev, | |
1425 | &fmd->subdev_notifier); | |
1426 | if (ret) | |
1427 | goto err_clk_p; | |
1428 | } | |
693f5c40 | 1429 | |
693f5c40 SN |
1430 | return 0; |
1431 | ||
fa91f105 SN |
1432 | err_clk_p: |
1433 | fimc_md_unregister_clk_provider(fmd); | |
1434 | err_attr: | |
1435 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 | 1436 | err_clk: |
d3953223 | 1437 | fimc_md_put_clocks(fmd); |
fa91f105 | 1438 | err_m_ent: |
d3953223 | 1439 | fimc_md_unregister_entities(fmd); |
693f5c40 | 1440 | err_md: |
9832e155 | 1441 | media_device_cleanup(&fmd->media_dev); |
d3953223 | 1442 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1443 | return ret; |
1444 | } | |
1445 | ||
4c62e976 | 1446 | static int fimc_md_remove(struct platform_device *pdev) |
d3953223 SN |
1447 | { |
1448 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1449 | ||
1450 | if (!fmd) | |
1451 | return 0; | |
b74bee15 | 1452 | |
d3f5e0c5 | 1453 | fimc_md_unregister_clk_provider(fmd); |
fa91f105 SN |
1454 | v4l2_async_notifier_unregister(&fmd->subdev_notifier); |
1455 | ||
b74bee15 | 1456 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1457 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); |
1458 | fimc_md_unregister_entities(fmd); | |
403dfbec | 1459 | fimc_md_pipelines_free(fmd); |
d3953223 | 1460 | media_device_unregister(&fmd->media_dev); |
9832e155 | 1461 | media_device_cleanup(&fmd->media_dev); |
d3953223 | 1462 | fimc_md_put_clocks(fmd); |
fa91f105 | 1463 | |
d3953223 SN |
1464 | return 0; |
1465 | } | |
1466 | ||
c42639d8 | 1467 | static const struct platform_device_id fimc_driver_ids[] __always_unused = { |
e2985a26 SN |
1468 | { .name = "s5p-fimc-md" }, |
1469 | { }, | |
1470 | }; | |
1471 | MODULE_DEVICE_TABLE(platform, fimc_driver_ids); | |
1472 | ||
1473 | static const struct of_device_id fimc_md_of_match[] = { | |
1474 | { .compatible = "samsung,fimc" }, | |
1475 | { }, | |
1476 | }; | |
1477 | MODULE_DEVICE_TABLE(of, fimc_md_of_match); | |
1478 | ||
d3953223 SN |
1479 | static struct platform_driver fimc_md_driver = { |
1480 | .probe = fimc_md_probe, | |
4c62e976 | 1481 | .remove = fimc_md_remove, |
d3953223 | 1482 | .driver = { |
e2985a26 SN |
1483 | .of_match_table = of_match_ptr(fimc_md_of_match), |
1484 | .name = "s5p-fimc-md", | |
d3953223 SN |
1485 | } |
1486 | }; | |
1487 | ||
7e566be2 | 1488 | static int __init fimc_md_init(void) |
d3953223 SN |
1489 | { |
1490 | int ret; | |
ecd9acbf | 1491 | |
d3953223 SN |
1492 | request_module("s5p-csis"); |
1493 | ret = fimc_register_driver(); | |
1494 | if (ret) | |
1495 | return ret; | |
ecd9acbf | 1496 | |
d3953223 SN |
1497 | return platform_driver_register(&fimc_md_driver); |
1498 | } | |
7e566be2 SK |
1499 | |
1500 | static void __exit fimc_md_exit(void) | |
d3953223 SN |
1501 | { |
1502 | platform_driver_unregister(&fimc_md_driver); | |
1503 | fimc_unregister_driver(); | |
1504 | } | |
1505 | ||
1506 | module_init(fimc_md_init); | |
1507 | module_exit(fimc_md_exit); | |
1508 | ||
1509 | MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); | |
1510 | MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver"); | |
1511 | MODULE_LICENSE("GPL"); | |
1512 | MODULE_VERSION("2.0.1"); |