[media] media: v4l2-ctrls: Fix 64bit support in get_ctrl()
[linux-2.6-block.git] / drivers / media / platform / exynos4-is / fimc-lite.c
CommitLineData
4af81310
SN
1/*
2 * Samsung EXYNOS FIMC-LITE (camera host interface) driver
3*
8a0c28f5
SN
4 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
5 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
4af81310
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
12
13#include <linux/bug.h>
4c8f0629 14#include <linux/clk.h>
4af81310
SN
15#include <linux/device.h>
16#include <linux/errno.h>
17#include <linux/interrupt.h>
18#include <linux/kernel.h>
19#include <linux/list.h>
20#include <linux/module.h>
eb62d9e9 21#include <linux/of.h>
4af81310
SN
22#include <linux/types.h>
23#include <linux/platform_device.h>
24#include <linux/pm_runtime.h>
25#include <linux/slab.h>
26#include <linux/videodev2.h>
27
28#include <media/v4l2-device.h>
29#include <media/v4l2-ioctl.h>
30#include <media/v4l2-mem2mem.h>
31#include <media/videobuf2-core.h>
32#include <media/videobuf2-dma-contig.h>
49b2f4c5 33#include <media/exynos-fimc.h>
4af81310 34
045a1fac 35#include "common.h"
4c8f0629 36#include "fimc-core.h"
b9ee31e6 37#include "fimc-lite.h"
4af81310
SN
38#include "fimc-lite-reg.h"
39
40static int debug;
41module_param(debug, int, 0644);
42
43static const struct fimc_fmt fimc_lite_formats[] = {
44 {
45 .name = "YUV 4:2:2 packed, YCbYCr",
46 .fourcc = V4L2_PIX_FMT_YUYV,
1c26190a 47 .colorspace = V4L2_COLORSPACE_JPEG,
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SN
48 .depth = { 16 },
49 .color = FIMC_FMT_YCBYCR422,
50 .memplanes = 1,
27ffaeb0 51 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
e90ad659 52 .flags = FMT_FLAGS_YUV,
4af81310
SN
53 }, {
54 .name = "YUV 4:2:2 packed, CbYCrY",
55 .fourcc = V4L2_PIX_FMT_UYVY,
1c26190a 56 .colorspace = V4L2_COLORSPACE_JPEG,
4af81310
SN
57 .depth = { 16 },
58 .color = FIMC_FMT_CBYCRY422,
59 .memplanes = 1,
27ffaeb0 60 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
e90ad659 61 .flags = FMT_FLAGS_YUV,
4af81310
SN
62 }, {
63 .name = "YUV 4:2:2 packed, CrYCbY",
64 .fourcc = V4L2_PIX_FMT_VYUY,
1c26190a 65 .colorspace = V4L2_COLORSPACE_JPEG,
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SN
66 .depth = { 16 },
67 .color = FIMC_FMT_CRYCBY422,
68 .memplanes = 1,
27ffaeb0 69 .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
e90ad659 70 .flags = FMT_FLAGS_YUV,
4af81310
SN
71 }, {
72 .name = "YUV 4:2:2 packed, YCrYCb",
73 .fourcc = V4L2_PIX_FMT_YVYU,
1c26190a 74 .colorspace = V4L2_COLORSPACE_JPEG,
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SN
75 .depth = { 16 },
76 .color = FIMC_FMT_YCRYCB422,
77 .memplanes = 1,
27ffaeb0 78 .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
e90ad659 79 .flags = FMT_FLAGS_YUV,
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SN
80 }, {
81 .name = "RAW8 (GRBG)",
82 .fourcc = V4L2_PIX_FMT_SGRBG8,
1c26190a 83 .colorspace = V4L2_COLORSPACE_SRGB,
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SN
84 .depth = { 8 },
85 .color = FIMC_FMT_RAW8,
86 .memplanes = 1,
27ffaeb0 87 .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
e90ad659 88 .flags = FMT_FLAGS_RAW_BAYER,
4af81310
SN
89 }, {
90 .name = "RAW10 (GRBG)",
91 .fourcc = V4L2_PIX_FMT_SGRBG10,
1c26190a 92 .colorspace = V4L2_COLORSPACE_SRGB,
3396b096 93 .depth = { 16 },
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SN
94 .color = FIMC_FMT_RAW10,
95 .memplanes = 1,
27ffaeb0 96 .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
e90ad659 97 .flags = FMT_FLAGS_RAW_BAYER,
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SN
98 }, {
99 .name = "RAW12 (GRBG)",
100 .fourcc = V4L2_PIX_FMT_SGRBG12,
1c26190a 101 .colorspace = V4L2_COLORSPACE_SRGB,
3396b096 102 .depth = { 16 },
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SN
103 .color = FIMC_FMT_RAW12,
104 .memplanes = 1,
27ffaeb0 105 .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12,
e90ad659 106 .flags = FMT_FLAGS_RAW_BAYER,
4af81310
SN
107 },
108};
109
110/**
111 * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
112 * @pixelformat: fourcc to match, ignored if null
113 * @mbus_code: media bus code to match, ignored if null
e90ad659 114 * @mask: the color format flags to match
4af81310
SN
115 * @index: index to the fimc_lite_formats array, ignored if negative
116 */
117static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
e90ad659 118 const u32 *mbus_code, unsigned int mask, int index)
4af81310
SN
119{
120 const struct fimc_fmt *fmt, *def_fmt = NULL;
121 unsigned int i;
122 int id = 0;
123
124 if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
125 return NULL;
126
127 for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
128 fmt = &fimc_lite_formats[i];
e90ad659
SN
129 if (mask && !(fmt->flags & mask))
130 continue;
4af81310
SN
131 if (pixelformat && fmt->fourcc == *pixelformat)
132 return fmt;
133 if (mbus_code && fmt->mbus_code == *mbus_code)
134 return fmt;
135 if (index == id)
136 def_fmt = fmt;
137 id++;
138 }
139 return def_fmt;
140}
141
6319d6a0 142static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
4af81310 143{
4c8f0629 144 struct fimc_source_info *si;
4af81310
SN
145 unsigned long flags;
146
756e6e14 147 if (fimc->sensor == NULL)
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SN
148 return -ENXIO;
149
e90ad659 150 if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
4af81310
SN
151 return -EINVAL;
152
6319d6a0 153 /* Get sensor configuration data from the sensor subdev */
756e6e14 154 si = v4l2_get_subdev_hostdata(fimc->sensor);
4c8f0629
SN
155 if (!si)
156 return -EINVAL;
157
4af81310
SN
158 spin_lock_irqsave(&fimc->slock, flags);
159
4c8f0629 160 flite_hw_set_camera_bus(fimc, si);
4af81310
SN
161 flite_hw_set_source_format(fimc, &fimc->inp_frame);
162 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
086eca29 163 flite_hw_set_dma_buf_mask(fimc, 0);
6319d6a0 164 flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
4af81310
SN
165 flite_hw_set_interrupt_mask(fimc);
166 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
167
168 if (debug > 0)
169 flite_hw_dump_regs(fimc, __func__);
170
171 spin_unlock_irqrestore(&fimc->slock, flags);
172 return 0;
173}
174
175/*
176 * Reinitialize the driver so it is ready to start the streaming again.
177 * Set fimc->state to indicate stream off and the hardware shut down state.
178 * If not suspending (@suspend is false), return any buffers to videobuf2.
179 * Otherwise put any owned buffers onto the pending buffers queue, so they
180 * can be re-spun when the device is being resumed. Also perform FIMC
181 * software reset and disable streaming on the whole pipeline if required.
182 */
183static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
184{
185 struct flite_buffer *buf;
186 unsigned long flags;
187 bool streaming;
188
189 spin_lock_irqsave(&fimc->slock, flags);
190 streaming = fimc->state & (1 << ST_SENSOR_STREAM);
191
192 fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
193 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
194 if (suspend)
195 fimc->state |= (1 << ST_FLITE_SUSPENDED);
196 else
197 fimc->state &= ~(1 << ST_FLITE_PENDING |
198 1 << ST_FLITE_SUSPENDED);
199
200 /* Release unused buffers */
201 while (!suspend && !list_empty(&fimc->pending_buf_q)) {
202 buf = fimc_lite_pending_queue_pop(fimc);
203 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
204 }
205 /* If suspending put unused buffers onto pending queue */
206 while (!list_empty(&fimc->active_buf_q)) {
207 buf = fimc_lite_active_queue_pop(fimc);
208 if (suspend)
209 fimc_lite_pending_queue_add(fimc, buf);
210 else
211 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
212 }
213
214 spin_unlock_irqrestore(&fimc->slock, flags);
215
216 flite_hw_reset(fimc);
217
218 if (!streaming)
219 return 0;
220
403dfbec 221 return fimc_pipeline_call(&fimc->ve, set_stream, 0);
4af81310
SN
222}
223
224static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
225{
226 unsigned long flags;
227
228 if (!fimc_lite_active(fimc))
229 return 0;
230
231 spin_lock_irqsave(&fimc->slock, flags);
232 set_bit(ST_FLITE_OFF, &fimc->state);
233 flite_hw_capture_stop(fimc);
234 spin_unlock_irqrestore(&fimc->slock, flags);
235
236 wait_event_timeout(fimc->irq_queue,
237 !test_bit(ST_FLITE_OFF, &fimc->state),
238 (2*HZ/10)); /* 200 ms */
239
240 return fimc_lite_reinit(fimc, suspend);
241}
242
243/* Must be called with fimc.slock spinlock held. */
244static void fimc_lite_config_update(struct fimc_lite *fimc)
245{
246 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
247 flite_hw_set_dma_window(fimc, &fimc->out_frame);
248 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
249 clear_bit(ST_FLITE_CONFIG, &fimc->state);
250}
251
252static irqreturn_t flite_irq_handler(int irq, void *priv)
253{
254 struct fimc_lite *fimc = priv;
255 struct flite_buffer *vbuf;
256 unsigned long flags;
4af81310
SN
257 u32 intsrc;
258
259 spin_lock_irqsave(&fimc->slock, flags);
260
261 intsrc = flite_hw_get_interrupt_source(fimc);
262 flite_hw_clear_pending_irq(fimc);
263
264 if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
265 wake_up(&fimc->irq_queue);
266 goto done;
267 }
268
269 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
270 clear_bit(ST_FLITE_RUN, &fimc->state);
271 fimc->events.data_overflow++;
272 }
273
274 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
275 flite_hw_clear_last_capture_end(fimc);
276 clear_bit(ST_FLITE_STREAM, &fimc->state);
277 wake_up(&fimc->irq_queue);
278 }
279
03878bb4 280 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
4af81310
SN
281 goto done;
282
283 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
284 test_bit(ST_FLITE_RUN, &fimc->state) &&
4af81310 285 !list_empty(&fimc->pending_buf_q)) {
086eca29
SN
286 vbuf = fimc_lite_pending_queue_pop(fimc);
287 flite_hw_set_dma_buffer(fimc, vbuf);
288 fimc_lite_active_queue_add(fimc, vbuf);
289 }
290
291 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMEND) &&
292 test_bit(ST_FLITE_RUN, &fimc->state) &&
293 !list_empty(&fimc->active_buf_q)) {
4af81310 294 vbuf = fimc_lite_active_queue_pop(fimc);
5ba0e2c3 295 v4l2_get_timestamp(&vbuf->vb.v4l2_buf.timestamp);
4af81310 296 vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
086eca29 297 flite_hw_mask_dma_buffer(fimc, vbuf->index);
4af81310 298 vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
4af81310
SN
299 }
300
301 if (test_bit(ST_FLITE_CONFIG, &fimc->state))
302 fimc_lite_config_update(fimc);
303
304 if (list_empty(&fimc->pending_buf_q)) {
305 flite_hw_capture_stop(fimc);
306 clear_bit(ST_FLITE_STREAM, &fimc->state);
307 }
308done:
309 set_bit(ST_FLITE_RUN, &fimc->state);
310 spin_unlock_irqrestore(&fimc->slock, flags);
311 return IRQ_HANDLED;
312}
313
314static int start_streaming(struct vb2_queue *q, unsigned int count)
315{
316 struct fimc_lite *fimc = q->drv_priv;
086eca29 317 unsigned long flags;
4af81310
SN
318 int ret;
319
086eca29
SN
320 spin_lock_irqsave(&fimc->slock, flags);
321
322 fimc->buf_index = 0;
4af81310
SN
323 fimc->frame_count = 0;
324
086eca29
SN
325 spin_unlock_irqrestore(&fimc->slock, flags);
326
6319d6a0 327 ret = fimc_lite_hw_init(fimc, false);
4af81310
SN
328 if (ret) {
329 fimc_lite_reinit(fimc, false);
330 return ret;
331 }
332
333 set_bit(ST_FLITE_PENDING, &fimc->state);
334
335 if (!list_empty(&fimc->active_buf_q) &&
336 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
337 flite_hw_capture_start(fimc);
338
339 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
403dfbec 340 fimc_pipeline_call(&fimc->ve, set_stream, 1);
4af81310
SN
341 }
342 if (debug > 0)
343 flite_hw_dump_regs(fimc, __func__);
344
345 return 0;
346}
347
e37559b2 348static void stop_streaming(struct vb2_queue *q)
4af81310
SN
349{
350 struct fimc_lite *fimc = q->drv_priv;
351
352 if (!fimc_lite_active(fimc))
e37559b2 353 return;
4af81310 354
e37559b2 355 fimc_lite_stop_capture(fimc, false);
4af81310
SN
356}
357
358static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
359 unsigned int *num_buffers, unsigned int *num_planes,
360 unsigned int sizes[], void *allocators[])
361{
362 const struct v4l2_pix_format_mplane *pixm = NULL;
363 struct fimc_lite *fimc = vq->drv_priv;
364 struct flite_frame *frame = &fimc->out_frame;
e90ad659 365 const struct fimc_fmt *fmt = frame->fmt;
4af81310
SN
366 unsigned long wh;
367 int i;
368
369 if (pfmt) {
370 pixm = &pfmt->fmt.pix_mp;
e90ad659 371 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0, -1);
4af81310
SN
372 wh = pixm->width * pixm->height;
373 } else {
374 wh = frame->f_width * frame->f_height;
375 }
376
377 if (fmt == NULL)
378 return -EINVAL;
379
380 *num_planes = fmt->memplanes;
381
382 for (i = 0; i < fmt->memplanes; i++) {
383 unsigned int size = (wh * fmt->depth[i]) / 8;
384 if (pixm)
385 sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
386 else
387 sizes[i] = size;
388 allocators[i] = fimc->alloc_ctx;
389 }
390
391 return 0;
392}
393
394static int buffer_prepare(struct vb2_buffer *vb)
395{
396 struct vb2_queue *vq = vb->vb2_queue;
397 struct fimc_lite *fimc = vq->drv_priv;
398 int i;
399
e90ad659 400 if (fimc->out_frame.fmt == NULL)
4af81310
SN
401 return -EINVAL;
402
e90ad659 403 for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
4af81310
SN
404 unsigned long size = fimc->payload[i];
405
406 if (vb2_plane_size(vb, i) < size) {
bc7584b0 407 v4l2_err(&fimc->ve.vdev,
4af81310
SN
408 "User buffer too small (%ld < %ld)\n",
409 vb2_plane_size(vb, i), size);
410 return -EINVAL;
411 }
412 vb2_set_plane_payload(vb, i, size);
413 }
414
415 return 0;
416}
417
418static void buffer_queue(struct vb2_buffer *vb)
419{
420 struct flite_buffer *buf
421 = container_of(vb, struct flite_buffer, vb);
422 struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
423 unsigned long flags;
424
425 spin_lock_irqsave(&fimc->slock, flags);
426 buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
427
086eca29
SN
428 buf->index = fimc->buf_index++;
429 if (fimc->buf_index >= fimc->reqbufs_count)
430 fimc->buf_index = 0;
431
4af81310
SN
432 if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
433 !test_bit(ST_FLITE_STREAM, &fimc->state) &&
434 list_empty(&fimc->active_buf_q)) {
086eca29 435 flite_hw_set_dma_buffer(fimc, buf);
4af81310
SN
436 fimc_lite_active_queue_add(fimc, buf);
437 } else {
438 fimc_lite_pending_queue_add(fimc, buf);
439 }
440
441 if (vb2_is_streaming(&fimc->vb_queue) &&
442 !list_empty(&fimc->pending_buf_q) &&
443 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
444 flite_hw_capture_start(fimc);
445 spin_unlock_irqrestore(&fimc->slock, flags);
446
447 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
403dfbec 448 fimc_pipeline_call(&fimc->ve, set_stream, 1);
4af81310
SN
449 return;
450 }
451 spin_unlock_irqrestore(&fimc->slock, flags);
452}
453
4af81310
SN
454static const struct vb2_ops fimc_lite_qops = {
455 .queue_setup = queue_setup,
456 .buf_prepare = buffer_prepare,
457 .buf_queue = buffer_queue,
ee12b049
SN
458 .wait_prepare = vb2_ops_wait_prepare,
459 .wait_finish = vb2_ops_wait_finish,
4af81310
SN
460 .start_streaming = start_streaming,
461 .stop_streaming = stop_streaming,
462};
463
464static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
465{
466 unsigned long flags;
467
468 spin_lock_irqsave(&fimc->slock, flags);
469 memset(&fimc->events, 0, sizeof(fimc->events));
470 spin_unlock_irqrestore(&fimc->slock, flags);
471}
472
473static int fimc_lite_open(struct file *file)
474{
475 struct fimc_lite *fimc = video_drvdata(file);
bc7584b0 476 struct media_entity *me = &fimc->ve.vdev.entity;
e3fc82e8 477 int ret;
4af81310 478
740ad921 479 mutex_lock(&fimc->lock);
03878bb4 480 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
6319d6a0 481 ret = -EBUSY;
ee12b049 482 goto unlock;
6319d6a0
SN
483 }
484
4af81310 485 set_bit(ST_FLITE_IN_USE, &fimc->state);
e3fc82e8
SN
486 ret = pm_runtime_get_sync(&fimc->pdev->dev);
487 if (ret < 0)
ee12b049 488 goto unlock;
4af81310 489
e3fc82e8
SN
490 ret = v4l2_fh_open(file);
491 if (ret < 0)
ee12b049 492 goto err_pm;
4af81310 493
ee12b049
SN
494 if (!v4l2_fh_is_singular_file(file) ||
495 atomic_read(&fimc->out_path) != FIMC_IO_DMA)
496 goto unlock;
4af81310 497
42625fdf
SN
498 mutex_lock(&me->parent->graph_mutex);
499
403dfbec 500 ret = fimc_pipeline_call(&fimc->ve, open, me, true);
42625fdf
SN
501
502 /* Mark video pipeline ending at this video node as in use. */
503 if (ret == 0)
504 me->use_count++;
505
506 mutex_unlock(&me->parent->graph_mutex);
507
ee12b049 508 if (!ret) {
4e39da01 509 fimc_lite_clear_event_counters(fimc);
ee12b049 510 goto unlock;
4e39da01 511 }
ee12b049
SN
512
513 v4l2_fh_release(file);
514err_pm:
515 pm_runtime_put_sync(&fimc->pdev->dev);
516 clear_bit(ST_FLITE_IN_USE, &fimc->state);
517unlock:
4e39da01 518 mutex_unlock(&fimc->lock);
4af81310
SN
519 return ret;
520}
521
ee12b049 522static int fimc_lite_release(struct file *file)
4af81310
SN
523{
524 struct fimc_lite *fimc = video_drvdata(file);
42625fdf 525 struct media_entity *entity = &fimc->ve.vdev.entity;
4e39da01 526
ddc43d6d 527 mutex_lock(&fimc->lock);
4af81310 528
ee12b049 529 if (v4l2_fh_is_singular_file(file) &&
03878bb4 530 atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
9ea89e2b 531 if (fimc->streaming) {
42625fdf 532 media_entity_pipeline_stop(entity);
9ea89e2b
SN
533 fimc->streaming = false;
534 }
4af81310 535 fimc_lite_stop_capture(fimc, false);
403dfbec
SN
536 fimc_pipeline_call(&fimc->ve, close);
537 clear_bit(ST_FLITE_IN_USE, &fimc->state);
538
42625fdf
SN
539 mutex_lock(&entity->parent->graph_mutex);
540 entity->use_count--;
541 mutex_unlock(&entity->parent->graph_mutex);
4af81310
SN
542 }
543
1380f575 544 _vb2_fop_release(file, NULL);
4af81310 545 pm_runtime_put(&fimc->pdev->dev);
ee12b049 546 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
4af81310 547
4e39da01 548 mutex_unlock(&fimc->lock);
ee12b049 549 return 0;
4af81310
SN
550}
551
552static const struct v4l2_file_operations fimc_lite_fops = {
553 .owner = THIS_MODULE,
554 .open = fimc_lite_open,
ee12b049
SN
555 .release = fimc_lite_release,
556 .poll = vb2_fop_poll,
4af81310 557 .unlocked_ioctl = video_ioctl2,
ee12b049 558 .mmap = vb2_fop_mmap,
4af81310
SN
559};
560
561/*
562 * Format and crop negotiation helpers
563 */
564
b1d2dc5c 565static const struct fimc_fmt *fimc_lite_subdev_try_fmt(struct fimc_lite *fimc,
f7234138 566 struct v4l2_subdev_pad_config *cfg,
b1d2dc5c 567 struct v4l2_subdev_format *format)
4af81310 568{
9c8399c8 569 struct flite_drvdata *dd = fimc->dd;
b1d2dc5c
SN
570 struct v4l2_mbus_framefmt *mf = &format->format;
571 const struct fimc_fmt *fmt = NULL;
572
573 if (format->pad == FLITE_SD_PAD_SINK) {
574 v4l_bound_align_image(&mf->width, 8, dd->max_width,
575 ffs(dd->out_width_align) - 1,
576 &mf->height, 0, dd->max_height, 0, 0);
4af81310 577
b1d2dc5c
SN
578 fmt = fimc_lite_find_format(NULL, &mf->code, 0, 0);
579 if (WARN_ON(!fmt))
580 return NULL;
581
1c26190a 582 mf->colorspace = fmt->colorspace;
b1d2dc5c 583 mf->code = fmt->mbus_code;
4af81310 584 } else {
b1d2dc5c
SN
585 struct flite_frame *sink = &fimc->inp_frame;
586 struct v4l2_mbus_framefmt *sink_fmt;
587 struct v4l2_rect *rect;
4af81310 588
b1d2dc5c 589 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
f7234138 590 sink_fmt = v4l2_subdev_get_try_format(&fimc->subdev, cfg,
b1d2dc5c 591 FLITE_SD_PAD_SINK);
e90ad659 592
b1d2dc5c 593 mf->code = sink_fmt->code;
1c26190a 594 mf->colorspace = sink_fmt->colorspace;
b1d2dc5c 595
f7234138 596 rect = v4l2_subdev_get_try_crop(&fimc->subdev, cfg,
b1d2dc5c
SN
597 FLITE_SD_PAD_SINK);
598 } else {
599 mf->code = sink->fmt->mbus_code;
1c26190a 600 mf->colorspace = sink->fmt->colorspace;
b1d2dc5c
SN
601 rect = &sink->rect;
602 }
603
604 /* Allow changing format only on sink pad */
605 mf->width = rect->width;
606 mf->height = rect->height;
607 }
e90ad659 608
b1d2dc5c
SN
609 mf->field = V4L2_FIELD_NONE;
610
611 v4l2_dbg(1, debug, &fimc->subdev, "code: %#x (%d), %dx%d\n",
612 mf->code, mf->colorspace, mf->width, mf->height);
4af81310
SN
613
614 return fmt;
615}
616
617static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
618{
619 struct flite_frame *frame = &fimc->inp_frame;
620
621 v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
622 &r->height, 0, frame->f_height, 0, 0);
623
624 /* Adjust left/top if cropping rectangle got out of bounds */
625 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
9c8399c8 626 r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
4af81310
SN
627 r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
628
969e877c 629 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
4af81310
SN
630 r->left, r->top, r->width, r->height,
631 frame->f_width, frame->f_height);
632}
633
634static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
635{
636 struct flite_frame *frame = &fimc->out_frame;
637 struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
638
639 /* Scaling is not supported so we enforce compose rectangle size
640 same as size of the sink crop rectangle. */
641 r->width = crop_rect->width;
642 r->height = crop_rect->height;
643
644 /* Adjust left/top if the composing rectangle got out of bounds */
645 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
9c8399c8 646 r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
4af81310
SN
647 r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
648
969e877c 649 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
4af81310
SN
650 r->left, r->top, r->width, r->height,
651 frame->f_width, frame->f_height);
652}
653
654/*
655 * Video node ioctl operations
656 */
793ad32d 657static int fimc_lite_querycap(struct file *file, void *priv,
4af81310
SN
658 struct v4l2_capability *cap)
659{
793ad32d
SN
660 struct fimc_lite *fimc = video_drvdata(file);
661
4af81310 662 strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
793ad32d
SN
663 strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
664 snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
665 dev_name(&fimc->pdev->dev));
666
667 cap->device_caps = V4L2_CAP_STREAMING;
668 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
4af81310
SN
669 return 0;
670}
671
672static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
673 struct v4l2_fmtdesc *f)
674{
675 const struct fimc_fmt *fmt;
676
677 if (f->index >= ARRAY_SIZE(fimc_lite_formats))
678 return -EINVAL;
679
680 fmt = &fimc_lite_formats[f->index];
681 strlcpy(f->description, fmt->name, sizeof(f->description));
682 f->pixelformat = fmt->fourcc;
683
684 return 0;
685}
686
687static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
688 struct v4l2_format *f)
689{
690 struct fimc_lite *fimc = video_drvdata(file);
691 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
692 struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
693 struct flite_frame *frame = &fimc->out_frame;
e90ad659 694 const struct fimc_fmt *fmt = frame->fmt;
4af81310
SN
695
696 plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
697 plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
698
699 pixm->num_planes = fmt->memplanes;
700 pixm->pixelformat = fmt->fourcc;
701 pixm->width = frame->f_width;
702 pixm->height = frame->f_height;
703 pixm->field = V4L2_FIELD_NONE;
1c26190a 704 pixm->colorspace = fmt->colorspace;
4af81310
SN
705 return 0;
706}
707
708static int fimc_lite_try_fmt(struct fimc_lite *fimc,
709 struct v4l2_pix_format_mplane *pixm,
710 const struct fimc_fmt **ffmt)
711{
4af81310 712 u32 bpl = pixm->plane_fmt[0].bytesperline;
9c8399c8 713 struct flite_drvdata *dd = fimc->dd;
e90ad659 714 const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
4af81310
SN
715 const struct fimc_fmt *fmt;
716
e90ad659
SN
717 if (WARN_ON(inp_fmt == NULL))
718 return -EINVAL;
719 /*
720 * We allow some flexibility only for YUV formats. In case of raw
721 * raw Bayer the FIMC-LITE's output format must match its camera
722 * interface input format.
723 */
724 if (inp_fmt->flags & FMT_FLAGS_YUV)
725 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
726 inp_fmt->flags, 0);
727 else
728 fmt = inp_fmt;
729
4af81310
SN
730 if (WARN_ON(fmt == NULL))
731 return -EINVAL;
732 if (ffmt)
733 *ffmt = fmt;
9c8399c8
SN
734 v4l_bound_align_image(&pixm->width, 8, dd->max_width,
735 ffs(dd->out_width_align) - 1,
736 &pixm->height, 0, dd->max_height, 0, 0);
4af81310
SN
737
738 if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
739 pixm->plane_fmt[0].bytesperline = (pixm->width *
740 fmt->depth[0]) / 8;
741
742 if (pixm->plane_fmt[0].sizeimage == 0)
743 pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
744 fmt->depth[0]) / 8;
745 pixm->num_planes = fmt->memplanes;
746 pixm->pixelformat = fmt->fourcc;
1c26190a 747 pixm->colorspace = fmt->colorspace;
4af81310
SN
748 pixm->field = V4L2_FIELD_NONE;
749 return 0;
750}
751
752static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
753 struct v4l2_format *f)
754{
755 struct fimc_lite *fimc = video_drvdata(file);
4af81310
SN
756 return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
757}
758
759static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
760 struct v4l2_format *f)
761{
762 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
763 struct fimc_lite *fimc = video_drvdata(file);
764 struct flite_frame *frame = &fimc->out_frame;
765 const struct fimc_fmt *fmt = NULL;
766 int ret;
767
768 if (vb2_is_busy(&fimc->vb_queue))
769 return -EBUSY;
770
771 ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
772 if (ret < 0)
773 return ret;
774
e90ad659 775 frame->fmt = fmt;
4af81310
SN
776 fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
777 pixm->plane_fmt[0].sizeimage);
778 frame->f_width = pixm->width;
779 frame->f_height = pixm->height;
780
781 return 0;
782}
783
784static int fimc_pipeline_validate(struct fimc_lite *fimc)
785{
786 struct v4l2_subdev *sd = &fimc->subdev;
787 struct v4l2_subdev_format sink_fmt, src_fmt;
788 struct media_pad *pad;
789 int ret;
790
791 while (1) {
792 /* Retrieve format at the sink pad */
793 pad = &sd->entity.pads[0];
794 if (!(pad->flags & MEDIA_PAD_FL_SINK))
795 break;
796 /* Don't call FIMC subdev operation to avoid nested locking */
797 if (sd == &fimc->subdev) {
798 struct flite_frame *ff = &fimc->out_frame;
799 sink_fmt.format.width = ff->f_width;
800 sink_fmt.format.height = ff->f_height;
e90ad659 801 sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
4af81310
SN
802 } else {
803 sink_fmt.pad = pad->index;
804 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
805 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
806 &sink_fmt);
807 if (ret < 0 && ret != -ENOIOCTLCMD)
808 return -EPIPE;
809 }
810 /* Retrieve format at the source pad */
1bddf1b3 811 pad = media_entity_remote_pad(pad);
4af81310
SN
812 if (pad == NULL ||
813 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
814 break;
815
816 sd = media_entity_to_v4l2_subdev(pad->entity);
817 src_fmt.pad = pad->index;
818 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
819 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
820 if (ret < 0 && ret != -ENOIOCTLCMD)
821 return -EPIPE;
822
823 if (src_fmt.format.width != sink_fmt.format.width ||
824 src_fmt.format.height != sink_fmt.format.height ||
825 src_fmt.format.code != sink_fmt.format.code)
826 return -EPIPE;
827 }
828 return 0;
829}
830
831static int fimc_lite_streamon(struct file *file, void *priv,
832 enum v4l2_buf_type type)
833{
834 struct fimc_lite *fimc = video_drvdata(file);
bc7584b0 835 struct media_entity *entity = &fimc->ve.vdev.entity;
4af81310
SN
836 int ret;
837
838 if (fimc_lite_active(fimc))
839 return -EBUSY;
840
403dfbec 841 ret = media_entity_pipeline_start(entity, &fimc->ve.pipe->mp);
a1a5861b
SK
842 if (ret < 0)
843 return ret;
4af81310
SN
844
845 ret = fimc_pipeline_validate(fimc);
ee12b049
SN
846 if (ret < 0)
847 goto err_p_stop;
4af81310 848
045a1fac 849 fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity);
756e6e14 850
ee12b049 851 ret = vb2_ioctl_streamon(file, priv, type);
9ea89e2b
SN
852 if (!ret) {
853 fimc->streaming = true;
ee12b049 854 return ret;
9ea89e2b
SN
855 }
856
ee12b049
SN
857err_p_stop:
858 media_entity_pipeline_stop(entity);
859 return 0;
4af81310
SN
860}
861
862static int fimc_lite_streamoff(struct file *file, void *priv,
863 enum v4l2_buf_type type)
864{
865 struct fimc_lite *fimc = video_drvdata(file);
4af81310
SN
866 int ret;
867
ee12b049 868 ret = vb2_ioctl_streamoff(file, priv, type);
9ea89e2b
SN
869 if (ret < 0)
870 return ret;
871
bc7584b0 872 media_entity_pipeline_stop(&fimc->ve.vdev.entity);
9ea89e2b
SN
873 fimc->streaming = false;
874 return 0;
4af81310
SN
875}
876
877static int fimc_lite_reqbufs(struct file *file, void *priv,
878 struct v4l2_requestbuffers *reqbufs)
879{
880 struct fimc_lite *fimc = video_drvdata(file);
881 int ret;
882
883 reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
ee12b049 884 ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
f68247fc 885 if (!ret)
4af81310
SN
886 fimc->reqbufs_count = reqbufs->count;
887
888 return ret;
889}
890
4af81310
SN
891/* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
892static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
893{
894 if (a->left < b->left || a->top < b->top)
895 return 0;
896 if (a->left + a->width > b->left + b->width)
897 return 0;
898 if (a->top + a->height > b->top + b->height)
899 return 0;
900
901 return 1;
902}
903
904static int fimc_lite_g_selection(struct file *file, void *fh,
905 struct v4l2_selection *sel)
906{
907 struct fimc_lite *fimc = video_drvdata(file);
908 struct flite_frame *f = &fimc->out_frame;
909
910 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
911 return -EINVAL;
912
913 switch (sel->target) {
914 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
915 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
916 sel->r.left = 0;
917 sel->r.top = 0;
918 sel->r.width = f->f_width;
919 sel->r.height = f->f_height;
920 return 0;
921
c1334823 922 case V4L2_SEL_TGT_COMPOSE:
4af81310
SN
923 sel->r = f->rect;
924 return 0;
925 }
926
927 return -EINVAL;
928}
929
930static int fimc_lite_s_selection(struct file *file, void *fh,
931 struct v4l2_selection *sel)
932{
933 struct fimc_lite *fimc = video_drvdata(file);
934 struct flite_frame *f = &fimc->out_frame;
935 struct v4l2_rect rect = sel->r;
936 unsigned long flags;
937
938 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
c1334823 939 sel->target != V4L2_SEL_TGT_COMPOSE)
4af81310
SN
940 return -EINVAL;
941
942 fimc_lite_try_compose(fimc, &rect);
943
944 if ((sel->flags & V4L2_SEL_FLAG_LE) &&
945 !enclosed_rectangle(&rect, &sel->r))
946 return -ERANGE;
947
948 if ((sel->flags & V4L2_SEL_FLAG_GE) &&
949 !enclosed_rectangle(&sel->r, &rect))
950 return -ERANGE;
951
952 sel->r = rect;
953 spin_lock_irqsave(&fimc->slock, flags);
954 f->rect = rect;
955 set_bit(ST_FLITE_CONFIG, &fimc->state);
956 spin_unlock_irqrestore(&fimc->slock, flags);
957
958 return 0;
959}
960
961static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
793ad32d 962 .vidioc_querycap = fimc_lite_querycap,
4af81310
SN
963 .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
964 .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
965 .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
966 .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
967 .vidioc_g_selection = fimc_lite_g_selection,
968 .vidioc_s_selection = fimc_lite_s_selection,
969 .vidioc_reqbufs = fimc_lite_reqbufs,
ee12b049
SN
970 .vidioc_querybuf = vb2_ioctl_querybuf,
971 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
972 .vidioc_create_bufs = vb2_ioctl_create_bufs,
973 .vidioc_qbuf = vb2_ioctl_qbuf,
974 .vidioc_dqbuf = vb2_ioctl_dqbuf,
4af81310
SN
975 .vidioc_streamon = fimc_lite_streamon,
976 .vidioc_streamoff = fimc_lite_streamoff,
977};
978
979/* Capture subdev media entity operations */
980static int fimc_lite_link_setup(struct media_entity *entity,
981 const struct media_pad *local,
982 const struct media_pad *remote, u32 flags)
983{
984 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
985 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
986 unsigned int remote_ent_type = media_entity_type(remote->entity);
6319d6a0 987 int ret = 0;
4af81310
SN
988
989 if (WARN_ON(fimc == NULL))
990 return 0;
991
969e877c 992 v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
6319d6a0 993 __func__, remote->entity->name, local->entity->name,
4af81310
SN
994 flags, fimc->source_subdev_grp_id);
995
6319d6a0
SN
996 switch (local->index) {
997 case FLITE_SD_PAD_SINK:
998 if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) {
999 ret = -EINVAL;
1000 break;
1001 }
4af81310 1002 if (flags & MEDIA_LNK_FL_ENABLED) {
6319d6a0
SN
1003 if (fimc->source_subdev_grp_id == 0)
1004 fimc->source_subdev_grp_id = sd->grp_id;
1005 else
1006 ret = -EBUSY;
1007 } else {
1008 fimc->source_subdev_grp_id = 0;
1009 fimc->sensor = NULL;
4af81310 1010 }
6319d6a0 1011 break;
4af81310 1012
6319d6a0
SN
1013 case FLITE_SD_PAD_SOURCE_DMA:
1014 if (!(flags & MEDIA_LNK_FL_ENABLED))
03878bb4 1015 atomic_set(&fimc->out_path, FIMC_IO_NONE);
6319d6a0 1016 else if (remote_ent_type == MEDIA_ENT_T_DEVNODE)
03878bb4 1017 atomic_set(&fimc->out_path, FIMC_IO_DMA);
6319d6a0
SN
1018 else
1019 ret = -EINVAL;
4af81310
SN
1020 break;
1021
6319d6a0
SN
1022 case FLITE_SD_PAD_SOURCE_ISP:
1023 if (!(flags & MEDIA_LNK_FL_ENABLED))
03878bb4 1024 atomic_set(&fimc->out_path, FIMC_IO_NONE);
6319d6a0 1025 else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
03878bb4 1026 atomic_set(&fimc->out_path, FIMC_IO_ISP);
4af81310 1027 else
6319d6a0 1028 ret = -EINVAL;
4af81310
SN
1029 break;
1030
1031 default:
1032 v4l2_err(sd, "Invalid pad index\n");
6319d6a0 1033 ret = -EINVAL;
4af81310 1034 }
03878bb4 1035 mb();
4af81310 1036
6319d6a0 1037 return ret;
4af81310
SN
1038}
1039
1040static const struct media_entity_operations fimc_lite_subdev_media_ops = {
1041 .link_setup = fimc_lite_link_setup,
1042};
1043
1044static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
f7234138 1045 struct v4l2_subdev_pad_config *cfg,
4af81310
SN
1046 struct v4l2_subdev_mbus_code_enum *code)
1047{
1048 const struct fimc_fmt *fmt;
1049
e90ad659 1050 fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
4af81310
SN
1051 if (!fmt)
1052 return -EINVAL;
1053 code->code = fmt->mbus_code;
1054 return 0;
1055}
1056
b1d2dc5c 1057static struct v4l2_mbus_framefmt *__fimc_lite_subdev_get_try_fmt(
f7234138
HV
1058 struct v4l2_subdev *sd,
1059 struct v4l2_subdev_pad_config *cfg, unsigned int pad)
b1d2dc5c
SN
1060{
1061 if (pad != FLITE_SD_PAD_SINK)
1062 pad = FLITE_SD_PAD_SOURCE_DMA;
1063
f7234138 1064 return v4l2_subdev_get_try_format(sd, cfg, pad);
b1d2dc5c
SN
1065}
1066
4af81310 1067static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
f7234138 1068 struct v4l2_subdev_pad_config *cfg,
4af81310
SN
1069 struct v4l2_subdev_format *fmt)
1070{
1071 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1072 struct v4l2_mbus_framefmt *mf = &fmt->format;
e90ad659 1073 struct flite_frame *f = &fimc->inp_frame;
4af81310
SN
1074
1075 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
f7234138 1076 mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad);
4af81310
SN
1077 fmt->format = *mf;
1078 return 0;
1079 }
4af81310
SN
1080
1081 mutex_lock(&fimc->lock);
1c26190a 1082 mf->colorspace = f->fmt->colorspace;
e90ad659 1083 mf->code = f->fmt->mbus_code;
4af81310
SN
1084
1085 if (fmt->pad == FLITE_SD_PAD_SINK) {
1086 /* full camera input frame size */
1087 mf->width = f->f_width;
1088 mf->height = f->f_height;
1089 } else {
1090 /* crop size */
1091 mf->width = f->rect.width;
1092 mf->height = f->rect.height;
1093 }
1094 mutex_unlock(&fimc->lock);
1095 return 0;
1096}
1097
1098static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
f7234138 1099 struct v4l2_subdev_pad_config *cfg,
4af81310
SN
1100 struct v4l2_subdev_format *fmt)
1101{
1102 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1103 struct v4l2_mbus_framefmt *mf = &fmt->format;
1104 struct flite_frame *sink = &fimc->inp_frame;
9356ac76 1105 struct flite_frame *source = &fimc->out_frame;
4af81310
SN
1106 const struct fimc_fmt *ffmt;
1107
969e877c 1108 v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
4af81310
SN
1109 fmt->pad, mf->code, mf->width, mf->height);
1110
4af81310
SN
1111 mutex_lock(&fimc->lock);
1112
03878bb4
SN
1113 if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
1114 sd->entity.stream_count > 0) ||
1115 (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
1116 vb2_is_busy(&fimc->vb_queue))) {
4af81310
SN
1117 mutex_unlock(&fimc->lock);
1118 return -EBUSY;
1119 }
1120
f7234138 1121 ffmt = fimc_lite_subdev_try_fmt(fimc, cfg, fmt);
4af81310
SN
1122
1123 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
b1d2dc5c
SN
1124 struct v4l2_mbus_framefmt *src_fmt;
1125
f7234138 1126 mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad);
4af81310 1127 *mf = fmt->format;
b1d2dc5c
SN
1128
1129 if (fmt->pad == FLITE_SD_PAD_SINK) {
1130 unsigned int pad = FLITE_SD_PAD_SOURCE_DMA;
f7234138 1131 src_fmt = __fimc_lite_subdev_get_try_fmt(sd, cfg, pad);
b1d2dc5c
SN
1132 *src_fmt = *mf;
1133 }
1134
4af81310
SN
1135 mutex_unlock(&fimc->lock);
1136 return 0;
1137 }
1138
1139 if (fmt->pad == FLITE_SD_PAD_SINK) {
1140 sink->f_width = mf->width;
1141 sink->f_height = mf->height;
e90ad659 1142 sink->fmt = ffmt;
4af81310
SN
1143 /* Set sink crop rectangle */
1144 sink->rect.width = mf->width;
1145 sink->rect.height = mf->height;
1146 sink->rect.left = 0;
1147 sink->rect.top = 0;
9356ac76
SN
1148 /* Reset source format and crop rectangle */
1149 source->rect = sink->rect;
1150 source->f_width = mf->width;
1151 source->f_height = mf->height;
4af81310
SN
1152 }
1153
1154 mutex_unlock(&fimc->lock);
1155 return 0;
1156}
1157
1158static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
f7234138 1159 struct v4l2_subdev_pad_config *cfg,
4af81310
SN
1160 struct v4l2_subdev_selection *sel)
1161{
1162 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1163 struct flite_frame *f = &fimc->inp_frame;
1164
5689b288
SA
1165 if ((sel->target != V4L2_SEL_TGT_CROP &&
1166 sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
1167 sel->pad != FLITE_SD_PAD_SINK)
4af81310
SN
1168 return -EINVAL;
1169
1170 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
f7234138 1171 sel->r = *v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
4af81310
SN
1172 return 0;
1173 }
1174
1175 mutex_lock(&fimc->lock);
5689b288 1176 if (sel->target == V4L2_SEL_TGT_CROP) {
4af81310
SN
1177 sel->r = f->rect;
1178 } else {
1179 sel->r.left = 0;
1180 sel->r.top = 0;
1181 sel->r.width = f->f_width;
1182 sel->r.height = f->f_height;
1183 }
1184 mutex_unlock(&fimc->lock);
1185
969e877c 1186 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
4af81310
SN
1187 __func__, f->rect.left, f->rect.top, f->rect.width,
1188 f->rect.height, f->f_width, f->f_height);
1189
1190 return 0;
1191}
1192
1193static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
f7234138 1194 struct v4l2_subdev_pad_config *cfg,
4af81310
SN
1195 struct v4l2_subdev_selection *sel)
1196{
1197 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1198 struct flite_frame *f = &fimc->inp_frame;
1199 int ret = 0;
1200
5689b288 1201 if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
4af81310
SN
1202 return -EINVAL;
1203
1204 mutex_lock(&fimc->lock);
1205 fimc_lite_try_crop(fimc, &sel->r);
1206
1207 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
f7234138 1208 *v4l2_subdev_get_try_crop(sd, cfg, sel->pad) = sel->r;
4af81310
SN
1209 } else {
1210 unsigned long flags;
1211 spin_lock_irqsave(&fimc->slock, flags);
1212 f->rect = sel->r;
1213 /* Same crop rectangle on the source pad */
1214 fimc->out_frame.rect = sel->r;
1215 set_bit(ST_FLITE_CONFIG, &fimc->state);
1216 spin_unlock_irqrestore(&fimc->slock, flags);
1217 }
1218 mutex_unlock(&fimc->lock);
1219
969e877c 1220 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
4af81310
SN
1221 __func__, f->rect.left, f->rect.top, f->rect.width,
1222 f->rect.height, f->f_width, f->f_height);
1223
1224 return ret;
1225}
1226
1227static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
1228{
1229 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
6319d6a0
SN
1230 unsigned long flags;
1231 int ret;
4af81310 1232
6319d6a0
SN
1233 /*
1234 * Find sensor subdev linked to FIMC-LITE directly or through
1235 * MIPI-CSIS. This is required for configuration where FIMC-LITE
1236 * is used as a subdev only and feeds data internally to FIMC-IS.
1237 * The pipeline links are protected through entity.stream_count
1238 * so there is no need to take the media graph mutex here.
1239 */
045a1fac 1240 fimc->sensor = fimc_find_remote_sensor(&sd->entity);
6319d6a0 1241
03878bb4 1242 if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
4af81310
SN
1243 return -ENOIOCTLCMD;
1244
03878bb4 1245 mutex_lock(&fimc->lock);
6319d6a0
SN
1246 if (on) {
1247 flite_hw_reset(fimc);
1248 ret = fimc_lite_hw_init(fimc, true);
1249 if (!ret) {
1250 spin_lock_irqsave(&fimc->slock, flags);
1251 flite_hw_capture_start(fimc);
1252 spin_unlock_irqrestore(&fimc->slock, flags);
1253 }
1254 } else {
1255 set_bit(ST_FLITE_OFF, &fimc->state);
4af81310 1256
6319d6a0
SN
1257 spin_lock_irqsave(&fimc->slock, flags);
1258 flite_hw_capture_stop(fimc);
1259 spin_unlock_irqrestore(&fimc->slock, flags);
1260
1261 ret = wait_event_timeout(fimc->irq_queue,
1262 !test_bit(ST_FLITE_OFF, &fimc->state),
1263 msecs_to_jiffies(200));
1264 if (ret == 0)
1265 v4l2_err(sd, "s_stream(0) timeout\n");
1266 clear_bit(ST_FLITE_RUN, &fimc->state);
1267 }
1268
1269 mutex_unlock(&fimc->lock);
1270 return ret;
4af81310
SN
1271}
1272
4af81310
SN
1273static int fimc_lite_log_status(struct v4l2_subdev *sd)
1274{
1275 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1276
1277 flite_hw_dump_regs(fimc, __func__);
1278 return 0;
1279}
1280
1281static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
1282{
1283 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1284 struct vb2_queue *q = &fimc->vb_queue;
bc7584b0 1285 struct video_device *vfd = &fimc->ve.vdev;
4af81310
SN
1286 int ret;
1287
1bcd7041 1288 memset(vfd, 0, sizeof(*vfd));
03878bb4 1289 atomic_set(&fimc->out_path, FIMC_IO_DMA);
4af81310 1290
4af81310
SN
1291 snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
1292 fimc->index);
1293
1294 vfd->fops = &fimc_lite_fops;
1295 vfd->ioctl_ops = &fimc_lite_ioctl_ops;
1296 vfd->v4l2_dev = sd->v4l2_dev;
1297 vfd->minor = -1;
1bcd7041 1298 vfd->release = video_device_release_empty;
ee12b049 1299 vfd->queue = q;
4af81310
SN
1300 fimc->reqbufs_count = 0;
1301
1302 INIT_LIST_HEAD(&fimc->pending_buf_q);
1303 INIT_LIST_HEAD(&fimc->active_buf_q);
1304
1305 memset(q, 0, sizeof(*q));
1306 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1307 q->io_modes = VB2_MMAP | VB2_USERPTR;
1308 q->ops = &fimc_lite_qops;
1309 q->mem_ops = &vb2_dma_contig_memops;
1310 q->buf_struct_size = sizeof(struct flite_buffer);
1311 q->drv_priv = fimc;
ade48681 1312 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
ee12b049 1313 q->lock = &fimc->lock;
4af81310 1314
41fd087f
SN
1315 ret = vb2_queue_init(q);
1316 if (ret < 0)
1317 return ret;
4af81310
SN
1318
1319 fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
1320 ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
1bcd7041
SN
1321 if (ret < 0)
1322 return ret;
4af81310
SN
1323
1324 video_set_drvdata(vfd, fimc);
403dfbec 1325 fimc->ve.pipe = v4l2_get_subdev_hostdata(sd);
4af81310
SN
1326
1327 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
1bcd7041
SN
1328 if (ret < 0) {
1329 media_entity_cleanup(&vfd->entity);
403dfbec 1330 fimc->ve.pipe = NULL;
1bcd7041
SN
1331 return ret;
1332 }
4af81310
SN
1333
1334 v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
1335 vfd->name, video_device_node_name(vfd));
1336 return 0;
4af81310
SN
1337}
1338
1339static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
1340{
1341 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1342
1343 if (fimc == NULL)
1344 return;
1345
26d63d13
SN
1346 mutex_lock(&fimc->lock);
1347
bc7584b0
SN
1348 if (video_is_registered(&fimc->ve.vdev)) {
1349 video_unregister_device(&fimc->ve.vdev);
1350 media_entity_cleanup(&fimc->ve.vdev.entity);
403dfbec 1351 fimc->ve.pipe = NULL;
4af81310 1352 }
26d63d13
SN
1353
1354 mutex_unlock(&fimc->lock);
4af81310
SN
1355}
1356
1357static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
1358 .registered = fimc_lite_subdev_registered,
1359 .unregistered = fimc_lite_subdev_unregistered,
1360};
1361
1362static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
1363 .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
1364 .get_selection = fimc_lite_subdev_get_selection,
1365 .set_selection = fimc_lite_subdev_set_selection,
1366 .get_fmt = fimc_lite_subdev_get_fmt,
1367 .set_fmt = fimc_lite_subdev_set_fmt,
1368};
1369
1370static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
1371 .s_stream = fimc_lite_subdev_s_stream,
1372};
1373
1374static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
4af81310
SN
1375 .log_status = fimc_lite_log_status,
1376};
1377
1378static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
1379 .core = &fimc_lite_core_ops,
1380 .video = &fimc_lite_subdev_video_ops,
1381 .pad = &fimc_lite_subdev_pad_ops,
1382};
1383
1384static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
1385{
1386 struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
1387 ctrl_handler);
1388 set_bit(ST_FLITE_CONFIG, &fimc->state);
1389 return 0;
1390}
1391
1392static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
1393 .s_ctrl = fimc_lite_s_ctrl,
1394};
1395
1396static const struct v4l2_ctrl_config fimc_lite_ctrl = {
1397 .ops = &fimc_lite_ctrl_ops,
1398 .id = V4L2_CTRL_CLASS_USER | 0x1001,
1399 .type = V4L2_CTRL_TYPE_BOOLEAN,
1400 .name = "Test Pattern 640x480",
4cec1893 1401 .step = 1,
4af81310
SN
1402};
1403
a055d970
SN
1404static void fimc_lite_set_default_config(struct fimc_lite *fimc)
1405{
1406 struct flite_frame *sink = &fimc->inp_frame;
1407 struct flite_frame *source = &fimc->out_frame;
1408
1409 sink->fmt = &fimc_lite_formats[0];
1410 sink->f_width = FLITE_DEFAULT_WIDTH;
1411 sink->f_height = FLITE_DEFAULT_HEIGHT;
1412
1413 sink->rect.width = FLITE_DEFAULT_WIDTH;
1414 sink->rect.height = FLITE_DEFAULT_HEIGHT;
1415 sink->rect.left = 0;
1416 sink->rect.top = 0;
1417
1418 *source = *sink;
1419}
1420
4af81310
SN
1421static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
1422{
1423 struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
1424 struct v4l2_subdev *sd = &fimc->subdev;
1425 int ret;
1426
1427 v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
5a66561f 1428 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
4af81310
SN
1429 snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
1430
6319d6a0
SN
1431 fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1432 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
1433 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
1434 ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM,
4af81310
SN
1435 fimc->subdev_pads, 0);
1436 if (ret)
1437 return ret;
1438
1439 v4l2_ctrl_handler_init(handler, 1);
1440 fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
1441 NULL);
1442 if (handler->error) {
1443 media_entity_cleanup(&sd->entity);
1444 return handler->error;
1445 }
1446
1447 sd->ctrl_handler = handler;
1448 sd->internal_ops = &fimc_lite_subdev_internal_ops;
1449 sd->entity.ops = &fimc_lite_subdev_media_ops;
a59ed48f 1450 sd->owner = THIS_MODULE;
4af81310
SN
1451 v4l2_set_subdevdata(sd, fimc);
1452
1453 return 0;
1454}
1455
1456static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
1457{
1458 struct v4l2_subdev *sd = &fimc->subdev;
1459
1460 v4l2_device_unregister_subdev(sd);
1461 media_entity_cleanup(&sd->entity);
1462 v4l2_ctrl_handler_free(&fimc->ctrl_handler);
1463 v4l2_set_subdevdata(sd, NULL);
1464}
1465
1466static void fimc_lite_clk_put(struct fimc_lite *fimc)
1467{
24f99dd0 1468 if (IS_ERR(fimc->clock))
4af81310
SN
1469 return;
1470
1471 clk_unprepare(fimc->clock);
1472 clk_put(fimc->clock);
24f99dd0 1473 fimc->clock = ERR_PTR(-EINVAL);
4af81310
SN
1474}
1475
1476static int fimc_lite_clk_get(struct fimc_lite *fimc)
1477{
1478 int ret;
1479
1480 fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
1481 if (IS_ERR(fimc->clock))
1482 return PTR_ERR(fimc->clock);
1483
1484 ret = clk_prepare(fimc->clock);
1485 if (ret < 0) {
1486 clk_put(fimc->clock);
24f99dd0 1487 fimc->clock = ERR_PTR(-EINVAL);
4af81310
SN
1488 }
1489 return ret;
1490}
1491
eb62d9e9
SN
1492static const struct of_device_id flite_of_match[];
1493
4c62e976 1494static int fimc_lite_probe(struct platform_device *pdev)
4af81310 1495{
eb62d9e9
SN
1496 struct flite_drvdata *drv_data = NULL;
1497 struct device *dev = &pdev->dev;
1498 const struct of_device_id *of_id;
4af81310
SN
1499 struct fimc_lite *fimc;
1500 struct resource *res;
1501 int ret;
1502
6a40cbbe
SK
1503 if (!dev->of_node)
1504 return -ENODEV;
1505
eb62d9e9 1506 fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
4af81310
SN
1507 if (!fimc)
1508 return -ENOMEM;
1509
6a40cbbe
SK
1510 of_id = of_match_node(flite_of_match, dev->of_node);
1511 if (of_id)
1512 drv_data = (struct flite_drvdata *)of_id->data;
1513 fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
eb62d9e9 1514
086eca29
SN
1515 if (!drv_data || fimc->index >= drv_data->num_instances ||
1516 fimc->index < 0) {
1517 dev_err(dev, "Wrong %s node alias\n",
1518 dev->of_node->full_name);
eb62d9e9 1519 return -EINVAL;
086eca29 1520 }
eb62d9e9 1521
9c8399c8 1522 fimc->dd = drv_data;
4af81310
SN
1523 fimc->pdev = pdev;
1524
1525 init_waitqueue_head(&fimc->irq_queue);
1526 spin_lock_init(&fimc->slock);
1527 mutex_init(&fimc->lock);
1528
1529 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
eb62d9e9 1530 fimc->regs = devm_ioremap_resource(dev, res);
f23999ec
TR
1531 if (IS_ERR(fimc->regs))
1532 return PTR_ERR(fimc->regs);
4af81310
SN
1533
1534 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1535 if (res == NULL) {
eb62d9e9 1536 dev_err(dev, "Failed to get IRQ resource\n");
4af81310
SN
1537 return -ENXIO;
1538 }
1539
1540 ret = fimc_lite_clk_get(fimc);
1541 if (ret)
1542 return ret;
1543
eb62d9e9
SN
1544 ret = devm_request_irq(dev, res->start, flite_irq_handler,
1545 0, dev_name(dev), fimc);
4af81310 1546 if (ret) {
eb62d9e9 1547 dev_err(dev, "Failed to install irq (%d)\n", ret);
84f14456 1548 goto err_clk_put;
4af81310
SN
1549 }
1550
1551 /* The video node will be created within the subdev's registered() op */
1552 ret = fimc_lite_create_capture_subdev(fimc);
1553 if (ret)
84f14456 1554 goto err_clk_put;
4af81310
SN
1555
1556 platform_set_drvdata(pdev, fimc);
eb62d9e9 1557 pm_runtime_enable(dev);
84f14456
SN
1558
1559 if (!pm_runtime_enabled(dev)) {
1560 ret = clk_enable(fimc->clock);
1561 if (ret < 0)
a27a19d6 1562 goto err_sd;
84f14456 1563 }
4af81310 1564
eb62d9e9 1565 fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
4af81310
SN
1566 if (IS_ERR(fimc->alloc_ctx)) {
1567 ret = PTR_ERR(fimc->alloc_ctx);
84f14456 1568 goto err_clk_dis;
4af81310 1569 }
a055d970 1570
a055d970
SN
1571 fimc_lite_set_default_config(fimc);
1572
eb62d9e9 1573 dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
4af81310
SN
1574 fimc->index);
1575 return 0;
84f14456
SN
1576
1577err_clk_dis:
a27a19d6
SN
1578 if (!pm_runtime_enabled(dev))
1579 clk_disable(fimc->clock);
4af81310
SN
1580err_sd:
1581 fimc_lite_unregister_capture_subdev(fimc);
84f14456 1582err_clk_put:
4af81310
SN
1583 fimc_lite_clk_put(fimc);
1584 return ret;
1585}
1586
e243c7c1 1587#ifdef CONFIG_PM
4af81310
SN
1588static int fimc_lite_runtime_resume(struct device *dev)
1589{
1590 struct fimc_lite *fimc = dev_get_drvdata(dev);
1591
1592 clk_enable(fimc->clock);
1593 return 0;
1594}
1595
1596static int fimc_lite_runtime_suspend(struct device *dev)
1597{
1598 struct fimc_lite *fimc = dev_get_drvdata(dev);
1599
1600 clk_disable(fimc->clock);
1601 return 0;
1602}
656e62dc 1603#endif
4af81310
SN
1604
1605#ifdef CONFIG_PM_SLEEP
1606static int fimc_lite_resume(struct device *dev)
1607{
1608 struct fimc_lite *fimc = dev_get_drvdata(dev);
1609 struct flite_buffer *buf;
1610 unsigned long flags;
1611 int i;
1612
1613 spin_lock_irqsave(&fimc->slock, flags);
1614 if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
1615 !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
1616 spin_unlock_irqrestore(&fimc->slock, flags);
1617 return 0;
1618 }
1619 flite_hw_reset(fimc);
1620 spin_unlock_irqrestore(&fimc->slock, flags);
1621
1622 if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
1623 return 0;
1624
1625 INIT_LIST_HEAD(&fimc->active_buf_q);
403dfbec 1626 fimc_pipeline_call(&fimc->ve, open,
bc7584b0 1627 &fimc->ve.vdev.entity, false);
03878bb4 1628 fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
4af81310
SN
1629 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
1630
1631 for (i = 0; i < fimc->reqbufs_count; i++) {
1632 if (list_empty(&fimc->pending_buf_q))
1633 break;
1634 buf = fimc_lite_pending_queue_pop(fimc);
1635 buffer_queue(&buf->vb);
1636 }
1637 return 0;
1638}
1639
1640static int fimc_lite_suspend(struct device *dev)
1641{
1642 struct fimc_lite *fimc = dev_get_drvdata(dev);
1643 bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
1644 int ret;
1645
1646 if (test_and_set_bit(ST_LPM, &fimc->state))
1647 return 0;
1648
1649 ret = fimc_lite_stop_capture(fimc, suspend);
316efab3 1650 if (ret < 0 || !fimc_lite_active(fimc))
4af81310
SN
1651 return ret;
1652
403dfbec 1653 return fimc_pipeline_call(&fimc->ve, close);
4af81310
SN
1654}
1655#endif /* CONFIG_PM_SLEEP */
1656
4c62e976 1657static int fimc_lite_remove(struct platform_device *pdev)
4af81310
SN
1658{
1659 struct fimc_lite *fimc = platform_get_drvdata(pdev);
1660 struct device *dev = &pdev->dev;
1661
1662 pm_runtime_disable(dev);
1663 pm_runtime_set_suspended(dev);
1664 fimc_lite_unregister_capture_subdev(fimc);
1665 vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
1666 fimc_lite_clk_put(fimc);
1667
1668 dev_info(dev, "Driver unloaded\n");
1669 return 0;
1670}
1671
eb62d9e9
SN
1672static const struct dev_pm_ops fimc_lite_pm_ops = {
1673 SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
1674 SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
1675 NULL)
1676};
1677
9c8399c8
SN
1678/* EXYNOS4212, EXYNOS4412 */
1679static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
4af81310
SN
1680 .max_width = 8192,
1681 .max_height = 8192,
1682 .out_width_align = 8,
1683 .win_hor_offs_align = 2,
1684 .out_hor_offs_align = 8,
086eca29
SN
1685 .max_dma_bufs = 1,
1686 .num_instances = 2,
1687};
1688
1689/* EXYNOS5250 */
1690static struct flite_drvdata fimc_lite_drvdata_exynos5 = {
1691 .max_width = 8192,
1692 .max_height = 8192,
1693 .out_width_align = 8,
1694 .win_hor_offs_align = 2,
1695 .out_hor_offs_align = 8,
1696 .max_dma_bufs = 32,
1697 .num_instances = 3,
4af81310
SN
1698};
1699
eb62d9e9
SN
1700static const struct of_device_id flite_of_match[] = {
1701 {
1702 .compatible = "samsung,exynos4212-fimc-lite",
1703 .data = &fimc_lite_drvdata_exynos4,
1704 },
086eca29
SN
1705 {
1706 .compatible = "samsung,exynos5250-fimc-lite",
1707 .data = &fimc_lite_drvdata_exynos5,
1708 },
eb62d9e9 1709 { /* sentinel */ },
4af81310 1710};
eb62d9e9 1711MODULE_DEVICE_TABLE(of, flite_of_match);
4af81310
SN
1712
1713static struct platform_driver fimc_lite_driver = {
1714 .probe = fimc_lite_probe,
4c62e976 1715 .remove = fimc_lite_remove,
4af81310 1716 .driver = {
eb62d9e9 1717 .of_match_table = flite_of_match,
4af81310 1718 .name = FIMC_LITE_DRV_NAME,
4af81310
SN
1719 .pm = &fimc_lite_pm_ops,
1720 }
1721};
1722module_platform_driver(fimc_lite_driver);
1723MODULE_LICENSE("GPL");
1724MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);