Commit | Line | Data |
---|---|---|
4af81310 SN |
1 | /* |
2 | * Samsung EXYNOS FIMC-LITE (camera host interface) driver | |
3 | * | |
8a0c28f5 SN |
4 | * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd. |
5 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> | |
4af81310 SN |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__ | |
12 | ||
13 | #include <linux/bug.h> | |
4c8f0629 | 14 | #include <linux/clk.h> |
4af81310 SN |
15 | #include <linux/device.h> |
16 | #include <linux/errno.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/module.h> | |
eb62d9e9 | 21 | #include <linux/of.h> |
4af81310 SN |
22 | #include <linux/types.h> |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/pm_runtime.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/videodev2.h> | |
27 | ||
28 | #include <media/v4l2-device.h> | |
29 | #include <media/v4l2-ioctl.h> | |
30 | #include <media/v4l2-mem2mem.h> | |
31 | #include <media/videobuf2-core.h> | |
32 | #include <media/videobuf2-dma-contig.h> | |
b9ee31e6 | 33 | #include <media/s5p_fimc.h> |
4af81310 | 34 | |
045a1fac | 35 | #include "common.h" |
4c8f0629 | 36 | #include "fimc-core.h" |
b9ee31e6 | 37 | #include "fimc-lite.h" |
4af81310 SN |
38 | #include "fimc-lite-reg.h" |
39 | ||
40 | static int debug; | |
41 | module_param(debug, int, 0644); | |
42 | ||
43 | static const struct fimc_fmt fimc_lite_formats[] = { | |
44 | { | |
45 | .name = "YUV 4:2:2 packed, YCbYCr", | |
46 | .fourcc = V4L2_PIX_FMT_YUYV, | |
47 | .depth = { 16 }, | |
48 | .color = FIMC_FMT_YCBYCR422, | |
49 | .memplanes = 1, | |
50 | .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, | |
e90ad659 | 51 | .flags = FMT_FLAGS_YUV, |
4af81310 SN |
52 | }, { |
53 | .name = "YUV 4:2:2 packed, CbYCrY", | |
54 | .fourcc = V4L2_PIX_FMT_UYVY, | |
55 | .depth = { 16 }, | |
56 | .color = FIMC_FMT_CBYCRY422, | |
57 | .memplanes = 1, | |
58 | .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8, | |
e90ad659 | 59 | .flags = FMT_FLAGS_YUV, |
4af81310 SN |
60 | }, { |
61 | .name = "YUV 4:2:2 packed, CrYCbY", | |
62 | .fourcc = V4L2_PIX_FMT_VYUY, | |
63 | .depth = { 16 }, | |
64 | .color = FIMC_FMT_CRYCBY422, | |
65 | .memplanes = 1, | |
66 | .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8, | |
e90ad659 | 67 | .flags = FMT_FLAGS_YUV, |
4af81310 SN |
68 | }, { |
69 | .name = "YUV 4:2:2 packed, YCrYCb", | |
70 | .fourcc = V4L2_PIX_FMT_YVYU, | |
71 | .depth = { 16 }, | |
72 | .color = FIMC_FMT_YCRYCB422, | |
73 | .memplanes = 1, | |
74 | .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8, | |
e90ad659 | 75 | .flags = FMT_FLAGS_YUV, |
4af81310 SN |
76 | }, { |
77 | .name = "RAW8 (GRBG)", | |
78 | .fourcc = V4L2_PIX_FMT_SGRBG8, | |
79 | .depth = { 8 }, | |
80 | .color = FIMC_FMT_RAW8, | |
81 | .memplanes = 1, | |
82 | .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8, | |
e90ad659 | 83 | .flags = FMT_FLAGS_RAW_BAYER, |
4af81310 SN |
84 | }, { |
85 | .name = "RAW10 (GRBG)", | |
86 | .fourcc = V4L2_PIX_FMT_SGRBG10, | |
87 | .depth = { 10 }, | |
88 | .color = FIMC_FMT_RAW10, | |
89 | .memplanes = 1, | |
90 | .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10, | |
e90ad659 | 91 | .flags = FMT_FLAGS_RAW_BAYER, |
4af81310 SN |
92 | }, { |
93 | .name = "RAW12 (GRBG)", | |
94 | .fourcc = V4L2_PIX_FMT_SGRBG12, | |
95 | .depth = { 12 }, | |
96 | .color = FIMC_FMT_RAW12, | |
97 | .memplanes = 1, | |
98 | .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12, | |
e90ad659 | 99 | .flags = FMT_FLAGS_RAW_BAYER, |
4af81310 SN |
100 | }, |
101 | }; | |
102 | ||
103 | /** | |
104 | * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code | |
105 | * @pixelformat: fourcc to match, ignored if null | |
106 | * @mbus_code: media bus code to match, ignored if null | |
e90ad659 | 107 | * @mask: the color format flags to match |
4af81310 SN |
108 | * @index: index to the fimc_lite_formats array, ignored if negative |
109 | */ | |
110 | static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat, | |
e90ad659 | 111 | const u32 *mbus_code, unsigned int mask, int index) |
4af81310 SN |
112 | { |
113 | const struct fimc_fmt *fmt, *def_fmt = NULL; | |
114 | unsigned int i; | |
115 | int id = 0; | |
116 | ||
117 | if (index >= (int)ARRAY_SIZE(fimc_lite_formats)) | |
118 | return NULL; | |
119 | ||
120 | for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) { | |
121 | fmt = &fimc_lite_formats[i]; | |
e90ad659 SN |
122 | if (mask && !(fmt->flags & mask)) |
123 | continue; | |
4af81310 SN |
124 | if (pixelformat && fmt->fourcc == *pixelformat) |
125 | return fmt; | |
126 | if (mbus_code && fmt->mbus_code == *mbus_code) | |
127 | return fmt; | |
128 | if (index == id) | |
129 | def_fmt = fmt; | |
130 | id++; | |
131 | } | |
132 | return def_fmt; | |
133 | } | |
134 | ||
6319d6a0 | 135 | static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output) |
4af81310 | 136 | { |
4c8f0629 | 137 | struct fimc_source_info *si; |
4af81310 SN |
138 | unsigned long flags; |
139 | ||
756e6e14 | 140 | if (fimc->sensor == NULL) |
4af81310 SN |
141 | return -ENXIO; |
142 | ||
e90ad659 | 143 | if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL) |
4af81310 SN |
144 | return -EINVAL; |
145 | ||
6319d6a0 | 146 | /* Get sensor configuration data from the sensor subdev */ |
756e6e14 | 147 | si = v4l2_get_subdev_hostdata(fimc->sensor); |
4c8f0629 SN |
148 | if (!si) |
149 | return -EINVAL; | |
150 | ||
4af81310 SN |
151 | spin_lock_irqsave(&fimc->slock, flags); |
152 | ||
4c8f0629 | 153 | flite_hw_set_camera_bus(fimc, si); |
4af81310 SN |
154 | flite_hw_set_source_format(fimc, &fimc->inp_frame); |
155 | flite_hw_set_window_offset(fimc, &fimc->inp_frame); | |
6319d6a0 | 156 | flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output); |
4af81310 SN |
157 | flite_hw_set_interrupt_mask(fimc); |
158 | flite_hw_set_test_pattern(fimc, fimc->test_pattern->val); | |
159 | ||
160 | if (debug > 0) | |
161 | flite_hw_dump_regs(fimc, __func__); | |
162 | ||
163 | spin_unlock_irqrestore(&fimc->slock, flags); | |
164 | return 0; | |
165 | } | |
166 | ||
167 | /* | |
168 | * Reinitialize the driver so it is ready to start the streaming again. | |
169 | * Set fimc->state to indicate stream off and the hardware shut down state. | |
170 | * If not suspending (@suspend is false), return any buffers to videobuf2. | |
171 | * Otherwise put any owned buffers onto the pending buffers queue, so they | |
172 | * can be re-spun when the device is being resumed. Also perform FIMC | |
173 | * software reset and disable streaming on the whole pipeline if required. | |
174 | */ | |
175 | static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend) | |
176 | { | |
177 | struct flite_buffer *buf; | |
178 | unsigned long flags; | |
179 | bool streaming; | |
180 | ||
181 | spin_lock_irqsave(&fimc->slock, flags); | |
182 | streaming = fimc->state & (1 << ST_SENSOR_STREAM); | |
183 | ||
184 | fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF | | |
185 | 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM); | |
186 | if (suspend) | |
187 | fimc->state |= (1 << ST_FLITE_SUSPENDED); | |
188 | else | |
189 | fimc->state &= ~(1 << ST_FLITE_PENDING | | |
190 | 1 << ST_FLITE_SUSPENDED); | |
191 | ||
192 | /* Release unused buffers */ | |
193 | while (!suspend && !list_empty(&fimc->pending_buf_q)) { | |
194 | buf = fimc_lite_pending_queue_pop(fimc); | |
195 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | |
196 | } | |
197 | /* If suspending put unused buffers onto pending queue */ | |
198 | while (!list_empty(&fimc->active_buf_q)) { | |
199 | buf = fimc_lite_active_queue_pop(fimc); | |
200 | if (suspend) | |
201 | fimc_lite_pending_queue_add(fimc, buf); | |
202 | else | |
203 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | |
204 | } | |
205 | ||
206 | spin_unlock_irqrestore(&fimc->slock, flags); | |
207 | ||
208 | flite_hw_reset(fimc); | |
209 | ||
210 | if (!streaming) | |
211 | return 0; | |
212 | ||
b9ee31e6 | 213 | return fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 0); |
4af81310 SN |
214 | } |
215 | ||
216 | static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend) | |
217 | { | |
218 | unsigned long flags; | |
219 | ||
220 | if (!fimc_lite_active(fimc)) | |
221 | return 0; | |
222 | ||
223 | spin_lock_irqsave(&fimc->slock, flags); | |
224 | set_bit(ST_FLITE_OFF, &fimc->state); | |
225 | flite_hw_capture_stop(fimc); | |
226 | spin_unlock_irqrestore(&fimc->slock, flags); | |
227 | ||
228 | wait_event_timeout(fimc->irq_queue, | |
229 | !test_bit(ST_FLITE_OFF, &fimc->state), | |
230 | (2*HZ/10)); /* 200 ms */ | |
231 | ||
232 | return fimc_lite_reinit(fimc, suspend); | |
233 | } | |
234 | ||
235 | /* Must be called with fimc.slock spinlock held. */ | |
236 | static void fimc_lite_config_update(struct fimc_lite *fimc) | |
237 | { | |
238 | flite_hw_set_window_offset(fimc, &fimc->inp_frame); | |
239 | flite_hw_set_dma_window(fimc, &fimc->out_frame); | |
240 | flite_hw_set_test_pattern(fimc, fimc->test_pattern->val); | |
241 | clear_bit(ST_FLITE_CONFIG, &fimc->state); | |
242 | } | |
243 | ||
244 | static irqreturn_t flite_irq_handler(int irq, void *priv) | |
245 | { | |
246 | struct fimc_lite *fimc = priv; | |
247 | struct flite_buffer *vbuf; | |
248 | unsigned long flags; | |
249 | struct timeval *tv; | |
250 | struct timespec ts; | |
251 | u32 intsrc; | |
252 | ||
253 | spin_lock_irqsave(&fimc->slock, flags); | |
254 | ||
255 | intsrc = flite_hw_get_interrupt_source(fimc); | |
256 | flite_hw_clear_pending_irq(fimc); | |
257 | ||
258 | if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) { | |
259 | wake_up(&fimc->irq_queue); | |
260 | goto done; | |
261 | } | |
262 | ||
263 | if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) { | |
264 | clear_bit(ST_FLITE_RUN, &fimc->state); | |
265 | fimc->events.data_overflow++; | |
266 | } | |
267 | ||
268 | if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) { | |
269 | flite_hw_clear_last_capture_end(fimc); | |
270 | clear_bit(ST_FLITE_STREAM, &fimc->state); | |
271 | wake_up(&fimc->irq_queue); | |
272 | } | |
273 | ||
03878bb4 | 274 | if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) |
4af81310 SN |
275 | goto done; |
276 | ||
277 | if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) && | |
278 | test_bit(ST_FLITE_RUN, &fimc->state) && | |
279 | !list_empty(&fimc->active_buf_q) && | |
280 | !list_empty(&fimc->pending_buf_q)) { | |
281 | vbuf = fimc_lite_active_queue_pop(fimc); | |
282 | ktime_get_ts(&ts); | |
283 | tv = &vbuf->vb.v4l2_buf.timestamp; | |
284 | tv->tv_sec = ts.tv_sec; | |
285 | tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC; | |
286 | vbuf->vb.v4l2_buf.sequence = fimc->frame_count++; | |
287 | vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE); | |
288 | ||
289 | vbuf = fimc_lite_pending_queue_pop(fimc); | |
290 | flite_hw_set_output_addr(fimc, vbuf->paddr); | |
291 | fimc_lite_active_queue_add(fimc, vbuf); | |
292 | } | |
293 | ||
294 | if (test_bit(ST_FLITE_CONFIG, &fimc->state)) | |
295 | fimc_lite_config_update(fimc); | |
296 | ||
297 | if (list_empty(&fimc->pending_buf_q)) { | |
298 | flite_hw_capture_stop(fimc); | |
299 | clear_bit(ST_FLITE_STREAM, &fimc->state); | |
300 | } | |
301 | done: | |
302 | set_bit(ST_FLITE_RUN, &fimc->state); | |
303 | spin_unlock_irqrestore(&fimc->slock, flags); | |
304 | return IRQ_HANDLED; | |
305 | } | |
306 | ||
307 | static int start_streaming(struct vb2_queue *q, unsigned int count) | |
308 | { | |
309 | struct fimc_lite *fimc = q->drv_priv; | |
310 | int ret; | |
311 | ||
312 | fimc->frame_count = 0; | |
313 | ||
6319d6a0 | 314 | ret = fimc_lite_hw_init(fimc, false); |
4af81310 SN |
315 | if (ret) { |
316 | fimc_lite_reinit(fimc, false); | |
317 | return ret; | |
318 | } | |
319 | ||
320 | set_bit(ST_FLITE_PENDING, &fimc->state); | |
321 | ||
322 | if (!list_empty(&fimc->active_buf_q) && | |
323 | !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) { | |
324 | flite_hw_capture_start(fimc); | |
325 | ||
326 | if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state)) | |
b9ee31e6 SN |
327 | fimc_pipeline_call(fimc, set_stream, |
328 | &fimc->pipeline, 1); | |
4af81310 SN |
329 | } |
330 | if (debug > 0) | |
331 | flite_hw_dump_regs(fimc, __func__); | |
332 | ||
333 | return 0; | |
334 | } | |
335 | ||
336 | static int stop_streaming(struct vb2_queue *q) | |
337 | { | |
338 | struct fimc_lite *fimc = q->drv_priv; | |
339 | ||
340 | if (!fimc_lite_active(fimc)) | |
341 | return -EINVAL; | |
342 | ||
343 | return fimc_lite_stop_capture(fimc, false); | |
344 | } | |
345 | ||
346 | static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt, | |
347 | unsigned int *num_buffers, unsigned int *num_planes, | |
348 | unsigned int sizes[], void *allocators[]) | |
349 | { | |
350 | const struct v4l2_pix_format_mplane *pixm = NULL; | |
351 | struct fimc_lite *fimc = vq->drv_priv; | |
352 | struct flite_frame *frame = &fimc->out_frame; | |
e90ad659 | 353 | const struct fimc_fmt *fmt = frame->fmt; |
4af81310 SN |
354 | unsigned long wh; |
355 | int i; | |
356 | ||
357 | if (pfmt) { | |
358 | pixm = &pfmt->fmt.pix_mp; | |
e90ad659 | 359 | fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0, -1); |
4af81310 SN |
360 | wh = pixm->width * pixm->height; |
361 | } else { | |
362 | wh = frame->f_width * frame->f_height; | |
363 | } | |
364 | ||
365 | if (fmt == NULL) | |
366 | return -EINVAL; | |
367 | ||
368 | *num_planes = fmt->memplanes; | |
369 | ||
370 | for (i = 0; i < fmt->memplanes; i++) { | |
371 | unsigned int size = (wh * fmt->depth[i]) / 8; | |
372 | if (pixm) | |
373 | sizes[i] = max(size, pixm->plane_fmt[i].sizeimage); | |
374 | else | |
375 | sizes[i] = size; | |
376 | allocators[i] = fimc->alloc_ctx; | |
377 | } | |
378 | ||
379 | return 0; | |
380 | } | |
381 | ||
382 | static int buffer_prepare(struct vb2_buffer *vb) | |
383 | { | |
384 | struct vb2_queue *vq = vb->vb2_queue; | |
385 | struct fimc_lite *fimc = vq->drv_priv; | |
386 | int i; | |
387 | ||
e90ad659 | 388 | if (fimc->out_frame.fmt == NULL) |
4af81310 SN |
389 | return -EINVAL; |
390 | ||
e90ad659 | 391 | for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) { |
4af81310 SN |
392 | unsigned long size = fimc->payload[i]; |
393 | ||
394 | if (vb2_plane_size(vb, i) < size) { | |
1bcd7041 | 395 | v4l2_err(&fimc->vfd, |
4af81310 SN |
396 | "User buffer too small (%ld < %ld)\n", |
397 | vb2_plane_size(vb, i), size); | |
398 | return -EINVAL; | |
399 | } | |
400 | vb2_set_plane_payload(vb, i, size); | |
401 | } | |
402 | ||
403 | return 0; | |
404 | } | |
405 | ||
406 | static void buffer_queue(struct vb2_buffer *vb) | |
407 | { | |
408 | struct flite_buffer *buf | |
409 | = container_of(vb, struct flite_buffer, vb); | |
410 | struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue); | |
411 | unsigned long flags; | |
412 | ||
413 | spin_lock_irqsave(&fimc->slock, flags); | |
414 | buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0); | |
415 | ||
416 | if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) && | |
417 | !test_bit(ST_FLITE_STREAM, &fimc->state) && | |
418 | list_empty(&fimc->active_buf_q)) { | |
419 | flite_hw_set_output_addr(fimc, buf->paddr); | |
420 | fimc_lite_active_queue_add(fimc, buf); | |
421 | } else { | |
422 | fimc_lite_pending_queue_add(fimc, buf); | |
423 | } | |
424 | ||
425 | if (vb2_is_streaming(&fimc->vb_queue) && | |
426 | !list_empty(&fimc->pending_buf_q) && | |
427 | !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) { | |
428 | flite_hw_capture_start(fimc); | |
429 | spin_unlock_irqrestore(&fimc->slock, flags); | |
430 | ||
431 | if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state)) | |
b9ee31e6 SN |
432 | fimc_pipeline_call(fimc, set_stream, |
433 | &fimc->pipeline, 1); | |
4af81310 SN |
434 | return; |
435 | } | |
436 | spin_unlock_irqrestore(&fimc->slock, flags); | |
437 | } | |
438 | ||
4af81310 SN |
439 | static const struct vb2_ops fimc_lite_qops = { |
440 | .queue_setup = queue_setup, | |
441 | .buf_prepare = buffer_prepare, | |
442 | .buf_queue = buffer_queue, | |
ee12b049 SN |
443 | .wait_prepare = vb2_ops_wait_prepare, |
444 | .wait_finish = vb2_ops_wait_finish, | |
4af81310 SN |
445 | .start_streaming = start_streaming, |
446 | .stop_streaming = stop_streaming, | |
447 | }; | |
448 | ||
449 | static void fimc_lite_clear_event_counters(struct fimc_lite *fimc) | |
450 | { | |
451 | unsigned long flags; | |
452 | ||
453 | spin_lock_irqsave(&fimc->slock, flags); | |
454 | memset(&fimc->events, 0, sizeof(fimc->events)); | |
455 | spin_unlock_irqrestore(&fimc->slock, flags); | |
456 | } | |
457 | ||
458 | static int fimc_lite_open(struct file *file) | |
459 | { | |
460 | struct fimc_lite *fimc = video_drvdata(file); | |
740ad921 | 461 | struct media_entity *me = &fimc->vfd.entity; |
e3fc82e8 | 462 | int ret; |
4af81310 | 463 | |
740ad921 | 464 | mutex_lock(&me->parent->graph_mutex); |
4af81310 | 465 | |
740ad921 | 466 | mutex_lock(&fimc->lock); |
03878bb4 | 467 | if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) { |
6319d6a0 | 468 | ret = -EBUSY; |
ee12b049 | 469 | goto unlock; |
6319d6a0 SN |
470 | } |
471 | ||
4af81310 | 472 | set_bit(ST_FLITE_IN_USE, &fimc->state); |
e3fc82e8 SN |
473 | ret = pm_runtime_get_sync(&fimc->pdev->dev); |
474 | if (ret < 0) | |
ee12b049 | 475 | goto unlock; |
4af81310 | 476 | |
e3fc82e8 SN |
477 | ret = v4l2_fh_open(file); |
478 | if (ret < 0) | |
ee12b049 | 479 | goto err_pm; |
4af81310 | 480 | |
ee12b049 SN |
481 | if (!v4l2_fh_is_singular_file(file) || |
482 | atomic_read(&fimc->out_path) != FIMC_IO_DMA) | |
483 | goto unlock; | |
4af81310 | 484 | |
ee12b049 SN |
485 | ret = fimc_pipeline_call(fimc, open, &fimc->pipeline, |
486 | me, true); | |
487 | if (!ret) { | |
4e39da01 | 488 | fimc_lite_clear_event_counters(fimc); |
ee12b049 SN |
489 | fimc->ref_count++; |
490 | goto unlock; | |
4e39da01 | 491 | } |
ee12b049 SN |
492 | |
493 | v4l2_fh_release(file); | |
494 | err_pm: | |
495 | pm_runtime_put_sync(&fimc->pdev->dev); | |
496 | clear_bit(ST_FLITE_IN_USE, &fimc->state); | |
497 | unlock: | |
4e39da01 | 498 | mutex_unlock(&fimc->lock); |
740ad921 | 499 | mutex_unlock(&me->parent->graph_mutex); |
4af81310 SN |
500 | return ret; |
501 | } | |
502 | ||
ee12b049 | 503 | static int fimc_lite_release(struct file *file) |
4af81310 SN |
504 | { |
505 | struct fimc_lite *fimc = video_drvdata(file); | |
4e39da01 | 506 | |
ddc43d6d | 507 | mutex_lock(&fimc->lock); |
4af81310 | 508 | |
ee12b049 | 509 | if (v4l2_fh_is_singular_file(file) && |
03878bb4 | 510 | atomic_read(&fimc->out_path) == FIMC_IO_DMA) { |
9ea89e2b SN |
511 | if (fimc->streaming) { |
512 | media_entity_pipeline_stop(&fimc->vfd.entity); | |
513 | fimc->streaming = false; | |
514 | } | |
4af81310 SN |
515 | clear_bit(ST_FLITE_IN_USE, &fimc->state); |
516 | fimc_lite_stop_capture(fimc, false); | |
b9ee31e6 | 517 | fimc_pipeline_call(fimc, close, &fimc->pipeline); |
ee12b049 | 518 | fimc->ref_count--; |
4af81310 SN |
519 | } |
520 | ||
ee12b049 | 521 | vb2_fop_release(file); |
4af81310 | 522 | pm_runtime_put(&fimc->pdev->dev); |
ee12b049 | 523 | clear_bit(ST_FLITE_SUSPENDED, &fimc->state); |
4af81310 | 524 | |
4e39da01 | 525 | mutex_unlock(&fimc->lock); |
ee12b049 | 526 | return 0; |
4af81310 SN |
527 | } |
528 | ||
529 | static const struct v4l2_file_operations fimc_lite_fops = { | |
530 | .owner = THIS_MODULE, | |
531 | .open = fimc_lite_open, | |
ee12b049 SN |
532 | .release = fimc_lite_release, |
533 | .poll = vb2_fop_poll, | |
4af81310 | 534 | .unlocked_ioctl = video_ioctl2, |
ee12b049 | 535 | .mmap = vb2_fop_mmap, |
4af81310 SN |
536 | }; |
537 | ||
538 | /* | |
539 | * Format and crop negotiation helpers | |
540 | */ | |
541 | ||
542 | static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc, | |
543 | u32 *width, u32 *height, | |
544 | u32 *code, u32 *fourcc, int pad) | |
545 | { | |
9c8399c8 | 546 | struct flite_drvdata *dd = fimc->dd; |
4af81310 | 547 | const struct fimc_fmt *fmt; |
e90ad659 | 548 | unsigned int flags = 0; |
4af81310 SN |
549 | |
550 | if (pad == FLITE_SD_PAD_SINK) { | |
9c8399c8 SN |
551 | v4l_bound_align_image(width, 8, dd->max_width, |
552 | ffs(dd->out_width_align) - 1, | |
553 | height, 0, dd->max_height, 0, 0); | |
4af81310 SN |
554 | } else { |
555 | v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width, | |
9c8399c8 | 556 | ffs(dd->out_width_align) - 1, |
4af81310 SN |
557 | height, 0, fimc->inp_frame.rect.height, |
558 | 0, 0); | |
e90ad659 | 559 | flags = fimc->inp_frame.fmt->flags; |
4af81310 SN |
560 | } |
561 | ||
e90ad659 SN |
562 | fmt = fimc_lite_find_format(fourcc, code, flags, 0); |
563 | if (WARN_ON(!fmt)) | |
564 | return NULL; | |
565 | ||
566 | if (code) | |
567 | *code = fmt->mbus_code; | |
568 | if (fourcc) | |
569 | *fourcc = fmt->fourcc; | |
570 | ||
4af81310 SN |
571 | v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n", |
572 | code ? *code : 0, *width, *height); | |
573 | ||
574 | return fmt; | |
575 | } | |
576 | ||
577 | static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r) | |
578 | { | |
579 | struct flite_frame *frame = &fimc->inp_frame; | |
580 | ||
581 | v4l_bound_align_image(&r->width, 0, frame->f_width, 0, | |
582 | &r->height, 0, frame->f_height, 0, 0); | |
583 | ||
584 | /* Adjust left/top if cropping rectangle got out of bounds */ | |
585 | r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width); | |
9c8399c8 | 586 | r->left = round_down(r->left, fimc->dd->win_hor_offs_align); |
4af81310 SN |
587 | r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height); |
588 | ||
969e877c | 589 | v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n", |
4af81310 SN |
590 | r->left, r->top, r->width, r->height, |
591 | frame->f_width, frame->f_height); | |
592 | } | |
593 | ||
594 | static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r) | |
595 | { | |
596 | struct flite_frame *frame = &fimc->out_frame; | |
597 | struct v4l2_rect *crop_rect = &fimc->inp_frame.rect; | |
598 | ||
599 | /* Scaling is not supported so we enforce compose rectangle size | |
600 | same as size of the sink crop rectangle. */ | |
601 | r->width = crop_rect->width; | |
602 | r->height = crop_rect->height; | |
603 | ||
604 | /* Adjust left/top if the composing rectangle got out of bounds */ | |
605 | r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width); | |
9c8399c8 | 606 | r->left = round_down(r->left, fimc->dd->out_hor_offs_align); |
4af81310 SN |
607 | r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height); |
608 | ||
969e877c | 609 | v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n", |
4af81310 SN |
610 | r->left, r->top, r->width, r->height, |
611 | frame->f_width, frame->f_height); | |
612 | } | |
613 | ||
614 | /* | |
615 | * Video node ioctl operations | |
616 | */ | |
793ad32d | 617 | static int fimc_lite_querycap(struct file *file, void *priv, |
4af81310 SN |
618 | struct v4l2_capability *cap) |
619 | { | |
793ad32d SN |
620 | struct fimc_lite *fimc = video_drvdata(file); |
621 | ||
4af81310 | 622 | strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver)); |
793ad32d SN |
623 | strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card)); |
624 | snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s", | |
625 | dev_name(&fimc->pdev->dev)); | |
626 | ||
627 | cap->device_caps = V4L2_CAP_STREAMING; | |
628 | cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; | |
4af81310 SN |
629 | return 0; |
630 | } | |
631 | ||
632 | static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv, | |
633 | struct v4l2_fmtdesc *f) | |
634 | { | |
635 | const struct fimc_fmt *fmt; | |
636 | ||
637 | if (f->index >= ARRAY_SIZE(fimc_lite_formats)) | |
638 | return -EINVAL; | |
639 | ||
640 | fmt = &fimc_lite_formats[f->index]; | |
641 | strlcpy(f->description, fmt->name, sizeof(f->description)); | |
642 | f->pixelformat = fmt->fourcc; | |
643 | ||
644 | return 0; | |
645 | } | |
646 | ||
647 | static int fimc_lite_g_fmt_mplane(struct file *file, void *fh, | |
648 | struct v4l2_format *f) | |
649 | { | |
650 | struct fimc_lite *fimc = video_drvdata(file); | |
651 | struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; | |
652 | struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0]; | |
653 | struct flite_frame *frame = &fimc->out_frame; | |
e90ad659 | 654 | const struct fimc_fmt *fmt = frame->fmt; |
4af81310 SN |
655 | |
656 | plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8; | |
657 | plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height; | |
658 | ||
659 | pixm->num_planes = fmt->memplanes; | |
660 | pixm->pixelformat = fmt->fourcc; | |
661 | pixm->width = frame->f_width; | |
662 | pixm->height = frame->f_height; | |
663 | pixm->field = V4L2_FIELD_NONE; | |
664 | pixm->colorspace = V4L2_COLORSPACE_JPEG; | |
665 | return 0; | |
666 | } | |
667 | ||
668 | static int fimc_lite_try_fmt(struct fimc_lite *fimc, | |
669 | struct v4l2_pix_format_mplane *pixm, | |
670 | const struct fimc_fmt **ffmt) | |
671 | { | |
4af81310 | 672 | u32 bpl = pixm->plane_fmt[0].bytesperline; |
9c8399c8 | 673 | struct flite_drvdata *dd = fimc->dd; |
e90ad659 | 674 | const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt; |
4af81310 SN |
675 | const struct fimc_fmt *fmt; |
676 | ||
e90ad659 SN |
677 | if (WARN_ON(inp_fmt == NULL)) |
678 | return -EINVAL; | |
679 | /* | |
680 | * We allow some flexibility only for YUV formats. In case of raw | |
681 | * raw Bayer the FIMC-LITE's output format must match its camera | |
682 | * interface input format. | |
683 | */ | |
684 | if (inp_fmt->flags & FMT_FLAGS_YUV) | |
685 | fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, | |
686 | inp_fmt->flags, 0); | |
687 | else | |
688 | fmt = inp_fmt; | |
689 | ||
4af81310 SN |
690 | if (WARN_ON(fmt == NULL)) |
691 | return -EINVAL; | |
692 | if (ffmt) | |
693 | *ffmt = fmt; | |
9c8399c8 SN |
694 | v4l_bound_align_image(&pixm->width, 8, dd->max_width, |
695 | ffs(dd->out_width_align) - 1, | |
696 | &pixm->height, 0, dd->max_height, 0, 0); | |
4af81310 SN |
697 | |
698 | if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width)) | |
699 | pixm->plane_fmt[0].bytesperline = (pixm->width * | |
700 | fmt->depth[0]) / 8; | |
701 | ||
702 | if (pixm->plane_fmt[0].sizeimage == 0) | |
703 | pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height * | |
704 | fmt->depth[0]) / 8; | |
705 | pixm->num_planes = fmt->memplanes; | |
706 | pixm->pixelformat = fmt->fourcc; | |
707 | pixm->colorspace = V4L2_COLORSPACE_JPEG; | |
708 | pixm->field = V4L2_FIELD_NONE; | |
709 | return 0; | |
710 | } | |
711 | ||
712 | static int fimc_lite_try_fmt_mplane(struct file *file, void *fh, | |
713 | struct v4l2_format *f) | |
714 | { | |
715 | struct fimc_lite *fimc = video_drvdata(file); | |
4af81310 SN |
716 | return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL); |
717 | } | |
718 | ||
719 | static int fimc_lite_s_fmt_mplane(struct file *file, void *priv, | |
720 | struct v4l2_format *f) | |
721 | { | |
722 | struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; | |
723 | struct fimc_lite *fimc = video_drvdata(file); | |
724 | struct flite_frame *frame = &fimc->out_frame; | |
725 | const struct fimc_fmt *fmt = NULL; | |
726 | int ret; | |
727 | ||
728 | if (vb2_is_busy(&fimc->vb_queue)) | |
729 | return -EBUSY; | |
730 | ||
731 | ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt); | |
732 | if (ret < 0) | |
733 | return ret; | |
734 | ||
e90ad659 | 735 | frame->fmt = fmt; |
4af81310 SN |
736 | fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8, |
737 | pixm->plane_fmt[0].sizeimage); | |
738 | frame->f_width = pixm->width; | |
739 | frame->f_height = pixm->height; | |
740 | ||
741 | return 0; | |
742 | } | |
743 | ||
744 | static int fimc_pipeline_validate(struct fimc_lite *fimc) | |
745 | { | |
746 | struct v4l2_subdev *sd = &fimc->subdev; | |
747 | struct v4l2_subdev_format sink_fmt, src_fmt; | |
748 | struct media_pad *pad; | |
749 | int ret; | |
750 | ||
751 | while (1) { | |
752 | /* Retrieve format at the sink pad */ | |
753 | pad = &sd->entity.pads[0]; | |
754 | if (!(pad->flags & MEDIA_PAD_FL_SINK)) | |
755 | break; | |
756 | /* Don't call FIMC subdev operation to avoid nested locking */ | |
757 | if (sd == &fimc->subdev) { | |
758 | struct flite_frame *ff = &fimc->out_frame; | |
759 | sink_fmt.format.width = ff->f_width; | |
760 | sink_fmt.format.height = ff->f_height; | |
e90ad659 | 761 | sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code; |
4af81310 SN |
762 | } else { |
763 | sink_fmt.pad = pad->index; | |
764 | sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
765 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, | |
766 | &sink_fmt); | |
767 | if (ret < 0 && ret != -ENOIOCTLCMD) | |
768 | return -EPIPE; | |
769 | } | |
770 | /* Retrieve format at the source pad */ | |
1bddf1b3 | 771 | pad = media_entity_remote_pad(pad); |
4af81310 SN |
772 | if (pad == NULL || |
773 | media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV) | |
774 | break; | |
775 | ||
776 | sd = media_entity_to_v4l2_subdev(pad->entity); | |
777 | src_fmt.pad = pad->index; | |
778 | src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
779 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt); | |
780 | if (ret < 0 && ret != -ENOIOCTLCMD) | |
781 | return -EPIPE; | |
782 | ||
783 | if (src_fmt.format.width != sink_fmt.format.width || | |
784 | src_fmt.format.height != sink_fmt.format.height || | |
785 | src_fmt.format.code != sink_fmt.format.code) | |
786 | return -EPIPE; | |
787 | } | |
788 | return 0; | |
789 | } | |
790 | ||
791 | static int fimc_lite_streamon(struct file *file, void *priv, | |
792 | enum v4l2_buf_type type) | |
793 | { | |
794 | struct fimc_lite *fimc = video_drvdata(file); | |
95c4a17f | 795 | struct media_entity *entity = &fimc->vfd.entity; |
4af81310 SN |
796 | struct fimc_pipeline *p = &fimc->pipeline; |
797 | int ret; | |
798 | ||
799 | if (fimc_lite_active(fimc)) | |
800 | return -EBUSY; | |
801 | ||
95c4a17f | 802 | ret = media_entity_pipeline_start(entity, p->m_pipeline); |
a1a5861b SK |
803 | if (ret < 0) |
804 | return ret; | |
4af81310 SN |
805 | |
806 | ret = fimc_pipeline_validate(fimc); | |
ee12b049 SN |
807 | if (ret < 0) |
808 | goto err_p_stop; | |
4af81310 | 809 | |
045a1fac | 810 | fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity); |
756e6e14 | 811 | |
ee12b049 | 812 | ret = vb2_ioctl_streamon(file, priv, type); |
9ea89e2b SN |
813 | if (!ret) { |
814 | fimc->streaming = true; | |
ee12b049 | 815 | return ret; |
9ea89e2b SN |
816 | } |
817 | ||
ee12b049 SN |
818 | err_p_stop: |
819 | media_entity_pipeline_stop(entity); | |
820 | return 0; | |
4af81310 SN |
821 | } |
822 | ||
823 | static int fimc_lite_streamoff(struct file *file, void *priv, | |
824 | enum v4l2_buf_type type) | |
825 | { | |
826 | struct fimc_lite *fimc = video_drvdata(file); | |
4af81310 SN |
827 | int ret; |
828 | ||
ee12b049 | 829 | ret = vb2_ioctl_streamoff(file, priv, type); |
9ea89e2b SN |
830 | if (ret < 0) |
831 | return ret; | |
832 | ||
833 | media_entity_pipeline_stop(&fimc->vfd.entity); | |
834 | fimc->streaming = false; | |
835 | return 0; | |
4af81310 SN |
836 | } |
837 | ||
838 | static int fimc_lite_reqbufs(struct file *file, void *priv, | |
839 | struct v4l2_requestbuffers *reqbufs) | |
840 | { | |
841 | struct fimc_lite *fimc = video_drvdata(file); | |
842 | int ret; | |
843 | ||
844 | reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count); | |
ee12b049 | 845 | ret = vb2_ioctl_reqbufs(file, priv, reqbufs); |
f68247fc | 846 | if (!ret) |
4af81310 SN |
847 | fimc->reqbufs_count = reqbufs->count; |
848 | ||
849 | return ret; | |
850 | } | |
851 | ||
4af81310 SN |
852 | /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */ |
853 | static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b) | |
854 | { | |
855 | if (a->left < b->left || a->top < b->top) | |
856 | return 0; | |
857 | if (a->left + a->width > b->left + b->width) | |
858 | return 0; | |
859 | if (a->top + a->height > b->top + b->height) | |
860 | return 0; | |
861 | ||
862 | return 1; | |
863 | } | |
864 | ||
865 | static int fimc_lite_g_selection(struct file *file, void *fh, | |
866 | struct v4l2_selection *sel) | |
867 | { | |
868 | struct fimc_lite *fimc = video_drvdata(file); | |
869 | struct flite_frame *f = &fimc->out_frame; | |
870 | ||
871 | if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | |
872 | return -EINVAL; | |
873 | ||
874 | switch (sel->target) { | |
875 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: | |
876 | case V4L2_SEL_TGT_COMPOSE_DEFAULT: | |
877 | sel->r.left = 0; | |
878 | sel->r.top = 0; | |
879 | sel->r.width = f->f_width; | |
880 | sel->r.height = f->f_height; | |
881 | return 0; | |
882 | ||
c1334823 | 883 | case V4L2_SEL_TGT_COMPOSE: |
4af81310 SN |
884 | sel->r = f->rect; |
885 | return 0; | |
886 | } | |
887 | ||
888 | return -EINVAL; | |
889 | } | |
890 | ||
891 | static int fimc_lite_s_selection(struct file *file, void *fh, | |
892 | struct v4l2_selection *sel) | |
893 | { | |
894 | struct fimc_lite *fimc = video_drvdata(file); | |
895 | struct flite_frame *f = &fimc->out_frame; | |
896 | struct v4l2_rect rect = sel->r; | |
897 | unsigned long flags; | |
898 | ||
899 | if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE || | |
c1334823 | 900 | sel->target != V4L2_SEL_TGT_COMPOSE) |
4af81310 SN |
901 | return -EINVAL; |
902 | ||
903 | fimc_lite_try_compose(fimc, &rect); | |
904 | ||
905 | if ((sel->flags & V4L2_SEL_FLAG_LE) && | |
906 | !enclosed_rectangle(&rect, &sel->r)) | |
907 | return -ERANGE; | |
908 | ||
909 | if ((sel->flags & V4L2_SEL_FLAG_GE) && | |
910 | !enclosed_rectangle(&sel->r, &rect)) | |
911 | return -ERANGE; | |
912 | ||
913 | sel->r = rect; | |
914 | spin_lock_irqsave(&fimc->slock, flags); | |
915 | f->rect = rect; | |
916 | set_bit(ST_FLITE_CONFIG, &fimc->state); | |
917 | spin_unlock_irqrestore(&fimc->slock, flags); | |
918 | ||
919 | return 0; | |
920 | } | |
921 | ||
922 | static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = { | |
793ad32d | 923 | .vidioc_querycap = fimc_lite_querycap, |
4af81310 SN |
924 | .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane, |
925 | .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane, | |
926 | .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane, | |
927 | .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane, | |
928 | .vidioc_g_selection = fimc_lite_g_selection, | |
929 | .vidioc_s_selection = fimc_lite_s_selection, | |
930 | .vidioc_reqbufs = fimc_lite_reqbufs, | |
ee12b049 SN |
931 | .vidioc_querybuf = vb2_ioctl_querybuf, |
932 | .vidioc_prepare_buf = vb2_ioctl_prepare_buf, | |
933 | .vidioc_create_bufs = vb2_ioctl_create_bufs, | |
934 | .vidioc_qbuf = vb2_ioctl_qbuf, | |
935 | .vidioc_dqbuf = vb2_ioctl_dqbuf, | |
4af81310 SN |
936 | .vidioc_streamon = fimc_lite_streamon, |
937 | .vidioc_streamoff = fimc_lite_streamoff, | |
938 | }; | |
939 | ||
940 | /* Capture subdev media entity operations */ | |
941 | static int fimc_lite_link_setup(struct media_entity *entity, | |
942 | const struct media_pad *local, | |
943 | const struct media_pad *remote, u32 flags) | |
944 | { | |
945 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); | |
946 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
947 | unsigned int remote_ent_type = media_entity_type(remote->entity); | |
6319d6a0 | 948 | int ret = 0; |
4af81310 SN |
949 | |
950 | if (WARN_ON(fimc == NULL)) | |
951 | return 0; | |
952 | ||
969e877c | 953 | v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n", |
6319d6a0 | 954 | __func__, remote->entity->name, local->entity->name, |
4af81310 SN |
955 | flags, fimc->source_subdev_grp_id); |
956 | ||
6319d6a0 | 957 | mutex_lock(&fimc->lock); |
4af81310 | 958 | |
6319d6a0 SN |
959 | switch (local->index) { |
960 | case FLITE_SD_PAD_SINK: | |
961 | if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) { | |
962 | ret = -EINVAL; | |
963 | break; | |
964 | } | |
4af81310 | 965 | if (flags & MEDIA_LNK_FL_ENABLED) { |
6319d6a0 SN |
966 | if (fimc->source_subdev_grp_id == 0) |
967 | fimc->source_subdev_grp_id = sd->grp_id; | |
968 | else | |
969 | ret = -EBUSY; | |
970 | } else { | |
971 | fimc->source_subdev_grp_id = 0; | |
972 | fimc->sensor = NULL; | |
4af81310 | 973 | } |
6319d6a0 | 974 | break; |
4af81310 | 975 | |
6319d6a0 SN |
976 | case FLITE_SD_PAD_SOURCE_DMA: |
977 | if (!(flags & MEDIA_LNK_FL_ENABLED)) | |
03878bb4 | 978 | atomic_set(&fimc->out_path, FIMC_IO_NONE); |
6319d6a0 | 979 | else if (remote_ent_type == MEDIA_ENT_T_DEVNODE) |
03878bb4 | 980 | atomic_set(&fimc->out_path, FIMC_IO_DMA); |
6319d6a0 SN |
981 | else |
982 | ret = -EINVAL; | |
4af81310 SN |
983 | break; |
984 | ||
6319d6a0 SN |
985 | case FLITE_SD_PAD_SOURCE_ISP: |
986 | if (!(flags & MEDIA_LNK_FL_ENABLED)) | |
03878bb4 | 987 | atomic_set(&fimc->out_path, FIMC_IO_NONE); |
6319d6a0 | 988 | else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV) |
03878bb4 | 989 | atomic_set(&fimc->out_path, FIMC_IO_ISP); |
4af81310 | 990 | else |
6319d6a0 | 991 | ret = -EINVAL; |
4af81310 SN |
992 | break; |
993 | ||
994 | default: | |
995 | v4l2_err(sd, "Invalid pad index\n"); | |
6319d6a0 | 996 | ret = -EINVAL; |
4af81310 | 997 | } |
03878bb4 | 998 | mb(); |
4af81310 | 999 | |
6319d6a0 SN |
1000 | mutex_unlock(&fimc->lock); |
1001 | return ret; | |
4af81310 SN |
1002 | } |
1003 | ||
1004 | static const struct media_entity_operations fimc_lite_subdev_media_ops = { | |
1005 | .link_setup = fimc_lite_link_setup, | |
1006 | }; | |
1007 | ||
1008 | static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd, | |
1009 | struct v4l2_subdev_fh *fh, | |
1010 | struct v4l2_subdev_mbus_code_enum *code) | |
1011 | { | |
1012 | const struct fimc_fmt *fmt; | |
1013 | ||
e90ad659 | 1014 | fmt = fimc_lite_find_format(NULL, NULL, 0, code->index); |
4af81310 SN |
1015 | if (!fmt) |
1016 | return -EINVAL; | |
1017 | code->code = fmt->mbus_code; | |
1018 | return 0; | |
1019 | } | |
1020 | ||
1021 | static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd, | |
1022 | struct v4l2_subdev_fh *fh, | |
1023 | struct v4l2_subdev_format *fmt) | |
1024 | { | |
1025 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1026 | struct v4l2_mbus_framefmt *mf = &fmt->format; | |
e90ad659 | 1027 | struct flite_frame *f = &fimc->inp_frame; |
4af81310 SN |
1028 | |
1029 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { | |
1030 | mf = v4l2_subdev_get_try_format(fh, fmt->pad); | |
1031 | fmt->format = *mf; | |
1032 | return 0; | |
1033 | } | |
1034 | mf->colorspace = V4L2_COLORSPACE_JPEG; | |
1035 | ||
1036 | mutex_lock(&fimc->lock); | |
e90ad659 | 1037 | mf->code = f->fmt->mbus_code; |
4af81310 SN |
1038 | |
1039 | if (fmt->pad == FLITE_SD_PAD_SINK) { | |
1040 | /* full camera input frame size */ | |
1041 | mf->width = f->f_width; | |
1042 | mf->height = f->f_height; | |
1043 | } else { | |
1044 | /* crop size */ | |
1045 | mf->width = f->rect.width; | |
1046 | mf->height = f->rect.height; | |
1047 | } | |
1048 | mutex_unlock(&fimc->lock); | |
1049 | return 0; | |
1050 | } | |
1051 | ||
1052 | static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd, | |
1053 | struct v4l2_subdev_fh *fh, | |
1054 | struct v4l2_subdev_format *fmt) | |
1055 | { | |
1056 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1057 | struct v4l2_mbus_framefmt *mf = &fmt->format; | |
1058 | struct flite_frame *sink = &fimc->inp_frame; | |
9356ac76 | 1059 | struct flite_frame *source = &fimc->out_frame; |
4af81310 SN |
1060 | const struct fimc_fmt *ffmt; |
1061 | ||
969e877c | 1062 | v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n", |
4af81310 SN |
1063 | fmt->pad, mf->code, mf->width, mf->height); |
1064 | ||
1065 | mf->colorspace = V4L2_COLORSPACE_JPEG; | |
1066 | mutex_lock(&fimc->lock); | |
1067 | ||
03878bb4 SN |
1068 | if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP && |
1069 | sd->entity.stream_count > 0) || | |
1070 | (atomic_read(&fimc->out_path) == FIMC_IO_DMA && | |
1071 | vb2_is_busy(&fimc->vb_queue))) { | |
4af81310 SN |
1072 | mutex_unlock(&fimc->lock); |
1073 | return -EBUSY; | |
1074 | } | |
1075 | ||
1076 | ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height, | |
1077 | &mf->code, NULL, fmt->pad); | |
1078 | ||
1079 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { | |
1080 | mf = v4l2_subdev_get_try_format(fh, fmt->pad); | |
1081 | *mf = fmt->format; | |
1082 | mutex_unlock(&fimc->lock); | |
1083 | return 0; | |
1084 | } | |
1085 | ||
1086 | if (fmt->pad == FLITE_SD_PAD_SINK) { | |
1087 | sink->f_width = mf->width; | |
1088 | sink->f_height = mf->height; | |
e90ad659 | 1089 | sink->fmt = ffmt; |
4af81310 SN |
1090 | /* Set sink crop rectangle */ |
1091 | sink->rect.width = mf->width; | |
1092 | sink->rect.height = mf->height; | |
1093 | sink->rect.left = 0; | |
1094 | sink->rect.top = 0; | |
9356ac76 SN |
1095 | /* Reset source format and crop rectangle */ |
1096 | source->rect = sink->rect; | |
1097 | source->f_width = mf->width; | |
1098 | source->f_height = mf->height; | |
4af81310 SN |
1099 | } else { |
1100 | /* Allow changing format only on sink pad */ | |
e90ad659 | 1101 | mf->code = sink->fmt->mbus_code; |
4af81310 SN |
1102 | mf->width = sink->rect.width; |
1103 | mf->height = sink->rect.height; | |
1104 | } | |
1105 | ||
1106 | mutex_unlock(&fimc->lock); | |
1107 | return 0; | |
1108 | } | |
1109 | ||
1110 | static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd, | |
1111 | struct v4l2_subdev_fh *fh, | |
1112 | struct v4l2_subdev_selection *sel) | |
1113 | { | |
1114 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1115 | struct flite_frame *f = &fimc->inp_frame; | |
1116 | ||
5689b288 SA |
1117 | if ((sel->target != V4L2_SEL_TGT_CROP && |
1118 | sel->target != V4L2_SEL_TGT_CROP_BOUNDS) || | |
1119 | sel->pad != FLITE_SD_PAD_SINK) | |
4af81310 SN |
1120 | return -EINVAL; |
1121 | ||
1122 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { | |
1123 | sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad); | |
1124 | return 0; | |
1125 | } | |
1126 | ||
1127 | mutex_lock(&fimc->lock); | |
5689b288 | 1128 | if (sel->target == V4L2_SEL_TGT_CROP) { |
4af81310 SN |
1129 | sel->r = f->rect; |
1130 | } else { | |
1131 | sel->r.left = 0; | |
1132 | sel->r.top = 0; | |
1133 | sel->r.width = f->f_width; | |
1134 | sel->r.height = f->f_height; | |
1135 | } | |
1136 | mutex_unlock(&fimc->lock); | |
1137 | ||
969e877c | 1138 | v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n", |
4af81310 SN |
1139 | __func__, f->rect.left, f->rect.top, f->rect.width, |
1140 | f->rect.height, f->f_width, f->f_height); | |
1141 | ||
1142 | return 0; | |
1143 | } | |
1144 | ||
1145 | static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd, | |
1146 | struct v4l2_subdev_fh *fh, | |
1147 | struct v4l2_subdev_selection *sel) | |
1148 | { | |
1149 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1150 | struct flite_frame *f = &fimc->inp_frame; | |
1151 | int ret = 0; | |
1152 | ||
5689b288 | 1153 | if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK) |
4af81310 SN |
1154 | return -EINVAL; |
1155 | ||
1156 | mutex_lock(&fimc->lock); | |
1157 | fimc_lite_try_crop(fimc, &sel->r); | |
1158 | ||
1159 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { | |
1160 | *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r; | |
1161 | } else { | |
1162 | unsigned long flags; | |
1163 | spin_lock_irqsave(&fimc->slock, flags); | |
1164 | f->rect = sel->r; | |
1165 | /* Same crop rectangle on the source pad */ | |
1166 | fimc->out_frame.rect = sel->r; | |
1167 | set_bit(ST_FLITE_CONFIG, &fimc->state); | |
1168 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1169 | } | |
1170 | mutex_unlock(&fimc->lock); | |
1171 | ||
969e877c | 1172 | v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n", |
4af81310 SN |
1173 | __func__, f->rect.left, f->rect.top, f->rect.width, |
1174 | f->rect.height, f->f_width, f->f_height); | |
1175 | ||
1176 | return ret; | |
1177 | } | |
1178 | ||
1179 | static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on) | |
1180 | { | |
1181 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
6319d6a0 SN |
1182 | unsigned long flags; |
1183 | int ret; | |
4af81310 | 1184 | |
6319d6a0 SN |
1185 | /* |
1186 | * Find sensor subdev linked to FIMC-LITE directly or through | |
1187 | * MIPI-CSIS. This is required for configuration where FIMC-LITE | |
1188 | * is used as a subdev only and feeds data internally to FIMC-IS. | |
1189 | * The pipeline links are protected through entity.stream_count | |
1190 | * so there is no need to take the media graph mutex here. | |
1191 | */ | |
045a1fac | 1192 | fimc->sensor = fimc_find_remote_sensor(&sd->entity); |
6319d6a0 | 1193 | |
03878bb4 | 1194 | if (atomic_read(&fimc->out_path) != FIMC_IO_ISP) |
4af81310 SN |
1195 | return -ENOIOCTLCMD; |
1196 | ||
03878bb4 | 1197 | mutex_lock(&fimc->lock); |
6319d6a0 SN |
1198 | if (on) { |
1199 | flite_hw_reset(fimc); | |
1200 | ret = fimc_lite_hw_init(fimc, true); | |
1201 | if (!ret) { | |
1202 | spin_lock_irqsave(&fimc->slock, flags); | |
1203 | flite_hw_capture_start(fimc); | |
1204 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1205 | } | |
1206 | } else { | |
1207 | set_bit(ST_FLITE_OFF, &fimc->state); | |
4af81310 | 1208 | |
6319d6a0 SN |
1209 | spin_lock_irqsave(&fimc->slock, flags); |
1210 | flite_hw_capture_stop(fimc); | |
1211 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1212 | ||
1213 | ret = wait_event_timeout(fimc->irq_queue, | |
1214 | !test_bit(ST_FLITE_OFF, &fimc->state), | |
1215 | msecs_to_jiffies(200)); | |
1216 | if (ret == 0) | |
1217 | v4l2_err(sd, "s_stream(0) timeout\n"); | |
1218 | clear_bit(ST_FLITE_RUN, &fimc->state); | |
1219 | } | |
1220 | ||
1221 | mutex_unlock(&fimc->lock); | |
1222 | return ret; | |
4af81310 SN |
1223 | } |
1224 | ||
4af81310 SN |
1225 | static int fimc_lite_log_status(struct v4l2_subdev *sd) |
1226 | { | |
1227 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1228 | ||
1229 | flite_hw_dump_regs(fimc, __func__); | |
1230 | return 0; | |
1231 | } | |
1232 | ||
1233 | static int fimc_lite_subdev_registered(struct v4l2_subdev *sd) | |
1234 | { | |
1235 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1236 | struct vb2_queue *q = &fimc->vb_queue; | |
1bcd7041 | 1237 | struct video_device *vfd = &fimc->vfd; |
4af81310 SN |
1238 | int ret; |
1239 | ||
1bcd7041 SN |
1240 | memset(vfd, 0, sizeof(*vfd)); |
1241 | ||
e90ad659 SN |
1242 | fimc->inp_frame.fmt = &fimc_lite_formats[0]; |
1243 | fimc->out_frame.fmt = &fimc_lite_formats[0]; | |
03878bb4 | 1244 | atomic_set(&fimc->out_path, FIMC_IO_DMA); |
4af81310 | 1245 | |
4af81310 SN |
1246 | snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture", |
1247 | fimc->index); | |
1248 | ||
1249 | vfd->fops = &fimc_lite_fops; | |
1250 | vfd->ioctl_ops = &fimc_lite_ioctl_ops; | |
1251 | vfd->v4l2_dev = sd->v4l2_dev; | |
1252 | vfd->minor = -1; | |
1bcd7041 | 1253 | vfd->release = video_device_release_empty; |
ee12b049 | 1254 | vfd->queue = q; |
4af81310 SN |
1255 | fimc->reqbufs_count = 0; |
1256 | ||
1257 | INIT_LIST_HEAD(&fimc->pending_buf_q); | |
1258 | INIT_LIST_HEAD(&fimc->active_buf_q); | |
1259 | ||
1260 | memset(q, 0, sizeof(*q)); | |
1261 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; | |
1262 | q->io_modes = VB2_MMAP | VB2_USERPTR; | |
1263 | q->ops = &fimc_lite_qops; | |
1264 | q->mem_ops = &vb2_dma_contig_memops; | |
1265 | q->buf_struct_size = sizeof(struct flite_buffer); | |
1266 | q->drv_priv = fimc; | |
6aa69f99 | 1267 | q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
ee12b049 | 1268 | q->lock = &fimc->lock; |
4af81310 | 1269 | |
41fd087f SN |
1270 | ret = vb2_queue_init(q); |
1271 | if (ret < 0) | |
1272 | return ret; | |
4af81310 SN |
1273 | |
1274 | fimc->vd_pad.flags = MEDIA_PAD_FL_SINK; | |
1275 | ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0); | |
1bcd7041 SN |
1276 | if (ret < 0) |
1277 | return ret; | |
4af81310 SN |
1278 | |
1279 | video_set_drvdata(vfd, fimc); | |
97d66c47 | 1280 | fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd); |
4af81310 SN |
1281 | |
1282 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1); | |
1bcd7041 SN |
1283 | if (ret < 0) { |
1284 | media_entity_cleanup(&vfd->entity); | |
97d66c47 | 1285 | fimc->pipeline_ops = NULL; |
1bcd7041 SN |
1286 | return ret; |
1287 | } | |
4af81310 SN |
1288 | |
1289 | v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n", | |
1290 | vfd->name, video_device_node_name(vfd)); | |
1291 | return 0; | |
4af81310 SN |
1292 | } |
1293 | ||
1294 | static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd) | |
1295 | { | |
1296 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); | |
1297 | ||
1298 | if (fimc == NULL) | |
1299 | return; | |
1300 | ||
1bcd7041 SN |
1301 | if (video_is_registered(&fimc->vfd)) { |
1302 | video_unregister_device(&fimc->vfd); | |
1303 | media_entity_cleanup(&fimc->vfd.entity); | |
97d66c47 | 1304 | fimc->pipeline_ops = NULL; |
4af81310 SN |
1305 | } |
1306 | } | |
1307 | ||
1308 | static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = { | |
1309 | .registered = fimc_lite_subdev_registered, | |
1310 | .unregistered = fimc_lite_subdev_unregistered, | |
1311 | }; | |
1312 | ||
1313 | static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = { | |
1314 | .enum_mbus_code = fimc_lite_subdev_enum_mbus_code, | |
1315 | .get_selection = fimc_lite_subdev_get_selection, | |
1316 | .set_selection = fimc_lite_subdev_set_selection, | |
1317 | .get_fmt = fimc_lite_subdev_get_fmt, | |
1318 | .set_fmt = fimc_lite_subdev_set_fmt, | |
1319 | }; | |
1320 | ||
1321 | static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = { | |
1322 | .s_stream = fimc_lite_subdev_s_stream, | |
1323 | }; | |
1324 | ||
1325 | static const struct v4l2_subdev_core_ops fimc_lite_core_ops = { | |
4af81310 SN |
1326 | .log_status = fimc_lite_log_status, |
1327 | }; | |
1328 | ||
1329 | static struct v4l2_subdev_ops fimc_lite_subdev_ops = { | |
1330 | .core = &fimc_lite_core_ops, | |
1331 | .video = &fimc_lite_subdev_video_ops, | |
1332 | .pad = &fimc_lite_subdev_pad_ops, | |
1333 | }; | |
1334 | ||
1335 | static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl) | |
1336 | { | |
1337 | struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite, | |
1338 | ctrl_handler); | |
1339 | set_bit(ST_FLITE_CONFIG, &fimc->state); | |
1340 | return 0; | |
1341 | } | |
1342 | ||
1343 | static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = { | |
1344 | .s_ctrl = fimc_lite_s_ctrl, | |
1345 | }; | |
1346 | ||
1347 | static const struct v4l2_ctrl_config fimc_lite_ctrl = { | |
1348 | .ops = &fimc_lite_ctrl_ops, | |
1349 | .id = V4L2_CTRL_CLASS_USER | 0x1001, | |
1350 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
1351 | .name = "Test Pattern 640x480", | |
4cec1893 | 1352 | .step = 1, |
4af81310 SN |
1353 | }; |
1354 | ||
1355 | static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc) | |
1356 | { | |
1357 | struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler; | |
1358 | struct v4l2_subdev *sd = &fimc->subdev; | |
1359 | int ret; | |
1360 | ||
1361 | v4l2_subdev_init(sd, &fimc_lite_subdev_ops); | |
5a66561f | 1362 | sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
4af81310 SN |
1363 | snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index); |
1364 | ||
6319d6a0 SN |
1365 | fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK; |
1366 | fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE; | |
1367 | fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE; | |
1368 | ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM, | |
4af81310 SN |
1369 | fimc->subdev_pads, 0); |
1370 | if (ret) | |
1371 | return ret; | |
1372 | ||
1373 | v4l2_ctrl_handler_init(handler, 1); | |
1374 | fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl, | |
1375 | NULL); | |
1376 | if (handler->error) { | |
1377 | media_entity_cleanup(&sd->entity); | |
1378 | return handler->error; | |
1379 | } | |
1380 | ||
1381 | sd->ctrl_handler = handler; | |
1382 | sd->internal_ops = &fimc_lite_subdev_internal_ops; | |
1383 | sd->entity.ops = &fimc_lite_subdev_media_ops; | |
a59ed48f | 1384 | sd->owner = THIS_MODULE; |
4af81310 SN |
1385 | v4l2_set_subdevdata(sd, fimc); |
1386 | ||
1387 | return 0; | |
1388 | } | |
1389 | ||
1390 | static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc) | |
1391 | { | |
1392 | struct v4l2_subdev *sd = &fimc->subdev; | |
1393 | ||
1394 | v4l2_device_unregister_subdev(sd); | |
1395 | media_entity_cleanup(&sd->entity); | |
1396 | v4l2_ctrl_handler_free(&fimc->ctrl_handler); | |
1397 | v4l2_set_subdevdata(sd, NULL); | |
1398 | } | |
1399 | ||
1400 | static void fimc_lite_clk_put(struct fimc_lite *fimc) | |
1401 | { | |
24f99dd0 | 1402 | if (IS_ERR(fimc->clock)) |
4af81310 SN |
1403 | return; |
1404 | ||
1405 | clk_unprepare(fimc->clock); | |
1406 | clk_put(fimc->clock); | |
24f99dd0 | 1407 | fimc->clock = ERR_PTR(-EINVAL); |
4af81310 SN |
1408 | } |
1409 | ||
1410 | static int fimc_lite_clk_get(struct fimc_lite *fimc) | |
1411 | { | |
1412 | int ret; | |
1413 | ||
1414 | fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME); | |
1415 | if (IS_ERR(fimc->clock)) | |
1416 | return PTR_ERR(fimc->clock); | |
1417 | ||
1418 | ret = clk_prepare(fimc->clock); | |
1419 | if (ret < 0) { | |
1420 | clk_put(fimc->clock); | |
24f99dd0 | 1421 | fimc->clock = ERR_PTR(-EINVAL); |
4af81310 SN |
1422 | } |
1423 | return ret; | |
1424 | } | |
1425 | ||
eb62d9e9 SN |
1426 | static const struct of_device_id flite_of_match[]; |
1427 | ||
4c62e976 | 1428 | static int fimc_lite_probe(struct platform_device *pdev) |
4af81310 | 1429 | { |
eb62d9e9 SN |
1430 | struct flite_drvdata *drv_data = NULL; |
1431 | struct device *dev = &pdev->dev; | |
1432 | const struct of_device_id *of_id; | |
4af81310 SN |
1433 | struct fimc_lite *fimc; |
1434 | struct resource *res; | |
1435 | int ret; | |
1436 | ||
eb62d9e9 | 1437 | fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL); |
4af81310 SN |
1438 | if (!fimc) |
1439 | return -ENOMEM; | |
1440 | ||
eb62d9e9 SN |
1441 | if (dev->of_node) { |
1442 | of_id = of_match_node(flite_of_match, dev->of_node); | |
1443 | if (of_id) | |
1444 | drv_data = (struct flite_drvdata *)of_id->data; | |
1445 | fimc->index = of_alias_get_id(dev->of_node, "fimc-lite"); | |
1446 | } else { | |
1447 | drv_data = fimc_lite_get_drvdata(pdev); | |
1448 | fimc->index = pdev->id; | |
1449 | } | |
1450 | ||
1451 | if (!drv_data || fimc->index < 0 || fimc->index >= FIMC_LITE_MAX_DEVS) | |
1452 | return -EINVAL; | |
1453 | ||
9c8399c8 | 1454 | fimc->dd = drv_data; |
4af81310 SN |
1455 | fimc->pdev = pdev; |
1456 | ||
1457 | init_waitqueue_head(&fimc->irq_queue); | |
1458 | spin_lock_init(&fimc->slock); | |
1459 | mutex_init(&fimc->lock); | |
1460 | ||
1461 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
eb62d9e9 | 1462 | fimc->regs = devm_ioremap_resource(dev, res); |
f23999ec TR |
1463 | if (IS_ERR(fimc->regs)) |
1464 | return PTR_ERR(fimc->regs); | |
4af81310 SN |
1465 | |
1466 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1467 | if (res == NULL) { | |
eb62d9e9 | 1468 | dev_err(dev, "Failed to get IRQ resource\n"); |
4af81310 SN |
1469 | return -ENXIO; |
1470 | } | |
1471 | ||
1472 | ret = fimc_lite_clk_get(fimc); | |
1473 | if (ret) | |
1474 | return ret; | |
1475 | ||
eb62d9e9 SN |
1476 | ret = devm_request_irq(dev, res->start, flite_irq_handler, |
1477 | 0, dev_name(dev), fimc); | |
4af81310 | 1478 | if (ret) { |
eb62d9e9 | 1479 | dev_err(dev, "Failed to install irq (%d)\n", ret); |
4af81310 SN |
1480 | goto err_clk; |
1481 | } | |
1482 | ||
1483 | /* The video node will be created within the subdev's registered() op */ | |
1484 | ret = fimc_lite_create_capture_subdev(fimc); | |
1485 | if (ret) | |
1486 | goto err_clk; | |
1487 | ||
1488 | platform_set_drvdata(pdev, fimc); | |
eb62d9e9 SN |
1489 | pm_runtime_enable(dev); |
1490 | ret = pm_runtime_get_sync(dev); | |
4af81310 SN |
1491 | if (ret < 0) |
1492 | goto err_sd; | |
1493 | ||
eb62d9e9 | 1494 | fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev); |
4af81310 SN |
1495 | if (IS_ERR(fimc->alloc_ctx)) { |
1496 | ret = PTR_ERR(fimc->alloc_ctx); | |
1497 | goto err_pm; | |
1498 | } | |
eb62d9e9 | 1499 | pm_runtime_put(dev); |
4af81310 | 1500 | |
eb62d9e9 | 1501 | dev_dbg(dev, "FIMC-LITE.%d registered successfully\n", |
4af81310 SN |
1502 | fimc->index); |
1503 | return 0; | |
1504 | err_pm: | |
eb62d9e9 | 1505 | pm_runtime_put(dev); |
4af81310 SN |
1506 | err_sd: |
1507 | fimc_lite_unregister_capture_subdev(fimc); | |
1508 | err_clk: | |
1509 | fimc_lite_clk_put(fimc); | |
1510 | return ret; | |
1511 | } | |
1512 | ||
1513 | static int fimc_lite_runtime_resume(struct device *dev) | |
1514 | { | |
1515 | struct fimc_lite *fimc = dev_get_drvdata(dev); | |
1516 | ||
1517 | clk_enable(fimc->clock); | |
1518 | return 0; | |
1519 | } | |
1520 | ||
1521 | static int fimc_lite_runtime_suspend(struct device *dev) | |
1522 | { | |
1523 | struct fimc_lite *fimc = dev_get_drvdata(dev); | |
1524 | ||
1525 | clk_disable(fimc->clock); | |
1526 | return 0; | |
1527 | } | |
1528 | ||
1529 | #ifdef CONFIG_PM_SLEEP | |
1530 | static int fimc_lite_resume(struct device *dev) | |
1531 | { | |
1532 | struct fimc_lite *fimc = dev_get_drvdata(dev); | |
1533 | struct flite_buffer *buf; | |
1534 | unsigned long flags; | |
1535 | int i; | |
1536 | ||
1537 | spin_lock_irqsave(&fimc->slock, flags); | |
1538 | if (!test_and_clear_bit(ST_LPM, &fimc->state) || | |
1539 | !test_bit(ST_FLITE_IN_USE, &fimc->state)) { | |
1540 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1541 | return 0; | |
1542 | } | |
1543 | flite_hw_reset(fimc); | |
1544 | spin_unlock_irqrestore(&fimc->slock, flags); | |
1545 | ||
1546 | if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state)) | |
1547 | return 0; | |
1548 | ||
1549 | INIT_LIST_HEAD(&fimc->active_buf_q); | |
b9ee31e6 SN |
1550 | fimc_pipeline_call(fimc, open, &fimc->pipeline, |
1551 | &fimc->vfd.entity, false); | |
03878bb4 | 1552 | fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP); |
4af81310 SN |
1553 | clear_bit(ST_FLITE_SUSPENDED, &fimc->state); |
1554 | ||
1555 | for (i = 0; i < fimc->reqbufs_count; i++) { | |
1556 | if (list_empty(&fimc->pending_buf_q)) | |
1557 | break; | |
1558 | buf = fimc_lite_pending_queue_pop(fimc); | |
1559 | buffer_queue(&buf->vb); | |
1560 | } | |
1561 | return 0; | |
1562 | } | |
1563 | ||
1564 | static int fimc_lite_suspend(struct device *dev) | |
1565 | { | |
1566 | struct fimc_lite *fimc = dev_get_drvdata(dev); | |
1567 | bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state); | |
1568 | int ret; | |
1569 | ||
1570 | if (test_and_set_bit(ST_LPM, &fimc->state)) | |
1571 | return 0; | |
1572 | ||
1573 | ret = fimc_lite_stop_capture(fimc, suspend); | |
316efab3 | 1574 | if (ret < 0 || !fimc_lite_active(fimc)) |
4af81310 SN |
1575 | return ret; |
1576 | ||
b9ee31e6 | 1577 | return fimc_pipeline_call(fimc, close, &fimc->pipeline); |
4af81310 SN |
1578 | } |
1579 | #endif /* CONFIG_PM_SLEEP */ | |
1580 | ||
4c62e976 | 1581 | static int fimc_lite_remove(struct platform_device *pdev) |
4af81310 SN |
1582 | { |
1583 | struct fimc_lite *fimc = platform_get_drvdata(pdev); | |
1584 | struct device *dev = &pdev->dev; | |
1585 | ||
1586 | pm_runtime_disable(dev); | |
1587 | pm_runtime_set_suspended(dev); | |
1588 | fimc_lite_unregister_capture_subdev(fimc); | |
1589 | vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx); | |
1590 | fimc_lite_clk_put(fimc); | |
1591 | ||
1592 | dev_info(dev, "Driver unloaded\n"); | |
1593 | return 0; | |
1594 | } | |
1595 | ||
eb62d9e9 SN |
1596 | static const struct dev_pm_ops fimc_lite_pm_ops = { |
1597 | SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume) | |
1598 | SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume, | |
1599 | NULL) | |
1600 | }; | |
1601 | ||
9c8399c8 SN |
1602 | /* EXYNOS4212, EXYNOS4412 */ |
1603 | static struct flite_drvdata fimc_lite_drvdata_exynos4 = { | |
4af81310 SN |
1604 | .max_width = 8192, |
1605 | .max_height = 8192, | |
1606 | .out_width_align = 8, | |
1607 | .win_hor_offs_align = 2, | |
1608 | .out_hor_offs_align = 8, | |
1609 | }; | |
1610 | ||
eb62d9e9 SN |
1611 | static const struct of_device_id flite_of_match[] = { |
1612 | { | |
1613 | .compatible = "samsung,exynos4212-fimc-lite", | |
1614 | .data = &fimc_lite_drvdata_exynos4, | |
1615 | }, | |
1616 | { /* sentinel */ }, | |
4af81310 | 1617 | }; |
eb62d9e9 | 1618 | MODULE_DEVICE_TABLE(of, flite_of_match); |
4af81310 SN |
1619 | |
1620 | static struct platform_driver fimc_lite_driver = { | |
1621 | .probe = fimc_lite_probe, | |
4c62e976 | 1622 | .remove = fimc_lite_remove, |
4af81310 | 1623 | .driver = { |
eb62d9e9 | 1624 | .of_match_table = flite_of_match, |
4af81310 SN |
1625 | .name = FIMC_LITE_DRV_NAME, |
1626 | .owner = THIS_MODULE, | |
1627 | .pm = &fimc_lite_pm_ops, | |
1628 | } | |
1629 | }; | |
1630 | module_platform_driver(fimc_lite_driver); | |
1631 | MODULE_LICENSE("GPL"); | |
1632 | MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME); |