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186b250a | 1 | /* |
2c3fb08b | 2 | * linux/drivers/media/platform/coda/coda_regs.h |
186b250a JM |
3 | * |
4 | * Copyright (C) 2012 Vista Silicon SL | |
5 | * Javier Martin <javier.martin@vista-silicon.com> | |
6 | * Xavier Duret | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #ifndef _REGS_CODA_H_ | |
15 | #define _REGS_CODA_H_ | |
16 | ||
17 | /* HW registers */ | |
18 | #define CODA_REG_BIT_CODE_RUN 0x000 | |
19 | #define CODA_REG_RUN_ENABLE (1 << 0) | |
20 | #define CODA_REG_BIT_CODE_DOWN 0x004 | |
21 | #define CODA_DOWN_ADDRESS_SET(x) (((x) & 0xffff) << 16) | |
22 | #define CODA_DOWN_DATA_SET(x) ((x) & 0xffff) | |
23 | #define CODA_REG_BIT_HOST_IN_REQ 0x008 | |
24 | #define CODA_REG_BIT_INT_CLEAR 0x00c | |
25 | #define CODA_REG_BIT_INT_CLEAR_SET 0x1 | |
26 | #define CODA_REG_BIT_INT_STATUS 0x010 | |
27 | #define CODA_REG_BIT_CODE_RESET 0x014 | |
28 | #define CODA_REG_RESET_ENABLE (1 << 0) | |
29 | #define CODA_REG_BIT_CUR_PC 0x018 | |
30 | ||
31 | /* Static SW registers */ | |
32 | #define CODA_REG_BIT_CODE_BUF_ADDR 0x100 | |
33 | #define CODA_REG_BIT_WORK_BUF_ADDR 0x104 | |
34 | #define CODA_REG_BIT_PARA_BUF_ADDR 0x108 | |
35 | #define CODA_REG_BIT_STREAM_CTRL 0x10c | |
36 | #define CODA7_STREAM_BUF_PIC_RESET (1 << 4) | |
37 | #define CODADX6_STREAM_BUF_PIC_RESET (1 << 3) | |
38 | #define CODA7_STREAM_BUF_PIC_FLUSH (1 << 3) | |
39 | #define CODADX6_STREAM_BUF_PIC_FLUSH (1 << 2) | |
40 | #define CODA7_STREAM_BUF_DYNALLOC_EN (1 << 5) | |
41 | #define CODADX6_STREAM_BUF_DYNALLOC_EN (1 << 4) | |
42 | #define CODA_STREAM_CHKDIS_OFFSET (1 << 1) | |
43 | #define CODA_STREAM_ENDIAN_SELECT (1 << 0) | |
44 | #define CODA_REG_BIT_FRAME_MEM_CTRL 0x110 | |
45 | #define CODA_IMAGE_ENDIAN_SELECT (1 << 0) | |
5677e3b0 | 46 | #define CODA_REG_BIT_TEMP_BUF_ADDR 0x118 |
186b250a JM |
47 | #define CODA_REG_BIT_RD_PTR(x) (0x120 + 8 * (x)) |
48 | #define CODA_REG_BIT_WR_PTR(x) (0x124 + 8 * (x)) | |
1043667b PZ |
49 | #define CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR 0x140 |
50 | #define CODA7_REG_BIT_AXI_SRAM_USE 0x140 | |
c2d2251a PZ |
51 | #define CODA7_USE_HOST_ME_ENABLE (1 << 11) |
52 | #define CODA7_USE_HOST_OVL_ENABLE (1 << 10) | |
53 | #define CODA7_USE_HOST_DBK_ENABLE (1 << 9) | |
54 | #define CODA7_USE_HOST_IP_ENABLE (1 << 8) | |
1043667b PZ |
55 | #define CODA7_USE_HOST_BIT_ENABLE (1 << 7) |
56 | #define CODA7_USE_ME_ENABLE (1 << 4) | |
c2d2251a PZ |
57 | #define CODA7_USE_OVL_ENABLE (1 << 3) |
58 | #define CODA7_USE_DBK_ENABLE (1 << 2) | |
59 | #define CODA7_USE_IP_ENABLE (1 << 1) | |
60 | #define CODA7_USE_BIT_ENABLE (1 << 0) | |
61 | ||
186b250a JM |
62 | #define CODA_REG_BIT_BUSY 0x160 |
63 | #define CODA_REG_BIT_BUSY_FLAG 1 | |
64 | #define CODA_REG_BIT_RUN_COMMAND 0x164 | |
65 | #define CODA_COMMAND_SEQ_INIT 1 | |
66 | #define CODA_COMMAND_SEQ_END 2 | |
67 | #define CODA_COMMAND_PIC_RUN 3 | |
68 | #define CODA_COMMAND_SET_FRAME_BUF 4 | |
69 | #define CODA_COMMAND_ENCODE_HEADER 5 | |
70 | #define CODA_COMMAND_ENC_PARA_SET 6 | |
71 | #define CODA_COMMAND_DEC_PARA_SET 7 | |
72 | #define CODA_COMMAND_DEC_BUF_FLUSH 8 | |
73 | #define CODA_COMMAND_RC_CHANGE_PARAMETER 9 | |
74 | #define CODA_COMMAND_FIRMWARE_GET 0xf | |
75 | #define CODA_REG_BIT_RUN_INDEX 0x168 | |
76 | #define CODA_INDEX_SET(x) ((x) & 0x3) | |
77 | #define CODA_REG_BIT_RUN_COD_STD 0x16c | |
78 | #define CODADX6_MODE_DECODE_MP4 0 | |
79 | #define CODADX6_MODE_ENCODE_MP4 1 | |
80 | #define CODADX6_MODE_DECODE_H264 2 | |
81 | #define CODADX6_MODE_ENCODE_H264 3 | |
82 | #define CODA7_MODE_DECODE_H264 0 | |
83 | #define CODA7_MODE_DECODE_VC1 1 | |
84 | #define CODA7_MODE_DECODE_MP2 2 | |
85 | #define CODA7_MODE_DECODE_MP4 3 | |
86 | #define CODA7_MODE_DECODE_DV3 3 | |
87 | #define CODA7_MODE_DECODE_RV 4 | |
88 | #define CODA7_MODE_DECODE_MJPG 5 | |
89 | #define CODA7_MODE_ENCODE_H264 8 | |
90 | #define CODA7_MODE_ENCODE_MP4 11 | |
91 | #define CODA7_MODE_ENCODE_MJPG 13 | |
92 | #define CODA_MODE_INVALID 0xffff | |
93 | #define CODA_REG_BIT_INT_ENABLE 0x170 | |
94 | #define CODA_INT_INTERRUPT_ENABLE (1 << 3) | |
5677e3b0 PZ |
95 | #define CODA7_REG_BIT_RUN_AUX_STD 0x178 |
96 | #define CODA_MP4_AUX_MPEG4 0 | |
97 | #define CODA_MP4_AUX_DIVX3 1 | |
98 | #define CODA_VPX_AUX_THO 0 | |
99 | #define CODA_VPX_AUX_VP6 1 | |
100 | #define CODA_VPX_AUX_VP8 2 | |
101 | #define CODA_H264_AUX_AVC 0 | |
102 | #define CODA_H264_AUX_MVC 1 | |
186b250a JM |
103 | |
104 | /* | |
105 | * Commands' mailbox: | |
106 | * registers with offsets in the range 0x180-0x1d0 | |
107 | * have different meaning depending on the command being | |
108 | * issued. | |
109 | */ | |
110 | ||
111 | /* Encoder Sequence Initialization */ | |
112 | #define CODA_CMD_ENC_SEQ_BB_START 0x180 | |
113 | #define CODA_CMD_ENC_SEQ_BB_SIZE 0x184 | |
114 | #define CODA_CMD_ENC_SEQ_OPTION 0x188 | |
fb1fcf17 PZ |
115 | #define CODA7_OPTION_GAMMA_OFFSET 8 |
116 | #define CODADX6_OPTION_GAMMA_OFFSET 7 | |
186b250a | 117 | #define CODA_OPTION_LIMITQP_OFFSET 6 |
186b250a | 118 | #define CODA_OPTION_RCINTRAQP_OFFSET 5 |
186b250a | 119 | #define CODA_OPTION_FMO_OFFSET 4 |
186b250a | 120 | #define CODA_OPTION_SLICEREPORT_OFFSET 1 |
186b250a JM |
121 | #define CODA_CMD_ENC_SEQ_COD_STD 0x18c |
122 | #define CODA_STD_MPEG4 0 | |
123 | #define CODA_STD_H263 1 | |
124 | #define CODA_STD_H264 2 | |
125 | #define CODA_STD_MJPG 3 | |
126 | #define CODA_CMD_ENC_SEQ_SRC_SIZE 0x190 | |
127 | #define CODA7_PICWIDTH_OFFSET 16 | |
128 | #define CODA7_PICWIDTH_MASK 0xffff | |
129 | #define CODADX6_PICWIDTH_OFFSET 10 | |
130 | #define CODADX6_PICWIDTH_MASK 0x3ff | |
131 | #define CODA_PICHEIGHT_OFFSET 0 | |
b96904e5 PZ |
132 | #define CODADX6_PICHEIGHT_MASK 0x3ff |
133 | #define CODA7_PICHEIGHT_MASK 0xffff | |
186b250a JM |
134 | #define CODA_CMD_ENC_SEQ_SRC_F_RATE 0x194 |
135 | #define CODA_CMD_ENC_SEQ_MP4_PARA 0x198 | |
136 | #define CODA_MP4PARAM_VERID_OFFSET 6 | |
137 | #define CODA_MP4PARAM_VERID_MASK 0x01 | |
138 | #define CODA_MP4PARAM_INTRADCVLCTHR_OFFSET 2 | |
139 | #define CODA_MP4PARAM_INTRADCVLCTHR_MASK 0x07 | |
140 | #define CODA_MP4PARAM_REVERSIBLEVLCENABLE_OFFSET 1 | |
141 | #define CODA_MP4PARAM_REVERSIBLEVLCENABLE_MASK 0x01 | |
142 | #define CODA_MP4PARAM_DATAPARTITIONENABLE_OFFSET 0 | |
143 | #define CODA_MP4PARAM_DATAPARTITIONENABLE_MASK 0x01 | |
144 | #define CODA_CMD_ENC_SEQ_263_PARA 0x19c | |
145 | #define CODA_263PARAM_ANNEXJENABLE_OFFSET 2 | |
146 | #define CODA_263PARAM_ANNEXJENABLE_MASK 0x01 | |
147 | #define CODA_263PARAM_ANNEXKENABLE_OFFSET 1 | |
148 | #define CODA_263PARAM_ANNEXKENABLE_MASK 0x01 | |
149 | #define CODA_263PARAM_ANNEXTENABLE_OFFSET 0 | |
150 | #define CODA_263PARAM_ANNEXTENABLE_MASK 0x01 | |
151 | #define CODA_CMD_ENC_SEQ_264_PARA 0x1a0 | |
152 | #define CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET 12 | |
153 | #define CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK 0x0f | |
154 | #define CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET 8 | |
155 | #define CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK 0x0f | |
156 | #define CODA_264PARAM_DISABLEDEBLK_OFFSET 6 | |
157 | #define CODA_264PARAM_DISABLEDEBLK_MASK 0x01 | |
158 | #define CODA_264PARAM_CONSTRAINEDINTRAPREDFLAG_OFFSET 5 | |
159 | #define CODA_264PARAM_CONSTRAINEDINTRAPREDFLAG_MASK 0x01 | |
160 | #define CODA_264PARAM_CHROMAQPOFFSET_OFFSET 0 | |
161 | #define CODA_264PARAM_CHROMAQPOFFSET_MASK 0x1f | |
162 | #define CODA_CMD_ENC_SEQ_SLICE_MODE 0x1a4 | |
163 | #define CODA_SLICING_SIZE_OFFSET 2 | |
164 | #define CODA_SLICING_SIZE_MASK 0x3fffffff | |
165 | #define CODA_SLICING_UNIT_OFFSET 1 | |
166 | #define CODA_SLICING_UNIT_MASK 0x01 | |
167 | #define CODA_SLICING_MODE_OFFSET 0 | |
168 | #define CODA_SLICING_MODE_MASK 0x01 | |
169 | #define CODA_CMD_ENC_SEQ_GOP_SIZE 0x1a8 | |
170 | #define CODA_GOP_SIZE_OFFSET 0 | |
171 | #define CODA_GOP_SIZE_MASK 0x3f | |
172 | #define CODA_CMD_ENC_SEQ_RC_PARA 0x1ac | |
173 | #define CODA_RATECONTROL_AUTOSKIP_OFFSET 31 | |
174 | #define CODA_RATECONTROL_AUTOSKIP_MASK 0x01 | |
175 | #define CODA_RATECONTROL_INITIALDELAY_OFFSET 16 | |
176 | #define CODA_RATECONTROL_INITIALDELAY_MASK 0x7f | |
177 | #define CODA_RATECONTROL_BITRATE_OFFSET 1 | |
178 | #define CODA_RATECONTROL_BITRATE_MASK 0x7f | |
179 | #define CODA_RATECONTROL_ENABLE_OFFSET 0 | |
180 | #define CODA_RATECONTROL_ENABLE_MASK 0x01 | |
181 | #define CODA_CMD_ENC_SEQ_RC_BUF_SIZE 0x1b0 | |
182 | #define CODA_CMD_ENC_SEQ_INTRA_REFRESH 0x1b4 | |
1043667b | 183 | #define CODADX6_CMD_ENC_SEQ_FMO 0x1b8 |
186b250a JM |
184 | #define CODA_FMOPARAM_TYPE_OFFSET 4 |
185 | #define CODA_FMOPARAM_TYPE_MASK 1 | |
186 | #define CODA_FMOPARAM_SLICENUM_OFFSET 0 | |
187 | #define CODA_FMOPARAM_SLICENUM_MASK 0x0f | |
1043667b PZ |
188 | #define CODA7_CMD_ENC_SEQ_SEARCH_BASE 0x1b8 |
189 | #define CODA7_CMD_ENC_SEQ_SEARCH_SIZE 0x1bc | |
186b250a JM |
190 | #define CODA_CMD_ENC_SEQ_RC_QP_MAX 0x1c8 |
191 | #define CODA_QPMAX_OFFSET 0 | |
192 | #define CODA_QPMAX_MASK 0x3f | |
193 | #define CODA_CMD_ENC_SEQ_RC_GAMMA 0x1cc | |
194 | #define CODA_GAMMA_OFFSET 0 | |
195 | #define CODA_GAMMA_MASK 0xffff | |
196 | #define CODA_RET_ENC_SEQ_SUCCESS 0x1c0 | |
197 | ||
198 | /* Encoder Picture Run */ | |
199 | #define CODA_CMD_ENC_PIC_SRC_ADDR_Y 0x180 | |
200 | #define CODA_CMD_ENC_PIC_SRC_ADDR_CB 0x184 | |
201 | #define CODA_CMD_ENC_PIC_SRC_ADDR_CR 0x188 | |
202 | #define CODA_CMD_ENC_PIC_QS 0x18c | |
203 | #define CODA_CMD_ENC_PIC_ROT_MODE 0x190 | |
8f35c7bc PZ |
204 | #define CODA_ROT_MIR_ENABLE (1 << 4) |
205 | #define CODA_ROT_0 (0x0 << 0) | |
206 | #define CODA_ROT_90 (0x1 << 0) | |
207 | #define CODA_ROT_180 (0x2 << 0) | |
208 | #define CODA_ROT_270 (0x3 << 0) | |
209 | #define CODA_MIR_NONE (0x0 << 2) | |
210 | #define CODA_MIR_VER (0x1 << 2) | |
211 | #define CODA_MIR_HOR (0x2 << 2) | |
212 | #define CODA_MIR_VER_HOR (0x3 << 2) | |
186b250a JM |
213 | #define CODA_CMD_ENC_PIC_OPTION 0x194 |
214 | #define CODA_CMD_ENC_PIC_BB_START 0x198 | |
215 | #define CODA_CMD_ENC_PIC_BB_SIZE 0x19c | |
216 | #define CODA_RET_ENC_PIC_TYPE 0x1c4 | |
217 | #define CODA_RET_ENC_PIC_SLICE_NUM 0x1cc | |
218 | #define CODA_RET_ENC_PIC_FLAG 0x1d0 | |
219 | ||
220 | /* Set Frame Buffer */ | |
1043667b PZ |
221 | #define CODA_CMD_SET_FRAME_BUF_NUM 0x180 |
222 | #define CODA_CMD_SET_FRAME_BUF_STRIDE 0x184 | |
223 | #define CODA7_CMD_SET_FRAME_AXI_BIT_ADDR 0x190 | |
224 | #define CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR 0x194 | |
225 | #define CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR 0x198 | |
226 | #define CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR 0x19c | |
227 | #define CODA7_CMD_SET_FRAME_AXI_OVL_ADDR 0x1a0 | |
228 | #define CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE 0x1a8 | |
186b250a JM |
229 | |
230 | /* Encoder Header */ | |
231 | #define CODA_CMD_ENC_HEADER_CODE 0x180 | |
232 | #define CODA_GAMMA_OFFSET 0 | |
233 | #define CODA_HEADER_H264_SPS 0 | |
234 | #define CODA_HEADER_H264_PPS 1 | |
235 | #define CODA_HEADER_MP4V_VOL 0 | |
236 | #define CODA_HEADER_MP4V_VOS 1 | |
237 | #define CODA_HEADER_MP4V_VIS 2 | |
238 | #define CODA_CMD_ENC_HEADER_BB_START 0x184 | |
239 | #define CODA_CMD_ENC_HEADER_BB_SIZE 0x188 | |
240 | ||
241 | /* Get Version */ | |
242 | #define CODA_CMD_FIRMWARE_VERNUM 0x1c0 | |
243 | #define CODA_FIRMWARE_PRODUCT(x) (((x) >> 16) & 0xffff) | |
244 | #define CODA_FIRMWARE_MAJOR(x) (((x) >> 12) & 0x0f) | |
245 | #define CODA_FIRMWARE_MINOR(x) (((x) >> 8) & 0x0f) | |
246 | #define CODA_FIRMWARE_RELEASE(x) ((x) & 0xff) | |
247 | #define CODA_FIRMWARE_VERNUM(product, major, minor, release) \ | |
248 | ((product) << 16 | ((major) << 12) | \ | |
249 | ((minor) << 8) | (release)) | |
250 | ||
251 | #endif |