[linux-block.git] / drivers / media / platform / atmel / atmel-isc.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Microchip Image Sensor Controller (ISC) driver header file
 *
 * Copyright (C) 2016-2019 Microchip Technology, Inc.
 *
 * Author: Songjun Wu
 * Author: Eugen Hristev <eugen.hristev@microchip.com>
 *
 */
#ifndef _ATMEL_ISC_H_

#define ISC_MAX_SUPPORT_WIDTH   2592
#define ISC_MAX_SUPPORT_HEIGHT  1944

#define ISC_CLK_MAX_DIV		255

enum isc_clk_id {
	ISC_ISPCK = 0,
	ISC_MCK = 1,
};

struct isc_clk {
	struct clk_hw   hw;
	struct clk      *clk;
	struct regmap   *regmap;
	spinlock_t	lock;	/* serialize access to clock registers */
	u8		id;
	u8		parent_id;
	u32		div;
	struct device	*dev;
};

#define to_isc_clk(v) container_of(v, struct isc_clk, hw)

struct isc_buffer {
	struct vb2_v4l2_buffer  vb;
	struct list_head	list;
};

struct isc_subdev_entity {
	struct v4l2_subdev		*sd;
	struct v4l2_async_subdev	*asd;
	struct v4l2_async_notifier      notifier;

	u32 pfe_cfg0;

	struct list_head list;
};

/*
 * struct isc_format - ISC media bus format information
			This structure represents the interface between the ISC
			and the sensor. It's the input format received by
			the ISC.
 * @fourcc:		Fourcc code for this format
 * @mbus_code:		V4L2 media bus format code.
 * @cfa_baycfg:		If this format is RAW BAYER, indicate the type of bayer.
			this is either BGBG, RGRG, etc.
 * @pfe_cfg0_bps:	Number of hardware data lines connected to the ISC
 */

struct isc_format {
	u32	fourcc;
	u32	mbus_code;
	u32	cfa_baycfg;

	bool	sd_support;
	u32	pfe_cfg0_bps;
};

/* Pipeline bitmap */
#define WB_ENABLE	BIT(0)
#define CFA_ENABLE	BIT(1)
#define CC_ENABLE	BIT(2)
#define GAM_ENABLE	BIT(3)
#define GAM_BENABLE	BIT(4)
#define GAM_GENABLE	BIT(5)
#define GAM_RENABLE	BIT(6)
#define CSC_ENABLE	BIT(7)
#define CBC_ENABLE	BIT(8)
#define SUB422_ENABLE	BIT(9)
#define SUB420_ENABLE	BIT(10)

#define GAM_ENABLES	(GAM_RENABLE | GAM_GENABLE | GAM_BENABLE | GAM_ENABLE)

/*
 * struct fmt_config - ISC format configuration and internal pipeline
			This structure represents the internal configuration
			of the ISC.
			It also holds the format that ISC will present to v4l2.
 * @sd_format:		Pointer to an isc_format struct that holds the sensor
			configuration.
 * @fourcc:		Fourcc code for this format.
 * @bpp:		Bytes per pixel in the current format.
 * @rlp_cfg_mode:	Configuration of the RLP (rounding, limiting packaging)
 * @dcfg_imode:		Configuration of the input of the DMA module
 * @dctrl_dview:	Configuration of the output of the DMA module
 * @bits_pipeline:	Configuration of the pipeline, which modules are enabled
 */
struct fmt_config {
	struct isc_format	*sd_format;

	u32			fourcc;
	u8			bpp;

	u32			rlp_cfg_mode;
	u32			dcfg_imode;
	u32			dctrl_dview;

	u32			bits_pipeline;
};

#define HIST_ENTRIES		512
#define HIST_BAYER		(ISC_HIS_CFG_MODE_B + 1)

enum{
	HIST_INIT = 0,
	HIST_ENABLED,
	HIST_DISABLED,
};

struct isc_ctrls {
	struct v4l2_ctrl_handler handler;

	u32 brightness;
	u32 contrast;
	u8 gamma_index;
#define ISC_WB_NONE	0
#define ISC_WB_AUTO	1
#define ISC_WB_ONETIME	2
	u8 awb;

	/* one for each component : GR, R, GB, B */
	u32 gain[HIST_BAYER];
	u32 offset[HIST_BAYER];

	u32 hist_entry[HIST_ENTRIES];
	u32 hist_count[HIST_BAYER];
	u8 hist_id;
	u8 hist_stat;
#define HIST_MIN_INDEX		0
#define HIST_MAX_INDEX		1
	u32 hist_minmax[HIST_BAYER][2];
};

#define ISC_PIPE_LINE_NODE_NUM	11

/*
 * struct isc_device - ISC device driver data/config struct
 * @regmap:		Register map
 * @hclock:		Hclock clock input (refer datasheet)
 * @ispck:		iscpck clock (refer datasheet)
 * @isc_clks:		ISC clocks
 *
 * @dev:		Registered device driver
 * @v4l2_dev:		v4l2 registered device
 * @video_dev:		registered video device
 *
 * @vb2_vidq:		video buffer 2 video queue
 * @dma_queue_lock:	lock to serialize the dma buffer queue
 * @dma_queue:		the queue for dma buffers
 * @cur_frm:		current isc frame/buffer
 * @sequence:		current frame number
 * @stop:		true if isc is not streaming, false if streaming
 * @comp:		completion reference that signals frame completion
 *
 * @fmt:		current v42l format
 * @user_formats:	list of formats that are supported and agreed with sd
 * @num_user_formats:	how many formats are in user_formats
 *
 * @config:		current ISC format configuration
 * @try_config:		the current ISC try format , not yet activated
 *
 * @ctrls:		holds information about ISC controls
 * @do_wb_ctrl:		control regarding the DO_WHITE_BALANCE button
 * @awb_work:		workqueue reference for autowhitebalance histogram
 *			analysis
 *
 * @lock:		lock for serializing userspace file operations
 *			with ISC operations
 * @awb_lock:		lock for serializing awb work queue operations
 *			with DMA/buffer operations
 *
 * @pipeline:		configuration of the ISC pipeline
 *
 * @current_subdev:	current subdevice: the sensor
 * @subdev_entities:	list of subdevice entitites
 */
struct isc_device {
	struct regmap		*regmap;
	struct clk		*hclock;
	struct clk		*ispck;
	struct isc_clk		isc_clks[2];

	struct device		*dev;
	struct v4l2_device	v4l2_dev;
	struct video_device	video_dev;

	struct vb2_queue	vb2_vidq;
	spinlock_t		dma_queue_lock; /* serialize access to dma queue */
	struct list_head	dma_queue;
	struct isc_buffer	*cur_frm;
	unsigned int		sequence;
	bool			stop;
	struct completion	comp;

	struct v4l2_format	fmt;
	struct isc_format	**user_formats;
	unsigned int		num_user_formats;

	struct fmt_config	config;
	struct fmt_config	try_config;

	struct isc_ctrls	ctrls;
	struct work_struct	awb_work;

	struct mutex		lock; /* serialize access to file operations */
	spinlock_t		awb_lock; /* serialize access to DMA buffers from awb work queue */

	struct regmap_field	*pipeline[ISC_PIPE_LINE_NODE_NUM];

	struct isc_subdev_entity	*current_subdev;
	struct list_head		subdev_entities;

	struct {
#define ISC_CTRL_DO_WB 1
#define ISC_CTRL_R_GAIN 2
#define ISC_CTRL_B_GAIN 3
#define ISC_CTRL_GR_GAIN 4
#define ISC_CTRL_GB_GAIN 5
#define ISC_CTRL_R_OFF 6
#define ISC_CTRL_B_OFF 7
#define ISC_CTRL_GR_OFF 8
#define ISC_CTRL_GB_OFF 9
		struct v4l2_ctrl	*awb_ctrl;
		struct v4l2_ctrl	*do_wb_ctrl;
		struct v4l2_ctrl	*r_gain_ctrl;
		struct v4l2_ctrl	*b_gain_ctrl;
		struct v4l2_ctrl	*gr_gain_ctrl;
		struct v4l2_ctrl	*gb_gain_ctrl;
		struct v4l2_ctrl	*r_off_ctrl;
		struct v4l2_ctrl	*b_off_ctrl;
		struct v4l2_ctrl	*gr_off_ctrl;
		struct v4l2_ctrl	*gb_off_ctrl;
	};
};

#define GAMMA_MAX	2
#define GAMMA_ENTRIES	64

#define ATMEL_ISC_NAME "atmel-isc"

extern struct isc_format formats_list[];
extern const struct isc_format controller_formats[];
extern const u32 isc_gamma_table[GAMMA_MAX + 1][GAMMA_ENTRIES];
extern const struct regmap_config isc_regmap_config;
extern const struct v4l2_async_notifier_operations isc_async_ops;

irqreturn_t isc_interrupt(int irq, void *dev_id);
int isc_pipeline_init(struct isc_device *isc);
int isc_clk_init(struct isc_device *isc);
void isc_subdev_cleanup(struct isc_device *isc);
void isc_clk_cleanup(struct isc_device *isc);

#endif
Commit	Line	Data
0a0e2655 EH	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/*
	3	* Microchip Image Sensor Controller (ISC) driver header file
	4	*
	5	* Copyright (C) 2016-2019 Microchip Technology, Inc.
	6	*
	7	* Author: Songjun Wu
	8	* Author: Eugen Hristev <eugen.hristev@microchip.com>
	9	*
	10	*/
	11	#ifndef _ATMEL_ISC_H_
	12
	13	#define ISC_MAX_SUPPORT_WIDTH 2592
	14	#define ISC_MAX_SUPPORT_HEIGHT 1944
	15
	16	#define ISC_CLK_MAX_DIV 255
	17
	18	enum isc_clk_id {
	19	ISC_ISPCK = 0,
	20	ISC_MCK = 1,
	21	};
	22
	23	struct isc_clk {
	24	struct clk_hw hw;
	25	struct clk *clk;
	26	struct regmap *regmap;
	27	spinlock_t lock; /* serialize access to clock registers */
	28	u8 id;
	29	u8 parent_id;
	30	u32 div;
	31	struct device *dev;
	32	};
	33
	34	#define to_isc_clk(v) container_of(v, struct isc_clk, hw)
	35
	36	struct isc_buffer {
	37	struct vb2_v4l2_buffer vb;
	38	struct list_head list;
	39	};
	40
	41	struct isc_subdev_entity {
	42	struct v4l2_subdev *sd;
	43	struct v4l2_async_subdev *asd;
	44	struct v4l2_async_notifier notifier;
	45
	46	u32 pfe_cfg0;
	47
	48	struct list_head list;
	49	};
	50
	51	/*
	52	* struct isc_format - ISC media bus format information
	53	This structure represents the interface between the ISC
	54	and the sensor. It's the input format received by
	55	the ISC.
	56	* @fourcc: Fourcc code for this format
	57	* @mbus_code: V4L2 media bus format code.
	58	* @cfa_baycfg: If this format is RAW BAYER, indicate the type of bayer.
	59	this is either BGBG, RGRG, etc.
	60	* @pfe_cfg0_bps: Number of hardware data lines connected to the ISC
	61	*/
	62
	63	struct isc_format {
	64	u32 fourcc;
65	u32 mbus_code;
66	u32 cfa_baycfg;
67
68	bool sd_support;
69	u32 pfe_cfg0_bps;
70	};
71
72	/* Pipeline bitmap */
73	#define WB_ENABLE BIT(0)
74	#define CFA_ENABLE BIT(1)
75	#define CC_ENABLE BIT(2)
76	#define GAM_ENABLE BIT(3)
77	#define GAM_BENABLE BIT(4)
78	#define GAM_GENABLE BIT(5)
79	#define GAM_RENABLE BIT(6)
80	#define CSC_ENABLE BIT(7)
81	#define CBC_ENABLE BIT(8)
82	#define SUB422_ENABLE BIT(9)
83	#define SUB420_ENABLE BIT(10)
84
85	#define GAM_ENABLES (GAM_RENABLE \| GAM_GENABLE \| GAM_BENABLE \| GAM_ENABLE)
86
87	/*
88	* struct fmt_config - ISC format configuration and internal pipeline
89	This structure represents the internal configuration
90	of the ISC.
91	It also holds the format that ISC will present to v4l2.
92	* @sd_format: Pointer to an isc_format struct that holds the sensor
93	configuration.
94	* @fourcc: Fourcc code for this format.
95	* @bpp: Bytes per pixel in the current format.
96	* @rlp_cfg_mode: Configuration of the RLP (rounding, limiting packaging)
97	* @dcfg_imode: Configuration of the input of the DMA module
98	* @dctrl_dview: Configuration of the output of the DMA module
99	* @bits_pipeline: Configuration of the pipeline, which modules are enabled
100	*/
101	struct fmt_config {
102	struct isc_format *sd_format;
103
104	u32 fourcc;
105	u8 bpp;
106
107	u32 rlp_cfg_mode;
108	u32 dcfg_imode;
109	u32 dctrl_dview;
110
111	u32 bits_pipeline;
112	};
113
114	#define HIST_ENTRIES 512
115	#define HIST_BAYER (ISC_HIS_CFG_MODE_B + 1)
116
117	enum{
118	HIST_INIT = 0,
119	HIST_ENABLED,
120	HIST_DISABLED,
121	};
122
123	struct isc_ctrls {
124	struct v4l2_ctrl_handler handler;
125
126	u32 brightness;
127	u32 contrast;
128	u8 gamma_index;
129	#define ISC_WB_NONE 0
130	#define ISC_WB_AUTO 1
131	#define ISC_WB_ONETIME 2
132	u8 awb;
133
134	/* one for each component : GR, R, GB, B */
135	u32 gain[HIST_BAYER];
136	u32 offset[HIST_BAYER];
137
138	u32 hist_entry[HIST_ENTRIES];
139	u32 hist_count[HIST_BAYER];
140	u8 hist_id;
141	u8 hist_stat;
142	#define HIST_MIN_INDEX 0
143	#define HIST_MAX_INDEX 1
144	u32 hist_minmax[HIST_BAYER][2];
145	};
146
147	#define ISC_PIPE_LINE_NODE_NUM 11
148
149	/*
150	* struct isc_device - ISC device driver data/config struct
151	* @regmap: Register map
152	* @hclock: Hclock clock input (refer datasheet)
153	* @ispck: iscpck clock (refer datasheet)
154	* @isc_clks: ISC clocks
155	*
156	* @dev: Registered device driver
157	* @v4l2_dev: v4l2 registered device
158	* @video_dev: registered video device
159	*
160	* @vb2_vidq: video buffer 2 video queue
161	* @dma_queue_lock: lock to serialize the dma buffer queue
162	* @dma_queue: the queue for dma buffers
163	* @cur_frm: current isc frame/buffer
164	* @sequence: current frame number
165	* @stop: true if isc is not streaming, false if streaming
166	* @comp: completion reference that signals frame completion
167	*
168	* @fmt: current v42l format
169	* @user_formats: list of formats that are supported and agreed with sd
170	* @num_user_formats: how many formats are in user_formats
171	*
172	* @config: current ISC format configuration
173	* @try_config: the current ISC try format , not yet activated
174	*
175	* @ctrls: holds information about ISC controls
176	* @do_wb_ctrl: control regarding the DO_WHITE_BALANCE button
177	* @awb_work: workqueue reference for autowhitebalance histogram
178	* analysis
179	*
180	* @lock: lock for serializing userspace file operations
181	* with ISC operations
182	* @awb_lock: lock for serializing awb work queue operations
183	* with DMA/buffer operations
184	*
185	* @pipeline: configuration of the ISC pipeline
186	*
187	* @current_subdev: current subdevice: the sensor
188	* @subdev_entities: list of subdevice entitites
189	*/
190	struct isc_device {
191	struct regmap *regmap;
192	struct clk *hclock;
193	struct clk *ispck;
194	struct isc_clk isc_clks[2];
195
196	struct device *dev;
197	struct v4l2_device v4l2_dev;
198	struct video_device video_dev;
199
200	struct vb2_queue vb2_vidq;
201	spinlock_t dma_queue_lock; /* serialize access to dma queue */
202	struct list_head dma_queue;
203	struct isc_buffer *cur_frm;
204	unsigned int sequence;
205	bool stop;
206	struct completion comp;
207
208	struct v4l2_format fmt;
209	struct isc_format **user_formats;
210	unsigned int num_user_formats;
211
212	struct fmt_config config;
213	struct fmt_config try_config;
214
215	struct isc_ctrls ctrls;
0a0e2655 EH	216	struct work_struct awb_work;
	217
	218	struct mutex lock; /* serialize access to file operations */
	219	spinlock_t awb_lock; /* serialize access to DMA buffers from awb work queue */
	220
	221	struct regmap_field *pipeline[ISC_PIPE_LINE_NODE_NUM];
	222
	223	struct isc_subdev_entity *current_subdev;
	224	struct list_head subdev_entities;
4e52889f EH	225
	226	struct {
	227	#define ISC_CTRL_DO_WB 1
	228	#define ISC_CTRL_R_GAIN 2
	229	#define ISC_CTRL_B_GAIN 3
	230	#define ISC_CTRL_GR_GAIN 4
	231	#define ISC_CTRL_GB_GAIN 5
	232	#define ISC_CTRL_R_OFF 6
	233	#define ISC_CTRL_B_OFF 7
	234	#define ISC_CTRL_GR_OFF 8
	235	#define ISC_CTRL_GB_OFF 9
	236	struct v4l2_ctrl *awb_ctrl;
	237	struct v4l2_ctrl *do_wb_ctrl;
	238	struct v4l2_ctrl *r_gain_ctrl;
	239	struct v4l2_ctrl *b_gain_ctrl;
	240	struct v4l2_ctrl *gr_gain_ctrl;
	241	struct v4l2_ctrl *gb_gain_ctrl;
	242	struct v4l2_ctrl *r_off_ctrl;
	243	struct v4l2_ctrl *b_off_ctrl;
	244	struct v4l2_ctrl *gr_off_ctrl;
	245	struct v4l2_ctrl *gb_off_ctrl;
	246	};
0a0e2655 EH	247	};
	248
	249	#define GAMMA_MAX 2
	250	#define GAMMA_ENTRIES 64
	251
	252	#define ATMEL_ISC_NAME "atmel-isc"
	253
0a0e2655	254	extern struct isc_format formats_list[];
b046ec51	255	extern const struct isc_format controller_formats[];
0a0e2655 EH	256	extern const u32 isc_gamma_table[GAMMA_MAX + 1][GAMMA_ENTRIES];
	257	extern const struct regmap_config isc_regmap_config;
	258	extern const struct v4l2_async_notifier_operations isc_async_ops;
	259
	260	irqreturn_t isc_interrupt(int irq, void *dev_id);
	261	int isc_pipeline_init(struct isc_device *isc);
	262	int isc_clk_init(struct isc_device *isc);
	263	void isc_subdev_cleanup(struct isc_device *isc);
	264	void isc_clk_cleanup(struct isc_device *isc);
	265
	266	#endif