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Merge branch 'core-objtool-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-block.git] / drivers / media / platform / am437x / am437x-vpfe.c
CommitLineData
724de7b5 1// SPDX-License-Identifier: GPL-2.0-only
417d2e50
BP		 2/*
3 * TI VPFE capture Driver
4 *
5 * Copyright (C) 2013 - 2014 Texas Instruments, Inc.
6 *
7 * Benoit Parrot <bparrot@ti.com>
8 * Lad, Prabhakar <prabhakar.csengg@gmail.com>
417d2e50
BP		 9 */
10
11#include <linux/delay.h>
12#include <linux/err.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16#include <linux/module.h>
859969b3 17#include <linux/of_graph.h>
417d2e50
BP		 18#include <linux/pinctrl/consumer.h>
19#include <linux/platform_device.h>
20#include <linux/pm_runtime.h>
21#include <linux/slab.h>
22#include <linux/uaccess.h>
23#include <linux/videodev2.h>
24
25#include <media/v4l2-common.h>
26#include <media/v4l2-ctrls.h>
27#include <media/v4l2-event.h>
859969b3 28#include <media/v4l2-fwnode.h>
417d2e50
BP		 29
30#include "am437x-vpfe.h"
31
32#define VPFE_MODULE_NAME "vpfe"
33#define VPFE_VERSION "0.1.0"
34
35static int debug;
36module_param(debug, int, 0644);
37MODULE_PARM_DESC(debug, "Debug level 0-8");
38
39#define vpfe_dbg(level, dev, fmt, arg...) \
40 v4l2_dbg(level, debug, &dev->v4l2_dev, fmt, ##arg)
41#define vpfe_info(dev, fmt, arg...) \
42 v4l2_info(&dev->v4l2_dev, fmt, ##arg)
43#define vpfe_err(dev, fmt, arg...) \
44 v4l2_err(&dev->v4l2_dev, fmt, ##arg)
45
46/* standard information */
47struct vpfe_standard {
48 v4l2_std_id std_id;
49 unsigned int width;
50 unsigned int height;
51 struct v4l2_fract pixelaspect;
52 int frame_format;
53};
54
42fd3638 55static const struct vpfe_standard vpfe_standards[] = {
417d2e50
BP		 56 {V4L2_STD_525_60, 720, 480, {11, 10}, 1},
57 {V4L2_STD_625_50, 720, 576, {54, 59}, 1},
58};
59
0512ccba 60static struct vpfe_fmt formats[VPFE_NUM_FORMATS] = {
417d2e50 61 {
417d2e50
BP		 62 .fourcc = V4L2_PIX_FMT_YUYV,
63 .code = MEDIA_BUS_FMT_YUYV8_2X8,
ea169d2d 64 .bitsperpixel = 16,
417d2e50 65 }, {
417d2e50
BP		 66 .fourcc = V4L2_PIX_FMT_UYVY,
67 .code = MEDIA_BUS_FMT_UYVY8_2X8,
ea169d2d 68 .bitsperpixel = 16,
417d2e50 69 }, {
417d2e50
BP		 70 .fourcc = V4L2_PIX_FMT_YVYU,
71 .code = MEDIA_BUS_FMT_YVYU8_2X8,
ea169d2d 72 .bitsperpixel = 16,
417d2e50 73 }, {
417d2e50
BP		 74 .fourcc = V4L2_PIX_FMT_VYUY,
75 .code = MEDIA_BUS_FMT_VYUY8_2X8,
ea169d2d 76 .bitsperpixel = 16,
417d2e50 77 }, {
417d2e50
BP		 78 .fourcc = V4L2_PIX_FMT_SBGGR8,
79 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
ea169d2d 80 .bitsperpixel = 8,
417d2e50 81 }, {
417d2e50
BP		 82 .fourcc = V4L2_PIX_FMT_SGBRG8,
83 .code = MEDIA_BUS_FMT_SGBRG8_1X8,
ea169d2d 84 .bitsperpixel = 8,
417d2e50 85 }, {
417d2e50
BP		 86 .fourcc = V4L2_PIX_FMT_SGRBG8,
87 .code = MEDIA_BUS_FMT_SGRBG8_1X8,
ea169d2d 88 .bitsperpixel = 8,
417d2e50 89 }, {
417d2e50
BP		 90 .fourcc = V4L2_PIX_FMT_SRGGB8,
91 .code = MEDIA_BUS_FMT_SRGGB8_1X8,
ea169d2d 92 .bitsperpixel = 8,
417d2e50 93 }, {
417d2e50
BP		 94 .fourcc = V4L2_PIX_FMT_RGB565,
95 .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
ea169d2d 96 .bitsperpixel = 16,
417d2e50 97 }, {
417d2e50
BP		 98 .fourcc = V4L2_PIX_FMT_RGB565X,
99 .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
ea169d2d 100 .bitsperpixel = 16,
417d2e50
BP		 101 },
102};
103
750ef54b
BP		 104static int __subdev_get_format(struct vpfe_device *vpfe,
105 struct v4l2_mbus_framefmt *fmt);
106static int vpfe_calc_format_size(struct vpfe_device *vpfe,
107 const struct vpfe_fmt *fmt,
108 struct v4l2_format *f);
417d2e50 109
0512ccba
BP		 110static struct vpfe_fmt *find_format_by_code(struct vpfe_device *vpfe,
111 unsigned int code)
417d2e50
BP		 112{
113 struct vpfe_fmt *fmt;
114 unsigned int k;
115
0512ccba
BP		 116 for (k = 0; k < vpfe->num_active_fmt; k++) {
117 fmt = vpfe->active_fmt[k];
417d2e50
BP		 118 if (fmt->code == code)
119 return fmt;
120 }
121
122 return NULL;
123}
124
0512ccba
BP		 125static struct vpfe_fmt *find_format_by_pix(struct vpfe_device *vpfe,
126 unsigned int pixelformat)
417d2e50
BP		 127{
128 struct vpfe_fmt *fmt;
129 unsigned int k;
130
0512ccba
BP		 131 for (k = 0; k < vpfe->num_active_fmt; k++) {
132 fmt = vpfe->active_fmt[k];
417d2e50
BP		 133 if (fmt->fourcc == pixelformat)
134 return fmt;
135 }
136
137 return NULL;
138}
139
750ef54b
BP		 140static unsigned int __get_bytesperpixel(struct vpfe_device *vpfe,
141 const struct vpfe_fmt *fmt)
417d2e50
BP		 142{
143 struct vpfe_subdev_info *sdinfo = vpfe->current_subdev;
144 unsigned int bus_width = sdinfo->vpfe_param.bus_width;
ea169d2d 145 u32 bpp, bus_width_bytes, clocksperpixel;
417d2e50 146
ea169d2d
BP		 147 bus_width_bytes = ALIGN(bus_width, 8) >> 3;
148 clocksperpixel = DIV_ROUND_UP(fmt->bitsperpixel, bus_width);
149 bpp = clocksperpixel * bus_width_bytes;
417d2e50 150
750ef54b 151 return bpp;
417d2e50
BP		 152}
153
154/* Print Four-character-code (FOURCC) */
155static char *print_fourcc(u32 fmt)
156{
157 static char code[5];
158
159 code[0] = (unsigned char)(fmt & 0xff);
160 code[1] = (unsigned char)((fmt >> 8) & 0xff);
161 code[2] = (unsigned char)((fmt >> 16) & 0xff);
162 code[3] = (unsigned char)((fmt >> 24) & 0xff);
163 code[4] = '\0';
164
165 return code;
166}
167
417d2e50
BP		 168static inline u32 vpfe_reg_read(struct vpfe_ccdc *ccdc, u32 offset)
169{
170 return ioread32(ccdc->ccdc_cfg.base_addr + offset);
171}
172
173static inline void vpfe_reg_write(struct vpfe_ccdc *ccdc, u32 val, u32 offset)
174{
175 iowrite32(val, ccdc->ccdc_cfg.base_addr + offset);
176}
177
178static inline struct vpfe_device *to_vpfe(struct vpfe_ccdc *ccdc)
179{
180 return container_of(ccdc, struct vpfe_device, ccdc);
181}
182
2d700715
JS		 183static inline
184struct vpfe_cap_buffer *to_vpfe_buffer(struct vb2_v4l2_buffer *vb)
417d2e50
BP		 185{
186 return container_of(vb, struct vpfe_cap_buffer, vb);
187}
188
189static inline void vpfe_pcr_enable(struct vpfe_ccdc *ccdc, int flag)
190{
191 vpfe_reg_write(ccdc, !!flag, VPFE_PCR);
192}
193
194static void vpfe_config_enable(struct vpfe_ccdc *ccdc, int flag)
195{
196 unsigned int cfg;
197
198 if (!flag) {
199 cfg = vpfe_reg_read(ccdc, VPFE_CONFIG);
200 cfg &= ~(VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT);
201 } else {
202 cfg = VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT;
203 }
204
205 vpfe_reg_write(ccdc, cfg, VPFE_CONFIG);
206}
207
208static void vpfe_ccdc_setwin(struct vpfe_ccdc *ccdc,
209 struct v4l2_rect *image_win,
210 enum ccdc_frmfmt frm_fmt,
211 int bpp)
212{
213 int horz_start, horz_nr_pixels;
214 int vert_start, vert_nr_lines;
215 int val, mid_img;
216
217 /*
218 * ppc - per pixel count. indicates how many pixels per cell
219 * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
220 * raw capture this is 1
221 */
222 horz_start = image_win->left * bpp;
223 horz_nr_pixels = (image_win->width * bpp) - 1;
224 vpfe_reg_write(ccdc, (horz_start << VPFE_HORZ_INFO_SPH_SHIFT) |
225 horz_nr_pixels, VPFE_HORZ_INFO);
226
227 vert_start = image_win->top;
228
229 if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
230 vert_nr_lines = (image_win->height >> 1) - 1;
231 vert_start >>= 1;
417d2e50
BP		 232 /* configure VDINT0 */
233 val = (vert_start << VPFE_VDINT_VDINT0_SHIFT);
234 } else {
417d2e50
BP		 235 vert_nr_lines = image_win->height - 1;
236 /*
237 * configure VDINT0 and VDINT1. VDINT1 will be at half
238 * of image height
239 */
240 mid_img = vert_start + (image_win->height / 2);
241 val = (vert_start << VPFE_VDINT_VDINT0_SHIFT) |
242 (mid_img & VPFE_VDINT_VDINT1_MASK);
243 }
244
245 vpfe_reg_write(ccdc, val, VPFE_VDINT);
246
247 vpfe_reg_write(ccdc, (vert_start << VPFE_VERT_START_SLV0_SHIFT) |
248 vert_start, VPFE_VERT_START);
249 vpfe_reg_write(ccdc, vert_nr_lines, VPFE_VERT_LINES);
250}
251
252static void vpfe_reg_dump(struct vpfe_ccdc *ccdc)
253{
254 struct vpfe_device *vpfe = to_vpfe(ccdc);
255
256 vpfe_dbg(3, vpfe, "ALAW: 0x%x\n", vpfe_reg_read(ccdc, VPFE_ALAW));
257 vpfe_dbg(3, vpfe, "CLAMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_CLAMP));
258 vpfe_dbg(3, vpfe, "DCSUB: 0x%x\n", vpfe_reg_read(ccdc, VPFE_DCSUB));
259 vpfe_dbg(3, vpfe, "BLKCMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_BLKCMP));
260 vpfe_dbg(3, vpfe, "COLPTN: 0x%x\n", vpfe_reg_read(ccdc, VPFE_COLPTN));
261 vpfe_dbg(3, vpfe, "SDOFST: 0x%x\n", vpfe_reg_read(ccdc, VPFE_SDOFST));
262 vpfe_dbg(3, vpfe, "SYN_MODE: 0x%x\n",
263 vpfe_reg_read(ccdc, VPFE_SYNMODE));
264 vpfe_dbg(3, vpfe, "HSIZE_OFF: 0x%x\n",
265 vpfe_reg_read(ccdc, VPFE_HSIZE_OFF));
266 vpfe_dbg(3, vpfe, "HORZ_INFO: 0x%x\n",
267 vpfe_reg_read(ccdc, VPFE_HORZ_INFO));
268 vpfe_dbg(3, vpfe, "VERT_START: 0x%x\n",
269 vpfe_reg_read(ccdc, VPFE_VERT_START));
270 vpfe_dbg(3, vpfe, "VERT_LINES: 0x%x\n",
271 vpfe_reg_read(ccdc, VPFE_VERT_LINES));
272}
273
274static int
275vpfe_ccdc_validate_param(struct vpfe_ccdc *ccdc,
276 struct vpfe_ccdc_config_params_raw *ccdcparam)
277{
278 struct vpfe_device *vpfe = to_vpfe(ccdc);
279 u8 max_gamma, max_data;
280
281 if (!ccdcparam->alaw.enable)
282 return 0;
283
284 max_gamma = ccdc_gamma_width_max_bit(ccdcparam->alaw.gamma_wd);
285 max_data = ccdc_data_size_max_bit(ccdcparam->data_sz);
286
287 if (ccdcparam->alaw.gamma_wd > VPFE_CCDC_GAMMA_BITS_09_0 ||
3f870a45 288 ccdcparam->data_sz > VPFE_CCDC_DATA_8BITS ||
417d2e50
BP		 289 max_gamma > max_data) {
290 vpfe_dbg(1, vpfe, "Invalid data line select\n");
291 return -EINVAL;
292 }
293
294 return 0;
295}
296
297static void
298vpfe_ccdc_update_raw_params(struct vpfe_ccdc *ccdc,
299 struct vpfe_ccdc_config_params_raw *raw_params)
300{
301 struct vpfe_ccdc_config_params_raw *config_params =
302 &ccdc->ccdc_cfg.bayer.config_params;
303
adf98ffe 304 *config_params = *raw_params;
417d2e50
BP		 305}
306
307/*
308 * vpfe_ccdc_restore_defaults()
309 * This function will write defaults to all CCDC registers
310 */
311static void vpfe_ccdc_restore_defaults(struct vpfe_ccdc *ccdc)
312{
313 int i;
314
315 /* Disable CCDC */
316 vpfe_pcr_enable(ccdc, 0);
317
318 /* set all registers to default value */
319 for (i = 4; i <= 0x94; i += 4)
320 vpfe_reg_write(ccdc, 0, i);
321
322 vpfe_reg_write(ccdc, VPFE_NO_CULLING, VPFE_CULLING);
323 vpfe_reg_write(ccdc, VPFE_CCDC_GAMMA_BITS_11_2, VPFE_ALAW);
324}
325
326static int vpfe_ccdc_close(struct vpfe_ccdc *ccdc, struct device *dev)
327{
eac5727d 328 struct vpfe_device *vpfe = to_vpfe(ccdc);
b58e69e9 329 u32 dma_cntl, pcr;
417d2e50 330
b58e69e9
BP		 331 pcr = vpfe_reg_read(ccdc, VPFE_PCR);
332 if (pcr)
333 vpfe_dbg(1, vpfe, "VPFE_PCR is still set (%x)", pcr);
417d2e50 334
b58e69e9
BP		 335 dma_cntl = vpfe_reg_read(ccdc, VPFE_DMA_CNTL);
336 if ((dma_cntl & VPFE_DMA_CNTL_OVERFLOW))
337 vpfe_dbg(1, vpfe, "VPFE_DMA_CNTL_OVERFLOW is still set (%x)",
338 dma_cntl);
417d2e50
BP		 339
340 /* Disable CCDC by resetting all register to default POR values */
341 vpfe_ccdc_restore_defaults(ccdc);
342
417d2e50
BP		 343 /* Disabled the module at the CONFIG level */
344 vpfe_config_enable(ccdc, 0);
345
346 pm_runtime_put_sync(dev);
417d2e50
BP		 347 return 0;
348}
349
350static int vpfe_ccdc_set_params(struct vpfe_ccdc *ccdc, void __user *params)
351{
eac5727d 352 struct vpfe_device *vpfe = to_vpfe(ccdc);
417d2e50
BP		 353 struct vpfe_ccdc_config_params_raw raw_params;
354 int x;
355
356 if (ccdc->ccdc_cfg.if_type != VPFE_RAW_BAYER)
357 return -EINVAL;
358
359 x = copy_from_user(&raw_params, params, sizeof(raw_params));
360 if (x) {
361 vpfe_dbg(1, vpfe,
f60de889
BP		 362 "%s: error in copying ccdc params, %d\n",
363 __func__, x);
417d2e50
BP		 364 return -EFAULT;
365 }
366
367 if (!vpfe_ccdc_validate_param(ccdc, &raw_params)) {
368 vpfe_ccdc_update_raw_params(ccdc, &raw_params);
f396573e 369 return 0;
417d2e50
BP		 370 }
371
372 return -EINVAL;
373}
374
375/*
376 * vpfe_ccdc_config_ycbcr()
377 * This function will configure CCDC for YCbCr video capture
378 */
379static void vpfe_ccdc_config_ycbcr(struct vpfe_ccdc *ccdc)
380{
417d2e50
BP		 381 struct ccdc_params_ycbcr *params = &ccdc->ccdc_cfg.ycbcr;
382 u32 syn_mode;
383
417d2e50
BP		 384 /*
385 * first restore the CCDC registers to default values
386 * This is important since we assume default values to be set in
387 * a lot of registers that we didn't touch
388 */
389 vpfe_ccdc_restore_defaults(ccdc);
390
391 /*
392 * configure pixel format, frame format, configure video frame
393 * format, enable output to SDRAM, enable internal timing generator
394 * and 8bit pack mode
395 */
396 syn_mode = (((params->pix_fmt & VPFE_SYN_MODE_INPMOD_MASK) <<
397 VPFE_SYN_MODE_INPMOD_SHIFT) |
398 ((params->frm_fmt & VPFE_SYN_FLDMODE_MASK) <<
399 VPFE_SYN_FLDMODE_SHIFT) | VPFE_VDHDEN_ENABLE |
400 VPFE_WEN_ENABLE | VPFE_DATA_PACK_ENABLE);
401
402 /* setup BT.656 sync mode */
403 if (params->bt656_enable) {
404 vpfe_reg_write(ccdc, VPFE_REC656IF_BT656_EN, VPFE_REC656IF);
405
406 /*
407 * configure the FID, VD, HD pin polarity,
408 * fld,hd pol positive, vd negative, 8-bit data
409 */
410 syn_mode |= VPFE_SYN_MODE_VD_POL_NEGATIVE;
411 if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT)
412 syn_mode |= VPFE_SYN_MODE_10BITS;
413 else
414 syn_mode |= VPFE_SYN_MODE_8BITS;
415 } else {
416 /* y/c external sync mode */
417 syn_mode |= (((params->fid_pol & VPFE_FID_POL_MASK) <<
418 VPFE_FID_POL_SHIFT) |
419 ((params->hd_pol & VPFE_HD_POL_MASK) <<
420 VPFE_HD_POL_SHIFT) |
421 ((params->vd_pol & VPFE_VD_POL_MASK) <<
422 VPFE_VD_POL_SHIFT));
423 }
424 vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE);
425
426 /* configure video window */
427 vpfe_ccdc_setwin(ccdc, &params->win,
428 params->frm_fmt, params->bytesperpixel);
429
430 /*
431 * configure the order of y cb cr in SDRAM, and disable latch
432 * internal register on vsync
433 */
434 if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT)
435 vpfe_reg_write(ccdc,
436 (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) |
437 VPFE_LATCH_ON_VSYNC_DISABLE |
438 VPFE_CCDCFG_BW656_10BIT, VPFE_CCDCFG);
439 else
440 vpfe_reg_write(ccdc,
441 (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) |
442 VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG);
443
444 /*
445 * configure the horizontal line offset. This should be a
446 * on 32 byte boundary. So clear LSB 5 bits
447 */
448 vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF);
449
450 /* configure the memory line offset */
451 if (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED)
452 /* two fields are interleaved in memory */
453 vpfe_reg_write(ccdc, VPFE_SDOFST_FIELD_INTERLEAVED,
454 VPFE_SDOFST);
455}
456
457static void
458vpfe_ccdc_config_black_clamp(struct vpfe_ccdc *ccdc,
459 struct vpfe_ccdc_black_clamp *bclamp)
460{
461 u32 val;
462
463 if (!bclamp->enable) {
464 /* configure DCSub */
465 val = (bclamp->dc_sub) & VPFE_BLK_DC_SUB_MASK;
466 vpfe_reg_write(ccdc, val, VPFE_DCSUB);
467 vpfe_reg_write(ccdc, VPFE_CLAMP_DEFAULT_VAL, VPFE_CLAMP);
468 return;
469 }
470 /*
471 * Configure gain, Start pixel, No of line to be avg,
472 * No of pixel/line to be avg, & Enable the Black clamping
473 */
474 val = ((bclamp->sgain & VPFE_BLK_SGAIN_MASK) |
475 ((bclamp->start_pixel & VPFE_BLK_ST_PXL_MASK) <<
476 VPFE_BLK_ST_PXL_SHIFT) |
477 ((bclamp->sample_ln & VPFE_BLK_SAMPLE_LINE_MASK) <<
478 VPFE_BLK_SAMPLE_LINE_SHIFT) |
479 ((bclamp->sample_pixel & VPFE_BLK_SAMPLE_LN_MASK) <<
480 VPFE_BLK_SAMPLE_LN_SHIFT) | VPFE_BLK_CLAMP_ENABLE);
481 vpfe_reg_write(ccdc, val, VPFE_CLAMP);
482 /* If Black clamping is enable then make dcsub 0 */
483 vpfe_reg_write(ccdc, VPFE_DCSUB_DEFAULT_VAL, VPFE_DCSUB);
484}
485
486static void
487vpfe_ccdc_config_black_compense(struct vpfe_ccdc *ccdc,
488 struct vpfe_ccdc_black_compensation *bcomp)
489{
490 u32 val;
491
492 val = ((bcomp->b & VPFE_BLK_COMP_MASK) |
493 ((bcomp->gb & VPFE_BLK_COMP_MASK) <<
494 VPFE_BLK_COMP_GB_COMP_SHIFT) |
495 ((bcomp->gr & VPFE_BLK_COMP_MASK) <<
496 VPFE_BLK_COMP_GR_COMP_SHIFT) |
497 ((bcomp->r & VPFE_BLK_COMP_MASK) <<
498 VPFE_BLK_COMP_R_COMP_SHIFT));
499 vpfe_reg_write(ccdc, val, VPFE_BLKCMP);
500}
501
502/*
503 * vpfe_ccdc_config_raw()
504 * This function will configure CCDC for Raw capture mode
505 */
506static void vpfe_ccdc_config_raw(struct vpfe_ccdc *ccdc)
507{
eac5727d 508 struct vpfe_device *vpfe = to_vpfe(ccdc);
417d2e50
BP		 509 struct vpfe_ccdc_config_params_raw *config_params =
510 &ccdc->ccdc_cfg.bayer.config_params;
511 struct ccdc_params_raw *params = &ccdc->ccdc_cfg.bayer;
512 unsigned int syn_mode;
513 unsigned int val;
514
417d2e50
BP		 515 /* Reset CCDC */
516 vpfe_ccdc_restore_defaults(ccdc);
517
518 /* Disable latching function registers on VSYNC */
519 vpfe_reg_write(ccdc, VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG);
520
521 /*
522 * Configure the vertical sync polarity(SYN_MODE.VDPOL),
523 * horizontal sync polarity (SYN_MODE.HDPOL), frame id polarity
524 * (SYN_MODE.FLDPOL), frame format(progressive or interlace),
525 * data size(SYNMODE.DATSIZ), &pixel format (Input mode), output
526 * SDRAM, enable internal timing generator
527 */
528 syn_mode = (((params->vd_pol & VPFE_VD_POL_MASK) << VPFE_VD_POL_SHIFT) |
529 ((params->hd_pol & VPFE_HD_POL_MASK) << VPFE_HD_POL_SHIFT) |
530 ((params->fid_pol & VPFE_FID_POL_MASK) <<
531 VPFE_FID_POL_SHIFT) | ((params->frm_fmt &
532 VPFE_FRM_FMT_MASK) << VPFE_FRM_FMT_SHIFT) |
533 ((config_params->data_sz & VPFE_DATA_SZ_MASK) <<
534 VPFE_DATA_SZ_SHIFT) | ((params->pix_fmt &
535 VPFE_PIX_FMT_MASK) << VPFE_PIX_FMT_SHIFT) |
536 VPFE_WEN_ENABLE | VPFE_VDHDEN_ENABLE);
537
538 /* Enable and configure aLaw register if needed */
539 if (config_params->alaw.enable) {
540 val = ((config_params->alaw.gamma_wd &
541 VPFE_ALAW_GAMMA_WD_MASK) | VPFE_ALAW_ENABLE);
542 vpfe_reg_write(ccdc, val, VPFE_ALAW);
543 vpfe_dbg(3, vpfe, "\nWriting 0x%x to ALAW...\n", val);
544 }
545
546 /* Configure video window */
547 vpfe_ccdc_setwin(ccdc, &params->win, params->frm_fmt,
548 params->bytesperpixel);
549
550 /* Configure Black Clamp */
551 vpfe_ccdc_config_black_clamp(ccdc, &config_params->blk_clamp);
552
553 /* Configure Black level compensation */
554 vpfe_ccdc_config_black_compense(ccdc, &config_params->blk_comp);
555
556 /* If data size is 8 bit then pack the data */
557 if ((config_params->data_sz == VPFE_CCDC_DATA_8BITS) ||
558 config_params->alaw.enable)
559 syn_mode |= VPFE_DATA_PACK_ENABLE;
560
561 /*
562 * Configure Horizontal offset register. If pack 8 is enabled then
563 * 1 pixel will take 1 byte
564 */
565 vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF);
566
567 vpfe_dbg(3, vpfe, "Writing %d (%x) to HSIZE_OFF\n",
568 params->bytesperline, params->bytesperline);
569
570 /* Set value for SDOFST */
571 if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) {
572 if (params->image_invert_enable) {
573 /* For interlace inverse mode */
574 vpfe_reg_write(ccdc, VPFE_INTERLACED_IMAGE_INVERT,
575 VPFE_SDOFST);
576 } else {
577 /* For interlace non inverse mode */
578 vpfe_reg_write(ccdc, VPFE_INTERLACED_NO_IMAGE_INVERT,
579 VPFE_SDOFST);
580 }
581 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
582 vpfe_reg_write(ccdc, VPFE_PROGRESSIVE_NO_IMAGE_INVERT,
583 VPFE_SDOFST);
584 }
585
586 vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE);
587
588 vpfe_reg_dump(ccdc);
589}
590
591static inline int
592vpfe_ccdc_set_buftype(struct vpfe_ccdc *ccdc,
593 enum ccdc_buftype buf_type)
594{
595 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
596 ccdc->ccdc_cfg.bayer.buf_type = buf_type;
597 else
598 ccdc->ccdc_cfg.ycbcr.buf_type = buf_type;
599
600 return 0;
601}
602
603static inline enum ccdc_buftype vpfe_ccdc_get_buftype(struct vpfe_ccdc *ccdc)
604{
605 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
606 return ccdc->ccdc_cfg.bayer.buf_type;
607
608 return ccdc->ccdc_cfg.ycbcr.buf_type;
609}
610
611static int vpfe_ccdc_set_pixel_format(struct vpfe_ccdc *ccdc, u32 pixfmt)
612{
eac5727d 613 struct vpfe_device *vpfe = to_vpfe(ccdc);
417d2e50 614
f60de889
BP		 615 vpfe_dbg(1, vpfe, "%s: if_type: %d, pixfmt:%s\n",
616 __func__, ccdc->ccdc_cfg.if_type, print_fourcc(pixfmt));
417d2e50
BP		 617
618 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
619 ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
620 /*
621 * Need to clear it in case it was left on
622 * after the last capture.
623 */
624 ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 0;
625
626 switch (pixfmt) {
627 case V4L2_PIX_FMT_SBGGR8:
628 ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 1;
629 break;
630
631 case V4L2_PIX_FMT_YUYV:
632 case V4L2_PIX_FMT_UYVY:
633 case V4L2_PIX_FMT_YUV420:
634 case V4L2_PIX_FMT_NV12:
635 case V4L2_PIX_FMT_RGB565X:
636 break;
637
638 case V4L2_PIX_FMT_SBGGR16:
639 default:
640 return -EINVAL;
641 }
642 } else {
643 switch (pixfmt) {
644 case V4L2_PIX_FMT_YUYV:
645 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
646 break;
647
648 case V4L2_PIX_FMT_UYVY:
649 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
650 break;
651
652 default:
653 return -EINVAL;
654 }
655 }
656
657 return 0;
658}
659
660static u32 vpfe_ccdc_get_pixel_format(struct vpfe_ccdc *ccdc)
661{
662 u32 pixfmt;
663
664 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
665 pixfmt = V4L2_PIX_FMT_YUYV;
666 } else {
667 if (ccdc->ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
668 pixfmt = V4L2_PIX_FMT_YUYV;
669 else
670 pixfmt = V4L2_PIX_FMT_UYVY;
671 }
672
673 return pixfmt;
674}
675
676static int
677vpfe_ccdc_set_image_window(struct vpfe_ccdc *ccdc,
678 struct v4l2_rect *win, unsigned int bpp)
679{
680 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
681 ccdc->ccdc_cfg.bayer.win = *win;
682 ccdc->ccdc_cfg.bayer.bytesperpixel = bpp;
683 ccdc->ccdc_cfg.bayer.bytesperline = ALIGN(win->width * bpp, 32);
684 } else {
685 ccdc->ccdc_cfg.ycbcr.win = *win;
686 ccdc->ccdc_cfg.ycbcr.bytesperpixel = bpp;
687 ccdc->ccdc_cfg.ycbcr.bytesperline = ALIGN(win->width * bpp, 32);
688 }
689
690 return 0;
691}
692
693static inline void
694vpfe_ccdc_get_image_window(struct vpfe_ccdc *ccdc,
695 struct v4l2_rect *win)
696{
697 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
698 *win = ccdc->ccdc_cfg.bayer.win;
699 else
700 *win = ccdc->ccdc_cfg.ycbcr.win;
701}
702
703static inline unsigned int vpfe_ccdc_get_line_length(struct vpfe_ccdc *ccdc)
704{
705 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
706 return ccdc->ccdc_cfg.bayer.bytesperline;
707
708 return ccdc->ccdc_cfg.ycbcr.bytesperline;
709}
710
711static inline int
712vpfe_ccdc_set_frame_format(struct vpfe_ccdc *ccdc,
713 enum ccdc_frmfmt frm_fmt)
714{
715 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
716 ccdc->ccdc_cfg.bayer.frm_fmt = frm_fmt;
717 else
718 ccdc->ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
719
720 return 0;
721}
722
723static inline enum ccdc_frmfmt
724vpfe_ccdc_get_frame_format(struct vpfe_ccdc *ccdc)
725{
726 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
727 return ccdc->ccdc_cfg.bayer.frm_fmt;
728
729 return ccdc->ccdc_cfg.ycbcr.frm_fmt;
730}
731
732static inline int vpfe_ccdc_getfid(struct vpfe_ccdc *ccdc)
733{
734 return (vpfe_reg_read(ccdc, VPFE_SYNMODE) >> 15) & 1;
735}
736
737static inline void vpfe_set_sdr_addr(struct vpfe_ccdc *ccdc, unsigned long addr)
738{
739 vpfe_reg_write(ccdc, addr & 0xffffffe0, VPFE_SDR_ADDR);
740}
741
742static int vpfe_ccdc_set_hw_if_params(struct vpfe_ccdc *ccdc,
743 struct vpfe_hw_if_param *params)
744{
eac5727d 745 struct vpfe_device *vpfe = to_vpfe(ccdc);
417d2e50
BP		 746
747 ccdc->ccdc_cfg.if_type = params->if_type;
748
749 switch (params->if_type) {
750 case VPFE_BT656:
751 case VPFE_YCBCR_SYNC_16:
752 case VPFE_YCBCR_SYNC_8:
753 case VPFE_BT656_10BIT:
754 ccdc->ccdc_cfg.ycbcr.vd_pol = params->vdpol;
755 ccdc->ccdc_cfg.ycbcr.hd_pol = params->hdpol;
756 break;
757
758 case VPFE_RAW_BAYER:
759 ccdc->ccdc_cfg.bayer.vd_pol = params->vdpol;
760 ccdc->ccdc_cfg.bayer.hd_pol = params->hdpol;
761 if (params->bus_width == 10)
762 ccdc->ccdc_cfg.bayer.config_params.data_sz =
763 VPFE_CCDC_DATA_10BITS;
764 else
765 ccdc->ccdc_cfg.bayer.config_params.data_sz =
766 VPFE_CCDC_DATA_8BITS;
767 vpfe_dbg(1, vpfe, "params.bus_width: %d\n",
768 params->bus_width);
769 vpfe_dbg(1, vpfe, "config_params.data_sz: %d\n",
770 ccdc->ccdc_cfg.bayer.config_params.data_sz);
771 break;
772
773 default:
774 return -EINVAL;
775 }
776
777 return 0;
778}
779
780static void vpfe_clear_intr(struct vpfe_ccdc *ccdc, int vdint)
781{
782 unsigned int vpfe_int_status;
783
784 vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS);
785
786 switch (vdint) {
787 /* VD0 interrupt */
788 case VPFE_VDINT0:
789 vpfe_int_status &= ~VPFE_VDINT0;
790 vpfe_int_status |= VPFE_VDINT0;
791 break;
792
793 /* VD1 interrupt */
794 case VPFE_VDINT1:
795 vpfe_int_status &= ~VPFE_VDINT1;
796 vpfe_int_status |= VPFE_VDINT1;
797 break;
798
799 /* VD2 interrupt */
800 case VPFE_VDINT2:
801 vpfe_int_status &= ~VPFE_VDINT2;
802 vpfe_int_status |= VPFE_VDINT2;
803 break;
804
805 /* Clear all interrupts */
806 default:
807 vpfe_int_status &= ~(VPFE_VDINT0 |
808 VPFE_VDINT1 |
809 VPFE_VDINT2);
810 vpfe_int_status |= (VPFE_VDINT0 |
811 VPFE_VDINT1 |
812 VPFE_VDINT2);
813 break;
814 }
815 /* Clear specific VDINT from the status register */
816 vpfe_reg_write(ccdc, vpfe_int_status, VPFE_IRQ_STS);
817
818 vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS);
819
820 /* Acknowledge that we are done with all interrupts */
821 vpfe_reg_write(ccdc, 1, VPFE_IRQ_EOI);
822}
823
824static void vpfe_ccdc_config_defaults(struct vpfe_ccdc *ccdc)
825{
826 ccdc->ccdc_cfg.if_type = VPFE_RAW_BAYER;
827
828 ccdc->ccdc_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT;
829 ccdc->ccdc_cfg.ycbcr.frm_fmt = CCDC_FRMFMT_INTERLACED;
830 ccdc->ccdc_cfg.ycbcr.fid_pol = VPFE_PINPOL_POSITIVE;
831 ccdc->ccdc_cfg.ycbcr.vd_pol = VPFE_PINPOL_POSITIVE;
832 ccdc->ccdc_cfg.ycbcr.hd_pol = VPFE_PINPOL_POSITIVE;
833 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
834 ccdc->ccdc_cfg.ycbcr.buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED;
835
836 ccdc->ccdc_cfg.ycbcr.win.left = 0;
837 ccdc->ccdc_cfg.ycbcr.win.top = 0;
838 ccdc->ccdc_cfg.ycbcr.win.width = 720;
839 ccdc->ccdc_cfg.ycbcr.win.height = 576;
840 ccdc->ccdc_cfg.ycbcr.bt656_enable = 1;
841
842 ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
843 ccdc->ccdc_cfg.bayer.frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
844 ccdc->ccdc_cfg.bayer.fid_pol = VPFE_PINPOL_POSITIVE;
845 ccdc->ccdc_cfg.bayer.vd_pol = VPFE_PINPOL_POSITIVE;
846 ccdc->ccdc_cfg.bayer.hd_pol = VPFE_PINPOL_POSITIVE;
847
848 ccdc->ccdc_cfg.bayer.win.left = 0;
849 ccdc->ccdc_cfg.bayer.win.top = 0;
850 ccdc->ccdc_cfg.bayer.win.width = 800;
851 ccdc->ccdc_cfg.bayer.win.height = 600;
852 ccdc->ccdc_cfg.bayer.config_params.data_sz = VPFE_CCDC_DATA_8BITS;
853 ccdc->ccdc_cfg.bayer.config_params.alaw.gamma_wd =
854 VPFE_CCDC_GAMMA_BITS_09_0;
855}
856
857/*
858 * vpfe_get_ccdc_image_format - Get image parameters based on CCDC settings
859 */
860static int vpfe_get_ccdc_image_format(struct vpfe_device *vpfe,
861 struct v4l2_format *f)
862{
863 struct v4l2_rect image_win;
864 enum ccdc_buftype buf_type;
865 enum ccdc_frmfmt frm_fmt;
866
867 memset(f, 0, sizeof(*f));
868 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
869 vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win);
870 f->fmt.pix.width = image_win.width;
871 f->fmt.pix.height = image_win.height;
872 f->fmt.pix.bytesperline = vpfe_ccdc_get_line_length(&vpfe->ccdc);
873 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
874 f->fmt.pix.height;
875 buf_type = vpfe_ccdc_get_buftype(&vpfe->ccdc);
876 f->fmt.pix.pixelformat = vpfe_ccdc_get_pixel_format(&vpfe->ccdc);
877 frm_fmt = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
878
879 if (frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
880 f->fmt.pix.field = V4L2_FIELD_NONE;
881 } else if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
882 if (buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) {
883 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
884 } else if (buf_type == CCDC_BUFTYPE_FLD_SEPARATED) {
885 f->fmt.pix.field = V4L2_FIELD_SEQ_TB;
886 } else {
887 vpfe_err(vpfe, "Invalid buf_type\n");
888 return -EINVAL;
889 }
890 } else {
891 vpfe_err(vpfe, "Invalid frm_fmt\n");
892 return -EINVAL;
893 }
894 return 0;
895}
896
897static int vpfe_config_ccdc_image_format(struct vpfe_device *vpfe)
898{
899 enum ccdc_frmfmt frm_fmt = CCDC_FRMFMT_INTERLACED;
750ef54b 900 u32 bpp;
e4bccada 901 int ret = 0;
417d2e50 902
417d2e50
BP		 903 vpfe_dbg(1, vpfe, "pixelformat: %s\n",
904 print_fourcc(vpfe->fmt.fmt.pix.pixelformat));
905
906 if (vpfe_ccdc_set_pixel_format(&vpfe->ccdc,
907 vpfe->fmt.fmt.pix.pixelformat) < 0) {
908 vpfe_err(vpfe, "couldn't set pix format in ccdc\n");
909 return -EINVAL;
910 }
911
912 /* configure the image window */
750ef54b
BP		 913 bpp = __get_bytesperpixel(vpfe, vpfe->current_vpfe_fmt);
914 vpfe_ccdc_set_image_window(&vpfe->ccdc, &vpfe->crop, bpp);
417d2e50
BP		 915
916 switch (vpfe->fmt.fmt.pix.field) {
917 case V4L2_FIELD_INTERLACED:
918 /* do nothing, since it is default */
919 ret = vpfe_ccdc_set_buftype(
920 &vpfe->ccdc,
921 CCDC_BUFTYPE_FLD_INTERLEAVED);
922 break;
923
924 case V4L2_FIELD_NONE:
925 frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
926 /* buffer type only applicable for interlaced scan */
927 break;
928
929 case V4L2_FIELD_SEQ_TB:
930 ret = vpfe_ccdc_set_buftype(
931 &vpfe->ccdc,
932 CCDC_BUFTYPE_FLD_SEPARATED);
933 break;
934
935 default:
936 return -EINVAL;
937 }
938
939 if (ret)
940 return ret;
941
942 return vpfe_ccdc_set_frame_format(&vpfe->ccdc, frm_fmt);
943}
944
945/*
946 * vpfe_config_image_format()
947 * For a given standard, this functions sets up the default
948 * pix format & crop values in the vpfe device and ccdc. It first
949 * starts with defaults based values from the standard table.
da298c6d 950 * It then checks if sub device supports get_fmt and then override the
417d2e50
BP		 951 * values based on that.Sets crop values to match with scan resolution
952 * starting at 0,0. It calls vpfe_config_ccdc_image_format() set the
953 * values in ccdc
954 */
955static int vpfe_config_image_format(struct vpfe_device *vpfe,
956 v4l2_std_id std_id)
957{
750ef54b
BP		 958 struct vpfe_fmt *fmt;
959 struct v4l2_mbus_framefmt mbus_fmt;
417d2e50
BP		 960 int i, ret;
961
962 for (i = 0; i < ARRAY_SIZE(vpfe_standards); i++) {
963 if (vpfe_standards[i].std_id & std_id) {
964 vpfe->std_info.active_pixels =
965 vpfe_standards[i].width;
966 vpfe->std_info.active_lines =
967 vpfe_standards[i].height;
968 vpfe->std_info.frame_format =
969 vpfe_standards[i].frame_format;
970 vpfe->std_index = i;
971
972 break;
973 }
974 }
975
976 if (i == ARRAY_SIZE(vpfe_standards)) {
977 vpfe_err(vpfe, "standard not supported\n");
978 return -EINVAL;
979 }
980
750ef54b 981 ret = __subdev_get_format(vpfe, &mbus_fmt);
417d2e50
BP		 982 if (ret)
983 return ret;
984
750ef54b
BP		 985 fmt = find_format_by_code(vpfe, mbus_fmt.code);
986 if (!fmt) {
987 vpfe_dbg(3, vpfe, "mbus code format (0x%08x) not found.\n",
988 mbus_fmt.code);
989 return -EINVAL;
990 }
991
992 /* Save current subdev format */
993 v4l2_fill_pix_format(&vpfe->fmt.fmt.pix, &mbus_fmt);
994 vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
995 vpfe->fmt.fmt.pix.pixelformat = fmt->fourcc;
996 vpfe_calc_format_size(vpfe, fmt, &vpfe->fmt);
997 vpfe->current_vpfe_fmt = fmt;
998
417d2e50 999 /* Update the crop window based on found values */
750ef54b
BP		 1000 vpfe->crop.top = 0;
1001 vpfe->crop.left = 0;
1002 vpfe->crop.width = mbus_fmt.width;
1003 vpfe->crop.height = mbus_fmt.height;
417d2e50
BP		 1004
1005 return vpfe_config_ccdc_image_format(vpfe);
1006}
1007
1008static int vpfe_initialize_device(struct vpfe_device *vpfe)
1009{
1010 struct vpfe_subdev_info *sdinfo;
1011 int ret;
1012
1013 sdinfo = &vpfe->cfg->sub_devs[0];
1014 sdinfo->sd = vpfe->sd[0];
1015 vpfe->current_input = 0;
1016 vpfe->std_index = 0;
1017 /* Configure the default format information */
1018 ret = vpfe_config_image_format(vpfe,
1019 vpfe_standards[vpfe->std_index].std_id);
1020 if (ret)
1021 return ret;
1022
1023 pm_runtime_get_sync(vpfe->pdev);
1024
1025 vpfe_config_enable(&vpfe->ccdc, 1);
1026
1027 vpfe_ccdc_restore_defaults(&vpfe->ccdc);
1028
1029 /* Clear all VPFE interrupts */
1030 vpfe_clear_intr(&vpfe->ccdc, -1);
1031
1032 return ret;
1033}
1034
1035/*
1036 * vpfe_release : This function is based on the vb2_fop_release
1037 * helper function.
1038 * It has been augmented to handle module power management,
1039 * by disabling/enabling h/w module fcntl clock when necessary.
1040 */
1041static int vpfe_release(struct file *file)
1042{
1043 struct vpfe_device *vpfe = video_drvdata(file);
c99235fa 1044 bool fh_singular;
417d2e50
BP		 1045 int ret;
1046
1047 mutex_lock(&vpfe->lock);
1048
c99235fa
BP		 1049 /* Save the singular status before we call the clean-up helper */
1050 fh_singular = v4l2_fh_is_singular_file(file);
1051
1052 /* the release helper will cleanup any on-going streaming */
417d2e50
BP		 1053 ret = _vb2_fop_release(file, NULL);
1054
c99235fa
BP		 1055 /*
1056 * If this was the last open file.
1057 * Then de-initialize hw module.
1058 */
1059 if (fh_singular)
1060 vpfe_ccdc_close(&vpfe->ccdc, vpfe->pdev);
1061
417d2e50
BP		 1062 mutex_unlock(&vpfe->lock);
1063
1064 return ret;
1065}
1066
1067/*
1068 * vpfe_open : This function is based on the v4l2_fh_open helper function.
1069 * It has been augmented to handle module power management,
1070 * by disabling/enabling h/w module fcntl clock when necessary.
1071 */
1072static int vpfe_open(struct file *file)
1073{
1074 struct vpfe_device *vpfe = video_drvdata(file);
1075 int ret;
1076
1077 mutex_lock(&vpfe->lock);
1078
1079 ret = v4l2_fh_open(file);
1080 if (ret) {
1081 vpfe_err(vpfe, "v4l2_fh_open failed\n");
1082 goto unlock;
1083 }
1084
1085 if (!v4l2_fh_is_singular_file(file))
1086 goto unlock;
1087
1088 if (vpfe_initialize_device(vpfe)) {
1089 v4l2_fh_release(file);
1090 ret = -ENODEV;
1091 }
1092
1093unlock:
1094 mutex_unlock(&vpfe->lock);
1095 return ret;
1096}
1097
1098/**
1099 * vpfe_schedule_next_buffer: set next buffer address for capture
1100 * @vpfe : ptr to vpfe device
1101 *
1102 * This function will get next buffer from the dma queue and
1103 * set the buffer address in the vpfe register for capture.
1104 * the buffer is marked active
417d2e50 1105 */
e6784f9e 1106static void vpfe_schedule_next_buffer(struct vpfe_device *vpfe)
417d2e50 1107{
e6784f9e
BP		 1108 dma_addr_t addr;
1109
1110 spin_lock(&vpfe->dma_queue_lock);
1111 if (list_empty(&vpfe->dma_queue)) {
1112 spin_unlock(&vpfe->dma_queue_lock);
1113 return;
1114 }
1115
417d2e50
BP		 1116 vpfe->next_frm = list_entry(vpfe->dma_queue.next,
1117 struct vpfe_cap_buffer, list);
1118 list_del(&vpfe->next_frm->list);
e6784f9e 1119 spin_unlock(&vpfe->dma_queue_lock);
417d2e50 1120
e6784f9e
BP		 1121 addr = vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb.vb2_buf, 0);
1122 vpfe_set_sdr_addr(&vpfe->ccdc, addr);
417d2e50
BP		 1123}
1124
1125static inline void vpfe_schedule_bottom_field(struct vpfe_device *vpfe)
1126{
e6784f9e 1127 dma_addr_t addr;
417d2e50 1128
2d700715 1129 addr = vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb.vb2_buf, 0) +
417d2e50
BP		 1130 vpfe->field_off;
1131
1132 vpfe_set_sdr_addr(&vpfe->ccdc, addr);
1133}
1134
1135/*
1136 * vpfe_process_buffer_complete: process a completed buffer
1137 * @vpfe : ptr to vpfe device
1138 *
1139 * This function time stamp the buffer and mark it as DONE. It also
1140 * wake up any process waiting on the QUEUE and set the next buffer
1141 * as current
1142 */
1143static inline void vpfe_process_buffer_complete(struct vpfe_device *vpfe)
1144{
d6dd645e 1145 vpfe->cur_frm->vb.vb2_buf.timestamp = ktime_get_ns();
2d700715
JS		 1146 vpfe->cur_frm->vb.field = vpfe->fmt.fmt.pix.field;
1147 vpfe->cur_frm->vb.sequence = vpfe->sequence++;
1148 vb2_buffer_done(&vpfe->cur_frm->vb.vb2_buf, VB2_BUF_STATE_DONE);
417d2e50
BP		 1149 vpfe->cur_frm = vpfe->next_frm;
1150}
1151
e6784f9e
BP		 1152static void vpfe_handle_interlaced_irq(struct vpfe_device *vpfe,
1153 enum v4l2_field field)
1154{
1155 int fid;
1156
1157 /* interlaced or TB capture check which field
1158 * we are in hardware
1159 */
1160 fid = vpfe_ccdc_getfid(&vpfe->ccdc);
1161
1162 /* switch the software maintained field id */
1163 vpfe->field ^= 1;
1164 if (fid == vpfe->field) {
1165 /* we are in-sync here,continue */
1166 if (fid == 0) {
1167 /*
1168 * One frame is just being captured. If the
1169 * next frame is available, release the
1170 * current frame and move on
1171 */
1172 if (vpfe->cur_frm != vpfe->next_frm)
1173 vpfe_process_buffer_complete(vpfe);
1174
b58e69e9
BP		 1175 if (vpfe->stopping)
1176 return;
1177
e6784f9e
BP		 1178 /*
1179 * based on whether the two fields are stored
1180 * interleave or separately in memory,
1181 * reconfigure the CCDC memory address
1182 */
1183 if (field == V4L2_FIELD_SEQ_TB)
1184 vpfe_schedule_bottom_field(vpfe);
1185 } else {
1186 /*
1187 * if one field is just being captured configure
1188 * the next frame get the next frame from the empty
1189 * queue if no frame is available hold on to the
1190 * current buffer
1191 */
1192 if (vpfe->cur_frm == vpfe->next_frm)
1193 vpfe_schedule_next_buffer(vpfe);
1194 }
1195 } else if (fid == 0) {
1196 /*
1197 * out of sync. Recover from any hardware out-of-sync.
1198 * May loose one frame
1199 */
1200 vpfe->field = fid;
1201 }
1202}
1203
417d2e50
BP		 1204/*
1205 * vpfe_isr : ISR handler for vpfe capture (VINT0)
1206 * @irq: irq number
1207 * @dev_id: dev_id ptr
1208 *
1209 * It changes status of the captured buffer, takes next buffer from the queue
1210 * and sets its address in VPFE registers
1211 */
1212static irqreturn_t vpfe_isr(int irq, void *dev)
1213{
1214 struct vpfe_device *vpfe = (struct vpfe_device *)dev;
e6784f9e 1215 enum v4l2_field field = vpfe->fmt.fmt.pix.field;
b58e69e9 1216 int intr_status, stopping = vpfe->stopping;
417d2e50
BP		 1217
1218 intr_status = vpfe_reg_read(&vpfe->ccdc, VPFE_IRQ_STS);
1219
1220 if (intr_status & VPFE_VDINT0) {
417d2e50 1221 if (field == V4L2_FIELD_NONE) {
417d2e50
BP		 1222 if (vpfe->cur_frm != vpfe->next_frm)
1223 vpfe_process_buffer_complete(vpfe);
e6784f9e
BP		 1224 } else {
1225 vpfe_handle_interlaced_irq(vpfe, field);
417d2e50 1226 }
b58e69e9
BP		 1227 if (stopping) {
1228 vpfe->stopping = false;
1229 complete(&vpfe->capture_stop);
1230 }
417d2e50
BP		 1231 }
1232
b58e69e9 1233 if (intr_status & VPFE_VDINT1 && !stopping) {
e6784f9e 1234 if (field == V4L2_FIELD_NONE &&
417d2e50
BP		 1235 vpfe->cur_frm == vpfe->next_frm)
1236 vpfe_schedule_next_buffer(vpfe);
417d2e50
BP		 1237 }
1238
1239 vpfe_clear_intr(&vpfe->ccdc, intr_status);
1240
1241 return IRQ_HANDLED;
1242}
1243
1244static inline void vpfe_detach_irq(struct vpfe_device *vpfe)
1245{
1246 unsigned int intr = VPFE_VDINT0;
1247 enum ccdc_frmfmt frame_format;
1248
1249 frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1250 if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
1251 intr |= VPFE_VDINT1;
1252
1253 vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_CLR);
1254}
1255
1256static inline void vpfe_attach_irq(struct vpfe_device *vpfe)
1257{
1258 unsigned int intr = VPFE_VDINT0;
1259 enum ccdc_frmfmt frame_format;
1260
1261 frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1262 if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
1263 intr |= VPFE_VDINT1;
1264
1265 vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_SET);
1266}
1267
1268static int vpfe_querycap(struct file *file, void *priv,
1269 struct v4l2_capability *cap)
1270{
1271 struct vpfe_device *vpfe = video_drvdata(file);
1272
c0decac1
MCC		 1273 strscpy(cap->driver, VPFE_MODULE_NAME, sizeof(cap->driver));
1274 strscpy(cap->card, "TI AM437x VPFE", sizeof(cap->card));
417d2e50
BP		 1275 snprintf(cap->bus_info, sizeof(cap->bus_info),
1276 "platform:%s", vpfe->v4l2_dev.name);
417d2e50
BP		 1277 return 0;
1278}
1279
1280/* get the format set at output pad of the adjacent subdev */
750ef54b
BP		 1281static int __subdev_get_format(struct vpfe_device *vpfe,
1282 struct v4l2_mbus_framefmt *fmt)
417d2e50 1283{
750ef54b
BP		 1284 struct v4l2_subdev *sd = vpfe->current_subdev->sd;
1285 struct v4l2_subdev_format sd_fmt;
1286 struct v4l2_mbus_framefmt *mbus_fmt = &sd_fmt.format;
417d2e50
BP		 1287 int ret;
1288
750ef54b
BP		 1289 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1290 sd_fmt.pad = 0;
417d2e50 1291
750ef54b
BP		 1292 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sd_fmt);
1293 if (ret)
417d2e50
BP		 1294 return ret;
1295
750ef54b 1296 *fmt = *mbus_fmt;
417d2e50 1297
750ef54b
BP		 1298 vpfe_dbg(1, vpfe, "%s: %dx%d code:%04X\n", __func__,
1299 fmt->width, fmt->height, fmt->code);
417d2e50
BP		 1300
1301 return 0;
1302}
1303
1304/* set the format at output pad of the adjacent subdev */
750ef54b
BP		 1305static int __subdev_set_format(struct vpfe_device *vpfe,
1306 struct v4l2_mbus_framefmt *fmt)
417d2e50 1307{
750ef54b
BP		 1308 struct v4l2_subdev *sd = vpfe->current_subdev->sd;
1309 struct v4l2_subdev_format sd_fmt;
1310 struct v4l2_mbus_framefmt *mbus_fmt = &sd_fmt.format;
417d2e50
BP		 1311 int ret;
1312
750ef54b
BP		 1313 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1314 sd_fmt.pad = 0;
1315 *mbus_fmt = *fmt;
417d2e50 1316
750ef54b 1317 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sd_fmt);
ebf984bb 1318 if (ret)
417d2e50
BP		 1319 return ret;
1320
750ef54b
BP		 1321 vpfe_dbg(1, vpfe, "%s %dx%d code:%04X\n", __func__,
1322 fmt->width, fmt->height, fmt->code);
417d2e50 1323
750ef54b
BP		 1324 return 0;
1325}
417d2e50 1326
750ef54b
BP		 1327static int vpfe_calc_format_size(struct vpfe_device *vpfe,
1328 const struct vpfe_fmt *fmt,
1329 struct v4l2_format *f)
1330{
1331 u32 bpp;
1332
1333 if (!fmt) {
1334 vpfe_dbg(3, vpfe, "No vpfe_fmt provided!\n");
1335 return -EINVAL;
1336 }
1337
1338 bpp = __get_bytesperpixel(vpfe, fmt);
1339
1340 /* pitch should be 32 bytes aligned */
1341 f->fmt.pix.bytesperline = ALIGN(f->fmt.pix.width * bpp, 32);
1342 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
1343 f->fmt.pix.height;
1344
1345 vpfe_dbg(3, vpfe, "%s: fourcc: %s size: %dx%d bpl:%d img_size:%d\n",
1346 __func__, print_fourcc(f->fmt.pix.pixelformat),
1347 f->fmt.pix.width, f->fmt.pix.height,
1348 f->fmt.pix.bytesperline, f->fmt.pix.sizeimage);
417d2e50
BP		 1349
1350 return 0;
1351}
1352
1353static int vpfe_g_fmt(struct file *file, void *priv,
1354 struct v4l2_format *fmt)
1355{
1356 struct vpfe_device *vpfe = video_drvdata(file);
1357
417d2e50
BP		 1358 *fmt = vpfe->fmt;
1359
1360 return 0;
1361}
1362
1363static int vpfe_enum_fmt(struct file *file, void *priv,
1364 struct v4l2_fmtdesc *f)
1365{
1366 struct vpfe_device *vpfe = video_drvdata(file);
1367 struct vpfe_subdev_info *sdinfo;
0512ccba 1368 struct vpfe_fmt *fmt;
417d2e50 1369
417d2e50
BP		 1370 sdinfo = vpfe->current_subdev;
1371 if (!sdinfo->sd)
1372 return -EINVAL;
1373
0512ccba 1374 if (f->index >= vpfe->num_active_fmt)
417d2e50
BP		 1375 return -EINVAL;
1376
0512ccba 1377 fmt = vpfe->active_fmt[f->index];
417d2e50 1378
417d2e50 1379 f->pixelformat = fmt->fourcc;
417d2e50 1380
f60de889
BP		 1381 vpfe_dbg(1, vpfe, "%s: mbus index: %d code: %x pixelformat: %s\n",
1382 __func__, f->index, fmt->code, print_fourcc(fmt->fourcc));
417d2e50
BP		 1383
1384 return 0;
1385}
1386
1387static int vpfe_try_fmt(struct file *file, void *priv,
750ef54b 1388 struct v4l2_format *f)
417d2e50
BP		 1389{
1390 struct vpfe_device *vpfe = video_drvdata(file);
750ef54b
BP		 1391 struct v4l2_subdev *sd = vpfe->current_subdev->sd;
1392 const struct vpfe_fmt *fmt;
1393 struct v4l2_subdev_frame_size_enum fse;
1394 int ret, found;
417d2e50 1395
750ef54b
BP		 1396 fmt = find_format_by_pix(vpfe, f->fmt.pix.pixelformat);
1397 if (!fmt) {
1398 /* default to first entry */
1399 vpfe_dbg(3, vpfe, "Invalid pixel code: %x, default used instead\n",
1400 f->fmt.pix.pixelformat);
1401 fmt = vpfe->active_fmt[0];
1402 f->fmt.pix.pixelformat = fmt->fourcc;
1403 }
1404
1405 f->fmt.pix.field = vpfe->fmt.fmt.pix.field;
1406
1407 /* check for/find a valid width/height */
1408 ret = 0;
1409 found = false;
1410 fse.pad = 0;
1411 fse.code = fmt->code;
1412 fse.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1413 for (fse.index = 0; ; fse.index++) {
1414 ret = v4l2_subdev_call(sd, pad, enum_frame_size,
1415 NULL, &fse);
1416 if (ret)
1417 break;
1418
1419 if (f->fmt.pix.width == fse.max_width &&
1420 f->fmt.pix.height == fse.max_height) {
1421 found = true;
1422 break;
1423 } else if (f->fmt.pix.width >= fse.min_width &&
1424 f->fmt.pix.width <= fse.max_width &&
1425 f->fmt.pix.height >= fse.min_height &&
1426 f->fmt.pix.height <= fse.max_height) {
1427 found = true;
1428 break;
1429 }
1430 }
1431
1432 if (!found) {
1433 /* use existing values as default */
1434 f->fmt.pix.width = vpfe->fmt.fmt.pix.width;
1435 f->fmt.pix.height = vpfe->fmt.fmt.pix.height;
1436 }
1437
1438 /*
1439 * Use current colorspace for now, it will get
1440 * updated properly during s_fmt
1441 */
1442 f->fmt.pix.colorspace = vpfe->fmt.fmt.pix.colorspace;
1443 return vpfe_calc_format_size(vpfe, fmt, f);
417d2e50
BP		 1444}
1445
1446static int vpfe_s_fmt(struct file *file, void *priv,
1447 struct v4l2_format *fmt)
1448{
1449 struct vpfe_device *vpfe = video_drvdata(file);
750ef54b
BP		 1450 struct vpfe_fmt *f;
1451 struct v4l2_mbus_framefmt mbus_fmt;
417d2e50
BP		 1452 int ret;
1453
417d2e50
BP		 1454 /* If streaming is started, return error */
1455 if (vb2_is_busy(&vpfe->buffer_queue)) {
1456 vpfe_err(vpfe, "%s device busy\n", __func__);
1457 return -EBUSY;
1458 }
1459
750ef54b
BP		 1460 ret = vpfe_try_fmt(file, priv, fmt);
1461 if (ret < 0)
417d2e50
BP		 1462 return ret;
1463
750ef54b 1464 f = find_format_by_pix(vpfe, fmt->fmt.pix.pixelformat);
417d2e50 1465
750ef54b 1466 v4l2_fill_mbus_format(&mbus_fmt, &fmt->fmt.pix, f->code);
417d2e50 1467
750ef54b
BP		 1468 ret = __subdev_set_format(vpfe, &mbus_fmt);
1469 if (ret)
1470 return ret;
1471
1472 /* Just double check nothing has gone wrong */
1473 if (mbus_fmt.code != f->code) {
1474 vpfe_dbg(3, vpfe,
1475 "%s subdev changed format on us, this should not happen\n",
1476 __func__);
1477 return -EINVAL;
1478 }
1479
1480 v4l2_fill_pix_format(&vpfe->fmt.fmt.pix, &mbus_fmt);
1481 vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1482 vpfe->fmt.fmt.pix.pixelformat = f->fourcc;
1483 vpfe_calc_format_size(vpfe, f, &vpfe->fmt);
1484 *fmt = vpfe->fmt;
1485 vpfe->current_vpfe_fmt = f;
417d2e50
BP		 1486
1487 /* Update the crop window based on found values */
1488 vpfe->crop.width = fmt->fmt.pix.width;
1489 vpfe->crop.height = fmt->fmt.pix.height;
1490
1491 /* set image capture parameters in the ccdc */
1492 return vpfe_config_ccdc_image_format(vpfe);
1493}
1494
1495static int vpfe_enum_size(struct file *file, void *priv,
1496 struct v4l2_frmsizeenum *fsize)
1497{
1498 struct vpfe_device *vpfe = video_drvdata(file);
1499 struct v4l2_subdev_frame_size_enum fse;
750ef54b 1500 struct v4l2_subdev *sd = vpfe->current_subdev->sd;
417d2e50
BP		 1501 struct vpfe_fmt *fmt;
1502 int ret;
1503
417d2e50 1504 /* check for valid format */
0512ccba 1505 fmt = find_format_by_pix(vpfe, fsize->pixel_format);
417d2e50 1506 if (!fmt) {
750ef54b
BP		 1507 vpfe_dbg(3, vpfe, "Invalid pixel code: %x\n",
1508 fsize->pixel_format);
417d2e50
BP		 1509 return -EINVAL;
1510 }
1511
1512 memset(fsize->reserved, 0x0, sizeof(fsize->reserved));
1513
417d2e50
BP		 1514 memset(&fse, 0x0, sizeof(fse));
1515 fse.index = fsize->index;
1516 fse.pad = 0;
750ef54b 1517 fse.code = fmt->code;
5778e749 1518 fse.which = V4L2_SUBDEV_FORMAT_ACTIVE;
750ef54b 1519 ret = v4l2_subdev_call(sd, pad, enum_frame_size, NULL, &fse);
417d2e50 1520 if (ret)
750ef54b 1521 return ret;
417d2e50 1522
f60de889
BP		 1523 vpfe_dbg(1, vpfe, "%s: index: %d code: %x W:[%d,%d] H:[%d,%d]\n",
1524 __func__, fse.index, fse.code, fse.min_width, fse.max_width,
1525 fse.min_height, fse.max_height);
417d2e50
BP		 1526
1527 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1528 fsize->discrete.width = fse.max_width;
1529 fsize->discrete.height = fse.max_height;
1530
f60de889
BP		 1531 vpfe_dbg(1, vpfe, "%s: index: %d pixformat: %s size: %dx%d\n",
1532 __func__, fsize->index, print_fourcc(fsize->pixel_format),
1533 fsize->discrete.width, fsize->discrete.height);
417d2e50
BP		 1534
1535 return 0;
1536}
1537
1538/*
1539 * vpfe_get_subdev_input_index - Get subdev index and subdev input index for a
1540 * given app input index
1541 */
1542static int
1543vpfe_get_subdev_input_index(struct vpfe_device *vpfe,
1544 int *subdev_index,
1545 int *subdev_input_index,
1546 int app_input_index)
1547{
417d2e50
BP		 1548 int i, j = 0;
1549
1550 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
417d2e50
BP		 1551 if (app_input_index < (j + 1)) {
1552 *subdev_index = i;
1553 *subdev_input_index = app_input_index - j;
1554 return 0;
1555 }
1556 j++;
1557 }
1558 return -EINVAL;
1559}
1560
1561/*
1562 * vpfe_get_app_input - Get app input index for a given subdev input index
1563 * driver stores the input index of the current sub device and translate it
1564 * when application request the current input
1565 */
1566static int vpfe_get_app_input_index(struct vpfe_device *vpfe,
1567 int *app_input_index)
1568{
1569 struct vpfe_config *cfg = vpfe->cfg;
1570 struct vpfe_subdev_info *sdinfo;
d3723239
LP		 1571 struct i2c_client *client;
1572 struct i2c_client *curr_client;
417d2e50
BP		 1573 int i, j = 0;
1574
d3723239 1575 curr_client = v4l2_get_subdevdata(vpfe->current_subdev->sd);
417d2e50
BP		 1576 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
1577 sdinfo = &cfg->sub_devs[i];
d3723239
LP		 1578 client = v4l2_get_subdevdata(sdinfo->sd);
1579 if (client->addr == curr_client->addr &&
0fb50400 1580 client->adapter->nr == curr_client->adapter->nr) {
417d2e50
BP		 1581 if (vpfe->current_input >= 1)
1582 return -1;
1583 *app_input_index = j + vpfe->current_input;
1584 return 0;
1585 }
1586 j++;
1587 }
1588 return -EINVAL;
1589}
1590
1591static int vpfe_enum_input(struct file *file, void *priv,
1592 struct v4l2_input *inp)
1593{
1594 struct vpfe_device *vpfe = video_drvdata(file);
1595 struct vpfe_subdev_info *sdinfo;
1596 int subdev, index;
1597
417d2e50
BP		 1598 if (vpfe_get_subdev_input_index(vpfe, &subdev, &index,
1599 inp->index) < 0) {
1600 vpfe_dbg(1, vpfe,
1601 "input information not found for the subdev\n");
1602 return -EINVAL;
1603 }
1604 sdinfo = &vpfe->cfg->sub_devs[subdev];
1605 *inp = sdinfo->inputs[index];
1606
1607 return 0;
1608}
1609
1610static int vpfe_g_input(struct file *file, void *priv, unsigned int *index)
1611{
1612 struct vpfe_device *vpfe = video_drvdata(file);
1613
417d2e50
BP		 1614 return vpfe_get_app_input_index(vpfe, index);
1615}
1616
1617/* Assumes caller is holding vpfe_dev->lock */
1618static int vpfe_set_input(struct vpfe_device *vpfe, unsigned int index)
1619{
1620 int subdev_index = 0, inp_index = 0;
1621 struct vpfe_subdev_info *sdinfo;
1622 struct vpfe_route *route;
1623 u32 input, output;
1624 int ret;
1625
417d2e50
BP		 1626 /* If streaming is started, return error */
1627 if (vb2_is_busy(&vpfe->buffer_queue)) {
1628 vpfe_err(vpfe, "%s device busy\n", __func__);
1629 return -EBUSY;
1630 }
1631 ret = vpfe_get_subdev_input_index(vpfe,
1632 &subdev_index,
1633 &inp_index,
1634 index);
1635 if (ret < 0) {
1636 vpfe_err(vpfe, "invalid input index: %d\n", index);
1637 goto get_out;
1638 }
1639
1640 sdinfo = &vpfe->cfg->sub_devs[subdev_index];
1641 sdinfo->sd = vpfe->sd[subdev_index];
1642 route = &sdinfo->routes[inp_index];
1643 if (route && sdinfo->can_route) {
1644 input = route->input;
1645 output = route->output;
1646 if (sdinfo->sd) {
1647 ret = v4l2_subdev_call(sdinfo->sd, video,
1648 s_routing, input, output, 0);
1649 if (ret) {
1650 vpfe_err(vpfe, "s_routing failed\n");
1651 ret = -EINVAL;
1652 goto get_out;
1653 }
1654 }
1655
1656 }
1657
1658 vpfe->current_subdev = sdinfo;
1659 if (sdinfo->sd)
1660 vpfe->v4l2_dev.ctrl_handler = sdinfo->sd->ctrl_handler;
1661 vpfe->current_input = index;
1662 vpfe->std_index = 0;
1663
1664 /* set the bus/interface parameter for the sub device in ccdc */
1665 ret = vpfe_ccdc_set_hw_if_params(&vpfe->ccdc, &sdinfo->vpfe_param);
1666 if (ret)
1667 return ret;
1668
1669 /* set the default image parameters in the device */
1670 return vpfe_config_image_format(vpfe,
1671 vpfe_standards[vpfe->std_index].std_id);
1672
1673get_out:
1674 return ret;
1675}
1676
1677static int vpfe_s_input(struct file *file, void *priv, unsigned int index)
1678{
1679 struct vpfe_device *vpfe = video_drvdata(file);
1680
417d2e50
BP		 1681 return vpfe_set_input(vpfe, index);
1682}
1683
1684static int vpfe_querystd(struct file *file, void *priv, v4l2_std_id *std_id)
1685{
1686 struct vpfe_device *vpfe = video_drvdata(file);
1687 struct vpfe_subdev_info *sdinfo;
1688
417d2e50
BP		 1689 sdinfo = vpfe->current_subdev;
1690 if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD))
1691 return -ENODATA;
1692
1693 /* Call querystd function of decoder device */
1694 return v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id,
1695 video, querystd, std_id);
1696}
1697
1698static int vpfe_s_std(struct file *file, void *priv, v4l2_std_id std_id)
1699{
1700 struct vpfe_device *vpfe = video_drvdata(file);
1701 struct vpfe_subdev_info *sdinfo;
1702 int ret;
1703
417d2e50
BP		 1704 sdinfo = vpfe->current_subdev;
1705 if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD))
1706 return -ENODATA;
1707
13aa21cf
BP		 1708 /* if trying to set the same std then nothing to do */
1709 if (vpfe_standards[vpfe->std_index].std_id == std_id)
1710 return 0;
1711
417d2e50
BP		 1712 /* If streaming is started, return error */
1713 if (vb2_is_busy(&vpfe->buffer_queue)) {
1714 vpfe_err(vpfe, "%s device busy\n", __func__);
1715 ret = -EBUSY;
1716 return ret;
1717 }
1718
1719 ret = v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id,
1720 video, s_std, std_id);
1721 if (ret < 0) {
1722 vpfe_err(vpfe, "Failed to set standard\n");
1723 return ret;
1724 }
1725 ret = vpfe_config_image_format(vpfe, std_id);
1726
1727 return ret;
1728}
1729
1730static int vpfe_g_std(struct file *file, void *priv, v4l2_std_id *std_id)
1731{
1732 struct vpfe_device *vpfe = video_drvdata(file);
1733 struct vpfe_subdev_info *sdinfo;
1734
417d2e50
BP		 1735 sdinfo = vpfe->current_subdev;
1736 if (sdinfo->inputs[0].capabilities != V4L2_IN_CAP_STD)
1737 return -ENODATA;
1738
1739 *std_id = vpfe_standards[vpfe->std_index].std_id;
1740
1741 return 0;
1742}
1743
1744/*
1745 * vpfe_calculate_offsets : This function calculates buffers offset
1746 * for top and bottom field
1747 */
1748static void vpfe_calculate_offsets(struct vpfe_device *vpfe)
1749{
1750 struct v4l2_rect image_win;
1751
417d2e50
BP		 1752 vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win);
1753 vpfe->field_off = image_win.height * image_win.width;
1754}
1755
1756/*
1757 * vpfe_queue_setup - Callback function for buffer setup.
1758 * @vq: vb2_queue ptr
417d2e50
BP		 1759 * @nbuffers: ptr to number of buffers requested by application
1760 * @nplanes:: contains number of distinct video planes needed to hold a frame
1761 * @sizes[]: contains the size (in bytes) of each plane.
36c0f8b3 1762 * @alloc_devs: ptr to allocation context
417d2e50
BP		 1763 *
1764 * This callback function is called when reqbuf() is called to adjust
1765 * the buffer count and buffer size
1766 */
1767static int vpfe_queue_setup(struct vb2_queue *vq,
417d2e50 1768 unsigned int *nbuffers, unsigned int *nplanes,
36c0f8b3 1769 unsigned int sizes[], struct device *alloc_devs[])
417d2e50
BP		 1770{
1771 struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
df9ecb0c 1772 unsigned size = vpfe->fmt.fmt.pix.sizeimage;
417d2e50
BP		 1773
1774 if (vq->num_buffers + *nbuffers < 3)
1775 *nbuffers = 3 - vq->num_buffers;
df9ecb0c
HV		 1776
1777 if (*nplanes) {
1778 if (sizes[0] < size)
1779 return -EINVAL;
1780 size = sizes[0];
1781 }
417d2e50
BP		 1782
1783 *nplanes = 1;
df9ecb0c 1784 sizes[0] = size;
417d2e50
BP		 1785
1786 vpfe_dbg(1, vpfe,
1787 "nbuffers=%d, size=%u\n", *nbuffers, sizes[0]);
1788
1789 /* Calculate field offset */
1790 vpfe_calculate_offsets(vpfe);
1791
1792 return 0;
1793}
1794
1795/*
1796 * vpfe_buffer_prepare : callback function for buffer prepare
1797 * @vb: ptr to vb2_buffer
1798 *
1799 * This is the callback function for buffer prepare when vb2_qbuf()
1800 * function is called. The buffer is prepared and user space virtual address
1801 * or user address is converted into physical address
1802 */
1803static int vpfe_buffer_prepare(struct vb2_buffer *vb)
1804{
2d700715 1805 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
417d2e50
BP		 1806 struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue);
1807
1808 vb2_set_plane_payload(vb, 0, vpfe->fmt.fmt.pix.sizeimage);
1809
1810 if (vb2_get_plane_payload(vb, 0) > vb2_plane_size(vb, 0))
1811 return -EINVAL;
1812
2d700715 1813 vbuf->field = vpfe->fmt.fmt.pix.field;
417d2e50
BP		 1814
1815 return 0;
1816}
1817
1818/*
1819 * vpfe_buffer_queue : Callback function to add buffer to DMA queue
1820 * @vb: ptr to vb2_buffer
1821 */
1822static void vpfe_buffer_queue(struct vb2_buffer *vb)
1823{
2d700715 1824 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
417d2e50 1825 struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue);
2d700715 1826 struct vpfe_cap_buffer *buf = to_vpfe_buffer(vbuf);
417d2e50
BP		 1827 unsigned long flags = 0;
1828
1829 /* add the buffer to the DMA queue */
1830 spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1831 list_add_tail(&buf->list, &vpfe->dma_queue);
1832 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
1833}
1834
73940235
BP		 1835static void vpfe_return_all_buffers(struct vpfe_device *vpfe,
1836 enum vb2_buffer_state state)
1837{
1838 struct vpfe_cap_buffer *buf, *node;
1839 unsigned long flags;
1840
1841 spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1842 list_for_each_entry_safe(buf, node, &vpfe->dma_queue, list) {
1843 vb2_buffer_done(&buf->vb.vb2_buf, state);
1844 list_del(&buf->list);
1845 }
1846
1847 if (vpfe->cur_frm)
1848 vb2_buffer_done(&vpfe->cur_frm->vb.vb2_buf, state);
1849
1850 if (vpfe->next_frm && vpfe->next_frm != vpfe->cur_frm)
1851 vb2_buffer_done(&vpfe->next_frm->vb.vb2_buf, state);
1852
1853 vpfe->cur_frm = NULL;
1854 vpfe->next_frm = NULL;
1855 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
1856}
1857
417d2e50
BP		 1858/*
1859 * vpfe_start_streaming : Starts the DMA engine for streaming
1860 * @vb: ptr to vb2_buffer
1861 * @count: number of buffers
1862 */
1863static int vpfe_start_streaming(struct vb2_queue *vq, unsigned int count)
1864{
1865 struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
417d2e50
BP		 1866 struct vpfe_subdev_info *sdinfo;
1867 unsigned long flags;
1868 unsigned long addr;
1869 int ret;
1870
1871 spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1872
1873 vpfe->field = 0;
1874 vpfe->sequence = 0;
1875
1876 sdinfo = vpfe->current_subdev;
1877
1878 vpfe_attach_irq(vpfe);
1879
b58e69e9
BP		 1880 vpfe->stopping = false;
1881 init_completion(&vpfe->capture_stop);
1882
417d2e50
BP		 1883 if (vpfe->ccdc.ccdc_cfg.if_type == VPFE_RAW_BAYER)
1884 vpfe_ccdc_config_raw(&vpfe->ccdc);
1885 else
1886 vpfe_ccdc_config_ycbcr(&vpfe->ccdc);
1887
1888 /* Get the next frame from the buffer queue */
1889 vpfe->next_frm = list_entry(vpfe->dma_queue.next,
1890 struct vpfe_cap_buffer, list);
1891 vpfe->cur_frm = vpfe->next_frm;
1892 /* Remove buffer from the buffer queue */
1893 list_del(&vpfe->cur_frm->list);
1894 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
1895
2d700715 1896 addr = vb2_dma_contig_plane_dma_addr(&vpfe->cur_frm->vb.vb2_buf, 0);
417d2e50
BP		 1897
1898 vpfe_set_sdr_addr(&vpfe->ccdc, (unsigned long)(addr));
1899
1900 vpfe_pcr_enable(&vpfe->ccdc, 1);
1901
1902 ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 1);
1903 if (ret < 0) {
1904 vpfe_err(vpfe, "Error in attaching interrupt handle\n");
1905 goto err;
1906 }
1907
1908 return 0;
1909
1910err:
73940235 1911 vpfe_return_all_buffers(vpfe, VB2_BUF_STATE_QUEUED);
158a1ddd 1912 vpfe_pcr_enable(&vpfe->ccdc, 0);
417d2e50
BP		 1913 return ret;
1914}
1915
1916/*
1917 * vpfe_stop_streaming : Stop the DMA engine
1918 * @vq: ptr to vb2_queue
1919 *
1920 * This callback stops the DMA engine and any remaining buffers
1921 * in the DMA queue are released.
1922 */
1923static void vpfe_stop_streaming(struct vb2_queue *vq)
1924{
1925 struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
1926 struct vpfe_subdev_info *sdinfo;
417d2e50
BP		 1927 int ret;
1928
1929 vpfe_pcr_enable(&vpfe->ccdc, 0);
1930
b58e69e9
BP		 1931 /* Wait for the last frame to be captured */
1932 vpfe->stopping = true;
1933 wait_for_completion_timeout(&vpfe->capture_stop,
1934 msecs_to_jiffies(250));
1935
417d2e50
BP		 1936 vpfe_detach_irq(vpfe);
1937
1938 sdinfo = vpfe->current_subdev;
1939 ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 0);
1940 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1941 vpfe_dbg(1, vpfe, "stream off failed in subdev\n");
1942
1943 /* release all active buffers */
73940235 1944 vpfe_return_all_buffers(vpfe, VB2_BUF_STATE_ERROR);
417d2e50
BP		 1945}
1946
5200ab6a
HV		 1947static int vpfe_g_pixelaspect(struct file *file, void *priv,
1948 int type, struct v4l2_fract *f)
417d2e50
BP		 1949{
1950 struct vpfe_device *vpfe = video_drvdata(file);
1951
5200ab6a
HV		 1952 if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
1953 vpfe->std_index >= ARRAY_SIZE(vpfe_standards))
417d2e50
BP		 1954 return -EINVAL;
1955
5200ab6a 1956 *f = vpfe_standards[vpfe->std_index].pixelaspect;
417d2e50
BP		 1957
1958 return 0;
1959}
1960
1961static int
1962vpfe_g_selection(struct file *file, void *fh, struct v4l2_selection *s)
1963{
1964 struct vpfe_device *vpfe = video_drvdata(file);
1965
ee10dc36
HV		 1966 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
1967 vpfe->std_index >= ARRAY_SIZE(vpfe_standards))
1968 return -EINVAL;
1969
417d2e50
BP		 1970 switch (s->target) {
1971 case V4L2_SEL_TGT_CROP_BOUNDS:
1972 case V4L2_SEL_TGT_CROP_DEFAULT:
ee10dc36
HV		 1973 s->r.left = 0;
1974 s->r.top = 0;
1975 s->r.width = vpfe_standards[vpfe->std_index].width;
1976 s->r.height = vpfe_standards[vpfe->std_index].height;
417d2e50
BP		 1977 break;
1978
1979 case V4L2_SEL_TGT_CROP:
1980 s->r = vpfe->crop;
1981 break;
1982
1983 default:
1984 return -EINVAL;
1985 }
1986
1987 return 0;
1988}
1989
1990static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
1991{
1992 if (a->left < b->left || a->top < b->top)
1993 return 0;
1994
1995 if (a->left + a->width > b->left + b->width)
1996 return 0;
1997
1998 if (a->top + a->height > b->top + b->height)
1999 return 0;
2000
2001 return 1;
2002}
2003
2004static int
2005vpfe_s_selection(struct file *file, void *fh, struct v4l2_selection *s)
2006{
2007 struct vpfe_device *vpfe = video_drvdata(file);
2008 struct v4l2_rect cr = vpfe->crop;
2009 struct v4l2_rect r = s->r;
750ef54b 2010 u32 bpp;
417d2e50
BP		 2011
2012 /* If streaming is started, return error */
2013 if (vb2_is_busy(&vpfe->buffer_queue)) {
2014 vpfe_err(vpfe, "%s device busy\n", __func__);
2015 return -EBUSY;
2016 }
2017
2018 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
2019 s->target != V4L2_SEL_TGT_CROP)
2020 return -EINVAL;
2021
2022 v4l_bound_align_image(&r.width, 0, cr.width, 0,
2023 &r.height, 0, cr.height, 0, 0);
2024
2025 r.left = clamp_t(unsigned int, r.left, 0, cr.width - r.width);
2026 r.top = clamp_t(unsigned int, r.top, 0, cr.height - r.height);
2027
2028 if (s->flags & V4L2_SEL_FLAG_LE && !enclosed_rectangle(&r, &s->r))
2029 return -ERANGE;
2030
2031 if (s->flags & V4L2_SEL_FLAG_GE && !enclosed_rectangle(&s->r, &r))
2032 return -ERANGE;
2033
2034 s->r = vpfe->crop = r;
2035
750ef54b
BP		 2036 bpp = __get_bytesperpixel(vpfe, vpfe->current_vpfe_fmt);
2037 vpfe_ccdc_set_image_window(&vpfe->ccdc, &r, bpp);
417d2e50
BP		 2038 vpfe->fmt.fmt.pix.width = r.width;
2039 vpfe->fmt.fmt.pix.height = r.height;
750ef54b
BP		 2040 vpfe->fmt.fmt.pix.bytesperline =
2041 vpfe_ccdc_get_line_length(&vpfe->ccdc);
417d2e50
BP		 2042 vpfe->fmt.fmt.pix.sizeimage = vpfe->fmt.fmt.pix.bytesperline *
2043 vpfe->fmt.fmt.pix.height;
2044
2045 vpfe_dbg(1, vpfe, "cropped (%d,%d)/%dx%d of %dx%d\n",
2046 r.left, r.top, r.width, r.height, cr.width, cr.height);
2047
2048 return 0;
2049}
2050
2051static long vpfe_ioctl_default(struct file *file, void *priv,
2052 bool valid_prio, unsigned int cmd, void *param)
2053{
2054 struct vpfe_device *vpfe = video_drvdata(file);
2055 int ret;
2056
417d2e50
BP		 2057 if (!valid_prio) {
2058 vpfe_err(vpfe, "%s device busy\n", __func__);
2059 return -EBUSY;
2060 }
2061
2062 /* If streaming is started, return error */
2063 if (vb2_is_busy(&vpfe->buffer_queue)) {
2064 vpfe_err(vpfe, "%s device busy\n", __func__);
2065 return -EBUSY;
2066 }
2067
2068 switch (cmd) {
2069 case VIDIOC_AM437X_CCDC_CFG:
42fd3638 2070 ret = vpfe_ccdc_set_params(&vpfe->ccdc, (void __user *)param);
417d2e50
BP		 2071 if (ret) {
2072 vpfe_dbg(2, vpfe,
2073 "Error setting parameters in CCDC\n");
2074 return ret;
2075 }
2076 ret = vpfe_get_ccdc_image_format(vpfe,
2077 &vpfe->fmt);
2078 if (ret < 0) {
2079 vpfe_dbg(2, vpfe,
2080 "Invalid image format at CCDC\n");
2081 return ret;
2082 }
2083 break;
2084
2085 default:
2086 ret = -ENOTTY;
2087 break;
2088 }
2089
2090 return ret;
2091}
2092
2093static const struct vb2_ops vpfe_video_qops = {
2094 .wait_prepare = vb2_ops_wait_prepare,
2095 .wait_finish = vb2_ops_wait_finish,
2096 .queue_setup = vpfe_queue_setup,
2097 .buf_prepare = vpfe_buffer_prepare,
2098 .buf_queue = vpfe_buffer_queue,
2099 .start_streaming = vpfe_start_streaming,
2100 .stop_streaming = vpfe_stop_streaming,
2101};
2102
2103/* vpfe capture driver file operations */
2104static const struct v4l2_file_operations vpfe_fops = {
2105 .owner = THIS_MODULE,
2106 .open = vpfe_open,
2107 .release = vpfe_release,
2108 .read = vb2_fop_read,
2109 .poll = vb2_fop_poll,
2110 .unlocked_ioctl = video_ioctl2,
2111 .mmap = vb2_fop_mmap,
2112};
2113
2114/* vpfe capture ioctl operations */
2115static const struct v4l2_ioctl_ops vpfe_ioctl_ops = {
2116 .vidioc_querycap = vpfe_querycap,
2117 .vidioc_enum_fmt_vid_cap = vpfe_enum_fmt,
2118 .vidioc_g_fmt_vid_cap = vpfe_g_fmt,
2119 .vidioc_s_fmt_vid_cap = vpfe_s_fmt,
2120 .vidioc_try_fmt_vid_cap = vpfe_try_fmt,
2121
2122 .vidioc_enum_framesizes = vpfe_enum_size,
2123
2124 .vidioc_enum_input = vpfe_enum_input,
2125 .vidioc_g_input = vpfe_g_input,
2126 .vidioc_s_input = vpfe_s_input,
2127
2128 .vidioc_querystd = vpfe_querystd,
2129 .vidioc_s_std = vpfe_s_std,
2130 .vidioc_g_std = vpfe_g_std,
2131
2132 .vidioc_reqbufs = vb2_ioctl_reqbufs,
2133 .vidioc_create_bufs = vb2_ioctl_create_bufs,
2134 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
2135 .vidioc_querybuf = vb2_ioctl_querybuf,
2136 .vidioc_qbuf = vb2_ioctl_qbuf,
2137 .vidioc_dqbuf = vb2_ioctl_dqbuf,
2138 .vidioc_expbuf = vb2_ioctl_expbuf,
2139 .vidioc_streamon = vb2_ioctl_streamon,
2140 .vidioc_streamoff = vb2_ioctl_streamoff,
2141
2142 .vidioc_log_status = v4l2_ctrl_log_status,
2143 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
2144 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
2145
5200ab6a 2146 .vidioc_g_pixelaspect = vpfe_g_pixelaspect,
417d2e50
BP		 2147 .vidioc_g_selection = vpfe_g_selection,
2148 .vidioc_s_selection = vpfe_s_selection,
2149
2150 .vidioc_default = vpfe_ioctl_default,
2151};
2152
2153static int
2154vpfe_async_bound(struct v4l2_async_notifier *notifier,
2155 struct v4l2_subdev *subdev,
2156 struct v4l2_async_subdev *asd)
2157{
2158 struct vpfe_device *vpfe = container_of(notifier->v4l2_dev,
2159 struct vpfe_device, v4l2_dev);
2160 struct v4l2_subdev_mbus_code_enum mbus_code;
2161 struct vpfe_subdev_info *sdinfo;
0512ccba
BP		 2162 struct vpfe_fmt *fmt;
2163 int ret = 0;
417d2e50 2164 bool found = false;
0512ccba 2165 int i, j, k;
417d2e50 2166
417d2e50 2167 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
4e48afec
MCC		 2168 if (vpfe->cfg->asd[i]->match.fwnode ==
2169 asd[i].match.fwnode) {
d3723239 2170 sdinfo = &vpfe->cfg->sub_devs[i];
417d2e50 2171 vpfe->sd[i] = subdev;
d3723239 2172 vpfe->sd[i]->grp_id = sdinfo->grp_id;
417d2e50
BP		 2173 found = true;
2174 break;
2175 }
2176 }
2177
2178 if (!found) {
2179 vpfe_info(vpfe, "sub device (%s) not matched\n", subdev->name);
2180 return -EINVAL;
2181 }
2182
8b97e0e3 2183 vpfe->video_dev.tvnorms |= sdinfo->inputs[0].std;
d3723239 2184
0512ccba
BP		 2185 vpfe->num_active_fmt = 0;
2186 for (j = 0, i = 0; (ret != -EINVAL); ++j) {
417d2e50
BP		 2187 memset(&mbus_code, 0, sizeof(mbus_code));
2188 mbus_code.index = j;
3f1ccf16 2189 mbus_code.which = V4L2_SUBDEV_FORMAT_ACTIVE;
417d2e50 2190 ret = v4l2_subdev_call(subdev, pad, enum_mbus_code,
0512ccba 2191 NULL, &mbus_code);
417d2e50 2192 if (ret)
417d2e50
BP		 2193 continue;
2194
0512ccba
BP		 2195 vpfe_dbg(3, vpfe,
2196 "subdev %s: code: %04x idx: %d\n",
2197 subdev->name, mbus_code.code, j);
2198
2199 for (k = 0; k < ARRAY_SIZE(formats); k++) {
2200 fmt = &formats[k];
2201 if (mbus_code.code != fmt->code)
2202 continue;
2203 vpfe->active_fmt[i] = fmt;
2204 vpfe_dbg(3, vpfe,
2205 "matched fourcc: %s code: %04x idx: %d\n",
2206 print_fourcc(fmt->fourcc), mbus_code.code, i);
2207 vpfe->num_active_fmt = ++i;
2208 }
417d2e50
BP		 2209 }
2210
0512ccba
BP		 2211 if (!i) {
2212 vpfe_err(vpfe, "No suitable format reported by subdev %s\n",
2213 subdev->name);
2214 return -EINVAL;
2215 }
417d2e50
BP		 2216 return 0;
2217}
2218
2219static int vpfe_probe_complete(struct vpfe_device *vpfe)
2220{
2221 struct video_device *vdev;
2222 struct vb2_queue *q;
2223 int err;
2224
2225 spin_lock_init(&vpfe->dma_queue_lock);
2226 mutex_init(&vpfe->lock);
2227
2228 vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2229
2230 /* set first sub device as current one */
2231 vpfe->current_subdev = &vpfe->cfg->sub_devs[0];
2232 vpfe->v4l2_dev.ctrl_handler = vpfe->sd[0]->ctrl_handler;
2233
2234 err = vpfe_set_input(vpfe, 0);
2235 if (err)
2236 goto probe_out;
2237
2238 /* Initialize videobuf2 queue as per the buffer type */
417d2e50
BP		 2239 q = &vpfe->buffer_queue;
2240 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2241 q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ;
2242 q->drv_priv = vpfe;
2243 q->ops = &vpfe_video_qops;
2244 q->mem_ops = &vb2_dma_contig_memops;
2245 q->buf_struct_size = sizeof(struct vpfe_cap_buffer);
2246 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2247 q->lock = &vpfe->lock;
2248 q->min_buffers_needed = 1;
53ddcc68 2249 q->dev = vpfe->pdev;
417d2e50
BP		 2250
2251 err = vb2_queue_init(q);
2252 if (err) {
2253 vpfe_err(vpfe, "vb2_queue_init() failed\n");
417d2e50
BP		 2254 goto probe_out;
2255 }
2256
2257 INIT_LIST_HEAD(&vpfe->dma_queue);
2258
8b97e0e3 2259 vdev = &vpfe->video_dev;
c0decac1 2260 strscpy(vdev->name, VPFE_MODULE_NAME, sizeof(vdev->name));
8b97e0e3 2261 vdev->release = video_device_release_empty;
417d2e50
BP		 2262 vdev->fops = &vpfe_fops;
2263 vdev->ioctl_ops = &vpfe_ioctl_ops;
2264 vdev->v4l2_dev = &vpfe->v4l2_dev;
2265 vdev->vfl_dir = VFL_DIR_RX;
2266 vdev->queue = q;
2267 vdev->lock = &vpfe->lock;
b2778a30
HV		 2268 vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
2269 V4L2_CAP_READWRITE;
417d2e50 2270 video_set_drvdata(vdev, vpfe);
70cad449 2271 err = video_register_device(&vpfe->video_dev, VFL_TYPE_VIDEO, -1);
417d2e50
BP		 2272 if (err) {
2273 vpfe_err(vpfe,
2274 "Unable to register video device.\n");
2275 goto probe_out;
2276 }
2277
2278 return 0;
2279
2280probe_out:
2281 v4l2_device_unregister(&vpfe->v4l2_dev);
2282 return err;
2283}
2284
2285static int vpfe_async_complete(struct v4l2_async_notifier *notifier)
2286{
2287 struct vpfe_device *vpfe = container_of(notifier->v4l2_dev,
2288 struct vpfe_device, v4l2_dev);
2289
2290 return vpfe_probe_complete(vpfe);
2291}
2292
b6ee3f0d
LP		 2293static const struct v4l2_async_notifier_operations vpfe_async_ops = {
2294 .bound = vpfe_async_bound,
2295 .complete = vpfe_async_complete,
2296};
2297
417d2e50 2298static struct vpfe_config *
d079f94c 2299vpfe_get_pdata(struct vpfe_device *vpfe)
417d2e50 2300{
ee662d44 2301 struct device_node *endpoint = NULL;
d079f94c 2302 struct device *dev = vpfe->pdev;
417d2e50
BP		 2303 struct vpfe_subdev_info *sdinfo;
2304 struct vpfe_config *pdata;
2305 unsigned int flags;
2306 unsigned int i;
2307 int err;
2308
d079f94c 2309 dev_dbg(dev, "vpfe_get_pdata\n");
417d2e50 2310
d079f94c 2311 v4l2_async_notifier_init(&vpfe->notifier);
417d2e50 2312
d079f94c
SL		 2313 if (!IS_ENABLED(CONFIG_OF) || !dev->of_node)
2314 return dev->platform_data;
2315
2316 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
417d2e50
BP		 2317 if (!pdata)
2318 return NULL;
2319
2320 for (i = 0; ; i++) {
60359a28 2321 struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
ee662d44
LP		 2322 struct device_node *rem;
2323
d079f94c 2324 endpoint = of_graph_get_next_endpoint(dev->of_node, endpoint);
417d2e50
BP		 2325 if (!endpoint)
2326 break;
2327
2328 sdinfo = &pdata->sub_devs[i];
2329 sdinfo->grp_id = 0;
2330
2331 /* we only support camera */
2332 sdinfo->inputs[0].index = i;
cc1e6315
MCC		 2333 strscpy(sdinfo->inputs[0].name, "Camera",
2334 sizeof(sdinfo->inputs[0].name));
417d2e50
BP		 2335 sdinfo->inputs[0].type = V4L2_INPUT_TYPE_CAMERA;
2336 sdinfo->inputs[0].std = V4L2_STD_ALL;
2337 sdinfo->inputs[0].capabilities = V4L2_IN_CAP_STD;
2338
2339 sdinfo->can_route = 0;
2340 sdinfo->routes = NULL;
2341
2342 of_property_read_u32(endpoint, "ti,am437x-vpfe-interface",
2343 &sdinfo->vpfe_param.if_type);
2344 if (sdinfo->vpfe_param.if_type < 0 ||
2345 sdinfo->vpfe_param.if_type > 4) {
2346 sdinfo->vpfe_param.if_type = VPFE_RAW_BAYER;
2347 }
2348
859969b3
SA		 2349 err = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
2350 &bus_cfg);
417d2e50 2351 if (err) {
d079f94c
SL		 2352 dev_err(dev, "Could not parse the endpoint\n");
2353 goto cleanup;
417d2e50
BP		 2354 }
2355
2356 sdinfo->vpfe_param.bus_width = bus_cfg.bus.parallel.bus_width;
2357
2358 if (sdinfo->vpfe_param.bus_width < 8 ||
2359 sdinfo->vpfe_param.bus_width > 16) {
d079f94c
SL		 2360 dev_err(dev, "Invalid bus width.\n");
2361 goto cleanup;
417d2e50
BP		 2362 }
2363
2364 flags = bus_cfg.bus.parallel.flags;
2365
2366 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
2367 sdinfo->vpfe_param.hdpol = 1;
2368
2369 if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
2370 sdinfo->vpfe_param.vdpol = 1;
2371
2372 rem = of_graph_get_remote_port_parent(endpoint);
2373 if (!rem) {
d079f94c 2374 dev_err(dev, "Remote device at %pOF not found\n",
68d9c47b 2375 endpoint);
d079f94c 2376 goto cleanup;
417d2e50
BP		 2377 }
2378
d079f94c
SL		 2379 pdata->asd[i] = v4l2_async_notifier_add_fwnode_subdev(
2380 &vpfe->notifier, of_fwnode_handle(rem),
2381 sizeof(struct v4l2_async_subdev));
016413d9
SA		 2382 of_node_put(rem);
2383 if (IS_ERR(pdata->asd[i]))
d079f94c 2384 goto cleanup;
417d2e50
BP		 2385 }
2386
2387 of_node_put(endpoint);
2388 return pdata;
2389
d079f94c
SL		 2390cleanup:
2391 v4l2_async_notifier_cleanup(&vpfe->notifier);
417d2e50 2392 of_node_put(endpoint);
417d2e50
BP		 2393 return NULL;
2394}
2395
2396/*
2397 * vpfe_probe : This function creates device entries by register
2398 * itself to the V4L2 driver and initializes fields of each
2399 * device objects
2400 */
2401static int vpfe_probe(struct platform_device *pdev)
2402{
d079f94c 2403 struct vpfe_config *vpfe_cfg;
417d2e50
BP		 2404 struct vpfe_device *vpfe;
2405 struct vpfe_ccdc *ccdc;
2406 struct resource *res;
2407 int ret;
2408
417d2e50
BP		 2409 vpfe = devm_kzalloc(&pdev->dev, sizeof(*vpfe), GFP_KERNEL);
2410 if (!vpfe)
2411 return -ENOMEM;
2412
2413 vpfe->pdev = &pdev->dev;
d079f94c
SL		 2414
2415 vpfe_cfg = vpfe_get_pdata(vpfe);
2416 if (!vpfe_cfg) {
2417 dev_err(&pdev->dev, "No platform data\n");
2418 return -EINVAL;
2419 }
2420
417d2e50
BP		 2421 vpfe->cfg = vpfe_cfg;
2422 ccdc = &vpfe->ccdc;
2423
2424 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2425 ccdc->ccdc_cfg.base_addr = devm_ioremap_resource(&pdev->dev, res);
d079f94c
SL		 2426 if (IS_ERR(ccdc->ccdc_cfg.base_addr)) {
2427 ret = PTR_ERR(ccdc->ccdc_cfg.base_addr);
2428 goto probe_out_cleanup;
2429 }
417d2e50 2430
d2d04834
AH		 2431 ret = platform_get_irq(pdev, 0);
2432 if (ret <= 0) {
d079f94c
SL		 2433 ret = -ENODEV;
2434 goto probe_out_cleanup;
417d2e50 2435 }
d2d04834 2436 vpfe->irq = ret;
417d2e50
BP		 2437
2438 ret = devm_request_irq(vpfe->pdev, vpfe->irq, vpfe_isr, 0,
2439 "vpfe_capture0", vpfe);
2440 if (ret) {
2441 dev_err(&pdev->dev, "Unable to request interrupt\n");
d079f94c
SL		 2442 ret = -EINVAL;
2443 goto probe_out_cleanup;
417d2e50
BP		 2444 }
2445
417d2e50
BP		 2446 ret = v4l2_device_register(&pdev->dev, &vpfe->v4l2_dev);
2447 if (ret) {
2448 vpfe_err(vpfe,
2449 "Unable to register v4l2 device.\n");
d079f94c 2450 goto probe_out_cleanup;
417d2e50
BP		 2451 }
2452
2453 /* set the driver data in platform device */
2454 platform_set_drvdata(pdev, vpfe);
2455 /* Enabling module functional clock */
2456 pm_runtime_enable(&pdev->dev);
2457
2458 /* for now just enable it here instead of waiting for the open */
2459 pm_runtime_get_sync(&pdev->dev);
2460
2461 vpfe_ccdc_config_defaults(ccdc);
2462
2463 pm_runtime_put_sync(&pdev->dev);
2464
a86854d0
KC		 2465 vpfe->sd = devm_kcalloc(&pdev->dev,
2466 ARRAY_SIZE(vpfe->cfg->asd),
2467 sizeof(struct v4l2_subdev *),
2468 GFP_KERNEL);
417d2e50
BP		 2469 if (!vpfe->sd) {
2470 ret = -ENOMEM;
2471 goto probe_out_v4l2_unregister;
2472 }
2473
b6ee3f0d 2474 vpfe->notifier.ops = &vpfe_async_ops;
d079f94c 2475 ret = v4l2_async_notifier_register(&vpfe->v4l2_dev, &vpfe->notifier);
417d2e50
BP		 2476 if (ret) {
2477 vpfe_err(vpfe, "Error registering async notifier\n");
2478 ret = -EINVAL;
2479 goto probe_out_v4l2_unregister;
2480 }
2481
2482 return 0;
2483
2484probe_out_v4l2_unregister:
2485 v4l2_device_unregister(&vpfe->v4l2_dev);
d079f94c
SL		 2486probe_out_cleanup:
2487 v4l2_async_notifier_cleanup(&vpfe->notifier);
417d2e50
BP		 2488 return ret;
2489}
2490
2491/*
2492 * vpfe_remove : It un-register device from V4L2 driver
2493 */
2494static int vpfe_remove(struct platform_device *pdev)
2495{
2496 struct vpfe_device *vpfe = platform_get_drvdata(pdev);
2497
417d2e50
BP		 2498 pm_runtime_disable(&pdev->dev);
2499
2500 v4l2_async_notifier_unregister(&vpfe->notifier);
d079f94c 2501 v4l2_async_notifier_cleanup(&vpfe->notifier);
417d2e50 2502 v4l2_device_unregister(&vpfe->v4l2_dev);
8b97e0e3 2503 video_unregister_device(&vpfe->video_dev);
417d2e50
BP		 2504
2505 return 0;
2506}
2507
2508#ifdef CONFIG_PM_SLEEP
2509
2510static void vpfe_save_context(struct vpfe_ccdc *ccdc)
2511{
2512 ccdc->ccdc_ctx[VPFE_PCR >> 2] = vpfe_reg_read(ccdc, VPFE_PCR);
2513 ccdc->ccdc_ctx[VPFE_SYNMODE >> 2] = vpfe_reg_read(ccdc, VPFE_SYNMODE);
2514 ccdc->ccdc_ctx[VPFE_SDOFST >> 2] = vpfe_reg_read(ccdc, VPFE_SDOFST);
2515 ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2] = vpfe_reg_read(ccdc, VPFE_SDR_ADDR);
2516 ccdc->ccdc_ctx[VPFE_CLAMP >> 2] = vpfe_reg_read(ccdc, VPFE_CLAMP);
2517 ccdc->ccdc_ctx[VPFE_DCSUB >> 2] = vpfe_reg_read(ccdc, VPFE_DCSUB);
2518 ccdc->ccdc_ctx[VPFE_COLPTN >> 2] = vpfe_reg_read(ccdc, VPFE_COLPTN);
2519 ccdc->ccdc_ctx[VPFE_BLKCMP >> 2] = vpfe_reg_read(ccdc, VPFE_BLKCMP);
2520 ccdc->ccdc_ctx[VPFE_VDINT >> 2] = vpfe_reg_read(ccdc, VPFE_VDINT);
2521 ccdc->ccdc_ctx[VPFE_ALAW >> 2] = vpfe_reg_read(ccdc, VPFE_ALAW);
2522 ccdc->ccdc_ctx[VPFE_REC656IF >> 2] = vpfe_reg_read(ccdc, VPFE_REC656IF);
2523 ccdc->ccdc_ctx[VPFE_CCDCFG >> 2] = vpfe_reg_read(ccdc, VPFE_CCDCFG);
2524 ccdc->ccdc_ctx[VPFE_CULLING >> 2] = vpfe_reg_read(ccdc, VPFE_CULLING);
2525 ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2] = vpfe_reg_read(ccdc,
2526 VPFE_HD_VD_WID);
2527 ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2] = vpfe_reg_read(ccdc,
2528 VPFE_PIX_LINES);
2529 ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2] = vpfe_reg_read(ccdc,
2530 VPFE_HORZ_INFO);
2531 ccdc->ccdc_ctx[VPFE_VERT_START >> 2] = vpfe_reg_read(ccdc,
2532 VPFE_VERT_START);
2533 ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2] = vpfe_reg_read(ccdc,
2534 VPFE_VERT_LINES);
2535 ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2] = vpfe_reg_read(ccdc,
2536 VPFE_HSIZE_OFF);
2537}
2538
2539static int vpfe_suspend(struct device *dev)
2540{
8516529e 2541 struct vpfe_device *vpfe = dev_get_drvdata(dev);
417d2e50
BP		 2542 struct vpfe_ccdc *ccdc = &vpfe->ccdc;
2543
b0e41bf2
DG		 2544 /* only do full suspend if streaming has started */
2545 if (vb2_start_streaming_called(&vpfe->buffer_queue)) {
2546 pm_runtime_get_sync(dev);
2547 vpfe_config_enable(ccdc, 1);
417d2e50 2548
b0e41bf2
DG		 2549 /* Save VPFE context */
2550 vpfe_save_context(ccdc);
417d2e50 2551
b0e41bf2
DG		 2552 /* Disable CCDC */
2553 vpfe_pcr_enable(ccdc, 0);
2554 vpfe_config_enable(ccdc, 0);
417d2e50 2555
b0e41bf2
DG		 2556 /* Disable both master and slave clock */
2557 pm_runtime_put_sync(dev);
2558 }
417d2e50
BP		 2559
2560 /* Select sleep pin state */
2561 pinctrl_pm_select_sleep_state(dev);
2562
2563 return 0;
2564}
2565
2566static void vpfe_restore_context(struct vpfe_ccdc *ccdc)
2567{
2568 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SYNMODE >> 2], VPFE_SYNMODE);
2569 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CULLING >> 2], VPFE_CULLING);
2570 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDOFST >> 2], VPFE_SDOFST);
2571 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2], VPFE_SDR_ADDR);
2572 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CLAMP >> 2], VPFE_CLAMP);
2573 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_DCSUB >> 2], VPFE_DCSUB);
2574 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_COLPTN >> 2], VPFE_COLPTN);
2575 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_BLKCMP >> 2], VPFE_BLKCMP);
2576 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VDINT >> 2], VPFE_VDINT);
2577 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_ALAW >> 2], VPFE_ALAW);
2578 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_REC656IF >> 2], VPFE_REC656IF);
2579 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CCDCFG >> 2], VPFE_CCDCFG);
2580 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PCR >> 2], VPFE_PCR);
2581 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2],
2582 VPFE_HD_VD_WID);
2583 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2],
2584 VPFE_PIX_LINES);
2585 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2],
2586 VPFE_HORZ_INFO);
2587 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_START >> 2],
2588 VPFE_VERT_START);
2589 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2],
2590 VPFE_VERT_LINES);
2591 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2],
2592 VPFE_HSIZE_OFF);
2593}
2594
2595static int vpfe_resume(struct device *dev)
2596{
8516529e 2597 struct vpfe_device *vpfe = dev_get_drvdata(dev);
417d2e50
BP		 2598 struct vpfe_ccdc *ccdc = &vpfe->ccdc;
2599
b0e41bf2
DG		 2600 /* only do full resume if streaming has started */
2601 if (vb2_start_streaming_called(&vpfe->buffer_queue)) {
2602 /* Enable both master and slave clock */
2603 pm_runtime_get_sync(dev);
2604 vpfe_config_enable(ccdc, 1);
417d2e50 2605
b0e41bf2
DG		 2606 /* Restore VPFE context */
2607 vpfe_restore_context(ccdc);
417d2e50 2608
b0e41bf2
DG		 2609 vpfe_config_enable(ccdc, 0);
2610 pm_runtime_put_sync(dev);
2611 }
417d2e50
BP		 2612
2613 /* Select default pin state */
2614 pinctrl_pm_select_default_state(dev);
2615
2616 return 0;
2617}
2618
2619#endif
2620
2621static SIMPLE_DEV_PM_OPS(vpfe_pm_ops, vpfe_suspend, vpfe_resume);
2622
2623static const struct of_device_id vpfe_of_match[] = {
2624 { .compatible = "ti,am437x-vpfe", },
2625 { /* sentinel */ },
2626};
2627MODULE_DEVICE_TABLE(of, vpfe_of_match);
2628
2629static struct platform_driver vpfe_driver = {
2630 .probe = vpfe_probe,
2631 .remove = vpfe_remove,
2632 .driver = {
2633 .name = VPFE_MODULE_NAME,
417d2e50
BP		 2634 .pm = &vpfe_pm_ops,
2635 .of_match_table = of_match_ptr(vpfe_of_match),
2636 },
2637};
2638
2639module_platform_driver(vpfe_driver);
2640
2641MODULE_AUTHOR("Texas Instruments");
2642MODULE_DESCRIPTION("TI AM437x VPFE driver");
2643MODULE_LICENSE("GPL");
2644MODULE_VERSION(VPFE_VERSION);
Linux 6.x block layer and io_uring tree(s)