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[linux-2.6-block.git] / drivers / media / pci / ttpci / budget-patch.c
CommitLineData
1da177e4
LT
1/*
2 * budget-patch.c: driver for Budget Patch,
3 * hardware modification of DVB-S cards enabling full TS
4 *
5 * Written by Emard <emard@softhome.net>
6 *
7 * Original idea by Roberto Deza <rdeza@unav.es>
8 *
9 * Special thanks to Holger Waechtler, Michael Hunold, Marian Durkovic
10 * and Metzlerbros
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
28 *
29 *
991ce92f 30 * the project's page is at https://linuxtv.org
1da177e4
LT
31 */
32
33#include "av7110.h"
34#include "av7110_hw.h"
35#include "budget.h"
36#include "stv0299.h"
37#include "ves1x93.h"
38#include "tda8083.h"
39
265366e8
PA
40#include "bsru6.h"
41
26dc4d04
JG
42DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
43
1da177e4
LT
44#define budget_patch budget
45
46static struct saa7146_extension budget_extension;
47
48MAKE_BUDGET_INFO(ttbp, "TT-Budget/Patch DVB-S 1.x PCI", BUDGET_PATCH);
49//MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC);
50
51static struct pci_device_id pci_tbl[] = {
9101e622 52 MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000),
1da177e4 53// MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013),
9101e622
MCC
54 {
55 .vendor = 0,
56 }
1da177e4
LT
57};
58
59/* those lines are for budget-patch to be tried
60** on a true budget card and observe the
61** behaviour of VSYNC generated by rps1.
62** this code was shamelessly copy/pasted from budget.c
63*/
64static void gpio_Set22K (struct budget *budget, int state)
65{
66 struct saa7146_dev *dev=budget->dev;
67 dprintk(2, "budget: %p\n", budget);
68 saa7146_setgpio(dev, 3, (state ? SAA7146_GPIO_OUTHI : SAA7146_GPIO_OUTLO));
69}
70
71/* Diseqc functions only for TT Budget card */
72/* taken from the Skyvision DVB driver by
73 Ralph Metzler <rjkm@metzlerbros.de> */
74
75static void DiseqcSendBit (struct budget *budget, int data)
76{
77 struct saa7146_dev *dev=budget->dev;
78 dprintk(2, "budget: %p\n", budget);
79
80 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
81 udelay(data ? 500 : 1000);
82 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
83 udelay(data ? 1000 : 500);
84}
85
86static void DiseqcSendByte (struct budget *budget, int data)
87{
88 int i, par=1, d;
89
90 dprintk(2, "budget: %p\n", budget);
91
92 for (i=7; i>=0; i--) {
93 d = (data>>i)&1;
94 par ^= d;
95 DiseqcSendBit(budget, d);
96 }
97
98 DiseqcSendBit(budget, par);
99}
100
101static int SendDiSEqCMsg (struct budget *budget, int len, u8 *msg, unsigned long burst)
102{
103 struct saa7146_dev *dev=budget->dev;
104 int i;
105
106 dprintk(2, "budget: %p\n", budget);
107
108 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
109 mdelay(16);
110
111 for (i=0; i<len; i++)
112 DiseqcSendByte(budget, msg[i]);
113
114 mdelay(16);
115
116 if (burst!=-1) {
117 if (burst)
118 DiseqcSendByte(budget, 0xff);
119 else {
120 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
db210426
TM
121 mdelay(12);
122 udelay(500);
1da177e4
LT
123 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
124 }
125 msleep(20);
126 }
127
128 return 0;
129}
130
0df289a2
MCC
131/* shamelessly copy/pasted from budget.c */
132static int budget_set_tone(struct dvb_frontend *fe,
133 enum fe_sec_tone_mode tone)
1da177e4
LT
134{
135 struct budget* budget = (struct budget*) fe->dvb->priv;
136
137 switch (tone) {
138 case SEC_TONE_ON:
139 gpio_Set22K (budget, 1);
140 break;
141
142 case SEC_TONE_OFF:
143 gpio_Set22K (budget, 0);
144 break;
145
146 default:
147 return -EINVAL;
148 }
149
150 return 0;
151}
152
153static int budget_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
154{
155 struct budget* budget = (struct budget*) fe->dvb->priv;
156
157 SendDiSEqCMsg (budget, cmd->msg_len, cmd->msg, 0);
158
159 return 0;
160}
161
0df289a2
MCC
162static int budget_diseqc_send_burst(struct dvb_frontend *fe,
163 enum fe_sec_mini_cmd minicmd)
1da177e4
LT
164{
165 struct budget* budget = (struct budget*) fe->dvb->priv;
166
167 SendDiSEqCMsg (budget, 0, NULL, minicmd);
168
169 return 0;
170}
171
172static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length)
173{
9101e622
MCC
174 int i;
175
176 dprintk(2, "budget: %p\n", budget);
177
178 for (i = 2; i < length; i++)
179 {
180 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0);
181 msleep(5);
182 }
183 if (length)
184 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0);
185 else
186 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0);
187 msleep(5);
188 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0);
189 msleep(5);
190 return 0;
1da177e4
LT
191}
192
193static void av7110_set22k(struct budget_patch *budget, int state)
194{
9101e622 195 u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0};
1da177e4 196
9101e622
MCC
197 dprintk(2, "budget: %p\n", budget);
198 budget_av7110_send_fw_cmd(budget, buf, 2);
1da177e4
LT
199}
200
201static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst)
202{
9101e622
MCC
203 int i;
204 u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC),
205 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
1da177e4 206
9101e622 207 dprintk(2, "budget: %p\n", budget);
1da177e4 208
9101e622
MCC
209 if (len>10)
210 len=10;
1da177e4 211
9101e622
MCC
212 buf[1] = len+2;
213 buf[2] = len;
1da177e4 214
9101e622
MCC
215 if (burst != -1)
216 buf[3]=burst ? 0x01 : 0x00;
217 else
218 buf[3]=0xffff;
1da177e4 219
9101e622
MCC
220 for (i=0; i<len; i++)
221 buf[i+4]=msg[i];
1da177e4 222
9101e622
MCC
223 budget_av7110_send_fw_cmd(budget, buf, 18);
224 return 0;
1da177e4
LT
225}
226
0df289a2
MCC
227static int budget_patch_set_tone(struct dvb_frontend *fe,
228 enum fe_sec_tone_mode tone)
1da177e4
LT
229{
230 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
231
232 switch (tone) {
233 case SEC_TONE_ON:
234 av7110_set22k (budget, 1);
235 break;
236
237 case SEC_TONE_OFF:
238 av7110_set22k (budget, 0);
239 break;
240
241 default:
242 return -EINVAL;
243 }
244
245 return 0;
246}
247
248static int budget_patch_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
249{
250 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
251
252 av7110_send_diseqc_msg (budget, cmd->msg_len, cmd->msg, 0);
253
254 return 0;
255}
256
0df289a2
MCC
257static int budget_patch_diseqc_send_burst(struct dvb_frontend *fe,
258 enum fe_sec_mini_cmd minicmd)
1da177e4
LT
259{
260 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
261
262 av7110_send_diseqc_msg (budget, 0, NULL, minicmd);
263
264 return 0;
265}
266
14d24d14 267static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
1da177e4 268{
a0a9ff7f 269 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1da177e4
LT
270 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
271 u8 pwr = 0;
272 u8 buf[4];
273 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
a0a9ff7f
MCC
274 u32 div = (p->frequency + 479500) / 125;
275
276 if (p->frequency > 2000000)
277 pwr = 3;
278 else if (p->frequency > 1800000)
279 pwr = 2;
280 else if (p->frequency > 1600000)
281 pwr = 1;
282 else if (p->frequency > 1200000)
283 pwr = 0;
284 else if (p->frequency >= 1100000)
285 pwr = 1;
1da177e4
LT
286 else pwr = 2;
287
288 buf[0] = (div >> 8) & 0x7f;
289 buf[1] = div & 0xff;
290 buf[2] = ((div & 0x18000) >> 10) | 0x95;
291 buf[3] = (pwr << 6) | 0x30;
292
9101e622 293 // NOTE: since we're using a prescaler of 2, we set the
1da177e4
LT
294 // divisor frequency to 62.5kHz and divide by 125 above
295
dea74869
PB
296 if (fe->ops.i2c_gate_ctrl)
297 fe->ops.i2c_gate_ctrl(fe, 1);
2d15fd2f
AQ
298 if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1)
299 return -EIO;
1da177e4
LT
300 return 0;
301}
302
303static struct ves1x93_config alps_bsrv2_config = {
304 .demod_address = 0x08,
305 .xin = 90100000UL,
306 .invert_pwm = 0,
1da177e4
LT
307};
308
14d24d14 309static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
1da177e4 310{
a0a9ff7f 311 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1da177e4
LT
312 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
313 u32 div;
314 u8 data[4];
315 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
316
a0a9ff7f 317 div = p->frequency / 125;
1da177e4
LT
318 data[0] = (div >> 8) & 0x7f;
319 data[1] = div & 0xff;
320 data[2] = 0x8e;
321 data[3] = 0x00;
322
dea74869
PB
323 if (fe->ops.i2c_gate_ctrl)
324 fe->ops.i2c_gate_ctrl(fe, 1);
2d15fd2f
AQ
325 if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1)
326 return -EIO;
1da177e4
LT
327 return 0;
328}
329
330static struct tda8083_config grundig_29504_451_config = {
331 .demod_address = 0x68,
1da177e4
LT
332};
333
334static void frontend_init(struct budget_patch* budget)
335{
336 switch(budget->dev->pci->subsystem_device) {
337 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
9101e622 338 case 0x1013: // SATELCO Multimedia PCI
1da177e4
LT
339
340 // try the ALPS BSRV2 first of all
2bfe031d 341 budget->dvb_frontend = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &budget->i2c_adap);
1da177e4 342 if (budget->dvb_frontend) {
dea74869
PB
343 budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
344 budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_patch_diseqc_send_master_cmd;
345 budget->dvb_frontend->ops.diseqc_send_burst = budget_patch_diseqc_send_burst;
346 budget->dvb_frontend->ops.set_tone = budget_patch_set_tone;
1da177e4
LT
347 break;
348 }
349
350 // try the ALPS BSRU6 now
2bfe031d 351 budget->dvb_frontend = dvb_attach(stv0299_attach, &alps_bsru6_config, &budget->i2c_adap);
1da177e4 352 if (budget->dvb_frontend) {
dea74869 353 budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
2d15fd2f
AQ
354 budget->dvb_frontend->tuner_priv = &budget->i2c_adap;
355
dea74869
PB
356 budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd;
357 budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst;
358 budget->dvb_frontend->ops.set_tone = budget_set_tone;
1da177e4
LT
359 break;
360 }
361
362 // Try the grundig 29504-451
2bfe031d 363 budget->dvb_frontend = dvb_attach(tda8083_attach, &grundig_29504_451_config, &budget->i2c_adap);
1da177e4 364 if (budget->dvb_frontend) {
dea74869
PB
365 budget->dvb_frontend->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
366 budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd;
367 budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst;
368 budget->dvb_frontend->ops.set_tone = budget_set_tone;
1da177e4
LT
369 break;
370 }
371 break;
372 }
373
374 if (budget->dvb_frontend == NULL) {
29e66a6c 375 printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
1da177e4
LT
376 budget->dev->pci->vendor,
377 budget->dev->pci->device,
378 budget->dev->pci->subsystem_vendor,
379 budget->dev->pci->subsystem_device);
380 } else {
fdc53a6d 381 if (dvb_register_frontend(&budget->dvb_adapter, budget->dvb_frontend)) {
1da177e4 382 printk("budget-av: Frontend registration failed!\n");
f52a838b 383 dvb_frontend_detach(budget->dvb_frontend);
1da177e4
LT
384 budget->dvb_frontend = NULL;
385 }
386 }
387}
388
389/* written by Emard */
390static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info)
391{
9101e622
MCC
392 struct budget_patch *budget;
393 int err;
1da177e4
LT
394 int count = 0;
395 int detected = 0;
396
397#define PATCH_RESET 0
398#define RPS_IRQ 0
399#define HPS_SETUP 0
400#if PATCH_RESET
9101e622
MCC
401 saa7146_write(dev, MC1, MASK_31);
402 msleep(40);
1da177e4
LT
403#endif
404#if HPS_SETUP
9101e622
MCC
405 // initialize registers. Better to have it like this
406 // than leaving something unconfigured
1da177e4
LT
407 saa7146_write(dev, DD1_STREAM_B, 0);
408 // port B VSYNC at rising edge
409 saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too!
410 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
411
412 // debi config
413 // saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18);
414
9101e622
MCC
415 // zero all HPS registers
416 saa7146_write(dev, HPS_H_PRESCALE, 0); // r68
417 saa7146_write(dev, HPS_H_SCALE, 0); // r6c
418 saa7146_write(dev, BCS_CTRL, 0); // r70
419 saa7146_write(dev, HPS_V_SCALE, 0); // r60
420 saa7146_write(dev, HPS_V_GAIN, 0); // r64
421 saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74
422 saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78
423 // Set HPS prescaler for port B input
424 saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) );
425 saa7146_write(dev, MC2,
426 0 * (MASK_08 | MASK_24) | // BRS control
427 0 * (MASK_09 | MASK_25) | // a
428 0 * (MASK_10 | MASK_26) | // b
429 1 * (MASK_06 | MASK_22) | // HPS_CTRL1
430 1 * (MASK_05 | MASK_21) | // HPS_CTRL2
431 0 * (MASK_01 | MASK_15) // DEBI
432 );
1da177e4
LT
433#endif
434 // Disable RPS1 and RPS0
9101e622
MCC
435 saa7146_write(dev, MC1, ( MASK_29 | MASK_28));
436 // RPS1 timeout disable
437 saa7146_write(dev, RPS_TOV1, 0);
1da177e4
LT
438
439 // code for autodetection
440 // will wait for VBI_B event (vertical blank at port B)
441 // and will reset GPIO3 after VBI_B is detected.
442 // (GPIO3 should be raised high by CPU to
443 // test if GPIO3 will generate vertical blank signal
444 // in budget patch GPIO3 is connected to VSYNC_B
445 count = 0;
446#if 0
153755a7
AV
447 WRITE_RPS1(CMD_UPLOAD |
448 MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 );
1da177e4 449#endif
153755a7
AV
450 WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
451 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
452 WRITE_RPS1(GPIO3_MSK);
453 WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
1da177e4 454#if RPS_IRQ
9101e622 455 // issue RPS1 interrupt to increment counter
153755a7 456 WRITE_RPS1(CMD_INTERRUPT);
9101e622 457 // at least a NOP is neede between two interrupts
153755a7 458 WRITE_RPS1(CMD_NOP);
9101e622 459 // interrupt again
153755a7 460 WRITE_RPS1(CMD_INTERRUPT);
1da177e4 461#endif
153755a7 462 WRITE_RPS1(CMD_STOP);
1da177e4
LT
463
464#if RPS_IRQ
9101e622
MCC
465 // set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
466 // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
467 // use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
468 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
af901ca1 469 // set event counter 1 threshold to maximum allowed value (rEC p55)
9101e622 470 saa7146_write(dev, ECT1R, 0x3fff );
1da177e4 471#endif
9101e622
MCC
472 // Fix VSYNC level
473 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
474 // Set RPS1 Address register to point to RPS code (r108 p42)
475 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
476 // Enable RPS1, (rFC p33)
477 saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
1da177e4
LT
478
479
9101e622
MCC
480 mdelay(50);
481 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
1da177e4
LT
482 mdelay(150);
483
484
485 if( (saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0)
486 detected = 1;
487
488#if RPS_IRQ
9101e622 489 printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
1da177e4
LT
490#endif
491 // Disable RPS1
9101e622 492 saa7146_write(dev, MC1, ( MASK_29 ));
1da177e4
LT
493
494 if(detected == 0)
9101e622 495 printk("budget-patch not detected or saa7146 in non-default state.\n"
6774def6 496 "try enabling resetting of 7146 with MASK_31 in MC1 register\n");
1da177e4
LT
497
498 else
9101e622 499 printk("BUDGET-PATCH DETECTED.\n");
1da177e4
LT
500
501
502/* OLD (Original design by Roberto Deza):
503** This code will setup the SAA7146_RPS1 to generate a square
504** wave on GPIO3, changing when a field (TS_HEIGHT/2 "lines" of
505** TS_WIDTH packets) has been acquired on SAA7146_D1B video port;
506** then, this GPIO3 output which is connected to the D1B_VSYNC
507** input, will trigger the acquisition of the alternate field
508** and so on.
509** Currently, the TT_budget / WinTV_Nova cards have two ICs
510** (74HCT4040, LVC74) for the generation of this VSYNC signal,
511** which seems that can be done perfectly without this :-)).
512*/
513
514/* New design (By Emard)
515** this rps1 code will copy internal HS event to GPIO3 pin.
0779bf2d 516** GPIO3 is in budget-patch hardware connected to port B VSYNC
1da177e4
LT
517
518** HS is an internal event of 7146, accessible with RPS
519** and temporarily raised high every n lines
520** (n in defined in the RPS_THRESH1 counter threshold)
521** I think HS is raised high on the beginning of the n-th line
522** and remains high until this n-th line that triggered
0779bf2d 523** it is completely received. When the reception of n-th line
1da177e4
LT
524** ends, HS is lowered.
525
526** To transmit data over DMA, 7146 needs changing state at
527** port B VSYNC pin. Any changing of port B VSYNC will
528** cause some DMA data transfer, with more or less packets loss.
529** It depends on the phase and frequency of VSYNC and
530** the way of 7146 is instructed to trigger on port B (defined
531** in DD1_INIT register, 3rd nibble from the right valid
532** numbers are 0-7, see datasheet)
533**
534** The correct triggering can minimize packet loss,
535** dvbtraffic should give this stable bandwidths:
536** 22k transponder = 33814 kbit/s
537** 27.5k transponder = 38045 kbit/s
538** by experiment it is found that the best results
539** (stable bandwidths and almost no packet loss)
540** are obtained using DD1_INIT triggering number 2
541** (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
542** and a VSYNC phase that occurs in the middle of DMA transfer
543** (about byte 188*512=96256 in the DMA window).
544**
545** Phase of HS is still not clear to me how to control,
546** It just happens to be so. It can be seen if one enables
547** RPS_IRQ and print Event Counter 1 in vpeirq(). Every
548** time RPS_INTERRUPT is called, the Event Counter 1 will
549** increment. That's how the 7146 is programmed to do event
550** counting in this budget-patch.c
551** I *think* HPS setting has something to do with the phase
25985edc 552** of HS but I can't be 100% sure in that.
1da177e4
LT
553
554** hardware debug note: a working budget card (including budget patch)
555** with vpeirq() interrupt setup in mode "0x90" (every 64K) will
556** generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
0779bf2d 557** and that means 3*25=75 Hz of interrupt frequency, as seen by
1da177e4
LT
558** watch cat /proc/interrupts
559**
560** If this frequency is 3x lower (and data received in the DMA
561** buffer don't start with 0x47, but in the middle of packets,
562** whose lengths appear to be like 188 292 188 104 etc.
563** this means VSYNC line is not connected in the hardware.
564** (check soldering pcb and pins)
565** The same behaviour of missing VSYNC can be duplicated on budget
0779bf2d 566** cards, by setting DD1_INIT trigger mode 7 in 3rd nibble.
1da177e4
LT
567*/
568
569 // Setup RPS1 "program" (p35)
9101e622 570 count = 0;
1da177e4
LT
571
572
9101e622 573 // Wait Source Line Counter Threshold (p36)
153755a7 574 WRITE_RPS1(CMD_PAUSE | EVT_HS);
9101e622 575 // Set GPIO3=1 (p42)
153755a7
AV
576 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
577 WRITE_RPS1(GPIO3_MSK);
578 WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);
1da177e4 579#if RPS_IRQ
9101e622 580 // issue RPS1 interrupt
153755a7 581 WRITE_RPS1(CMD_INTERRUPT);
1da177e4 582#endif
9101e622 583 // Wait reset Source Line Counter Threshold (p36)
153755a7 584 WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
9101e622 585 // Set GPIO3=0 (p42)
153755a7
AV
586 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
587 WRITE_RPS1(GPIO3_MSK);
588 WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
1da177e4 589#if RPS_IRQ
9101e622 590 // issue RPS1 interrupt
153755a7 591 WRITE_RPS1(CMD_INTERRUPT);
1da177e4 592#endif
9101e622 593 // Jump to begin of RPS program (p37)
153755a7
AV
594 WRITE_RPS1(CMD_JUMP);
595 WRITE_RPS1(dev->d_rps1.dma_handle);
1da177e4 596
9101e622
MCC
597 // Fix VSYNC level
598 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
599 // Set RPS1 Address register to point to RPS code (r108 p42)
600 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
afa47abf
IS
601
602 if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL)))
603 return -ENOMEM;
604
605 dprintk(2, "budget: %p\n", budget);
606
26dc4d04
JG
607 err = ttpci_budget_init(budget, dev, info, THIS_MODULE, adapter_nr);
608 if (err) {
609 kfree(budget);
afa47abf
IS
610 return err;
611 }
612
9101e622
MCC
613 // Set Source Line Counter Threshold, using BRS (rCC p43)
614 // It generates HS event every TS_HEIGHT lines
615 // this is related to TS_WIDTH set in register
616 // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE
617 // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188
618 //,then RPS_THRESH1
619 // should be set to trigger every TS_HEIGHT (512) lines.
620 //
afa47abf 621 saa7146_write(dev, RPS_THRESH1, budget->buffer_height | MASK_12 );
9101e622
MCC
622
623 // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 );
624 // Enable RPS1 (rFC p33)
625 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
626
627
9101e622 628 dev->ext_priv = budget;
1da177e4 629
fdc53a6d 630 budget->dvb_adapter.priv = budget;
1da177e4
LT
631 frontend_init(budget);
632
32e4c3a5
OE
633 ttpci_budget_init_hooks(budget);
634
9101e622 635 return 0;
1da177e4
LT
636}
637
638static int budget_patch_detach (struct saa7146_dev* dev)
639{
9101e622
MCC
640 struct budget_patch *budget = (struct budget_patch*) dev->ext_priv;
641 int err;
1da177e4 642
2bfe031d
AQ
643 if (budget->dvb_frontend) {
644 dvb_unregister_frontend(budget->dvb_frontend);
f52a838b 645 dvb_frontend_detach(budget->dvb_frontend);
2bfe031d 646 }
9101e622 647 err = ttpci_budget_deinit (budget);
1da177e4 648
9101e622 649 kfree (budget);
1da177e4 650
9101e622 651 return err;
1da177e4
LT
652}
653
654static int __init budget_patch_init(void)
655{
656 return saa7146_register_extension(&budget_extension);
657}
658
659static void __exit budget_patch_exit(void)
660{
9101e622 661 saa7146_unregister_extension(&budget_extension);
1da177e4
LT
662}
663
664static struct saa7146_extension budget_extension = {
0e367a15 665 .name = "budget_patch dvb",
9101e622 666 .flags = 0,
1da177e4 667
9101e622
MCC
668 .module = THIS_MODULE,
669 .pci_tbl = pci_tbl,
670 .attach = budget_patch_attach,
671 .detach = budget_patch_detach,
1da177e4 672
9101e622
MCC
673 .irq_mask = MASK_10,
674 .irq_func = ttpci_budget_irq10_handler,
1da177e4
LT
675};
676
677module_init(budget_patch_init);
678module_exit(budget_patch_exit);
679
680MODULE_LICENSE("GPL");
681MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others");
682MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 "
9101e622 683 "based so-called Budget Patch cards");